#endif /* __LITTLE_ENDIAN || CONFIG_AU1X00 */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
+#if defined(CONFIG_IDE_SWAP_IO)
static void
output_data(int dev, ulong *sect_buf, int words)
{
}
#endif
}
-#else /* ! __PPC__ */
+#else /* ! CONFIG_IDE_SWAP_IO */
static void
output_data(int dev, ulong *sect_buf, int words)
{
outsw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words<<1);
}
-#endif /* __PPC__ */
+#endif /* CONFIG_IDE_SWAP_IO */
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA) || defined(CONFIG_SH)
+#if defined(CONFIG_IDE_SWAP_IO)
static void
input_data(int dev, ulong *sect_buf, int words)
{
}
#endif
}
-#else /* ! __PPC__ */
+#else /* ! CONFIG_IDE_SWAP_IO */
static void
input_data(int dev, ulong *sect_buf, int words)
{
insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, words << 1);
}
-#endif /* __PPC__ */
+#endif /* CONFIG_IDE_SWAP_IO */
/* -------------------------------------------------------------------------
*/
* ATAPI Support
*/
-#if defined(__PPC__) || defined(CONFIG_PXA_PCMCIA)
+#if defined(CONFIG_IDE_SWAP_IO)
/* since ATAPI may use commands with not 4 bytes alligned length
* we have our own transfer functions, 2 bytes alligned */
static void
#endif
}
-#else /* ! __PPC__ */
+#else /* ! CONFIG_IDE_SWAP_IO */
static void
output_data_shorts(int dev, ushort *sect_buf, int shorts)
{
insw(ATA_CURR_BASE(dev)+ATA_DATA_REG, sect_buf, shorts);
}
-#endif /* __PPC__ */
+#endif /* CONFIG_IDE_SWAP_IO */
/*
* Wait until (Status & mask) == res, or timeout (in ms)
marked memory configuration should be touched since the other parameters
are imposed by the PXA architecture.
+EDIT 2010-07-01: in common/cmd_ide.c, having CONFIG_PXA_PCMCIA defined
+would cause looping on inw()/outw() rather than using insw()/outsw(),
+thus making sure IDE / ATA bytes are properly swapped. This behaviour
+is now controlled by CONFIG_IDE_SWAP_IO, therefore PXA boards with
+PCMCIA should #define CONFIG_IDE_SWAP_IO.
+
+#define CONFIG_IDE_SWAP_IO
+
#define CONFIG_PXA_PCMCIA 1
#define CONFIG_PXA_IDE 1
#define CONFIG_SYS_ATA_DATA_OFFSET 0x200 /* data reg offset */
#define CONFIG_SYS_ATA_REG_OFFSET 0x200 /* reg offset */
#define CONFIG_SYS_ATA_ALT_OFFSET 0x210 /* alternate register offset */
+#define CONFIG_IDE_SWAP_IO
/* if you use all NOR Flash , you change dip-switch. Please see Manual. */
#define CONFIG_SYS_MAX_FLASH_BANKS 1