powerpc/85xx: clean up and document the QE/FMAN microcode macros
authorTimur Tabi <timur@freescale.com>
Tue, 22 Nov 2011 15:21:25 +0000 (09:21 -0600)
committerKumar Gala <galak@kernel.crashing.org>
Tue, 29 Nov 2011 14:48:06 +0000 (08:48 -0600)
Several macros are used to identify and locate the microcode binary image
that U-boot needs to upload to the QE or Fman.  Both the QE and the Fman
use the QE Firmware binary format to package their respective microcode data,
which is why the same macros are used for both.  A given SOC will only have
a QE or an Fman, so this is safe.

Unfortunately, the current macro definition and usage has inconsistencies.
For example, CONFIG_SYS_FMAN_FW_ADDR was used to define the address of Fman
firmware in NOR flash, but CONFIG_SYS_QE_FW_IN_NAND contains the address
of NAND.  There's no way to know by looking at a variable how it's supposed
to be used.

In the future, the code which uploads QE firmware and Fman firmware will
be merged.

Signed-off-by: Timur Tabi <timur@freescale.com>
Signed-off-by: Kumar Gala <galak@kernel.crashing.org>
README
arch/powerpc/cpu/mpc85xx/cpu_init.c
arch/powerpc/cpu/mpc85xx/fdt.c
drivers/net/fm/fm.c
drivers/qe/qe.c
include/configs/MPC8569MDS.h
include/configs/P1023RDS.h
include/configs/P2041RDB.h
include/configs/corenet_ds.h
include/configs/p1_p2_rdb_pc.h

diff --git a/README b/README
index 07f1d11e5feb2565df5422f3ccf940f1174a747d..fda0190d5ff99361558591d4b0ba29f56a683bda 100644 (file)
--- a/README
+++ b/README
@@ -3274,6 +3274,44 @@ Low Level (hardware related) configuration options:
                be used if available. These functions may be faster under some
                conditions but may increase the binary size.
 
+Freescale QE/FMAN Firmware Support:
+-----------------------------------
+
+The Freescale QUICCEngine (QE) and Frame Manager (FMAN) both support the
+loading of "firmware", which is encoded in the QE firmware binary format.
+This firmware often needs to be loaded during U-Boot booting, so macros
+are used to identify the storage device (NOR flash, SPI, etc) and the address
+within that device.
+
+- CONFIG_SYS_QE_FMAN_FW_ADDR
+       The address in the storage device where the firmware is located.  The
+       meaning of this address depends on which CONFIG_SYS_QE_FW_IN_xxx macro
+       is also specified.
+
+- CONFIG_SYS_QE_FMAN_FW_LENGTH
+       The maximum possible size of the firmware.  The firmware binary format
+       has a field that specifies the actual size of the firmware, but it
+       might not be possible to read any part of the firmware unless some
+       local storage is allocated to hold the entire firmware first.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NOR
+       Specifies that QE/FMAN firmware is located in NOR flash, mapped as
+       normal addressable memory via the LBC.  CONFIG_SYS_FMAN_FW_ADDR is the
+       virtual address in NOR flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_NAND
+       Specifies that QE/FMAN firmware is located in NAND flash.
+       CONFIG_SYS_FMAN_FW_ADDR is the offset within NAND flash.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_MMC
+       Specifies that QE/FMAN firmware is located on the primary SD/MMC
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+- CONFIG_SYS_QE_FMAN_FW_IN_SPIFLASH
+       Specifies that QE/FMAN firmware is located on the primary SPI
+       device.  CONFIG_SYS_FMAN_FW_ADDR is the byte offset on that device.
+
+
 Building the Software:
 ======================
 
index 27aa038d58ac25f59f2681093d6230f26ca3d360..2e4a06c35abed3d997695bb83463c3cb1bba2ac5 100644 (file)
@@ -39,7 +39,7 @@
 #include <asm/fsl_serdes.h>
 #include <linux/compiler.h>
 #include "mp.h"
-#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #include <nand.h>
 #include <errno.h>
 #endif
@@ -552,17 +552,17 @@ void cpu_secondary_init_r(void)
 {
 #ifdef CONFIG_QE
        uint qe_base = CONFIG_SYS_IMMR + 0x00080000; /* QE immr base */
-#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
        int ret;
-       size_t fw_length = CONFIG_SYS_QE_FW_LENGTH;
+       size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
 
        /* load QE firmware from NAND flash to DDR first */
-       ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND,
-                       &fw_length, (u_char *)CONFIG_SYS_QE_FW_ADDR);
+       ret = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_IN_NAND,
+                       &fw_length, (u_char *)CONFIG_SYS_QE_FMAN_FW_ADDR);
 
        if (ret && ret == -EUCLEAN) {
                printf ("NAND read for QE firmware at offset %x failed %d\n",
-                               CONFIG_SYS_QE_FW_IN_NAND, ret);
+                               CONFIG_SYS_QE_FMAN_FW_IN_NAND, ret);
        }
 #endif
        qe_init(qe_base);
index a53a31d4c576e55953057a185d11d46a4153adae..62c7ea15d02b72846b4a1a546b311edd7989fdb5 100644 (file)
@@ -466,7 +466,7 @@ void fdt_fixup_fman_firmware(void *blob)
                return;
        }
 
-       if (length > CONFIG_SYS_FMAN_FW_LENGTH) {
+       if (length > CONFIG_SYS_QE_FMAN_FW_LENGTH) {
                printf("Fman firmware at %p is too large (size=%u)\n",
                       fmanfw, length);
                return;
index 846c37249be6a65f874a8e91f3cc42932e442a87..0b8c33fb7a34eed43a3a32fd6c0c527fef818414 100644 (file)
 #include "fm.h"
 #include "../../qe/qe.h"               /* For struct qe_firmware */
 
-#ifdef CONFIG_SYS_QE_FW_IN_NAND
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NAND
 #include <nand.h>
 #elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH)
 #include <spi_flash.h>
-#elif defined(CONFIG_SYS_QE_FW_IN_MMC)
+#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_MMC)
 #include <mmc.h>
 #endif
 
@@ -363,21 +363,21 @@ int fm_init_common(int index, struct ccsr_fman *reg)
 {
        int rc;
        char env_addr[32];
-#if defined(CONFIG_SYS_FMAN_FW_ADDR)
-       void *addr = (void *)CONFIG_SYS_FMAN_FW_ADDR;
-#elif defined(CONFIG_SYS_QE_FW_IN_NAND)
-       size_t fw_length = CONFIG_SYS_FMAN_FW_LENGTH;
-       void *addr = malloc(CONFIG_SYS_FMAN_FW_LENGTH);
+#if defined(CONFIG_SYS_QE_FMAN_FW_IN_NOR)
+       void *addr = (void *)CONFIG_SYS_QE_FMAN_FW_ADDR;
+#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_NAND)
+       size_t fw_length = CONFIG_SYS_QE_FMAN_FW_LENGTH;
+       void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
 
-       rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FW_IN_NAND,
+       rc = nand_read(&nand_info[0], (loff_t)CONFIG_SYS_QE_FMAN_FW_ADDR,
                       &fw_length, (u_char *)addr);
        if (rc == -EUCLEAN) {
                printf("NAND read of FMAN firmware at offset 0x%x failed %d\n",
-                       CONFIG_SYS_QE_FW_IN_NAND, rc);
+                       CONFIG_SYS_QE_FMAN_FW_ADDR, rc);
        }
 #elif defined(CONFIG_SYS_QE_FW_IN_SPIFLASH)
        struct spi_flash *ucode_flash;
-       void *addr = malloc(CONFIG_SYS_FMAN_FW_LENGTH);
+       void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
        int ret = 0;
 
        ucode_flash = spi_flash_probe(CONFIG_ENV_SPI_BUS, CONFIG_ENV_SPI_CS,
@@ -385,17 +385,17 @@ int fm_init_common(int index, struct ccsr_fman *reg)
        if (!ucode_flash)
                printf("SF: probe for ucode failed\n");
        else {
-               ret = spi_flash_read(ucode_flash, CONFIG_SYS_QE_FW_IN_SPIFLASH,
-                               CONFIG_SYS_FMAN_FW_LENGTH, addr);
+               ret = spi_flash_read(ucode_flash, CONFIG_SYS_QE_FMAN_FW_ADDR,
+                               CONFIG_SYS_QE_FMAN_FW_LENGTH, addr);
                if (ret)
                        printf("SF: read for ucode failed\n");
                spi_flash_free(ucode_flash);
        }
-#elif defined(CONFIG_SYS_QE_FW_IN_MMC)
+#elif defined(CONFIG_SYS_QE_FMAN_FW_IN_MMC)
        int dev = CONFIG_SYS_MMC_ENV_DEV;
-       void *addr = malloc(CONFIG_SYS_FMAN_FW_LENGTH);
-       u32 cnt = CONFIG_SYS_FMAN_FW_LENGTH / 512;
-       u32 blk = CONFIG_SYS_QE_FW_IN_MMC / 512;
+       void *addr = malloc(CONFIG_SYS_QE_FMAN_FW_LENGTH);
+       u32 cnt = CONFIG_SYS_QE_FMAN_FW_LENGTH / 512;
+       u32 blk = CONFIG_SYS_QE_FMAN_FW_ADDR / 512;
        struct mmc *mmc = find_mmc_device(CONFIG_SYS_MMC_ENV_DEV);
 
        if (!mmc)
index c4ec2f4af89e95c4b948bc50ae5155f00f0fc23c..9f711519ede329576221d93bcc759c78a0c70e1b 100644 (file)
@@ -170,11 +170,11 @@ void qe_init(uint qe_base)
        /* Init the QE IMMR base */
        qe_immr = (qe_map_t *)qe_base;
 
-#ifdef CONFIG_SYS_QE_FW_ADDR
+#ifdef CONFIG_SYS_QE_FMAN_FW_IN_NOR
        /*
         * Upload microcode to IRAM for those SOCs which do not have ROM in QE.
         */
-       qe_upload_firmware((const struct qe_firmware *) CONFIG_SYS_QE_FW_ADDR);
+       qe_upload_firmware((const void *)CONFIG_SYS_QE_FMAN_FW_ADDR);
 
        /* enable the microcode in IRAM */
        out_be32(&qe_immr->iram.iready,QE_IRAM_READY);
index ab27b9895a2b4aaed05c7acd4681de4c63ffe5d9..7a5d86d2b7b840b79c6e81768971bd409bf8ea9d 100644 (file)
@@ -510,7 +510,8 @@ extern unsigned long get_clock_freq(void);
 #define CONFIG_SYS_LOADS_BAUD_CHANGE   1       /* allow baudrate change */
 
 /* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FW_ADDR  0xfff00000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xfff00000
 
 /*
  * BOOTP options
index 013a6acdca2c51bcbc9962ad6d844ee00582e52d..e057b1f9459002dfd7155eabefda5c743f3f5078 100644 (file)
@@ -526,12 +526,14 @@ extern unsigned long get_clock_freq(void);
 #ifndef CONFIG_NAND
 /* Default address of microcode for the Linux Fman driver */
 /* QE microcode/firmware address */
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xEF000000
 #else
-#define CONFIG_SYS_QE_FW_IN_NAND       0x1f00000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0x1f00000
 #endif
-#define CONFIG_SYS_FMAN_FW_LENGTH      0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH)
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
+#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_FMAN_ENET
 #define CONFIG_SYS_FM1_DTSEC1_PHY_ADDR 0x2
index f9fe3cf95206affd3a12a672ee4a480b44da6d7e..a48055e2c5e9d19b1bd4d242775a54be8f18831f 100644 (file)
@@ -414,21 +414,25 @@ unsigned long get_board_sys_clk(unsigned long dummy);
  * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
  * env, so we got 0x110000.
  */
-#define CONFIG_SYS_QE_FW_IN_SPIFLASH   0x110000
+#define CONFIG_SYS_QE_FW_IN_SPIFLASH
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
  * about 545KB (1089 blocks), Env is stored after the image, and the env size is
  * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
  */
-#define CONFIG_SYS_QE_FW_IN_MMC                (512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (512 * 1130)
 #elif defined(CONFIG_NAND)
-#define CONFIG_SYS_QE_FW_IN_NAND       (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xEF000000
 #endif
-#define CONFIG_SYS_FMAN_FW_LENGTH      0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH)
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
+#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
index bc0aeebb441118144531df4716fb84fc67769b21..0622b9fcfddc047c0e7e24eb9f1f1d2baf000736 100644 (file)
  * env is stored at 0x100000, sector size is 0x10000, ucode is stored after
  * env, so we got 0x110000.
  */
-#define CONFIG_SYS_QE_FW_IN_SPIFLASH   0x110000
+#define CONFIG_SYS_QE_FW_IN_SPIFLASH
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0x110000
 #elif defined(CONFIG_SDCARD)
 /*
  * PBL SD boot image should stored at 0x1000(8 blocks), the size of the image is
  * about 545KB (1089 blocks), Env is stored after the image, and the env size is
  * 0x2000 (16 blocks), 8 + 1089 + 16 = 1113, enlarge it to 1130.
  */
-#define CONFIG_SYS_QE_FW_IN_MMC                (512 * 1130)
+#define CONFIG_SYS_QE_FMAN_FW_IN_MMC
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (512 * 1130)
 #elif defined(CONFIG_NAND)
-#define CONFIG_SYS_QE_FW_IN_NAND       (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
+#define CONFIG_SYS_QE_FMAN_FW_IN_NAND
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     (6 * CONFIG_SYS_NAND_BLOCK_SIZE)
 #else
-#define CONFIG_SYS_FMAN_FW_ADDR                0xEF000000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR             0xEF000000
 #endif
-#define CONFIG_SYS_FMAN_FW_LENGTH      0x10000
-#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_FMAN_FW_LENGTH)
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
+#define CONFIG_SYS_FDT_PAD             (0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 
 #ifdef CONFIG_SYS_DPAA_FMAN
 #define CONFIG_FMAN_ENET
index 5a69902f899b96e2bb31416d08d18366a0eb80eb..8e8fa163b8acd84e2bc7f3b5f7a6aa4ec9902406 100644 (file)
 
 #ifdef CONFIG_QE
 /* QE microcode/firmware address */
-#define CONFIG_SYS_QE_FW_ADDR          0xefec0000
-#define CONFIG_SYS_QE_FW_LENGTH                0x10000
+#define CONFIG_SYS_QE_FMAN_FW_IN_NOR
+#define CONFIG_SYS_QE_FMAN_FW_ADDR     0xefec0000
+#define CONFIG_SYS_QE_FMAN_FW_LENGTH   0x10000
 #endif /* CONFIG_QE */
 
 #ifdef CONFIG_P1025RDB