ice: Introduce ice_dev_onetime_setup
authorAnirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Thu, 18 Oct 2018 15:37:07 +0000 (08:37 -0700)
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>
Wed, 24 Oct 2018 21:29:55 +0000 (14:29 -0700)
ice_dev_onetime_setup contains a couple of driver workarounds for current
firmware limitations. These workarounds are expected to go away once
these limitations are fixed in the firmware.

On a firmware release that has these issues addressed, these workarounds
(while unnecessary) will not break anything.

Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Andrew Bowers <andrewx.bowers@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
drivers/net/ethernet/intel/ice/ice_common.c
drivers/net/ethernet/intel/ice/ice_common.h
drivers/net/ethernet/intel/ice/ice_hw_autogen.h
drivers/net/ethernet/intel/ice/ice_lib.c

index 78df54b25bf1b0823399a2538ecf8e2d840b8074..5a91a9087d1e4aa362b7b135ee5843b643a8ff29 100644 (file)
@@ -42,6 +42,23 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw)
        return 0;
 }
 
+/**
+ * ice_dev_onetime_setup - Temporary HW/FW workarounds
+ * @hw: pointer to the HW structure
+ *
+ * This function provides temporary workarounds for certain issues
+ * that are expected to be fixed in the HW/FW.
+ */
+void ice_dev_onetime_setup(struct ice_hw *hw)
+{
+       /* configure Rx - set non pxe mode */
+       wr32(hw, GLLAN_RCTL_0, 0x1);
+
+#define MBX_PF_VT_PFALLOC      0x00231E80
+       /* set VFs per PF */
+       wr32(hw, MBX_PF_VT_PFALLOC, rd32(hw, PF_VT_PFALLOC_HIF));
+}
+
 /**
  * ice_clear_pf_cfg - Clear PF configuration
  * @hw: pointer to the hardware structure
@@ -740,6 +757,8 @@ enum ice_status ice_init_hw(struct ice_hw *hw)
        if (status)
                goto err_unroll_sched;
 
+       ice_dev_onetime_setup(hw);
+
        /* Get MAC information */
        /* A single port can report up to two (LAN and WoL) addresses */
        mac_buf = devm_kcalloc(ice_hw_to_dev(hw), 2,
index 1900681289a4c1c55985750f0ce6635d07abf6d0..876347e32b6fd4d04b5508e3285150f61419b2f2 100644 (file)
@@ -34,6 +34,9 @@ ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
                struct ice_sq_cd *cd);
 void ice_clear_pxe_mode(struct ice_hw *hw);
 enum ice_status ice_get_caps(struct ice_hw *hw);
+
+void ice_dev_onetime_setup(struct ice_hw *hw);
+
 enum ice_status
 ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
                  u32 rxq_index);
index a6679a9bfd3a598eadae94b1805293cc300c1238..228afcad6fc3c2049eff6c889422406ba21b970f 100644 (file)
 #define VPINT_ALLOC_LAST_S                     12
 #define VPINT_ALLOC_LAST_M                     ICE_M(0x7FF, 12)
 #define VPINT_ALLOC_VALID_M                    BIT(31)
+#define GLLAN_RCTL_0                           0x002941F8
 #define QRX_CONTEXT(_i, _QRX)                  (0x00280000 + ((_i) * 8192 + (_QRX) * 4))
 #define QRX_CTRL(_QRX)                         (0x00120000 + ((_QRX) * 4))
 #define QRX_CTRL_MAX_INDEX                     2047
 #define GLV_UPRCL(_i)                          (0x003B2000 + ((_i) * 8))
 #define GLV_UPTCH(_i)                          (0x0030A004 + ((_i) * 8))
 #define GLV_UPTCL(_i)                          (0x0030A000 + ((_i) * 8))
+#define PF_VT_PFALLOC_HIF                      0x0009DD80
 #define VSIQF_HKEY_MAX_INDEX                   12
 #define VSIQF_HLUT_MAX_INDEX                   15
 #define VFINT_DYN_CTLN(_i)                     (0x00003800 + ((_i) * 4))
index e750702bcdce7d8208dccce09c7da1ec24f8699f..5bacad01f0c9c1c8cce2b4f56caca05b034688c2 100644 (file)
@@ -2529,6 +2529,7 @@ int ice_vsi_rebuild(struct ice_vsi *vsi)
        vsi->hw_base_vector = 0;
        ice_vsi_clear_rings(vsi);
        ice_vsi_free_arrays(vsi, false);
+       ice_dev_onetime_setup(&vsi->back->hw);
        ice_vsi_set_num_qs(vsi);
 
        /* Initialize VSI struct elements and create VSI in FW */