Staging: iio: Prefer using the BIT macro

This patch replaces bit shifting on 1 with the BIT(x) macro
as it's extensively used by other function in this driver.

This was done with coccinelle:
@@ int g; @@

-(1 << g)
+BIT(g)

Signed-off-by: Cristina Opriceana <cristina.opriceana@gmail.com>
Reviewed-by: Daniel Baluta <daniel.baluta@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c
index 8ecc0bc64ee32bba8e6b7d1b637cd4c5cad7c145..a861fe0149b1b3f8e706acece201d760942ba71f 100644 (file)
--- a/drivers/staging/iio/frequency/ad9832.c
+++ b/drivers/staging/iio/frequency/ad9832.c
@@ -59,7 +59,7 @@ static int ad9832_write_frequency(struct ad9832_state *st,
 static int ad9832_write_phase(struct ad9832_state *st,
                              unsigned long addr, unsigned long phase)
 {
-       if (phase > (1 << AD9832_PHASE_BITS))
+       if (phase > BIT(AD9832_PHASE_BITS))
                return -EINVAL;
 
        st->phase_data[0] = cpu_to_be16((AD9832_CMD_PHA8BITSW << CMD_SHIFT) |

diff --git a/drivers/staging/iio/frequency/ad9832.h b/drivers/staging/iio/frequency/ad9832.h
index 386f4dc8c9a11bb9b7043019b8c3454b41fd64c3..d32323b46be68f70888de6de1852c1e15eaa387c 100644 (file)
--- a/drivers/staging/iio/frequency/ad9832.h
+++ b/drivers/staging/iio/frequency/ad9832.h
@@ -42,13 +42,13 @@
 #define AD9832_CMD_SYNCSELSRC  0x8
 #define AD9832_CMD_SLEEPRESCLR 0xC
 
-#define AD9832_FREQ            (1 << 11)
+#define AD9832_FREQ            BIT(11)
 #define AD9832_PHASE(x)                (((x) & 3) << 9)
-#define AD9832_SYNC            (1 << 13)
-#define AD9832_SELSRC          (1 << 12)
-#define AD9832_SLEEP           (1 << 13)
-#define AD9832_RESET           (1 << 12)
-#define AD9832_CLR             (1 << 11)
+#define AD9832_SYNC            BIT(13)
+#define AD9832_SELSRC          BIT(12)
+#define AD9832_SLEEP           BIT(13)
+#define AD9832_RESET           BIT(12)
+#define AD9832_CLR             BIT(11)
 #define CMD_SHIFT              12
 #define ADD_SHIFT              8
 #define AD9832_FREQ_BITS       32

diff --git a/drivers/staging/iio/frequency/ad9834.c b/drivers/staging/iio/frequency/ad9834.c
index efea56012622ba5a143a1fecf76c49ca855881f2..342c71318d3a59af49c91c0ff9f5a81a563def03 100644 (file)
--- a/drivers/staging/iio/frequency/ad9834.c
+++ b/drivers/staging/iio/frequency/ad9834.c
@@ -27,7 +27,7 @@
 
 static unsigned int ad9834_calc_freqreg(unsigned long mclk, unsigned long fout)
 {
-       unsigned long long freqreg = (u64)fout * (u64)(1 << AD9834_FREQ_BITS);
+       unsigned long long freqreg = (u64)fout * (u64)BIT(AD9834_FREQ_BITS);
 
        do_div(freqreg, mclk);
        return freqreg;
@@ -55,7 +55,7 @@ static int ad9834_write_frequency(struct ad9834_state *st,
 static int ad9834_write_phase(struct ad9834_state *st,
                                  unsigned long addr, unsigned long phase)
 {
-       if (phase > (1 << AD9834_PHASE_BITS))
+       if (phase > BIT(AD9834_PHASE_BITS))
                return -EINVAL;
        st->data = cpu_to_be16(addr | phase);
 

diff --git a/drivers/staging/iio/frequency/ad9834.h b/drivers/staging/iio/frequency/ad9834.h
index 8ca6e52bae6ba67fa7dd7b65b110dc1f57029221..0a0de4c4f460dcaa30705ebd552063a7a3c7c039 100644 (file)
--- a/drivers/staging/iio/frequency/ad9834.h
+++ b/drivers/staging/iio/frequency/ad9834.h
@@ -10,31 +10,31 @@
 
 /* Registers */
 
-#define AD9834_REG_CMD         (0 << 14)
-#define AD9834_REG_FREQ0       (1 << 14)
-#define AD9834_REG_FREQ1       (2 << 14)
-#define AD9834_REG_PHASE0      (6 << 13)
-#define AD9834_REG_PHASE1      (7 << 13)
+#define AD9834_REG_CMD         0
+#define AD9834_REG_FREQ0       BIT(14)
+#define AD9834_REG_FREQ1       BIT(15)
+#define AD9834_REG_PHASE0      (BIT(15) | BIT(14))
+#define AD9834_REG_PHASE1      (BIT(15) | BIT(14) | BIT(13))
 
 /* Command Control Bits */
 
-#define AD9834_B28             (1 << 13)
-#define AD9834_HLB             (1 << 12)
-#define AD9834_FSEL            (1 << 11)
-#define AD9834_PSEL            (1 << 10)
-#define AD9834_PIN_SW          (1 << 9)
-#define AD9834_RESET           (1 << 8)
-#define AD9834_SLEEP1          (1 << 7)
-#define AD9834_SLEEP12         (1 << 6)
-#define AD9834_OPBITEN         (1 << 5)
-#define AD9834_SIGN_PIB                (1 << 4)
-#define AD9834_DIV2            (1 << 3)
-#define AD9834_MODE            (1 << 1)
+#define AD9834_B28             BIT(13)
+#define AD9834_HLB             BIT(12)
+#define AD9834_FSEL            BIT(11)
+#define AD9834_PSEL            BIT(10)
+#define AD9834_PIN_SW          BIT(9)
+#define AD9834_RESET           BIT(8)
+#define AD9834_SLEEP1          BIT(7)
+#define AD9834_SLEEP12         BIT(6)
+#define AD9834_OPBITEN         BIT(5)
+#define AD9834_SIGN_PIB                BIT(4)
+#define AD9834_DIV2            BIT(3)
+#define AD9834_MODE            BIT(1)
 
 #define AD9834_FREQ_BITS       28
 #define AD9834_PHASE_BITS      12
 
-#define RES_MASK(bits) ((1 << (bits)) - 1)
+#define RES_MASK(bits) (BIT(bits) - 1)
 
 /**
  * struct ad9834_state - driver instance specific data