struct pci_bus * __devinit pci_scan_one_pbm(struct pci_pbm_info *pbm)
{
- struct pci_controller_info *p = pbm->parent;
struct device_node *node = pbm->prom_node;
struct pci_dev *host_pdev;
struct pci_bus *bus;
printk("PCI: Scanning PBM %s\n", node->full_name);
/* XXX parent device? XXX */
- bus = pci_create_bus(NULL, pbm->pci_first_busno, p->pci_ops, pbm);
+ bus = pci_create_bus(NULL, pbm->pci_first_busno, pbm->pci_ops, pbm);
if (!bus) {
printk(KERN_ERR "Failed to create bus for %s\n",
node->full_name);
pci_pbm_root = pbm;
pbm->scan_bus = pci_fire_scan_bus;
+ pbm->pci_ops = &pci_fire_ops;
pbm->portid = portid;
pbm->parent = p;
p->index = pci_num_controllers++;
/* XXX MSI support XXX */
- p->pci_ops = &pci_fire_ops;
/* Like PSYCHO and SCHIZO we have a 2GB aligned area
* for memory space.
pci_pbm_root = pbm;
pbm->scan_bus = psycho_scan_bus;
+ pbm->pci_ops = &psycho_ops;
pbm->chip_type = PBM_CHIP_TYPE_PSYCHO;
pbm->chip_version = 0;
p->pbm_A.portid = upa_portid;
p->pbm_B.portid = upa_portid;
p->index = pci_num_controllers++;
- p->pci_ops = &psycho_ops;
prop = of_find_property(dp, "reg", NULL);
pr_regs = prop->value;
printk("%s: SABRE PCI Bus Module\n", pbm->name);
pbm->scan_bus = sabre_scan_bus;
+ pbm->pci_ops = &sabre_ops;
pbm->chip_type = PBM_CHIP_TYPE_SABRE;
pbm->parent = p;
p->pbm_A.portid = upa_portid;
p->index = pci_num_controllers++;
- p->pci_ops = &sabre_ops;
/*
* Map in SABRE register set and report the presence of this SABRE.
pci_pbm_root = pbm;
pbm->scan_bus = schizo_scan_bus;
+ pbm->pci_ops = &schizo_ops;
pbm->portid = portid;
pbm->parent = p;
p->pbm_B.iommu = iommu;
p->index = pci_num_controllers++;
- p->pci_ops = &schizo_ops;
/* Like PSYCHO we have a 2GB aligned area for memory space. */
pci_memspace_mask = 0x7fffffffUL;
pci_pbm_root = pbm;
pbm->scan_bus = pci_sun4v_scan_bus;
+ pbm->pci_ops = &pci_sun4v_ops;
pbm->parent = p;
pbm->prom_node = dp;
p->setup_msi_irq = pci_sun4v_setup_msi_irq;
p->teardown_msi_irq = pci_sun4v_teardown_msi_irq;
#endif
- p->pci_ops = &pci_sun4v_ops;
/* Like PSYCHO and SCHIZO we have a 2GB aligned area
* for memory space.
unsigned int pci_last_busno;
struct pci_bus *pci_bus;
void (*scan_bus)(struct pci_pbm_info *);
+ struct pci_ops *pci_ops;
};
struct pci_controller_info {
struct msi_desc *entry);
void (*teardown_msi_irq)(unsigned int virt_irq, struct pci_dev *pdev);
#endif
-
- /* Now things for the actual PCI bus probes. */
- struct pci_ops *pci_ops;
};
#endif /* !(__SPARC64_PBM_H) */