config HAVE_FB_ATMEL
bool
-config HAVE_FB_IMX
- bool
-
config SH_MIPI_DSI
tristate
depends on (SUPERH || ARCH_SHMOBILE) && HAVE_CLK
config FB_IMX
tristate "Freescale i.MX LCD support"
- depends on FB && (HAVE_FB_IMX || ARCH_MX1 || ARCH_MX2)
+ depends on FB && IMX_HAVE_PLATFORM_IMX_FB
select FB_CFB_FILLRECT
select FB_CFB_COPYAREA
select FB_CFB_IMAGEBLIT
#define CPOS_OP (1<<28)
#define CPOS_CXP(x) (((x) & 3ff) << 16)
-#ifdef CONFIG_ARCH_MX1
-#define CPOS_CYP(y) ((y) & 0x1ff)
-#else
-#define CPOS_CYP(y) ((y) & 0x3ff)
-#endif
-
#define LCDC_LCWHB 0x10
#define LCWHB_BK_EN (1<<31)
#define LCWHB_CW(w) (((w) & 0x1f) << 24)
#define LCDC_LCHCC 0x14
-#ifdef CONFIG_ARCH_MX1
-#define LCHCC_CUR_COL_R(r) (((r) & 0x1f) << 11)
-#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 5)
-#define LCHCC_CUR_COL_B(b) ((b) & 0x1f)
-#else
-#define LCHCC_CUR_COL_R(r) (((r) & 0x3f) << 12)
-#define LCHCC_CUR_COL_G(g) (((g) & 0x3f) << 6)
-#define LCHCC_CUR_COL_B(b) ((b) & 0x3f)
-#endif
-
#define LCDC_PCR 0x18
#define LCDC_HCR 0x1C
#define LCDC_RMCR 0x34
-#ifdef CONFIG_ARCH_MX1
-#define RMCR_LCDC_EN (1<<1)
-#else
-#define RMCR_LCDC_EN 0
-#endif
+#define RMCR_LCDC_EN_MX1 (1<<1)
#define RMCR_SELF_REF (1<<0)
writel(readl(fbi->regs + LCDC_CPOS) & ~(CPOS_CC0 | CPOS_CC1),
fbi->regs + LCDC_CPOS);
- writel(RMCR_LCDC_EN, fbi->regs + LCDC_RMCR);
+ /*
+ * RMCR_LCDC_EN_MX1 is present on i.MX1 only, but doesn't hurt
+ * on other SoCs
+ */
+ writel(RMCR_LCDC_EN_MX1, fbi->regs + LCDC_RMCR);
clk_enable(fbi->clk);