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drm/i915/cnl: Allow the reg_read ioctl to read the RCS TIMESTAMP register
author
Nanley Chery
<nanley.g.chery@intel.com>
Tue, 5 Sep 2017 18:45:07 +0000
(11:45 -0700)
committer
Rodrigo Vivi
<rodrigo.vivi@intel.com>
Wed, 6 Sep 2017 19:31:27 +0000
(12:31 -0700)
This enables the Mesa driver to advertise support for ARB_timer_query, and
thus an OpenGL version higher than 3.2.
Suggested-by: Ben Widawsky <ben@bwidawsk.net>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Nanley Chery <nanley.g.chery@intel.com>
Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link:
https://patchwork.freedesktop.org/patch/msgid/20170905184507.30046-1-nanley.g.chery@intel.com
drivers/gpu/drm/i915/intel_uncore.c
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diff --git
a/drivers/gpu/drm/i915/intel_uncore.c
b/drivers/gpu/drm/i915/intel_uncore.c
index 1d7b879cc68c60b4845fb954a0c82eb8e5c909e9..0529af7cfbb86303b7d0105202aac744d54df93e 100644
(file)
--- a/
drivers/gpu/drm/i915/intel_uncore.c
+++ b/
drivers/gpu/drm/i915/intel_uncore.c
@@
-1251,7
+1251,7
@@
static const struct register_whitelist {
} whitelist[] = {
{ .offset_ldw = RING_TIMESTAMP(RENDER_RING_BASE),
.offset_udw = RING_TIMESTAMP_UDW(RENDER_RING_BASE),
- .size = 8, .gen_bitmask = GEN_RANGE(4,
9
) },
+ .size = 8, .gen_bitmask = GEN_RANGE(4,
10
) },
};
int i915_reg_read_ioctl(struct drm_device *dev,