bool has_rel;
bool has_data40 = false;
bool has_dribble = false;
+ bool has_palm_detect = false;
unsigned x_size, y_size;
u16 query_offset;
ret);
return ret;
}
+ has_palm_detect = !!(buf[0] & BIT(0));
has_query10 = !!(buf[0] & BIT(2));
query_offset += 2; /* query 7 and 8 are present */
* retrieve the ctrl registers
* the ctrl register has a size of 20 but a fw bug split it into 16 + 4,
* and there is no way to know if the first 20 bytes are here or not.
- * We use only the first 10 bytes, so get only them.
+ * We use only the first 12 bytes, so get only them.
*/
- ret = rmi_read_block(hdev, data->f11.control_base_addr, buf, 10);
+ ret = rmi_read_block(hdev, data->f11.control_base_addr, buf, 12);
if (ret) {
- hid_err(hdev, "can not read ctrl block of size 10: %d.\n", ret);
+ hid_err(hdev, "can not read ctrl block of size 11: %d.\n", ret);
return ret;
}
}
}
+ if (has_palm_detect) {
+ buf[11] = buf[11] & ~BIT(0);
+ ret = rmi_write(hdev, data->f11.control_base_addr + 11,
+ &buf[11]);
+ if (ret) {
+ hid_err(hdev, "can not write to control reg 11: %d.\n",
+ ret);
+ return ret;
+ }
+ }
+
return 0;
}