net: phy: micrel: center FLP burst timing at 16ms

Like [1], reset the FLP burst timing for the KSZ9031 to the 16ms
specified by the IEEE802.3 standard from the chip's default of 8ms.

For more details, see the "Auto-Negotiation Timing" section of the
KSZ9031RNX datasheet.

[1] https://patchwork.kernel.org/patch/6558371/

Signed-off-by: Ash Charles <ash.charles@savoirfairelinux.com>
Acked-by: Joe Hershberger <joe.hershberger@ni.com>

diff --git a/drivers/net/phy/micrel.c b/drivers/net/phy/micrel.c
index 6b313a9fd3244662ae8218b12276d970341ae98b..28a14018835b175469233385af7546e0ac3ceddd 100644 (file)
--- a/drivers/net/phy/micrel.c
+++ b/drivers/net/phy/micrel.c
@@ -415,11 +415,31 @@ static int ksz9031_of_config(struct phy_device *phydev)
 
        return 0;
 }
+
+static int ksz9031_center_flp_timing(struct phy_device *phydev)
+{
+       struct phy_driver *drv = phydev->drv;
+       int ret = 0;
+
+       if (!drv || !drv->writeext)
+               return -EOPNOTSUPP;
+
+       ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_LO, 0x1A80);
+       if (ret)
+               return ret;
+
+       ret = drv->writeext(phydev, 0, 0, MII_KSZ9031_FLP_BURST_TX_HI, 0x6);
+       return ret;
+}
 #else
 static int ksz9031_of_config(struct phy_device *phydev)
 {
        return 0;
 }
+static int ksz9031_center_flp_timing(struct phy_device *phydev)
+{
+       return 0;
+}
 #endif
 
 /* Accessors to extended registers*/
@@ -470,6 +490,9 @@ static int ksz9031_config(struct phy_device *phydev)
 {
        int ret;
        ret = ksz9031_of_config(phydev);
+       if (ret)
+               return ret;
+       ret = ksz9031_center_flp_timing(phydev);
        if (ret)
                return ret;
        return genphy_config(phydev);

diff --git a/include/micrel.h b/include/micrel.h
index e6d145d4b25eb5424339e4b5c4a1ae432ff7516f..3e6b5312d85a2f8f7edc488dbb54dbc76368d708 100644 (file)
--- a/include/micrel.h
+++ b/include/micrel.h
@@ -20,6 +20,9 @@
 #define MII_KSZ9031_EXT_RGMII_TX_DATA_SKEW     0x6
 #define MII_KSZ9031_EXT_RGMII_CLOCK_SKEW       0x8
 
+#define MII_KSZ9031_FLP_BURST_TX_LO            0x3
+#define MII_KSZ9031_FLP_BURST_TX_HI            0x4
+
 /* Registers */
 #define MMD_ACCESS_CONTROL     0xd
 #define MMD_ACCESS_REG_DATA    0xe