--- /dev/null
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi 2015-11-01 16:05:25.000000000 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw51xx.dtsi 2015-12-18 10:43:27.000000000 -0800
+@@ -174,6 +174,24 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
++&pwm4 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm4>; /* MX6_DIO3 */
++ status = "disabled";
++};
++
+ &uart1 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart1>;
+@@ -294,6 +312,24 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm4: pwm4grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_uart1: uart1grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD3_DAT7__UART1_TX_DATA 0x1b0b1
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-12-18 10:39:44.883158318 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw52xx.dtsi 2015-12-18 10:43:31.000000000 -0800
+@@ -282,6 +282,18 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+@@ -436,6 +448,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-12-18 10:39:44.883158318 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw53xx.dtsi 2015-12-18 10:43:27.000000000 -0800
+@@ -287,6 +287,18 @@
+ };
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+@@ -442,6 +454,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-12-18 10:39:44.883158318 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw54xx.dtsi 2015-12-18 10:43:27.000000000 -0800
+@@ -378,6 +378,24 @@
+ };
+ };
+
++&pwm1 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm1>; /* MX6_DIO0 */
++ status = "disabled";
++};
++
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &pwm4 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pwm4>;
+@@ -537,6 +555,24 @@
+ >;
+ };
+
++ pinctrl_pwm1: pwm1grp {
++ fsl,pins = <
++ MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_pwm4: pwm4grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD1_CMD__PWM4_OUT 0x1b0b1
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw551x.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw551x.dtsi 2015-11-01 16:05:25.000000000 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw551x.dtsi 2015-12-18 10:43:21.000000000 -0800
+@@ -198,6 +198,18 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &ssi1 {
+ status = "okay";
+ };
+@@ -290,6 +302,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1
+Index: linux-4.3/arch/arm/boot/dts/imx6qdl-gw552x.dtsi
+===================================================================
+--- linux-4.3.orig/arch/arm/boot/dts/imx6qdl-gw552x.dtsi 2015-11-01 16:05:25.000000000 -0800
++++ linux-4.3/arch/arm/boot/dts/imx6qdl-gw552x.dtsi 2015-12-18 10:43:21.000000000 -0800
+@@ -164,6 +164,18 @@
+ status = "okay";
+ };
+
++&pwm2 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm2>; /* MX6_DIO1 */
++ status = "disabled";
++};
++
++&pwm3 {
++ pinctrl-names = "default";
++ pinctrl-0 = <&pinctrl_pwm3>; /* MX6_DIO2 */
++ status = "disabled";
++};
++
+ &uart2 {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_uart2>;
+@@ -242,6 +254,18 @@
+ >;
+ };
+
++ pinctrl_pwm2: pwm2grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD1_DAT2__PWM2_OUT 0x1b0b1
++ >;
++ };
++
++ pinctrl_pwm3: pwm3grp {
++ fsl,pins = <
++ MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
++ >;
++ };
++
+ pinctrl_uart2: uart2grp {
+ fsl,pins = <
+ MX6QDL_PAD_SD4_DAT7__UART2_TX_DATA 0x1b0b1