drm/amd/powerplay: remove max DCEFCLK limitation
authorEvan Quan <evan.quan@amd.com>
Mon, 30 Jul 2018 06:01:00 +0000 (14:01 +0800)
committerAlex Deucher <alexander.deucher@amd.com>
Mon, 27 Aug 2018 16:10:37 +0000 (11:10 -0500)
The latest SMU fw removes the limitation that required
UCLK >= DCEFCLK.

Signed-off-by: Evan Quan <evan.quan@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/vega20_hwmgr.c

index 1170f233d9e2d254f97dda99d69eed0b902f0c0a..d7c4334da2509e30e7ad14ab84a42001cf3f490a 100644 (file)
@@ -1356,9 +1356,6 @@ static int vega20_init_max_sustainable_clocks(struct pp_hwmgr *hwmgr)
        if (max_sustainable_clocks->soc_clock < max_sustainable_clocks->uclock)
                max_sustainable_clocks->uclock = max_sustainable_clocks->soc_clock;
 
-       if (max_sustainable_clocks->uclock < max_sustainable_clocks->dcef_clock)
-               max_sustainable_clocks->dcef_clock = max_sustainable_clocks->uclock;
-
        return 0;
 }