DEFINE_SPINLOCK(mostek_lock);
DEFINE_SPINLOCK(rtc_lock);
-void * __iomem mstk48t02_regs = 0UL;
+void __iomem *mstk48t02_regs = NULL;
#ifdef CONFIG_PCI
unsigned long ds1287_regs = 0UL;
#endif
EXPORT_SYMBOL(jiffies_64);
-static void * __iomem mstk48t08_regs;
-static void * __iomem mstk48t59_regs;
+static void __iomem *mstk48t08_regs;
+static void __iomem *mstk48t59_regs;
static int set_rtc_mmss(unsigned long);
/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
static void __init kick_start_clock(void)
{
- void * __iomem regs = mstk48t02_regs;
+ void __iomem *regs = mstk48t02_regs;
u8 sec, tmp;
int i, count;
/* Return nonzero if the clock chip battery is low. */
static int __init has_low_battery(void)
{
- void * __iomem regs = mstk48t02_regs;
+ void __iomem *regs = mstk48t02_regs;
u8 data1, data2;
spin_lock_irq(&mostek_lock);
static void __init set_system_time(void)
{
unsigned int year, mon, day, hour, min, sec;
- void * __iomem mregs = mstk48t02_regs;
+ void __iomem *mregs = mstk48t02_regs;
#ifdef CONFIG_PCI
unsigned long dregs = ds1287_regs;
#else
!strcmp(model, "m5823")) {
ds1287_regs = edev->resource[0].start;
} else {
- mstk48t59_regs = (void * __iomem)
+ mstk48t59_regs = (void __iomem *)
edev->resource[0].start;
mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
}
!strcmp(model, "m5823")) {
ds1287_regs = isadev->resource.start;
} else {
- mstk48t59_regs = (void * __iomem)
+ mstk48t59_regs = (void __iomem *)
isadev->resource.start;
mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
}
}
if(model[5] == '0' && model[6] == '2') {
- mstk48t02_regs = (void * __iomem)
+ mstk48t02_regs = (void __iomem *)
(((u64)clk_reg[0].phys_addr) |
(((u64)clk_reg[0].which_io)<<32UL));
} else if(model[5] == '0' && model[6] == '8') {
- mstk48t08_regs = (void * __iomem)
+ mstk48t08_regs = (void __iomem *)
(((u64)clk_reg[0].phys_addr) |
(((u64)clk_reg[0].which_io)<<32UL));
mstk48t02_regs = mstk48t08_regs + MOSTEK_48T08_48T02;
} else {
- mstk48t59_regs = (void * __iomem)
+ mstk48t59_regs = (void __iomem *)
(((u64)clk_reg[0].phys_addr) |
(((u64)clk_reg[0].which_io)<<32UL));
mstk48t02_regs = mstk48t59_regs + MOSTEK_48T59_48T02;
static int set_rtc_mmss(unsigned long nowtime)
{
int real_seconds, real_minutes, chip_minutes;
- void * __iomem mregs = mstk48t02_regs;
+ void __iomem *mregs = mstk48t02_regs;
#ifdef CONFIG_PCI
unsigned long dregs = ds1287_regs;
#else
/* Retrieve the current date and time from the real time clock. */
static void get_rtc_time(struct rtc_time *t)
{
- void * __iomem regs = mstk48t02_regs;
+ void __iomem *regs = mstk48t02_regs;
u8 tmp;
spin_lock_irq(&mostek_lock);
/* Set the current date and time inthe real time clock. */
void set_rtc_time(struct rtc_time *t)
{
- void * __iomem regs = mstk48t02_regs;
+ void __iomem *regs = mstk48t02_regs;
u8 tmp;
spin_lock_irq(&mostek_lock);
/* It is possible we are being driven by some other RTC chip
* and thus another RTC driver is handling things.
*/
- if (mstk48t02_regs == 0)
+ if (!mstk48t02_regs)
return -ENODEV;
error = misc_register(&rtc_dev);
*
* We now deal with physical addresses for I/O to the chip. -DaveM
*/
-static __inline__ u8 mostek_read(void * __iomem addr)
+static __inline__ u8 mostek_read(void __iomem *addr)
{
u8 ret;
return ret;
}
-static __inline__ void mostek_write(void * __iomem addr, u8 val)
+static __inline__ void mostek_write(void __iomem *addr, u8 val)
{
__asm__ __volatile__("stba %0, [%1] %2"
: /* no outputs */
#define MOSTEK_YEAR 0x07ffUL
extern spinlock_t mostek_lock;
-extern void *__iomem mstk48t02_regs;
+extern void __iomem *mstk48t02_regs;
/* Control register values. */
#define MSTK_CREG_WRITE 0x80 /* Must set this before placing values. */