--- /dev/null
+Fix crash on cache flush with the MT_SMP variant
+
+Signed-off-by: Felix Fietkau <nbd@nbd.name>
+
+--- a/arch/mips/mm/c-r4k.c
++++ b/arch/mips/mm/c-r4k.c
+@@ -60,8 +60,10 @@ static inline void r4k_on_each_cpu(void
+ * to restrict that call when a CM is not present because both
+ * CM-based SMP protocols (CMP & CPS) restrict index-based cache ops.
+ */
++#ifndef CONFIG_MIPS_MT_SMP
+ if (!mips_cm_present())
+ smp_call_function_many(&cpu_foreign_map, func, info, 1);
++#endif
+ func(info);
+ preempt_enable();
+ }