e1000e: increase rx fifo size to 36K on 82574 and 82583
authorAlexander Duyck <alexander.h.duyck@intel.com>
Tue, 4 May 2010 22:25:42 +0000 (22:25 +0000)
committerDavid S. Miller <davem@davemloft.net>
Thu, 6 May 2010 04:15:31 +0000 (21:15 -0700)
This change increases the RX fifo size to 36K for standard frames and
decreases the TX fifo size to 4K.  The reason for this change is that on
slower systems the RX is much more likely to backfill and need space than
the TX is.  As long as the TX fifo is twice the size of the MTU we should
have more than enough TX fifo.

Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
drivers/net/e1000e/82571.c

index 17a25e19bbba5bd90b6c7f51d1c8095fdf403b25..1e73eddee24a6dc18bb076630f2457f75e8dd845 100644 (file)
@@ -1845,7 +1845,7 @@ struct e1000_info e1000_82574_info = {
                                  | FLAG_HAS_SMART_POWER_DOWN
                                  | FLAG_HAS_AMT
                                  | FLAG_HAS_CTRLEXT_ON_LOAD,
-       .pba                    = 20,
+       .pba                    = 36,
        .max_hw_frame_size      = DEFAULT_JUMBO,
        .get_variants           = e1000_get_variants_82571,
        .mac_ops                = &e82571_mac_ops,
@@ -1862,7 +1862,7 @@ struct e1000_info e1000_82583_info = {
                                  | FLAG_HAS_SMART_POWER_DOWN
                                  | FLAG_HAS_AMT
                                  | FLAG_HAS_CTRLEXT_ON_LOAD,
-       .pba                    = 20,
+       .pba                    = 36,
        .max_hw_frame_size      = ETH_FRAME_LEN + ETH_FCS_LEN,
        .get_variants           = e1000_get_variants_82571,
        .mac_ops                = &e82571_mac_ops,