debugfs_create_x32("storm_rate_bc", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL838X_STORM_CTRL_PORT_BC(port)));
-
- debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
- (u32 *)(RTL838X_SW_BASE + RTL838X_VLAN_PORT_TAG_STS_CTRL
- + (port << 2)));
} else {
debugfs_create_x32("storm_rate_uc", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_UC_0(port)));
debugfs_create_x32("storm_rate_bc", 0644, port_dir,
(u32 *)(RTL838X_SW_BASE + RTL839X_STORM_CTRL_PORT_BC_0(port)));
-
- debugfs_create_x32("vlan_port_tag_sts_ctrl", 0644, port_dir,
- (u32 *)(RTL838X_SW_BASE + RTL839X_VLAN_PORT_TAG_STS_CTRL
- + (port << 2)));
}
debugfs_create_u32("id", 0444, port_dir, (u32 *)&priv->ports[port].dp->index);
priv->ports[port].enable = true;
/* enable inner tagging on egress, do not keep any tags */
- if (priv->family_id == RTL9310_FAMILY_ID)
- sw_w32(BIT(4), priv->r->vlan_port_tag_sts_ctrl + (port << 2));
- else
- sw_w32(1, priv->r->vlan_port_tag_sts_ctrl + (port << 2));
+ priv->r->vlan_port_keep_tag_set(port, 0, 1);
if (dsa_is_cpu_port(ds, port))
return 0;
#include "rtl83xx.h"
+#define RTL838X_VLAN_PORT_TAG_STS_UNTAG 0x0
+#define RTL838X_VLAN_PORT_TAG_STS_TAGGED 0x1
+#define RTL838X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x2
+
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE 0xA530
+/* port 0-28 */
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL(port) \
+ RTL838X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
+
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(11,10)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(9,8)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(7,6)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(5,4)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(3,2)
+#define RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(1,0)
+
extern struct mutex smi_lock;
// see_dal_maple_acl_log2PhyTmplteField and src/app/diag_v2/src/diag_acl.c
return 0;
}
+void rtl838x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+ sw_w32(FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
+ keep_outer ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG) |
+ FIELD_PREP(RTL838X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
+ keep_inner ? RTL838X_VLAN_PORT_TAG_STS_TAGGED : RTL838X_VLAN_PORT_TAG_STS_UNTAG),
+ RTL838X_VLAN_PORT_TAG_STS_CTRL(port));
+}
+
void rtl838x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{
if (type == PBVLAN_TYPE_INNER)
.write_l2_entry_using_hash = rtl838x_write_l2_entry_using_hash,
.read_cam = rtl838x_read_cam,
.write_cam = rtl838x_write_cam,
- .vlan_port_tag_sts_ctrl = RTL838X_VLAN_PORT_TAG_STS_CTRL,
+ .vlan_port_keep_tag_set = rtl838x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl838x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl838x_vlan_port_pvid_set,
.trk_mbr_ctr = rtl838x_trk_mbr_ctr,
#define RTL838X_VLAN_PORT_EGR_FLTR (0x3A84)
#define RTL838X_VLAN_PORT_PB_VLAN (0x3C00)
#define RTL838X_VLAN_PORT_IGR_FLTR (0x3A7C)
-#define RTL838X_VLAN_PORT_TAG_STS_CTRL (0xA530)
#define RTL839X_VLAN_PROFILE(idx) (0x25C0 + (((idx) << 3)))
#define RTL839X_VLAN_CTRL (0x26D4)
#define RTL839X_VLAN_PORT_PB_VLAN (0x26D8)
#define RTL839X_VLAN_PORT_IGR_FLTR (0x27B4)
#define RTL839X_VLAN_PORT_EGR_FLTR (0x27C4)
-#define RTL839X_VLAN_PORT_TAG_STS_CTRL (0x6828)
-#define RTL839X_VLAN_PORT_TAG_STS_CTRL (0x6828)
#define RTL930X_VLAN_PROFILE_SET(idx) (0x9c60 + (((idx) * 20)))
#define RTL930X_VLAN_CTRL (0x82D4)
#define RTL930X_VLAN_PORT_PB_VLAN (0x82D8)
#define RTL930X_VLAN_PORT_IGR_FLTR (0x83C0)
#define RTL930X_VLAN_PORT_EGR_FLTR (0x83C8)
-#define RTL930X_VLAN_PORT_TAG_STS_CTRL (0xCE24)
#define RTL931X_VLAN_PROFILE_SET(idx) (0x9800 + (((idx) * 28)))
#define RTL931X_VLAN_CTRL (0x94E4)
#define RTL931X_VLAN_PORT_IGR_CTRL (0x94E8)
#define RTL931X_VLAN_PORT_IGR_FLTR (0x96B4)
#define RTL931X_VLAN_PORT_EGR_FLTR (0x96C4)
-#define RTL931X_VLAN_PORT_TAG_CTRL (0x4860)
/* Table access registers */
#define RTL838X_TBL_ACCESS_CTRL_0 (0x6914)
void (*vlan_profile_setup)(int profile);
void (*vlan_port_pvidmode_set)(int port, enum pbvlan_type type, enum pbvlan_mode mode);
void (*vlan_port_pvid_set)(int port, enum pbvlan_type type, int pvid);
+ void (*vlan_port_keep_tag_set)(int port, bool keep_outer, bool keep_inner);
void (*set_vlan_igr_filter)(int port, enum igr_filter state);
void (*set_vlan_egr_filter)(int port, enum egr_filter state);
void (*enable_learning)(int port, bool enable);
void (*write_l2_entry_using_hash)(u32 hash, u32 pos, struct rtl838x_l2_entry *e);
u64 (*read_cam)(int idx, struct rtl838x_l2_entry *e);
void (*write_cam)(int idx, struct rtl838x_l2_entry *e);
- int vlan_port_tag_sts_ctrl;
- int (*rtl838x_vlan_port_tag_sts_ctrl)(int port);
int (*trk_mbr_ctr)(int group);
int rma_bpdu_fld_pmask;
int spcl_trap_eapol_ctrl;
#include <asm/mach-rtl838x/mach-rtl83xx.h>
#include "rtl83xx.h"
+#define RTL839X_VLAN_PORT_TAG_STS_UNTAG 0x0
+#define RTL839X_VLAN_PORT_TAG_STS_TAGGED 0x1
+#define RTL839X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x2
+
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE 0x6828
+/* port 0-52 */
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL(port) \
+ RTL839X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK GENMASK(7,6)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK GENMASK(5,4)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1)
+#define RTL839X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0)
+
extern struct mutex smi_lock;
extern struct rtl83xx_soc_info soc_info;
return 0;
}
+void rtl839x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+ sw_w32(FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_OTAG_STS_MASK,
+ keep_outer ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG) |
+ FIELD_PREP(RTL839X_VLAN_PORT_TAG_STS_CTRL_ITAG_STS_MASK,
+ keep_inner ? RTL839X_VLAN_PORT_TAG_STS_TAGGED : RTL839X_VLAN_PORT_TAG_STS_UNTAG),
+ RTL839X_VLAN_PORT_TAG_STS_CTRL(port));
+}
+
void rtl839x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{
if (type == PBVLAN_TYPE_INNER)
.vlan_profile_dump = rtl839x_vlan_profile_dump,
.vlan_profile_setup = rtl839x_vlan_profile_setup,
.vlan_fwd_on_inner = rtl839x_vlan_fwd_on_inner,
+ .vlan_port_keep_tag_set = rtl839x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl839x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl839x_vlan_port_pvid_set,
.set_vlan_igr_filter = rtl839x_set_igr_filter,
.write_l2_entry_using_hash = rtl839x_write_l2_entry_using_hash,
.read_cam = rtl839x_read_cam,
.write_cam = rtl839x_write_cam,
- .vlan_port_tag_sts_ctrl = RTL839X_VLAN_PORT_TAG_STS_CTRL,
.trk_mbr_ctr = rtl839x_trk_mbr_ctr,
.rma_bpdu_fld_pmask = RTL839X_RMA_BPDU_FLD_PMSK,
.spcl_trap_eapol_ctrl = RTL839X_SPCL_TRAP_EAPOL_CTRL,
#include "rtl83xx.h"
+#define RTL930X_VLAN_PORT_TAG_STS_INTERNAL 0x0
+#define RTL930X_VLAN_PORT_TAG_STS_UNTAG 0x1
+#define RTL930X_VLAN_PORT_TAG_STS_TAGGED 0x2
+#define RTL930X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x3
+
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE 0xCE24
+/* port 0-28 */
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL(port) \
+ RTL930X_VLAN_PORT_TAG_STS_CTRL_BASE + (port << 2)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK GENMASK(7,6)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK GENMASK(5,4)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_OTAG_KEEP_MASK GENMASK(3,3)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_P_ITAG_KEEP_MASK GENMASK(2,2)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_OTAG_KEEP_MASK GENMASK(1,1)
+#define RTL930X_VLAN_PORT_TAG_STS_CTRL_IGR_P_ITAG_KEEP_MASK GENMASK(0,0)
+
extern struct mutex smi_lock;
extern struct rtl83xx_soc_info soc_info;
rtl_table_release(r);
}
+void rtl930x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+ sw_w32(FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_OTAG_STS_MASK,
+ keep_outer ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG) |
+ FIELD_PREP(RTL930X_VLAN_PORT_TAG_STS_CTRL_EGR_ITAG_STS_MASK,
+ keep_inner ? RTL930X_VLAN_PORT_TAG_STS_TAGGED : RTL930X_VLAN_PORT_TAG_STS_UNTAG),
+ RTL930X_VLAN_PORT_TAG_STS_CTRL(port));
+}
+
void rtl930x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{
if (type == PBVLAN_TYPE_INNER)
.write_l2_entry_using_hash = rtl930x_write_l2_entry_using_hash,
.read_cam = rtl930x_read_cam,
.write_cam = rtl930x_write_cam,
- .vlan_port_tag_sts_ctrl = RTL930X_VLAN_PORT_TAG_STS_CTRL,
+ .vlan_port_keep_tag_set = rtl930x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl930x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl930x_vlan_port_pvid_set,
.trk_mbr_ctr = rtl930x_trk_mbr_ctr,
#include <asm/mach-rtl838x/mach-rtl83xx.h>
#include "rtl83xx.h"
+#define RTL931X_VLAN_PORT_TAG_STS_INTERNAL 0x0
+#define RTL931X_VLAN_PORT_TAG_STS_UNTAG 0x1
+#define RTL931X_VLAN_PORT_TAG_STS_TAGGED 0x2
+#define RTL931X_VLAN_PORT_TAG_STS_PRIORITY_TAGGED 0x3
+
+#define RTL931X_VLAN_PORT_TAG_CTRL_BASE 0x4860
+/* port 0-56 */
+#define RTL931X_VLAN_PORT_TAG_CTRL(port) \
+ RTL931X_VLAN_PORT_TAG_CTRL_BASE + (port << 2)
+#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK GENMASK(13,12)
+#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK GENMASK(11,10)
+#define RTL931X_VLAN_PORT_TAG_EGR_OTAG_KEEP_MASK GENMASK(9,9)
+#define RTL931X_VLAN_PORT_TAG_EGR_ITAG_KEEP_MASK GENMASK(8,8)
+#define RTL931X_VLAN_PORT_TAG_IGR_OTAG_KEEP_MASK GENMASK(7,7)
+#define RTL931X_VLAN_PORT_TAG_IGR_ITAG_KEEP_MASK GENMASK(6,6)
+#define RTL931X_VLAN_PORT_TAG_OTPID_IDX_MASK GENMASK(5,4)
+#define RTL931X_VLAN_PORT_TAG_OTPID_KEEP_MASK GENMASK(3,3)
+#define RTL931X_VLAN_PORT_TAG_ITPID_IDX_MASK GENMASK(2,1)
+#define RTL931X_VLAN_PORT_TAG_ITPID_KEEP_MASK GENMASK(0,0)
+
extern struct mutex smi_lock;
extern struct rtl83xx_soc_info soc_info;
return 0;
}
+void rtl931x_vlan_port_keep_tag_set(int port, bool keep_outer, bool keep_inner)
+{
+ sw_w32(FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_OTAG_STS_MASK,
+ keep_outer ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG) |
+ FIELD_PREP(RTL931X_VLAN_PORT_TAG_EGR_ITAG_STS_MASK,
+ keep_inner ? RTL931X_VLAN_PORT_TAG_STS_TAGGED : RTL931X_VLAN_PORT_TAG_STS_UNTAG),
+ RTL931X_VLAN_PORT_TAG_CTRL(port));
+}
+
void rtl931x_vlan_port_pvidmode_set(int port, enum pbvlan_type type, enum pbvlan_mode mode)
{
if (type == PBVLAN_TYPE_INNER)
.write_l2_entry_using_hash = rtl931x_write_l2_entry_using_hash,
.read_cam = rtl931x_read_cam,
.write_cam = rtl931x_write_cam,
- .vlan_port_tag_sts_ctrl = RTL931X_VLAN_PORT_TAG_CTRL,
+ .vlan_port_keep_tag_set = rtl931x_vlan_port_keep_tag_set,
.vlan_port_pvidmode_set = rtl931x_vlan_port_pvidmode_set,
.vlan_port_pvid_set = rtl931x_vlan_port_pvid_set,
.trk_mbr_ctr = rtl931x_trk_mbr_ctr,