drm/nouveau/disp/gp102: rename from gp104
authorBen Skeggs <bskeggs@redhat.com>
Wed, 16 Nov 2016 05:03:07 +0000 (15:03 +1000)
committerBen Skeggs <bskeggs@redhat.com>
Wed, 16 Nov 2016 23:50:39 +0000 (09:50 +1000)
Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
20 files changed:
drivers/gpu/drm/nouveau/include/nvif/class.h
drivers/gpu/drm/nouveau/include/nvkm/engine/disp.h
drivers/gpu/drm/nouveau/nouveau_display.c
drivers/gpu/drm/nouveau/nv50_display.c
drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
drivers/gpu/drm/nouveau/nvkm/engine/disp/Kbuild
drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp104.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp102.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp104.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp104.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacnv50.h
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/disp/gp104.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp102.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp104.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c [new file with mode: 0644]
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp104.c [deleted file]
drivers/gpu/drm/nouveau/nvkm/engine/disp/rootnv50.h

index e6e9537537cf96e7eba26b32b44f6ed600e8b87e..82235f30277c7b99bdd222e53af3f8128b20eb75 100644 (file)
@@ -52,7 +52,7 @@
 #define GM107_DISP                                    /* cl5070.h */ 0x00009470
 #define GM200_DISP                                    /* cl5070.h */ 0x00009570
 #define GP100_DISP                                    /* cl5070.h */ 0x00009770
-#define GP104_DISP                                    /* cl5070.h */ 0x00009870
+#define GP102_DISP                                    /* cl5070.h */ 0x00009870
 
 #define NV31_MPEG                                                    0x00003174
 #define G82_MPEG                                                     0x00008274
@@ -90,7 +90,7 @@
 #define GM107_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000947d
 #define GM200_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000957d
 #define GP100_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000977d
-#define GP104_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000987d
+#define GP102_DISP_CORE_CHANNEL_DMA                   /* cl507d.h */ 0x0000987d
 
 #define NV50_DISP_OVERLAY_CHANNEL_DMA                 /* cl507e.h */ 0x0000507e
 #define G82_DISP_OVERLAY_CHANNEL_DMA                  /* cl507e.h */ 0x0000827e
index e82049667ce495f534921611d0ef55e9aea454be..970ae753968a620a95ba9d8453248b03228f5122 100644 (file)
@@ -33,5 +33,5 @@ int gk110_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
 int gm107_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
 int gm200_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
 int gp100_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
-int gp104_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
+int gp102_disp_new(struct nvkm_device *, int, struct nvkm_disp **);
 #endif
index 009a6f53d55ab542336492a4c409d0dee945b0bb..37839d6afabcecd8f7cce21533b8d7a16b3a3916 100644 (file)
@@ -538,7 +538,7 @@ nouveau_display_create(struct drm_device *dev)
 
        if (nouveau_modeset != 2 && drm->vbios.dcb.entries) {
                static const u16 oclass[] = {
-                       GP104_DISP,
+                       GP102_DISP,
                        GP100_DISP,
                        GM200_DISP,
                        GM107_DISP,
index 88918055224a57165834ee016d1b7b6eab9d061b..22a8b70a4d1e24e3751849b722bd3e86573ffd0b 100644 (file)
@@ -574,7 +574,7 @@ nv50_core_create(struct nvif_device *device, struct nvif_object *disp,
                .pushbuf = 0xb0007d00,
        };
        static const s32 oclass[] = {
-               GP104_DISP_CORE_CHANNEL_DMA,
+               GP102_DISP_CORE_CHANNEL_DMA,
                GP100_DISP_CORE_CHANNEL_DMA,
                GM200_DISP_CORE_CHANNEL_DMA,
                GM107_DISP_CORE_CHANNEL_DMA,
index 62b13b52e75a3a19e064f82354ba540c2770a364..2cbcffe78c3e4e3346fecb367ea87bb647a557cc 100644 (file)
@@ -2207,7 +2207,7 @@ nv132_chipset = {
        .ce[1] = gp102_ce_new,
        .ce[2] = gp102_ce_new,
        .ce[3] = gp102_ce_new,
-       .disp = gp104_disp_new,
+       .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
 };
@@ -2236,7 +2236,7 @@ nv134_chipset = {
        .ce[1] = gp102_ce_new,
        .ce[2] = gp102_ce_new,
        .ce[3] = gp102_ce_new,
-       .disp = gp104_disp_new,
+       .disp = gp102_disp_new,
        .dma = gf119_dma_new,
        .fifo = gp100_fifo_new,
 };
index 70f0344c508c825038bcb5fc7759f6a94eed6485..fa05d16ae948453753eb1dfc43bd30cd79fbd3c5 100644 (file)
@@ -11,7 +11,7 @@ nvkm-y += nvkm/engine/disp/gk110.o
 nvkm-y += nvkm/engine/disp/gm107.o
 nvkm-y += nvkm/engine/disp/gm200.o
 nvkm-y += nvkm/engine/disp/gp100.o
-nvkm-y += nvkm/engine/disp/gp104.o
+nvkm-y += nvkm/engine/disp/gp102.o
 
 nvkm-y += nvkm/engine/disp/outp.o
 nvkm-y += nvkm/engine/disp/outpdp.o
@@ -48,14 +48,14 @@ nvkm-y += nvkm/engine/disp/rootgk110.o
 nvkm-y += nvkm/engine/disp/rootgm107.o
 nvkm-y += nvkm/engine/disp/rootgm200.o
 nvkm-y += nvkm/engine/disp/rootgp100.o
-nvkm-y += nvkm/engine/disp/rootgp104.o
+nvkm-y += nvkm/engine/disp/rootgp102.o
 
 nvkm-y += nvkm/engine/disp/channv50.o
 nvkm-y += nvkm/engine/disp/changf119.o
 
 nvkm-y += nvkm/engine/disp/dmacnv50.o
 nvkm-y += nvkm/engine/disp/dmacgf119.o
-nvkm-y += nvkm/engine/disp/dmacgp104.o
+nvkm-y += nvkm/engine/disp/dmacgp102.o
 
 nvkm-y += nvkm/engine/disp/basenv50.o
 nvkm-y += nvkm/engine/disp/baseg84.o
@@ -64,7 +64,7 @@ nvkm-y += nvkm/engine/disp/basegt215.o
 nvkm-y += nvkm/engine/disp/basegf119.o
 nvkm-y += nvkm/engine/disp/basegk104.o
 nvkm-y += nvkm/engine/disp/basegk110.o
-nvkm-y += nvkm/engine/disp/basegp104.o
+nvkm-y += nvkm/engine/disp/basegp102.o
 
 nvkm-y += nvkm/engine/disp/corenv50.o
 nvkm-y += nvkm/engine/disp/coreg84.o
@@ -77,7 +77,7 @@ nvkm-y += nvkm/engine/disp/coregk110.o
 nvkm-y += nvkm/engine/disp/coregm107.o
 nvkm-y += nvkm/engine/disp/coregm200.o
 nvkm-y += nvkm/engine/disp/coregp100.o
-nvkm-y += nvkm/engine/disp/coregp104.o
+nvkm-y += nvkm/engine/disp/coregp102.o
 
 nvkm-y += nvkm/engine/disp/ovlynv50.o
 nvkm-y += nvkm/engine/disp/ovlyg84.o
@@ -85,7 +85,7 @@ nvkm-y += nvkm/engine/disp/ovlygt200.o
 nvkm-y += nvkm/engine/disp/ovlygt215.o
 nvkm-y += nvkm/engine/disp/ovlygf119.o
 nvkm-y += nvkm/engine/disp/ovlygk104.o
-nvkm-y += nvkm/engine/disp/ovlygp104.o
+nvkm-y += nvkm/engine/disp/ovlygp102.o
 
 nvkm-y += nvkm/engine/disp/piocnv50.o
 nvkm-y += nvkm/engine/disp/piocgf119.o
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp102.c
new file mode 100644 (file)
index 0000000..8a3cdee
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "dmacnv50.h"
+#include "rootnv50.h"
+
+#include <nvif/class.h>
+
+const struct nv50_disp_dmac_oclass
+gp102_disp_base_oclass = {
+       .base.oclass = GK110_DISP_BASE_CHANNEL_DMA,
+       .base.minver = 0,
+       .base.maxver = 0,
+       .ctor = nv50_disp_base_new,
+       .func = &gp102_disp_dmac_func,
+       .mthd = &gf119_disp_base_chan_mthd,
+       .chid = 1,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/basegp104.c
deleted file mode 100644 (file)
index 51688e3..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright 2016 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
-
-const struct nv50_disp_dmac_oclass
-gp104_disp_base_oclass = {
-       .base.oclass = GK110_DISP_BASE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_base_new,
-       .func = &gp104_disp_dmac_func,
-       .mthd = &gf119_disp_base_chan_mthd,
-       .chid = 1,
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp102.c
new file mode 100644 (file)
index 0000000..b0df4b7
--- /dev/null
@@ -0,0 +1,78 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "dmacnv50.h"
+#include "rootnv50.h"
+
+#include <subdev/timer.h>
+
+#include <nvif/class.h>
+
+static int
+gp102_disp_core_init(struct nv50_disp_dmac *chan)
+{
+       struct nv50_disp *disp = chan->base.root->disp;
+       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
+       struct nvkm_device *device = subdev->device;
+
+       /* enable error reporting */
+       nvkm_mask(device, 0x6100a0, 0x00000001, 0x00000001);
+
+       /* initialise channel for dma command submission */
+       nvkm_wr32(device, 0x611494, chan->push);
+       nvkm_wr32(device, 0x611498, 0x00010000);
+       nvkm_wr32(device, 0x61149c, 0x00000001);
+       nvkm_mask(device, 0x610490, 0x00000010, 0x00000010);
+       nvkm_wr32(device, 0x640000, 0x00000000);
+       nvkm_wr32(device, 0x610490, 0x01000013);
+
+       /* wait for it to go inactive */
+       if (nvkm_msec(device, 2000,
+               if (!(nvkm_rd32(device, 0x610490) & 0x80000000))
+                       break;
+       ) < 0) {
+               nvkm_error(subdev, "core init: %08x\n",
+                          nvkm_rd32(device, 0x610490));
+               return -EBUSY;
+       }
+
+       return 0;
+}
+
+static const struct nv50_disp_dmac_func
+gp102_disp_core_func = {
+       .init = gp102_disp_core_init,
+       .fini = gf119_disp_core_fini,
+       .bind = gf119_disp_dmac_bind,
+};
+
+const struct nv50_disp_dmac_oclass
+gp102_disp_core_oclass = {
+       .base.oclass = GP102_DISP_CORE_CHANNEL_DMA,
+       .base.minver = 0,
+       .base.maxver = 0,
+       .ctor = nv50_disp_core_new,
+       .func = &gp102_disp_core_func,
+       .mthd = &gk104_disp_core_chan_mthd,
+       .chid = 0,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/coregp104.c
deleted file mode 100644 (file)
index e356f87..0000000
+++ /dev/null
@@ -1,78 +0,0 @@
-/*
- * Copyright 2016 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <subdev/timer.h>
-
-#include <nvif/class.h>
-
-static int
-gp104_disp_core_init(struct nv50_disp_dmac *chan)
-{
-       struct nv50_disp *disp = chan->base.root->disp;
-       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
-       struct nvkm_device *device = subdev->device;
-
-       /* enable error reporting */
-       nvkm_mask(device, 0x6100a0, 0x00000001, 0x00000001);
-
-       /* initialise channel for dma command submission */
-       nvkm_wr32(device, 0x611494, chan->push);
-       nvkm_wr32(device, 0x611498, 0x00010000);
-       nvkm_wr32(device, 0x61149c, 0x00000001);
-       nvkm_mask(device, 0x610490, 0x00000010, 0x00000010);
-       nvkm_wr32(device, 0x640000, 0x00000000);
-       nvkm_wr32(device, 0x610490, 0x01000013);
-
-       /* wait for it to go inactive */
-       if (nvkm_msec(device, 2000,
-               if (!(nvkm_rd32(device, 0x610490) & 0x80000000))
-                       break;
-       ) < 0) {
-               nvkm_error(subdev, "core init: %08x\n",
-                          nvkm_rd32(device, 0x610490));
-               return -EBUSY;
-       }
-
-       return 0;
-}
-
-static const struct nv50_disp_dmac_func
-gp104_disp_core_func = {
-       .init = gp104_disp_core_init,
-       .fini = gf119_disp_core_fini,
-       .bind = gf119_disp_dmac_bind,
-};
-
-const struct nv50_disp_dmac_oclass
-gp104_disp_core_oclass = {
-       .base.oclass = GP104_DISP_CORE_CHANNEL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_core_new,
-       .func = &gp104_disp_core_func,
-       .mthd = &gk104_disp_core_chan_mthd,
-       .chid = 0,
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp102.c
new file mode 100644 (file)
index 0000000..cdead95
--- /dev/null
@@ -0,0 +1,67 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "dmacnv50.h"
+#include "rootnv50.h"
+
+#include <subdev/timer.h>
+
+static int
+gp102_disp_dmac_init(struct nv50_disp_dmac *chan)
+{
+       struct nv50_disp *disp = chan->base.root->disp;
+       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
+       struct nvkm_device *device = subdev->device;
+       int ctrl = chan->base.chid.ctrl;
+       int user = chan->base.chid.user;
+
+       /* enable error reporting */
+       nvkm_mask(device, 0x6100a0, 0x00000001 << user, 0x00000001 << user);
+
+       /* initialise channel for dma command submission */
+       nvkm_wr32(device, 0x611494 + (ctrl * 0x0010), chan->push);
+       nvkm_wr32(device, 0x611498 + (ctrl * 0x0010), 0x00010000);
+       nvkm_wr32(device, 0x61149c + (ctrl * 0x0010), 0x00000001);
+       nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00000010, 0x00000010);
+       nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), 0x00000000);
+       nvkm_wr32(device, 0x610490 + (ctrl * 0x0010), 0x00000013);
+
+       /* wait for it to go inactive */
+       if (nvkm_msec(device, 2000,
+               if (!(nvkm_rd32(device, 0x610490 + (ctrl * 0x10)) & 0x80000000))
+                       break;
+       ) < 0) {
+               nvkm_error(subdev, "ch %d init: %08x\n", user,
+                          nvkm_rd32(device, 0x610490 + (ctrl * 0x10)));
+               return -EBUSY;
+       }
+
+       return 0;
+}
+
+const struct nv50_disp_dmac_func
+gp102_disp_dmac_func = {
+       .init = gp102_disp_dmac_init,
+       .fini = gf119_disp_dmac_fini,
+       .bind = gf119_disp_dmac_bind,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/dmacgp104.c
deleted file mode 100644 (file)
index d26d3b4..0000000
+++ /dev/null
@@ -1,67 +0,0 @@
-/*
- * Copyright 2016 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <subdev/timer.h>
-
-static int
-gp104_disp_dmac_init(struct nv50_disp_dmac *chan)
-{
-       struct nv50_disp *disp = chan->base.root->disp;
-       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
-       struct nvkm_device *device = subdev->device;
-       int ctrl = chan->base.chid.ctrl;
-       int user = chan->base.chid.user;
-
-       /* enable error reporting */
-       nvkm_mask(device, 0x6100a0, 0x00000001 << user, 0x00000001 << user);
-
-       /* initialise channel for dma command submission */
-       nvkm_wr32(device, 0x611494 + (ctrl * 0x0010), chan->push);
-       nvkm_wr32(device, 0x611498 + (ctrl * 0x0010), 0x00010000);
-       nvkm_wr32(device, 0x61149c + (ctrl * 0x0010), 0x00000001);
-       nvkm_mask(device, 0x610490 + (ctrl * 0x0010), 0x00000010, 0x00000010);
-       nvkm_wr32(device, 0x640000 + (ctrl * 0x1000), 0x00000000);
-       nvkm_wr32(device, 0x610490 + (ctrl * 0x0010), 0x00000013);
-
-       /* wait for it to go inactive */
-       if (nvkm_msec(device, 2000,
-               if (!(nvkm_rd32(device, 0x610490 + (ctrl * 0x10)) & 0x80000000))
-                       break;
-       ) < 0) {
-               nvkm_error(subdev, "ch %d init: %08x\n", user,
-                          nvkm_rd32(device, 0x610490 + (ctrl * 0x10)));
-               return -EBUSY;
-       }
-
-       return 0;
-}
-
-const struct nv50_disp_dmac_func
-gp104_disp_dmac_func = {
-       .init = gp104_disp_dmac_init,
-       .fini = gf119_disp_dmac_fini,
-       .bind = gf119_disp_dmac_bind,
-};
index 43ac0585785375423c3d287779fd910f55461469..ea4a0d062e314fc799a9d71e90fd9d4939a23327 100644 (file)
@@ -30,7 +30,7 @@ int gf119_disp_dmac_bind(struct nv50_disp_dmac *, struct nvkm_object *, u32);
 extern const struct nv50_disp_dmac_func gf119_disp_core_func;
 void gf119_disp_core_fini(struct nv50_disp_dmac *);
 
-extern const struct nv50_disp_dmac_func gp104_disp_dmac_func;
+extern const struct nv50_disp_dmac_func gp102_disp_dmac_func;
 
 struct nv50_disp_dmac_oclass {
        int (*ctor)(const struct nv50_disp_dmac_func *,
@@ -95,7 +95,7 @@ extern const struct nv50_disp_dmac_oclass gm200_disp_core_oclass;
 
 extern const struct nv50_disp_dmac_oclass gp100_disp_core_oclass;
 
-extern const struct nv50_disp_dmac_oclass gp104_disp_core_oclass;
-extern const struct nv50_disp_dmac_oclass gp104_disp_base_oclass;
-extern const struct nv50_disp_dmac_oclass gp104_disp_ovly_oclass;
+extern const struct nv50_disp_dmac_oclass gp102_disp_core_oclass;
+extern const struct nv50_disp_dmac_oclass gp102_disp_base_oclass;
+extern const struct nv50_disp_dmac_oclass gp102_disp_ovly_oclass;
 #endif
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp102.c
new file mode 100644 (file)
index 0000000..f5d613f
--- /dev/null
@@ -0,0 +1,81 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "nv50.h"
+#include "rootnv50.h"
+
+static void
+gp102_disp_intr_error(struct nv50_disp *disp, int chid)
+{
+       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
+       struct nvkm_device *device = subdev->device;
+       u32 mthd = nvkm_rd32(device, 0x6111f0 + (chid * 12));
+       u32 data = nvkm_rd32(device, 0x6111f4 + (chid * 12));
+       u32 unkn = nvkm_rd32(device, 0x6111f8 + (chid * 12));
+
+       nvkm_error(subdev, "chid %d mthd %04x data %08x %08x %08x\n",
+                  chid, (mthd & 0x0000ffc), data, mthd, unkn);
+
+       if (chid < ARRAY_SIZE(disp->chan)) {
+               switch (mthd & 0xffc) {
+               case 0x0080:
+                       nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
+                       break;
+               default:
+                       break;
+               }
+       }
+
+       nvkm_wr32(device, 0x61009c, (1 << chid));
+       nvkm_wr32(device, 0x6111f0 + (chid * 12), 0x90000000);
+}
+
+static const struct nv50_disp_func
+gp102_disp = {
+       .intr = gf119_disp_intr,
+       .intr_error = gp102_disp_intr_error,
+       .uevent = &gf119_disp_chan_uevent,
+       .super = gf119_disp_intr_supervisor,
+       .root = &gp102_disp_root_oclass,
+       .head.vblank_init = gf119_disp_vblank_init,
+       .head.vblank_fini = gf119_disp_vblank_fini,
+       .head.scanoutpos = gf119_disp_root_scanoutpos,
+       .outp.internal.crt = nv50_dac_output_new,
+       .outp.internal.tmds = nv50_sor_output_new,
+       .outp.internal.lvds = nv50_sor_output_new,
+       .outp.internal.dp = gm200_sor_dp_new,
+       .dac.nr = 3,
+       .dac.power = nv50_dac_power,
+       .dac.sense = nv50_dac_sense,
+       .sor.nr = 4,
+       .sor.power = nv50_sor_power,
+       .sor.hda_eld = gf119_hda_eld,
+       .sor.hdmi = gk104_hdmi_ctrl,
+       .sor.magic = gm200_sor_magic,
+};
+
+int
+gp102_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
+{
+       return gf119_disp_new_(&gp102_disp, device, index, pdisp);
+}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/gp104.c
deleted file mode 100644 (file)
index 3bf3380..0000000
+++ /dev/null
@@ -1,81 +0,0 @@
-/*
- * Copyright 2016 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "nv50.h"
-#include "rootnv50.h"
-
-static void
-gp104_disp_intr_error(struct nv50_disp *disp, int chid)
-{
-       struct nvkm_subdev *subdev = &disp->base.engine.subdev;
-       struct nvkm_device *device = subdev->device;
-       u32 mthd = nvkm_rd32(device, 0x6111f0 + (chid * 12));
-       u32 data = nvkm_rd32(device, 0x6111f4 + (chid * 12));
-       u32 unkn = nvkm_rd32(device, 0x6111f8 + (chid * 12));
-
-       nvkm_error(subdev, "chid %d mthd %04x data %08x %08x %08x\n",
-                  chid, (mthd & 0x0000ffc), data, mthd, unkn);
-
-       if (chid < ARRAY_SIZE(disp->chan)) {
-               switch (mthd & 0xffc) {
-               case 0x0080:
-                       nv50_disp_chan_mthd(disp->chan[chid], NV_DBG_ERROR);
-                       break;
-               default:
-                       break;
-               }
-       }
-
-       nvkm_wr32(device, 0x61009c, (1 << chid));
-       nvkm_wr32(device, 0x6111f0 + (chid * 12), 0x90000000);
-}
-
-static const struct nv50_disp_func
-gp104_disp = {
-       .intr = gf119_disp_intr,
-       .intr_error = gp104_disp_intr_error,
-       .uevent = &gf119_disp_chan_uevent,
-       .super = gf119_disp_intr_supervisor,
-       .root = &gp104_disp_root_oclass,
-       .head.vblank_init = gf119_disp_vblank_init,
-       .head.vblank_fini = gf119_disp_vblank_fini,
-       .head.scanoutpos = gf119_disp_root_scanoutpos,
-       .outp.internal.crt = nv50_dac_output_new,
-       .outp.internal.tmds = nv50_sor_output_new,
-       .outp.internal.lvds = nv50_sor_output_new,
-       .outp.internal.dp = gm200_sor_dp_new,
-       .dac.nr = 3,
-       .dac.power = nv50_dac_power,
-       .dac.sense = nv50_dac_sense,
-       .sor.nr = 4,
-       .sor.power = nv50_sor_power,
-       .sor.hda_eld = gf119_hda_eld,
-       .sor.hdmi = gk104_hdmi_ctrl,
-       .sor.magic = gm200_sor_magic,
-};
-
-int
-gp104_disp_new(struct nvkm_device *device, int index, struct nvkm_disp **pdisp)
-{
-       return gf119_disp_new_(&gp104_disp, device, index, pdisp);
-}
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp102.c
new file mode 100644 (file)
index 0000000..589bd2f
--- /dev/null
@@ -0,0 +1,38 @@
+/*
+ * Copyright 2012 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs
+ */
+#include "dmacnv50.h"
+#include "rootnv50.h"
+
+#include <nvif/class.h>
+
+const struct nv50_disp_dmac_oclass
+gp102_disp_ovly_oclass = {
+       .base.oclass = GK104_DISP_OVERLAY_CONTROL_DMA,
+       .base.minver = 0,
+       .base.maxver = 0,
+       .ctor = nv50_disp_ovly_new,
+       .func = &gp102_disp_dmac_func,
+       .mthd = &gk104_disp_ovly_chan_mthd,
+       .chid = 5,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/ovlygp104.c
deleted file mode 100644 (file)
index 97e2dd2..0000000
+++ /dev/null
@@ -1,38 +0,0 @@
-/*
- * Copyright 2012 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs
- */
-#include "dmacnv50.h"
-#include "rootnv50.h"
-
-#include <nvif/class.h>
-
-const struct nv50_disp_dmac_oclass
-gp104_disp_ovly_oclass = {
-       .base.oclass = GK104_DISP_OVERLAY_CONTROL_DMA,
-       .base.minver = 0,
-       .base.maxver = 0,
-       .ctor = nv50_disp_ovly_new,
-       .func = &gp104_disp_dmac_func,
-       .mthd = &gk104_disp_ovly_chan_mthd,
-       .chid = 5,
-};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp102.c
new file mode 100644 (file)
index 0000000..37122ca
--- /dev/null
@@ -0,0 +1,58 @@
+/*
+ * Copyright 2016 Red Hat Inc.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors: Ben Skeggs <bskeggs@redhat.com>
+ */
+#include "rootnv50.h"
+#include "dmacnv50.h"
+
+#include <nvif/class.h>
+
+static const struct nv50_disp_root_func
+gp102_disp_root = {
+       .init = gf119_disp_root_init,
+       .fini = gf119_disp_root_fini,
+       .dmac = {
+               &gp102_disp_core_oclass,
+               &gp102_disp_base_oclass,
+               &gp102_disp_ovly_oclass,
+       },
+       .pioc = {
+               &gp102_disp_oimm_oclass,
+               &gp102_disp_curs_oclass,
+       },
+};
+
+static int
+gp102_disp_root_new(struct nvkm_disp *disp, const struct nvkm_oclass *oclass,
+                   void *data, u32 size, struct nvkm_object **pobject)
+{
+       return nv50_disp_root_new_(&gp102_disp_root, disp, oclass,
+                                  data, size, pobject);
+}
+
+const struct nvkm_disp_oclass
+gp102_disp_root_oclass = {
+       .base.oclass = GP102_DISP,
+       .base.minver = -1,
+       .base.maxver = -1,
+       .ctor = gp102_disp_root_new,
+};
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp104.c b/drivers/gpu/drm/nouveau/nvkm/engine/disp/rootgp104.c
deleted file mode 100644 (file)
index b053b29..0000000
+++ /dev/null
@@ -1,58 +0,0 @@
-/*
- * Copyright 2016 Red Hat Inc.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors: Ben Skeggs <bskeggs@redhat.com>
- */
-#include "rootnv50.h"
-#include "dmacnv50.h"
-
-#include <nvif/class.h>
-
-static const struct nv50_disp_root_func
-gp104_disp_root = {
-       .init = gf119_disp_root_init,
-       .fini = gf119_disp_root_fini,
-       .dmac = {
-               &gp104_disp_core_oclass,
-               &gp104_disp_base_oclass,
-               &gp104_disp_ovly_oclass,
-       },
-       .pioc = {
-               &gp102_disp_oimm_oclass,
-               &gp102_disp_curs_oclass,
-       },
-};
-
-static int
-gp104_disp_root_new(struct nvkm_disp *disp, const struct nvkm_oclass *oclass,
-                   void *data, u32 size, struct nvkm_object **pobject)
-{
-       return nv50_disp_root_new_(&gp104_disp_root, disp, oclass,
-                                  data, size, pobject);
-}
-
-const struct nvkm_disp_oclass
-gp104_disp_root_oclass = {
-       .base.oclass = GP104_DISP,
-       .base.minver = -1,
-       .base.maxver = -1,
-       .ctor = gp104_disp_root_new,
-};
index ad00f1724b729c60ff749c8cf601533aa4f05d55..b147cf5b35183b650fef7efce8fed5a491119750 100644 (file)
@@ -41,5 +41,5 @@ extern const struct nvkm_disp_oclass gk110_disp_root_oclass;
 extern const struct nvkm_disp_oclass gm107_disp_root_oclass;
 extern const struct nvkm_disp_oclass gm200_disp_root_oclass;
 extern const struct nvkm_disp_oclass gp100_disp_root_oclass;
-extern const struct nvkm_disp_oclass gp104_disp_root_oclass;
+extern const struct nvkm_disp_oclass gp102_disp_root_oclass;
 #endif