drm/i915: Include the current timeline seqno for debugging execlists
authorChris Wilson <chris@chris-wilson.co.uk>
Mon, 11 Feb 2019 13:10:04 +0000 (13:10 +0000)
committerChris Wilson <chris@chris-wilson.co.uk>
Mon, 11 Feb 2019 20:46:24 +0000 (20:46 +0000)
While this is mainly only useful for ELSP[0], it is definitely useful to
know the current timeline seqno wrt to the queued set of requests for
that port, as this carries additional information above and beyond the
near-defunct global_seqno and global HWSP.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190211131004.11634-1-chris@chris-wilson.co.uk
drivers/gpu/drm/i915/intel_engine_cs.c

index 49fa43ff02ba09dc63db471b4219e6b4db385cbf..2547e2e51db8d090187f91d3300ac57ed6c3f9b5 100644 (file)
@@ -1425,10 +1425,11 @@ static void intel_engine_print_registers(const struct intel_engine_cs *engine,
                                char hdr[80];
 
                                snprintf(hdr, sizeof(hdr),
-                                        "\t\tELSP[%d] count=%d, ring:{start:%08x, hwsp:%08x}, rq: ",
+                                        "\t\tELSP[%d] count=%d, ring:{start:%08x, hwsp:%08x, seqno:%08x}, rq: ",
                                         idx, count,
                                         i915_ggtt_offset(rq->ring->vma),
-                                        rq->timeline->hwsp_offset);
+                                        rq->timeline->hwsp_offset,
+                                        hwsp_seqno(rq));
                                print_request(m, rq, hdr);
                        } else {
                                drm_printf(m, "\t\tELSP[%d] idle\n", idx);