Use *_END instead of *_LIMIT for linker derived end addresses

The usage of _LIMIT seems odd here, so rename as follows:
  BL_CODE_LIMIT     --> BL_CODE_END
  BL_RO_DATA_LIMIT  --> BL_RO_DATA_END
  BL1_CODE_LIMIT    --> BL1_CODE_END
  BL1_RO_DATA_LIMIT --> BL1_RO_DATA_END

Basically, we want to use _LIMIT and _END properly as follows:
  *_SIZE + *_MAX_SIZE = *_LIMIT
  *_SIZE + *_SIZE     = *_END

The _LIMIT is generally defined by platform_def.h to indicate the
platform-dependent memory constraint.  So, its typical usage is
  ASSERT(. <= BL31_LIMIT, "BL31 image has exceeded its limit.")
in a linker script.

On the other hand, _END is used to indicate the end address of the
compiled image, i.e. we do not know it until the image is linked.

Here, all of these macros belong to the latter, so should be
suffixed with _END.

Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>

diff --git a/include/plat/common/common_def.h b/include/plat/common/common_def.h
index e2c4513882703eacd0f2156589d0349fc56b5653..8f50622f16918517625f5e575ffced2bdf1e5c77 100644 (file)
--- a/include/plat/common/common_def.h
+++ b/include/plat/common/common_def.h
@@ -119,22 +119,22 @@
  */
 #if SEPARATE_CODE_AND_RODATA
 #define BL_CODE_BASE           (unsigned long)(&__TEXT_START__)
-#define BL_CODE_LIMIT          (unsigned long)(&__TEXT_END__)
+#define BL_CODE_END            (unsigned long)(&__TEXT_END__)
 #define BL_RO_DATA_BASE                (unsigned long)(&__RODATA_START__)
-#define BL_RO_DATA_LIMIT       (unsigned long)(&__RODATA_END__)
+#define BL_RO_DATA_END         (unsigned long)(&__RODATA_END__)
 
-#define BL1_CODE_LIMIT         BL_CODE_LIMIT
+#define BL1_CODE_END           BL_CODE_END
 #define BL1_RO_DATA_BASE       (unsigned long)(&__RODATA_START__)
-#define BL1_RO_DATA_LIMIT      round_up(BL1_ROM_END, PAGE_SIZE)
+#define BL1_RO_DATA_END                round_up(BL1_ROM_END, PAGE_SIZE)
 #else
 #define BL_CODE_BASE           (unsigned long)(&__RO_START__)
-#define BL_CODE_LIMIT          (unsigned long)(&__RO_END__)
+#define BL_CODE_END            (unsigned long)(&__RO_END__)
 #define BL_RO_DATA_BASE                0
-#define BL_RO_DATA_LIMIT       0
+#define BL_RO_DATA_END         0
 
-#define BL1_CODE_LIMIT         round_up(BL1_ROM_END, PAGE_SIZE)
+#define BL1_CODE_END           round_up(BL1_ROM_END, PAGE_SIZE)
 #define BL1_RO_DATA_BASE       0
-#define BL1_RO_DATA_LIMIT      0
+#define BL1_RO_DATA_END                0
 #endif /* SEPARATE_CODE_AND_RODATA */
 
 #endif /* __COMMON_DEF_H__ */

diff --git a/plat/arm/common/arm_bl1_setup.c b/plat/arm/common/arm_bl1_setup.c
index 50d102afee631147152ad08f99a63a02afc4ff8e..91809fb4822fc600f02923e04b8c427b83f824e3 100644 (file)
--- a/plat/arm/common/arm_bl1_setup.c
+++ b/plat/arm/common/arm_bl1_setup.c
@@ -124,9 +124,9 @@ void arm_bl1_plat_arch_setup(void)
        arm_setup_page_tables(bl1_tzram_layout.total_base,
                              bl1_tzram_layout.total_size,
                              BL_CODE_BASE,
-                             BL1_CODE_LIMIT,
+                             BL1_CODE_END,
                              BL1_RO_DATA_BASE,
-                             BL1_RO_DATA_LIMIT
+                             BL1_RO_DATA_END
 #if USE_COHERENT_MEM
                              , BL1_COHERENT_RAM_BASE,
                              BL1_COHERENT_RAM_LIMIT

diff --git a/plat/arm/common/arm_bl2_setup.c b/plat/arm/common/arm_bl2_setup.c
index a4fac0da09fbd7d17c379ff0d4142770500fcf33..293e5e517362f92d772693efc0b6b999eb01fdc1 100644 (file)
--- a/plat/arm/common/arm_bl2_setup.c
+++ b/plat/arm/common/arm_bl2_setup.c
@@ -238,9 +238,9 @@ void arm_bl2_plat_arch_setup(void)
        arm_setup_page_tables(bl2_tzram_layout.total_base,
                              bl2_tzram_layout.total_size,
                              BL_CODE_BASE,
-                             BL_CODE_LIMIT,
+                             BL_CODE_END,
                              BL_RO_DATA_BASE,
-                             BL_RO_DATA_LIMIT
+                             BL_RO_DATA_END
 #if USE_COHERENT_MEM
                              , BL2_COHERENT_RAM_BASE,
                              BL2_COHERENT_RAM_LIMIT

diff --git a/plat/arm/common/arm_bl2u_setup.c b/plat/arm/common/arm_bl2u_setup.c
index de7d0c2f9e582d3a3cb102b3efbac875f1ff92c3..cad42f074069aa82a854306e040dd813ae15deb1 100644 (file)
--- a/plat/arm/common/arm_bl2u_setup.c
+++ b/plat/arm/common/arm_bl2u_setup.c
@@ -95,9 +95,9 @@ void arm_bl2u_plat_arch_setup(void)
        arm_setup_page_tables(BL2U_BASE,
                              BL31_LIMIT,
                              BL_CODE_BASE,
-                             BL_CODE_LIMIT,
+                             BL_CODE_END,
                              BL_RO_DATA_BASE,
-                             BL_RO_DATA_LIMIT
+                             BL_RO_DATA_END
 #if USE_COHERENT_MEM
                              ,
                              BL2U_COHERENT_RAM_BASE,

diff --git a/plat/arm/common/arm_bl31_setup.c b/plat/arm/common/arm_bl31_setup.c
index bc1ec11ecd1fdba2a9e9f3e2f00d300a6b9433c8..6b6bae89f4beb8b70dccd04f77b01e8097e22812 100644 (file)
--- a/plat/arm/common/arm_bl31_setup.c
+++ b/plat/arm/common/arm_bl31_setup.c
@@ -288,9 +288,9 @@ void arm_bl31_plat_arch_setup(void)
        arm_setup_page_tables(BL31_BASE,
                              BL31_END - BL31_BASE,
                              BL_CODE_BASE,
-                             BL_CODE_LIMIT,
+                             BL_CODE_END,
                              BL_RO_DATA_BASE,
-                             BL_RO_DATA_LIMIT
+                             BL_RO_DATA_END
 #if USE_COHERENT_MEM
                              , BL31_COHERENT_RAM_BASE,
                              BL31_COHERENT_RAM_LIMIT

diff --git a/plat/arm/common/sp_min/arm_sp_min_setup.c b/plat/arm/common/sp_min/arm_sp_min_setup.c
index d48556eeddbbfce8654de9c730c000fcfa4e81ae..40155f4e81ec96a515bbdc7652b5ba77e6278b12 100644 (file)
--- a/plat/arm/common/sp_min/arm_sp_min_setup.c
+++ b/plat/arm/common/sp_min/arm_sp_min_setup.c
@@ -202,9 +202,9 @@ void sp_min_plat_arch_setup(void)
        arm_setup_page_tables(BL32_BASE,
                              (BL32_END - BL32_BASE),
                              BL_CODE_BASE,
-                             BL_CODE_LIMIT,
+                             BL_CODE_END,
                              BL_RO_DATA_BASE,
-                             BL_RO_DATA_LIMIT
+                             BL_RO_DATA_END
 #if USE_COHERENT_MEM
                              , BL32_COHERENT_RAM_BASE,
                              BL32_COHERENT_RAM_LIMIT

diff --git a/plat/arm/common/tsp/arm_tsp_setup.c b/plat/arm/common/tsp/arm_tsp_setup.c
index 09029f4c2a1b5a7c7494c417b816de976c935be0..58c2b7ba6aa902a3429560e438167ee4f7d9b2ef 100644 (file)
--- a/plat/arm/common/tsp/arm_tsp_setup.c
+++ b/plat/arm/common/tsp/arm_tsp_setup.c
@@ -91,9 +91,9 @@ void tsp_plat_arch_setup(void)
        arm_setup_page_tables(BL32_BASE,
                              (BL32_END - BL32_BASE),
                              BL_CODE_BASE,
-                             BL_CODE_LIMIT,
+                             BL_CODE_END,
                              BL_RO_DATA_BASE,
-                             BL_RO_DATA_LIMIT
+                             BL_RO_DATA_END
 #if USE_COHERENT_MEM
                              , BL32_COHERENT_RAM_BASE,
                              BL32_COHERENT_RAM_LIMIT

diff --git a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
index c05b094eb21538a3e5b046b19ea8f73c3795b932..f6c4b98ea5ece27d0b74f31bc12a0c2d957ae5e7 100644 (file)
--- a/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
+++ b/plat/xilinx/zynqmp/bl31_zynqmp_setup.c
@@ -160,9 +160,9 @@ void bl31_plat_arch_setup(void)
        arm_setup_page_tables(BL31_BASE,
                              BL31_END - BL31_BASE,
                              BL_CODE_BASE,
-                             BL_CODE_LIMIT,
+                             BL_CODE_END,
                              BL_RO_DATA_BASE,
-                             BL_RO_DATA_LIMIT,
+                             BL_RO_DATA_END,
                              BL31_COHERENT_RAM_BASE,
                              BL31_COHERENT_RAM_LIMIT);
        enable_mmu_el3(0);

diff --git a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
index 8e3ca62494a7e032270be9724a7d3f1b4beab332..cf9ec6ace1a500d71e65ded044630aa4d5d89350 100644 (file)
--- a/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
+++ b/plat/xilinx/zynqmp/tsp/tsp_plat_setup.c
@@ -81,9 +81,9 @@ void tsp_plat_arch_setup(void)
        arm_setup_page_tables(BL32_BASE,
                              BL32_END - BL32_BASE,
                              BL_CODE_BASE,
-                             BL_CODE_LIMIT,
+                             BL_CODE_END,
                              BL_RO_DATA_BASE,
-                             BL_RO_DATA_LIMIT,
+                             BL_RO_DATA_END,
                              BL32_COHERENT_RAM_BASE,
                              BL32_COHERENT_RAM_LIMIT
                              );