ARM: OMAP: DMA transfer parameter configuration fix

Fix for re-using OMAP DMA channel with different transfer parameters.
Bits in the CCR register need to be cleaned as well in some cases.

Signed-off-by: Peter Ujfalusi <peter.ujfalusi@nokia.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>

diff --git a/arch/arm/plat-omap/dma.c b/arch/arm/plat-omap/dma.c
index 5dac4230360d845daf2c02d2c1a4e6e16c16ffae..aa1cf79f95435c841c478add23134ae52d32823e 100644 (file)
--- a/arch/arm/plat-omap/dma.c
+++ b/arch/arm/plat-omap/dma.c
@@ -166,18 +166,24 @@ void omap_set_dma_transfer_params(int lch, int data_type, int elem_count,
        if (cpu_is_omap24xx() && dma_trigger) {
                u32 val = OMAP_DMA_CCR_REG(lch);
 
+               val &= ~(3 << 19);
                if (dma_trigger > 63)
                        val |= 1 << 20;
                if (dma_trigger > 31)
                        val |= 1 << 19;
 
+               val &= ~(0x1f);
                val |= (dma_trigger & 0x1f);
 
                if (sync_mode & OMAP_DMA_SYNC_FRAME)
                        val |= 1 << 5;
+               else
+                       val &= ~(1 << 5);
 
                if (sync_mode & OMAP_DMA_SYNC_BLOCK)
                        val |= 1 << 18;
+               else
+                       val &= ~(1 << 18);
 
                if (src_or_dst_synch)
                        val |= 1 << 24;         /* source synch */