drm/amdgpu/powerplay: check vrefresh when when changing displays

Compare the current vrefresh in addition to the number of displays
when determining whether or not the smu needs updates when changing
modes. The SMU needs to be updated if the vbi timeout changes due
to a different refresh rate.  Fixes flickering around mode changes
in some cases on polaris parts.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Huang Rui <ray.huang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index 380f282a64ba22fd4e24930ed1103937d2ef9aeb..ab759e38e4eafca55f6d50123c58bd26145c0690 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4132,6 +4132,9 @@ smu7_check_smc_update_required_for_display_configuration(struct pp_hwmgr *hwmgr)
        if (data->display_timing.num_existing_displays != hwmgr->display_config->num_display)
                is_update_required = true;
 
+       if (data->display_timing.vrefresh != hwmgr->display_config->vrefresh)
+               is_update_required = true;
+
        if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps, PHM_PlatformCaps_SclkDeepSleep)) {
                if (data->display_timing.min_clock_in_sr != hwmgr->display_config->min_core_set_clock_in_sr &&
                        (data->display_timing.min_clock_in_sr >= SMU7_MINIMUM_ENGINE_CLOCK ||

diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
index 3784ce6e50ab4a43a89d6ad12551c6c9bf20d02f..69d361f8dfcafe10f13d5ec457bdd92a9777ae9f 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.h
@@ -156,6 +156,7 @@ struct smu7_vbios_boot_state {
 struct smu7_display_timing {
        uint32_t  min_clock_in_sr;
        uint32_t  num_existing_displays;
+       uint32_t  vrefresh;
 };
 
 struct smu7_dpmlevel_enable_mask {

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
index fbe3ef4ee45c66b01e9e1f0ea0e3021854c6be21..18643e06bc6ff14017350eaf5a6d835fb6fa3caa 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/ci_smumgr.c
@@ -1231,6 +1231,7 @@ static int ci_populate_single_memory_level(
        memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
 
        data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
+       data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
 
        /* stutter mode not support on ci */
 

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
index 18048f8e2f130ec27bf993a68373636c0518c171..ec14798e87b60af20f31ea077545d9e048a0dded 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/fiji_smumgr.c
@@ -1210,7 +1210,8 @@ static int fiji_populate_single_memory_level(struct pp_hwmgr *hwmgr,
         * PECI_GetNumberOfActiveDisplays(hwmgr->pPECI,
         * &(data->DisplayTiming.numExistingDisplays));
         */
-       data->display_timing.num_existing_displays = 1;
+       data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
+       data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
 
        if (mclk_stutter_mode_threshold &&
                (clock <= mclk_stutter_mode_threshold) &&

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
index 9299b93aa09af87e28d9fd3e4e08b27916d4be62..73aa368a454e9208fc4800ec4b491831481c2b16 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/iceland_smumgr.c
@@ -1280,6 +1280,7 @@ static int iceland_populate_single_memory_level(
        memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
 
        data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
+       data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
 
        /* stutter mode not support on iceland */
 

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
index 1276f168ff68d75a742d4101d7edb3fcf7a31b1d..872d3824337bf90ad8abbf4cce1eb9d77630c48a 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/polaris10_smumgr.c
@@ -1103,6 +1103,7 @@ static int polaris10_populate_single_memory_level(struct pp_hwmgr *hwmgr,
        mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
 
        data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
+       data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
 
        if (mclk_stutter_mode_threshold &&
                (clock <= mclk_stutter_mode_threshold) &&

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
index 7dabc6c456e120b9e9e16dac8cd6ceb2c5b59100..ae8378ed32ee1c641d3c13074131f8ca9f3f7be5 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/tonga_smumgr.c
@@ -1004,6 +1004,7 @@ static int tonga_populate_single_memory_level(
        memory_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
 
        data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
+       data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
 
        if ((mclk_stutter_mode_threshold != 0) &&
            (memory_clock <= mclk_stutter_mode_threshold) &&

diff --git a/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c b/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
index 57420d7caa4e968181b93cdf69e7eded94f7571a..3d415fabbd93cc2a28f7b9fa3af63a3f82d7d207 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
+++ b/drivers/gpu/drm/amd/powerplay/smumgr/vegam_smumgr.c
@@ -1009,6 +1009,7 @@ static int vegam_populate_single_memory_level(struct pp_hwmgr *hwmgr,
        mem_level->DisplayWatermark = PPSMC_DISPLAY_WATERMARK_LOW;
 
        data->display_timing.num_existing_displays = hwmgr->display_config->num_display;
+       data->display_timing.vrefresh = hwmgr->display_config->vrefresh;
 
        if (mclk_stutter_mode_threshold &&
                (clock <= mclk_stutter_mode_threshold) &&