+++ /dev/null
----
- drivers/rtc/rtc-isl1208.c | 357 +++++++++++++++++++++-------------------------
- 1 file changed, 170 insertions(+), 187 deletions(-)
-
---- a/drivers/rtc/rtc-isl1208.c
-+++ b/drivers/rtc/rtc-isl1208.c
-@@ -15,16 +15,15 @@
- #include <linux/bcd.h>
- #include <linux/rtc.h>
-
--#define DRV_NAME "isl1208"
--#define DRV_VERSION "0.2"
-+#define DRV_VERSION "0.3"
-
- /* Register map */
- /* rtc section */
- #define ISL1208_REG_SC 0x00
- #define ISL1208_REG_MN 0x01
- #define ISL1208_REG_HR 0x02
--#define ISL1208_REG_HR_MIL (1<<7) /* 24h/12h mode */
--#define ISL1208_REG_HR_PM (1<<5) /* PM/AM bit in 12h mode */
-+#define ISL1208_REG_HR_MIL (1<<7) /* 24h/12h mode */
-+#define ISL1208_REG_HR_PM (1<<5) /* PM/AM bit in 12h mode */
- #define ISL1208_REG_DT 0x03
- #define ISL1208_REG_MO 0x04
- #define ISL1208_REG_YR 0x05
-@@ -33,14 +32,14 @@
-
- /* control/status section */
- #define ISL1208_REG_SR 0x07
--#define ISL1208_REG_SR_ARST (1<<7) /* auto reset */
--#define ISL1208_REG_SR_XTOSCB (1<<6) /* crystal oscillator */
--#define ISL1208_REG_SR_WRTC (1<<4) /* write rtc */
--#define ISL1208_REG_SR_ALM (1<<2) /* alarm */
--#define ISL1208_REG_SR_BAT (1<<1) /* battery */
--#define ISL1208_REG_SR_RTCF (1<<0) /* rtc fail */
-+#define ISL1208_REG_SR_ARST (1<<7) /* auto reset */
-+#define ISL1208_REG_SR_XTOSCB (1<<6) /* crystal oscillator */
-+#define ISL1208_REG_SR_WRTC (1<<4) /* write rtc */
-+#define ISL1208_REG_SR_ALM (1<<2) /* alarm */
-+#define ISL1208_REG_SR_BAT (1<<1) /* battery */
-+#define ISL1208_REG_SR_RTCF (1<<0) /* rtc fail */
- #define ISL1208_REG_INT 0x08
--#define ISL1208_REG_09 0x09 /* reserved */
-+#define ISL1208_REG_09 0x09 /* reserved */
- #define ISL1208_REG_ATR 0x0a
- #define ISL1208_REG_DTR 0x0b
-
-@@ -58,39 +57,21 @@
- #define ISL1208_REG_USR2 0x13
- #define ISL1208_USR_SECTION_LEN 2
-
--/* i2c configuration */
--#define ISL1208_I2C_ADDR 0xde
--
--static const unsigned short normal_i2c[] = {
-- ISL1208_I2C_ADDR>>1, I2C_CLIENT_END
--};
--I2C_CLIENT_INSMOD; /* defines addr_data */
--
--static int isl1208_attach_adapter(struct i2c_adapter *adapter);
--static int isl1208_detach_client(struct i2c_client *client);
--
--static struct i2c_driver isl1208_driver = {
-- .driver = {
-- .name = DRV_NAME,
-- },
-- .id = I2C_DRIVERID_ISL1208,
-- .attach_adapter = &isl1208_attach_adapter,
-- .detach_client = &isl1208_detach_client,
--};
-+static struct i2c_driver isl1208_driver;
-
- /* block read */
- static int
- isl1208_i2c_read_regs(struct i2c_client *client, u8 reg, u8 buf[],
-- unsigned len)
-+ unsigned len)
- {
- u8 reg_addr[1] = { reg };
- struct i2c_msg msgs[2] = {
-- { client->addr, client->flags, sizeof(reg_addr), reg_addr },
-- { client->addr, client->flags | I2C_M_RD, len, buf }
-+ {client->addr, client->flags, sizeof(reg_addr), reg_addr}
-+ ,
-+ {client->addr, client->flags | I2C_M_RD, len, buf}
- };
- int ret;
-
-- BUG_ON(len == 0);
- BUG_ON(reg > ISL1208_REG_USR2);
- BUG_ON(reg + len > ISL1208_REG_USR2 + 1);
-
-@@ -103,15 +84,14 @@
- /* block write */
- static int
- isl1208_i2c_set_regs(struct i2c_client *client, u8 reg, u8 const buf[],
-- unsigned len)
-+ unsigned len)
- {
- u8 i2c_buf[ISL1208_REG_USR2 + 2];
- struct i2c_msg msgs[1] = {
-- { client->addr, client->flags, len + 1, i2c_buf }
-+ {client->addr, client->flags, len + 1, i2c_buf}
- };
- int ret;
-
-- BUG_ON(len == 0);
- BUG_ON(reg > ISL1208_REG_USR2);
- BUG_ON(reg + len > ISL1208_REG_USR2 + 1);
-
-@@ -125,7 +105,8 @@
- }
-
- /* simple check to see wether we have a isl1208 */
--static int isl1208_i2c_validate_client(struct i2c_client *client)
-+static int
-+isl1208_i2c_validate_client(struct i2c_client *client)
- {
- u8 regs[ISL1208_RTC_SECTION_LEN] = { 0, };
- u8 zero_mask[ISL1208_RTC_SECTION_LEN] = {
-@@ -139,24 +120,29 @@
- return ret;
-
- for (i = 0; i < ISL1208_RTC_SECTION_LEN; ++i) {
-- if (regs[i] & zero_mask[i]) /* check if bits are cleared */
-+ if (regs[i] & zero_mask[i]) /* check if bits are cleared */
- return -ENODEV;
- }
-
- return 0;
- }
-
--static int isl1208_i2c_get_sr(struct i2c_client *client)
-+static int
-+isl1208_i2c_get_sr(struct i2c_client *client)
- {
-- return i2c_smbus_read_byte_data(client, ISL1208_REG_SR) == -1 ? -EIO:0;
-+ int sr = i2c_smbus_read_byte_data(client, ISL1208_REG_SR);
-+ if (sr < 0)
-+ return -EIO;
-+
-+ return sr;
- }
-
--static int isl1208_i2c_get_atr(struct i2c_client *client)
-+static int
-+isl1208_i2c_get_atr(struct i2c_client *client)
- {
- int atr = i2c_smbus_read_byte_data(client, ISL1208_REG_ATR);
--
- if (atr < 0)
-- return -EIO;
-+ return atr;
-
- /* The 6bit value in the ATR register controls the load
- * capacitance C_load * in steps of 0.25pF
-@@ -169,51 +155,54 @@
- *
- */
-
-- atr &= 0x3f; /* mask out lsb */
-- atr ^= 1<<5; /* invert 6th bit */
-- atr += 2*9; /* add offset of 4.5pF; unit[atr] = 0.25pF */
-+ atr &= 0x3f; /* mask out lsb */
-+ atr ^= 1 << 5; /* invert 6th bit */
-+ atr += 2 * 9; /* add offset of 4.5pF; unit[atr] = 0.25pF */
-
- return atr;
- }
-
--static int isl1208_i2c_get_dtr(struct i2c_client *client)
-+static int
-+isl1208_i2c_get_dtr(struct i2c_client *client)
- {
- int dtr = i2c_smbus_read_byte_data(client, ISL1208_REG_DTR);
--
- if (dtr < 0)
- return -EIO;
-
- /* dtr encodes adjustments of {-60,-40,-20,0,20,40,60} ppm */
-- dtr = ((dtr & 0x3) * 20) * (dtr & (1<<2) ? -1 : 1);
-+ dtr = ((dtr & 0x3) * 20) * (dtr & (1 << 2) ? -1 : 1);
-
- return dtr;
- }
-
--static int isl1208_i2c_get_usr(struct i2c_client *client)
-+static int
-+isl1208_i2c_get_usr(struct i2c_client *client)
- {
- u8 buf[ISL1208_USR_SECTION_LEN] = { 0, };
- int ret;
-
-- ret = isl1208_i2c_read_regs (client, ISL1208_REG_USR1, buf,
-- ISL1208_USR_SECTION_LEN);
-+ ret = isl1208_i2c_read_regs(client, ISL1208_REG_USR1, buf,
-+ ISL1208_USR_SECTION_LEN);
- if (ret < 0)
- return ret;
-
- return (buf[1] << 8) | buf[0];
- }
-
--static int isl1208_i2c_set_usr(struct i2c_client *client, u16 usr)
-+static int
-+isl1208_i2c_set_usr(struct i2c_client *client, u16 usr)
- {
- u8 buf[ISL1208_USR_SECTION_LEN];
-
- buf[0] = usr & 0xff;
- buf[1] = (usr >> 8) & 0xff;
-
-- return isl1208_i2c_set_regs (client, ISL1208_REG_USR1, buf,
-- ISL1208_USR_SECTION_LEN);
-+ return isl1208_i2c_set_regs(client, ISL1208_REG_USR1, buf,
-+ ISL1208_USR_SECTION_LEN);
- }
-
--static int isl1208_rtc_proc(struct device *dev, struct seq_file *seq)
-+static int
-+isl1208_rtc_proc(struct device *dev, struct seq_file *seq)
- {
- struct i2c_client *const client = to_i2c_client(dev);
- int sr, dtr, atr, usr;
-@@ -230,20 +219,19 @@
- (sr & ISL1208_REG_SR_ALM) ? " ALM" : "",
- (sr & ISL1208_REG_SR_WRTC) ? " WRTC" : "",
- (sr & ISL1208_REG_SR_XTOSCB) ? " XTOSCB" : "",
-- (sr & ISL1208_REG_SR_ARST) ? " ARST" : "",
-- sr);
-+ (sr & ISL1208_REG_SR_ARST) ? " ARST" : "", sr);
-
- seq_printf(seq, "batt_status\t: %s\n",
- (sr & ISL1208_REG_SR_RTCF) ? "bad" : "okay");
-
- dtr = isl1208_i2c_get_dtr(client);
-- if (dtr >= 0 -1)
-+ if (dtr >= 0 - 1)
- seq_printf(seq, "digital_trim\t: %d ppm\n", dtr);
-
- atr = isl1208_i2c_get_atr(client);
- if (atr >= 0)
- seq_printf(seq, "analog_trim\t: %d.%.2d pF\n",
-- atr>>2, (atr&0x3)*25);
-+ atr >> 2, (atr & 0x3) * 25);
-
- usr = isl1208_i2c_get_usr(client);
- if (usr >= 0)
-@@ -252,9 +240,8 @@
- return 0;
- }
-
--
--static int isl1208_i2c_read_time(struct i2c_client *client,
-- struct rtc_time *tm)
-+static int
-+isl1208_i2c_read_time(struct i2c_client *client, struct rtc_time *tm)
- {
- int sr;
- u8 regs[ISL1208_RTC_SECTION_LEN] = { 0, };
-@@ -274,27 +261,30 @@
-
- tm->tm_sec = BCD2BIN(regs[ISL1208_REG_SC]);
- tm->tm_min = BCD2BIN(regs[ISL1208_REG_MN]);
-- { /* HR field has a more complex interpretation */
-+
-+ /* HR field has a more complex interpretation */
-+ {
- const u8 _hr = regs[ISL1208_REG_HR];
-- if (_hr & ISL1208_REG_HR_MIL) /* 24h format */
-+ if (_hr & ISL1208_REG_HR_MIL) /* 24h format */
- tm->tm_hour = BCD2BIN(_hr & 0x3f);
-- else { // 12h format
-+ else {
-+ /* 12h format */
- tm->tm_hour = BCD2BIN(_hr & 0x1f);
-- if (_hr & ISL1208_REG_HR_PM) /* PM flag set */
-+ if (_hr & ISL1208_REG_HR_PM) /* PM flag set */
- tm->tm_hour += 12;
- }
- }
-
- tm->tm_mday = BCD2BIN(regs[ISL1208_REG_DT]);
-- tm->tm_mon = BCD2BIN(regs[ISL1208_REG_MO]) - 1; /* rtc starts at 1 */
-+ tm->tm_mon = BCD2BIN(regs[ISL1208_REG_MO]) - 1; /* rtc starts at 1 */
- tm->tm_year = BCD2BIN(regs[ISL1208_REG_YR]) + 100;
- tm->tm_wday = BCD2BIN(regs[ISL1208_REG_DW]);
-
- return 0;
- }
-
--static int isl1208_i2c_read_alarm(struct i2c_client *client,
-- struct rtc_wkalrm *alarm)
-+static int
-+isl1208_i2c_read_alarm(struct i2c_client *client, struct rtc_wkalrm *alarm)
- {
- struct rtc_time *const tm = &alarm->time;
- u8 regs[ISL1208_ALARM_SECTION_LEN] = { 0, };
-@@ -307,7 +297,7 @@
- }
-
- sr = isl1208_i2c_read_regs(client, ISL1208_REG_SCA, regs,
-- ISL1208_ALARM_SECTION_LEN);
-+ ISL1208_ALARM_SECTION_LEN);
- if (sr < 0) {
- dev_err(&client->dev, "%s: reading alarm section failed\n",
- __func__);
-@@ -315,23 +305,25 @@
- }
-
- /* MSB of each alarm register is an enable bit */
-- tm->tm_sec = BCD2BIN(regs[ISL1208_REG_SCA-ISL1208_REG_SCA] & 0x7f);
-- tm->tm_min = BCD2BIN(regs[ISL1208_REG_MNA-ISL1208_REG_SCA] & 0x7f);
-- tm->tm_hour = BCD2BIN(regs[ISL1208_REG_HRA-ISL1208_REG_SCA] & 0x3f);
-- tm->tm_mday = BCD2BIN(regs[ISL1208_REG_DTA-ISL1208_REG_SCA] & 0x3f);
-- tm->tm_mon = BCD2BIN(regs[ISL1208_REG_MOA-ISL1208_REG_SCA] & 0x1f)-1;
-- tm->tm_wday = BCD2BIN(regs[ISL1208_REG_DWA-ISL1208_REG_SCA] & 0x03);
-+ tm->tm_sec = BCD2BIN(regs[ISL1208_REG_SCA - ISL1208_REG_SCA] & 0x7f);
-+ tm->tm_min = BCD2BIN(regs[ISL1208_REG_MNA - ISL1208_REG_SCA] & 0x7f);
-+ tm->tm_hour = BCD2BIN(regs[ISL1208_REG_HRA - ISL1208_REG_SCA] & 0x3f);
-+ tm->tm_mday = BCD2BIN(regs[ISL1208_REG_DTA - ISL1208_REG_SCA] & 0x3f);
-+ tm->tm_mon =
-+ BCD2BIN(regs[ISL1208_REG_MOA - ISL1208_REG_SCA] & 0x1f) - 1;
-+ tm->tm_wday = BCD2BIN(regs[ISL1208_REG_DWA - ISL1208_REG_SCA] & 0x03);
-
- return 0;
- }
-
--static int isl1208_rtc_read_time(struct device *dev, struct rtc_time *tm)
-+static int
-+isl1208_rtc_read_time(struct device *dev, struct rtc_time *tm)
- {
- return isl1208_i2c_read_time(to_i2c_client(dev), tm);
- }
-
--static int isl1208_i2c_set_time(struct i2c_client *client,
-- struct rtc_time const *tm)
-+static int
-+isl1208_i2c_set_time(struct i2c_client *client, struct rtc_time const *tm)
- {
- int sr;
- u8 regs[ISL1208_RTC_SECTION_LEN] = { 0, };
-@@ -353,7 +345,7 @@
- }
-
- /* set WRTC */
-- sr = i2c_smbus_write_byte_data (client, ISL1208_REG_SR,
-+ sr = i2c_smbus_write_byte_data(client, ISL1208_REG_SR,
- sr | ISL1208_REG_SR_WRTC);
- if (sr < 0) {
- dev_err(&client->dev, "%s: writing SR failed\n", __func__);
-@@ -369,7 +361,7 @@
- }
-
- /* clear WRTC again */
-- sr = i2c_smbus_write_byte_data (client, ISL1208_REG_SR,
-+ sr = i2c_smbus_write_byte_data(client, ISL1208_REG_SR,
- sr & ~ISL1208_REG_SR_WRTC);
- if (sr < 0) {
- dev_err(&client->dev, "%s: writing SR failed\n", __func__);
-@@ -380,70 +372,69 @@
- }
-
-
--static int isl1208_rtc_set_time(struct device *dev, struct rtc_time *tm)
-+static int
-+isl1208_rtc_set_time(struct device *dev, struct rtc_time *tm)
- {
- return isl1208_i2c_set_time(to_i2c_client(dev), tm);
- }
-
--static int isl1208_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
-+static int
-+isl1208_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alarm)
- {
- return isl1208_i2c_read_alarm(to_i2c_client(dev), alarm);
- }
-
- static const struct rtc_class_ops isl1208_rtc_ops = {
-- .proc = isl1208_rtc_proc,
-- .read_time = isl1208_rtc_read_time,
-- .set_time = isl1208_rtc_set_time,
-- .read_alarm = isl1208_rtc_read_alarm,
-- //.set_alarm = isl1208_rtc_set_alarm,
-+ .proc = isl1208_rtc_proc,
-+ .read_time = isl1208_rtc_read_time,
-+ .set_time = isl1208_rtc_set_time,
-+ .read_alarm = isl1208_rtc_read_alarm,
-+ /*.set_alarm = isl1208_rtc_set_alarm, */
- };
-
- /* sysfs interface */
-
--static ssize_t isl1208_sysfs_show_atrim(struct device *dev,
-- struct device_attribute *attr,
-- char *buf)
-+static ssize_t
-+isl1208_sysfs_show_atrim(struct device *dev,
-+ struct device_attribute *attr, char *buf)
- {
-- int atr;
--
-- atr = isl1208_i2c_get_atr(to_i2c_client(dev));
-+ int atr = isl1208_i2c_get_atr(to_i2c_client(dev));
- if (atr < 0)
- return atr;
-
-- return sprintf(buf, "%d.%.2d pF\n", atr>>2, (atr&0x3)*25);
-+ return sprintf(buf, "%d.%.2d pF\n", atr >> 2, (atr & 0x3) * 25);
- }
-+
- static DEVICE_ATTR(atrim, S_IRUGO, isl1208_sysfs_show_atrim, NULL);
-
--static ssize_t isl1208_sysfs_show_dtrim(struct device *dev,
-- struct device_attribute *attr,
-- char *buf)
-+static ssize_t
-+isl1208_sysfs_show_dtrim(struct device *dev,
-+ struct device_attribute *attr, char *buf)
- {
-- int dtr;
--
-- dtr = isl1208_i2c_get_dtr(to_i2c_client(dev));
-+ int dtr = isl1208_i2c_get_dtr(to_i2c_client(dev));
- if (dtr < 0)
- return dtr;
-
- return sprintf(buf, "%d ppm\n", dtr);
- }
-+
- static DEVICE_ATTR(dtrim, S_IRUGO, isl1208_sysfs_show_dtrim, NULL);
-
--static ssize_t isl1208_sysfs_show_usr(struct device *dev,
-- struct device_attribute *attr,
-- char *buf)
-+static ssize_t
-+isl1208_sysfs_show_usr(struct device *dev,
-+ struct device_attribute *attr, char *buf)
- {
-- int usr;
--
-- usr = isl1208_i2c_get_usr(to_i2c_client(dev));
-+ int usr = isl1208_i2c_get_usr(to_i2c_client(dev));
- if (usr < 0)
- return usr;
-
- return sprintf(buf, "0x%.4x\n", usr);
- }
-
--static ssize_t isl1208_sysfs_store_usr(struct device *dev,
-- struct device_attribute *attr,
-- const char *buf, size_t count)
-+static ssize_t
-+isl1208_sysfs_store_usr(struct device *dev,
-+ struct device_attribute *attr,
-+ const char *buf, size_t count)
- {
- int usr = -1;
-
-@@ -460,124 +451,116 @@
-
- return isl1208_i2c_set_usr(to_i2c_client(dev), usr) ? -EIO : count;
- }
-+
- static DEVICE_ATTR(usr, S_IRUGO | S_IWUSR, isl1208_sysfs_show_usr,
- isl1208_sysfs_store_usr);
-
- static int
--isl1208_probe(struct i2c_adapter *adapter, int addr, int kind)
-+isl1208_sysfs_register(struct device *dev)
- {
-- int rc = 0;
-- struct i2c_client *new_client = NULL;
-- struct rtc_device *rtc = NULL;
-+ int err;
-+
-+ err = device_create_file(dev, &dev_attr_atrim);
-+ if (err)
-+ return err;
-
-- if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
-- rc = -ENODEV;
-- goto failout;
-+ err = device_create_file(dev, &dev_attr_dtrim);
-+ if (err) {
-+ device_remove_file(dev, &dev_attr_atrim);
-+ return err;
- }
-
-- new_client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL);
-- if (new_client == NULL) {
-- rc = -ENOMEM;
-- goto failout;
-+ err = device_create_file(dev, &dev_attr_usr);
-+ if (err) {
-+ device_remove_file(dev, &dev_attr_atrim);
-+ device_remove_file(dev, &dev_attr_dtrim);
- }
-
-- new_client->addr = addr;
-- new_client->adapter = adapter;
-- new_client->driver = &isl1208_driver;
-- new_client->flags = 0;
-- strcpy(new_client->name, DRV_NAME);
-+ return 0;
-+}
-
-- if (kind < 0) {
-- rc = isl1208_i2c_validate_client(new_client);
-- if (rc < 0)
-- goto failout;
-- }
-+static int
-+isl1208_sysfs_unregister(struct device *dev)
-+{
-+ device_remove_file(dev, &dev_attr_atrim);
-+ device_remove_file(dev, &dev_attr_atrim);
-+ device_remove_file(dev, &dev_attr_usr);
-+
-+ return 0;
-+}
-+
-+static int
-+isl1208_probe(struct i2c_client *client)
-+{
-+ int rc = 0;
-+ struct rtc_device *rtc;
-
-- rc = i2c_attach_client(new_client);
-- if (rc < 0)
-- goto failout;
-+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
-+ return -ENODEV;
-
-- dev_info(&new_client->dev,
-+ if (isl1208_i2c_validate_client(client) < 0)
-+ return -ENODEV;
-+
-+ dev_info(&client->dev,
- "chip found, driver version " DRV_VERSION "\n");
-
- rtc = rtc_device_register(isl1208_driver.driver.name,
-- &new_client->dev,
-- &isl1208_rtc_ops, THIS_MODULE);
--
-- if (IS_ERR(rtc)) {
-- rc = PTR_ERR(rtc);
-- goto failout_detach;
-- }
-+ &client->dev, &isl1208_rtc_ops,
-+ THIS_MODULE);
-+ if (IS_ERR(rtc))
-+ return PTR_ERR(rtc);
-
-- i2c_set_clientdata(new_client, rtc);
-+ i2c_set_clientdata(client, rtc);
-
-- rc = isl1208_i2c_get_sr(new_client);
-+ rc = isl1208_i2c_get_sr(client);
- if (rc < 0) {
-- dev_err(&new_client->dev, "reading status failed\n");
-- goto failout_unregister;
-+ dev_err(&client->dev, "reading status failed\n");
-+ goto exit_unregister;
- }
-
- if (rc & ISL1208_REG_SR_RTCF)
-- dev_warn(&new_client->dev, "rtc power failure detected, "
-+ dev_warn(&client->dev, "rtc power failure detected, "
- "please set clock.\n");
-
-- rc = device_create_file(&new_client->dev, &dev_attr_atrim);
-- if (rc < 0)
-- goto failout_unregister;
-- rc = device_create_file(&new_client->dev, &dev_attr_dtrim);
-- if (rc < 0)
-- goto failout_atrim;
-- rc = device_create_file(&new_client->dev, &dev_attr_usr);
-- if (rc < 0)
-- goto failout_dtrim;
-+ rc = isl1208_sysfs_register(&client->dev);
-+ if (rc)
-+ goto exit_unregister;
-
- return 0;
-
-- failout_dtrim:
-- device_remove_file(&new_client->dev, &dev_attr_dtrim);
-- failout_atrim:
-- device_remove_file(&new_client->dev, &dev_attr_atrim);
-- failout_unregister:
-+ exit_unregister:
- rtc_device_unregister(rtc);
-- failout_detach:
-- i2c_detach_client(new_client);
-- failout:
-- kfree(new_client);
-- return rc;
--}
-
--static int
--isl1208_attach_adapter (struct i2c_adapter *adapter)
--{
-- return i2c_probe(adapter, &addr_data, isl1208_probe);
-+ return rc;
- }
-
- static int
--isl1208_detach_client(struct i2c_client *client)
-+isl1208_remove(struct i2c_client *client)
- {
-- int rc;
-- struct rtc_device *const rtc = i2c_get_clientdata(client);
--
-- if (rtc)
-- rtc_device_unregister(rtc); /* do we need to kfree? */
--
-- rc = i2c_detach_client(client);
-- if (rc)
-- return rc;
-+ struct rtc_device *rtc = i2c_get_clientdata(client);
-
-- kfree(client);
-+ isl1208_sysfs_unregister(&client->dev);
-+ rtc_device_unregister(rtc);
-
- return 0;
- }
-
--/* module management */
-+static struct i2c_driver isl1208_driver = {
-+ .driver = {
-+ .name = "rtc-isl1208",
-+ },
-+ .probe = isl1208_probe,
-+ .remove = isl1208_remove,
-+};
-
--static int __init isl1208_init(void)
-+static int __init
-+isl1208_init(void)
- {
- return i2c_add_driver(&isl1208_driver);
- }
-
--static void __exit isl1208_exit(void)
-+static void __exit
-+isl1208_exit(void)
- {
- i2c_del_driver(&isl1208_driver);
- }
+++ /dev/null
----
- drivers/rtc/rtc-pcf8563.c | 109 +++++++++++++---------------------------------
- 1 file changed, 32 insertions(+), 77 deletions(-)
-
---- a/drivers/rtc/rtc-pcf8563.c
-+++ b/drivers/rtc/rtc-pcf8563.c
-@@ -18,17 +18,7 @@
- #include <linux/bcd.h>
- #include <linux/rtc.h>
-
--#define DRV_VERSION "0.4.2"
--
--/* Addresses to scan: none
-- * This chip cannot be reliably autodetected. An empty eeprom
-- * located at 0x51 will pass the validation routine due to
-- * the way the registers are implemented.
-- */
--static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
--
--/* Module parameters */
--I2C_CLIENT_INSMOD;
-+#define DRV_VERSION "0.4.3"
-
- #define PCF8563_REG_ST1 0x00 /* status */
- #define PCF8563_REG_ST2 0x01
-@@ -53,8 +43,10 @@
- #define PCF8563_SC_LV 0x80 /* low voltage */
- #define PCF8563_MO_C 0x80 /* century */
-
-+static struct i2c_driver pcf8563_driver;
-+
- struct pcf8563 {
-- struct i2c_client client;
-+ struct rtc_device *rtc;
- /*
- * The meaning of MO_C bit varies by the chip type.
- * From PCF8563 datasheet: this bit is toggled when the years
-@@ -72,16 +64,13 @@
- int c_polarity; /* 0: MO_C=1 means 19xx, otherwise MO_C=1 means 20xx */
- };
-
--static int pcf8563_probe(struct i2c_adapter *adapter, int address, int kind);
--static int pcf8563_detach(struct i2c_client *client);
--
- /*
- * In the routines that deal directly with the pcf8563 hardware, we use
- * rtc_time -- month 0-11, hour 0-23, yr = calendar year-epoch.
- */
- static int pcf8563_get_datetime(struct i2c_client *client, struct rtc_time *tm)
- {
-- struct pcf8563 *pcf8563 = container_of(client, struct pcf8563, client);
-+ struct pcf8563 *pcf8563 = i2c_get_clientdata(client);
- unsigned char buf[13] = { PCF8563_REG_ST1 };
-
- struct i2c_msg msgs[] = {
-@@ -138,7 +127,7 @@
-
- static int pcf8563_set_datetime(struct i2c_client *client, struct rtc_time *tm)
- {
-- struct pcf8563 *pcf8563 = container_of(client, struct pcf8563, client);
-+ struct pcf8563 *pcf8563 = i2c_get_clientdata(client);
- int i, err;
- unsigned char buf[9];
-
-@@ -257,100 +246,66 @@
- .set_time = pcf8563_rtc_set_time,
- };
-
--static int pcf8563_attach(struct i2c_adapter *adapter)
--{
-- return i2c_probe(adapter, &addr_data, pcf8563_probe);
--}
--
--static struct i2c_driver pcf8563_driver = {
-- .driver = {
-- .name = "pcf8563",
-- },
-- .id = I2C_DRIVERID_PCF8563,
-- .attach_adapter = &pcf8563_attach,
-- .detach_client = &pcf8563_detach,
--};
--
--static int pcf8563_probe(struct i2c_adapter *adapter, int address, int kind)
-+static int pcf8563_probe(struct i2c_client *client)
- {
- struct pcf8563 *pcf8563;
-- struct i2c_client *client;
-- struct rtc_device *rtc;
-
- int err = 0;
-
-- dev_dbg(&adapter->dev, "%s\n", __FUNCTION__);
-+ dev_dbg(&client->dev, "%s\n", __FUNCTION__);
-
-- if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
-- err = -ENODEV;
-- goto exit;
-- }
-+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
-+ return -ENODEV;
-
-- if (!(pcf8563 = kzalloc(sizeof(struct pcf8563), GFP_KERNEL))) {
-- err = -ENOMEM;
-- goto exit;
-- }
--
-- client = &pcf8563->client;
-- client->addr = address;
-- client->driver = &pcf8563_driver;
-- client->adapter = adapter;
--
-- strlcpy(client->name, pcf8563_driver.driver.name, I2C_NAME_SIZE);
-+ if (!(pcf8563 = kzalloc(sizeof(struct pcf8563), GFP_KERNEL)))
-+ return -ENOMEM;
-
- /* Verify the chip is really an PCF8563 */
-- if (kind < 0) {
-- if (pcf8563_validate_client(client) < 0) {
-- err = -ENODEV;
-- goto exit_kfree;
-- }
-- }
--
-- /* Inform the i2c layer */
-- if ((err = i2c_attach_client(client)))
-+ if (pcf8563_validate_client(client) < 0) {
-+ err = -ENODEV;
- goto exit_kfree;
-+ }
-
- dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
-
-- rtc = rtc_device_register(pcf8563_driver.driver.name, &client->dev,
-+ pcf8563->rtc = rtc_device_register(pcf8563_driver.driver.name, &client->dev,
- &pcf8563_rtc_ops, THIS_MODULE);
-
-- if (IS_ERR(rtc)) {
-- err = PTR_ERR(rtc);
-- goto exit_detach;
-+ if (IS_ERR(pcf8563->rtc)) {
-+ err = PTR_ERR(pcf8563->rtc);
-+ goto exit_kfree;
- }
-
-- i2c_set_clientdata(client, rtc);
-+ i2c_set_clientdata(client, pcf8563);
-
- return 0;
-
--exit_detach:
-- i2c_detach_client(client);
--
- exit_kfree:
- kfree(pcf8563);
-
--exit:
- return err;
- }
-
--static int pcf8563_detach(struct i2c_client *client)
-+static int pcf8563_remove(struct i2c_client *client)
- {
-- struct pcf8563 *pcf8563 = container_of(client, struct pcf8563, client);
-- int err;
-- struct rtc_device *rtc = i2c_get_clientdata(client);
-+ struct pcf8563 *pcf8563 = i2c_get_clientdata(client);
-
-- if (rtc)
-- rtc_device_unregister(rtc);
--
-- if ((err = i2c_detach_client(client)))
-- return err;
-+ if (pcf8563->rtc)
-+ rtc_device_unregister(pcf8563->rtc);
-
- kfree(pcf8563);
-
- return 0;
- }
-
-+static struct i2c_driver pcf8563_driver = {
-+ .driver = {
-+ .name = "rtc-pcf8563",
-+ },
-+ .probe = pcf8563_probe,
-+ .remove = pcf8563_remove,
-+};
-+
- static int __init pcf8563_init(void)
- {
- return i2c_add_driver(&pcf8563_driver);
+++ /dev/null
----
- drivers/rtc/rtc-x1205.c | 128 ++++++++++++++++--------------------------------
- 1 file changed, 43 insertions(+), 85 deletions(-)
-
---- a/drivers/rtc/rtc-x1205.c
-+++ b/drivers/rtc/rtc-x1205.c
-@@ -22,20 +22,7 @@
- #include <linux/rtc.h>
- #include <linux/delay.h>
-
--#define DRV_VERSION "1.0.7"
--
--/* Addresses to scan: none. This chip is located at
-- * 0x6f and uses a two bytes register addressing.
-- * Two bytes need to be written to read a single register,
-- * while most other chips just require one and take the second
-- * one as the data to be written. To prevent corrupting
-- * unknown chips, the user must explicitly set the probe parameter.
-- */
--
--static const unsigned short normal_i2c[] = { I2C_CLIENT_END };
--
--/* Insmod parameters */
--I2C_CLIENT_INSMOD;
-+#define DRV_VERSION "1.0.8"
-
- /* offsets into CCR area */
-
-@@ -91,19 +78,7 @@
-
- #define X1205_HR_MIL 0x80 /* Set in ccr.hour for 24 hr mode */
-
--/* Prototypes */
--static int x1205_attach(struct i2c_adapter *adapter);
--static int x1205_detach(struct i2c_client *client);
--static int x1205_probe(struct i2c_adapter *adapter, int address, int kind);
--
--static struct i2c_driver x1205_driver = {
-- .driver = {
-- .name = "x1205",
-- },
-- .id = I2C_DRIVERID_X1205,
-- .attach_adapter = &x1205_attach,
-- .detach_client = &x1205_detach,
--};
-+static struct i2c_driver x1205_driver;
-
- /*
- * In the routines that deal directly with the x1205 hardware, we use
-@@ -497,58 +472,51 @@
- }
- static DEVICE_ATTR(dtrim, S_IRUGO, x1205_sysfs_show_dtrim, NULL);
-
--static int x1205_attach(struct i2c_adapter *adapter)
-+static int x1205_sysfs_register(struct device *dev)
-+{
-+ int err;
-+
-+ err = device_create_file(dev, &dev_attr_atrim);
-+ if (err)
-+ return err;
-+
-+ err = device_create_file(dev, &dev_attr_dtrim);
-+ if (err)
-+ device_remove_file(dev, &dev_attr_atrim);
-+
-+ return err;
-+}
-+
-+static void x1205_sysfs_unregister(struct device *dev)
- {
-- return i2c_probe(adapter, &addr_data, x1205_probe);
-+ device_remove_file(dev, &dev_attr_atrim);
-+ device_remove_file(dev, &dev_attr_dtrim);
- }
-
--static int x1205_probe(struct i2c_adapter *adapter, int address, int kind)
-+
-+static int x1205_probe(struct i2c_client *client)
- {
- int err = 0;
- unsigned char sr;
-- struct i2c_client *client;
- struct rtc_device *rtc;
-
-- dev_dbg(&adapter->dev, "%s\n", __FUNCTION__);
-+ dev_dbg(&client->dev, "%s\n", __FUNCTION__);
-
-- if (!i2c_check_functionality(adapter, I2C_FUNC_I2C)) {
-- err = -ENODEV;
-- goto exit;
-+ if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
-+ return -ENODEV;
- }
-
-- if (!(client = kzalloc(sizeof(struct i2c_client), GFP_KERNEL))) {
-- err = -ENOMEM;
-- goto exit;
-+ if (x1205_validate_client(client) < 0) {
-+ return -ENODEV;
- }
-
-- /* I2C client */
-- client->addr = address;
-- client->driver = &x1205_driver;
-- client->adapter = adapter;
--
-- strlcpy(client->name, x1205_driver.driver.name, I2C_NAME_SIZE);
--
-- /* Verify the chip is really an X1205 */
-- if (kind < 0) {
-- if (x1205_validate_client(client) < 0) {
-- err = -ENODEV;
-- goto exit_kfree;
-- }
-- }
--
-- /* Inform the i2c layer */
-- if ((err = i2c_attach_client(client)))
-- goto exit_kfree;
--
- dev_info(&client->dev, "chip found, driver version " DRV_VERSION "\n");
-
- rtc = rtc_device_register(x1205_driver.driver.name, &client->dev,
- &x1205_rtc_ops, THIS_MODULE);
-
-- if (IS_ERR(rtc)) {
-- err = PTR_ERR(rtc);
-- goto exit_detach;
-- }
-+ if (IS_ERR(rtc))
-+ return PTR_ERR(rtc);
-
- i2c_set_clientdata(client, rtc);
-
-@@ -565,45 +533,35 @@
- else
- dev_err(&client->dev, "couldn't read status\n");
-
-- err = device_create_file(&client->dev, &dev_attr_atrim);
-- if (err) goto exit_devreg;
-- err = device_create_file(&client->dev, &dev_attr_dtrim);
-- if (err) goto exit_atrim;
-+ err = x1205_sysfs_register(&client->dev);
-+ if (err)
-+ goto exit_devreg;
-
- return 0;
-
--exit_atrim:
-- device_remove_file(&client->dev, &dev_attr_atrim);
--
- exit_devreg:
- rtc_device_unregister(rtc);
-
--exit_detach:
-- i2c_detach_client(client);
--
--exit_kfree:
-- kfree(client);
--
--exit:
- return err;
- }
-
--static int x1205_detach(struct i2c_client *client)
-+static int x1205_remove(struct i2c_client *client)
- {
-- int err;
- struct rtc_device *rtc = i2c_get_clientdata(client);
-
-- if (rtc)
-- rtc_device_unregister(rtc);
--
-- if ((err = i2c_detach_client(client)))
-- return err;
--
-- kfree(client);
--
-+ rtc_device_unregister(rtc);
-+ x1205_sysfs_unregister(&client->dev);
- return 0;
- }
-
-+static struct i2c_driver x1205_driver = {
-+ .driver = {
-+ .name = "rtc-x1205",
-+ },
-+ .probe = x1205_probe,
-+ .remove = x1205_remove,
-+};
-+
- static int __init x1205_init(void)
- {
- return i2c_add_driver(&x1205_driver);
+++ /dev/null
-From: Rod Whitby <rod@whitby.id.au>
-Subject: [PATCH] ixp4xx: Add support for the Freecom FSG-3 board (Patch #4874)
-
-The Freecom-FSG3 is a small network-attached-storage device with the
-following feature set:
-
-* Intel IXP422
-* 4MB Flash (ixp4xx flash driver)
-* 64MB RAM
-* 4 USB 2.0 host ports (ehci and ohci drivers)
-* 1 WAN (eth1) and 3 LAN (eth0) ethernet ports
- * Supported by the open source ixp4xx ethernet driver
-* Via VT6421 disk controller (libata and sata-via drivers)
- * Internal hard disk (PATA supported, SATA not yet supported)
- * External SATA port (not yet supported)
-* ISL1208 RTC chip
-* Winbond 83782 temp sensor and fan controller
-* MiniPCI slot
-
-The ixp4xx_defconfig is also updated to support this device (the
-leds-fsg driver is to be submitted separately via the leds tree after
-this initial support is merged, as it depends on header gpio defines).
-
-Signed-off-by: Rod Whitby <rod@whitby.id.au>
-
-PATCH FOLLOWS
-KernelVersion: v2.6.25-rc6-74-g264e3e8
----
-
-Updated to correct all issues found by RMK.
-
-The front power button calls ctrl_alt_del() and the rear reset button
-now calls machine_restart() directly.
-
- arch/arm/configs/ixp4xx_defconfig | 9 +-
- arch/arm/mach-ixp4xx/Kconfig | 9 +
- arch/arm/mach-ixp4xx/Makefile | 2 +
- arch/arm/mach-ixp4xx/fsg-pci.c | 71 ++++++++
- arch/arm/mach-ixp4xx/fsg-setup.c | 276 ++++++++++++++++++++++++++++++++
- include/asm-arm/arch-ixp4xx/fsg.h | 50 ++++++
- include/asm-arm/arch-ixp4xx/hardware.h | 1 +
- include/asm-arm/arch-ixp4xx/irqs.h | 7 +
- 8 files changed, 421 insertions(+), 4 deletions(-)
- create mode 100644 arch/arm/mach-ixp4xx/fsg-pci.c
- create mode 100644 arch/arm/mach-ixp4xx/fsg-setup.c
- create mode 100644 include/asm-arm/arch-ixp4xx/fsg.h
-
---- a/arch/arm/configs/ixp4xx_defconfig
-+++ b/arch/arm/configs/ixp4xx_defconfig
-@@ -165,6 +165,7 @@
- CONFIG_MACH_NAS100D=y
- CONFIG_MACH_DSMG600=y
- CONFIG_ARCH_IXDP4XX=y
-+CONFIG_MACH_FSG=y
- CONFIG_CPU_IXP46X=y
- CONFIG_CPU_IXP43X=y
- CONFIG_MACH_GTWX5715=y
-@@ -770,7 +771,7 @@
- # CONFIG_SATA_SIL24 is not set
- # CONFIG_SATA_SIS is not set
- # CONFIG_SATA_ULI is not set
--# CONFIG_SATA_VIA is not set
-+CONFIG_SATA_VIA=y
- # CONFIG_SATA_VITESSE is not set
- # CONFIG_SATA_INIC162X is not set
- # CONFIG_PATA_ALI is not set
-@@ -1143,7 +1144,7 @@
- # CONFIG_SENSORS_VIA686A is not set
- # CONFIG_SENSORS_VT1211 is not set
- # CONFIG_SENSORS_VT8231 is not set
--# CONFIG_SENSORS_W83781D is not set
-+CONFIG_SENSORS_W83781D=y
- # CONFIG_SENSORS_W83791D is not set
- # CONFIG_SENSORS_W83792D is not set
- # CONFIG_SENSORS_W83793 is not set
-@@ -1334,8 +1335,8 @@
- #
- # LED drivers
- #
--# CONFIG_LEDS_IXP4XX is not set
- CONFIG_LEDS_GPIO=y
-+CONFIG_LEDS_FSG=y
-
- #
- # LED Triggers
-@@ -1367,7 +1368,7 @@
- # CONFIG_RTC_DRV_DS1672 is not set
- # CONFIG_RTC_DRV_MAX6900 is not set
- # CONFIG_RTC_DRV_RS5C372 is not set
--# CONFIG_RTC_DRV_ISL1208 is not set
-+CONFIG_RTC_DRV_ISL1208=y
- CONFIG_RTC_DRV_X1205=y
- CONFIG_RTC_DRV_PCF8563=y
- # CONFIG_RTC_DRV_PCF8583 is not set
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -125,6 +125,15 @@
- depends on ARCH_IXDP425 || MACH_IXDP465 || MACH_KIXRP435
- default y
-
-+config MACH_FSG
-+ bool
-+ prompt "Freecom FSG-3"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support Freecom's
-+ FSG-3 device. For more information on this platform,
-+ see http://www.nslu2-linux.org/wiki/FSG3/HomePage
-+
- #
- # Certain registers and IRQs are only enabled if supporting IXP465 CPUs
- #
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -15,6 +15,7 @@
- obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
- obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
- obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
-+obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
-
- obj-y += common.o
-
-@@ -28,6 +29,7 @@
- obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o
- obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
- obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
-+obj-$(CONFIG_MACH_FSG) += fsg-setup.o
-
- obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/fsg-pci.c
-@@ -0,0 +1,71 @@
-+/*
-+ * arch/arch/mach-ixp4xx/fsg-pci.c
-+ *
-+ * FSG board-level PCI initialization
-+ *
-+ * Author: Rod Whitby <rod@whitby.id.au>
-+ * Maintainer: http://www.nslu2-linux.org/
-+ *
-+ * based on ixdp425-pci.c:
-+ * Copyright (C) 2002 Intel Corporation.
-+ * Copyright (C) 2003-2004 MontaVista Software, Inc.
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach/pci.h>
-+#include <asm/mach-types.h>
-+
-+void __init fsg_pci_preinit(void)
-+{
-+ set_irq_type(IRQ_FSG_PCI_INTA, IRQT_LOW);
-+ set_irq_type(IRQ_FSG_PCI_INTB, IRQT_LOW);
-+ set_irq_type(IRQ_FSG_PCI_INTC, IRQT_LOW);
-+
-+ ixp4xx_pci_preinit();
-+}
-+
-+static int __init fsg_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+ static int pci_irq_table[FSG_PCI_IRQ_LINES] = {
-+ IRQ_FSG_PCI_INTC,
-+ IRQ_FSG_PCI_INTB,
-+ IRQ_FSG_PCI_INTA,
-+ };
-+
-+ int irq = -1;
-+ slot = slot - 11;
-+
-+ if (slot >= 1 && slot <= FSG_PCI_MAX_DEV &&
-+ pin >= 1 && pin <= FSG_PCI_IRQ_LINES)
-+ irq = pci_irq_table[(slot - 1)];
-+ printk(KERN_INFO "%s: Mapped slot %d pin %d to IRQ %d\n",
-+ __func__, slot, pin, irq);
-+
-+ return irq;
-+}
-+
-+struct hw_pci fsg_pci __initdata = {
-+ .nr_controllers = 1,
-+ .preinit = fsg_pci_preinit,
-+ .swizzle = pci_std_swizzle,
-+ .setup = ixp4xx_setup,
-+ .scan = ixp4xx_scan_bus,
-+ .map_irq = fsg_map_irq,
-+};
-+
-+int __init fsg_pci_init(void)
-+{
-+ if (machine_is_fsg())
-+ pci_common_init(&fsg_pci);
-+ return 0;
-+}
-+
-+subsys_initcall(fsg_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/fsg-setup.c
-@@ -0,0 +1,276 @@
-+/*
-+ * arch/arm/mach-ixp4xx/fsg-setup.c
-+ *
-+ * FSG board-setup
-+ *
-+ * Copyright (C) 2008 Rod Whitby <rod@whitby.id.au>
-+ *
-+ * based on ixdp425-setup.c:
-+ * Copyright (C) 2003-2004 MontaVista Software, Inc.
-+ * based on nslu2-power.c
-+ * Copyright (C) 2005 Tower Technologies
-+ *
-+ * Author: Rod Whitby <rod@whitby.id.au>
-+ * Maintainers: http://www.nslu2-linux.org/
-+ *
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/irq.h>
-+#include <linux/serial.h>
-+#include <linux/serial_8250.h>
-+#include <linux/leds.h>
-+#include <linux/reboot.h>
-+#include <linux/i2c.h>
-+#include <linux/i2c-gpio.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+#include <asm/io.h>
-+#include <asm/gpio.h>
-+
-+static struct flash_platform_data fsg_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource fsg_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device fsg_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &fsg_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &fsg_flash_resource,
-+};
-+
-+static struct i2c_gpio_platform_data fsg_i2c_gpio_data = {
-+ .sda_pin = FSG_SDA_PIN,
-+ .scl_pin = FSG_SCL_PIN,
-+};
-+
-+static struct platform_device fsg_i2c_gpio = {
-+ .name = "i2c-gpio",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &fsg_i2c_gpio_data,
-+ },
-+};
-+
-+static struct i2c_board_info __initdata fsg_i2c_board_info [] = {
-+ {
-+ I2C_BOARD_INFO("rtc-isl1208", 0x6f),
-+ },
-+};
-+
-+static struct resource fsg_uart_resources[] = {
-+ {
-+ .start = IXP4XX_UART1_BASE_PHYS,
-+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = IXP4XX_UART2_BASE_PHYS,
-+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+ }
-+};
-+
-+static struct plat_serial8250_port fsg_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART1_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART1,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ {
-+ .mapbase = IXP4XX_UART2_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART2,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { }
-+};
-+
-+static struct platform_device fsg_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev = {
-+ .platform_data = fsg_uart_data,
-+ },
-+ .num_resources = ARRAY_SIZE(fsg_uart_resources),
-+ .resource = fsg_uart_resources,
-+};
-+
-+static struct platform_device fsg_leds = {
-+ .name = "fsg-led",
-+ .id = -1,
-+};
-+
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info fsg_plat_eth[] = {
-+ {
-+ .phy = 5,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 4,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device fsg_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev = {
-+ .platform_data = fsg_plat_eth,
-+ },
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev = {
-+ .platform_data = fsg_plat_eth + 1,
-+ },
-+ }
-+};
-+
-+static struct platform_device *fsg_devices[] __initdata = {
-+ &fsg_i2c_gpio,
-+ &fsg_flash,
-+ &fsg_leds,
-+ &fsg_eth[0],
-+ &fsg_eth[1],
-+};
-+
-+static irqreturn_t fsg_power_handler(int irq, void *dev_id)
-+{
-+ /* Signal init to do the ctrlaltdel action, this will bypass init if
-+ * it hasn't started and do a kernel_restart.
-+ */
-+ ctrl_alt_del();
-+
-+ return IRQ_HANDLED;
-+}
-+
-+static irqreturn_t fsg_reset_handler(int irq, void *dev_id)
-+{
-+ /* This is the paper-clip reset which does an emergency reboot. */
-+ printk(KERN_INFO "Restarting system.\n");
-+ machine_restart(NULL);
-+
-+ /* This should never be reached. */
-+ return IRQ_HANDLED;
-+}
-+
-+static void __init fsg_init(void)
-+{
-+ DECLARE_MAC_BUF(mac_buf);
-+ uint8_t __iomem *f;
-+ int i;
-+
-+ ixp4xx_sys_init();
-+
-+ fsg_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ fsg_flash_resource.end =
-+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
-+
-+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+ /* Configure CS2 for operation, 8bit and writable */
-+ *IXP4XX_EXP_CS2 = 0xbfff0002;
-+
-+ i2c_register_board_info(0, fsg_i2c_board_info,
-+ ARRAY_SIZE(fsg_i2c_board_info));
-+
-+ /* This is only useful on a modified machine, but it is valuable
-+ * to have it first in order to see debug messages, and so that
-+ * it does *not* get removed if platform_add_devices fails!
-+ */
-+ (void)platform_device_register(&fsg_uart);
-+
-+ platform_add_devices(fsg_devices, ARRAY_SIZE(fsg_devices));
-+
-+ if (request_irq(gpio_to_irq(FSG_RB_GPIO), &fsg_reset_handler,
-+ IRQF_DISABLED | IRQF_TRIGGER_LOW,
-+ "FSG reset button", NULL) < 0) {
-+
-+ printk(KERN_DEBUG "Reset Button IRQ %d not available\n",
-+ gpio_to_irq(FSG_RB_GPIO));
-+ }
-+
-+ if (request_irq(gpio_to_irq(FSG_SB_GPIO), &fsg_power_handler,
-+ IRQF_DISABLED | IRQF_TRIGGER_LOW,
-+ "FSG power button", NULL) < 0) {
-+
-+ printk(KERN_DEBUG "Power Button IRQ %d not available\n",
-+ gpio_to_irq(FSG_SB_GPIO));
-+ }
-+
-+ /*
-+ * Map in a portion of the flash and read the MAC addresses.
-+ * Since it is stored in BE in the flash itself, we need to
-+ * byteswap it if we're in LE mode.
-+ */
-+ f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x400000);
-+ if (f) {
-+#ifdef __ARMEB__
-+ for (i = 0; i < 6; i++) {
-+ fsg_plat_eth[0].hwaddr[i] = readb(f + 0x3C0422 + i);
-+ fsg_plat_eth[1].hwaddr[i] = readb(f + 0x3C043B + i);
-+ }
-+#else
-+
-+ /*
-+ Endian-swapped reads from unaligned addresses are
-+ required to extract the two MACs from the big-endian
-+ Redboot config area in flash.
-+ */
-+
-+ fsg_plat_eth[0].hwaddr[0] = readb(f + 0x3C0421);
-+ fsg_plat_eth[0].hwaddr[1] = readb(f + 0x3C0420);
-+ fsg_plat_eth[0].hwaddr[2] = readb(f + 0x3C0427);
-+ fsg_plat_eth[0].hwaddr[3] = readb(f + 0x3C0426);
-+ fsg_plat_eth[0].hwaddr[4] = readb(f + 0x3C0425);
-+ fsg_plat_eth[0].hwaddr[5] = readb(f + 0x3C0424);
-+
-+ fsg_plat_eth[1].hwaddr[0] = readb(f + 0x3C0439);
-+ fsg_plat_eth[1].hwaddr[1] = readb(f + 0x3C043F);
-+ fsg_plat_eth[1].hwaddr[2] = readb(f + 0x3C043E);
-+ fsg_plat_eth[1].hwaddr[3] = readb(f + 0x3C043D);
-+ fsg_plat_eth[1].hwaddr[4] = readb(f + 0x3C043C);
-+ fsg_plat_eth[1].hwaddr[5] = readb(f + 0x3C0443);
-+#endif
-+ iounmap(f);
-+ }
-+ printk(KERN_INFO "FSG: Using MAC address %s for port 0\n",
-+ print_mac(mac_buf, fsg_plat_eth[0].hwaddr));
-+ printk(KERN_INFO "FSG: Using MAC address %s for port 1\n",
-+ print_mac(mac_buf, fsg_plat_eth[1].hwaddr));
-+
-+}
-+
-+MACHINE_START(FSG, "Freecom FSG-3")
-+ /* Maintainer: www.nslu2-linux.org */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = fsg_init,
-+MACHINE_END
-+
---- /dev/null
-+++ b/include/asm-arm/arch-ixp4xx/fsg.h
-@@ -0,0 +1,50 @@
-+/*
-+ * include/asm-arm/arch-ixp4xx/fsg.h
-+ *
-+ * Freecom FSG-3 platform specific definitions
-+ *
-+ * Author: Rod Whitby <rod@whitby.id.au>
-+ * Author: Tomasz Chmielewski <mangoo@wpkg.org>
-+ * Maintainers: http://www.nslu2-linux.org
-+ *
-+ * Based on coyote.h by
-+ * Copyright 2004 (c) MontaVista, Software, Inc.
-+ *
-+ * This file is licensed under the terms of the GNU General Public
-+ * License version 2. This program is licensed "as is" without any
-+ * warranty of any kind, whether express or implied.
-+ */
-+
-+#ifndef __ASM_ARCH_HARDWARE_H__
-+#error "Do not include this directly, instead #include <asm/hardware.h>"
-+#endif
-+
-+#define FSG_SDA_PIN 12
-+#define FSG_SCL_PIN 13
-+
-+/*
-+ * FSG PCI IRQs
-+ */
-+#define FSG_PCI_MAX_DEV 3
-+#define FSG_PCI_IRQ_LINES 3
-+
-+
-+/* PCI controller GPIO to IRQ pin mappings */
-+#define FSG_PCI_INTA_PIN 6
-+#define FSG_PCI_INTB_PIN 7
-+#define FSG_PCI_INTC_PIN 5
-+
-+/* Buttons */
-+
-+#define FSG_SB_GPIO 4 /* sync button */
-+#define FSG_RB_GPIO 9 /* reset button */
-+#define FSG_UB_GPIO 10 /* usb button */
-+
-+/* LEDs */
-+
-+#define FSG_LED_WLAN_BIT 0
-+#define FSG_LED_WAN_BIT 1
-+#define FSG_LED_SATA_BIT 2
-+#define FSG_LED_USB_BIT 4
-+#define FSG_LED_RING_BIT 5
-+#define FSG_LED_SYNC_BIT 7
---- a/include/asm-arm/arch-ixp4xx/hardware.h
-+++ b/include/asm-arm/arch-ixp4xx/hardware.h
-@@ -45,5 +45,6 @@
- #include "nslu2.h"
- #include "nas100d.h"
- #include "dsmg600.h"
-+#include "fsg.h"
-
- #endif /* _ASM_ARCH_HARDWARE_H */
---- a/include/asm-arm/arch-ixp4xx/irqs.h
-+++ b/include/asm-arm/arch-ixp4xx/irqs.h
-@@ -128,4 +128,11 @@
- #define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7
- #define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6
-
-+/*
-+ * Freecom FSG-3 Board IRQs
-+ */
-+#define IRQ_FSG_PCI_INTA IRQ_IXP4XX_GPIO6
-+#define IRQ_FSG_PCI_INTB IRQ_IXP4XX_GPIO7
-+#define IRQ_FSG_PCI_INTC IRQ_IXP4XX_GPIO5
-+
- #endif
+++ /dev/null
-From a66e34fefb3f8142d7f16808563eb610225f6e77 Mon Sep 17 00:00:00 2001
-From: Rod Whitby <rod@whitby.id.au>
-Date: Tue, 29 Jan 2008 23:17:42 +1030
-Subject: [PATCH] leds: Add new driver for the LEDs on the Freecom FSG-3
-
-The LEDs on the Freecom FSG-3 are connected to an external
-memory-mapped latch on the ixp4xx expansion bus, and therefore cannot
-be supported by any of the existing LEDs drivers.
-
-Signed-off-by: Rod Whitby <rod@whitby.id.au>
---
-PATCH FOLLOWS
-KernelVersion: v2.6.25-rc6-117-g457fb60
----
- drivers/leds/Kconfig | 6 +
- drivers/leds/Makefile | 1 +
- drivers/leds/leds-fsg.c | 261 +++++++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 268 insertions(+), 0 deletions(-)
- create mode 100644 drivers/leds/leds-fsg.c
-
---- a/drivers/leds/Kconfig
-+++ b/drivers/leds/Kconfig
-@@ -46,6 +46,12 @@
- This option enables support for the LEDs on Sharp Zaurus
- SL-Cxx00 series (C1000, C3000, C3100).
-
-+config LEDS_FSG
-+ tristate "LED Support for the Freecom FSG-3"
-+ depends on LEDS_CLASS && MACH_FSG
-+ help
-+ This option enables support for the LEDs on the Freecom FSG-3.
-+
- config LEDS_TOSA
- tristate "LED Support for the Sharp SL-6000 series"
- depends on LEDS_CLASS && PXA_SHARPSL
---- a/drivers/leds/Makefile
-+++ b/drivers/leds/Makefile
-@@ -22,6 +22,7 @@
- obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o
- obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-clevo-mail.o
- obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o
-+obj-$(CONFIG_LEDS_FSG) += leds-fsg.o
-
- # LED Triggers
- obj-$(CONFIG_LEDS_TRIGGER_TIMER) += ledtrig-timer.o
---- /dev/null
-+++ b/drivers/leds/leds-fsg.c
-@@ -0,0 +1,261 @@
-+/*
-+ * LED Driver for the Freecom FSG-3
-+ *
-+ * Copyright (c) 2008 Rod Whitby <rod@whitby.id.au>
-+ *
-+ * Author: Rod Whitby <rod@whitby.id.au>
-+ *
-+ * Based on leds-spitz.c
-+ * Copyright 2005-2006 Openedhand Ltd.
-+ * Author: Richard Purdie <rpurdie@openedhand.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/leds.h>
-+#include <asm/arch/hardware.h>
-+#include <asm/io.h>
-+
-+static short __iomem *latch_address;
-+static unsigned short latch_value;
-+
-+
-+static void fsg_led_wlan_set(struct led_classdev *led_cdev,
-+ enum led_brightness value)
-+{
-+ if (value) {
-+ latch_value &= ~(1 << FSG_LED_WLAN_BIT);
-+ *latch_address = latch_value;
-+ } else {
-+ latch_value |= (1 << FSG_LED_WLAN_BIT);
-+ *latch_address = latch_value;
-+ }
-+}
-+
-+static void fsg_led_wan_set(struct led_classdev *led_cdev,
-+ enum led_brightness value)
-+{
-+ if (value) {
-+ latch_value &= ~(1 << FSG_LED_WAN_BIT);
-+ *latch_address = latch_value;
-+ } else {
-+ latch_value |= (1 << FSG_LED_WAN_BIT);
-+ *latch_address = latch_value;
-+ }
-+}
-+
-+static void fsg_led_sata_set(struct led_classdev *led_cdev,
-+ enum led_brightness value)
-+{
-+ if (value) {
-+ latch_value &= ~(1 << FSG_LED_SATA_BIT);
-+ *latch_address = latch_value;
-+ } else {
-+ latch_value |= (1 << FSG_LED_SATA_BIT);
-+ *latch_address = latch_value;
-+ }
-+}
-+
-+static void fsg_led_usb_set(struct led_classdev *led_cdev,
-+ enum led_brightness value)
-+{
-+ if (value) {
-+ latch_value &= ~(1 << FSG_LED_USB_BIT);
-+ *latch_address = latch_value;
-+ } else {
-+ latch_value |= (1 << FSG_LED_USB_BIT);
-+ *latch_address = latch_value;
-+ }
-+}
-+
-+static void fsg_led_sync_set(struct led_classdev *led_cdev,
-+ enum led_brightness value)
-+{
-+ if (value) {
-+ latch_value &= ~(1 << FSG_LED_SYNC_BIT);
-+ *latch_address = latch_value;
-+ } else {
-+ latch_value |= (1 << FSG_LED_SYNC_BIT);
-+ *latch_address = latch_value;
-+ }
-+}
-+
-+static void fsg_led_ring_set(struct led_classdev *led_cdev,
-+ enum led_brightness value)
-+{
-+ if (value) {
-+ latch_value &= ~(1 << FSG_LED_RING_BIT);
-+ *latch_address = latch_value;
-+ } else {
-+ latch_value |= (1 << FSG_LED_RING_BIT);
-+ *latch_address = latch_value;
-+ }
-+}
-+
-+
-+
-+static struct led_classdev fsg_wlan_led = {
-+ .name = "fsg:blue:wlan",
-+ .brightness_set = fsg_led_wlan_set,
-+};
-+
-+static struct led_classdev fsg_wan_led = {
-+ .name = "fsg:blue:wan",
-+ .brightness_set = fsg_led_wan_set,
-+};
-+
-+static struct led_classdev fsg_sata_led = {
-+ .name = "fsg:blue:sata",
-+ .brightness_set = fsg_led_sata_set,
-+};
-+
-+static struct led_classdev fsg_usb_led = {
-+ .name = "fsg:blue:usb",
-+ .brightness_set = fsg_led_usb_set,
-+};
-+
-+static struct led_classdev fsg_sync_led = {
-+ .name = "fsg:blue:sync",
-+ .brightness_set = fsg_led_sync_set,
-+};
-+
-+static struct led_classdev fsg_ring_led = {
-+ .name = "fsg:blue:ring",
-+ .brightness_set = fsg_led_ring_set,
-+};
-+
-+
-+
-+#ifdef CONFIG_PM
-+static int fsg_led_suspend(struct platform_device *dev, pm_message_t state)
-+{
-+ led_classdev_suspend(&fsg_wlan_led);
-+ led_classdev_suspend(&fsg_wan_led);
-+ led_classdev_suspend(&fsg_sata_led);
-+ led_classdev_suspend(&fsg_usb_led);
-+ led_classdev_suspend(&fsg_sync_led);
-+ led_classdev_suspend(&fsg_ring_led);
-+ return 0;
-+}
-+
-+static int fsg_led_resume(struct platform_device *dev)
-+{
-+ led_classdev_resume(&fsg_wlan_led);
-+ led_classdev_resume(&fsg_wan_led);
-+ led_classdev_resume(&fsg_sata_led);
-+ led_classdev_resume(&fsg_usb_led);
-+ led_classdev_resume(&fsg_sync_led);
-+ led_classdev_resume(&fsg_ring_led);
-+ return 0;
-+}
-+#endif
-+
-+
-+static int fsg_led_probe(struct platform_device *pdev)
-+{
-+ int ret;
-+
-+ ret = led_classdev_register(&pdev->dev, &fsg_wlan_led);
-+ if (ret < 0)
-+ goto failwlan;
-+
-+ ret = led_classdev_register(&pdev->dev, &fsg_wan_led);
-+ if (ret < 0)
-+ goto failwan;
-+
-+ ret = led_classdev_register(&pdev->dev, &fsg_sata_led);
-+ if (ret < 0)
-+ goto failsata;
-+
-+ ret = led_classdev_register(&pdev->dev, &fsg_usb_led);
-+ if (ret < 0)
-+ goto failusb;
-+
-+ ret = led_classdev_register(&pdev->dev, &fsg_sync_led);
-+ if (ret < 0)
-+ goto failsync;
-+
-+ ret = led_classdev_register(&pdev->dev, &fsg_ring_led);
-+ if (ret < 0)
-+ goto failring;
-+
-+ /* Map the LED chip select address space */
-+ latch_address = (unsigned short *) ioremap(IXP4XX_EXP_BUS_BASE(2), 512);
-+ if (!latch_address) {
-+ ret = -ENOMEM;
-+ goto failremap;
-+ }
-+
-+ latch_value = 0xffff;
-+ *latch_address = latch_value;
-+
-+ return ret;
-+
-+ failremap:
-+ led_classdev_unregister(&fsg_ring_led);
-+ failring:
-+ led_classdev_unregister(&fsg_sync_led);
-+ failsync:
-+ led_classdev_unregister(&fsg_usb_led);
-+ failusb:
-+ led_classdev_unregister(&fsg_sata_led);
-+ failsata:
-+ led_classdev_unregister(&fsg_wan_led);
-+ failwan:
-+ led_classdev_unregister(&fsg_wlan_led);
-+ failwlan:
-+
-+ return ret;
-+}
-+
-+static int fsg_led_remove(struct platform_device *pdev)
-+{
-+ iounmap(latch_address);
-+
-+ led_classdev_unregister(&fsg_wlan_led);
-+ led_classdev_unregister(&fsg_wan_led);
-+ led_classdev_unregister(&fsg_sata_led);
-+ led_classdev_unregister(&fsg_usb_led);
-+ led_classdev_unregister(&fsg_sync_led);
-+ led_classdev_unregister(&fsg_ring_led);
-+
-+ return 0;
-+}
-+
-+
-+static struct platform_driver fsg_led_driver = {
-+ .probe = fsg_led_probe,
-+ .remove = fsg_led_remove,
-+#ifdef CONFIG_PM
-+ .suspend = fsg_led_suspend,
-+ .resume = fsg_led_resume,
-+#endif
-+ .driver = {
-+ .name = "fsg-led",
-+ },
-+};
-+
-+
-+static int __init fsg_led_init(void)
-+{
-+ return platform_driver_register(&fsg_led_driver);
-+}
-+
-+static void __exit fsg_led_exit(void)
-+{
-+ platform_driver_unregister(&fsg_led_driver);
-+}
-+
-+
-+module_init(fsg_led_init);
-+module_exit(fsg_led_exit);
-+
-+MODULE_AUTHOR("Rod Whitby <rod@whitby.id.au>");
-+MODULE_DESCRIPTION("Freecom FSG-3 LED driver");
-+MODULE_LICENSE("GPL");
+++ /dev/null
---- a/drivers/char/random.c
-+++ b/drivers/char/random.c
-@@ -248,9 +248,9 @@
- /*
- * Configuration information
- */
--#define INPUT_POOL_WORDS 128
--#define OUTPUT_POOL_WORDS 32
--#define SEC_XFER_SIZE 512
-+#define INPUT_POOL_WORDS 256
-+#define OUTPUT_POOL_WORDS 64
-+#define SEC_XFER_SIZE 1024
-
- /*
- * The minimum number of bits of entropy before we wake up a read on
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/gateway7001-setup.c
-+++ b/arch/arm/mach-ixp4xx/gateway7001-setup.c
-@@ -76,9 +76,36 @@
- .resource = &gateway7001_uart_resource,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info gateway7001_plat_eth[] = {
-+ {
-+ .phy = 1,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 2,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device gateway7001_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = gateway7001_plat_eth,
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = gateway7001_plat_eth + 1,
-+ }
-+};
-+
- static struct platform_device *gateway7001_devices[] __initdata = {
- &gateway7001_flash,
-- &gateway7001_uart
-+ &gateway7001_uart,
-+ &gateway7001_eth[0],
-+ &gateway7001_eth[1],
- };
-
- static void __init gateway7001_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/wg302v2-setup.c
-+++ b/arch/arm/mach-ixp4xx/wg302v2-setup.c
-@@ -77,9 +77,27 @@
- .resource = &wg302v2_uart_resource,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info wg302_plat_eth[] = {
-+ {
-+ .phy = 8,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }
-+};
-+
-+static struct platform_device wg302_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = wg302_plat_eth,
-+ }
-+};
-+
- static struct platform_device *wg302v2_devices[] __initdata = {
- &wg302v2_flash,
- &wg302v2_uart,
-+ &wg302_eth[0],
- };
-
- static void __init wg302v2_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -57,6 +57,14 @@
- WG302 v2 or WAG302 v2 Access Points. For more information
- on this platform, see http://openwrt.org
-
-+config MACH_PRONGHORNMETRO
-+ bool "Pronghorn Metro"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support the ADI
-+ Engineering Pronghorn Metro Platform. For more
-+ information on this platform, see <file:Documentation/arm/IXP4xx>.
-+
- config ARCH_IXDP425
- bool "IXDP425"
- help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -16,6 +16,7 @@
- obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
- obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
- obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
-+obj-pci-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-pci.o
-
- obj-y += common.o
-
-@@ -30,6 +31,7 @@
- obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
- obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
- obj-$(CONFIG_MACH_FSG) += fsg-setup.o
-+obj-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-setup.o
-
- obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/pronghornmetro-pci.c
-@@ -0,0 +1,74 @@
-+/*
-+ * arch/arch/mach-ixp4xx/pronghornmetro-pci.c
-+ *
-+ * PCI setup routines for ADI Engineering Pronghorn Metro
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ * Copyright (C) 2002 Jungo Software Technologies.
-+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/pci.h>
-+
-+extern void ixp4xx_pci_preinit(void);
-+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
-+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
-+
-+void __init pronghornmetro_pci_preinit(void)
-+{
-+ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO1, IRQT_LOW);
-+
-+ ixp4xx_pci_preinit();
-+}
-+
-+static int __init pronghornmetro_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+ if (slot == 13)
-+ return IRQ_IXP4XX_GPIO4;
-+ else if (slot == 14)
-+ return IRQ_IXP4XX_GPIO6;
-+ else if (slot == 15)
-+ return IRQ_IXP4XX_GPIO11;
-+ else if (slot == 16)
-+ return IRQ_IXP4XX_GPIO1;
-+ else return -1;
-+}
-+
-+struct hw_pci pronghornmetro_pci __initdata = {
-+ .nr_controllers = 1,
-+ .preinit = pronghornmetro_pci_preinit,
-+ .swizzle = pci_std_swizzle,
-+ .setup = ixp4xx_setup,
-+ .scan = ixp4xx_scan_bus,
-+ .map_irq = pronghornmetro_map_irq,
-+};
-+
-+int __init pronghornmetro_pci_init(void)
-+{
-+ if (machine_is_pronghorn_metro())
-+ pci_common_init(&pronghornmetro_pci);
-+ return 0;
-+}
-+
-+subsys_initcall(pronghornmetro_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/pronghornmetro-setup.c
-@@ -0,0 +1,147 @@
-+/*
-+ * arch/arm/mach-ixp4xx/pronghornmetro-setup.c
-+ *
-+ * Board setup for the ADI Engineering Pronghorn Metro
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data pronghornmetro_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource pronghornmetro_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device pronghornmetro_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &pronghornmetro_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &pronghornmetro_flash_resource,
-+};
-+
-+static struct resource pronghornmetro_uart_resource = {
-+ .start = IXP4XX_UART2_BASE_PHYS,
-+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port pronghornmetro_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART2_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART2,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device pronghornmetro_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev = {
-+ .platform_data = pronghornmetro_uart_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &pronghornmetro_uart_resource,
-+};
-+
-+static struct resource pronghornmetro_pata_resources[] = {
-+ {
-+ .flags = IORESOURCE_MEM
-+ },
-+ {
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .name = "intrq",
-+ .start = IRQ_IXP4XX_GPIO0,
-+ .end = IRQ_IXP4XX_GPIO0,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct ixp4xx_pata_data pronghornmetro_pata_data = {
-+ .cs0_bits = 0xbfff0043,
-+ .cs1_bits = 0xbfff0043,
-+};
-+
-+static struct platform_device pronghornmetro_pata = {
-+ .name = "pata_ixp4xx_cf",
-+ .id = 0,
-+ .dev.platform_data = &pronghornmetro_pata_data,
-+ .num_resources = ARRAY_SIZE(pronghornmetro_pata_resources),
-+ .resource = pronghornmetro_pata_resources,
-+};
-+
-+static struct platform_device *pronghornmetro_devices[] __initdata = {
-+ &pronghornmetro_flash,
-+ &pronghornmetro_uart,
-+};
-+
-+static void __init pronghornmetro_init(void)
-+{
-+ ixp4xx_sys_init();
-+
-+ pronghornmetro_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ pronghornmetro_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_16M - 1;
-+
-+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+ platform_add_devices(pronghornmetro_devices, ARRAY_SIZE(pronghornmetro_devices));
-+
-+ pronghornmetro_pata_resources[0].start = IXP4XX_EXP_BUS_BASE(1);
-+ pronghornmetro_pata_resources[0].end = IXP4XX_EXP_BUS_END(1);
-+
-+ pronghornmetro_pata_resources[1].start = IXP4XX_EXP_BUS_BASE(2);
-+ pronghornmetro_pata_resources[1].end = IXP4XX_EXP_BUS_END(2);
-+
-+ pronghornmetro_pata_data.cs0_cfg = IXP4XX_EXP_CS1;
-+ pronghornmetro_pata_data.cs1_cfg = IXP4XX_EXP_CS2;
-+
-+ platform_device_register(&pronghornmetro_pata);
-+}
-+
-+#ifdef CONFIG_MACH_PRONGHORNMETRO
-+MACHINE_START(PRONGHORNMETRO, "ADI Engineering Pronghorn Metro")
-+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = pronghornmetro_init,
-+MACHINE_END
-+#endif
---- a/Documentation/arm/IXP4xx
-+++ b/Documentation/arm/IXP4xx
-@@ -111,6 +111,9 @@
- the platform has two mini-PCI slots used for 802.11[bga] cards.
- Finally, there is an IDE port hanging off the expansion bus.
-
-+ADI Engineering Pronghorn Metro Platform
-+http://www.adiengineering.com/php-bin/ecomm4/productDisplay.php?category_id=30&product_id=85
-+
- Gateworks Avila Network Platform
- http://www.gateworks.com/avila_sbc.htm
-
---- a/include/asm-arm/arch-ixp4xx/uncompress.h
-+++ b/include/asm-arm/arch-ixp4xx/uncompress.h
-@@ -41,7 +41,8 @@
- * Some boards are using UART2 as console
- */
- if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
-- machine_is_gateway7001() || machine_is_wg302v2())
-+ machine_is_gateway7001() || machine_is_wg302v2() ||
-+ machine_is_pronghorn_metro())
- uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
- else
- uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/pronghornmetro-setup.c
-+++ b/arch/arm/mach-ixp4xx/pronghornmetro-setup.c
-@@ -104,9 +104,36 @@
- .resource = pronghornmetro_pata_resources,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info pronghornmetro_plat_eth[] = {
-+ {
-+ .phy = 0,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 1,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device pronghornmetro_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = pronghornmetro_plat_eth,
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = pronghornmetro_plat_eth + 1,
-+ }
-+};
-+
- static struct platform_device *pronghornmetro_devices[] __initdata = {
- &pronghornmetro_flash,
- &pronghornmetro_uart,
-+ &pronghornmetro_eth[0],
-+ &pronghornmetro_eth[1],
- };
-
- static void __init pronghornmetro_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -65,6 +65,14 @@
- Engineering Pronghorn Metro Platform. For more
- information on this platform, see <file:Documentation/arm/IXP4xx>.
-
-+config MACH_COMPEX
-+ bool "Compex WP18 / NP18A"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support Compex'
-+ WP18 or NP18A boards. For more information on this
-+ platform, see http://openwrt.org
-+
- config ARCH_IXDP425
- bool "IXDP425"
- help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -17,6 +17,7 @@
- obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
- obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
- obj-pci-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-pci.o
-+obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o
-
- obj-y += common.o
-
-@@ -32,6 +33,7 @@
- obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
- obj-$(CONFIG_MACH_FSG) += fsg-setup.o
- obj-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-setup.o
-+obj-$(CONFIG_MACH_COMPEX) += compex-setup.o
-
- obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/compex-setup.c
-@@ -0,0 +1,120 @@
-+/*
-+ * arch/arm/mach-ixp4xx/compex-setup.c
-+ *
-+ * Ccompex WP18 / NP18A board-setup
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on ixdp425-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <asm/hardware.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data compex_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource compex_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device compex_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &compex_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &compex_flash_resource,
-+};
-+
-+static struct resource compex_uart_resources[] = {
-+ {
-+ .start = IXP4XX_UART1_BASE_PHYS,
-+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM
-+ },
-+ {
-+ .start = IXP4XX_UART2_BASE_PHYS,
-+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM
-+ }
-+};
-+
-+static struct plat_serial8250_port compex_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART1_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART1,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ {
-+ .mapbase = IXP4XX_UART2_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART2,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device compex_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev.platform_data = compex_uart_data,
-+ .num_resources = 2,
-+ .resource = compex_uart_resources,
-+};
-+
-+static struct platform_device *compex_devices[] __initdata = {
-+ &compex_flash,
-+ &compex_uart
-+};
-+
-+static void __init compex_init(void)
-+{
-+ ixp4xx_sys_init();
-+
-+ compex_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ compex_flash_resource.end =
-+ IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+ platform_add_devices(compex_devices, ARRAY_SIZE(compex_devices));
-+}
-+
-+#ifdef CONFIG_MACH_COMPEX
-+MACHINE_START(COMPEX, "Compex WP18 / NP18A")
-+ /* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = compex_init,
-+MACHINE_END
-+#endif
---- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
-+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
-@@ -66,7 +66,7 @@
- int __init ixdp425_pci_init(void)
- {
- if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
-- machine_is_ixdp465() || machine_is_kixrp435())
-+ machine_is_ixdp465() || machine_is_kixrp435() || machine_is_compex())
- pci_common_init(&ixdp425_pci);
- return 0;
- }
---- a/arch/arm/tools/mach-types
-+++ b/arch/arm/tools/mach-types
-@@ -1276,7 +1276,7 @@
- smdk6400 MACH_SMDK6400 SMDK6400 1270
- nokia_n800 MACH_NOKIA_N800 NOKIA_N800 1271
- greenphone MACH_GREENPHONE GREENPHONE 1272
--compex42x MACH_COMPEXWP18 COMPEXWP18 1273
-+compex MACH_COMPEX COMPEX 1273
- xmate MACH_XMATE XMATE 1274
- energizer MACH_ENERGIZER ENERGIZER 1275
- ime1 MACH_IME1 IME1 1276
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/compex-setup.c
-+++ b/arch/arm/mach-ixp4xx/compex-setup.c
-@@ -90,9 +90,36 @@
- .resource = compex_uart_resources,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info compex_plat_eth[] = {
-+ {
-+ .phy = -1,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 3,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device compex_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = compex_plat_eth,
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = compex_plat_eth + 1,
-+ }
-+};
-+
- static struct platform_device *compex_devices[] __initdata = {
- &compex_flash,
-- &compex_uart
-+ &compex_uart,
-+ &compex_eth[0],
-+ &compex_eth[1],
- };
-
- static void __init compex_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -73,6 +73,14 @@
- WP18 or NP18A boards. For more information on this
- platform, see http://openwrt.org
-
-+config MACH_WRT300NV2
-+ bool "Linksys WRT300N v2"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support Linksys'
-+ WRT300N v2 router. For more information on this
-+ platform, see http://openwrt.org
-+
- config ARCH_IXDP425
- bool "IXDP425"
- help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -18,6 +18,7 @@
- obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
- obj-pci-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-pci.o
- obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o
-+obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o
-
- obj-y += common.o
-
-@@ -34,6 +35,7 @@
- obj-$(CONFIG_MACH_FSG) += fsg-setup.o
- obj-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-setup.o
- obj-$(CONFIG_MACH_COMPEX) += compex-setup.o
-+obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o
-
- obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wrt300nv2-pci.c
-@@ -0,0 +1,65 @@
-+/*
-+ * arch/arch/mach-ixp4xx/wrt300nv2-pci.c
-+ *
-+ * PCI setup routines for Linksys WRT300N v2
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ * Copyright (C) 2002 Jungo Software Technologies.
-+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/pci.h>
-+
-+extern void ixp4xx_pci_preinit(void);
-+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
-+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
-+
-+void __init wrt300nv2_pci_preinit(void)
-+{
-+ set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW);
-+
-+ ixp4xx_pci_preinit();
-+}
-+
-+static int __init wrt300nv2_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+ if (slot == 1)
-+ return IRQ_IXP4XX_GPIO8;
-+ else return -1;
-+}
-+
-+struct hw_pci wrt300nv2_pci __initdata = {
-+ .nr_controllers = 1,
-+ .preinit = wrt300nv2_pci_preinit,
-+ .swizzle = pci_std_swizzle,
-+ .setup = ixp4xx_setup,
-+ .scan = ixp4xx_scan_bus,
-+ .map_irq = wrt300nv2_map_irq,
-+};
-+
-+int __init wrt300nv2_pci_init(void)
-+{
-+ if (machine_is_wrt300nv2())
-+ pci_common_init(&wrt300nv2_pci);
-+ return 0;
-+}
-+
-+subsys_initcall(wrt300nv2_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-@@ -0,0 +1,108 @@
-+/*
-+ * arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-+ *
-+ * Board setup for the Linksys WRT300N v2
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data wrt300nv2_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource wrt300nv2_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device wrt300nv2_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &wrt300nv2_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &wrt300nv2_flash_resource,
-+};
-+
-+static struct resource wrt300nv2_uart_resource = {
-+ .start = IXP4XX_UART2_BASE_PHYS,
-+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port wrt300nv2_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART2_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART2,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device wrt300nv2_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev = {
-+ .platform_data = wrt300nv2_uart_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &wrt300nv2_uart_resource,
-+};
-+
-+static struct platform_device *wrt300nv2_devices[] __initdata = {
-+ &wrt300nv2_flash,
-+ &wrt300nv2_uart
-+};
-+
-+static void __init wrt300nv2_init(void)
-+{
-+ ixp4xx_sys_init();
-+
-+ wrt300nv2_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ wrt300nv2_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+ platform_add_devices(wrt300nv2_devices, ARRAY_SIZE(wrt300nv2_devices));
-+}
-+
-+#ifdef CONFIG_MACH_WRT300NV2
-+MACHINE_START(WRT300NV2, "Linksys WRT300N v2")
-+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = wrt300nv2_init,
-+MACHINE_END
-+#endif
---- a/include/asm-arm/arch-ixp4xx/uncompress.h
-+++ b/include/asm-arm/arch-ixp4xx/uncompress.h
-@@ -42,7 +42,7 @@
- */
- if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
- machine_is_gateway7001() || machine_is_wg302v2() ||
-- machine_is_pronghorn_metro())
-+ machine_is_pronghorn_metro() || machine_is_wrt300nv2())
- uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
- else
- uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-+++ b/arch/arm/mach-ixp4xx/wrt300nv2-setup.c
-@@ -76,9 +76,36 @@
- .resource = &wrt300nv2_uart_resource,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info wrt300nv2_plat_eth[] = {
-+ {
-+ .phy = -1,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 1,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device wrt300nv2_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = wrt300nv2_plat_eth,
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = wrt300nv2_plat_eth + 1,
-+ }
-+};
-+
- static struct platform_device *wrt300nv2_devices[] __initdata = {
- &wrt300nv2_flash,
-- &wrt300nv2_uart
-+ &wrt300nv2_uart,
-+ &wrt300nv2_eth[0],
-+ &wrt300nv2_eth[1],
- };
-
- static void __init wrt300nv2_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -65,6 +65,14 @@
- Engineering Pronghorn Metro Platform. For more
- information on this platform, see <file:Documentation/arm/IXP4xx>.
-
-+config MACH_SIDEWINDER
-+ bool "Sidewinder"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support the ADI
-+ Engineering Sidewinder Platform. For more
-+ information on this platform, see <file:Documentation/arm/IXP4xx>.
-+
- config MACH_COMPEX
- bool "Compex WP18 / NP18A"
- select PCI
-@@ -163,7 +171,7 @@
- #
- config CPU_IXP46X
- bool
-- depends on MACH_IXDP465
-+ depends on MACH_IXDP465 || MACH_SIDEWINDER
- default y
-
- config CPU_IXP43X
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -19,6 +19,7 @@
- obj-pci-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-pci.o
- obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o
-+obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o
-
- obj-y += common.o
-
-@@ -36,6 +37,7 @@
- obj-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-setup.o
- obj-$(CONFIG_MACH_COMPEX) += compex-setup.o
- obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o
-+obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o
-
- obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/sidewinder-pci.c
-@@ -0,0 +1,71 @@
-+/*
-+ * arch/arch/mach-ixp4xx/pronghornmetro-pci.c
-+ *
-+ * PCI setup routines for ADI Engineering Sidewinder
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ * Copyright (C) 2002 Jungo Software Technologies.
-+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/pci.h>
-+
-+extern void ixp4xx_pci_preinit(void);
-+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
-+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
-+
-+void __init sidewinder_pci_preinit(void)
-+{
-+ set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW);
-+
-+ ixp4xx_pci_preinit();
-+}
-+
-+static int __init sidewinder_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+ if (slot == 1)
-+ return IRQ_IXP4XX_GPIO11;
-+ else if (slot == 2)
-+ return IRQ_IXP4XX_GPIO10;
-+ else if (slot == 3)
-+ return IRQ_IXP4XX_GPIO9;
-+ else return -1;
-+}
-+
-+struct hw_pci sidewinder_pci __initdata = {
-+ .nr_controllers = 1,
-+ .preinit = sidewinder_pci_preinit,
-+ .swizzle = pci_std_swizzle,
-+ .setup = ixp4xx_setup,
-+ .scan = ixp4xx_scan_bus,
-+ .map_irq = sidewinder_map_irq,
-+};
-+
-+int __init sidewinder_pci_init(void)
-+{
-+ if (machine_is_sidewinder())
-+ pci_common_init(&sidewinder_pci);
-+ return 0;
-+}
-+
-+subsys_initcall(sidewinder_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/sidewinder-setup.c
-@@ -0,0 +1,115 @@
-+/*
-+ * arch/arm/mach-ixp4xx/sidewinder-setup.c
-+ *
-+ * Board setup for the ADI Engineering Sidewinder
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/serial.h>
-+#include <linux/serial_8250.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data sidewinder_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource sidewinder_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device sidewinder_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &sidewinder_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &sidewinder_flash_resource,
-+};
-+
-+static struct resource sidewinder_uart_resources[] = {
-+ {
-+ .start = IXP4XX_UART1_BASE_PHYS,
-+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = IXP4XX_UART2_BASE_PHYS,
-+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+ }
-+};
-+
-+static struct plat_serial8250_port sidewinder_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART1_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART1,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ {
-+ .mapbase = IXP4XX_UART2_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART2,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device sidewinder_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev = {
-+ .platform_data = sidewinder_uart_data,
-+ },
-+ .num_resources = ARRAY_SIZE(sidewinder_uart_resources),
-+ .resource = sidewinder_uart_resources,
-+};
-+
-+static struct platform_device *sidewinder_devices[] __initdata = {
-+ &sidewinder_flash,
-+ &sidewinder_uart,
-+};
-+
-+static void __init sidewinder_init(void)
-+{
-+ ixp4xx_sys_init();
-+
-+ sidewinder_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ sidewinder_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_64M - 1;
-+
-+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+ platform_add_devices(sidewinder_devices, ARRAY_SIZE(sidewinder_devices));
-+}
-+
-+#ifdef CONFIG_MACH_SIDEWINDER
-+MACHINE_START(SIDEWINDER, "ADI Engineering Sidewinder")
-+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = sidewinder_init,
-+MACHINE_END
-+#endif
+++ /dev/null
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/ap1000-setup.c
-@@ -0,0 +1,151 @@
-+/*
-+ * arch/arm/mach-ixp4xx/ap1000-setup.c
-+ *
-+ * Lanready AP-1000
-+ *
-+ * Copyright (C) 2007 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on ixdp425-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <asm/hardware.h>
-+#include <asm/mach-types.h>
-+#include <asm/irq.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data ap1000_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource ap1000_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device ap1000_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &ap1000_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &ap1000_flash_resource,
-+};
-+
-+static struct resource ap1000_uart_resources[] = {
-+ {
-+ .start = IXP4XX_UART1_BASE_PHYS,
-+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM
-+ },
-+ {
-+ .start = IXP4XX_UART2_BASE_PHYS,
-+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM
-+ }
-+};
-+
-+static struct plat_serial8250_port ap1000_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART1_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART1,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ {
-+ .mapbase = IXP4XX_UART2_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART2,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device ap1000_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev.platform_data = ap1000_uart_data,
-+ .num_resources = 2,
-+ .resource = ap1000_uart_resources
-+};
-+
-+static struct platform_device *ap1000_devices[] __initdata = {
-+ &ap1000_flash,
-+ &ap1000_uart
-+};
-+
-+static char ap1000_mem_fixup[] __initdata = "mem=64M ";
-+
-+static void __init ap1000_fixup(struct machine_desc *desc,
-+ struct tag *tags, char **cmdline, struct meminfo *mi)
-+
-+{
-+ struct tag *t = tags;
-+ char *p = *cmdline;
-+
-+ /* Find the end of the tags table, taking note of any cmdline tag. */
-+ for (; t->hdr.size; t = tag_next(t)) {
-+ if (t->hdr.tag == ATAG_CMDLINE) {
-+ p = t->u.cmdline.cmdline;
-+ }
-+ }
-+
-+ /* Overwrite the end of the table with a new cmdline tag. */
-+ t->hdr.tag = ATAG_CMDLINE;
-+ t->hdr.size = (sizeof (struct tag_header) +
-+ strlen(ap1000_mem_fixup) + strlen(p) + 1 + 4) >> 2;
-+ strlcpy(t->u.cmdline.cmdline, ap1000_mem_fixup, COMMAND_LINE_SIZE);
-+ strlcpy(t->u.cmdline.cmdline + strlen(ap1000_mem_fixup), p,
-+ COMMAND_LINE_SIZE - strlen(ap1000_mem_fixup));
-+
-+ /* Terminate the table. */
-+ t = tag_next(t);
-+ t->hdr.tag = ATAG_NONE;
-+ t->hdr.size = 0;
-+}
-+
-+static void __init ap1000_init(void)
-+{
-+ ixp4xx_sys_init();
-+
-+ ap1000_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ ap1000_flash_resource.end =
-+ IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
-+
-+ platform_add_devices(ap1000_devices, ARRAY_SIZE(ap1000_devices));
-+}
-+
-+#ifdef CONFIG_MACH_AP1000
-+MACHINE_START(AP1000, "Lanready AP-1000")
-+ /* Maintainer: Imre Kaloz <Kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .fixup = ap1000_fixup,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = ap1000_init,
-+MACHINE_END
-+#endif
---- a/arch/arm/mach-ixp4xx/ixdp425-pci.c
-+++ b/arch/arm/mach-ixp4xx/ixdp425-pci.c
-@@ -66,7 +66,8 @@
- int __init ixdp425_pci_init(void)
- {
- if (machine_is_ixdp425() || machine_is_ixcdp1100() ||
-- machine_is_ixdp465() || machine_is_kixrp435() || machine_is_compex())
-+ machine_is_ixdp465() || machine_is_kixrp435() ||
-+ machine_is_compex() || machine_is_ap1000())
- pci_common_init(&ixdp425_pci);
- return 0;
- }
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -89,6 +89,14 @@
- WRT300N v2 router. For more information on this
- platform, see http://openwrt.org
-
-+config MACH_AP1000
-+ bool "Lanready AP-1000"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support Lanready's
-+ AP1000 board. For more information on this
-+ platform, see http://openwrt.org
-+
- config ARCH_IXDP425
- bool "IXDP425"
- help
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -20,6 +20,7 @@
- obj-pci-$(CONFIG_MACH_COMPEX) += ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o
- obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o
-+obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o
-
- obj-y += common.o
-
-@@ -38,6 +39,7 @@
- obj-$(CONFIG_MACH_COMPEX) += compex-setup.o
- obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o
- obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o
-+obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o
-
- obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/ap1000-setup.c
-+++ b/arch/arm/mach-ixp4xx/ap1000-setup.c
-@@ -90,9 +90,37 @@
- .resource = ap1000_uart_resources
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info ap1000_plat_eth[] = {
-+ {
-+ .phy = IXP4XX_ETH_PHY_MAX_ADDR,
-+ .phy_mask = 0x1e,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 5,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device ap1000_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = ap1000_plat_eth,
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = ap1000_plat_eth + 1,
-+ }
-+};
-+
- static struct platform_device *ap1000_devices[] __initdata = {
- &ap1000_flash,
-- &ap1000_uart
-+ &ap1000_uart,
-+ &ap1000_eth[0],
-+ &ap1000_eth[1],
- };
-
- static char ap1000_mem_fixup[] __initdata = "mem=64M ";
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -49,6 +49,14 @@
- 7001 Access Point. For more information on this platform,
- see http://openwrt.org
-
-+config MACH_WG302V1
-+ bool "Netgear WG302 v1 / WAG302 v1"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support Netgear's
-+ WG302 v1 or WAG302 v1 Access Points. For more information
-+ on this platform, see http://openwrt.org
-+
- config MACH_WG302V2
- bool "Netgear WG302 v2 / WAG302 v2"
- select PCI
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -14,6 +14,7 @@
- obj-pci-$(CONFIG_MACH_NAS100D) += nas100d-pci.o
- obj-pci-$(CONFIG_MACH_DSMG600) += dsmg600-pci.o
- obj-pci-$(CONFIG_MACH_GATEWAY7001) += gateway7001-pci.o
-+obj-pci-$(CONFIG_MACH_WG302V1) += wg302v1-pci.o
- obj-pci-$(CONFIG_MACH_WG302V2) += wg302v2-pci.o
- obj-pci-$(CONFIG_MACH_FSG) += fsg-pci.o
- obj-pci-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-pci.o
-@@ -33,6 +34,7 @@
- obj-$(CONFIG_MACH_NAS100D) += nas100d-setup.o
- obj-$(CONFIG_MACH_DSMG600) += dsmg600-setup.o
- obj-$(CONFIG_MACH_GATEWAY7001) += gateway7001-setup.o
-+obj-$(CONFIG_MACH_WG302V1) += wg302v1-setup.o
- obj-$(CONFIG_MACH_WG302V2) += wg302v2-setup.o
- obj-$(CONFIG_MACH_FSG) += fsg-setup.o
- obj-$(CONFIG_MACH_PRONGHORNMETRO) += pronghornmetro-setup.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wg302v1-pci.c
-@@ -0,0 +1,63 @@
-+/*
-+ * arch/arch/mach-ixp4xx/wg302v1-pci.c
-+ *
-+ * PCI setup routines for the Netgear WG302 v1 and WAG302 v1
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ * Copyright (C) 2002 Jungo Software Technologies.
-+ * Copyright (C) 2003 MontaVista Software, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/hardware.h>
-+
-+#include <asm/mach/pci.h>
-+
-+void __init wg302v1_pci_preinit(void)
-+{
-+ set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
-+
-+ ixp4xx_pci_preinit();
-+}
-+
-+static int __init wg302v1_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+ if (slot == 1)
-+ return IRQ_IXP4XX_GPIO8;
-+ else if (slot == 2)
-+ return IRQ_IXP4XX_GPIO10;
-+ else return -1;
-+}
-+
-+struct hw_pci wg302v1_pci __initdata = {
-+ .nr_controllers = 1,
-+ .preinit = wg302v1_pci_preinit,
-+ .swizzle = pci_std_swizzle,
-+ .setup = ixp4xx_setup,
-+ .scan = ixp4xx_scan_bus,
-+ .map_irq = wg302v1_map_irq,
-+};
-+
-+int __init wg302v1_pci_init(void)
-+{
-+ if (machine_is_wg302v1())
-+ pci_common_init(&wg302v1_pci);
-+ return 0;
-+}
-+
-+subsys_initcall(wg302v1_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
-@@ -0,0 +1,109 @@
-+/*
-+ * arch/arm/mach-ixp4xx/wg302v1-setup.c
-+ *
-+ * Board setup for the Netgear WG302 v1 and WAG302 v1
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data wg302v1_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource wg302v1_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device wg302v1_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &wg302v1_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &wg302v1_flash_resource,
-+};
-+
-+static struct resource wg302v1_uart_resource = {
-+ .start = IXP4XX_UART1_BASE_PHYS,
-+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port wg302v1_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART1_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART1,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device wg302v1_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev = {
-+ .platform_data = wg302v1_uart_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &wg302v1_uart_resource,
-+};
-+
-+static struct platform_device *wg302v1_devices[] __initdata = {
-+ &wg302v1_flash,
-+ &wg302v1_uart,
-+};
-+
-+static void __init wg302v1_init(void)
-+{
-+ ixp4xx_sys_init();
-+
-+ wg302v1_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ wg302v1_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+ platform_add_devices(wg302v1_devices, ARRAY_SIZE(wg302v1_devices));
-+}
-+
-+#ifdef CONFIG_MACH_WG302V1
-+MACHINE_START(WG302V1, "Netgear WG302 v1 / WAG302 v1")
-+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = wg302v1_init,
-+MACHINE_END
-+#endif
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/wg302v1-setup.c
-+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
-@@ -77,9 +77,27 @@
- .resource = &wg302v1_uart_resource,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info wg302_plat_eth[] = {
-+ {
-+ .phy = 30,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }
-+};
-+
-+static struct platform_device wg302_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = wg302_plat_eth,
-+ }
-+};
-+
- static struct platform_device *wg302v1_devices[] __initdata = {
- &wg302v1_flash,
- &wg302v1_uart,
-+ &wg302_eth[0],
- };
-
- static void __init wg302v1_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/wg302v1-setup.c
-+++ b/arch/arm/mach-ixp4xx/wg302v1-setup.c
-@@ -100,6 +100,36 @@
- &wg302_eth[0],
- };
-
-+static char wg302v1_mem_fixup[] __initdata = "mem=32M ";
-+
-+static void __init wg302v1_fixup(struct machine_desc *desc,
-+ struct tag *tags, char **cmdline, struct meminfo *mi)
-+
-+{
-+ struct tag *t = tags;
-+ char *p = *cmdline;
-+
-+ /* Find the end of the tags table, taking note of any cmdline tag. */
-+ for (; t->hdr.size; t = tag_next(t)) {
-+ if (t->hdr.tag == ATAG_CMDLINE) {
-+ p = t->u.cmdline.cmdline;
-+ }
-+ }
-+
-+ /* Overwrite the end of the table with a new cmdline tag. */
-+ t->hdr.tag = ATAG_CMDLINE;
-+ t->hdr.size = (sizeof (struct tag_header) +
-+ strlen(wg302v1_mem_fixup) + strlen(p) + 1 + 4) >> 2;
-+ strlcpy(t->u.cmdline.cmdline, wg302v1_mem_fixup, COMMAND_LINE_SIZE);
-+ strlcpy(t->u.cmdline.cmdline + strlen(wg302v1_mem_fixup), p,
-+ COMMAND_LINE_SIZE - strlen(wg302v1_mem_fixup));
-+
-+ /* Terminate the table. */
-+ t = tag_next(t);
-+ t->hdr.tag = ATAG_NONE;
-+ t->hdr.size = 0;
-+}
-+
- static void __init wg302v1_init(void)
- {
- ixp4xx_sys_init();
-@@ -118,6 +148,7 @@
- /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
- .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
- .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .fixup = wg302v1_fixup,
- .map_io = ixp4xx_map_io,
- .init_irq = ixp4xx_init_irq,
- .timer = &ixp4xx_timer,
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/coyote-setup.c
-+++ b/arch/arm/mach-ixp4xx/coyote-setup.c
-@@ -73,9 +73,37 @@
- .resource = &coyote_uart_resource,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info ixdpg425_plat_eth[] = {
-+ {
-+ .phy = 5,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 4,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device ixdpg425_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = ixdpg425_plat_eth,
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = ixdpg425_plat_eth + 1,
-+ }
-+};
-+
-+
- static struct platform_device *coyote_devices[] __initdata = {
- &coyote_flash,
-- &coyote_uart
-+ &coyote_uart,
-+ &ixdpg425_eth[0],
-+ &ixdpg425_eth[1],
- };
-
- static void __init coyote_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -150,6 +150,14 @@
- PrPCM1100 Processor Mezanine Module. For more information on
- this platform, see <file:Documentation/arm/IXP4xx>.
-
-+config MACH_TW5334
-+ bool "Titan Wireless TW-533-4"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support the Titan
-+ Wireless TW533-4. For more information on this platform,
-+ see http://openwrt.org
-+
- config MACH_NAS100D
- bool
- prompt "NAS100D"
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -22,6 +22,7 @@
- obj-pci-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-pci.o
- obj-pci-$(CONFIG_MACH_SIDEWINDER) += sidewinder-pci.o
- obj-pci-$(CONFIG_MACH_AP1000) += ixdp425-pci.o
-+obj-pci-$(CONFIG_MACH_TW5334) += tw5334-pci.o
-
- obj-y += common.o
-
-@@ -42,6 +43,7 @@
- obj-$(CONFIG_MACH_WRT300NV2) += wrt300nv2-setup.o
- obj-$(CONFIG_MACH_SIDEWINDER) += sidewinder-setup.o
- obj-$(CONFIG_MACH_AP1000) += ap1000-setup.o
-+obj-$(CONFIG_MACH_TW5334) += tw5334-setup.o
-
- obj-$(CONFIG_PCI) += $(obj-pci-$(CONFIG_PCI)) common-pci.o
- obj-$(CONFIG_IXP4XX_QMGR) += ixp4xx_qmgr.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/tw5334-setup.c
-@@ -0,0 +1,162 @@
-+/*
-+ * arch/arm/mach-ixp4xx/tw5334-setup.c
-+ *
-+ * Board setup for the Titan Wireless TW-533-4
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+static struct flash_platform_data tw5334_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource tw5334_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device tw5334_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &tw5334_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &tw5334_flash_resource,
-+};
-+
-+static struct resource tw5334_uart_resource = {
-+ .start = IXP4XX_UART2_BASE_PHYS,
-+ .end = IXP4XX_UART2_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port tw5334_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART2_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART2_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART2,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device tw5334_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev = {
-+ .platform_data = tw5334_uart_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &tw5334_uart_resource,
-+};
-+
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info tw5334_plat_eth[] = {
-+ {
-+ .phy = 0,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+ }, {
-+ .phy = 1,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+ }
-+};
-+
-+static struct platform_device tw5334_eth[] = {
-+ {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = tw5334_plat_eth,
-+ }, {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = tw5334_plat_eth + 1,
-+ }
-+};
-+
-+static struct platform_device *tw5334_devices[] __initdata = {
-+ &tw5334_flash,
-+ &tw5334_uart,
-+ &tw5334_eth[0],
-+ &tw5334_eth[1],
-+};
-+
-+static void __init tw5334_init(void)
-+{
-+ DECLARE_MAC_BUF(mac_buf);
-+ uint8_t __iomem *f;
-+ int i;
-+
-+ ixp4xx_sys_init();
-+
-+ tw5334_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ tw5334_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+ platform_add_devices(tw5334_devices, ARRAY_SIZE(tw5334_devices));
-+
-+ /*
-+ * Map in a portion of the flash and read the MAC addresses.
-+ * Since it is stored in BE in the flash itself, we need to
-+ * byteswap it if we're in LE mode.
-+ */
-+ f = ioremap(IXP4XX_EXP_BUS_BASE(0), 0x1000000);
-+ if (f) {
-+ for (i = 0; i < 6; i++)
-+#ifdef __ARMEB__
-+ tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + i);
-+ tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + i);
-+#else
-+ tw5334_plat_eth[0].hwaddr[i] = readb(f + 0xFC0422 + (i^3));
-+ tw5334_plat_eth[1].hwaddr[i] = readb(f + 0xFC043B + (i^3));
-+#endif
-+ iounmap(f);
-+ }
-+ printk(KERN_INFO "TW-533-4: Using MAC address %s for port 0\n",
-+ print_mac(mac_buf, tw5334_plat_eth[0].hwaddr));
-+ printk(KERN_INFO "TW-533-4: Using MAC address %s for port 1\n",
-+ print_mac(mac_buf, tw5334_plat_eth[1].hwaddr));
-+}
-+
-+#ifdef CONFIG_MACH_TW5334
-+MACHINE_START(TW5334, "Titan Wireless TW-533-4")
-+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = tw5334_init,
-+MACHINE_END
-+#endif
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/tw5334-pci.c
-@@ -0,0 +1,69 @@
-+/*
-+ * arch/arch/mach-ixp4xx/tw5334-pci.c
-+ *
-+ * PCI setup routines for the Titan Wireless TW-533-4
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ * Copyright (C) 2002 Jungo Software Technologies.
-+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/hardware.h>
-+
-+#include <asm/mach/pci.h>
-+
-+void __init tw5334_pci_preinit(void)
-+{
-+ set_irq_type(IRQ_IXP4XX_GPIO6, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO2, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO1, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO0, IRQT_LOW);
-+
-+ ixp4xx_pci_preinit();
-+}
-+
-+static int __init tw5334_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+ if (slot == 12)
-+ return IRQ_IXP4XX_GPIO6;
-+ else if (slot == 13)
-+ return IRQ_IXP4XX_GPIO2;
-+ else if (slot == 14)
-+ return IRQ_IXP4XX_GPIO1;
-+ else if (slot == 15)
-+ return IRQ_IXP4XX_GPIO0;
-+ else return -1;
-+}
-+
-+struct hw_pci tw5334_pci __initdata = {
-+ .nr_controllers = 1,
-+ .preinit = tw5334_pci_preinit,
-+ .swizzle = pci_std_swizzle,
-+ .setup = ixp4xx_setup,
-+ .scan = ixp4xx_scan_bus,
-+ .map_irq = tw5334_map_irq,
-+};
-+
-+int __init tw5334_pci_init(void)
-+{
-+ if (machine_is_tw5334())
-+ pci_common_init(&tw5334_pci);
-+ return 0;
-+}
-+
-+subsys_initcall(tw5334_pci_init);
---- a/include/asm-arm/arch-ixp4xx/uncompress.h
-+++ b/include/asm-arm/arch-ixp4xx/uncompress.h
-@@ -42,7 +42,8 @@
- */
- if (machine_is_adi_coyote() || machine_is_gtwx5715() ||
- machine_is_gateway7001() || machine_is_wg302v2() ||
-- machine_is_pronghorn_metro() || machine_is_wrt300nv2())
-+ machine_is_pronghorn_metro() || machine_is_wrt300nv2() ||
-+ machine_is_tw5334())
- uart_base = (volatile u32*) IXP4XX_UART2_BASE_PHYS;
- else
- uart_base = (volatile u32*) IXP4XX_UART1_BASE_PHYS;
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -25,6 +25,14 @@
- Avila Network Platform. For more information on this platform,
- see <file:Documentation/arm/IXP4xx>.
-
-+config MACH_CAMBRIA
-+ bool "Cambria"
-+ select PCI
-+ help
-+ Say 'Y' here if you want your kernel to support the Gateworks
-+ Cambria series. For more information on this platform,
-+ see <file:Documentation/arm/IXP4xx>.
-+
- config MACH_LOFT
- bool "Loft"
- depends on MACH_AVILA
-@@ -200,7 +208,7 @@
-
- config CPU_IXP43X
- bool
-- depends on MACH_KIXRP435
-+ depends on MACH_KIXRP435 || MACH_CAMBRIA
- default y
-
- config MACH_GTWX5715
---- a/arch/arm/mach-ixp4xx/Makefile
-+++ b/arch/arm/mach-ixp4xx/Makefile
-@@ -7,6 +7,7 @@
-
- obj-pci-$(CONFIG_ARCH_IXDP4XX) += ixdp425-pci.o
- obj-pci-$(CONFIG_MACH_AVILA) += avila-pci.o
-+obj-pci-$(CONFIG_MACH_CAMBRIA) += cambria-pci.o
- obj-pci-$(CONFIG_MACH_IXDPG425) += ixdpg425-pci.o
- obj-pci-$(CONFIG_ARCH_ADI_COYOTE) += coyote-pci.o
- obj-pci-$(CONFIG_MACH_GTWX5715) += gtwx5715-pci.o
-@@ -28,6 +29,7 @@
-
- obj-$(CONFIG_ARCH_IXDP4XX) += ixdp425-setup.o
- obj-$(CONFIG_MACH_AVILA) += avila-setup.o
-+obj-$(CONFIG_MACH_CAMBRIA) += cambria-setup.o
- obj-$(CONFIG_MACH_IXDPG425) += coyote-setup.o
- obj-$(CONFIG_ARCH_ADI_COYOTE) += coyote-setup.o
- obj-$(CONFIG_MACH_GTWX5715) += gtwx5715-setup.o
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/cambria-pci.c
-@@ -0,0 +1,74 @@
-+/*
-+ * arch/arch/mach-ixp4xx/cambria-pci.c
-+ *
-+ * PCI setup routines for Gateworks Cambria series
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * based on coyote-pci.c:
-+ * Copyright (C) 2002 Jungo Software Technologies.
-+ * Copyright (C) 2003 MontaVista Softwrae, Inc.
-+ *
-+ * Maintainer: Imre Kaloz <kaloz@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/pci.h>
-+#include <linux/init.h>
-+#include <linux/irq.h>
-+
-+#include <asm/mach-types.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+
-+#include <asm/mach/pci.h>
-+
-+extern void ixp4xx_pci_preinit(void);
-+extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
-+extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
-+
-+void __init cambria_pci_preinit(void)
-+{
-+ set_irq_type(IRQ_IXP4XX_GPIO11, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO10, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO9, IRQT_LOW);
-+ set_irq_type(IRQ_IXP4XX_GPIO8, IRQT_LOW);
-+
-+ ixp4xx_pci_preinit();
-+}
-+
-+static int __init cambria_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
-+{
-+ if (slot == 1)
-+ return IRQ_IXP4XX_GPIO11;
-+ else if (slot == 2)
-+ return IRQ_IXP4XX_GPIO10;
-+ else if (slot == 3)
-+ return IRQ_IXP4XX_GPIO9;
-+ else if (slot == 4)
-+ return IRQ_IXP4XX_GPIO8;
-+ else return -1;
-+}
-+
-+struct hw_pci cambria_pci __initdata = {
-+ .nr_controllers = 1,
-+ .preinit = cambria_pci_preinit,
-+ .swizzle = pci_std_swizzle,
-+ .setup = ixp4xx_setup,
-+ .scan = ixp4xx_scan_bus,
-+ .map_irq = cambria_map_irq,
-+};
-+
-+int __init cambria_pci_init(void)
-+{
-+ if (machine_is_cambria())
-+ pci_common_init(&cambria_pci);
-+ return 0;
-+}
-+
-+subsys_initcall(cambria_pci_init);
---- /dev/null
-+++ b/arch/arm/mach-ixp4xx/cambria-setup.c
-@@ -0,0 +1,444 @@
-+/*
-+ * arch/arm/mach-ixp4xx/cambria-setup.c
-+ *
-+ * Board setup for the Gateworks Cambria series
-+ *
-+ * Copyright (C) 2008 Imre Kaloz <Kaloz@openwrt.org>
-+ *
-+ * based on coyote-setup.c:
-+ * Copyright (C) 2003-2005 MontaVista Software, Inc.
-+ *
-+ * Author: Imre Kaloz <Kaloz@openwrt.org>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/device.h>
-+#include <linux/if_ether.h>
-+#include <linux/socket.h>
-+#include <linux/netdevice.h>
-+#include <linux/serial.h>
-+#include <linux/tty.h>
-+#include <linux/serial_8250.h>
-+#include <linux/slab.h>
-+#ifdef CONFIG_SENSORS_EEPROM
-+# include <linux/i2c.h>
-+# include <linux/eeprom.h>
-+#endif
-+
-+#include <linux/leds.h>
-+#include <linux/i2c-gpio.h>
-+#include <asm/types.h>
-+#include <asm/setup.h>
-+#include <asm/memory.h>
-+#include <asm/hardware.h>
-+#include <asm/irq.h>
-+#include <asm/mach-types.h>
-+#include <asm/mach/arch.h>
-+#include <asm/mach/flash.h>
-+
-+struct cambria_board_info {
-+ unsigned char *model;
-+ void (* setup)(void);
-+};
-+
-+static struct cambria_board_info *cambria_info __initdata;
-+
-+static struct flash_platform_data cambria_flash_data = {
-+ .map_name = "cfi_probe",
-+ .width = 2,
-+};
-+
-+static struct resource cambria_flash_resource = {
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct platform_device cambria_flash = {
-+ .name = "IXP4XX-Flash",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &cambria_flash_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &cambria_flash_resource,
-+};
-+
-+static struct i2c_gpio_platform_data cambria_i2c_gpio_data = {
-+ .sda_pin = 7,
-+ .scl_pin = 6,
-+};
-+
-+static struct platform_device cambria_i2c_gpio = {
-+ .name = "i2c-gpio",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = &cambria_i2c_gpio_data,
-+ },
-+};
-+
-+static struct resource cambria_uart_resource = {
-+ .start = IXP4XX_UART1_BASE_PHYS,
-+ .end = IXP4XX_UART1_BASE_PHYS + 0x0fff,
-+ .flags = IORESOURCE_MEM,
-+};
-+
-+static struct plat_serial8250_port cambria_uart_data[] = {
-+ {
-+ .mapbase = IXP4XX_UART1_BASE_PHYS,
-+ .membase = (char *)IXP4XX_UART1_BASE_VIRT + REG_OFFSET,
-+ .irq = IRQ_IXP4XX_UART1,
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 2,
-+ .uartclk = IXP4XX_UART_XTAL,
-+ },
-+ { },
-+};
-+
-+static struct platform_device cambria_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM,
-+ .dev = {
-+ .platform_data = cambria_uart_data,
-+ },
-+ .num_resources = 1,
-+ .resource = &cambria_uart_resource,
-+};
-+
-+static struct resource cambria_pata_resources[] = {
-+ {
-+ .flags = IORESOURCE_MEM
-+ },
-+ {
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .name = "intrq",
-+ .start = IRQ_IXP4XX_GPIO12,
-+ .end = IRQ_IXP4XX_GPIO12,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct ixp4xx_pata_data cambria_pata_data = {
-+ .cs0_bits = 0xbfff3c03,
-+ .cs1_bits = 0xbfff3c03,
-+};
-+
-+static struct platform_device cambria_pata = {
-+ .name = "pata_ixp4xx_cf",
-+ .id = 0,
-+ .dev.platform_data = &cambria_pata_data,
-+ .num_resources = ARRAY_SIZE(cambria_pata_resources),
-+ .resource = cambria_pata_resources,
-+};
-+
-+static struct eth_plat_info cambria_npec_data = {
-+ .phy = 1,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+};
-+
-+static struct eth_plat_info cambria_npea_data = {
-+ .phy = 2,
-+ .rxq = 2,
-+ .txreadyq = 19,
-+};
-+
-+static struct platform_device cambria_npec_device = {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = &cambria_npec_data,
-+};
-+
-+static struct platform_device cambria_npea_device = {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEA,
-+ .dev.platform_data = &cambria_npea_data,
-+};
-+
-+static struct gpio_led cambria_gpio_leds[] = {
-+ {
-+ .name = "user", /* green led */
-+ .gpio = 5,
-+ .active_low = 1,
-+ }
-+};
-+
-+static struct gpio_led_platform_data cambria_gpio_leds_data = {
-+ .num_leds = 1,
-+ .leds = cambria_gpio_leds,
-+};
-+
-+static struct platform_device cambria_gpio_leds_device = {
-+ .name = "leds-gpio",
-+ .id = -1,
-+ .dev.platform_data = &cambria_gpio_leds_data,
-+};
-+
-+
-+static struct latch_led cambria_latch_leds[] = {
-+ {
-+ .name = "ledA", /* green led */
-+ .bit = 0,
-+ },
-+ {
-+ .name = "ledB", /* green led */
-+ .bit = 1,
-+ },
-+ {
-+ .name = "ledC", /* green led */
-+ .bit = 2,
-+ },
-+ {
-+ .name = "ledD", /* green led */
-+ .bit = 3,
-+ },
-+ {
-+ .name = "ledE", /* green led */
-+ .bit = 4,
-+ },
-+ {
-+ .name = "ledF", /* green led */
-+ .bit = 5,
-+ },
-+ {
-+ .name = "ledG", /* green led */
-+ .bit = 6,
-+ },
-+ {
-+ .name = "ledH", /* green led */
-+ .bit = 7,
-+ }
-+};
-+
-+static struct latch_led_platform_data cambria_latch_leds_data = {
-+ .num_leds = 8,
-+ .leds = cambria_latch_leds,
-+ .mem = 0x53F40000,
-+};
-+
-+static struct platform_device cambria_latch_leds_device = {
-+ .name = "leds-latch",
-+ .id = -1,
-+ .dev.platform_data = &cambria_latch_leds_data,
-+};
-+
-+static struct resource cambria_usb0_resources[] = {
-+ {
-+ .start = 0xCD000000,
-+ .end = 0xCD000300,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = 32,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static struct resource cambria_usb1_resources[] = {
-+ {
-+ .start = 0xCE000000,
-+ .end = 0xCE000300,
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = 33,
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 ehci_dma_mask = ~(u32)0;
-+
-+static struct platform_device cambria_usb0_device = {
-+ .name = "ixp4xx-ehci",
-+ .id = 0,
-+ .resource = cambria_usb0_resources,
-+ .num_resources = ARRAY_SIZE(cambria_usb0_resources),
-+ .dev = {
-+ .dma_mask = &ehci_dma_mask,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+};
-+
-+static struct platform_device cambria_usb1_device = {
-+ .name = "ixp4xx-ehci",
-+ .id = 1,
-+ .resource = cambria_usb1_resources,
-+ .num_resources = ARRAY_SIZE(cambria_usb1_resources),
-+ .dev = {
-+ .dma_mask = &ehci_dma_mask,
-+ .coherent_dma_mask = 0xffffffff,
-+ },
-+};
-+
-+static struct platform_device *cambria_devices[] __initdata = {
-+ &cambria_i2c_gpio,
-+ &cambria_flash,
-+ &cambria_uart,
-+};
-+
-+static void __init cambria_gw23xx_setup(void)
-+{
-+ platform_device_register(&cambria_npec_device);
-+ platform_device_register(&cambria_npea_device);
-+}
-+
-+#ifdef CONFIG_SENSORS_EEPROM
-+static void __init cambria_gw2350_setup(void)
-+{
-+ platform_device_register(&cambria_npec_device);
-+ platform_device_register(&cambria_npea_device);
-+
-+ platform_device_register(&cambria_usb0_device);
-+ platform_device_register(&cambria_usb1_device);
-+
-+ platform_device_register(&cambria_gpio_leds_device);
-+}
-+
-+static void __init cambria_gw2358_setup(void)
-+{
-+ platform_device_register(&cambria_npec_device);
-+ platform_device_register(&cambria_npea_device);
-+
-+ platform_device_register(&cambria_usb0_device);
-+ platform_device_register(&cambria_usb1_device);
-+
-+ platform_device_register(&cambria_pata);
-+
-+ platform_device_register(&cambria_latch_leds_device);
-+}
-+
-+static struct cambria_board_info cambria_boards[] __initdata = {
-+ {
-+ .model = "GW2350",
-+ .setup = cambria_gw2350_setup,
-+ }, {
-+ .model = "GW2358",
-+ .setup = cambria_gw2358_setup,
-+ }
-+};
-+
-+static struct cambria_board_info * __init cambria_find_board_info(char *model)
-+{
-+ int i;
-+
-+ for (i = 0; i < ARRAY_SIZE(cambria_boards); i++) {
-+ struct cambria_board_info *info = &cambria_boards[i];
-+ if (strncmp(info->model, model, strlen(info->model)) == 0)
-+ return info;
-+ }
-+
-+ return NULL;
-+}
-+
-+struct cambria_eeprom_header {
-+ unsigned char mac0[ETH_ALEN];
-+ unsigned char mac1[ETH_ALEN];
-+ unsigned char res0[4];
-+ unsigned char magic[2];
-+ unsigned char config[14];
-+ unsigned char model[16];
-+};
-+
-+static int __init cambria_eeprom_notify(struct notifier_block *self,
-+ unsigned long event, void *t)
-+{
-+ struct eeprom_data *ee = t;
-+ struct cambria_eeprom_header hdr;
-+
-+ if (cambria_info)
-+ return NOTIFY_DONE;
-+
-+ /* The eeprom is at address 0x51 */
-+ if (event != EEPROM_REGISTER || ee->client.addr != 0x51)
-+ return NOTIFY_DONE;
-+
-+ ee->attr->read(&ee->client.dev.kobj, ee->attr, (char *)&hdr,
-+ 0, sizeof(hdr));
-+
-+ if (hdr.magic[0] != 'G' || hdr.magic[1] != 'W')
-+ return NOTIFY_DONE;
-+
-+ memcpy(&cambria_npec_data.hwaddr, hdr.mac0, ETH_ALEN);
-+ memcpy(&cambria_npea_data.hwaddr, hdr.mac1, ETH_ALEN);
-+
-+ cambria_info = cambria_find_board_info(hdr.model);
-+
-+ return NOTIFY_OK;
-+}
-+
-+static struct notifier_block cambria_eeprom_notifier __initdata = {
-+ .notifier_call = cambria_eeprom_notify
-+};
-+
-+static void __init cambria_register_eeprom_notifier(void)
-+{
-+ register_eeprom_notifier(&cambria_eeprom_notifier);
-+}
-+
-+static void __init cambria_unregister_eeprom_notifier(void)
-+{
-+ unregister_eeprom_notifier(&cambria_eeprom_notifier);
-+}
-+#else /* CONFIG_SENSORS_EEPROM */
-+static inline void cambria_register_eeprom_notifier(void) {};
-+static inline void cambria_unregister_eeprom_notifier(void) {};
-+#endif /* CONFIG_SENSORS_EEPROM */
-+
-+static void __init cambria_init(void)
-+{
-+ ixp4xx_sys_init();
-+
-+ cambria_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
-+ cambria_flash_resource.end = IXP4XX_EXP_BUS_BASE(0) + SZ_32M - 1;
-+
-+ *IXP4XX_EXP_CS0 |= IXP4XX_FLASH_WRITABLE;
-+ *IXP4XX_EXP_CS1 = *IXP4XX_EXP_CS0;
-+
-+ platform_add_devices(cambria_devices, ARRAY_SIZE(cambria_devices));
-+
-+ cambria_pata_resources[0].start = 0x53e00000;
-+ cambria_pata_resources[0].end = 0x53e3ffff;
-+
-+ cambria_pata_resources[1].start = 0x53e40000;
-+ cambria_pata_resources[1].end = 0x53e7ffff;
-+
-+ cambria_pata_data.cs0_cfg = IXP4XX_EXP_CS3;
-+ cambria_pata_data.cs1_cfg = IXP4XX_EXP_CS3;
-+
-+ cambria_register_eeprom_notifier();
-+}
-+
-+static int __init cambria_model_setup(void)
-+{
-+ if (!machine_is_cambria())
-+ return 0;
-+
-+ if (cambria_info) {
-+ printk(KERN_DEBUG "Running on Gateworks Cambria %s\n",
-+ cambria_info->model);
-+ cambria_info->setup();
-+ } else {
-+ printk(KERN_INFO "Unknown/missing Cambria model number"
-+ " -- defaults will be used\n");
-+ cambria_gw23xx_setup();
-+ }
-+
-+ cambria_unregister_eeprom_notifier();
-+ return 0;
-+}
-+late_initcall(cambria_model_setup);
-+
-+#ifdef CONFIG_MACH_CAMBRIA
-+MACHINE_START(CAMBRIA, "Gateworks Cambria series")
-+ /* Maintainer: Imre Kaloz <kaloz@openwrt.org> */
-+ .phys_io = IXP4XX_PERIPHERAL_BASE_PHYS,
-+ .io_pg_offst = ((IXP4XX_PERIPHERAL_BASE_VIRT) >> 18) & 0xfffc,
-+ .map_io = ixp4xx_map_io,
-+ .init_irq = ixp4xx_init_irq,
-+ .timer = &ixp4xx_timer,
-+ .boot_params = 0x0100,
-+ .init_machine = cambria_init,
-+MACHINE_END
-+#endif
---- a/include/asm-arm/arch-ixp4xx/hardware.h
-+++ b/include/asm-arm/arch-ixp4xx/hardware.h
-@@ -18,7 +18,7 @@
- #define __ASM_ARCH_HARDWARE_H__
-
- #define PCIBIOS_MIN_IO 0x00001000
--#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
-+#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x48000000 : 0x48000000)
-
- /*
- * We override the standard dma-mask routines for bouncing.
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/cambria-setup.c
-+++ b/arch/arm/mach-ixp4xx/cambria-setup.c
-@@ -36,6 +36,7 @@
- #include <asm/mach-types.h>
- #include <asm/mach/arch.h>
- #include <asm/mach/flash.h>
-+#include <linux/irq.h>
-
- struct cambria_board_info {
- unsigned char *model;
-@@ -105,6 +106,43 @@
- .resource = &cambria_uart_resource,
- };
-
-+static struct resource cambria_optional_uart_resources[] = {
-+ {
-+ .start = 0x52000000,
-+ .end = 0x52000fff,
-+ .flags = IORESOURCE_MEM
-+ },
-+ {
-+ .start = 0x53000000,
-+ .end = 0x53000fff,
-+ .flags = IORESOURCE_MEM
-+ }
-+};
-+
-+static struct plat_serial8250_port cambria_optional_uart_data[] = {
-+ {
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 0,
-+ .uartclk = 1843200,
-+ },
-+ {
-+ .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
-+ .iotype = UPIO_MEM,
-+ .regshift = 0,
-+ .uartclk = 1843200,
-+ },
-+ { },
-+};
-+
-+static struct platform_device cambria_optional_uart = {
-+ .name = "serial8250",
-+ .id = PLAT8250_DEV_PLATFORM1,
-+ .dev.platform_data = cambria_optional_uart_data,
-+ .num_resources = 2,
-+ .resource = cambria_optional_uart_resources,
-+};
-+
- static struct resource cambria_pata_resources[] = {
- {
- .flags = IORESOURCE_MEM
-@@ -287,6 +325,19 @@
- #ifdef CONFIG_SENSORS_EEPROM
- static void __init cambria_gw2350_setup(void)
- {
-+ *IXP4XX_EXP_CS2 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_BOTHEDGE);
-+ cambria_optional_uart_data[0].mapbase = IXP4XX_EXP_BUS_BASE(2);
-+ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(2), 0x0fff);
-+ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
-+
-+ *IXP4XX_EXP_CS3 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_BOTHEDGE);
-+ cambria_optional_uart_data[1].mapbase = IXP4XX_EXP_BUS_BASE(3);
-+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(3), 0x0fff);
-+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
-+
-+ platform_device_register(&cambria_optional_uart);
- platform_device_register(&cambria_npec_device);
- platform_device_register(&cambria_npea_device);
-
-@@ -298,6 +349,22 @@
-
- static void __init cambria_gw2358_setup(void)
- {
-+ *IXP4XX_EXP_CS3 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO3, IRQT_BOTHEDGE);
-+ cambria_optional_uart_data[0].mapbase = 0x53FC0000;
-+ cambria_optional_uart_data[0].membase = (void __iomem *)ioremap(0x53FC0000, 0x0fff);
-+ cambria_optional_uart_data[0].irq = IRQ_IXP4XX_GPIO3;
-+
-+ *IXP4XX_EXP_CS3 = 0xbfff0003;
-+ set_irq_type(IRQ_IXP4XX_GPIO4, IRQT_BOTHEDGE);
-+ cambria_optional_uart_data[1].mapbase = 0x53F80000;
-+ cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
-+ cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
-+
-+ platform_device_register(&cambria_optional_uart);
-+
-+ cambria_npec_data.phy = 2;
-+ cambria_npea_data.phy = 1;
- platform_device_register(&cambria_npec_device);
- platform_device_register(&cambria_npea_device);
-
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/cambria-setup.c
-+++ b/arch/arm/mach-ixp4xx/cambria-setup.c
-@@ -214,6 +214,21 @@
- .dev.platform_data = &cambria_gpio_leds_data,
- };
-
-+static struct resource cambria_gpio_resources[] = {
-+ {
-+ .name = "gpio",
-+ .flags = 0,
-+ },
-+};
-+
-+static struct platform_device cambria_gpio = {
-+ .name = "GPIODEV",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(cambria_gpio_resources),
-+ .resource = cambria_gpio_resources,
-+};
-+
-+
-
- static struct latch_led cambria_latch_leds[] = {
- {
-@@ -337,6 +352,11 @@
- cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(IXP4XX_EXP_BUS_BASE(3), 0x0fff);
- cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
-
-+ cambria_gpio_resources[0].start = (1 << 0) | (1 << 1) | (1 << 2) | (1 << 3) | (1 << 4) |\
-+ (1 << 5) | (1 << 8) | (1 << 9) | (1 << 12);
-+ cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
-+
-+ platform_device_register(&cambria_gpio);
- platform_device_register(&cambria_optional_uart);
- platform_device_register(&cambria_npec_device);
- platform_device_register(&cambria_npea_device);
-@@ -361,6 +381,10 @@
- cambria_optional_uart_data[1].membase = (void __iomem *)ioremap(0x53F80000, 0x0fff);
- cambria_optional_uart_data[1].irq = IRQ_IXP4XX_GPIO4;
-
-+ cambria_gpio_resources[0].start = (1 << 14);
-+ cambria_gpio_resources[0].end = cambria_gpio_resources[0].start;
-+
-+ platform_device_register(&cambria_gpio);
- platform_device_register(&cambria_optional_uart);
-
- cambria_npec_data.phy = 2;
+++ /dev/null
---- a/drivers/net/arm/Kconfig
-+++ b/drivers/net/arm/Kconfig
-@@ -47,3 +47,11 @@
- help
- This is a driver for the ethernet hardware included in EP93xx CPUs.
- Say Y if you are building a kernel for EP93xx based devices.
-+
-+config IXP4XX_ETH
-+ tristate "Intel IXP4xx Ethernet support"
-+ depends on ARM && ARCH_IXP4XX && IXP4XX_NPE && IXP4XX_QMGR
-+ select MII
-+ help
-+ Say Y here if you want to use built-in Ethernet ports
-+ on IXP4xx processor.
---- a/drivers/net/arm/Makefile
-+++ b/drivers/net/arm/Makefile
-@@ -9,3 +9,4 @@
- obj-$(CONFIG_ARM_ETHER1) += ether1.o
- obj-$(CONFIG_ARM_AT91_ETHER) += at91_ether.o
- obj-$(CONFIG_EP93XX_ETH) += ep93xx_eth.o
-+obj-$(CONFIG_IXP4XX_ETH) += ixp4xx_eth.o
---- /dev/null
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -0,0 +1,1265 @@
-+/*
-+ * Intel IXP4xx Ethernet driver for Linux
-+ *
-+ * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of version 2 of the GNU General Public License
-+ * as published by the Free Software Foundation.
-+ *
-+ * Ethernet port config (0x00 is not present on IXP42X):
-+ *
-+ * logical port 0x00 0x10 0x20
-+ * NPE 0 (NPE-A) 1 (NPE-B) 2 (NPE-C)
-+ * physical PortId 2 0 1
-+ * TX queue 23 24 25
-+ * RX-free queue 26 27 28
-+ * TX-done queue is always 31, per-port RX and TX-ready queues are configurable
-+ *
-+ *
-+ * Queue entries:
-+ * bits 0 -> 1 - NPE ID (RX and TX-done)
-+ * bits 0 -> 2 - priority (TX, per 802.1D)
-+ * bits 3 -> 4 - port ID (user-set?)
-+ * bits 5 -> 31 - physical descriptor address
-+ */
-+
-+#include <linux/delay.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/etherdevice.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/mii.h>
-+#include <linux/platform_device.h>
-+#include <asm/arch/npe.h>
-+#include <asm/arch/qmgr.h>
-+
-+#define DEBUG_QUEUES 0
-+#define DEBUG_DESC 0
-+#define DEBUG_RX 0
-+#define DEBUG_TX 0
-+#define DEBUG_PKT_BYTES 0
-+#define DEBUG_MDIO 0
-+#define DEBUG_CLOSE 0
-+
-+#define DRV_NAME "ixp4xx_eth"
-+
-+#define MAX_NPES 3
-+
-+#define RX_DESCS 64 /* also length of all RX queues */
-+#define TX_DESCS 16 /* also length of all TX queues */
-+#define TXDONE_QUEUE_LEN 64 /* dwords */
-+
-+#define POOL_ALLOC_SIZE (sizeof(struct desc) * (RX_DESCS + TX_DESCS))
-+#define REGS_SIZE 0x1000
-+#define MAX_MRU 1536 /* 0x600 */
-+#define RX_BUFF_SIZE ALIGN((NET_IP_ALIGN) + MAX_MRU, 4)
-+
-+#define NAPI_WEIGHT 16
-+#define MDIO_INTERVAL (3 * HZ)
-+#define MAX_MDIO_RETRIES 100 /* microseconds, typically 30 cycles */
-+#define MAX_MII_RESET_RETRIES 100 /* mdio_read() cycles, typically 4 */
-+#define MAX_CLOSE_WAIT 1000 /* microseconds, typically 2-3 cycles */
-+
-+#define NPE_ID(port_id) ((port_id) >> 4)
-+#define PHYSICAL_ID(port_id) ((NPE_ID(port_id) + 2) % 3)
-+#define TX_QUEUE(port_id) (NPE_ID(port_id) + 23)
-+#define RXFREE_QUEUE(port_id) (NPE_ID(port_id) + 26)
-+#define TXDONE_QUEUE 31
-+
-+/* TX Control Registers */
-+#define TX_CNTRL0_TX_EN 0x01
-+#define TX_CNTRL0_HALFDUPLEX 0x02
-+#define TX_CNTRL0_RETRY 0x04
-+#define TX_CNTRL0_PAD_EN 0x08
-+#define TX_CNTRL0_APPEND_FCS 0x10
-+#define TX_CNTRL0_2DEFER 0x20
-+#define TX_CNTRL0_RMII 0x40 /* reduced MII */
-+#define TX_CNTRL1_RETRIES 0x0F /* 4 bits */
-+
-+/* RX Control Registers */
-+#define RX_CNTRL0_RX_EN 0x01
-+#define RX_CNTRL0_PADSTRIP_EN 0x02
-+#define RX_CNTRL0_SEND_FCS 0x04
-+#define RX_CNTRL0_PAUSE_EN 0x08
-+#define RX_CNTRL0_LOOP_EN 0x10
-+#define RX_CNTRL0_ADDR_FLTR_EN 0x20
-+#define RX_CNTRL0_RX_RUNT_EN 0x40
-+#define RX_CNTRL0_BCAST_DIS 0x80
-+#define RX_CNTRL1_DEFER_EN 0x01
-+
-+/* Core Control Register */
-+#define CORE_RESET 0x01
-+#define CORE_RX_FIFO_FLUSH 0x02
-+#define CORE_TX_FIFO_FLUSH 0x04
-+#define CORE_SEND_JAM 0x08
-+#define CORE_MDC_EN 0x10 /* MDIO using NPE-B ETH-0 only */
-+
-+#define DEFAULT_TX_CNTRL0 (TX_CNTRL0_TX_EN | TX_CNTRL0_RETRY | \
-+ TX_CNTRL0_PAD_EN | TX_CNTRL0_APPEND_FCS | \
-+ TX_CNTRL0_2DEFER)
-+#define DEFAULT_RX_CNTRL0 RX_CNTRL0_RX_EN
-+#define DEFAULT_CORE_CNTRL CORE_MDC_EN
-+
-+
-+/* NPE message codes */
-+#define NPE_GETSTATUS 0x00
-+#define NPE_EDB_SETPORTADDRESS 0x01
-+#define NPE_EDB_GETMACADDRESSDATABASE 0x02
-+#define NPE_EDB_SETMACADDRESSSDATABASE 0x03
-+#define NPE_GETSTATS 0x04
-+#define NPE_RESETSTATS 0x05
-+#define NPE_SETMAXFRAMELENGTHS 0x06
-+#define NPE_VLAN_SETRXTAGMODE 0x07
-+#define NPE_VLAN_SETDEFAULTRXVID 0x08
-+#define NPE_VLAN_SETPORTVLANTABLEENTRY 0x09
-+#define NPE_VLAN_SETPORTVLANTABLERANGE 0x0A
-+#define NPE_VLAN_SETRXQOSENTRY 0x0B
-+#define NPE_VLAN_SETPORTIDEXTRACTIONMODE 0x0C
-+#define NPE_STP_SETBLOCKINGSTATE 0x0D
-+#define NPE_FW_SETFIREWALLMODE 0x0E
-+#define NPE_PC_SETFRAMECONTROLDURATIONID 0x0F
-+#define NPE_PC_SETAPMACTABLE 0x11
-+#define NPE_SETLOOPBACK_MODE 0x12
-+#define NPE_PC_SETBSSIDTABLE 0x13
-+#define NPE_ADDRESS_FILTER_CONFIG 0x14
-+#define NPE_APPENDFCSCONFIG 0x15
-+#define NPE_NOTIFY_MAC_RECOVERY_DONE 0x16
-+#define NPE_MAC_RECOVERY_START 0x17
-+
-+
-+#ifdef __ARMEB__
-+typedef struct sk_buff buffer_t;
-+#define free_buffer dev_kfree_skb
-+#define free_buffer_irq dev_kfree_skb_irq
-+#else
-+typedef void buffer_t;
-+#define free_buffer kfree
-+#define free_buffer_irq kfree
-+#endif
-+
-+struct eth_regs {
-+ u32 tx_control[2], __res1[2]; /* 000 */
-+ u32 rx_control[2], __res2[2]; /* 010 */
-+ u32 random_seed, __res3[3]; /* 020 */
-+ u32 partial_empty_threshold, __res4; /* 030 */
-+ u32 partial_full_threshold, __res5; /* 038 */
-+ u32 tx_start_bytes, __res6[3]; /* 040 */
-+ u32 tx_deferral, rx_deferral, __res7[2];/* 050 */
-+ u32 tx_2part_deferral[2], __res8[2]; /* 060 */
-+ u32 slot_time, __res9[3]; /* 070 */
-+ u32 mdio_command[4]; /* 080 */
-+ u32 mdio_status[4]; /* 090 */
-+ u32 mcast_mask[6], __res10[2]; /* 0A0 */
-+ u32 mcast_addr[6], __res11[2]; /* 0C0 */
-+ u32 int_clock_threshold, __res12[3]; /* 0E0 */
-+ u32 hw_addr[6], __res13[61]; /* 0F0 */
-+ u32 core_control; /* 1FC */
-+};
-+
-+struct port {
-+ struct resource *mem_res;
-+ struct eth_regs __iomem *regs;
-+ struct npe *npe;
-+ struct net_device *netdev;
-+ struct napi_struct napi;
-+ struct net_device_stats stat;
-+ struct mii_if_info mii;
-+ struct delayed_work mdio_thread;
-+ struct eth_plat_info *plat;
-+ buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
-+ struct desc *desc_tab; /* coherent */
-+ u32 desc_tab_phys;
-+ int id; /* logical port ID */
-+ u16 mii_bmcr;
-+};
-+
-+/* NPE message structure */
-+struct msg {
-+#ifdef __ARMEB__
-+ u8 cmd, eth_id, byte2, byte3;
-+ u8 byte4, byte5, byte6, byte7;
-+#else
-+ u8 byte3, byte2, eth_id, cmd;
-+ u8 byte7, byte6, byte5, byte4;
-+#endif
-+};
-+
-+/* Ethernet packet descriptor */
-+struct desc {
-+ u32 next; /* pointer to next buffer, unused */
-+
-+#ifdef __ARMEB__
-+ u16 buf_len; /* buffer length */
-+ u16 pkt_len; /* packet length */
-+ u32 data; /* pointer to data buffer in RAM */
-+ u8 dest_id;
-+ u8 src_id;
-+ u16 flags;
-+ u8 qos;
-+ u8 padlen;
-+ u16 vlan_tci;
-+#else
-+ u16 pkt_len; /* packet length */
-+ u16 buf_len; /* buffer length */
-+ u32 data; /* pointer to data buffer in RAM */
-+ u16 flags;
-+ u8 src_id;
-+ u8 dest_id;
-+ u16 vlan_tci;
-+ u8 padlen;
-+ u8 qos;
-+#endif
-+
-+#ifdef __ARMEB__
-+ u8 dst_mac_0, dst_mac_1, dst_mac_2, dst_mac_3;
-+ u8 dst_mac_4, dst_mac_5, src_mac_0, src_mac_1;
-+ u8 src_mac_2, src_mac_3, src_mac_4, src_mac_5;
-+#else
-+ u8 dst_mac_3, dst_mac_2, dst_mac_1, dst_mac_0;
-+ u8 src_mac_1, src_mac_0, dst_mac_5, dst_mac_4;
-+ u8 src_mac_5, src_mac_4, src_mac_3, src_mac_2;
-+#endif
-+};
-+
-+
-+#define rx_desc_phys(port, n) ((port)->desc_tab_phys + \
-+ (n) * sizeof(struct desc))
-+#define rx_desc_ptr(port, n) (&(port)->desc_tab[n])
-+
-+#define tx_desc_phys(port, n) ((port)->desc_tab_phys + \
-+ ((n) + RX_DESCS) * sizeof(struct desc))
-+#define tx_desc_ptr(port, n) (&(port)->desc_tab[(n) + RX_DESCS])
-+
-+#ifndef __ARMEB__
-+static inline void memcpy_swab32(u32 *dest, u32 *src, int cnt)
-+{
-+ int i;
-+ for (i = 0; i < cnt; i++)
-+ dest[i] = swab32(src[i]);
-+}
-+#endif
-+
-+static spinlock_t mdio_lock;
-+static struct eth_regs __iomem *mdio_regs; /* mdio command and status only */
-+static int ports_open;
-+static struct port *npe_port_tab[MAX_NPES];
-+static struct dma_pool *dma_pool;
-+
-+
-+static u16 mdio_cmd(struct net_device *dev, int phy_id, int location,
-+ int write, u16 cmd)
-+{
-+ int cycles = 0;
-+
-+ if (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80) {
-+ printk(KERN_ERR "%s: MII not ready to transmit\n", dev->name);
-+ return 0;
-+ }
-+
-+ if (write) {
-+ __raw_writel(cmd & 0xFF, &mdio_regs->mdio_command[0]);
-+ __raw_writel(cmd >> 8, &mdio_regs->mdio_command[1]);
-+ }
-+ __raw_writel(((phy_id << 5) | location) & 0xFF,
-+ &mdio_regs->mdio_command[2]);
-+ __raw_writel((phy_id >> 3) | (write << 2) | 0x80 /* GO */,
-+ &mdio_regs->mdio_command[3]);
-+
-+ while ((cycles < MAX_MDIO_RETRIES) &&
-+ (__raw_readl(&mdio_regs->mdio_command[3]) & 0x80)) {
-+ udelay(1);
-+ cycles++;
-+ }
-+
-+ if (cycles == MAX_MDIO_RETRIES) {
-+ printk(KERN_ERR "%s: MII write failed\n", dev->name);
-+ return 0;
-+ }
-+
-+#if DEBUG_MDIO
-+ printk(KERN_DEBUG "%s: mdio_cmd() took %i cycles\n", dev->name,
-+ cycles);
-+#endif
-+
-+ if (write)
-+ return 0;
-+
-+ if (__raw_readl(&mdio_regs->mdio_status[3]) & 0x80) {
-+ printk(KERN_ERR "%s: MII read failed\n", dev->name);
-+ return 0;
-+ }
-+
-+ return (__raw_readl(&mdio_regs->mdio_status[0]) & 0xFF) |
-+ (__raw_readl(&mdio_regs->mdio_status[1]) << 8);
-+}
-+
-+static int mdio_read(struct net_device *dev, int phy_id, int location)
-+{
-+ unsigned long flags;
-+ u16 val;
-+
-+ spin_lock_irqsave(&mdio_lock, flags);
-+ val = mdio_cmd(dev, phy_id, location, 0, 0);
-+ spin_unlock_irqrestore(&mdio_lock, flags);
-+ return val;
-+}
-+
-+static void mdio_write(struct net_device *dev, int phy_id, int location,
-+ int val)
-+{
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&mdio_lock, flags);
-+ mdio_cmd(dev, phy_id, location, 1, val);
-+ spin_unlock_irqrestore(&mdio_lock, flags);
-+}
-+
-+static void phy_reset(struct net_device *dev, int phy_id)
-+{
-+ struct port *port = netdev_priv(dev);
-+ int cycles = 0;
-+
-+ mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr | BMCR_RESET);
-+
-+ while (cycles < MAX_MII_RESET_RETRIES) {
-+ if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) {
-+#if DEBUG_MDIO
-+ printk(KERN_DEBUG "%s: phy_reset() took %i cycles\n",
-+ dev->name, cycles);
-+#endif
-+ return;
-+ }
-+ udelay(1);
-+ cycles++;
-+ }
-+
-+ printk(KERN_ERR "%s: MII reset failed\n", dev->name);
-+}
-+
-+static void eth_set_duplex(struct port *port)
-+{
-+ if (port->mii.full_duplex)
-+ __raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
-+ &port->regs->tx_control[0]);
-+ else
-+ __raw_writel(DEFAULT_TX_CNTRL0 | TX_CNTRL0_HALFDUPLEX,
-+ &port->regs->tx_control[0]);
-+}
-+
-+
-+static void phy_check_media(struct port *port, int init)
-+{
-+ if (mii_check_media(&port->mii, 1, init))
-+ eth_set_duplex(port);
-+ if (port->mii.force_media) { /* mii_check_media() doesn't work */
-+ struct net_device *dev = port->netdev;
-+ int cur_link = mii_link_ok(&port->mii);
-+ int prev_link = netif_carrier_ok(dev);
-+
-+ if (!prev_link && cur_link) {
-+ printk(KERN_INFO "%s: link up\n", dev->name);
-+ netif_carrier_on(dev);
-+ } else if (prev_link && !cur_link) {
-+ printk(KERN_INFO "%s: link down\n", dev->name);
-+ netif_carrier_off(dev);
-+ }
-+ }
-+}
-+
-+
-+static void mdio_thread(struct work_struct *work)
-+{
-+ struct port *port = container_of(work, struct port, mdio_thread.work);
-+
-+ phy_check_media(port, 0);
-+ schedule_delayed_work(&port->mdio_thread, MDIO_INTERVAL);
-+}
-+
-+
-+static inline void debug_pkt(struct net_device *dev, const char *func,
-+ u8 *data, int len)
-+{
-+#if DEBUG_PKT_BYTES
-+ int i;
-+
-+ printk(KERN_DEBUG "%s: %s(%i) ", dev->name, func, len);
-+ for (i = 0; i < len; i++) {
-+ if (i >= DEBUG_PKT_BYTES)
-+ break;
-+ printk("%s%02X",
-+ ((i == 6) || (i == 12) || (i >= 14)) ? " " : "",
-+ data[i]);
-+ }
-+ printk("\n");
-+#endif
-+}
-+
-+
-+static inline void debug_desc(u32 phys, struct desc *desc)
-+{
-+#if DEBUG_DESC
-+ printk(KERN_DEBUG "%X: %X %3X %3X %08X %2X < %2X %4X %X"
-+ " %X %X %02X%02X%02X%02X%02X%02X < %02X%02X%02X%02X%02X%02X\n",
-+ phys, desc->next, desc->buf_len, desc->pkt_len,
-+ desc->data, desc->dest_id, desc->src_id, desc->flags,
-+ desc->qos, desc->padlen, desc->vlan_tci,
-+ desc->dst_mac_0, desc->dst_mac_1, desc->dst_mac_2,
-+ desc->dst_mac_3, desc->dst_mac_4, desc->dst_mac_5,
-+ desc->src_mac_0, desc->src_mac_1, desc->src_mac_2,
-+ desc->src_mac_3, desc->src_mac_4, desc->src_mac_5);
-+#endif
-+}
-+
-+static inline void debug_queue(unsigned int queue, int is_get, u32 phys)
-+{
-+#if DEBUG_QUEUES
-+ static struct {
-+ int queue;
-+ char *name;
-+ } names[] = {
-+ { TX_QUEUE(0x10), "TX#0 " },
-+ { TX_QUEUE(0x20), "TX#1 " },
-+ { TX_QUEUE(0x00), "TX#2 " },
-+ { RXFREE_QUEUE(0x10), "RX-free#0 " },
-+ { RXFREE_QUEUE(0x20), "RX-free#1 " },
-+ { RXFREE_QUEUE(0x00), "RX-free#2 " },
-+ { TXDONE_QUEUE, "TX-done " },
-+ };
-+ int i;
-+
-+ for (i = 0; i < ARRAY_SIZE(names); i++)
-+ if (names[i].queue == queue)
-+ break;
-+
-+ printk(KERN_DEBUG "Queue %i %s%s %X\n", queue,
-+ i < ARRAY_SIZE(names) ? names[i].name : "",
-+ is_get ? "->" : "<-", phys);
-+#endif
-+}
-+
-+static inline u32 queue_get_entry(unsigned int queue)
-+{
-+ u32 phys = qmgr_get_entry(queue);
-+ debug_queue(queue, 1, phys);
-+ return phys;
-+}
-+
-+static inline int queue_get_desc(unsigned int queue, struct port *port,
-+ int is_tx)
-+{
-+ u32 phys, tab_phys, n_desc;
-+ struct desc *tab;
-+
-+ if (!(phys = queue_get_entry(queue)))
-+ return -1;
-+
-+ phys &= ~0x1F; /* mask out non-address bits */
-+ tab_phys = is_tx ? tx_desc_phys(port, 0) : rx_desc_phys(port, 0);
-+ tab = is_tx ? tx_desc_ptr(port, 0) : rx_desc_ptr(port, 0);
-+ n_desc = (phys - tab_phys) / sizeof(struct desc);
-+ BUG_ON(n_desc >= (is_tx ? TX_DESCS : RX_DESCS));
-+ debug_desc(phys, &tab[n_desc]);
-+ BUG_ON(tab[n_desc].next);
-+ return n_desc;
-+}
-+
-+static inline void queue_put_desc(unsigned int queue, u32 phys,
-+ struct desc *desc)
-+{
-+ debug_queue(queue, 0, phys);
-+ debug_desc(phys, desc);
-+ BUG_ON(phys & 0x1F);
-+ qmgr_put_entry(queue, phys);
-+ BUG_ON(qmgr_stat_overflow(queue));
-+}
-+
-+
-+static inline void dma_unmap_tx(struct port *port, struct desc *desc)
-+{
-+#ifdef __ARMEB__
-+ dma_unmap_single(&port->netdev->dev, desc->data,
-+ desc->buf_len, DMA_TO_DEVICE);
-+#else
-+ dma_unmap_single(&port->netdev->dev, desc->data & ~3,
-+ ALIGN((desc->data & 3) + desc->buf_len, 4),
-+ DMA_TO_DEVICE);
-+#endif
-+}
-+
-+
-+static void eth_rx_irq(void *pdev)
-+{
-+ struct net_device *dev = pdev;
-+ struct port *port = netdev_priv(dev);
-+
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: eth_rx_irq\n", dev->name);
-+#endif
-+ qmgr_disable_irq(port->plat->rxq);
-+ netif_rx_schedule(dev, &port->napi);
-+}
-+
-+static int eth_poll(struct napi_struct *napi, int budget)
-+{
-+ struct port *port = container_of(napi, struct port, napi);
-+ struct net_device *dev = port->netdev;
-+ unsigned int rxq = port->plat->rxq, rxfreeq = RXFREE_QUEUE(port->id);
-+ int received = 0;
-+
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: eth_poll\n", dev->name);
-+#endif
-+
-+ while (received < budget) {
-+ struct sk_buff *skb;
-+ struct desc *desc;
-+ int n;
-+#ifdef __ARMEB__
-+ struct sk_buff *temp;
-+ u32 phys;
-+#endif
-+
-+ if ((n = queue_get_desc(rxq, port, 0)) < 0) {
-+ received = 0; /* No packet received */
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: eth_poll netif_rx_complete\n",
-+ dev->name);
-+#endif
-+ netif_rx_complete(dev, napi);
-+ qmgr_enable_irq(rxq);
-+ if (!qmgr_stat_empty(rxq) &&
-+ netif_rx_reschedule(dev, napi)) {
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: eth_poll"
-+ " netif_rx_reschedule successed\n",
-+ dev->name);
-+#endif
-+ qmgr_disable_irq(rxq);
-+ continue;
-+ }
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: eth_poll all done\n",
-+ dev->name);
-+#endif
-+ return 0; /* all work done */
-+ }
-+
-+ desc = rx_desc_ptr(port, n);
-+
-+#ifdef __ARMEB__
-+ if ((skb = netdev_alloc_skb(dev, RX_BUFF_SIZE))) {
-+ phys = dma_map_single(&dev->dev, skb->data,
-+ RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ if (dma_mapping_error(phys)) {
-+ dev_kfree_skb(skb);
-+ skb = NULL;
-+ }
-+ }
-+#else
-+ skb = netdev_alloc_skb(dev,
-+ ALIGN(NET_IP_ALIGN + desc->pkt_len, 4));
-+#endif
-+
-+ if (!skb) {
-+ port->stat.rx_dropped++;
-+ /* put the desc back on RX-ready queue */
-+ desc->buf_len = MAX_MRU;
-+ desc->pkt_len = 0;
-+ queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
-+ continue;
-+ }
-+
-+ /* process received frame */
-+#ifdef __ARMEB__
-+ temp = skb;
-+ skb = port->rx_buff_tab[n];
-+ dma_unmap_single(&dev->dev, desc->data - NET_IP_ALIGN,
-+ RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+#else
-+ dma_sync_single(&dev->dev, desc->data - NET_IP_ALIGN,
-+ RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
-+ ALIGN(NET_IP_ALIGN + desc->pkt_len, 4) / 4);
-+#endif
-+ skb_reserve(skb, NET_IP_ALIGN);
-+ skb_put(skb, desc->pkt_len);
-+
-+ debug_pkt(dev, "eth_poll", skb->data, skb->len);
-+
-+ skb->protocol = eth_type_trans(skb, dev);
-+ dev->last_rx = jiffies;
-+ port->stat.rx_packets++;
-+ port->stat.rx_bytes += skb->len;
-+ netif_receive_skb(skb);
-+
-+ /* put the new buffer on RX-free queue */
-+#ifdef __ARMEB__
-+ port->rx_buff_tab[n] = temp;
-+ desc->data = phys + NET_IP_ALIGN;
-+#endif
-+ desc->buf_len = MAX_MRU;
-+ desc->pkt_len = 0;
-+ queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
-+ received++;
-+ }
-+
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "eth_poll(): end, not all work done\n");
-+#endif
-+ return received; /* not all work done */
-+}
-+
-+
-+static void eth_txdone_irq(void *unused)
-+{
-+ u32 phys;
-+
-+#if DEBUG_TX
-+ printk(KERN_DEBUG DRV_NAME ": eth_txdone_irq\n");
-+#endif
-+ while ((phys = queue_get_entry(TXDONE_QUEUE)) != 0) {
-+ u32 npe_id, n_desc;
-+ struct port *port;
-+ struct desc *desc;
-+ int start;
-+
-+ npe_id = phys & 3;
-+ BUG_ON(npe_id >= MAX_NPES);
-+ port = npe_port_tab[npe_id];
-+ BUG_ON(!port);
-+ phys &= ~0x1F; /* mask out non-address bits */
-+ n_desc = (phys - tx_desc_phys(port, 0)) / sizeof(struct desc);
-+ BUG_ON(n_desc >= TX_DESCS);
-+ desc = tx_desc_ptr(port, n_desc);
-+ debug_desc(phys, desc);
-+
-+ if (port->tx_buff_tab[n_desc]) { /* not the draining packet */
-+ port->stat.tx_packets++;
-+ port->stat.tx_bytes += desc->pkt_len;
-+
-+ dma_unmap_tx(port, desc);
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: eth_txdone_irq free %p\n",
-+ port->netdev->name, port->tx_buff_tab[n_desc]);
-+#endif
-+ free_buffer_irq(port->tx_buff_tab[n_desc]);
-+ port->tx_buff_tab[n_desc] = NULL;
-+ }
-+
-+ start = qmgr_stat_empty(port->plat->txreadyq);
-+ queue_put_desc(port->plat->txreadyq, phys, desc);
-+ if (start) {
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: eth_txdone_irq xmit ready\n",
-+ port->netdev->name);
-+#endif
-+ netif_wake_queue(port->netdev);
-+ }
-+ }
-+}
-+
-+static int eth_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+ struct port *port = netdev_priv(dev);
-+ unsigned int txreadyq = port->plat->txreadyq;
-+ int len, offset, bytes, n;
-+ void *mem;
-+ u32 phys;
-+ struct desc *desc;
-+
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: eth_xmit\n", dev->name);
-+#endif
-+
-+ if (unlikely(skb->len > MAX_MRU)) {
-+ dev_kfree_skb(skb);
-+ port->stat.tx_errors++;
-+ return NETDEV_TX_OK;
-+ }
-+
-+ debug_pkt(dev, "eth_xmit", skb->data, skb->len);
-+
-+ len = skb->len;
-+#ifdef __ARMEB__
-+ offset = 0; /* no need to keep alignment */
-+ bytes = len;
-+ mem = skb->data;
-+#else
-+ offset = (int)skb->data & 3; /* keep 32-bit alignment */
-+ bytes = ALIGN(offset + len, 4);
-+ if (!(mem = kmalloc(bytes, GFP_ATOMIC))) {
-+ dev_kfree_skb(skb);
-+ port->stat.tx_dropped++;
-+ return NETDEV_TX_OK;
-+ }
-+ memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4);
-+ dev_kfree_skb(skb);
-+#endif
-+
-+ phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
-+ if (dma_mapping_error(phys)) {
-+#ifdef __ARMEB__
-+ dev_kfree_skb(skb);
-+#else
-+ kfree(mem);
-+#endif
-+ port->stat.tx_dropped++;
-+ return NETDEV_TX_OK;
-+ }
-+
-+ n = queue_get_desc(txreadyq, port, 1);
-+ BUG_ON(n < 0);
-+ desc = tx_desc_ptr(port, n);
-+
-+#ifdef __ARMEB__
-+ port->tx_buff_tab[n] = skb;
-+#else
-+ port->tx_buff_tab[n] = mem;
-+#endif
-+ desc->data = phys + offset;
-+ desc->buf_len = desc->pkt_len = len;
-+
-+ /* NPE firmware pads short frames with zeros internally */
-+ wmb();
-+ queue_put_desc(TX_QUEUE(port->id), tx_desc_phys(port, n), desc);
-+ dev->trans_start = jiffies;
-+
-+ if (qmgr_stat_empty(txreadyq)) {
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: eth_xmit queue full\n", dev->name);
-+#endif
-+ netif_stop_queue(dev);
-+ /* we could miss TX ready interrupt */
-+ if (!qmgr_stat_empty(txreadyq)) {
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: eth_xmit ready again\n",
-+ dev->name);
-+#endif
-+ netif_wake_queue(dev);
-+ }
-+ }
-+
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: eth_xmit end\n", dev->name);
-+#endif
-+ return NETDEV_TX_OK;
-+}
-+
-+
-+static struct net_device_stats *eth_stats(struct net_device *dev)
-+{
-+ struct port *port = netdev_priv(dev);
-+ return &port->stat;
-+}
-+
-+static void eth_set_mcast_list(struct net_device *dev)
-+{
-+ struct port *port = netdev_priv(dev);
-+ struct dev_mc_list *mclist = dev->mc_list;
-+ u8 diffs[ETH_ALEN], *addr;
-+ int cnt = dev->mc_count, i;
-+
-+ if ((dev->flags & IFF_PROMISC) || !mclist || !cnt) {
-+ __raw_writel(DEFAULT_RX_CNTRL0 & ~RX_CNTRL0_ADDR_FLTR_EN,
-+ &port->regs->rx_control[0]);
-+ return;
-+ }
-+
-+ memset(diffs, 0, ETH_ALEN);
-+ addr = mclist->dmi_addr; /* first MAC address */
-+
-+ while (--cnt && (mclist = mclist->next))
-+ for (i = 0; i < ETH_ALEN; i++)
-+ diffs[i] |= addr[i] ^ mclist->dmi_addr[i];
-+
-+ for (i = 0; i < ETH_ALEN; i++) {
-+ __raw_writel(addr[i], &port->regs->mcast_addr[i]);
-+ __raw_writel(~diffs[i], &port->regs->mcast_mask[i]);
-+ }
-+
-+ __raw_writel(DEFAULT_RX_CNTRL0 | RX_CNTRL0_ADDR_FLTR_EN,
-+ &port->regs->rx_control[0]);
-+}
-+
-+
-+static int eth_ioctl(struct net_device *dev, struct ifreq *req, int cmd)
-+{
-+ struct port *port = netdev_priv(dev);
-+ unsigned int duplex_chg;
-+ int err;
-+
-+ if (!netif_running(dev))
-+ return -EINVAL;
-+ err = generic_mii_ioctl(&port->mii, if_mii(req), cmd, &duplex_chg);
-+ if (duplex_chg)
-+ eth_set_duplex(port);
-+ return err;
-+}
-+
-+
-+static int request_queues(struct port *port)
-+{
-+ int err;
-+
-+ err = qmgr_request_queue(RXFREE_QUEUE(port->id), RX_DESCS, 0, 0);
-+ if (err)
-+ return err;
-+
-+ err = qmgr_request_queue(port->plat->rxq, RX_DESCS, 0, 0);
-+ if (err)
-+ goto rel_rxfree;
-+
-+ err = qmgr_request_queue(TX_QUEUE(port->id), TX_DESCS, 0, 0);
-+ if (err)
-+ goto rel_rx;
-+
-+ err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0);
-+ if (err)
-+ goto rel_tx;
-+
-+ /* TX-done queue handles skbs sent out by the NPEs */
-+ if (!ports_open) {
-+ err = qmgr_request_queue(TXDONE_QUEUE, TXDONE_QUEUE_LEN, 0, 0);
-+ if (err)
-+ goto rel_txready;
-+ }
-+ return 0;
-+
-+rel_txready:
-+ qmgr_release_queue(port->plat->txreadyq);
-+rel_tx:
-+ qmgr_release_queue(TX_QUEUE(port->id));
-+rel_rx:
-+ qmgr_release_queue(port->plat->rxq);
-+rel_rxfree:
-+ qmgr_release_queue(RXFREE_QUEUE(port->id));
-+ printk(KERN_DEBUG "%s: unable to request hardware queues\n",
-+ port->netdev->name);
-+ return err;
-+}
-+
-+static void release_queues(struct port *port)
-+{
-+ qmgr_release_queue(RXFREE_QUEUE(port->id));
-+ qmgr_release_queue(port->plat->rxq);
-+ qmgr_release_queue(TX_QUEUE(port->id));
-+ qmgr_release_queue(port->plat->txreadyq);
-+
-+ if (!ports_open)
-+ qmgr_release_queue(TXDONE_QUEUE);
-+}
-+
-+static int init_queues(struct port *port)
-+{
-+ int i;
-+
-+ if (!ports_open)
-+ if (!(dma_pool = dma_pool_create(DRV_NAME, NULL,
-+ POOL_ALLOC_SIZE, 32, 0)))
-+ return -ENOMEM;
-+
-+ if (!(port->desc_tab = dma_pool_alloc(dma_pool, GFP_KERNEL,
-+ &port->desc_tab_phys)))
-+ return -ENOMEM;
-+ memset(port->desc_tab, 0, POOL_ALLOC_SIZE);
-+ memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */
-+ memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab));
-+
-+ /* Setup RX buffers */
-+ for (i = 0; i < RX_DESCS; i++) {
-+ struct desc *desc = rx_desc_ptr(port, i);
-+ buffer_t *buff; /* skb or kmalloc()ated memory */
-+ void *data;
-+#ifdef __ARMEB__
-+ if (!(buff = netdev_alloc_skb(port->netdev, RX_BUFF_SIZE)))
-+ return -ENOMEM;
-+ data = buff->data;
-+#else
-+ if (!(buff = kmalloc(RX_BUFF_SIZE, GFP_KERNEL)))
-+ return -ENOMEM;
-+ data = buff;
-+#endif
-+ desc->buf_len = MAX_MRU;
-+ desc->data = dma_map_single(&port->netdev->dev, data,
-+ RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ if (dma_mapping_error(desc->data)) {
-+ free_buffer(buff);
-+ return -EIO;
-+ }
-+ desc->data += NET_IP_ALIGN;
-+ port->rx_buff_tab[i] = buff;
-+ }
-+
-+ return 0;
-+}
-+
-+static void destroy_queues(struct port *port)
-+{
-+ int i;
-+
-+ if (port->desc_tab) {
-+ for (i = 0; i < RX_DESCS; i++) {
-+ struct desc *desc = rx_desc_ptr(port, i);
-+ buffer_t *buff = port->rx_buff_tab[i];
-+ if (buff) {
-+ dma_unmap_single(&port->netdev->dev,
-+ desc->data - NET_IP_ALIGN,
-+ RX_BUFF_SIZE, DMA_FROM_DEVICE);
-+ free_buffer(buff);
-+ }
-+ }
-+ for (i = 0; i < TX_DESCS; i++) {
-+ struct desc *desc = tx_desc_ptr(port, i);
-+ buffer_t *buff = port->tx_buff_tab[i];
-+ if (buff) {
-+ dma_unmap_tx(port, desc);
-+ free_buffer(buff);
-+ }
-+ }
-+ dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys);
-+ port->desc_tab = NULL;
-+ }
-+
-+ if (!ports_open && dma_pool) {
-+ dma_pool_destroy(dma_pool);
-+ dma_pool = NULL;
-+ }
-+}
-+
-+static int eth_open(struct net_device *dev)
-+{
-+ struct port *port = netdev_priv(dev);
-+ struct npe *npe = port->npe;
-+ struct msg msg;
-+ int i, err;
-+
-+ if (!npe_running(npe)) {
-+ err = npe_load_firmware(npe, npe_name(npe), &dev->dev);
-+ if (err)
-+ return err;
-+
-+ if (npe_recv_message(npe, &msg, "ETH_GET_STATUS")) {
-+ printk(KERN_ERR "%s: %s not responding\n", dev->name,
-+ npe_name(npe));
-+ return -EIO;
-+ }
-+ }
-+
-+ mdio_write(dev, port->plat->phy, MII_BMCR, port->mii_bmcr);
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = NPE_VLAN_SETRXQOSENTRY;
-+ msg.eth_id = port->id;
-+ msg.byte5 = port->plat->rxq | 0x80;
-+ msg.byte7 = port->plat->rxq << 4;
-+ for (i = 0; i < 8; i++) {
-+ msg.byte3 = i;
-+ if (npe_send_recv_message(port->npe, &msg, "ETH_SET_RXQ"))
-+ return -EIO;
-+ }
-+
-+ msg.cmd = NPE_EDB_SETPORTADDRESS;
-+ msg.eth_id = PHYSICAL_ID(port->id);
-+ msg.byte2 = dev->dev_addr[0];
-+ msg.byte3 = dev->dev_addr[1];
-+ msg.byte4 = dev->dev_addr[2];
-+ msg.byte5 = dev->dev_addr[3];
-+ msg.byte6 = dev->dev_addr[4];
-+ msg.byte7 = dev->dev_addr[5];
-+ if (npe_send_recv_message(port->npe, &msg, "ETH_SET_MAC"))
-+ return -EIO;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = NPE_FW_SETFIREWALLMODE;
-+ msg.eth_id = port->id;
-+ if (npe_send_recv_message(port->npe, &msg, "ETH_SET_FIREWALL_MODE"))
-+ return -EIO;
-+
-+ if ((err = request_queues(port)) != 0)
-+ return err;
-+
-+ if ((err = init_queues(port)) != 0) {
-+ destroy_queues(port);
-+ release_queues(port);
-+ return err;
-+ }
-+
-+ for (i = 0; i < ETH_ALEN; i++)
-+ __raw_writel(dev->dev_addr[i], &port->regs->hw_addr[i]);
-+ __raw_writel(0x08, &port->regs->random_seed);
-+ __raw_writel(0x12, &port->regs->partial_empty_threshold);
-+ __raw_writel(0x30, &port->regs->partial_full_threshold);
-+ __raw_writel(0x08, &port->regs->tx_start_bytes);
-+ __raw_writel(0x15, &port->regs->tx_deferral);
-+ __raw_writel(0x08, &port->regs->tx_2part_deferral[0]);
-+ __raw_writel(0x07, &port->regs->tx_2part_deferral[1]);
-+ __raw_writel(0x80, &port->regs->slot_time);
-+ __raw_writel(0x01, &port->regs->int_clock_threshold);
-+
-+ /* Populate queues with buffers, no failure after this point */
-+ for (i = 0; i < TX_DESCS; i++)
-+ queue_put_desc(port->plat->txreadyq,
-+ tx_desc_phys(port, i), tx_desc_ptr(port, i));
-+
-+ for (i = 0; i < RX_DESCS; i++)
-+ queue_put_desc(RXFREE_QUEUE(port->id),
-+ rx_desc_phys(port, i), rx_desc_ptr(port, i));
-+
-+ __raw_writel(TX_CNTRL1_RETRIES, &port->regs->tx_control[1]);
-+ __raw_writel(DEFAULT_TX_CNTRL0, &port->regs->tx_control[0]);
-+ __raw_writel(0, &port->regs->rx_control[1]);
-+ __raw_writel(DEFAULT_RX_CNTRL0, &port->regs->rx_control[0]);
-+
-+ napi_enable(&port->napi);
-+ phy_check_media(port, 1);
-+ eth_set_mcast_list(dev);
-+ netif_start_queue(dev);
-+ schedule_delayed_work(&port->mdio_thread, MDIO_INTERVAL);
-+
-+ qmgr_set_irq(port->plat->rxq, QUEUE_IRQ_SRC_NOT_EMPTY,
-+ eth_rx_irq, dev);
-+ if (!ports_open) {
-+ qmgr_set_irq(TXDONE_QUEUE, QUEUE_IRQ_SRC_NOT_EMPTY,
-+ eth_txdone_irq, NULL);
-+ qmgr_enable_irq(TXDONE_QUEUE);
-+ }
-+ ports_open++;
-+ /* we may already have RX data, enables IRQ */
-+ netif_rx_schedule(dev, &port->napi);
-+ return 0;
-+}
-+
-+static int eth_close(struct net_device *dev)
-+{
-+ struct port *port = netdev_priv(dev);
-+ struct msg msg;
-+ int buffs = RX_DESCS; /* allocated RX buffers */
-+ int i;
-+
-+ ports_open--;
-+ qmgr_disable_irq(port->plat->rxq);
-+ napi_disable(&port->napi);
-+ netif_stop_queue(dev);
-+
-+ while (queue_get_desc(RXFREE_QUEUE(port->id), port, 0) >= 0)
-+ buffs--;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = NPE_SETLOOPBACK_MODE;
-+ msg.eth_id = port->id;
-+ msg.byte3 = 1;
-+ if (npe_send_recv_message(port->npe, &msg, "ETH_ENABLE_LOOPBACK"))
-+ printk(KERN_CRIT "%s: unable to enable loopback\n", dev->name);
-+
-+ i = 0;
-+ do { /* drain RX buffers */
-+ while (queue_get_desc(port->plat->rxq, port, 0) >= 0)
-+ buffs--;
-+ if (!buffs)
-+ break;
-+ if (qmgr_stat_empty(TX_QUEUE(port->id))) {
-+ /* we have to inject some packet */
-+ struct desc *desc;
-+ u32 phys;
-+ int n = queue_get_desc(port->plat->txreadyq, port, 1);
-+ BUG_ON(n < 0);
-+ desc = tx_desc_ptr(port, n);
-+ phys = tx_desc_phys(port, n);
-+ desc->buf_len = desc->pkt_len = 1;
-+ wmb();
-+ queue_put_desc(TX_QUEUE(port->id), phys, desc);
-+ }
-+ udelay(1);
-+ } while (++i < MAX_CLOSE_WAIT);
-+
-+ if (buffs)
-+ printk(KERN_CRIT "%s: unable to drain RX queue, %i buffer(s)"
-+ " left in NPE\n", dev->name, buffs);
-+#if DEBUG_CLOSE
-+ if (!buffs)
-+ printk(KERN_DEBUG "Draining RX queue took %i cycles\n", i);
-+#endif
-+
-+ buffs = TX_DESCS;
-+ while (queue_get_desc(TX_QUEUE(port->id), port, 1) >= 0)
-+ buffs--; /* cancel TX */
-+
-+ i = 0;
-+ do {
-+ while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)
-+ buffs--;
-+ if (!buffs)
-+ break;
-+ } while (++i < MAX_CLOSE_WAIT);
-+
-+ if (buffs)
-+ printk(KERN_CRIT "%s: unable to drain TX queue, %i buffer(s) "
-+ "left in NPE\n", dev->name, buffs);
-+#if DEBUG_CLOSE
-+ if (!buffs)
-+ printk(KERN_DEBUG "Draining TX queues took %i cycles\n", i);
-+#endif
-+
-+ msg.byte3 = 0;
-+ if (npe_send_recv_message(port->npe, &msg, "ETH_DISABLE_LOOPBACK"))
-+ printk(KERN_CRIT "%s: unable to disable loopback\n",
-+ dev->name);
-+
-+ port->mii_bmcr = mdio_read(dev, port->plat->phy, MII_BMCR) &
-+ ~(BMCR_RESET | BMCR_PDOWN); /* may have been altered */
-+ mdio_write(dev, port->plat->phy, MII_BMCR,
-+ port->mii_bmcr | BMCR_PDOWN);
-+
-+ if (!ports_open)
-+ qmgr_disable_irq(TXDONE_QUEUE);
-+ cancel_rearming_delayed_work(&port->mdio_thread);
-+ destroy_queues(port);
-+ release_queues(port);
-+ return 0;
-+}
-+
-+static int __devinit eth_init_one(struct platform_device *pdev)
-+{
-+ struct port *port;
-+ struct net_device *dev;
-+ struct eth_plat_info *plat = pdev->dev.platform_data;
-+ u32 regs_phys;
-+ int err;
-+
-+ if (!(dev = alloc_etherdev(sizeof(struct port))))
-+ return -ENOMEM;
-+
-+ SET_NETDEV_DEV(dev, &pdev->dev);
-+ port = netdev_priv(dev);
-+ port->netdev = dev;
-+ port->id = pdev->id;
-+
-+ switch (port->id) {
-+ case IXP4XX_ETH_NPEA:
-+ port->regs = (struct eth_regs __iomem *)IXP4XX_EthA_BASE_VIRT;
-+ regs_phys = IXP4XX_EthA_BASE_PHYS;
-+ break;
-+ case IXP4XX_ETH_NPEB:
-+ port->regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
-+ regs_phys = IXP4XX_EthB_BASE_PHYS;
-+ break;
-+ case IXP4XX_ETH_NPEC:
-+ port->regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
-+ regs_phys = IXP4XX_EthC_BASE_PHYS;
-+ break;
-+ default:
-+ err = -ENOSYS;
-+ goto err_free;
-+ }
-+
-+ dev->open = eth_open;
-+ dev->hard_start_xmit = eth_xmit;
-+ dev->stop = eth_close;
-+ dev->get_stats = eth_stats;
-+ dev->do_ioctl = eth_ioctl;
-+ dev->set_multicast_list = eth_set_mcast_list;
-+ dev->tx_queue_len = 100;
-+
-+ netif_napi_add(dev, &port->napi, eth_poll, NAPI_WEIGHT);
-+
-+ if (!(port->npe = npe_request(NPE_ID(port->id)))) {
-+ err = -EIO;
-+ goto err_free;
-+ }
-+
-+ if (register_netdev(dev)) {
-+ err = -EIO;
-+ goto err_npe_rel;
-+ }
-+
-+ port->mem_res = request_mem_region(regs_phys, REGS_SIZE, dev->name);
-+ if (!port->mem_res) {
-+ err = -EBUSY;
-+ goto err_unreg;
-+ }
-+
-+ port->plat = plat;
-+ npe_port_tab[NPE_ID(port->id)] = port;
-+ memcpy(dev->dev_addr, plat->hwaddr, ETH_ALEN);
-+
-+ platform_set_drvdata(pdev, dev);
-+
-+ __raw_writel(DEFAULT_CORE_CNTRL | CORE_RESET,
-+ &port->regs->core_control);
-+ udelay(50);
-+ __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
-+ udelay(50);
-+
-+ port->mii.dev = dev;
-+ port->mii.mdio_read = mdio_read;
-+ port->mii.mdio_write = mdio_write;
-+ port->mii.phy_id = plat->phy;
-+ port->mii.phy_id_mask = 0x1F;
-+ port->mii.reg_num_mask = 0x1F;
-+
-+ printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy,
-+ npe_name(port->npe));
-+
-+ phy_reset(dev, plat->phy);
-+ port->mii_bmcr = mdio_read(dev, plat->phy, MII_BMCR) &
-+ ~(BMCR_RESET | BMCR_PDOWN);
-+ mdio_write(dev, plat->phy, MII_BMCR, port->mii_bmcr | BMCR_PDOWN);
-+
-+ INIT_DELAYED_WORK(&port->mdio_thread, mdio_thread);
-+ return 0;
-+
-+err_unreg:
-+ unregister_netdev(dev);
-+err_npe_rel:
-+ npe_release(port->npe);
-+err_free:
-+ free_netdev(dev);
-+ return err;
-+}
-+
-+static int __devexit eth_remove_one(struct platform_device *pdev)
-+{
-+ struct net_device *dev = platform_get_drvdata(pdev);
-+ struct port *port = netdev_priv(dev);
-+
-+ unregister_netdev(dev);
-+ npe_port_tab[NPE_ID(port->id)] = NULL;
-+ platform_set_drvdata(pdev, NULL);
-+ npe_release(port->npe);
-+ release_resource(port->mem_res);
-+ free_netdev(dev);
-+ return 0;
-+}
-+
-+static struct platform_driver drv = {
-+ .driver.name = DRV_NAME,
-+ .probe = eth_init_one,
-+ .remove = eth_remove_one,
-+};
-+
-+static int __init eth_init_module(void)
-+{
-+ if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
-+ return -ENOSYS;
-+
-+ /* All MII PHY accesses use NPE-B Ethernet registers */
-+ spin_lock_init(&mdio_lock);
-+ mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
-+ __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control);
-+
-+ return platform_driver_register(&drv);
-+}
-+
-+static void __exit eth_cleanup_module(void)
-+{
-+ platform_driver_unregister(&drv);
-+}
-+
-+MODULE_AUTHOR("Krzysztof Halasa");
-+MODULE_DESCRIPTION("Intel IXP4xx Ethernet driver");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:ixp4xx_eth");
-+module_init(eth_init_module);
-+module_exit(eth_cleanup_module);
---- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-@@ -448,7 +448,9 @@
- return -ETIMEDOUT;
- }
-
-+#if DEBUG_MSG > 1
- debug_msg(npe, "Sending a message took %i cycles\n", cycles);
-+#endif
- return 0;
- }
-
-@@ -484,7 +486,9 @@
- return -ETIMEDOUT;
- }
-
-+#if DEBUG_MSG > 1
- debug_msg(npe, "Receiving a message took %i cycles\n", cycles);
-+#endif
- return 0;
- }
-
---- a/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
-+++ b/arch/arm/mach-ixp4xx/ixp4xx_qmgr.c
-@@ -184,6 +184,8 @@
- case 3: mask[0] = 0xFF; break;
- }
-
-+ mask[1] = mask[2] = mask[3] = 0;
-+
- while (addr--)
- shift_mask(mask);
-
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-@@ -592,6 +592,8 @@
- npe_reset(npe);
- #endif
-
-+ print_npe(KERN_INFO, npe, "firmware's license can be found in /usr/share/doc/LICENSE.IPL\n");
-+
- print_npe(KERN_INFO, npe, "firmware functionality 0x%X, "
- "revision 0x%X:%X\n", (image->id >> 16) & 0xFF,
- (image->id >> 8) & 0xFF, image->id & 0xFF);
+++ /dev/null
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -165,14 +165,15 @@
- struct net_device *netdev;
- struct napi_struct napi;
- struct net_device_stats stat;
-- struct mii_if_info mii;
-+ struct mii_if_info mii[IXP4XX_ETH_PHY_MAX_ADDR];
- struct delayed_work mdio_thread;
- struct eth_plat_info *plat;
- buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
- struct desc *desc_tab; /* coherent */
- u32 desc_tab_phys;
- int id; /* logical port ID */
-- u16 mii_bmcr;
-+ u16 mii_bmcr[IXP4XX_ETH_PHY_MAX_ADDR];
-+ int phy_count;
- };
-
- /* NPE message structure */
-@@ -316,12 +317,13 @@
- spin_unlock_irqrestore(&mdio_lock, flags);
- }
-
--static void phy_reset(struct net_device *dev, int phy_id)
-+static void phy_reset(struct net_device *dev, int idx)
- {
- struct port *port = netdev_priv(dev);
-+ int phy_id = port->mii[idx].phy_id;
- int cycles = 0;
-
-- mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr | BMCR_RESET);
-+ mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_RESET);
-
- while (cycles < MAX_MII_RESET_RETRIES) {
- if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) {
-@@ -335,12 +337,12 @@
- cycles++;
- }
-
-- printk(KERN_ERR "%s: MII reset failed\n", dev->name);
-+ printk(KERN_ERR "%s: MII reset failed on PHY%2d\n", dev->name, phy_id);
- }
-
--static void eth_set_duplex(struct port *port)
-+static void eth_set_duplex(struct port *port, int full_duplex)
- {
-- if (port->mii.full_duplex)
-+ if (full_duplex)
- __raw_writel(DEFAULT_TX_CNTRL0 & ~TX_CNTRL0_HALFDUPLEX,
- &port->regs->tx_control[0]);
- else
-@@ -348,7 +350,7 @@
- &port->regs->tx_control[0]);
- }
-
--
-+#if 0
- static void phy_check_media(struct port *port, int init)
- {
- if (mii_check_media(&port->mii, 1, init))
-@@ -367,7 +369,63 @@
- }
- }
- }
-+#else
-+static void phy_update_link(struct net_device *dev, int link)
-+{
-+ int prev_link = netif_carrier_ok(dev);
-+
-+ if (!prev_link && link) {
-+ printk(KERN_INFO "%s: link up\n", dev->name);
-+ netif_carrier_on(dev);
-+ } else if (prev_link && !link) {
-+ printk(KERN_INFO "%s: link down\n", dev->name);
-+ netif_carrier_off(dev);
-+ }
-+}
-+
-+static void phy_check_media(struct port *port, int init)
-+{
-+ struct net_device *dev = port->netdev;
-+
-+ if (port->phy_count == 1) {
-+ struct mii_if_info *mii = &port->mii[0];
-+
-+ if (mii_check_media(mii, 1, init))
-+ eth_set_duplex(port, mii->full_duplex);
-+
-+ if (mii->force_media) /* mii_check_media() doesn't work */
-+ phy_update_link(dev, mii_link_ok(mii));
-+ } else {
-+ int cur_link = 0;
-+ int i;
-+
-+ if (init)
-+ eth_set_duplex(port, 1);
-+
-+ for (i = 0; i < port->phy_count; i++)
-+ cur_link |= mii_link_ok(&port->mii[i]);
-+
-+ phy_update_link(dev, cur_link);
-+ }
-+}
-+#endif
-+
-+static void phy_power_down(struct net_device *dev, int idx)
-+{
-+ struct port *port = netdev_priv(dev);
-+ int phy_id = port->mii[idx].phy_id;
-+
-+ port->mii_bmcr[idx] = mdio_read(dev, phy_id, MII_BMCR) &
-+ ~(BMCR_RESET | BMCR_PDOWN);
-+ mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_PDOWN);
-+}
-+
-+static void phy_power_up(struct net_device *dev, int idx)
-+{
-+ struct port *port = netdev_priv(dev);
-
-+ mdio_write(dev, port->mii[idx].phy_id, MII_BMCR, port->mii_bmcr[idx]);
-+}
-
- static void mdio_thread(struct work_struct *work)
- {
-@@ -792,9 +850,12 @@
-
- if (!netif_running(dev))
- return -EINVAL;
-- err = generic_mii_ioctl(&port->mii, if_mii(req), cmd, &duplex_chg);
-+ if (port->phy_count != 1)
-+ return -EOPNOTSUPP;
-+
-+ err = generic_mii_ioctl(&port->mii[0], if_mii(req), cmd, &duplex_chg);
- if (duplex_chg)
-- eth_set_duplex(port);
-+ eth_set_duplex(port, port->mii[0].full_duplex);
- return err;
- }
-
-@@ -947,7 +1008,8 @@
- }
- }
-
-- mdio_write(dev, port->plat->phy, MII_BMCR, port->mii_bmcr);
-+ for (i = 0; i < port->phy_count; i++)
-+ phy_power_up(dev, i);
-
- memset(&msg, 0, sizeof(msg));
- msg.cmd = NPE_VLAN_SETRXQOSENTRY;
-@@ -1107,10 +1169,8 @@
- printk(KERN_CRIT "%s: unable to disable loopback\n",
- dev->name);
-
-- port->mii_bmcr = mdio_read(dev, port->plat->phy, MII_BMCR) &
-- ~(BMCR_RESET | BMCR_PDOWN); /* may have been altered */
-- mdio_write(dev, port->plat->phy, MII_BMCR,
-- port->mii_bmcr | BMCR_PDOWN);
-+ for (i = 0; i < port->phy_count; i++)
-+ phy_power_down(dev, i);
-
- if (!ports_open)
- qmgr_disable_irq(TXDONE_QUEUE);
-@@ -1120,6 +1180,42 @@
- return 0;
- }
-
-+static void eth_add_phy(struct net_device *dev, int phy_id)
-+{
-+ struct port *port = netdev_priv(dev);
-+ int i;
-+
-+ i = port->phy_count++;
-+
-+ port->mii[i].dev = dev;
-+ port->mii[i].mdio_read = mdio_read;
-+ port->mii[i].mdio_write = mdio_write;
-+ port->mii[i].phy_id = phy_id;
-+ port->mii[i].phy_id_mask = 0x1F;
-+ port->mii[i].reg_num_mask = 0x1F;
-+
-+ printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, phy_id,
-+ npe_name(port->npe));
-+
-+ phy_reset(dev, i);
-+ phy_power_down(dev, i);
-+}
-+
-+static void eth_init_mii(struct net_device *dev)
-+{
-+ struct port *port = netdev_priv(dev);
-+
-+ if (port->plat->phy < IXP4XX_ETH_PHY_MAX_ADDR) {
-+ eth_add_phy(dev, port->plat->phy);
-+ } else {
-+ int i;
-+ for (i = 0; i < IXP4XX_ETH_PHY_MAX_ADDR; i++)
-+ if (port->plat->phy_mask & (1U << i))
-+ eth_add_phy(dev, i);
-+ }
-+
-+}
-+
- static int __devinit eth_init_one(struct platform_device *pdev)
- {
- struct port *port;
-@@ -1192,20 +1288,7 @@
- __raw_writel(DEFAULT_CORE_CNTRL, &port->regs->core_control);
- udelay(50);
-
-- port->mii.dev = dev;
-- port->mii.mdio_read = mdio_read;
-- port->mii.mdio_write = mdio_write;
-- port->mii.phy_id = plat->phy;
-- port->mii.phy_id_mask = 0x1F;
-- port->mii.reg_num_mask = 0x1F;
--
-- printk(KERN_INFO "%s: MII PHY %i on %s\n", dev->name, plat->phy,
-- npe_name(port->npe));
--
-- phy_reset(dev, plat->phy);
-- port->mii_bmcr = mdio_read(dev, plat->phy, MII_BMCR) &
-- ~(BMCR_RESET | BMCR_PDOWN);
-- mdio_write(dev, plat->phy, MII_BMCR, port->mii_bmcr | BMCR_PDOWN);
-+ eth_init_mii(dev);
-
- INIT_DELAYED_WORK(&port->mdio_thread, mdio_thread);
- return 0;
---- a/include/asm-arm/arch-ixp4xx/platform.h
-+++ b/include/asm-arm/arch-ixp4xx/platform.h
-@@ -95,12 +95,15 @@
- #define IXP4XX_ETH_NPEB 0x10
- #define IXP4XX_ETH_NPEC 0x20
-
-+#define IXP4XX_ETH_PHY_MAX_ADDR 32
-+
- /* Information about built-in Ethernet MAC interfaces */
- struct eth_plat_info {
- u8 phy; /* MII PHY ID, 0 - 31 */
- u8 rxq; /* configurable, currently 0 - 31 only */
- u8 txreadyq;
- u8 hwaddr[6];
-+ u32 phy_mask;
- };
-
- /* Information about built-in HSS (synchronous serial) interfaces */
+++ /dev/null
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -322,8 +322,12 @@
- struct port *port = netdev_priv(dev);
- int phy_id = port->mii[idx].phy_id;
- int cycles = 0;
-+ u16 bmcr;
-
-- mdio_write(dev, phy_id, MII_BMCR, port->mii_bmcr[idx] | BMCR_RESET);
-+ /* reset the PHY */
-+ bmcr = mdio_read(dev, phy_id, MII_BMCR);
-+ bmcr |= BMCR_ANENABLE;
-+ mdio_write(dev, phy_id, MII_BMCR, bmcr | BMCR_RESET);
-
- while (cycles < MAX_MII_RESET_RETRIES) {
- if (!(mdio_read(dev, phy_id, MII_BMCR) & BMCR_RESET)) {
-@@ -331,13 +335,23 @@
- printk(KERN_DEBUG "%s: phy_reset() took %i cycles\n",
- dev->name, cycles);
- #endif
-- return;
-+ break;
- }
- udelay(1);
- cycles++;
- }
-
-- printk(KERN_ERR "%s: MII reset failed on PHY%2d\n", dev->name, phy_id);
-+ if (cycles == MAX_MII_RESET_RETRIES) {
-+ printk(KERN_ERR "%s: MII reset failed on PHY%2d\n", dev->name,
-+ phy_id);
-+ return;
-+ }
-+
-+ /* restart auto negotiation */
-+ bmcr = mdio_read(dev, phy_id, MII_BMCR);
-+ bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
-+ mdio_write(dev, phy_id, MII_BMCR, bmcr);
-+
- }
-
- static void eth_set_duplex(struct port *port, int full_duplex)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-+++ b/arch/arm/mach-ixp4xx/ixp4xx_npe.c
-@@ -575,8 +575,8 @@
- for (i = 0; i < image->size; i++)
- image->data[i] = swab32(image->data[i]);
-
-- if (!cpu_is_ixp46x() && ((image->id >> 28) & 0xF /* device ID */)) {
-- print_npe(KERN_INFO, npe, "IXP46x firmware ignored on "
-+ if (cpu_is_ixp42x() && ((image->id >> 28) & 0xF /* device ID */)) {
-+ print_npe(KERN_INFO, npe, "IXP46x/IXP43x firmware ignored on "
- "IXP42x\n");
- goto err;
- }
-@@ -598,7 +598,7 @@
- "revision 0x%X:%X\n", (image->id >> 16) & 0xFF,
- (image->id >> 8) & 0xFF, image->id & 0xFF);
-
-- if (!cpu_is_ixp46x()) {
-+ if (cpu_is_ixp42x()) {
- if (!npe->id)
- instr_size = NPE_A_42X_INSTR_SIZE;
- else
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -32,6 +32,7 @@
- #include <linux/kernel.h>
- #include <linux/mii.h>
- #include <linux/platform_device.h>
-+#include <asm/arch/cpu.h>
- #include <asm/arch/npe.h>
- #include <asm/arch/qmgr.h>
-
-@@ -1338,12 +1339,16 @@
-
- static int __init eth_init_module(void)
- {
-- if (!(ixp4xx_read_feature_bits() & IXP4XX_FEATURE_NPEB_ETH0))
-- return -ENOSYS;
-
-- /* All MII PHY accesses use NPE-B Ethernet registers */
- spin_lock_init(&mdio_lock);
-- mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
-+ if (!cpu_is_ixp43x())
-+ /* All MII PHY accesses use NPE-B Ethernet registers */
-+ mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthB_BASE_VIRT;
-+
-+ else
-+ /* IXP43x lacks NPE-B and uses NPE-C for MII PHY access */
-+ mdio_regs = (struct eth_regs __iomem *)IXP4XX_EthC_BASE_VIRT;
-+
- __raw_writel(DEFAULT_CORE_CNTRL, &mdio_regs->core_control);
-
- return platform_driver_register(&drv);
---- a/include/asm-arm/arch-ixp4xx/cpu.h
-+++ b/include/asm-arm/arch-ixp4xx/cpu.h
-@@ -34,6 +34,8 @@
- val &= ~IXP4XX_FEATURE_RESERVED;
- if (!cpu_is_ixp46x())
- val &= ~IXP4XX_FEATURE_IXP46X_ONLY;
-+ if (cpu_is_ixp42x())
-+ val &= ~IXP4XX_FEATURE_IXP43X_46X;
-
- return val;
- }
---- a/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
-+++ b/include/asm-arm/arch-ixp4xx/ixp4xx-regs.h
-@@ -628,11 +628,12 @@
- #define IXP4XX_FEATURE_XSCALE_MAX_FREQ (3 << 22)
- #define IXP4XX_FEATURE_RESERVED (0xFF << 24)
-
--#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_ECC_TIMESYNC | \
-+#define IXP4XX_FEATURE_IXP43X_46X (IXP4XX_FEATURE_ECC_TIMESYNC | \
- IXP4XX_FEATURE_USB_HOST | \
- IXP4XX_FEATURE_NPEA_ETH | \
-- IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \
-- IXP4XX_FEATURE_RSA | \
- IXP4XX_FEATURE_XSCALE_MAX_FREQ)
-
-+#define IXP4XX_FEATURE_IXP46X_ONLY (IXP4XX_FEATURE_NPEB_ETH_1_TO_3 | \
-+ IXP4XX_FEATURE_RSA)
-+
- #endif
+++ /dev/null
---- a/drivers/net/wan/Kconfig
-+++ b/drivers/net/wan/Kconfig
-@@ -338,6 +338,15 @@
-
- Say Y if your card supports this feature.
-
-+config IXP4XX_HSS
-+ tristate "IXP4xx HSS (synchronous serial port) support"
-+ depends on HDLC && ARM && ARCH_IXP4XX
-+ select IXP4XX_NPE
-+ select IXP4XX_QMGR
-+ help
-+ Say Y here if you want to use built-in HSS ports
-+ on IXP4xx processor.
-+
- config DLCI
- tristate "Frame Relay DLCI support"
- ---help---
---- a/drivers/net/wan/Makefile
-+++ b/drivers/net/wan/Makefile
-@@ -42,6 +42,7 @@
- obj-$(CONFIG_WANXL) += wanxl.o
- obj-$(CONFIG_PCI200SYN) += pci200syn.o
- obj-$(CONFIG_PC300TOO) += pc300too.o
-+obj-$(CONFIG_IXP4XX_HSS) += ixp4xx_hss.o
-
- clean-files := wanxlfw.inc
- $(obj)/wanxl.o: $(obj)/wanxlfw.inc
---- /dev/null
-+++ b/drivers/net/wan/ixp4xx_hss.c
-@@ -0,0 +1,2886 @@
-+/*
-+ * Intel IXP4xx HSS (synchronous serial port) driver for Linux
-+ *
-+ * Copyright (C) 2007 Krzysztof Halasa <khc@pm.waw.pl>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of version 2 of the GNU General Public License
-+ * as published by the Free Software Foundation.
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/cdev.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/dmapool.h>
-+#include <linux/fs.h>
-+#include <linux/io.h>
-+#include <linux/kernel.h>
-+#include <linux/hdlc.h>
-+#include <linux/platform_device.h>
-+#include <linux/poll.h>
-+#include <asm/arch/npe.h>
-+#include <asm/arch/qmgr.h>
-+
-+#define DEBUG_QUEUES 0
-+#define DEBUG_DESC 0
-+#define DEBUG_RX 0
-+#define DEBUG_TX 0
-+#define DEBUG_PKT_BYTES 0
-+#define DEBUG_CLOSE 0
-+#define DEBUG_FRAMER 0
-+
-+#define DRV_NAME "ixp4xx_hss"
-+
-+#define PKT_EXTRA_FLAGS 0 /* orig 1 */
-+#define TX_FRAME_SYNC_OFFSET 0 /* channelized */
-+#define PKT_NUM_PIPES 1 /* 1, 2 or 4 */
-+#define PKT_PIPE_FIFO_SIZEW 4 /* total 4 dwords per HSS */
-+
-+#define RX_DESCS 16 /* also length of all RX queues */
-+#define TX_DESCS 16 /* also length of all TX queues */
-+
-+#define POOL_ALLOC_SIZE (sizeof(struct desc) * (RX_DESCS + TX_DESCS))
-+#define RX_SIZE (HDLC_MAX_MRU + 4) /* NPE needs more space */
-+#define MAX_CLOSE_WAIT 1000 /* microseconds */
-+#define HSS_COUNT 2
-+#define MIN_FRAME_SIZE 16 /* bits */
-+#define MAX_FRAME_SIZE 257 /* 256 bits + framing bit */
-+#define MAX_CHANNELS (MAX_FRAME_SIZE / 8)
-+#define MAX_CHAN_DEVICES 32
-+#define CHANNEL_HDLC 0xFE
-+#define CHANNEL_UNUSED 0xFF
-+
-+#define NAPI_WEIGHT 16
-+#define CHAN_RX_TRIGGER 16 /* 8 RX frames = 1 ms @ E1 */
-+#define CHAN_RX_FRAMES 64
-+#define MAX_CHAN_RX_BAD_SYNC (CHAN_RX_TRIGGER / 2 /* pairs */ - 3)
-+#define CHAN_TX_LIST_FRAMES 16 /* bytes/channel per list, 16 - 48 */
-+#define CHAN_TX_LISTS 8
-+#define CHAN_TX_FRAMES (CHAN_TX_LIST_FRAMES * CHAN_TX_LISTS)
-+#define CHAN_QUEUE_LEN 16 /* minimum possible */
-+
-+
-+/* Queue IDs */
-+#define HSS0_CHL_RXTRIG_QUEUE 12 /* orig size = 32 dwords */
-+#define HSS0_PKT_RX_QUEUE 13 /* orig size = 32 dwords */
-+#define HSS0_PKT_TX0_QUEUE 14 /* orig size = 16 dwords */
-+#define HSS0_PKT_TX1_QUEUE 15
-+#define HSS0_PKT_TX2_QUEUE 16
-+#define HSS0_PKT_TX3_QUEUE 17
-+#define HSS0_PKT_RXFREE0_QUEUE 18 /* orig size = 16 dwords */
-+#define HSS0_PKT_RXFREE1_QUEUE 19
-+#define HSS0_PKT_RXFREE2_QUEUE 20
-+#define HSS0_PKT_RXFREE3_QUEUE 21
-+#define HSS0_PKT_TXDONE_QUEUE 22 /* orig size = 64 dwords */
-+
-+#define HSS1_CHL_RXTRIG_QUEUE 10
-+#define HSS1_PKT_RX_QUEUE 0
-+#define HSS1_PKT_TX0_QUEUE 5
-+#define HSS1_PKT_TX1_QUEUE 6
-+#define HSS1_PKT_TX2_QUEUE 7
-+#define HSS1_PKT_TX3_QUEUE 8
-+#define HSS1_PKT_RXFREE0_QUEUE 1
-+#define HSS1_PKT_RXFREE1_QUEUE 2
-+#define HSS1_PKT_RXFREE2_QUEUE 3
-+#define HSS1_PKT_RXFREE3_QUEUE 4
-+#define HSS1_PKT_TXDONE_QUEUE 9
-+
-+#define NPE_PKT_MODE_HDLC 0
-+#define NPE_PKT_MODE_RAW 1
-+#define NPE_PKT_MODE_56KMODE 2
-+#define NPE_PKT_MODE_56KENDIAN_MSB 4
-+
-+/* PKT_PIPE_HDLC_CFG_WRITE flags */
-+#define PKT_HDLC_IDLE_ONES 0x1 /* default = flags */
-+#define PKT_HDLC_CRC_32 0x2 /* default = CRC-16 */
-+#define PKT_HDLC_MSB_ENDIAN 0x4 /* default = LE */
-+
-+
-+/* hss_config, PCRs */
-+/* Frame sync sampling, default = active low */
-+#define PCR_FRM_SYNC_ACTIVE_HIGH 0x40000000
-+#define PCR_FRM_SYNC_FALLINGEDGE 0x80000000
-+#define PCR_FRM_SYNC_RISINGEDGE 0xC0000000
-+
-+/* Frame sync pin: input (default) or output generated off a given clk edge */
-+#define PCR_FRM_SYNC_OUTPUT_FALLING 0x20000000
-+#define PCR_FRM_SYNC_OUTPUT_RISING 0x30000000
-+
-+/* Frame and data clock sampling on edge, default = falling */
-+#define PCR_FCLK_EDGE_RISING 0x08000000
-+#define PCR_DCLK_EDGE_RISING 0x04000000
-+
-+/* Clock direction, default = input */
-+#define PCR_SYNC_CLK_DIR_OUTPUT 0x02000000
-+
-+/* Generate/Receive frame pulses, default = enabled */
-+#define PCR_FRM_PULSE_DISABLED 0x01000000
-+
-+ /* Data rate is full (default) or half the configured clk speed */
-+#define PCR_HALF_CLK_RATE 0x00200000
-+
-+/* Invert data between NPE and HSS FIFOs? (default = no) */
-+#define PCR_DATA_POLARITY_INVERT 0x00100000
-+
-+/* TX/RX endianness, default = LSB */
-+#define PCR_MSB_ENDIAN 0x00080000
-+
-+/* Normal (default) / open drain mode (TX only) */
-+#define PCR_TX_PINS_OPEN_DRAIN 0x00040000
-+
-+/* No framing bit transmitted and expected on RX? (default = framing bit) */
-+#define PCR_SOF_NO_FBIT 0x00020000
-+
-+/* Drive data pins? */
-+#define PCR_TX_DATA_ENABLE 0x00010000
-+
-+/* Voice 56k type: drive the data pins low (default), high, high Z */
-+#define PCR_TX_V56K_HIGH 0x00002000
-+#define PCR_TX_V56K_HIGH_IMP 0x00004000
-+
-+/* Unassigned type: drive the data pins low (default), high, high Z */
-+#define PCR_TX_UNASS_HIGH 0x00000800
-+#define PCR_TX_UNASS_HIGH_IMP 0x00001000
-+
-+/* T1 @ 1.544MHz only: Fbit dictated in FIFO (default) or high Z */
-+#define PCR_TX_FB_HIGH_IMP 0x00000400
-+
-+/* 56k data endiannes - which bit unused: high (default) or low */
-+#define PCR_TX_56KE_BIT_0_UNUSED 0x00000200
-+
-+/* 56k data transmission type: 32/8 bit data (default) or 56K data */
-+#define PCR_TX_56KS_56K_DATA 0x00000100
-+
-+/* hss_config, cCR */
-+/* Number of packetized clients, default = 1 */
-+#define CCR_NPE_HFIFO_2_HDLC 0x04000000
-+#define CCR_NPE_HFIFO_3_OR_4HDLC 0x08000000
-+
-+/* default = no loopback */
-+#define CCR_LOOPBACK 0x02000000
-+
-+/* HSS number, default = 0 (first) */
-+#define CCR_SECOND_HSS 0x01000000
-+
-+
-+/* hss_config, clkCR: main:10, num:10, denom:12 */
-+#define CLK42X_SPEED_EXP ((0x3FF << 22) | ( 2 << 12) | 15) /*65 KHz*/
-+
-+#define CLK42X_SPEED_512KHZ (( 130 << 22) | ( 2 << 12) | 15)
-+#define CLK42X_SPEED_1536KHZ (( 43 << 22) | ( 18 << 12) | 47)
-+#define CLK42X_SPEED_1544KHZ (( 43 << 22) | ( 33 << 12) | 192)
-+#define CLK42X_SPEED_2048KHZ (( 32 << 22) | ( 34 << 12) | 63)
-+#define CLK42X_SPEED_4096KHZ (( 16 << 22) | ( 34 << 12) | 127)
-+#define CLK42X_SPEED_8192KHZ (( 8 << 22) | ( 34 << 12) | 255)
-+
-+#define CLK46X_SPEED_512KHZ (( 130 << 22) | ( 24 << 12) | 127)
-+#define CLK46X_SPEED_1536KHZ (( 43 << 22) | (152 << 12) | 383)
-+#define CLK46X_SPEED_1544KHZ (( 43 << 22) | ( 66 << 12) | 385)
-+#define CLK46X_SPEED_2048KHZ (( 32 << 22) | (280 << 12) | 511)
-+#define CLK46X_SPEED_4096KHZ (( 16 << 22) | (280 << 12) | 1023)
-+#define CLK46X_SPEED_8192KHZ (( 8 << 22) | (280 << 12) | 2047)
-+
-+
-+/* hss_config, LUT entries */
-+#define TDMMAP_UNASSIGNED 0
-+#define TDMMAP_HDLC 1 /* HDLC - packetized */
-+#define TDMMAP_VOICE56K 2 /* Voice56K - 7-bit channelized */
-+#define TDMMAP_VOICE64K 3 /* Voice64K - 8-bit channelized */
-+
-+/* offsets into HSS config */
-+#define HSS_CONFIG_TX_PCR 0x00 /* port configuration registers */
-+#define HSS_CONFIG_RX_PCR 0x04
-+#define HSS_CONFIG_CORE_CR 0x08 /* loopback control, HSS# */
-+#define HSS_CONFIG_CLOCK_CR 0x0C /* clock generator control */
-+#define HSS_CONFIG_TX_FCR 0x10 /* frame configuration registers */
-+#define HSS_CONFIG_RX_FCR 0x14
-+#define HSS_CONFIG_TX_LUT 0x18 /* channel look-up tables */
-+#define HSS_CONFIG_RX_LUT 0x38
-+
-+
-+/* NPE command codes */
-+/* writes the ConfigWord value to the location specified by offset */
-+#define PORT_CONFIG_WRITE 0x40
-+
-+/* triggers the NPE to load the contents of the configuration table */
-+#define PORT_CONFIG_LOAD 0x41
-+
-+/* triggers the NPE to return an HssErrorReadResponse message */
-+#define PORT_ERROR_READ 0x42
-+
-+/* reset NPE internal status and enable the HssChannelized operation */
-+#define CHAN_FLOW_ENABLE 0x43
-+#define CHAN_FLOW_DISABLE 0x44
-+#define CHAN_IDLE_PATTERN_WRITE 0x45
-+#define CHAN_NUM_CHANS_WRITE 0x46
-+#define CHAN_RX_BUF_ADDR_WRITE 0x47
-+#define CHAN_RX_BUF_CFG_WRITE 0x48
-+#define CHAN_TX_BLK_CFG_WRITE 0x49
-+#define CHAN_TX_BUF_ADDR_WRITE 0x4A
-+#define CHAN_TX_BUF_SIZE_WRITE 0x4B
-+#define CHAN_TSLOTSWITCH_ENABLE 0x4C
-+#define CHAN_TSLOTSWITCH_DISABLE 0x4D
-+
-+/* downloads the gainWord value for a timeslot switching channel associated
-+ with bypassNum */
-+#define CHAN_TSLOTSWITCH_GCT_DOWNLOAD 0x4E
-+
-+/* triggers the NPE to reset internal status and enable the HssPacketized
-+ operation for the flow specified by pPipe */
-+#define PKT_PIPE_FLOW_ENABLE 0x50
-+#define PKT_PIPE_FLOW_DISABLE 0x51
-+#define PKT_NUM_PIPES_WRITE 0x52
-+#define PKT_PIPE_FIFO_SIZEW_WRITE 0x53
-+#define PKT_PIPE_HDLC_CFG_WRITE 0x54
-+#define PKT_PIPE_IDLE_PATTERN_WRITE 0x55
-+#define PKT_PIPE_RX_SIZE_WRITE 0x56
-+#define PKT_PIPE_MODE_WRITE 0x57
-+
-+/* HDLC packet status values - desc->status */
-+#define ERR_SHUTDOWN 1 /* stop or shutdown occurrance */
-+#define ERR_HDLC_ALIGN 2 /* HDLC alignment error */
-+#define ERR_HDLC_FCS 3 /* HDLC Frame Check Sum error */
-+#define ERR_RXFREE_Q_EMPTY 4 /* RX-free queue became empty while receiving
-+ this packet (if buf_len < pkt_len) */
-+#define ERR_HDLC_TOO_LONG 5 /* HDLC frame size too long */
-+#define ERR_HDLC_ABORT 6 /* abort sequence received */
-+#define ERR_DISCONNECTING 7 /* disconnect is in progress */
-+
-+
-+enum mode {MODE_HDLC = 0, MODE_RAW, MODE_G704};
-+enum error_bit {TX_ERROR_BIT = 0, RX_ERROR_BIT = 1};
-+enum alignment { NOT_ALIGNED = 0, EVEN_FIRST, ODD_FIRST };
-+
-+#ifdef __ARMEB__
-+typedef struct sk_buff buffer_t;
-+#define free_buffer dev_kfree_skb
-+#define free_buffer_irq dev_kfree_skb_irq
-+#else
-+typedef void buffer_t;
-+#define free_buffer kfree
-+#define free_buffer_irq kfree
-+#endif
-+
-+struct chan_device {
-+ struct cdev cdev;
-+ struct device *dev;
-+ struct port *port;
-+ unsigned int open_count, excl_open;
-+ unsigned int tx_first, tx_count, rx_first, rx_count; /* bytes */
-+ unsigned long errors_bitmap;
-+ u8 id, chan_count;
-+ u8 log_channels[MAX_CHANNELS];
-+};
-+
-+struct port {
-+ struct device *dev;
-+ struct npe *npe;
-+ struct net_device *netdev;
-+ struct napi_struct napi;
-+ struct hss_plat_info *plat;
-+ buffer_t *rx_buff_tab[RX_DESCS], *tx_buff_tab[TX_DESCS];
-+ struct desc *desc_tab; /* coherent */
-+ u32 desc_tab_phys;
-+ unsigned int id;
-+ atomic_t chan_tx_irq_number, chan_rx_irq_number;
-+ wait_queue_head_t chan_tx_waitq, chan_rx_waitq;
-+ u8 hdlc_cfg;
-+
-+ /* the following fields must be protected by npe_lock */
-+ enum mode mode;
-+ unsigned int clock_type, clock_rate, loopback;
-+ unsigned int frame_size, frame_sync_offset;
-+
-+ struct chan_device *chan_devices[MAX_CHAN_DEVICES];
-+ u8 *chan_buf;
-+ u32 chan_tx_buf_phys, chan_rx_buf_phys;
-+ unsigned int chan_open_count, hdlc_open;
-+ unsigned int chan_started, initialized, just_set_offset;
-+ enum alignment aligned, carrier;
-+ unsigned int chan_last_rx, chan_last_tx;
-+ /* assigned channels, may be invalid with given frame length or mode */
-+ u8 channels[MAX_CHANNELS];
-+ int msg_count;
-+};
-+
-+/* NPE message structure */
-+struct msg {
-+#ifdef __ARMEB__
-+ u8 cmd, unused, hss_port, index;
-+ union {
-+ struct { u8 data8a, data8b, data8c, data8d; };
-+ struct { u16 data16a, data16b; };
-+ struct { u32 data32; };
-+ };
-+#else
-+ u8 index, hss_port, unused, cmd;
-+ union {
-+ struct { u8 data8d, data8c, data8b, data8a; };
-+ struct { u16 data16b, data16a; };
-+ struct { u32 data32; };
-+ };
-+#endif
-+};
-+
-+/* HDLC packet descriptor */
-+struct desc {
-+ u32 next; /* pointer to next buffer, unused */
-+
-+#ifdef __ARMEB__
-+ u16 buf_len; /* buffer length */
-+ u16 pkt_len; /* packet length */
-+ u32 data; /* pointer to data buffer in RAM */
-+ u8 status;
-+ u8 error_count;
-+ u16 __reserved;
-+#else
-+ u16 pkt_len; /* packet length */
-+ u16 buf_len; /* buffer length */
-+ u32 data; /* pointer to data buffer in RAM */
-+ u16 __reserved;
-+ u8 error_count;
-+ u8 status;
-+#endif
-+ u32 __reserved1[4];
-+};
-+
-+
-+#define rx_desc_phys(port, n) ((port)->desc_tab_phys + \
-+ (n) * sizeof(struct desc))
-+#define rx_desc_ptr(port, n) (&(port)->desc_tab[n])
-+
-+#define tx_desc_phys(port, n) ((port)->desc_tab_phys + \
-+ ((n) + RX_DESCS) * sizeof(struct desc))
-+#define tx_desc_ptr(port, n) (&(port)->desc_tab[(n) + RX_DESCS])
-+
-+#define chan_tx_buf_len(port) (port->frame_size / 8 * CHAN_TX_FRAMES)
-+#define chan_tx_lists_len(port) (port->frame_size / 8 * CHAN_TX_LISTS * \
-+ sizeof(u32))
-+#define chan_rx_buf_len(port) (port->frame_size / 8 * CHAN_RX_FRAMES)
-+
-+#define chan_tx_buf(port) ((port)->chan_buf)
-+#define chan_tx_lists(port) (chan_tx_buf(port) + chan_tx_buf_len(port))
-+#define chan_rx_buf(port) (chan_tx_lists(port) + chan_tx_lists_len(port))
-+
-+#define chan_tx_lists_phys(port) ((port)->chan_tx_buf_phys + \
-+ chan_tx_buf_len(port))
-+
-+static int hss_prepare_chan(struct port *port);
-+void hss_chan_stop(struct port *port);
-+
-+/*****************************************************************************
-+ * global variables
-+ ****************************************************************************/
-+
-+static struct class *hss_class;
-+static int chan_major;
-+static int ports_open;
-+static struct dma_pool *dma_pool;
-+static spinlock_t npe_lock;
-+
-+static const struct {
-+ int tx, txdone, rx, rxfree, chan;
-+}queue_ids[2] = {{HSS0_PKT_TX0_QUEUE, HSS0_PKT_TXDONE_QUEUE, HSS0_PKT_RX_QUEUE,
-+ HSS0_PKT_RXFREE0_QUEUE, HSS0_CHL_RXTRIG_QUEUE},
-+ {HSS1_PKT_TX0_QUEUE, HSS1_PKT_TXDONE_QUEUE, HSS1_PKT_RX_QUEUE,
-+ HSS1_PKT_RXFREE0_QUEUE, HSS1_CHL_RXTRIG_QUEUE},
-+};
-+
-+/*****************************************************************************
-+ * utility functions
-+ ****************************************************************************/
-+
-+static inline struct port* dev_to_port(struct net_device *dev)
-+{
-+ return dev_to_hdlc(dev)->priv;
-+}
-+
-+static inline struct chan_device* inode_to_chan_dev(struct inode *inode)
-+{
-+ return container_of(inode->i_cdev, struct chan_device, cdev);
-+}
-+
-+#ifndef __ARMEB__
-+static inline void memcpy_swab32(u32 *dest, u32 *src, int cnt)
-+{
-+ int i;
-+ for (i = 0; i < cnt; i++)
-+ dest[i] = swab32(src[i]);
-+}
-+#endif
-+
-+static int get_number(const char **buf, size_t *len, unsigned int *ptr,
-+ unsigned int min, unsigned int max)
-+{
-+ char *endp;
-+ unsigned long val = simple_strtoul(*buf, &endp, 10);
-+
-+ if (endp == *buf || endp - *buf > *len || val < min || val > max)
-+ return -EINVAL;
-+ *len -= endp - *buf;
-+ *buf = endp;
-+ *ptr = val;
-+ return 0;
-+}
-+
-+static int parse_channels(const char **buf, size_t *len, u8 *channels)
-+{
-+ unsigned int ch, next = 0;
-+
-+ if (*len && (*buf)[*len - 1] == '\n')
-+ (*len)--;
-+
-+ memset(channels, 0, MAX_CHANNELS);
-+
-+ if (!*len)
-+ return 0;
-+
-+ /* Format: "A,B-C,...", A > B > C */
-+ while (1) {
-+ if (get_number(buf, len, &ch, next, MAX_CHANNELS - 1))
-+ return -EINVAL;
-+ channels[ch] = 1;
-+ next = ch + 1;
-+ if (!*len)
-+ break;
-+ if (**buf == ',') {
-+ (*buf)++;
-+ (*len)--;
-+ continue;
-+ }
-+ if (**buf != '-')
-+ return -EINVAL;
-+ (*buf)++;
-+ (*len)--;
-+ if (get_number(buf, len, &ch, next, MAX_CHANNELS - 1))
-+ return -EINVAL;
-+ while (next <= ch)
-+ channels[next++] = 1;
-+ if (!*len)
-+ break;
-+ if (**buf != ',')
-+ return -EINVAL;
-+ (*buf)++;
-+ (*len)--;
-+ }
-+ return 1;
-+}
-+
-+static size_t print_channels(struct port *port, char *buf, u8 id)
-+{
-+ unsigned int ch, cnt = 0;
-+ size_t len = 0;
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++)
-+ if (port->channels[ch] == id) {
-+ if (cnt == 0) {
-+ sprintf(buf + len, "%s%u", len ? "," : "", ch);
-+ len += strlen(buf + len);
-+ }
-+ cnt++;
-+ } else {
-+ if (cnt > 1) {
-+ sprintf(buf + len, "-%u", ch - 1);
-+ len += strlen(buf + len);
-+ }
-+ cnt = 0;
-+ }
-+ if (cnt > 1) {
-+ sprintf(buf + len, "-%u", ch - 1);
-+ len += strlen(buf + len);
-+ }
-+
-+ buf[len++] = '\n';
-+ return len;
-+}
-+
-+static inline unsigned int sub_offset(unsigned int a, unsigned int b,
-+ unsigned int modulo)
-+{
-+ return (modulo /* make sure the result >= 0 */ + a - b) % modulo;
-+}
-+
-+/*****************************************************************************
-+ * HSS access
-+ ****************************************************************************/
-+
-+static void hss_config_load(struct port *port)
-+{
-+ struct msg msg;
-+
-+ do {
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_CONFIG_LOAD;
-+ msg.hss_port = port->id;
-+ if (npe_send_message(port->npe, &msg, "HSS_LOAD_CONFIG"))
-+ break;
-+ if (npe_recv_message(port->npe, &msg, "HSS_LOAD_CONFIG"))
-+ break;
-+
-+ /* HSS_LOAD_CONFIG for port #1 returns port_id = #4 */
-+ if (msg.cmd != PORT_CONFIG_LOAD || msg.data32)
-+ break;
-+
-+ /* HDLC may stop working without this */
-+ npe_recv_message(port->npe, &msg, "FLUSH_IT");
-+ return;
-+ } while (0);
-+
-+ printk(KERN_CRIT "HSS-%i: unable to reload HSS configuration\n",
-+ port->id);
-+ BUG();
-+}
-+
-+static void hss_config_set_pcr(struct port *port)
-+{
-+ struct msg msg;
-+
-+ do {
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_CONFIG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.index = HSS_CONFIG_TX_PCR;
-+ msg.data32 = PCR_FRM_SYNC_OUTPUT_RISING | PCR_MSB_ENDIAN |
-+ PCR_TX_DATA_ENABLE;
-+ if (port->frame_size % 8 == 0)
-+ msg.data32 |= PCR_SOF_NO_FBIT;
-+ if (port->clock_type == CLOCK_INT)
-+ msg.data32 |= PCR_SYNC_CLK_DIR_OUTPUT;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_TX_PCR"))
-+ break;
-+
-+ msg.index = HSS_CONFIG_RX_PCR;
-+ msg.data32 ^= PCR_TX_DATA_ENABLE | PCR_DCLK_EDGE_RISING;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_RX_PCR"))
-+ break;
-+ return;
-+ } while (0);
-+
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS PCR registers\n", port->id);
-+ BUG();
-+}
-+
-+static void hss_config_set_hdlc_cfg(struct port *port)
-+{
-+ struct msg msg;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PKT_PIPE_HDLC_CFG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data8a = port->hdlc_cfg; /* rx_cfg */
-+ msg.data8b = port->hdlc_cfg | (PKT_EXTRA_FLAGS << 3); /* tx_cfg */
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_HDLC_CFG")) {
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS HDLC"
-+ " configuration\n", port->id);
-+ BUG();
-+ }
-+}
-+
-+static void hss_config_set_core(struct port *port)
-+{
-+ struct msg msg;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_CONFIG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.index = HSS_CONFIG_CORE_CR;
-+ msg.data32 = (port->loopback ? CCR_LOOPBACK : 0) |
-+ (port->id ? CCR_SECOND_HSS : 0);
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_CORE_CR")) {
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS core control"
-+ " register\n", port->id);
-+ BUG();
-+ }
-+}
-+
-+static void hss_config_set_line(struct port *port)
-+{
-+ struct msg msg;
-+
-+ hss_config_set_pcr(port);
-+ hss_config_set_core(port);
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_CONFIG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.index = HSS_CONFIG_CLOCK_CR;
-+ msg.data32 = CLK42X_SPEED_2048KHZ /* FIXME */;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_CLOCK_CR")) {
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS clock control"
-+ " register\n", port->id);
-+ BUG();
-+ }
-+}
-+
-+static void hss_config_set_rx_frame(struct port *port)
-+{
-+ struct msg msg;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_CONFIG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.index = HSS_CONFIG_RX_FCR;
-+ msg.data16a = port->frame_sync_offset;
-+ msg.data16b = port->frame_size - 1;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_RX_FCR")) {
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS RX frame size"
-+ " and offset\n", port->id);
-+ BUG();
-+ }
-+}
-+
-+static void hss_config_set_frame(struct port *port)
-+{
-+ struct msg msg;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_CONFIG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.index = HSS_CONFIG_TX_FCR;
-+ msg.data16a = TX_FRAME_SYNC_OFFSET;
-+ msg.data16b = port->frame_size - 1;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_TX_FCR")) {
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS TX frame size"
-+ " and offset\n", port->id);
-+ BUG();
-+ }
-+ hss_config_set_rx_frame(port);
-+}
-+
-+static void hss_config_set_lut(struct port *port)
-+{
-+ struct msg msg;
-+ int chan_count = 0, log_chan = 0, i, ch;
-+ u32 lut[MAX_CHANNELS / 4];
-+
-+ memset(lut, 0, sizeof(lut));
-+ for (i = 0; i < MAX_CHAN_DEVICES; i++)
-+ if (port->chan_devices[i])
-+ port->chan_devices[i]->chan_count = 0;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_CONFIG_WRITE;
-+ msg.hss_port = port->id;
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++) {
-+ struct chan_device *chdev = NULL;
-+ unsigned int entry;
-+
-+ if (port->channels[ch] < MAX_CHAN_DEVICES /* assigned */)
-+ chdev = port->chan_devices[port->channels[ch]];
-+
-+ if (port->mode == MODE_G704 && ch == 0)
-+ entry = TDMMAP_VOICE64K; /* PCM-31 pattern */
-+ else if (port->mode == MODE_HDLC ||
-+ port->channels[ch] == CHANNEL_HDLC)
-+ entry = TDMMAP_HDLC;
-+ else if (chdev && chdev->open_count) {
-+ entry = TDMMAP_VOICE64K;
-+ chdev->log_channels[chdev->chan_count++] = log_chan;
-+ } else
-+ entry = TDMMAP_UNASSIGNED;
-+ if (entry == TDMMAP_VOICE64K) {
-+ chan_count++;
-+ log_chan++;
-+ }
-+
-+ msg.data32 >>= 2;
-+ msg.data32 |= entry << 30;
-+
-+ if (ch % 16 == 15) {
-+ msg.index = HSS_CONFIG_TX_LUT + ((ch / 4) & ~3);
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_TX_LUT"))
-+ break;
-+
-+ msg.index += HSS_CONFIG_RX_LUT - HSS_CONFIG_TX_LUT;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_RX_LUT"))
-+ break;
-+ }
-+ }
-+ if (ch != MAX_CHANNELS) {
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS channel look-up"
-+ " table\n", port->id);
-+ BUG();
-+ }
-+
-+ hss_config_set_frame(port);
-+
-+ if (!chan_count)
-+ return;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_NUM_CHANS_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data8a = chan_count;
-+ if (npe_send_message(port->npe, &msg, "CHAN_NUM_CHANS_WRITE")) {
-+ printk(KERN_CRIT "HSS-%i: unable to set HSS channel count\n",
-+ port->id);
-+ BUG();
-+ }
-+
-+ /* don't leak data */
-+ // FIXME memset(chan_tx_buf(port), 0, CHAN_TX_FRAMES * chan_count);
-+ if (port->mode == MODE_G704) /* G.704 PCM-31 sync pattern */
-+ for (i = 0; i < CHAN_TX_FRAMES; i += 4)
-+ *(u32*)(chan_tx_buf(port) + i) = 0x9BDF9BDF;
-+
-+ for (i = 0; i < CHAN_TX_LISTS; i++) {
-+ u32 phys = port->chan_tx_buf_phys + i * CHAN_TX_LIST_FRAMES;
-+ u32 *list = ((u32 *)chan_tx_lists(port)) + i * chan_count;
-+ for (ch = 0; ch < chan_count; ch++)
-+ list[ch] = phys + ch * CHAN_TX_FRAMES;
-+ }
-+ dma_sync_single(port->dev, port->chan_tx_buf_phys,
-+ chan_tx_buf_len(port) + chan_tx_lists_len(port),
-+ DMA_TO_DEVICE);
-+}
-+
-+static u32 hss_config_get_status(struct port *port)
-+{
-+ struct msg msg;
-+
-+ do {
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PORT_ERROR_READ;
-+ msg.hss_port = port->id;
-+ if (npe_send_message(port->npe, &msg, "PORT_ERROR_READ"))
-+ break;
-+ if (npe_recv_message(port->npe, &msg, "PORT_ERROR_READ"))
-+ break;
-+
-+ return msg.data32;
-+ } while (0);
-+
-+ printk(KERN_CRIT "HSS-%i: unable to read HSS status\n", port->id);
-+ BUG();
-+}
-+
-+static void hss_config_start_chan(struct port *port)
-+{
-+ struct msg msg;
-+
-+ port->chan_last_tx = 0;
-+ port->chan_last_rx = 0;
-+
-+ do {
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_RX_BUF_ADDR_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data32 = port->chan_rx_buf_phys;
-+ if (npe_send_message(port->npe, &msg, "CHAN_RX_BUF_ADDR_WRITE"))
-+ break;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_TX_BUF_ADDR_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data32 = chan_tx_lists_phys(port);
-+ if (npe_send_message(port->npe, &msg, "CHAN_TX_BUF_ADDR_WRITE"))
-+ break;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_FLOW_ENABLE;
-+ msg.hss_port = port->id;
-+ if (npe_send_message(port->npe, &msg, "CHAN_FLOW_ENABLE"))
-+ break;
-+ port->chan_started = 1;
-+ return;
-+ } while (0);
-+
-+ printk(KERN_CRIT "HSS-%i: unable to start channelized flow\n",
-+ port->id);
-+ BUG();
-+}
-+
-+static void hss_config_stop_chan(struct port *port)
-+{
-+ struct msg msg;
-+
-+ if (!port->chan_started)
-+ return;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_FLOW_DISABLE;
-+ msg.hss_port = port->id;
-+ if (npe_send_message(port->npe, &msg, "CHAN_FLOW_DISABLE")) {
-+ printk(KERN_CRIT "HSS-%i: unable to stop channelized flow\n",
-+ port->id);
-+ BUG();
-+ }
-+ hss_config_get_status(port); /* make sure it's halted */
-+}
-+
-+static void hss_config_start_hdlc(struct port *port)
-+{
-+ struct msg msg;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PKT_PIPE_FLOW_ENABLE;
-+ msg.hss_port = port->id;
-+ msg.data32 = 0;
-+ if (npe_send_message(port->npe, &msg, "HSS_ENABLE_PKT_PIPE")) {
-+ printk(KERN_CRIT "HSS-%i: unable to stop packetized flow\n",
-+ port->id);
-+ BUG();
-+ }
-+}
-+
-+static void hss_config_stop_hdlc(struct port *port)
-+{
-+ struct msg msg;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PKT_PIPE_FLOW_DISABLE;
-+ msg.hss_port = port->id;
-+ if (npe_send_message(port->npe, &msg, "HSS_DISABLE_PKT_PIPE")) {
-+ printk(KERN_CRIT "HSS-%i: unable to stop packetized flow\n",
-+ port->id);
-+ BUG();
-+ }
-+ hss_config_get_status(port); /* make sure it's halted */
-+}
-+
-+static int hss_config_load_firmware(struct port *port)
-+{
-+ struct msg msg;
-+
-+ if (port->initialized)
-+ return 0;
-+
-+ if (!npe_running(port->npe)) {
-+ int err;
-+ if ((err = npe_load_firmware(port->npe, npe_name(port->npe),
-+ port->dev)))
-+ return err;
-+ }
-+
-+ do {
-+ /* HSS main configuration */
-+ hss_config_set_line(port);
-+
-+ hss_config_set_frame(port);
-+
-+ /* HDLC mode configuration */
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = PKT_NUM_PIPES_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data8a = PKT_NUM_PIPES;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_PIPES"))
-+ break;
-+
-+ msg.cmd = PKT_PIPE_FIFO_SIZEW_WRITE;
-+ msg.data8a = PKT_PIPE_FIFO_SIZEW;
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_FIFO"))
-+ break;
-+
-+ msg.cmd = PKT_PIPE_MODE_WRITE;
-+ msg.data8a = NPE_PKT_MODE_HDLC;
-+ /* msg.data8b = inv_mask */
-+ /* msg.data8c = or_mask */
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_MODE"))
-+ break;
-+
-+ msg.cmd = PKT_PIPE_RX_SIZE_WRITE;
-+ msg.data16a = HDLC_MAX_MRU; /* including CRC */
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_RX_SIZE"))
-+ break;
-+
-+ msg.cmd = PKT_PIPE_IDLE_PATTERN_WRITE;
-+ msg.data32 = 0x7F7F7F7F; /* ??? FIXME */
-+ if (npe_send_message(port->npe, &msg, "HSS_SET_PKT_IDLE"))
-+ break;
-+
-+ /* Channelized operation settings */
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_TX_BLK_CFG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data8b = (CHAN_TX_LIST_FRAMES & ~7) / 2;
-+ msg.data8a = msg.data8b / 4;
-+ msg.data8d = CHAN_TX_LIST_FRAMES - msg.data8b;
-+ msg.data8c = msg.data8d / 4;
-+ if (npe_send_message(port->npe, &msg, "CHAN_TX_BLK_CFG_WRITE"))
-+ break;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_RX_BUF_CFG_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data8a = CHAN_RX_TRIGGER / 8;
-+ msg.data8b = CHAN_RX_FRAMES;
-+ if (npe_send_message(port->npe, &msg, "CHAN_RX_BUF_CFG_WRITE"))
-+ break;
-+
-+ memset(&msg, 0, sizeof(msg));
-+ msg.cmd = CHAN_TX_BUF_SIZE_WRITE;
-+ msg.hss_port = port->id;
-+ msg.data8a = CHAN_TX_LISTS;
-+ if (npe_send_message(port->npe, &msg, "CHAN_TX_BUF_SIZE_WRITE"))
-+ break;
-+
-+ port->initialized = 1;
-+ return 0;
-+ } while (0);
-+
-+ printk(KERN_CRIT "HSS-%i: unable to start HSS operation\n", port->id);
-+ BUG();
-+}
-+
-+/*****************************************************************************
-+ * packetized (HDLC) operation
-+ ****************************************************************************/
-+
-+static inline void debug_pkt(struct net_device *dev, const char *func,
-+ u8 *data, int len)
-+{
-+#if DEBUG_PKT_BYTES
-+ int i;
-+
-+ printk(KERN_DEBUG "%s: %s(%i) ", dev->name, func, len);
-+ for (i = 0; i < len; i++) {
-+ if (i >= DEBUG_PKT_BYTES)
-+ break;
-+ printk(KERN_DEBUG "%s%02X", !(i % 4) ? " " : "", data[i]);
-+ }
-+ printk(KERN_DEBUG "\n");
-+#endif
-+}
-+
-+
-+static inline void debug_desc(u32 phys, struct desc *desc)
-+{
-+#if DEBUG_DESC
-+ printk(KERN_DEBUG "%X: %X %3X %3X %08X %X %X\n",
-+ phys, desc->next, desc->buf_len, desc->pkt_len,
-+ desc->data, desc->status, desc->error_count);
-+#endif
-+}
-+
-+static inline void debug_queue(unsigned int queue, int is_get, u32 phys)
-+{
-+#if DEBUG_QUEUES
-+ static struct {
-+ int queue;
-+ char *name;
-+ } names[] = {
-+ { HSS0_PKT_TX0_QUEUE, "TX#0 " },
-+ { HSS0_PKT_TXDONE_QUEUE, "TX-done#0 " },
-+ { HSS0_PKT_RX_QUEUE, "RX#0 " },
-+ { HSS0_PKT_RXFREE0_QUEUE, "RX-free#0 " },
-+ { HSS1_PKT_TX0_QUEUE, "TX#1 " },
-+ { HSS1_PKT_TXDONE_QUEUE, "TX-done#1 " },
-+ { HSS1_PKT_RX_QUEUE, "RX#1 " },
-+ { HSS1_PKT_RXFREE0_QUEUE, "RX-free#1 " },
-+ };
-+ int i;
-+
-+ for (i = 0; i < ARRAY_SIZE(names); i++)
-+ if (names[i].queue == queue)
-+ break;
-+
-+ printk(KERN_DEBUG "Queue %i %s%s %X\n", queue,
-+ i < ARRAY_SIZE(names) ? names[i].name : "",
-+ is_get ? "->" : "<-", phys);
-+#endif
-+}
-+
-+static inline u32 queue_get_entry(unsigned int queue)
-+{
-+ u32 phys = qmgr_get_entry(queue);
-+ debug_queue(queue, 1, phys);
-+ return phys;
-+}
-+
-+static inline int queue_get_desc(unsigned int queue, struct port *port,
-+ int is_tx)
-+{
-+ u32 phys, tab_phys, n_desc;
-+ struct desc *tab;
-+
-+ if (!(phys = queue_get_entry(queue)))
-+ return -1;
-+
-+ BUG_ON(phys & 0x1F);
-+ tab_phys = is_tx ? tx_desc_phys(port, 0) : rx_desc_phys(port, 0);
-+ tab = is_tx ? tx_desc_ptr(port, 0) : rx_desc_ptr(port, 0);
-+ n_desc = (phys - tab_phys) / sizeof(struct desc);
-+ BUG_ON(n_desc >= (is_tx ? TX_DESCS : RX_DESCS));
-+ debug_desc(phys, &tab[n_desc]);
-+ BUG_ON(tab[n_desc].next);
-+ return n_desc;
-+}
-+
-+static inline void queue_put_desc(unsigned int queue, u32 phys,
-+ struct desc *desc)
-+{
-+ debug_queue(queue, 0, phys);
-+ debug_desc(phys, desc);
-+ BUG_ON(phys & 0x1F);
-+ qmgr_put_entry(queue, phys);
-+ BUG_ON(qmgr_stat_overflow(queue));
-+}
-+
-+
-+static inline void dma_unmap_tx(struct port *port, struct desc *desc)
-+{
-+#ifdef __ARMEB__
-+ dma_unmap_single(&port->netdev->dev, desc->data,
-+ desc->buf_len, DMA_TO_DEVICE);
-+#else
-+ dma_unmap_single(&port->netdev->dev, desc->data & ~3,
-+ ALIGN((desc->data & 3) + desc->buf_len, 4),
-+ DMA_TO_DEVICE);
-+#endif
-+}
-+
-+
-+static void hss_hdlc_set_carrier(void *pdev, int carrier)
-+{
-+ struct net_device *netdev = pdev;
-+ struct port *port = dev_to_port(netdev);
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ port->carrier = carrier;
-+ if (!port->loopback) {
-+ if (carrier)
-+ netif_carrier_on(netdev);
-+ else
-+ netif_carrier_off(netdev);
-+ }
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+}
-+
-+static void hss_hdlc_rx_irq(void *pdev)
-+{
-+ struct net_device *dev = pdev;
-+ struct port *port = dev_to_port(dev);
-+
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: hss_hdlc_rx_irq\n", dev->name);
-+#endif
-+ qmgr_disable_irq(queue_ids[port->id].rx);
-+ netif_rx_schedule(dev, &port->napi);
-+}
-+
-+static int hss_hdlc_poll(struct napi_struct *napi, int budget)
-+{
-+ struct port *port = container_of(napi, struct port, napi);
-+ struct net_device *dev = port->netdev;
-+ unsigned int rxq = queue_ids[port->id].rx;
-+ unsigned int rxfreeq = queue_ids[port->id].rxfree;
-+ struct net_device_stats *stats = hdlc_stats(dev);
-+ int received = 0;
-+
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: hss_hdlc_poll\n", dev->name);
-+#endif
-+
-+ while (received < budget) {
-+ struct sk_buff *skb;
-+ struct desc *desc;
-+ int n;
-+#ifdef __ARMEB__
-+ struct sk_buff *temp;
-+ u32 phys;
-+#endif
-+
-+ if ((n = queue_get_desc(rxq, port, 0)) < 0) {
-+ received = 0; /* No packet received */
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: hss_hdlc_poll"
-+ " netif_rx_complete\n", dev->name);
-+#endif
-+ netif_rx_complete(dev, napi);
-+ qmgr_enable_irq(rxq);
-+ if (!qmgr_stat_empty(rxq) &&
-+ netif_rx_reschedule(dev, napi)) {
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: hss_hdlc_poll"
-+ " netif_rx_reschedule succeeded\n",
-+ dev->name);
-+#endif
-+ qmgr_disable_irq(rxq);
-+ continue;
-+ }
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "%s: hss_hdlc_poll all done\n",
-+ dev->name);
-+#endif
-+ return 0; /* all work done */
-+ }
-+
-+ desc = rx_desc_ptr(port, n);
-+#if 0 /* FIXME - error_count counts modulo 256, perhaps we should use it */
-+ if (desc->error_count)
-+ printk(KERN_DEBUG "%s: hss_hdlc_poll status 0x%02X"
-+ " errors %u\n", dev->name, desc->status,
-+ desc->error_count);
-+#endif
-+ skb = NULL;
-+ switch (desc->status) {
-+ case 0:
-+#ifdef __ARMEB__
-+ if ((skb = netdev_alloc_skb(dev, RX_SIZE)) != NULL) {
-+ phys = dma_map_single(&dev->dev, skb->data,
-+ RX_SIZE,
-+ DMA_FROM_DEVICE);
-+ if (dma_mapping_error(phys)) {
-+ dev_kfree_skb(skb);
-+ skb = NULL;
-+ }
-+ }
-+#else
-+ skb = netdev_alloc_skb(dev, desc->pkt_len);
-+#endif
-+ if (!skb)
-+ stats->rx_dropped++;
-+ break;
-+ case ERR_HDLC_ALIGN:
-+ case ERR_HDLC_ABORT:
-+ stats->rx_frame_errors++;
-+ stats->rx_errors++;
-+ break;
-+ case ERR_HDLC_FCS:
-+ stats->rx_crc_errors++;
-+ stats->rx_errors++;
-+ break;
-+ case ERR_HDLC_TOO_LONG:
-+ stats->rx_length_errors++;
-+ stats->rx_errors++;
-+ break;
-+ default: /* FIXME - remove printk */
-+ printk(KERN_ERR "%s: hss_hdlc_poll: status 0x%02X"
-+ " errors %u\n", dev->name, desc->status,
-+ desc->error_count);
-+ stats->rx_errors++;
-+ }
-+
-+ if (!skb) {
-+ /* put the desc back on RX-ready queue */
-+ desc->buf_len = RX_SIZE;
-+ desc->pkt_len = desc->status = 0;
-+ queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
-+ continue;
-+ }
-+
-+ /* process received frame */
-+#ifdef __ARMEB__
-+ temp = skb;
-+ skb = port->rx_buff_tab[n];
-+ dma_unmap_single(&dev->dev, desc->data,
-+ RX_SIZE, DMA_FROM_DEVICE);
-+#else
-+ dma_sync_single(&dev->dev, desc->data,
-+ RX_SIZE, DMA_FROM_DEVICE);
-+ memcpy_swab32((u32 *)skb->data, (u32 *)port->rx_buff_tab[n],
-+ ALIGN(desc->pkt_len, 4) / 4);
-+#endif
-+ skb_put(skb, desc->pkt_len);
-+
-+ debug_pkt(dev, "hss_hdlc_poll", skb->data, skb->len);
-+
-+ skb->protocol = hdlc_type_trans(skb, dev);
-+ dev->last_rx = jiffies;
-+ stats->rx_packets++;
-+ stats->rx_bytes += skb->len;
-+ netif_receive_skb(skb);
-+
-+ /* put the new buffer on RX-free queue */
-+#ifdef __ARMEB__
-+ port->rx_buff_tab[n] = temp;
-+ desc->data = phys;
-+#endif
-+ desc->buf_len = RX_SIZE;
-+ desc->pkt_len = 0;
-+ queue_put_desc(rxfreeq, rx_desc_phys(port, n), desc);
-+ received++;
-+ }
-+#if DEBUG_RX
-+ printk(KERN_DEBUG "hss_hdlc_poll: end, not all work done\n");
-+#endif
-+ return received; /* not all work done */
-+}
-+
-+
-+static void hss_hdlc_txdone_irq(void *pdev)
-+{
-+ struct net_device *dev = pdev;
-+ struct port *port = dev_to_port(dev);
-+ struct net_device_stats *stats = hdlc_stats(dev);
-+ int n_desc;
-+
-+#if DEBUG_TX
-+ printk(KERN_DEBUG DRV_NAME ": hss_hdlc_txdone_irq\n");
-+#endif
-+ while ((n_desc = queue_get_desc(queue_ids[port->id].txdone,
-+ port, 1)) >= 0) {
-+ struct desc *desc;
-+ int start;
-+
-+ desc = tx_desc_ptr(port, n_desc);
-+
-+ stats->tx_packets++;
-+ stats->tx_bytes += desc->pkt_len;
-+
-+ dma_unmap_tx(port, desc);
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: hss_hdlc_txdone_irq free %p\n",
-+ dev->name, port->tx_buff_tab[n_desc]);
-+#endif
-+ free_buffer_irq(port->tx_buff_tab[n_desc]);
-+ port->tx_buff_tab[n_desc] = NULL;
-+
-+ start = qmgr_stat_empty(port->plat->txreadyq);
-+ queue_put_desc(port->plat->txreadyq,
-+ tx_desc_phys(port, n_desc), desc);
-+ if (start) {
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: hss_hdlc_txdone_irq xmit"
-+ " ready\n", dev->name);
-+#endif
-+ netif_wake_queue(dev);
-+ }
-+ }
-+}
-+
-+static int hss_hdlc_xmit(struct sk_buff *skb, struct net_device *dev)
-+{
-+ struct port *port = dev_to_port(dev);
-+ struct net_device_stats *stats = hdlc_stats(dev);
-+ unsigned int txreadyq = port->plat->txreadyq;
-+ int len, offset, bytes, n;
-+ void *mem;
-+ u32 phys;
-+ struct desc *desc;
-+
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: hss_hdlc_xmit\n", dev->name);
-+#endif
-+
-+ if (unlikely(skb->len > HDLC_MAX_MRU)) {
-+ dev_kfree_skb(skb);
-+ stats->tx_errors++;
-+ return NETDEV_TX_OK;
-+ }
-+
-+ debug_pkt(dev, "hss_hdlc_xmit", skb->data, skb->len);
-+
-+ len = skb->len;
-+#ifdef __ARMEB__
-+ offset = 0; /* no need to keep alignment */
-+ bytes = len;
-+ mem = skb->data;
-+#else
-+ offset = (int)skb->data & 3; /* keep 32-bit alignment */
-+ bytes = ALIGN(offset + len, 4);
-+ if (!(mem = kmalloc(bytes, GFP_ATOMIC))) {
-+ dev_kfree_skb(skb);
-+ stats->tx_dropped++;
-+ return NETDEV_TX_OK;
-+ }
-+ memcpy_swab32(mem, (u32 *)((int)skb->data & ~3), bytes / 4);
-+ dev_kfree_skb(skb);
-+#endif
-+
-+ phys = dma_map_single(&dev->dev, mem, bytes, DMA_TO_DEVICE);
-+ if (dma_mapping_error(phys)) {
-+#ifdef __ARMEB__
-+ dev_kfree_skb(skb);
-+#else
-+ kfree(mem);
-+#endif
-+ stats->tx_dropped++;
-+ return NETDEV_TX_OK;
-+ }
-+
-+ n = queue_get_desc(txreadyq, port, 1);
-+ BUG_ON(n < 0);
-+ desc = tx_desc_ptr(port, n);
-+
-+#ifdef __ARMEB__
-+ port->tx_buff_tab[n] = skb;
-+#else
-+ port->tx_buff_tab[n] = mem;
-+#endif
-+ desc->data = phys + offset;
-+ desc->buf_len = desc->pkt_len = len;
-+
-+ wmb();
-+ queue_put_desc(queue_ids[port->id].tx, tx_desc_phys(port, n), desc);
-+ dev->trans_start = jiffies;
-+
-+ if (qmgr_stat_empty(txreadyq)) {
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: hss_hdlc_xmit queue full\n", dev->name);
-+#endif
-+ netif_stop_queue(dev);
-+ /* we could miss TX ready interrupt */
-+ if (!qmgr_stat_empty(txreadyq)) {
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: hss_hdlc_xmit ready again\n",
-+ dev->name);
-+#endif
-+ netif_wake_queue(dev);
-+ }
-+ }
-+
-+#if DEBUG_TX
-+ printk(KERN_DEBUG "%s: hss_hdlc_xmit end\n", dev->name);
-+#endif
-+ return NETDEV_TX_OK;
-+}
-+
-+
-+static int request_hdlc_queues(struct port *port)
-+{
-+ int err;
-+
-+ err = qmgr_request_queue(queue_ids[port->id].rxfree, RX_DESCS, 0, 0);
-+ if (err)
-+ return err;
-+
-+ err = qmgr_request_queue(queue_ids[port->id].rx, RX_DESCS, 0, 0);
-+ if (err)
-+ goto rel_rxfree;
-+
-+ err = qmgr_request_queue(queue_ids[port->id].tx, TX_DESCS, 0, 0);
-+ if (err)
-+ goto rel_rx;
-+
-+ err = qmgr_request_queue(port->plat->txreadyq, TX_DESCS, 0, 0);
-+ if (err)
-+ goto rel_tx;
-+
-+ err = qmgr_request_queue(queue_ids[port->id].txdone, TX_DESCS, 0, 0);
-+ if (err)
-+ goto rel_txready;
-+ return 0;
-+
-+rel_txready:
-+ qmgr_release_queue(port->plat->txreadyq);
-+rel_tx:
-+ qmgr_release_queue(queue_ids[port->id].tx);
-+rel_rx:
-+ qmgr_release_queue(queue_ids[port->id].rx);
-+rel_rxfree:
-+ qmgr_release_queue(queue_ids[port->id].rxfree);
-+ printk(KERN_DEBUG "%s: unable to request hardware queues\n",
-+ port->netdev->name);
-+ return err;
-+}
-+
-+static void release_hdlc_queues(struct port *port)
-+{
-+ qmgr_release_queue(queue_ids[port->id].rxfree);
-+ qmgr_release_queue(queue_ids[port->id].rx);
-+ qmgr_release_queue(queue_ids[port->id].txdone);
-+ qmgr_release_queue(queue_ids[port->id].tx);
-+ qmgr_release_queue(port->plat->txreadyq);
-+}
-+
-+static int init_hdlc_queues(struct port *port)
-+{
-+ int i;
-+
-+ if (!ports_open)
-+ if (!(dma_pool = dma_pool_create(DRV_NAME, NULL,
-+ POOL_ALLOC_SIZE, 32, 0)))
-+ return -ENOMEM;
-+
-+ if (!(port->desc_tab = dma_pool_alloc(dma_pool, GFP_KERNEL,
-+ &port->desc_tab_phys)))
-+ return -ENOMEM;
-+ memset(port->desc_tab, 0, POOL_ALLOC_SIZE);
-+ memset(port->rx_buff_tab, 0, sizeof(port->rx_buff_tab)); /* tables */
-+ memset(port->tx_buff_tab, 0, sizeof(port->tx_buff_tab));
-+
-+ /* Setup RX buffers */
-+ for (i = 0; i < RX_DESCS; i++) {
-+ struct desc *desc = rx_desc_ptr(port, i);
-+ buffer_t *buff;
-+ void *data;
-+#ifdef __ARMEB__
-+ if (!(buff = netdev_alloc_skb(port->netdev, RX_SIZE)))
-+ return -ENOMEM;
-+ data = buff->data;
-+#else
-+ if (!(buff = kmalloc(RX_SIZE, GFP_KERNEL)))
-+ return -ENOMEM;
-+ data = buff;
-+#endif
-+ desc->buf_len = RX_SIZE;
-+ desc->data = dma_map_single(&port->netdev->dev, data,
-+ RX_SIZE, DMA_FROM_DEVICE);
-+ if (dma_mapping_error(desc->data)) {
-+ free_buffer(buff);
-+ return -EIO;
-+ }
-+ port->rx_buff_tab[i] = buff;
-+ }
-+
-+ return 0;
-+}
-+
-+static void destroy_hdlc_queues(struct port *port)
-+{
-+ int i;
-+
-+ if (port->desc_tab) {
-+ for (i = 0; i < RX_DESCS; i++) {
-+ struct desc *desc = rx_desc_ptr(port, i);
-+ buffer_t *buff = port->rx_buff_tab[i];
-+ if (buff) {
-+ dma_unmap_single(&port->netdev->dev,
-+ desc->data, RX_SIZE,
-+ DMA_FROM_DEVICE);
-+ free_buffer(buff);
-+ }
-+ }
-+ for (i = 0; i < TX_DESCS; i++) {
-+ struct desc *desc = tx_desc_ptr(port, i);
-+ buffer_t *buff = port->tx_buff_tab[i];
-+ if (buff) {
-+ dma_unmap_tx(port, desc);
-+ free_buffer(buff);
-+ }
-+ }
-+ dma_pool_free(dma_pool, port->desc_tab, port->desc_tab_phys);
-+ port->desc_tab = NULL;
-+ }
-+
-+ if (!ports_open && dma_pool) {
-+ dma_pool_destroy(dma_pool);
-+ dma_pool = NULL;
-+ }
-+}
-+
-+static int hss_hdlc_open(struct net_device *dev)
-+{
-+ struct port *port = dev_to_port(dev);
-+ unsigned long flags;
-+ int i, err = 0;
-+
-+ if ((err = hdlc_open(dev)))
-+ return err;
-+
-+ if ((err = request_hdlc_queues(port)))
-+ goto err_hdlc_close;
-+
-+ if ((err = init_hdlc_queues(port)))
-+ goto err_destroy_queues;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (port->mode == MODE_G704 && port->channels[0] == CHANNEL_HDLC) {
-+ err = -EBUSY; /* channel #0 is used for G.704 framing */
-+ goto err_unlock;
-+ }
-+ if (port->mode != MODE_HDLC)
-+ for (i = port->frame_size / 8; i < MAX_CHANNELS; i++)
-+ if (port->channels[i] == CHANNEL_HDLC) {
-+ err = -ECHRNG; /* frame too short */
-+ goto err_unlock;
-+ }
-+
-+ if ((err = hss_config_load_firmware(port)))
-+ goto err_unlock;
-+
-+ if (!port->chan_open_count && port->plat->open)
-+ if ((err = port->plat->open(port->id, dev,
-+ hss_hdlc_set_carrier)))
-+ goto err_unlock;
-+
-+ if (port->mode == MODE_G704 && !port->chan_open_count)
-+ if ((err = hss_prepare_chan(port)))
-+ goto err_plat_close;
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+
-+ /* Populate queues with buffers, no failure after this point */
-+ for (i = 0; i < TX_DESCS; i++)
-+ queue_put_desc(port->plat->txreadyq,
-+ tx_desc_phys(port, i), tx_desc_ptr(port, i));
-+
-+ for (i = 0; i < RX_DESCS; i++)
-+ queue_put_desc(queue_ids[port->id].rxfree,
-+ rx_desc_phys(port, i), rx_desc_ptr(port, i));
-+
-+ napi_enable(&port->napi);
-+ netif_start_queue(dev);
-+
-+ qmgr_set_irq(queue_ids[port->id].rx, QUEUE_IRQ_SRC_NOT_EMPTY,
-+ hss_hdlc_rx_irq, dev);
-+
-+ qmgr_set_irq(queue_ids[port->id].txdone, QUEUE_IRQ_SRC_NOT_EMPTY,
-+ hss_hdlc_txdone_irq, dev);
-+ qmgr_enable_irq(queue_ids[port->id].txdone);
-+
-+ ports_open++;
-+ port->hdlc_open = 1;
-+
-+ hss_config_set_hdlc_cfg(port);
-+ hss_config_set_lut(port);
-+ hss_config_load(port);
-+
-+ if (port->mode == MODE_G704 && !port->chan_open_count)
-+ hss_config_start_chan(port);
-+
-+ hss_config_start_hdlc(port);
-+
-+ /* we may already have RX data, enables IRQ */
-+ netif_rx_schedule(dev, &port->napi);
-+ return 0;
-+
-+err_plat_close:
-+ if (!port->chan_open_count && port->plat->close)
-+ port->plat->close(port->id, dev);
-+err_unlock:
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+err_destroy_queues:
-+ destroy_hdlc_queues(port);
-+ release_hdlc_queues(port);
-+err_hdlc_close:
-+ hdlc_close(dev);
-+ return err;
-+}
-+
-+static int hss_hdlc_close(struct net_device *dev)
-+{
-+ struct port *port = dev_to_port(dev);
-+ unsigned long flags;
-+ int i, buffs = RX_DESCS; /* allocated RX buffers */
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ ports_open--;
-+ port->hdlc_open = 0;
-+ qmgr_disable_irq(queue_ids[port->id].rx);
-+ netif_stop_queue(dev);
-+ napi_disable(&port->napi);
-+
-+ hss_config_stop_hdlc(port);
-+
-+ if (port->mode == MODE_G704 && !port->chan_open_count)
-+ hss_chan_stop(port);
-+
-+ while (queue_get_desc(queue_ids[port->id].rxfree, port, 0) >= 0)
-+ buffs--;
-+ while (queue_get_desc(queue_ids[port->id].rx, port, 0) >= 0)
-+ buffs--;
-+
-+ if (buffs)
-+ printk(KERN_CRIT "%s: unable to drain RX queue, %i buffer(s)"
-+ " left in NPE\n", dev->name, buffs);
-+
-+ buffs = TX_DESCS;
-+ while (queue_get_desc(queue_ids[port->id].tx, port, 1) >= 0)
-+ buffs--; /* cancel TX */
-+
-+ i = 0;
-+ do {
-+ while (queue_get_desc(port->plat->txreadyq, port, 1) >= 0)
-+ buffs--;
-+ if (!buffs)
-+ break;
-+ } while (++i < MAX_CLOSE_WAIT);
-+
-+ if (buffs)
-+ printk(KERN_CRIT "%s: unable to drain TX queue, %i buffer(s) "
-+ "left in NPE\n", dev->name, buffs);
-+#if DEBUG_CLOSE
-+ if (!buffs)
-+ printk(KERN_DEBUG "Draining TX queues took %i cycles\n", i);
-+#endif
-+ qmgr_disable_irq(queue_ids[port->id].txdone);
-+
-+ if (!port->chan_open_count && port->plat->close)
-+ port->plat->close(port->id, dev);
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+
-+ destroy_hdlc_queues(port);
-+ release_hdlc_queues(port);
-+ hdlc_close(dev);
-+ return 0;
-+}
-+
-+
-+static int hss_hdlc_attach(struct net_device *dev, unsigned short encoding,
-+ unsigned short parity)
-+{
-+ struct port *port = dev_to_port(dev);
-+
-+ if (encoding != ENCODING_NRZ)
-+ return -EINVAL;
-+
-+ switch(parity) {
-+ case PARITY_CRC16_PR1_CCITT:
-+ port->hdlc_cfg = 0;
-+ return 0;
-+
-+ case PARITY_CRC32_PR1_CCITT:
-+ port->hdlc_cfg = PKT_HDLC_CRC_32;
-+ return 0;
-+
-+ default:
-+ return -EINVAL;
-+ }
-+}
-+
-+
-+static int hss_hdlc_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
-+{
-+ const size_t size = sizeof(sync_serial_settings);
-+ sync_serial_settings new_line;
-+ sync_serial_settings __user *line = ifr->ifr_settings.ifs_ifsu.sync;
-+ struct port *port = dev_to_port(dev);
-+ unsigned long flags;
-+ int i, clk;
-+
-+ if (cmd != SIOCWANDEV)
-+ return hdlc_ioctl(dev, ifr, cmd);
-+
-+ switch(ifr->ifr_settings.type) {
-+ case IF_GET_IFACE:
-+ ifr->ifr_settings.type = IF_IFACE_V35;
-+ if (ifr->ifr_settings.size < size) {
-+ ifr->ifr_settings.size = size; /* data size wanted */
-+ return -ENOBUFS;
-+ }
-+ memset(&new_line, 0, sizeof(new_line));
-+ new_line.clock_type = port->clock_type;
-+ new_line.clock_rate = port->clock_rate;
-+ new_line.loopback = port->loopback;
-+ if (copy_to_user(line, &new_line, size))
-+ return -EFAULT;
-+
-+ if (!port->chan_buf)
-+ return 0;
-+
-+ dma_sync_single(&dev->dev, port->chan_rx_buf_phys,
-+ chan_rx_buf_len(port), DMA_FROM_DEVICE);
-+ printk(KERN_DEBUG "RX:\n");
-+ for (i = 0; i < chan_rx_buf_len(port); i++) {
-+ if (i % 32 == 0)
-+ printk(KERN_DEBUG "%03X ", i);
-+ printk("%02X%c", chan_rx_buf(port)[i],
-+ (i + 1) % 32 ? ' ' : '\n');
-+ }
-+
-+#if 0
-+ printk(KERN_DEBUG "TX:\n");
-+ for (i = 0; i < /*CHAN_TX_FRAMES * 2*/ chan_tx_buf_len(port)
-+ + chan_tx_lists_len(port); i++) {
-+ if (i % 32 == 0)
-+ printk(KERN_DEBUG "%03X ", i);
-+ printk("%02X%c", chan_tx_buf(port)[i],
-+ (i + 1) % 32 ? ' ' : '\n');
-+ }
-+#endif
-+ port->msg_count = 10;
-+ return 0;
-+
-+ case IF_IFACE_SYNC_SERIAL:
-+ case IF_IFACE_V35:
-+ if(!capable(CAP_NET_ADMIN))
-+ return -EPERM;
-+ if (copy_from_user(&new_line, line, size))
-+ return -EFAULT;
-+
-+ clk = new_line.clock_type;
-+ if (port->plat->set_clock)
-+ clk = port->plat->set_clock(port->id, clk);
-+
-+ if (clk != CLOCK_EXT && clk != CLOCK_INT)
-+ return -EINVAL; /* No such clock setting */
-+
-+ if (new_line.loopback != 0 && new_line.loopback != 1)
-+ return -EINVAL;
-+
-+ port->clock_type = clk; /* Update settings */
-+ /* FIXME port->clock_rate = new_line.clock_rate */;
-+ port->loopback = new_line.loopback;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (port->chan_open_count || port->hdlc_open) {
-+ hss_config_set_line(port);
-+ hss_config_load(port);
-+ }
-+ if (port->loopback || port->carrier)
-+ netif_carrier_on(port->netdev);
-+ else
-+ netif_carrier_off(port->netdev);
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+
-+ return 0;
-+
-+ default:
-+ return hdlc_ioctl(dev, ifr, cmd);
-+ }
-+}
-+
-+/*****************************************************************************
-+ * channelized (G.704) operation
-+ ****************************************************************************/
-+
-+static void g704_rx_framer(struct port *port, unsigned int offset)
-+{
-+ u8 *data = chan_rx_buf(port) + sub_offset(offset, CHAN_RX_TRIGGER,
-+ CHAN_RX_FRAMES);
-+ unsigned int bit, frame, bad_even = 0, bad_odd = 0, cnt;
-+ unsigned int is_first = port->just_set_offset;
-+ u8 zeros_even, zeros_odd, ones_even, ones_odd;
-+ enum alignment aligned;
-+
-+ port->just_set_offset = 0;
-+ dma_sync_single(port->dev, port->chan_rx_buf_phys, CHAN_RX_FRAMES,
-+ DMA_FROM_DEVICE);
-+
-+ /* check if aligned first */
-+ for (frame = 0; frame < CHAN_RX_TRIGGER &&
-+ (bad_even <= MAX_CHAN_RX_BAD_SYNC ||
-+ bad_odd <= MAX_CHAN_RX_BAD_SYNC); frame += 2) {
-+ u8 ve = data[frame];
-+ u8 vo = data[frame + 1];
-+
-+ if ((ve & 0x7F) != 0x1B || !(vo & 0x40))
-+ bad_even++;
-+
-+ if ((vo & 0x7F) != 0x1B || !(ve & 0x40))
-+ bad_odd++;
-+ }
-+
-+ if (bad_even <= MAX_CHAN_RX_BAD_SYNC)
-+ aligned = EVEN_FIRST;
-+ else if (bad_odd <= MAX_CHAN_RX_BAD_SYNC)
-+ aligned = ODD_FIRST;
-+ else
-+ aligned = NOT_ALIGNED;
-+
-+ if (aligned != NOT_ALIGNED) {
-+ if (aligned == port->aligned)
-+ return; /* no change */
-+ if (printk_ratelimit())
-+ printk(KERN_INFO "HSS-%i: synchronized at %u (%s frame"
-+ " first)\n", port->id, port->frame_sync_offset,
-+ aligned == EVEN_FIRST ? "even" : "odd");
-+ port->aligned = aligned;
-+
-+ atomic_inc(&port->chan_tx_irq_number);
-+ wake_up_interruptible(&port->chan_tx_waitq);
-+ atomic_inc(&port->chan_rx_irq_number);
-+ wake_up_interruptible(&port->chan_rx_waitq);
-+ return;
-+ }
-+
-+ /* not aligned */
-+ if (port->aligned != NOT_ALIGNED && printk_ratelimit()) {
-+ printk(KERN_INFO "HSS-%i: lost alignment\n", port->id);
-+ port->aligned = NOT_ALIGNED;
-+#if DEBUG_FRAMER
-+ for (cnt = 0; cnt < CHAN_RX_FRAMES; cnt++)
-+ printk("%c%02X%s", cnt == offset ? '>' : ' ',
-+ chan_rx_buf(port)[cnt],
-+ (cnt + 1) % 32 ? "" : "\n");
-+#endif
-+
-+ for (cnt = 0; cnt < MAX_CHAN_DEVICES; cnt++)
-+ if (port->chan_devices[cnt]) {
-+ set_bit(TX_ERROR_BIT, &port->chan_devices[cnt]
-+ ->errors_bitmap);
-+ set_bit(RX_ERROR_BIT, &port->chan_devices[cnt]
-+ ->errors_bitmap);
-+ }
-+ atomic_inc(&port->chan_tx_irq_number);
-+ wake_up_interruptible(&port->chan_tx_waitq);
-+ atomic_inc(&port->chan_rx_irq_number);
-+ wake_up_interruptible(&port->chan_rx_waitq);
-+ }
-+
-+ if (is_first)
-+ return;
-+
-+ zeros_even = zeros_odd = 0;
-+ ones_even = ones_odd = 0xFF;
-+ for (frame = 0; frame < CHAN_RX_TRIGGER; frame += 2) {
-+ zeros_even |= data[frame];
-+ zeros_odd |= data[frame + 1];
-+ ones_even &= data[frame];
-+ ones_odd &= data[frame + 1];
-+ }
-+
-+ for (bit = 0; bit < 7; bit++) {
-+ if ((zeros_even & ~0x9B) == 0 && (ones_even & 0x1B) == 0x1B &&
-+ (ones_odd & 0x40) == 0x40) {
-+ aligned = EVEN_FIRST; /* maybe */
-+ break;
-+ }
-+ if ((zeros_odd & ~0x9B) == 0 && (ones_odd & 0x1B) == 0x1B &&
-+ (ones_even & 0x40) == 0x40) {
-+ aligned = ODD_FIRST; /* maybe */
-+ break;
-+ }
-+ zeros_even <<= 1;
-+ ones_even = ones_even << 1 | 1;
-+ zeros_odd <<= 1;
-+ ones_odd = ones_odd << 1 | 1;
-+ }
-+
-+ port->frame_sync_offset += port->frame_size - bit;
-+ port->frame_sync_offset %= port->frame_size;
-+ port->just_set_offset = 1;
-+
-+#if DEBUG_FRAMER
-+ if (bit == 7)
-+ printk(KERN_DEBUG "HSS-%i: trying frame sync at %u\n",
-+ port->id, port->frame_sync_offset);
-+ else
-+ printk(KERN_DEBUG "HSS-%i: found possible frame sync pattern at"
-+ " %u (%s frame first)\n", port->id,
-+ port->frame_sync_offset,
-+ aligned == EVEN_FIRST ? "even" : "odd");
-+#endif
-+
-+ hss_config_set_rx_frame(port);
-+ hss_config_load(port);
-+}
-+
-+static void chan_process_tx_irq(struct chan_device *chan_dev, int offset)
-+{
-+ /* in bytes */
-+ unsigned int buff_len = CHAN_TX_FRAMES * chan_dev->chan_count;
-+ unsigned int list_len = CHAN_TX_LIST_FRAMES * chan_dev->chan_count;
-+ int eaten, last_offset = chan_dev->port->chan_last_tx * list_len;
-+
-+ offset *= list_len;
-+ eaten = sub_offset(offset, last_offset, buff_len);
-+
-+ if (chan_dev->tx_count > eaten + 2 * list_len) {
-+ /* two pages must be reserved for the transmitter */
-+ chan_dev->tx_first += eaten;
-+ chan_dev->tx_first %= buff_len;
-+ chan_dev->tx_count -= eaten;
-+ } else {
-+ /* FIXME check
-+ 0
-+ 1 tx_first (may still be transmited)
-+ 2 tx_offset (currently reported by the NPE)
-+ 3 tx_first + 2 * list_len (free to write here)
-+ 4
-+ 5
-+ */
-+
-+ /* printk(KERN_DEBUG "TX buffer underflow\n"); */
-+ chan_dev->tx_first = sub_offset(offset, list_len, buff_len);
-+ chan_dev->tx_count = 2 * list_len; /* reserve */
-+ set_bit(TX_ERROR_BIT, &chan_dev->errors_bitmap);
-+ }
-+}
-+
-+static void chan_process_rx_irq(struct chan_device *chan_dev, int offset)
-+{
-+ /* in bytes */
-+ unsigned int buff_len = CHAN_RX_FRAMES * chan_dev->chan_count;
-+ unsigned int trig_len = CHAN_RX_TRIGGER * chan_dev->chan_count;
-+ int last_offset = chan_dev->port->chan_last_rx * chan_dev->chan_count;
-+
-+ offset *= chan_dev->chan_count;
-+ chan_dev->rx_count += sub_offset(offset, last_offset + trig_len,
-+ buff_len) + trig_len;
-+ if (chan_dev->rx_count > buff_len - 2 * trig_len) {
-+ /* two pages - offset[0] and offset[1] are lost - FIXME check */
-+ /* printk(KERN_DEBUG "RX buffer overflow\n"); */
-+ chan_dev->rx_first = (offset + 2 * trig_len) % buff_len;
-+ chan_dev->rx_count = buff_len - 2 * trig_len;
-+ set_bit(RX_ERROR_BIT, &chan_dev->errors_bitmap);
-+ }
-+}
-+
-+static void hss_chan_irq(void *pdev)
-+{
-+ struct port *port = pdev;
-+ u32 v;
-+
-+#if DEBUG_RX
-+ printk(KERN_DEBUG DRV_NAME ": hss_chan_irq\n");
-+#endif
-+ spin_lock(&npe_lock);
-+ while ((v = qmgr_get_entry(queue_ids[port->id].chan))) {
-+ unsigned int first, errors, tx_list, rx_frame;
-+ int i, bad;
-+
-+ first = v >> 24;
-+ errors = (v >> 16) & 0xFF;
-+ tx_list = (v >> 8) & 0xFF;
-+ rx_frame = v & 0xFF;
-+
-+ if (port->msg_count) {
-+ printk(KERN_DEBUG "chan_irq hss %i jiffies %lu first"
-+ " 0x%02X errors 0x%02X tx_list 0x%02X rx_frame"
-+ " 0x%02X\n", port->id, jiffies, first, errors,
-+ tx_list, rx_frame);
-+ port->msg_count--;
-+ }
-+
-+ BUG_ON(rx_frame % CHAN_RX_TRIGGER);
-+ BUG_ON(rx_frame >= CHAN_RX_FRAMES);
-+ BUG_ON(tx_list >= CHAN_TX_LISTS);
-+
-+ bad = port->mode == MODE_G704 && port->aligned == NOT_ALIGNED;
-+ if (!bad && tx_list != port->chan_last_tx) {
-+ if (tx_list != (port->chan_last_tx + 1) % CHAN_TX_LISTS)
-+ printk(KERN_DEBUG "Skipped an IRQ? Tx last %i"
-+ " current %i\n", port->chan_last_tx,
-+ tx_list);
-+ for (i = 0; i < MAX_CHAN_DEVICES; i++) {
-+ if (!port->chan_devices[i] ||
-+ !port->chan_devices[i]->open_count)
-+ continue;
-+ chan_process_tx_irq(port->chan_devices[i],
-+ tx_list);
-+ }
-+ atomic_inc(&port->chan_tx_irq_number);
-+#if 0
-+ printk(KERN_DEBUG "wakeing up TX jiff %lu\n",
-+ jiffies, errors);
-+#endif
-+ wake_up_interruptible(&port->chan_tx_waitq);
-+ }
-+
-+ if (rx_frame != (port->chan_last_rx + CHAN_RX_TRIGGER) %
-+ CHAN_RX_FRAMES)
-+ printk(KERN_DEBUG "Skipped an IRQ? Rx last %i"
-+ " current %i\n", port->chan_last_rx, rx_frame);
-+
-+ if (port->mode == MODE_G704)
-+ g704_rx_framer(port, rx_frame);
-+
-+ if (!bad &&
-+ (port->mode != MODE_G704 || port->aligned != NOT_ALIGNED)) {
-+ for (i = 0; i < MAX_CHAN_DEVICES; i++) {
-+ if (!port->chan_devices[i] ||
-+ !port->chan_devices[i]->open_count)
-+ continue;
-+ chan_process_rx_irq(port->chan_devices[i],
-+ rx_frame);
-+ }
-+ atomic_inc(&port->chan_rx_irq_number);
-+ wake_up_interruptible(&port->chan_rx_waitq);
-+ }
-+ port->chan_last_tx = tx_list;
-+ port->chan_last_rx = rx_frame;
-+ }
-+ spin_unlock(&npe_lock);
-+}
-+
-+
-+static int hss_prepare_chan(struct port *port)
-+{
-+ int err;
-+
-+ if ((err = hss_config_load_firmware(port)))
-+ return err;
-+
-+ if ((err = qmgr_request_queue(queue_ids[port->id].chan,
-+ CHAN_QUEUE_LEN, 0, 0)))
-+ return err;
-+
-+ if (!(port->chan_buf = kmalloc(chan_tx_buf_len(port) +
-+ chan_tx_lists_len(port) +
-+ chan_rx_buf_len(port), GFP_KERNEL))) {
-+ goto release_queue;
-+ err = -ENOBUFS;
-+ }
-+
-+ port->chan_tx_buf_phys = dma_map_single(port->dev, chan_tx_buf(port),
-+ chan_tx_buf_len(port) +
-+ chan_tx_lists_len(port),
-+ DMA_TO_DEVICE);
-+ if (dma_mapping_error(port->chan_tx_buf_phys)) {
-+ err = -EIO;
-+ goto free;
-+ }
-+
-+ port->chan_rx_buf_phys = dma_map_single(port->dev, chan_rx_buf(port),
-+ chan_rx_buf_len(port),
-+ DMA_FROM_DEVICE);
-+ if (dma_mapping_error(port->chan_rx_buf_phys)) {
-+ err = -EIO;
-+ goto unmap_tx;
-+ }
-+
-+ qmgr_set_irq(queue_ids[port->id].chan, QUEUE_IRQ_SRC_NOT_EMPTY,
-+ hss_chan_irq, port);
-+ qmgr_enable_irq(queue_ids[port->id].chan);
-+ hss_chan_irq(port);
-+ return 0;
-+
-+unmap_tx:
-+ dma_unmap_single(port->dev, port->chan_tx_buf_phys,
-+ chan_tx_buf_len(port) + chan_tx_lists_len(port),
-+ DMA_TO_DEVICE);
-+free:
-+ kfree(port->chan_buf);
-+ port->chan_buf = NULL;
-+release_queue:
-+ qmgr_release_queue(queue_ids[port->id].chan);
-+ return err;
-+}
-+
-+void hss_chan_stop(struct port *port)
-+{
-+ if (!port->chan_open_count && !port->hdlc_open)
-+ qmgr_disable_irq(queue_ids[port->id].chan);
-+
-+ hss_config_stop_chan(port);
-+ hss_config_set_lut(port);
-+ hss_config_load(port);
-+
-+ if (!port->chan_open_count && !port->hdlc_open) {
-+ dma_unmap_single(port->dev, port->chan_tx_buf_phys,
-+ chan_tx_buf_len(port) +
-+ chan_tx_lists_len(port), DMA_TO_DEVICE);
-+ dma_unmap_single(port->dev, port->chan_rx_buf_phys,
-+ chan_rx_buf_len(port), DMA_FROM_DEVICE);
-+ kfree(port->chan_buf);
-+ port->chan_buf = NULL;
-+ qmgr_release_queue(queue_ids[port->id].chan);
-+ }
-+}
-+
-+static int hss_chan_open(struct inode *inode, struct file *file)
-+{
-+ struct chan_device *chan_dev = inode_to_chan_dev(inode);
-+ struct port *port = chan_dev->port;
-+ unsigned long flags;
-+ int i, err = 0;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (chan_dev->open_count) {
-+ if (chan_dev->excl_open || (file->f_flags & O_EXCL))
-+ err = -EBUSY;
-+ else
-+ chan_dev->open_count++;
-+ goto out;
-+ }
-+
-+ if (port->mode == MODE_HDLC) {
-+ err = -ENOSYS;
-+ goto out;
-+ }
-+
-+ if (port->mode == MODE_G704 && port->channels[0] == chan_dev->id) {
-+ err = -EBUSY; /* channel #0 is used for G.704 signaling */
-+ goto out;
-+ }
-+ for (i = MAX_CHANNELS; i > port->frame_size / 8; i--)
-+ if (port->channels[i - 1] == chan_dev->id) {
-+ err = -ECHRNG; /* frame too short */
-+ goto out;
-+ }
-+
-+ chan_dev->rx_first = chan_dev->tx_first = 0;
-+ chan_dev->rx_count = chan_dev->tx_count = 0;
-+ clear_bit(TX_ERROR_BIT, &chan_dev->errors_bitmap);
-+ clear_bit(RX_ERROR_BIT, &chan_dev->errors_bitmap);
-+
-+ if (!port->chan_open_count && !port->hdlc_open) {
-+ if (port->plat->open)
-+ if ((err = port->plat->open(port->id, port->netdev,
-+ hss_hdlc_set_carrier)))
-+ goto out;
-+ if ((err = hss_prepare_chan(port))) {
-+ if (port->plat->close)
-+ port->plat->close(port->id, port->netdev);
-+ goto out;
-+ }
-+ }
-+
-+ hss_config_stop_chan(port);
-+ chan_dev->open_count++;
-+ port->chan_open_count++;
-+ chan_dev->excl_open = !!file->f_flags & O_EXCL;
-+
-+ hss_config_set_lut(port);
-+ hss_config_load(port);
-+ hss_config_start_chan(port);
-+out:
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return err;
-+}
-+
-+static int hss_chan_release(struct inode *inode, struct file *file)
-+{
-+ struct chan_device *chan_dev = inode_to_chan_dev(inode);
-+ struct port *port = chan_dev->port;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (!--chan_dev->open_count) {
-+ if (!--port->chan_open_count && !port->hdlc_open) {
-+ hss_chan_stop(port);
-+ if (port->plat->close)
-+ port->plat->close(port->id, port->netdev);
-+ } else {
-+ hss_config_stop_chan(port);
-+ hss_config_set_lut(port);
-+ hss_config_set_line(port); //
-+ hss_config_start_chan(port);
-+ }
-+ }
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return 0;
-+}
-+
-+static ssize_t hss_chan_read(struct file *file, char __user *buf, size_t count,
-+ loff_t *f_pos)
-+{
-+ struct chan_device *chan_dev = inode_to_chan_dev
-+ (file->f_path.dentry->d_inode);
-+ struct port *port = chan_dev->port;
-+ unsigned long flags;
-+ u8 *rx_buf;
-+ int res = 0, loops = 0;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ while (1) {
-+ int prev_irq = atomic_read(&port->chan_rx_irq_number);
-+#if 0
-+ if (test_and_clear_bit(RX_ERROR_BIT, &chan_dev->errors_bitmap)
-+ || (port->mode == G704 && port->aligned == NOT_ALIGNED)) {
-+ res = -EIO;
-+ goto out;
-+ }
-+#endif
-+ if (count == 0)
-+ goto out; /* no need to wait */
-+
-+ if (chan_dev->rx_count)
-+ break;
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ loops++;
-+ if ((res = wait_event_interruptible
-+ (port->chan_rx_waitq,
-+ atomic_read(&port->chan_rx_irq_number) != prev_irq)))
-+ goto out;
-+ spin_lock_irqsave(&npe_lock, flags);
-+ continue;
-+ }
-+
-+ dma_sync_single(port->dev, port->chan_rx_buf_phys,
-+ chan_rx_buf_len(port), DMA_FROM_DEVICE);
-+
-+#if 0
-+ if (loops > 1)
-+ printk(KERN_DEBUG "ENTRY rx_first %u rx_count %u count %i"
-+ " last_rx %u loops %i\n", chan_dev->rx_first,
-+ chan_dev->rx_count, count, port->chan_last_rx, loops);
-+#endif
-+ rx_buf = chan_rx_buf(port);
-+ while (chan_dev->rx_count > 0 && res < count) {
-+ unsigned int chan = chan_dev->rx_first % chan_dev->chan_count;
-+ unsigned int frame = chan_dev->rx_first / chan_dev->chan_count;
-+
-+ chan = chan_dev->log_channels[chan];
-+ if (put_user(rx_buf[chan * CHAN_RX_FRAMES + frame], buf++)) {
-+ res = -EFAULT;
-+ goto out;
-+ }
-+ chan_dev->rx_first++;
-+ chan_dev->rx_first %= CHAN_RX_FRAMES * chan_dev->chan_count;
-+ chan_dev->rx_count--;
-+ res++;
-+ }
-+out:
-+#if 0
-+ printk(KERN_DEBUG "EXIT rx_first %u rx_count %u res %i\n",
-+ chan_dev->rx_first, chan_dev->rx_count, res);
-+#endif
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return res;
-+}
-+
-+static ssize_t hss_chan_write(struct file *file, const char __user *buf,
-+ size_t count, loff_t *f_pos)
-+{
-+ struct chan_device *chan_dev = inode_to_chan_dev
-+ (file->f_path.dentry->d_inode);
-+ struct port *port = chan_dev->port;
-+ unsigned long flags;
-+ u8 *tx_buf;
-+ int res = 0, loops = 0;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ while (1) {
-+ int prev_irq = atomic_read(&port->chan_tx_irq_number);
-+#if 0
-+ if (test_and_clear_bit(TX_ERROR_BIT, &chan_dev->errors_bitmap)
-+ || (port->mode == G704 && port->aligned == NOT_ALIGNED)) {
-+ res = -EIO;
-+ goto out;
-+ }
-+#endif
-+ if (count == 0)
-+ goto out; /* no need to wait */
-+
-+ if (chan_dev->tx_count < CHAN_TX_FRAMES * chan_dev->chan_count)
-+ break;
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ loops++;
-+ if ((res = wait_event_interruptible
-+ (port->chan_tx_waitq,
-+ atomic_read (&port->chan_tx_irq_number) != prev_irq)))
-+ goto out;
-+ spin_lock_irqsave(&npe_lock, flags);
-+ continue;
-+ }
-+
-+#if 0
-+ if (loops > 1)
-+ printk(KERN_DEBUG "ENTRY TX_first %u tx_count %u count %i"
-+ " last_tx %u loops %i\n", chan_dev->tx_first,
-+ chan_dev->tx_count, count, port->chan_last_tx, loops);
-+#endif
-+ tx_buf = chan_tx_buf(port);
-+ while (chan_dev->tx_count < CHAN_TX_FRAMES * chan_dev->chan_count &&
-+ res < count) {
-+ unsigned int tail, chan, frame;
-+
-+ tail = (chan_dev->tx_first + chan_dev->tx_count) %
-+ (CHAN_TX_FRAMES * chan_dev->chan_count);
-+ chan = tail % chan_dev->chan_count;
-+ frame = tail / chan_dev->chan_count;
-+ chan = chan_dev->log_channels[chan];
-+
-+ if (get_user(tx_buf[chan * CHAN_TX_FRAMES + frame], buf++)) {
-+ printk(KERN_DEBUG "BUG? TX %u %u %u\n",
-+ tail, chan, frame);
-+ res = -EFAULT;
-+ goto out_sync;
-+ }
-+ chan_dev->tx_count++;
-+ res++;
-+ }
-+out_sync:
-+ dma_sync_single(port->dev, port->chan_tx_buf_phys,
-+ chan_tx_buf_len(port), DMA_TO_DEVICE);
-+out:
-+#if 0
-+ printk(KERN_DEBUG "EXIT TX_first %u tx_count %u res %i\n",
-+ chan_dev->tx_first, chan_dev->tx_count, res);
-+#endif
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return res;
-+}
-+
-+
-+static unsigned int hss_chan_poll(struct file *file, poll_table *wait)
-+{
-+ struct chan_device *chan_dev = inode_to_chan_dev
-+ (file->f_path.dentry->d_inode);
-+ struct port *port = chan_dev->port;
-+ unsigned long flags;
-+ unsigned int mask = 0;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ poll_wait(file, &port->chan_tx_waitq, wait);
-+ poll_wait(file, &port->chan_rx_waitq, wait);
-+
-+ if (chan_dev->tx_count < CHAN_TX_FRAMES * chan_dev->chan_count)
-+ mask |= POLLOUT | POLLWRNORM;
-+ if (chan_dev->rx_count)
-+ mask |= POLLIN | POLLRDNORM;
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return mask;
-+}
-+
-+/*****************************************************************************
-+ * channelized device sysfs attributes
-+ ****************************************************************************/
-+
-+static ssize_t chan_show_chan(struct device *dev, struct device_attribute *attr,
-+ char *buf)
-+{
-+ struct chan_device *chan_dev = dev_get_drvdata(dev);
-+
-+ return print_channels(chan_dev->port, buf, chan_dev->id);
-+}
-+
-+static ssize_t chan_set_chan(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct chan_device *chan_dev = dev_get_drvdata(dev);
-+ struct port *port = chan_dev->port;
-+ unsigned long flags;
-+ unsigned int ch;
-+ size_t orig_len = len;
-+ int err;
-+
-+ if (len && buf[len - 1] == '\n')
-+ len--;
-+
-+ if (len != 7 || memcmp(buf, "destroy", 7))
-+ return -EINVAL;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ cdev_del(&chan_dev->cdev);
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++)
-+ if (port->channels[ch] == chan_dev->id)
-+ port->channels[ch] = CHANNEL_UNUSED;
-+ port->chan_devices[chan_dev->id] = NULL;
-+ kfree(chan_dev);
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+
-+ if ((err = device_schedule_callback(dev, device_unregister)))
-+ return err;
-+ return orig_len;
-+}
-+
-+static struct device_attribute chan_attr =
-+ __ATTR(channels, 0644, chan_show_chan, chan_set_chan);
-+
-+/*****************************************************************************
-+ * main sysfs attributes
-+ ****************************************************************************/
-+
-+static const struct file_operations chan_fops = {
-+ .owner = THIS_MODULE,
-+ .llseek = no_llseek,
-+ .read = hss_chan_read,
-+ .write = hss_chan_write,
-+ .poll = hss_chan_poll,
-+ .open = hss_chan_open,
-+ .release = hss_chan_release,
-+};
-+
-+static ssize_t create_chan(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+ struct chan_device *chan_dev;
-+ u8 channels[MAX_CHANNELS];
-+ size_t orig_len = len;
-+ unsigned long flags;
-+ unsigned int ch, id;
-+ int minor, err;
-+
-+ if ((err = parse_channels(&buf, &len, channels)) < 1)
-+ return err;
-+
-+ if (!(chan_dev = kzalloc(sizeof(struct chan_device), GFP_KERNEL)))
-+ return -ENOBUFS;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (port->mode != MODE_RAW && port->mode != MODE_G704) {
-+ err = -EINVAL;
-+ goto free;
-+ }
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++)
-+ if (channels[ch] && port->channels[ch] != CHANNEL_UNUSED) {
-+ printk(KERN_DEBUG "Channel #%i already in use\n", ch);
-+ err = -EBUSY;
-+ goto free;
-+ }
-+
-+ for (id = 0; id < MAX_CHAN_DEVICES; id++)
-+ if (port->chan_devices[id] == NULL)
-+ break;
-+
-+ if (id == MAX_CHAN_DEVICES) {
-+ err = -EBUSY;
-+ goto free;
-+ }
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++)
-+ if (channels[ch])
-+ break;
-+
-+ minor = port->id * MAX_CHAN_DEVICES + ch;
-+ chan_dev->id = id;
-+ chan_dev->port = port;
-+ chan_dev->dev = device_create(hss_class, dev, MKDEV(chan_major, minor),
-+ "hss%uch%u", port->id, ch);
-+ if (IS_ERR(chan_dev->dev)) {
-+ err = PTR_ERR(chan_dev->dev);
-+ goto free;
-+ }
-+
-+ cdev_init(&chan_dev->cdev, &chan_fops);
-+ chan_dev->cdev.owner = THIS_MODULE;
-+ if ((err = cdev_add(&chan_dev->cdev, MKDEV(chan_major, minor), 1)))
-+ goto destroy_device;
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++)
-+ if (channels[ch])
-+ port->channels[ch] = id;
-+ port->chan_devices[id] = chan_dev;
-+ dev_set_drvdata(chan_dev->dev, chan_dev);
-+ BUG_ON(device_create_file(chan_dev->dev, &chan_attr));
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return orig_len;
-+
-+destroy_device:
-+ device_unregister(chan_dev->dev);
-+free:
-+ kfree(chan_dev);
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return err;
-+}
-+
-+static ssize_t show_hdlc_chan(struct device *dev, struct device_attribute *attr,
-+ char *buf)
-+{
-+ return print_channels(dev_get_drvdata(dev), buf, CHANNEL_HDLC);
-+}
-+
-+static ssize_t set_hdlc_chan(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+ u8 channels[MAX_CHANNELS];
-+ size_t orig_len = len;
-+ unsigned long flags;
-+ unsigned int ch;
-+ int err;
-+
-+ if ((err = parse_channels(&buf, &len, channels)) < 0)
-+ return err;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (port->mode != MODE_RAW && port->mode != MODE_G704) {
-+ err = -EINVAL;
-+ goto err;
-+ }
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++)
-+ if (channels[ch] &&
-+ port->channels[ch] != CHANNEL_UNUSED &&
-+ port->channels[ch] != CHANNEL_HDLC) {
-+ printk(KERN_DEBUG "Channel #%i already in use\n", ch);
-+ err = -EBUSY;
-+ goto err;
-+ }
-+
-+ for (ch = 0; ch < MAX_CHANNELS; ch++)
-+ if (channels[ch])
-+ port->channels[ch] = CHANNEL_HDLC;
-+ else if (port->channels[ch] == CHANNEL_HDLC)
-+ port->channels[ch] = CHANNEL_UNUSED;
-+
-+ if (port->chan_open_count || port->hdlc_open) {
-+ hss_config_set_lut(port);
-+ hss_config_load(port);
-+ }
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return orig_len;
-+
-+err:
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return err;
-+}
-+
-+static ssize_t show_clock_type(struct device *dev,
-+ struct device_attribute *attr, char *buf)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+
-+ strcpy(buf, port->clock_type == CLOCK_INT ? "int\n" : "ext\n");
-+ return 5;
-+}
-+
-+static ssize_t set_clock_type(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+ size_t orig_len = len;
-+ unsigned long flags;
-+ unsigned int clk, err;
-+
-+ if (len && buf[len - 1] == '\n')
-+ len--;
-+
-+ if (len != 3)
-+ return -EINVAL;
-+ if (!memcmp(buf, "ext", 3))
-+ clk = CLOCK_EXT;
-+ else if (!memcmp(buf, "int", 3))
-+ clk = CLOCK_INT;
-+ else
-+ return -EINVAL;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ if (port->plat->set_clock)
-+ clk = port->plat->set_clock(port->id, clk);
-+ if (clk != CLOCK_EXT && clk != CLOCK_INT) {
-+ err = -EINVAL; /* plat->set_clock shouldn't change the state */
-+ goto err;
-+ }
-+ port->clock_type = clk;
-+ if (port->chan_open_count || port->hdlc_open) {
-+ hss_config_set_line(port);
-+ hss_config_load(port);
-+ }
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+
-+ return orig_len;
-+err:
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return err;
-+}
-+
-+static ssize_t show_clock_rate(struct device *dev,
-+ struct device_attribute *attr, char *buf)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+
-+ sprintf(buf, "%u\n", port->clock_rate);
-+ return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_clock_rate(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+#if 0
-+ struct port *port = dev_get_drvdata(dev);
-+ size_t orig_len = len;
-+ unsigned long flags;
-+ unsigned int rate;
-+
-+ if (len && buf[len - 1] == '\n')
-+ len--;
-+
-+ if (get_number(&buf, &len, &rate, 1, 0xFFFFFFFFu))
-+ return -EINVAL;
-+ if (len)
-+ return -EINVAL;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ port->clock_rate = rate;
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return orig_len;
-+#endif
-+ return -EINVAL; /* FIXME not yet supported */
-+}
-+
-+static ssize_t show_frame_size(struct device *dev,
-+ struct device_attribute *attr, char *buf)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+
-+ if (port->mode != MODE_RAW && port->mode != MODE_G704)
-+ return -EINVAL;
-+
-+ sprintf(buf, "%u\n", port->frame_size);
-+ return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_frame_size(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+ size_t ret = len;
-+ unsigned long flags;
-+ unsigned int size;
-+
-+ if (len && buf[len - 1] == '\n')
-+ len--;
-+
-+ if (get_number(&buf, &len, &size, MIN_FRAME_SIZE, MAX_FRAME_SIZE))
-+ return -EINVAL;
-+ if (len || size % 8 > 1)
-+ return -EINVAL;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+ if (port->mode != MODE_RAW && port->mode != MODE_G704)
-+ ret = -EINVAL;
-+ else if (!port->chan_open_count && !port->hdlc_open)
-+ ret = -EBUSY;
-+ else {
-+ port->frame_size = size;
-+ port->frame_sync_offset = 0;
-+ }
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return ret;
-+}
-+
-+static ssize_t show_frame_offset(struct device *dev,
-+ struct device_attribute *attr, char *buf)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+
-+ sprintf(buf, "%u\n", port->frame_sync_offset);
-+ return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_frame_offset(struct device *dev,
-+ struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+ size_t orig_len = len;
-+ unsigned long flags;
-+ unsigned int offset;
-+
-+ if (len && buf[len - 1] == '\n')
-+ len--;
-+
-+ if (get_number(&buf, &len, &offset, 0, port->frame_size - 1))
-+ return -EINVAL;
-+ if (len)
-+ return -EINVAL;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ port->frame_sync_offset = offset;
-+ if (port->chan_open_count || port->hdlc_open) {
-+ hss_config_set_rx_frame(port);
-+ hss_config_load(port);
-+ }
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return orig_len;
-+}
-+
-+static ssize_t show_loopback(struct device *dev, struct device_attribute *attr,
-+ char *buf)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+
-+ sprintf(buf, "%u\n", port->loopback);
-+ return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_loopback(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+ size_t orig_len = len;
-+ unsigned long flags;
-+ unsigned int lb;
-+
-+ if (len && buf[len - 1] == '\n')
-+ len--;
-+
-+ if (get_number(&buf, &len, &lb, 0, 1))
-+ return -EINVAL;
-+ if (len)
-+ return -EINVAL;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (port->loopback != lb) {
-+ port->loopback = lb;
-+ if (port->chan_open_count || port->hdlc_open) {
-+ hss_config_set_core(port);
-+ hss_config_load(port);
-+ }
-+ if (port->loopback || port->carrier)
-+ netif_carrier_on(port->netdev);
-+ else
-+ netif_carrier_off(port->netdev);
-+ }
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return orig_len;
-+}
-+
-+static ssize_t show_mode(struct device *dev, struct device_attribute *attr,
-+ char *buf)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+
-+ switch(port->mode) {
-+ case MODE_RAW:
-+ strcpy(buf, "raw\n");
-+ break;
-+ case MODE_G704:
-+ strcpy(buf, "g704\n");
-+ break;
-+ default:
-+ strcpy(buf, "hdlc\n");
-+ break;
-+ }
-+ return strlen(buf) + 1;
-+}
-+
-+static ssize_t set_mode(struct device *dev, struct device_attribute *attr,
-+ const char *buf, size_t len)
-+{
-+ struct port *port = dev_get_drvdata(dev);
-+ size_t ret = len;
-+ unsigned long flags;
-+
-+ if (len && buf[len - 1] == '\n')
-+ len--;
-+
-+ spin_lock_irqsave(&npe_lock, flags);
-+
-+ if (port->chan_open_count || port->hdlc_open) {
-+ ret = -EBUSY;
-+ } else if (len == 4 && !memcmp(buf, "hdlc", 4))
-+ port->mode = MODE_HDLC;
-+ else if (len == 3 && !memcmp(buf, "raw", 3))
-+ port->mode = MODE_RAW;
-+ else if (len == 4 && !memcmp(buf, "g704", 4))
-+ port->mode = MODE_G704;
-+ else
-+ ret = -EINVAL;
-+
-+ spin_unlock_irqrestore(&npe_lock, flags);
-+ return ret;
-+}
-+
-+static struct device_attribute hss_attrs[] = {
-+ __ATTR(create_chan, 0200, NULL, create_chan),
-+ __ATTR(hdlc_chan, 0644, show_hdlc_chan, set_hdlc_chan),
-+ __ATTR(clock_type, 0644, show_clock_type, set_clock_type),
-+ __ATTR(clock_rate, 0644, show_clock_rate, set_clock_rate),
-+ __ATTR(frame_size, 0644, show_frame_size, set_frame_size),
-+ __ATTR(frame_offset, 0644, show_frame_offset, set_frame_offset),
-+ __ATTR(loopback, 0644, show_loopback, set_loopback),
-+ __ATTR(mode, 0644, show_mode, set_mode),
-+};
-+
-+/*****************************************************************************
-+ * initialization
-+ ****************************************************************************/
-+
-+static int __devinit hss_init_one(struct platform_device *pdev)
-+{
-+ struct port *port;
-+ struct net_device *dev;
-+ hdlc_device *hdlc;
-+ int i, err;
-+
-+ if ((port = kzalloc(sizeof(*port), GFP_KERNEL)) == NULL)
-+ return -ENOMEM;
-+ platform_set_drvdata(pdev, port);
-+ port->id = pdev->id;
-+
-+ if ((port->npe = npe_request(0)) == NULL) {
-+ err = -ENOSYS;
-+ goto err_free;
-+ }
-+
-+ port->dev = &pdev->dev;
-+ port->plat = pdev->dev.platform_data;
-+ if ((port->netdev = dev = alloc_hdlcdev(port)) == NULL) {
-+ err = -ENOMEM;
-+ goto err_plat;
-+ }
-+
-+ SET_NETDEV_DEV(dev, &pdev->dev);
-+ hdlc = dev_to_hdlc(dev);
-+ hdlc->attach = hss_hdlc_attach;
-+ hdlc->xmit = hss_hdlc_xmit;
-+ dev->open = hss_hdlc_open;
-+ dev->stop = hss_hdlc_close;
-+ dev->do_ioctl = hss_hdlc_ioctl;
-+ dev->tx_queue_len = 100;
-+ port->clock_type = CLOCK_EXT;
-+ port->clock_rate = 2048000;
-+ port->frame_size = 256; /* E1 */
-+ memset(port->channels, CHANNEL_UNUSED, sizeof(port->channels));
-+ init_waitqueue_head(&port->chan_tx_waitq);
-+ init_waitqueue_head(&port->chan_rx_waitq);
-+ netif_napi_add(dev, &port->napi, hss_hdlc_poll, NAPI_WEIGHT);
-+
-+ if ((err = register_hdlc_device(dev))) /* HDLC mode by default */
-+ goto err_free_netdev;
-+
-+ for (i = 0; i < ARRAY_SIZE(hss_attrs); i++)
-+ BUG_ON(device_create_file(port->dev, &hss_attrs[i]));
-+
-+ printk(KERN_INFO "%s: HSS-%i\n", dev->name, port->id);
-+ return 0;
-+
-+err_free_netdev:
-+ free_netdev(dev);
-+err_plat:
-+ npe_release(port->npe);
-+ platform_set_drvdata(pdev, NULL);
-+err_free:
-+ kfree(port);
-+ return err;
-+}
-+
-+static int __devexit hss_remove_one(struct platform_device *pdev)
-+{
-+ struct port *port = platform_get_drvdata(pdev);
-+ int i;
-+
-+ for (i = 0; i < ARRAY_SIZE(hss_attrs); i++)
-+ device_remove_file(port->dev, &hss_attrs[i]);
-+
-+ unregister_hdlc_device(port->netdev);
-+ free_netdev(port->netdev);
-+ npe_release(port->npe);
-+ platform_set_drvdata(pdev, NULL);
-+ kfree(port);
-+ return 0;
-+}
-+
-+static struct platform_driver drv = {
-+ .driver.name = DRV_NAME,
-+ .probe = hss_init_one,
-+ .remove = hss_remove_one,
-+};
-+
-+static int __init hss_init_module(void)
-+{
-+ int err;
-+ dev_t rdev;
-+
-+ if ((ixp4xx_read_feature_bits() &
-+ (IXP4XX_FEATURE_HDLC | IXP4XX_FEATURE_HSS)) !=
-+ (IXP4XX_FEATURE_HDLC | IXP4XX_FEATURE_HSS))
-+ return -ENOSYS;
-+
-+ if ((err = alloc_chrdev_region(&rdev, 0, HSS_COUNT * MAX_CHAN_DEVICES,
-+ "hss")))
-+ return err;
-+
-+ spin_lock_init(&npe_lock);
-+
-+ if (IS_ERR(hss_class = class_create(THIS_MODULE, "hss"))) {
-+ printk(KERN_ERR "Can't register device class 'hss'\n");
-+ err = PTR_ERR(hss_class);
-+ goto free_chrdev;
-+ }
-+ if ((err = platform_driver_register(&drv)))
-+ goto destroy_class;
-+
-+ chan_major = MAJOR(rdev);
-+ return 0;
-+
-+destroy_class:
-+ class_destroy(hss_class);
-+free_chrdev:
-+ unregister_chrdev_region(MKDEV(chan_major, 0),
-+ HSS_COUNT * MAX_CHAN_DEVICES);
-+ return err;
-+}
-+
-+static void __exit hss_cleanup_module(void)
-+{
-+ platform_driver_unregister(&drv);
-+ class_destroy(hss_class);
-+ unregister_chrdev_region(MKDEV(chan_major, 0),
-+ HSS_COUNT * MAX_CHAN_DEVICES);
-+}
-+
-+MODULE_AUTHOR("Krzysztof Halasa");
-+MODULE_DESCRIPTION("Intel IXP4xx HSS driver");
-+MODULE_LICENSE("GPL v2");
-+MODULE_ALIAS("platform:ixp4xx_hss");
-+module_init(hss_init_module);
-+module_exit(hss_cleanup_module);
+++ /dev/null
---- a/drivers/i2c/chips/eeprom.c
-+++ b/drivers/i2c/chips/eeprom.c
-@@ -33,6 +33,8 @@
- #include <linux/jiffies.h>
- #include <linux/i2c.h>
- #include <linux/mutex.h>
-+#include <linux/notifier.h>
-+#include <linux/eeprom.h>
-
- /* Addresses to scan */
- static const unsigned short normal_i2c[] = { 0x50, 0x51, 0x52, 0x53, 0x54,
-@@ -41,26 +43,7 @@
- /* Insmod parameters */
- I2C_CLIENT_INSMOD_1(eeprom);
-
--
--/* Size of EEPROM in bytes */
--#define EEPROM_SIZE 256
--
--/* possible types of eeprom devices */
--enum eeprom_nature {
-- UNKNOWN,
-- VAIO,
--};
--
--/* Each client has this additional data */
--struct eeprom_data {
-- struct i2c_client client;
-- struct mutex update_lock;
-- u8 valid; /* bitfield, bit!=0 if slice is valid */
-- unsigned long last_updated[8]; /* In jiffies, 8 slices */
-- u8 data[EEPROM_SIZE]; /* Register values */
-- enum eeprom_nature nature;
--};
--
-+ATOMIC_NOTIFIER_HEAD(eeprom_chain);
-
- static int eeprom_attach_adapter(struct i2c_adapter *adapter);
- static int eeprom_detect(struct i2c_adapter *adapter, int address, int kind);
-@@ -197,6 +180,7 @@
- data->valid = 0;
- mutex_init(&data->update_lock);
- data->nature = UNKNOWN;
-+ data->attr = &eeprom_attr;
-
- /* Tell the I2C layer a new client has arrived */
- if ((err = i2c_attach_client(new_client)))
-@@ -224,6 +208,9 @@
- if (err)
- goto exit_detach;
-
-+ /* call the notifier chain */
-+ atomic_notifier_call_chain(&eeprom_chain, EEPROM_REGISTER, data);
-+
- return 0;
-
- exit_detach:
-@@ -249,6 +236,41 @@
- return 0;
- }
-
-+/**
-+ * register_eeprom_notifier - register a 'user' of EEPROM devices.
-+ * @nb: pointer to notifier info structure
-+ *
-+ * Registers a callback function to be called upon detection
-+ * of an EEPROM device. Detection invokes the 'add' callback
-+ * with the kobj of the mutex and a bin_attribute which allows
-+ * read from the EEPROM. The intention is that the notifier
-+ * will be able to read system configuration from the notifier.
-+ *
-+ * Only EEPROMs detected *after* the addition of the notifier
-+ * are notified. I.e. EEPROMs already known to the system
-+ * will not be notified - add the notifier from board level
-+ * code!
-+ */
-+int register_eeprom_notifier(struct notifier_block *nb)
-+{
-+ return atomic_notifier_chain_register(&eeprom_chain, nb);
-+}
-+
-+/**
-+ * unregister_eeprom_notifier - unregister a 'user' of EEPROM devices.
-+ * @old: pointer to notifier info structure
-+ *
-+ * Removes a callback function from the list of 'users' to be
-+ * notified upon detection of EEPROM devices.
-+ */
-+int unregister_eeprom_notifier(struct notifier_block *nb)
-+{
-+ return atomic_notifier_chain_unregister(&eeprom_chain, nb);
-+}
-+
-+EXPORT_SYMBOL_GPL(register_eeprom_notifier);
-+EXPORT_SYMBOL_GPL(unregister_eeprom_notifier);
-+
- static int __init eeprom_init(void)
- {
- return i2c_add_driver(&eeprom_driver);
---- /dev/null
-+++ b/include/linux/eeprom.h
-@@ -0,0 +1,71 @@
-+#ifndef _LINUX_EEPROM_H
-+#define _LINUX_EEPROM_H
-+/*
-+ * EEPROM notifier header
-+ *
-+ * Copyright (C) 2006 John Bowler
-+ */
-+
-+/*
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ * This program is distributed in the hope that it will be useful,
-+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
-+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
-+ * GNU General Public License for more details.
-+ *
-+ * You should have received a copy of the GNU General Public License
-+ * along with this program; if not, write to the Free Software
-+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
-+ */
-+
-+#ifndef __KERNEL__
-+#error This is a kernel header
-+#endif
-+
-+#include <linux/list.h>
-+#include <linux/kobject.h>
-+#include <linux/sysfs.h>
-+
-+/* Size of EEPROM in bytes */
-+#define EEPROM_SIZE 256
-+
-+/* possible types of eeprom devices */
-+enum eeprom_nature {
-+ UNKNOWN,
-+ VAIO,
-+};
-+
-+/* Each client has this additional data */
-+struct eeprom_data {
-+ struct i2c_client client;
-+ struct mutex update_lock;
-+ u8 valid; /* bitfield, bit!=0 if slice is valid */
-+ unsigned long last_updated[8]; /* In jiffies, 8 slices */
-+ u8 data[EEPROM_SIZE]; /* Register values */
-+ enum eeprom_nature nature;
-+ struct bin_attribute *attr;
-+};
-+
-+/*
-+ * This is very basic.
-+ *
-+ * If an EEPROM is detected on the I2C bus (this only works for
-+ * I2C EEPROMs) the notifier chain is called with
-+ * both the I2C information and the kobject for the sysfs
-+ * device which has been registers. It is then possible to
-+ * read from the device via the bin_attribute::read method
-+ * to extract configuration information.
-+ *
-+ * Register the notifier in the board level code, there is no
-+ * need to unregister it but you can if you want (it will save
-+ * a little bit or kernel memory to do so).
-+ */
-+
-+extern int register_eeprom_notifier(struct notifier_block *nb);
-+extern int unregister_eeprom_notifier(struct notifier_block *nb);
-+
-+#endif /* _LINUX_EEPROM_H */
---- a/include/linux/notifier.h
-+++ b/include/linux/notifier.h
-@@ -248,5 +248,8 @@
- #define VT_WRITE 0x0003 /* A char got output */
- #define VT_UPDATE 0x0004 /* A bigger update occurred */
-
-+/* eeprom notifier chain */
-+#define EEPROM_REGISTER 0x0001
-+
- #endif /* __KERNEL__ */
- #endif /* _LINUX_NOTIFIER_H */
+++ /dev/null
---- a/drivers/leds/Kconfig
-+++ b/drivers/leds/Kconfig
-@@ -125,6 +125,12 @@
- outputs. To be useful the particular board must have LEDs
- and they must be connected to the GPIO lines.
-
-+config LEDS_LATCH
-+ tristate "LED Support for Memory Latched LEDs"
-+ depends on LEDS_CLASS
-+ help
-+ -- To Do --
-+
- config LEDS_CM_X270
- tristate "LED Support for the CM-X270 LEDs"
- depends on LEDS_CLASS && MACH_ARMCORE
---- /dev/null
-+++ b/drivers/leds/leds-latch.c
-@@ -0,0 +1,141 @@
-+/*
-+ * LEDs driver for Memory Latched Devices
-+ *
-+ * Copyright (C) 2008 Gateworks Corp.
-+ * Chris Lang <clang@gateworks.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License version 2 as
-+ * published by the Free Software Foundation.
-+ *
-+ */
-+#include <linux/kernel.h>
-+#include <linux/init.h>
-+#include <linux/platform_device.h>
-+#include <linux/leds.h>
-+#include <linux/workqueue.h>
-+#include <asm/io.h>
-+#include <linux/spinlock.h>
-+
-+static unsigned int mem_keep = 0xFF;
-+static spinlock_t mem_lock;
-+static unsigned char *iobase;
-+
-+struct latch_led_data {
-+ struct led_classdev cdev;
-+ struct work_struct work;
-+ u8 new_level;
-+ u8 bit;
-+};
-+
-+static void latch_led_set(struct led_classdev *led_cdev,
-+ enum led_brightness value)
-+{
-+ struct latch_led_data *led_dat =
-+ container_of(led_cdev, struct latch_led_data, cdev);
-+
-+ spin_lock(mem_lock);
-+
-+ if (value == LED_OFF)
-+ mem_keep |= (0x1 << led_dat->bit);
-+ else
-+ mem_keep &= ~(0x1 << led_dat->bit);
-+
-+ writeb(mem_keep, iobase);
-+
-+ spin_unlock(mem_lock);
-+}
-+
-+static int latch_led_probe(struct platform_device *pdev)
-+{
-+ struct latch_led_platform_data *pdata = pdev->dev.platform_data;
-+ struct latch_led *cur_led;
-+ struct latch_led_data *leds_data, *led_dat;
-+ int i, ret = 0;
-+
-+ if (!pdata)
-+ return -EBUSY;
-+
-+ leds_data = kzalloc(sizeof(struct latch_led_data) * pdata->num_leds,
-+ GFP_KERNEL);
-+ if (!leds_data)
-+ return -ENOMEM;
-+
-+ iobase = ioremap_nocache(pdata->mem, 0x1000);
-+ writeb(0xFF, iobase);
-+
-+ for (i = 0; i < pdata->num_leds; i++) {
-+ cur_led = &pdata->leds[i];
-+ led_dat = &leds_data[i];
-+
-+ led_dat->cdev.name = cur_led->name;
-+ led_dat->cdev.default_trigger = cur_led->default_trigger;
-+ led_dat->cdev.brightness_set = latch_led_set;
-+ led_dat->cdev.brightness = LED_OFF;
-+ led_dat->bit = cur_led->bit;
-+
-+ ret = led_classdev_register(&pdev->dev, &led_dat->cdev);
-+ if (ret < 0) {
-+ goto err;
-+ }
-+ }
-+
-+ platform_set_drvdata(pdev, leds_data);
-+
-+ return 0;
-+
-+err:
-+ if (i > 0) {
-+ for (i = i - 1; i >= 0; i--) {
-+ led_classdev_unregister(&leds_data[i].cdev);
-+ }
-+ }
-+
-+ kfree(leds_data);
-+
-+ return ret;
-+}
-+
-+static int __devexit latch_led_remove(struct platform_device *pdev)
-+{
-+ int i;
-+ struct latch_led_platform_data *pdata = pdev->dev.platform_data;
-+ struct latch_led_data *leds_data;
-+
-+ leds_data = platform_get_drvdata(pdev);
-+
-+ for (i = 0; i < pdata->num_leds; i++) {
-+ led_classdev_unregister(&leds_data[i].cdev);
-+ cancel_work_sync(&leds_data[i].work);
-+ }
-+
-+ kfree(leds_data);
-+
-+ return 0;
-+}
-+
-+static struct platform_driver latch_led_driver = {
-+ .probe = latch_led_probe,
-+ .remove = __devexit_p(latch_led_remove),
-+ .driver = {
-+ .name = "leds-latch",
-+ .owner = THIS_MODULE,
-+ },
-+};
-+
-+static int __init latch_led_init(void)
-+{
-+ return platform_driver_register(&latch_led_driver);
-+}
-+
-+static void __exit latch_led_exit(void)
-+{
-+ platform_driver_unregister(&latch_led_driver);
-+}
-+
-+module_init(latch_led_init);
-+module_exit(latch_led_exit);
-+
-+MODULE_AUTHOR("Chris Lang <clang@gateworks.com>");
-+MODULE_DESCRIPTION("Latch LED driver");
-+MODULE_LICENSE("GPL");
---- a/drivers/leds/Makefile
-+++ b/drivers/leds/Makefile
-@@ -19,6 +19,7 @@
- obj-$(CONFIG_LEDS_COBALT_QUBE) += leds-cobalt-qube.o
- obj-$(CONFIG_LEDS_COBALT_RAQ) += leds-cobalt-raq.o
- obj-$(CONFIG_LEDS_GPIO) += leds-gpio.o
-+obj-$(CONFIG_LEDS_LATCH) += leds-latch.o
- obj-$(CONFIG_LEDS_CM_X270) += leds-cm-x270.o
- obj-$(CONFIG_LEDS_CLEVO_MAIL) += leds-clevo-mail.o
- obj-$(CONFIG_LEDS_HP6XX) += leds-hp6xx.o
---- a/include/linux/leds.h
-+++ b/include/linux/leds.h
-@@ -136,5 +136,18 @@
- struct gpio_led *leds;
- };
-
-+/* For the leds-latch driver */
-+struct latch_led {
-+ const char *name;
-+ char *default_trigger;
-+ unsigned bit;
-+};
-+
-+struct latch_led_platform_data {
-+ int num_leds;
-+ u32 mem;
-+ struct latch_led *leds;
-+};
-+
-
- #endif /* __LINUX_LEDS_H_INCLUDED */
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -132,6 +132,31 @@
- .resource = avila_pata_resources,
- };
-
-+/* Built-in 10/100 Ethernet MAC interfaces */
-+static struct eth_plat_info avila_npeb_data = {
-+ .phy = 0,
-+ .rxq = 3,
-+ .txreadyq = 20,
-+};
-+
-+static struct eth_plat_info avila_npec_data = {
-+ .phy = 1,
-+ .rxq = 4,
-+ .txreadyq = 21,
-+};
-+
-+static struct platform_device avila_npeb_device = {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = &avila_npeb_data,
-+};
-+
-+static struct platform_device avila_npec_device = {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = &avila_npec_data,
-+};
-+
- static struct platform_device *avila_devices[] __initdata = {
- &avila_i2c_gpio,
- &avila_flash,
-@@ -159,6 +184,8 @@
-
- platform_device_register(&avila_pata);
-
-+ platform_device_register(avila_npeb_device);
-+ platform_device_register(avila_npec_device);
- }
-
- MACHINE_START(AVILA, "Gateworks Avila Network Platform")
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -14,10 +14,18 @@
- #include <linux/kernel.h>
- #include <linux/init.h>
- #include <linux/device.h>
-+#include <linux/if_ether.h>
-+#include <linux/socket.h>
-+#include <linux/netdevice.h>
- #include <linux/serial.h>
- #include <linux/tty.h>
- #include <linux/serial_8250.h>
- #include <linux/slab.h>
-+#ifdef CONFIG_SENSORS_EEPROM
-+# include <linux/i2c.h>
-+# include <linux/eeprom.h>
-+#endif
-+
- #include <linux/i2c-gpio.h>
-
- #include <asm/types.h>
-@@ -29,6 +37,13 @@
- #include <asm/mach/arch.h>
- #include <asm/mach/flash.h>
-
-+struct avila_board_info {
-+ unsigned char *model;
-+ void (* setup)(void);
-+};
-+
-+static struct avila_board_info *avila_info __initdata;
-+
- static struct flash_platform_data avila_flash_data = {
- .map_name = "cfi_probe",
- .width = 2,
-@@ -163,10 +178,160 @@
- &avila_uart
- };
-
-+static void __init avila_gw23xx_setup(void)
-+{
-+ platform_device_register(&avila_npeb_device);
-+ platform_device_register(&avila_npec_device);
-+}
-+
-+#ifdef CONFIG_SENSORS_EEPROM
-+static void __init avila_gw2342_setup(void)
-+{
-+ platform_device_register(&avila_npeb_device);
-+ platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2345_setup(void)
-+{
-+ avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR;
-+ avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */
-+ platform_device_register(&avila_npeb_device);
-+
-+ avila_npec_data.phy = 5; /* port 5 of the KS8995 switch */
-+ platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2347_setup(void)
-+{
-+ platform_device_register(&avila_npeb_device);
-+}
-+
-+static void __init avila_gw2348_setup(void)
-+{
-+ platform_device_register(&avila_npeb_device);
-+ platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2353_setup(void)
-+{
-+ platform_device_register(&avila_npeb_device);
-+}
-+
-+static void __init avila_gw2355_setup(void)
-+{
-+ avila_npeb_data.phy = IXP4XX_ETH_PHY_MAX_ADDR;
-+ avila_npeb_data.phy_mask = 0x1e; /* ports 1-4 of the KS8995 switch */
-+ platform_device_register(&avila_npeb_device);
-+
-+ avila_npec_data.phy = 16;
-+ platform_device_register(&avila_npec_device);
-+}
-+
-+static void __init avila_gw2357_setup(void)
-+{
-+ platform_device_register(&avila_npeb_device);
-+}
-+
-+static struct avila_board_info avila_boards[] __initdata = {
-+ {
-+ .model = "GW2342",
-+ .setup = avila_gw2342_setup,
-+ }, {
-+ .model = "GW2345",
-+ .setup = avila_gw2345_setup,
-+ }, {
-+ .model = "GW2347",
-+ .setup = avila_gw2347_setup,
-+ }, {
-+ .model = "GW2348",
-+ .setup = avila_gw2348_setup,
-+ }, {
-+ .model = "GW2353",
-+ .setup = avila_gw2353_setup,
-+ }, {
-+ .model = "GW2355",
-+ .setup = avila_gw2355_setup,
-+ }, {
-+ .model = "GW2357",
-+ .setup = avila_gw2357_setup,
-+ }
-+};
-+
-+static struct avila_board_info * __init avila_find_board_info(char *model)
-+{
-+ int i;
-+
-+ for (i = 0; i < ARRAY_SIZE(avila_boards); i++) {
-+ struct avila_board_info *info = &avila_boards[i];
-+ if (strncmp(info->model, model, strlen(info->model)) == 0)
-+ return info;
-+ }
-+
-+ return NULL;
-+}
-+
-+struct avila_eeprom_header {
-+ unsigned char mac0[ETH_ALEN];
-+ unsigned char mac1[ETH_ALEN];
-+ unsigned char res0[4];
-+ unsigned char magic[2];
-+ unsigned char config[14];
-+ unsigned char model[16];
-+};
-+
-+static int __init avila_eeprom_notify(struct notifier_block *self,
-+ unsigned long event, void *t)
-+{
-+ struct eeprom_data *ee = t;
-+ struct avila_eeprom_header hdr;
-+
-+ if (avila_info)
-+ return NOTIFY_DONE;
-+
-+ /* The eeprom is at address 0x51 */
-+ if (event != EEPROM_REGISTER || ee->client.addr != 0x51)
-+ return NOTIFY_DONE;
-+
-+ ee->attr->read(&ee->client.dev.kobj, ee->attr, (char *)&hdr,
-+ 0, sizeof(hdr));
-+
-+ if (hdr.magic[0] != 'G' || hdr.magic[1] != 'W')
-+ return NOTIFY_DONE;
-+
-+ memcpy(&avila_npeb_data.hwaddr, hdr.mac0, ETH_ALEN);
-+ memcpy(&avila_npec_data.hwaddr, hdr.mac1, ETH_ALEN);
-+
-+ avila_info = avila_find_board_info(hdr.model);
-+
-+ return NOTIFY_OK;
-+}
-+
-+static struct notifier_block avila_eeprom_notifier __initdata = {
-+ .notifier_call = avila_eeprom_notify
-+};
-+
-+static void __init avila_register_eeprom_notifier(void)
-+{
-+ register_eeprom_notifier(&avila_eeprom_notifier);
-+}
-+
-+static void __init avila_unregister_eeprom_notifier(void)
-+{
-+ unregister_eeprom_notifier(&avila_eeprom_notifier);
-+}
-+#else /* CONFIG_SENSORS_EEPROM */
-+static inline void avila_register_eeprom_notifier(void) {};
-+static inline void avila_unregister_eeprom_notifier(void) {};
-+#endif /* CONFIG_SENSORS_EEPROM */
-+
- static void __init avila_init(void)
- {
- ixp4xx_sys_init();
-
-+ /*
-+ * These devices are present on all Avila models and don't need any
-+ * model specific setup.
-+ */
- avila_flash_resource.start = IXP4XX_EXP_BUS_BASE(0);
- avila_flash_resource.end =
- IXP4XX_EXP_BUS_BASE(0) + ixp4xx_exp_bus_size - 1;
-@@ -184,9 +349,28 @@
-
- platform_device_register(&avila_pata);
-
-- platform_device_register(avila_npeb_device);
-- platform_device_register(avila_npec_device);
-+ avila_register_eeprom_notifier();
-+}
-+
-+static int __init avila_model_setup(void)
-+{
-+ if (!machine_is_avila())
-+ return 0;
-+
-+ if (avila_info) {
-+ printk(KERN_DEBUG "Running on Gateworks Avila %s\n",
-+ avila_info->model);
-+ avila_info->setup();
-+ } else {
-+ printk(KERN_INFO "Unknown/missing Avila model number"
-+ " -- defaults will be used\n");
-+ avila_gw23xx_setup();
-+ }
-+
-+ avila_unregister_eeprom_notifier();
-+ return 0;
- }
-+late_initcall(avila_model_setup);
-
- MACHINE_START(AVILA, "Gateworks Avila Network Platform")
- /* Maintainer: Deepak Saxena <dsaxena@plexity.net> */
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -26,6 +26,7 @@
- # include <linux/eeprom.h>
- #endif
-
-+#include <linux/leds.h>
- #include <linux/i2c-gpio.h>
-
- #include <asm/types.h>
-@@ -172,6 +173,72 @@
- .dev.platform_data = &avila_npec_data,
- };
-
-+static struct gpio_led avila_gpio_leds[] = {
-+ {
-+ .name = "user", /* green led */
-+ .gpio = AVILA_GW23XX_LED_USER_GPIO,
-+ .active_low = 1,
-+ }
-+};
-+
-+static struct gpio_led_platform_data avila_gpio_leds_data = {
-+ .num_leds = 1,
-+ .leds = avila_gpio_leds,
-+};
-+
-+static struct platform_device avila_gpio_leds_device = {
-+ .name = "leds-gpio",
-+ .id = -1,
-+ .dev.platform_data = &avila_gpio_leds_data,
-+};
-+
-+static struct latch_led avila_latch_leds[] = {
-+ {
-+ .name = "led0", /* green led */
-+ .bit = 0,
-+ },
-+ {
-+ .name = "led1", /* green led */
-+ .bit = 1,
-+ },
-+ {
-+ .name = "led2", /* green led */
-+ .bit = 2,
-+ },
-+ {
-+ .name = "led3", /* green led */
-+ .bit = 3,
-+ },
-+ {
-+ .name = "led4", /* green led */
-+ .bit = 4,
-+ },
-+ {
-+ .name = "led5", /* green led */
-+ .bit = 5,
-+ },
-+ {
-+ .name = "led6", /* green led */
-+ .bit = 6,
-+ },
-+ {
-+ .name = "led7", /* green led */
-+ .bit = 7,
-+ }
-+};
-+
-+static struct latch_led_platform_data avila_latch_leds_data = {
-+ .num_leds = 8,
-+ .leds = avila_latch_leds,
-+ .mem = 0x51000000,
-+};
-+
-+static struct platform_device avila_latch_leds_device = {
-+ .name = "leds-latch",
-+ .id = -1,
-+ .dev.platform_data = &avila_latch_leds_data,
-+};
-+
- static struct platform_device *avila_devices[] __initdata = {
- &avila_i2c_gpio,
- &avila_flash,
-@@ -182,6 +249,8 @@
- {
- platform_device_register(&avila_npeb_device);
- platform_device_register(&avila_npec_device);
-+
-+ platform_device_register(&avila_gpio_leds_device);
- }
-
- #ifdef CONFIG_SENSORS_EEPROM
-@@ -189,6 +258,8 @@
- {
- platform_device_register(&avila_npeb_device);
- platform_device_register(&avila_npec_device);
-+
-+ platform_device_register(&avila_gpio_leds_device);
- }
-
- static void __init avila_gw2345_setup(void)
-@@ -199,22 +270,30 @@
-
- avila_npec_data.phy = 5; /* port 5 of the KS8995 switch */
- platform_device_register(&avila_npec_device);
-+
-+ platform_device_register(&avila_gpio_leds_device);
- }
-
- static void __init avila_gw2347_setup(void)
- {
- platform_device_register(&avila_npeb_device);
-+
-+ avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
-+ platform_device_register(&avila_gpio_leds_device);
- }
-
- static void __init avila_gw2348_setup(void)
- {
- platform_device_register(&avila_npeb_device);
- platform_device_register(&avila_npec_device);
-+
-+ platform_device_register(&avila_gpio_leds_device);
- }
-
- static void __init avila_gw2353_setup(void)
- {
- platform_device_register(&avila_npeb_device);
-+ platform_device_register(&avila_gpio_leds_device);
- }
-
- static void __init avila_gw2355_setup(void)
-@@ -225,11 +304,29 @@
-
- avila_npec_data.phy = 16;
- platform_device_register(&avila_npec_device);
-+
-+ platform_device_register(&avila_gpio_leds_device);
-+
-+ *IXP4XX_EXP_CS4 |= 0xbfff3c03;
-+ avila_latch_leds[0].name = "RXD";
-+ avila_latch_leds[1].name = "TXD";
-+ avila_latch_leds[2].name = "POL";
-+ avila_latch_leds[3].name = "LNK";
-+ avila_latch_leds[4].name = "ERR";
-+ avila_latch_leds_data.num_leds = 5;
-+ avila_latch_leds_data.mem = 0x54000000;
-+ platform_device_register(&avila_latch_leds_device);
- }
-
- static void __init avila_gw2357_setup(void)
- {
- platform_device_register(&avila_npeb_device);
-+
-+ avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
-+ platform_device_register(&avila_gpio_leds_device);
-+
-+ *IXP4XX_EXP_CS1 |= 0xbfff3c03;
-+ platform_device_register(&avila_latch_leds_device);
- }
-
- static struct avila_board_info avila_boards[] __initdata = {
---- a/include/asm-arm/arch-ixp4xx/avila.h
-+++ b/include/asm-arm/arch-ixp4xx/avila.h
-@@ -36,4 +36,6 @@
- #define AVILA_PCI_INTC_PIN 9
- #define AVILA_PCI_INTD_PIN 8
-
--
-+/* User LEDs */
-+#define AVILA_GW23XX_LED_USER_GPIO 3
-+#define AVILA_GW23X7_LED_USER_GPIO 4
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -239,10 +239,28 @@
- .dev.platform_data = &avila_latch_leds_data,
- };
-
-+static struct resource avila_gpio_resources[] = {
-+ {
-+ .name = "gpio",
-+ /* FIXME: gpio mask should be model specific */
-+ .start = AVILA_GPIO_MASK,
-+ .end = AVILA_GPIO_MASK,
-+ .flags = 0,
-+ },
-+};
-+
-+static struct platform_device avila_gpio = {
-+ .name = "GPIODEV",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(avila_gpio_resources),
-+ .resource = avila_gpio_resources,
-+};
-+
- static struct platform_device *avila_devices[] __initdata = {
- &avila_i2c_gpio,
- &avila_flash,
-- &avila_uart
-+ &avila_uart,
-+ &avila_gpio,
- };
-
- static void __init avila_gw23xx_setup(void)
---- a/include/asm-arm/arch-ixp4xx/avila.h
-+++ b/include/asm-arm/arch-ixp4xx/avila.h
-@@ -39,3 +39,6 @@
- /* User LEDs */
- #define AVILA_GW23XX_LED_USER_GPIO 3
- #define AVILA_GW23X7_LED_USER_GPIO 4
-+
-+/* gpio mask used by platform device */
-+#define AVILA_GPIO_MASK (1 << 1) | (1 << 3) | (1 << 5) | (1 << 7) | (1 << 9)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/avila-setup.c
-+++ b/arch/arm/mach-ixp4xx/avila-setup.c
-@@ -294,6 +294,7 @@
-
- static void __init avila_gw2347_setup(void)
- {
-+ avila_npeb_data.quirks |= IXP4XX_ETH_QUIRK_GW23X7;
- platform_device_register(&avila_npeb_device);
-
- avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
-@@ -338,6 +339,7 @@
-
- static void __init avila_gw2357_setup(void)
- {
-+ avila_npeb_data.quirks |= IXP4XX_ETH_QUIRK_GW23X7;
- platform_device_register(&avila_npeb_device);
-
- avila_gpio_leds[0].gpio = AVILA_GW23X7_LED_USER_GPIO;
---- a/drivers/net/arm/ixp4xx_eth.c
-+++ b/drivers/net/arm/ixp4xx_eth.c
-@@ -348,6 +348,14 @@
- return;
- }
-
-+ if (port->plat->quirks & IXP4XX_ETH_QUIRK_GW23X7) {
-+ mdio_write(dev, 1, 0x19,
-+ (mdio_read(dev, 1, 0x19) & 0xfffe) | 0x8000);
-+
-+ printk(KERN_DEBUG "%s: phy_id of the DP83848 changed to 0\n",
-+ dev->name);
-+ }
-+
- /* restart auto negotiation */
- bmcr = mdio_read(dev, phy_id, MII_BMCR);
- bmcr |= (BMCR_ANENABLE | BMCR_ANRESTART);
---- a/include/asm-arm/arch-ixp4xx/platform.h
-+++ b/include/asm-arm/arch-ixp4xx/platform.h
-@@ -104,6 +104,8 @@
- u8 txreadyq;
- u8 hwaddr[6];
- u32 phy_mask;
-+ u32 quirks;
-+#define IXP4XX_ETH_QUIRK_GW23X7 0x00000001
- };
-
- /* Information about built-in HSS (synchronous serial) interfaces */
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-@@ -29,6 +29,8 @@
- #include <linux/serial_8250.h>
- #include <linux/slab.h>
-
-+#include <linux/spi/spi_gpio.h>
-+
- #include <asm/types.h>
- #include <asm/setup.h>
- #include <asm/memory.h>
-@@ -121,9 +123,41 @@
- .resource = >wx5715_flash_resource,
- };
-
-+static int gtwx5715_spi_boardinfo_setup(struct spi_board_info *bi,
-+ struct spi_master *master, void *data)
-+{
-+
-+ strlcpy(bi->modalias, "spi-ks8995", sizeof(bi->modalias));
-+
-+ bi->max_speed_hz = 5000000 /* Hz */;
-+ bi->bus_num = master->bus_num;
-+ bi->mode = SPI_MODE_0;
-+
-+ return 0;
-+}
-+
-+static struct spi_gpio_platform_data gtwx5715_spi_bus_data = {
-+ .pin_cs = GTWX5715_KSSPI_SELECT,
-+ .pin_clk = GTWX5715_KSSPI_CLOCK,
-+ .pin_miso = GTWX5715_KSSPI_RXD,
-+ .pin_mosi = GTWX5715_KSSPI_TXD,
-+ .cs_activelow = 1,
-+ .no_spi_delay = 1,
-+ .boardinfo_setup = gtwx5715_spi_boardinfo_setup,
-+};
-+
-+static struct platform_device gtwx5715_spi_bus = {
-+ .name = "spi-gpio",
-+ .id = 0,
-+ .dev = {
-+ .platform_data = >wx5715_spi_bus_data,
-+ },
-+};
-+
- static struct platform_device *gtwx5715_devices[] __initdata = {
- >wx5715_uart_device,
- >wx5715_flash,
-+ >wx5715_spi_bus,
- };
-
- static void __init gtwx5715_init(void)
+++ /dev/null
---- a/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-+++ b/arch/arm/mach-ixp4xx/gtwx5715-setup.c
-@@ -154,10 +154,37 @@
- },
- };
-
-+static struct eth_plat_info gtwx5715_npeb_data = {
-+ .phy = IXP4XX_ETH_PHY_MAX_ADDR,
-+ .phy_mask = 0x1e, /* ports 1-4 of the KS8995 switch */
-+ .rxq = 3,
-+ .txreadyq = 20,
-+};
-+
-+static struct eth_plat_info gtwx5715_npec_data = {
-+ .phy = 5, /* port 5 of the KS8995 switch */
-+ .rxq = 4,
-+ .txreadyq = 21,
-+};
-+
-+static struct platform_device gtwx5715_npeb_device = {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEB,
-+ .dev.platform_data = >wx5715_npeb_data,
-+};
-+
-+static struct platform_device gtwx5715_npec_device = {
-+ .name = "ixp4xx_eth",
-+ .id = IXP4XX_ETH_NPEC,
-+ .dev.platform_data = >wx5715_npec_data,
-+};
-+
- static struct platform_device *gtwx5715_devices[] __initdata = {
- >wx5715_uart_device,
- >wx5715_flash,
- >wx5715_spi_bus,
-+ >wx5715_npeb_device,
-+ >wx5715_npec_device,
- };
-
- static void __init gtwx5715_init(void)
+++ /dev/null
---- a/drivers/ata/pata_ixp4xx_cf.c
-+++ b/drivers/ata/pata_ixp4xx_cf.c
-@@ -24,17 +24,58 @@
- #include <scsi/scsi_host.h>
-
- #define DRV_NAME "pata_ixp4xx_cf"
--#define DRV_VERSION "0.2"
-+#define DRV_VERSION "0.3"
-
- static int ixp4xx_set_mode(struct ata_link *link, struct ata_device **error)
- {
- struct ata_device *dev;
-+ struct ixp4xx_pata_data *data = link->ap->host->dev->platform_data;
-+ unsigned int pio_mask;
-
- ata_link_for_each_dev(dev, link) {
-+ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
-+ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
-+ if (pio_mask & (1 << 1)){
-+ pio_mask = 4;
-+ }else{
-+ pio_mask = 3;
-+ }
-+ }else{
-+ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
-+ }
-+ switch (pio_mask){
-+ case 0:
-+ ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
-+ dev->pio_mode = XFER_PIO_0;
-+ dev->xfer_mode = XFER_PIO_0;
-+ *data->cs0_cfg = 0x8a473c03;
-+ break;
-+ case 1:
-+ ata_dev_printk(dev, KERN_INFO, "configured for PIO1\n");
-+ dev->pio_mode = XFER_PIO_1;
-+ dev->xfer_mode = XFER_PIO_1;
-+ *data->cs0_cfg = 0x86433c03;
-+ break;
-+ case 2:
-+ ata_dev_printk(dev, KERN_INFO, "configured for PIO2\n");
-+ dev->pio_mode = XFER_PIO_2;
-+ dev->xfer_mode = XFER_PIO_2;
-+ *data->cs0_cfg = 0x82413c03;
-+ break;
-+ case 3:
-+ ata_dev_printk(dev, KERN_INFO, "configured for PIO3\n");
-+ dev->pio_mode = XFER_PIO_3;
-+ dev->xfer_mode = XFER_PIO_3;
-+ *data->cs0_cfg = 0x80823c03;
-+ break;
-+ case 4:
-+ ata_dev_printk(dev, KERN_INFO, "configured for PIO4\n");
-+ dev->pio_mode = XFER_PIO_4;
-+ dev->xfer_mode = XFER_PIO_4;
-+ *data->cs0_cfg = 0x80403c03;
-+ break;
-+ }
- if (ata_dev_enabled(dev)) {
-- ata_dev_printk(dev, KERN_INFO, "configured for PIO0\n");
-- dev->pio_mode = XFER_PIO_0;
-- dev->xfer_mode = XFER_PIO_0;
- dev->xfer_shift = ATA_SHIFT_PIO;
- dev->flags |= ATA_DFLAG_PIO;
- }
-@@ -48,6 +89,7 @@
- unsigned int i;
- unsigned int words = buflen >> 1;
- u16 *buf16 = (u16 *) buf;
-+ unsigned int pio_mask;
- struct ata_port *ap = dev->link->ap;
- void __iomem *mmio = ap->ioaddr.data_addr;
- struct ixp4xx_pata_data *data = ap->host->dev->platform_data;
-@@ -55,8 +97,34 @@
- /* set the expansion bus in 16bit mode and restore
- * 8 bit mode after the transaction.
- */
-- *data->cs0_cfg &= ~(0x01);
-- udelay(100);
-+ if (dev->id[ATA_ID_FIELD_VALID] & (1 << 1)){
-+ pio_mask = dev->id[ATA_ID_PIO_MODES] & 0x03;
-+ if (pio_mask & (1 << 1)){
-+ pio_mask = 4;
-+ }else{
-+ pio_mask = 3;
-+ }
-+ }else{
-+ pio_mask = (dev->id[ATA_ID_OLD_PIO_MODES] >> 8);
-+ }
-+ switch (pio_mask){
-+ case 0:
-+ *data->cs0_cfg = 0xa9643c42;
-+ break;
-+ case 1:
-+ *data->cs0_cfg = 0x85033c42;
-+ break;
-+ case 2:
-+ *data->cs0_cfg = 0x80b23c42;
-+ break;
-+ case 3:
-+ *data->cs0_cfg = 0x80823c42;
-+ break;
-+ case 4:
-+ *data->cs0_cfg = 0x80403c42;
-+ break;
-+ }
-+ udelay(5);
-
- /* Transfer multiple of 2 bytes */
- if (rw == READ)
-@@ -81,8 +149,24 @@
- words++;
- }
-
-- udelay(100);
-- *data->cs0_cfg |= 0x01;
-+ udelay(5);
-+ switch (pio_mask){
-+ case 0:
-+ *data->cs0_cfg = 0x8a473c03;
-+ break;
-+ case 1:
-+ *data->cs0_cfg = 0x86433c03;
-+ break;
-+ case 2:
-+ *data->cs0_cfg = 0x82413c03;
-+ break;
-+ case 3:
-+ *data->cs0_cfg = 0x80823c03;
-+ break;
-+ case 4:
-+ *data->cs0_cfg = 0x80403c03;
-+ break;
-+ }
-
- return words << 1;
- }
+++ /dev/null
---- a/arch/arm/common/dmabounce.c
-+++ b/arch/arm/common/dmabounce.c
-@@ -117,6 +117,10 @@
- } else if (size <= device_info->large.size) {
- pool = &device_info->large;
- } else {
-+#ifdef CONFIG_DMABOUNCE_DEBUG
-+ printk(KERN_INFO "A dma bounce buffer outside the pool size was requested. Requested size was 0x%08X\nThe calling code was :\n", size);
-+ dump_stack();
-+#endif
- pool = NULL;
- }
-
---- a/arch/arm/mach-ixp4xx/Kconfig
-+++ b/arch/arm/mach-ixp4xx/Kconfig
-@@ -236,6 +236,11 @@
- default y
- depends on PCI
-
-+config DMABOUNCE_DEBUG
-+ bool "Enable DMABounce debuging"
-+ default n
-+ depends on DMABOUNCE
-+
- config IXP4XX_INDIRECT_PCI
- bool "Use indirect PCI memory access"
- depends on PCI
+++ /dev/null
---- a/include/asm-arm/arch-ixp4xx/avila.h
-+++ b/include/asm-arm/arch-ixp4xx/avila.h
-@@ -25,7 +25,7 @@
- /*
- * AVILA PCI IRQs
- */
--#define AVILA_PCI_MAX_DEV 4
-+#define AVILA_PCI_MAX_DEV 6
- #define LOFT_PCI_MAX_DEV 6
- #define AVILA_PCI_IRQ_LINES 4
-
projects / openwrt / staging / chunkeey.git / commitdiff