bl2-el3: Fix exit to bl32 by ensuring a more complete write to SPSR

Prior to entry into BL32 we set the SPSR by way of msr spsr, r1.
This unfortunately only writes the bits f->[31:24] and c->[7:0].

This patch updates the bl2 exit path to write the x->[15:8] and c->[7:0]
fields of the SPSR. For the purposes of initial setup of the SPSR the x and
c fields should be sufficient and importantly will capture the necessary
lower-order control bits that f:c alone do not.

This is important to do to ensure the SPSR is set to the mode the platform
intends prior to performing an eret.

Fixes: b1d27b484f41 ("bl2-el3: Add BL2_EL3 image")
Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>

diff --git a/bl2/aarch32/bl2_el3_entrypoint.S b/bl2/aarch32/bl2_el3_entrypoint.S
index 35da133f7fe4a34dd17e1d634fb3ebe9f0d116b1..9b4da6b136006e2abb9d17f1a5381fc9dd911088 100644 (file)
--- a/bl2/aarch32/bl2_el3_entrypoint.S
+++ b/bl2/aarch32/bl2_el3_entrypoint.S
@@ -78,7 +78,7 @@ func bl2_run_next_image
         */
        ldr     lr, [r8, #ENTRY_POINT_INFO_PC_OFFSET]
        ldr     r1, [r8, #(ENTRY_POINT_INFO_PC_OFFSET + 4)]
-       msr     spsr, r1
+       msr     spsr_xc, r1
 
        /* Some BL32 stages expect lr_svc to provide the BL33 entry address */
        cps     #MODE32_svc