if (pci_banned < ARRAYSIZE(pci_ban))
pci_ban[pci_banned++] = core;
}
-//#define CT4712_WR 1 /* Workaround for 4712 */
int __init
sbpci_init(void *sbh)
pci_config_regs *cfg;
void *regs;
char varname[8];
- int CT4712_WR;
uint wlidx = 0;
uint16 vendor, core;
uint8 class, subclass, progif;
return -1;
sb_core_reset(sbh, 0);
- /* In some board, */
- if(nvram_match("boardtype", "bcm94710dev") || nvram_match("boardtype", "bcm94710ap")|| nvram_match("boardtype", "bcm94710r4")|| nvram_match("boardtype", "bcm94710r4")|| nvram_match("boardtype", "bcm95365r"))
- CT4712_WR = 0;
- else
- CT4712_WR = 1;
-
boardflags = (uint32) getintvar(NULL, "boardflags");
if ((chip == BCM4310_DEVICE_ID) && (chiprev == 0))
* floating.
*/
if (((chip == BCM4712_DEVICE_ID) && (chippkg == BCM4712SMALL_PKG_ID)) ||
- (boardflags & BFL_NOPCI) || CT4712_WR)
+ (boardflags & BFL_NOPCI))
pci_disabled = TRUE;
/*
regs = (uint32 *)REG_MAP(SB_ENUM_BASE, SB_CORE_SIZE);
cid = R_REG((uint32 *)regs);
- if (((cid & CID_ID_MASK) == 0x4712) &&
+ if (((cid & (CID_ID_MASK | CID_PKG_MASK)) == 0x00104712) &&
((cid & CID_REV_MASK) <= 0x00020000)) {
uint32 *scc, val;