drm/i915: Sanitize the terminology used for TypeC port modes
authorImre Deak <imre.deak@intel.com>
Fri, 28 Jun 2019 14:36:16 +0000 (17:36 +0300)
committerImre Deak <imre.deak@intel.com>
Mon, 1 Jul 2019 11:49:40 +0000 (14:49 +0300)
The TypeC port mode can switch dynamically, to reflect that better call
the port's mode as 'mode' rather than 'type'.

While at it:
- s/TC_PORT_TBT/TC_PORT_TBT_ALT/ and s/TC_PORT_TYPEC/TC_PORT_DP_ALT/.
  'TYPEC' is ambiguous, TBT_ALT and DP_ALT better match the reality.

- Remove the 'unknown' TypeC port mode. The mode is always known, it's
  the TBT-alt/safe mode after HW reset and after disconnecting the PHY.
  Simplify the tc_port/tc_type checks accordingly.

- Don't WARN if the port mode changes, that can happen normally.

No functional changes.

Cc: Animesh Manna <animesh.manna@intel.com>
Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: Anusha Srivatsa <anusha.srivatsa@intel.com>
Cc: José Roberto de Souza <jose.souza@intel.com>
Cc: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190628143635.22066-5-imre.deak@intel.com
drivers/gpu/drm/i915/display/intel_ddi.c
drivers/gpu/drm/i915/display/intel_display.h
drivers/gpu/drm/i915/display/intel_dp.c
drivers/gpu/drm/i915/display/intel_dpll_mgr.c
drivers/gpu/drm/i915/display/intel_tc.c
drivers/gpu/drm/i915/intel_drv.h

index d06f121281ef739ed77fa4057edd7cbc9442b86f..442cd3997109afb1785985af067593c271298d11 100644 (file)
@@ -2999,14 +2999,14 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
        enum tc_port tc_port = intel_port_to_tc(dev_priv, port);
        u32 ln0, ln1, lane_info;
 
-       if (tc_port == PORT_TC_NONE || intel_dig_port->tc_type == TC_PORT_TBT)
+       if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT)
                return;
 
        ln0 = I915_READ(MG_DP_MODE(0, port));
        ln1 = I915_READ(MG_DP_MODE(1, port));
 
-       switch (intel_dig_port->tc_type) {
-       case TC_PORT_TYPEC:
+       switch (intel_dig_port->tc_mode) {
+       case TC_PORT_DP_ALT:
                ln0 &= ~(MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE);
                ln1 &= ~(MG_DP_MODE_CFG_DP_X1_MODE | MG_DP_MODE_CFG_DP_X2_MODE);
 
@@ -3049,7 +3049,7 @@ static void icl_program_mg_dp_mode(struct intel_digital_port *intel_dig_port)
                break;
 
        default:
-               MISSING_CASE(intel_dig_port->tc_type);
+               MISSING_CASE(intel_dig_port->tc_mode);
                return;
        }
 
@@ -3643,8 +3643,7 @@ intel_ddi_pre_pll_enable(struct intel_encoder *encoder,
         * Program the lane count for static/dynamic connections on Type-C ports.
         * Skip this step for TBT.
         */
-       if (dig_port->tc_type == TC_PORT_UNKNOWN ||
-           dig_port->tc_type == TC_PORT_TBT)
+       if (dig_port->tc_mode == TC_PORT_TBT_ALT)
                return;
 
        intel_ddi_set_fia_lane_count(encoder, crtc_state, port);
index ee6b8194a459102d4894cf3d27eb374ae47cb899..d296556ed82ee92f31ed7584401e03d954f76146 100644 (file)
@@ -189,10 +189,9 @@ enum tc_port {
        I915_MAX_TC_PORTS
 };
 
-enum tc_port_type {
-       TC_PORT_UNKNOWN = 0,
-       TC_PORT_TYPEC,
-       TC_PORT_TBT,
+enum tc_port_mode {
+       TC_PORT_TBT_ALT,
+       TC_PORT_DP_ALT,
        TC_PORT_LEGACY,
 };
 
index 348c70b75403d7c3147d2769142dfe3e9cd1a2fd..0c6afec78f93c76c177d623f0c4136e297428434 100644 (file)
@@ -1176,7 +1176,7 @@ static u32 skl_get_aux_send_ctl(struct intel_dp *intel_dp,
              DP_AUX_CH_CTL_FW_SYNC_PULSE_SKL(32) |
              DP_AUX_CH_CTL_SYNC_PULSE_SKL(32);
 
-       if (intel_dig_port->tc_type == TC_PORT_TBT)
+       if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT)
                ret |= DP_AUX_CH_CTL_TBT_IO;
 
        return ret;
index 2d4e7b9a7b9df4d72bc4f0d44bba88885fab996a..bf66261c8bf0a683930de942cf51d8ab02fb9209 100644 (file)
@@ -2817,7 +2817,7 @@ icl_get_dpll(struct intel_crtc_state *crtc_state,
                        intel_dig_port = enc_to_dig_port(&encoder->base);
                }
 
-               if (intel_dig_port->tc_type == TC_PORT_TBT) {
+               if (intel_dig_port->tc_mode == TC_PORT_TBT_ALT) {
                        min = DPLL_ID_ICL_TBTPLL;
                        max = min;
                        ret = icl_calc_dpll_state(crtc_state, encoder);
index 4fa9ea695d510c52ffbc3f506d0e8e2f0bb5509a..59aad3e49f93aa6bdc673177535fad7b38af65aa 100644 (file)
@@ -7,19 +7,18 @@
 #include "i915_drv.h"
 #include "intel_tc.h"
 
-static const char *tc_type_name(enum tc_port_type type)
+static const char *tc_port_mode_name(enum tc_port_mode mode)
 {
        static const char * const names[] = {
-               [TC_PORT_UNKNOWN] = "unknown",
+               [TC_PORT_TBT_ALT] = "tbt-alt",
+               [TC_PORT_DP_ALT] = "dp-alt",
                [TC_PORT_LEGACY] = "legacy",
-               [TC_PORT_TYPEC] = "typec",
-               [TC_PORT_TBT] = "tbt",
        };
 
-       if (WARN_ON(type >= ARRAY_SIZE(names)))
-               type = TC_PORT_UNKNOWN;
+       if (WARN_ON(mode >= ARRAY_SIZE(names)))
+               mode = TC_PORT_TBT_ALT;
 
-       return names[type];
+       return names[mode];
 }
 
 int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
@@ -29,7 +28,7 @@ int intel_tc_port_fia_max_lane_count(struct intel_digital_port *dig_port)
        intel_wakeref_t wakeref;
        u32 lane_info;
 
-       if (tc_port == PORT_TC_NONE || dig_port->tc_type != TC_PORT_TYPEC)
+       if (dig_port->tc_mode != TC_PORT_DP_ALT)
                return 4;
 
        lane_info = 0;
@@ -81,8 +80,8 @@ static bool icl_tc_phy_connect(struct intel_digital_port *dig_port)
        enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
        u32 val;
 
-       if (dig_port->tc_type != TC_PORT_LEGACY &&
-           dig_port->tc_type != TC_PORT_TYPEC)
+       if (dig_port->tc_mode != TC_PORT_LEGACY &&
+           dig_port->tc_mode != TC_PORT_DP_ALT)
                return true;
 
        val = I915_READ(PORT_TX_DFLEXDPPMS);
@@ -106,7 +105,7 @@ static bool icl_tc_phy_connect(struct intel_digital_port *dig_port)
         * Now we have to re-check the live state, in case the port recently
         * became disconnected. Not necessary for legacy mode.
         */
-       if (dig_port->tc_type == TC_PORT_TYPEC &&
+       if (dig_port->tc_mode == TC_PORT_DP_ALT &&
            !(I915_READ(PORT_TX_DFLEXDPSP) & TC_LIVE_STATE_TC(tc_port))) {
                DRM_DEBUG_KMS("TC PHY %d sudden disconnect.\n", tc_port);
                icl_tc_phy_disconnect(dig_port);
@@ -125,15 +124,12 @@ void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
        struct drm_i915_private *dev_priv = to_i915(dig_port->base.base.dev);
        enum tc_port tc_port = intel_port_to_tc(dev_priv, dig_port->base.port);
 
-       if (dig_port->tc_type == TC_PORT_UNKNOWN)
-               return;
-
        /*
         * TBT disconnection flow is read the live status, what was done in
         * caller.
         */
-       if (dig_port->tc_type == TC_PORT_TYPEC ||
-           dig_port->tc_type == TC_PORT_LEGACY) {
+       if (dig_port->tc_mode == TC_PORT_DP_ALT ||
+           dig_port->tc_mode == TC_PORT_LEGACY) {
                u32 val;
 
                val = I915_READ(PORT_TX_DFLEXDPCSSS);
@@ -143,9 +139,9 @@ void icl_tc_phy_disconnect(struct intel_digital_port *dig_port)
 
        DRM_DEBUG_KMS("Port %c TC type %s disconnected\n",
                      port_name(dig_port->base.port),
-                     tc_type_name(dig_port->tc_type));
+                     tc_port_mode_name(dig_port->tc_mode));
 
-       dig_port->tc_type = TC_PORT_UNKNOWN;
+       dig_port->tc_mode = TC_PORT_TBT_ALT;
 }
 
 static void icl_update_tc_port_type(struct drm_i915_private *dev_priv,
@@ -153,26 +149,22 @@ static void icl_update_tc_port_type(struct drm_i915_private *dev_priv,
                                    bool is_legacy, bool is_typec, bool is_tbt)
 {
        enum port port = intel_dig_port->base.port;
-       enum tc_port_type old_type = intel_dig_port->tc_type;
+       enum tc_port_mode old_mode = intel_dig_port->tc_mode;
 
        WARN_ON(is_legacy + is_typec + is_tbt != 1);
 
        if (is_legacy)
-               intel_dig_port->tc_type = TC_PORT_LEGACY;
+               intel_dig_port->tc_mode = TC_PORT_LEGACY;
        else if (is_typec)
-               intel_dig_port->tc_type = TC_PORT_TYPEC;
+               intel_dig_port->tc_mode = TC_PORT_DP_ALT;
        else if (is_tbt)
-               intel_dig_port->tc_type = TC_PORT_TBT;
+               intel_dig_port->tc_mode = TC_PORT_TBT_ALT;
        else
                return;
 
-       /* Types are not supposed to be changed at runtime. */
-       WARN_ON(old_type != TC_PORT_UNKNOWN &&
-               old_type != intel_dig_port->tc_type);
-
-       if (old_type != intel_dig_port->tc_type)
+       if (old_mode != intel_dig_port->tc_mode)
                DRM_DEBUG_KMS("Port %c has TC type %s\n", port_name(port),
-                             tc_type_name(intel_dig_port->tc_type));
+                             tc_port_mode_name(intel_dig_port->tc_mode));
 }
 
 /*
index 1d58f7ec5d84b29229854d50df63abfc2683f357..7159f709a7f294c3c5c673981cb2c320924333ae 100644 (file)
@@ -1225,7 +1225,7 @@ struct intel_digital_port {
        enum aux_ch aux_ch;
        enum intel_display_power_domain ddi_io_power_domain;
        bool tc_legacy_port:1;
-       enum tc_port_type tc_type;
+       enum tc_port_mode tc_mode;
 
        void (*write_infoframe)(struct intel_encoder *encoder,
                                const struct intel_crtc_state *crtc_state,