ralink: add a few mt7688 fixes that got lost in the v4.3 bump

Signed-off-by: John Crispin <blogic@openwrt.org>
SVN-Revision: 48115

diff --git a/target/linux/ramips/patches-4.3/0065-mt7688-fixes.patch b/target/linux/ramips/patches-4.3/0065-mt7688-fixes.patch
new file mode 100644 (file)
index 0000000..37b149c
--- /dev/null
+++ b/target/linux/ramips/patches-4.3/0065-mt7688-fixes.patch
@@ -0,0 +1,89 @@
+--- a/arch/mips/ralink/mt7620.c
++++ b/arch/mips/ralink/mt7620.c
+@@ -104,31 +104,31 @@
+ };
+ 
+ static struct rt2880_pmx_func pwm1_grp_mt7628[] = {
+-      FUNC("sdcx d6", 3, 19, 1),
++      FUNC("sdxc d6", 3, 19, 1),
+       FUNC("utif", 2, 19, 1),
+       FUNC("gpio", 1, 19, 1),
+       FUNC("pwm1", 0, 19, 1),
+ };
+ 
+ static struct rt2880_pmx_func pwm0_grp_mt7628[] = {
+-      FUNC("sdcx d7", 3, 18, 1),
++      FUNC("sdxc d7", 3, 18, 1),
+       FUNC("utif", 2, 18, 1),
+       FUNC("gpio", 1, 18, 1),
+       FUNC("pwm0", 0, 18, 1),
+ };
+ 
+ static struct rt2880_pmx_func uart2_grp_mt7628[] = {
+-      FUNC("sdcx d5 d4", 3, 20, 2),
++      FUNC("sdxc d5 d4", 3, 20, 2),
+       FUNC("pwm", 2, 20, 2),
+       FUNC("gpio", 1, 20, 2),
+-      FUNC("uart", 0, 20, 2),
++      FUNC("uart2", 0, 20, 2),
+ };
+ 
+ static struct rt2880_pmx_func uart1_grp_mt7628[] = {
+       FUNC("sw_r", 3, 45, 2),
+       FUNC("pwm", 2, 45, 2),
+       FUNC("gpio", 1, 45, 2),
+-      FUNC("uart", 0, 45, 2),
++      FUNC("uart1", 0, 45, 2),
+ };
+ 
+ static struct rt2880_pmx_func i2c_grp_mt7628[] = {
+@@ -140,21 +140,21 @@
+ 
+ static struct rt2880_pmx_func refclk_grp_mt7628[] = { FUNC("reclk", 0, 36, 1) };
+ static struct rt2880_pmx_func perst_grp_mt7628[] = { FUNC("perst", 0, 37, 1) };
+-static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 15, 38) };
++static struct rt2880_pmx_func wdt_grp_mt7628[] = { FUNC("wdt", 0, 38, 1) };
+ static struct rt2880_pmx_func spi_grp_mt7628[] = { FUNC("spi", 0, 7, 4) };
+ 
+ static struct rt2880_pmx_func sd_mode_grp_mt7628[] = {
+       FUNC("jtag", 3, 22, 8),
+       FUNC("utif", 2, 22, 8),
+       FUNC("gpio", 1, 22, 8),
+-      FUNC("sdcx", 0, 22, 8),
++      FUNC("sdxc", 0, 22, 8),
+ };
+ 
+ static struct rt2880_pmx_func uart0_grp_mt7628[] = {
+       FUNC("-", 3, 12, 2),
+       FUNC("-", 2, 12, 2),
+       FUNC("gpio", 1, 12, 2),
+-      FUNC("uart", 0, 12, 2),
++      FUNC("uart0", 0, 12, 2),
+ };
+ 
+ static struct rt2880_pmx_func i2s_grp_mt7628[] = {
+@@ -449,6 +449,8 @@
+       ralink_clk_add("10000b00.spi", sys_rate);
+       ralink_clk_add("10000b40.spi", sys_rate);
+       ralink_clk_add("10000c00.uartlite", periph_rate);
++      ralink_clk_add("10000d00.uart1", periph_rate);
++      ralink_clk_add("10000e00.uart2", periph_rate);
+       ralink_clk_add("10180000.wmac", xtal_rate);
+ 
+       if (IS_ENABLED(CONFIG_USB) &&
+@@ -571,13 +573,13 @@
+ 
+       cfg0 = __raw_readl(sysc + SYSC_REG_SYSTEM_CONFIG0);
+ 
+-      if (ralink_soc == MT762X_SOC_MT7628AN)
++      if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688)
+               dram_type = ((cfg0&0x00000001) == 0x00000001)?SYSCFG0_DRAM_TYPE_DDR1_MT7628:SYSCFG0_DRAM_TYPE_DDR2_MT7628;
+       else
+               dram_type = (cfg0 >> SYSCFG0_DRAM_TYPE_SHIFT) & SYSCFG0_DRAM_TYPE_MASK;
+ 
+       soc_info->mem_base = MT7620_DRAM_BASE;
+-      if (ralink_soc == MT762X_SOC_MT7628AN)
++      if (ralink_soc == MT762X_SOC_MT7628AN || ralink_soc == MT762X_SOC_MT7688)
+               mt7628_dram_init(soc_info);
+       else
+               mt7620_dram_init(soc_info);