CATEGORY:=Kernel modules
DEPENDS:=@(PACKAGE_kmod-brcm-wl||PACKAGE_kmod-brcm-wl-mini)
SUBMENU:=Proprietary BCM43xx WiFi driver
- SUBMENUDEP:=(TARGET_bcm47xx||TARGET_brcm63xx)
+ SUBMENUDEP:=(TARGET_bcm47xx||TARGET_bcm63xx)
endef
define KernelPackage/brcm-wl/Default
$(call Package/broadcom-wl/Default)
SECTION:=kernel
- DEPENDS:=@(TARGET_bcm47xx||TARGET_brcm63xx) +wireless-tools
+ DEPENDS:=@(TARGET_bcm47xx||TARGET_bcm63xx) +wireless-tools
TITLE:=Kernel driver for BCM43xx chipsets
FILES:=$(PKG_BUILD_DIR)/driver$(1)/wl.ko $(PKG_BUILD_DIR)/glue/wl_glue.ko
AUTOLOAD:=$(call AutoProbe,wl)
define KernelPackage/ssb
SUBMENU:=$(OTHER_MENU)
TITLE:=Silicon Sonics Backplane glue code
- DEPENDS:=@PCI_SUPPORT @!TARGET_bcm47xx @!TARGET_brcm63xx
+ DEPENDS:=@PCI_SUPPORT @!TARGET_bcm47xx @!TARGET_bcm63xx
KCONFIG:=\
CONFIG_SSB \
CONFIG_SSB_B43_PCI_BRIDGE=y \
config PACKAGE_B43_USE_SSB
select PACKAGE_kmod-ssb
tristate
- depends on !TARGET_bcm47xx && !TARGET_brcm63xx
+ depends on !TARGET_bcm47xx && !TARGET_bcm63xx
default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_BCMA_AND_SSB
default PACKAGE_kmod-b43 if PACKAGE_B43_BUSES_SSB
URL:=https://wireless.wiki.kernel.org/en/users/drivers/b43
KCONFIG:= \
CONFIG_HW_RANDOM=y
- DEPENDS+= +kmod-mac80211 +!(TARGET_bcm47xx||TARGET_brcm63xx):kmod-ssb @!TARGET_bcm47xx_mips74k +b43legacy-firmware
+ DEPENDS+= +kmod-mac80211 +!(TARGET_bcm47xx||TARGET_bcm63xx):kmod-ssb @!TARGET_bcm47xx_mips74k +b43legacy-firmware
FILES:=$(PKG_BUILD_DIR)/drivers/net/wireless/broadcom/b43legacy/b43legacy.ko
AUTOLOAD:=$(call AutoProbe,b43legacy)
MENU:=1
obj.brcm = trx.o
obj.bcm47xx = $(obj.brcm)
obj.bcm53xx = $(obj.brcm) $(obj.seama)
-obj.brcm63xx = imagetag.o
+obj.bcm63xx = imagetag.o
obj.ramips = $(obj.seama) $(obj.tpl) $(obj.wrg)
obj.mvebu = linksys_bootcount.o
obj.kirkwood = linksys_bootcount.o
--- /dev/null
+#
+# Copyright (C) 2006-2019 OpenWrt.org
+# Copyright (C) 2016 LEDE project
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+
+ARCH:=mips
+BOARD:=bcm63xx
+BOARDNAME:=Broadcom BCM63xx
+SUBTARGETS:=generic smp
+FEATURES:=squashfs usb atm pci pcmcia usbgadget
+KERNEL_PATCHVER:=4.14
+KERNEL_TESTING_PATCHVER:=4.19
+MAINTAINER:=Jonas Gorski <jogo@openwrt.org>
+
+define Target/Description
+ Build firmware images for Broadcom based xDSL/routers
+ currently supports BCM6338, BCM6348 and BCM6358 based devices.
+ (e.g. Inventel Livebox, Siemens SE515, Neufbox 4)
+endef
+
+include $(INCLUDE_DIR)/target.mk
+
+DEFAULT_PACKAGES += swconfig kmod-gpio-button-hotplug
+
+$(eval $(call BuildTarget))
--- /dev/null
+#!/bin/sh
+#
+# Copyright (C) 2013-2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+actiontec,r1000h)
+ ucidef_set_led_usbport "usb" "USB" "R1000H:green:usb" "usb1-port1" "usb2-port1"
+ ;;
+adb,a4001n)
+ ucidef_set_led_usbdev "usb" "USB" "A4001N:green:usb" "1-1"
+ ;;
+adb,a4001n1)
+ ucidef_set_led_netdev "lan" "LAN" "A4001N1:green:eth" "eth0"
+ ucidef_set_led_usbdev "usb" "USB" "A4001N1:green:3g" "1-1"
+ ;;
+adb,av4202n)
+ ucidef_set_led_netdev "wlan0" "WLAN" "AV4202N:blue:wifi" "wlan0"
+ ;;
+bt,home-hub-2-a)
+ ucidef_set_led_netdev "lan" "LAN" "HOMEHUB2A:blue:broadband" "eth0.1"
+ ucidef_set_led_netdev "wlan0" "WIFI" "HOMEHUB2A:green:wireless" "wlan0"
+ ucidef_set_led_usbdev "usb1" "USB1" "HOMEHUB2A:blue:phone" "1-1"
+ ucidef_set_led_usbdev "usb2" "USB2" "HOMEHUB2A:green:phone" "2-1"
+ ;;
+comtrend,ar-5315u)
+ ucidef_set_led_usbdev "usb" "USB" "AR-5315u:green:usb" "1-1"
+ ;;
+huawei,echolife-hg553)
+ ucidef_set_led_netdev "lan" "LAN" "HW553:blue:lan" "eth0"
+ ucidef_set_led_usbdev "usb1" "USB1" "HW553:red:hspa" "1-1"
+ ucidef_set_led_usbdev "usb2" "USB2" "HW553:blue:hspa" "1-2"
+ ;;
+huawei,echolife-hg556a-a|\
+huawei,echolife-hg556a-b|\
+huawei,echolife-hg556a-c)
+ ucidef_set_led_netdev "lan" "LAN" "HW556:red:dsl" "eth0"
+ ucidef_set_led_usbdev "usb" "USB" "HW556:red:hspa" "1-2"
+ ;;
+huawei,echolife-hg622)
+ ucidef_set_led_usbdev "usb" "USB" "HG622:green:usb" "1-2"
+ ;;
+huawei,echolife-hg655b)
+ ucidef_set_led_usbdev "usb" "USB" "HW65x:green:usb" "1-2"
+ ;;
+inventel,livebox-1)
+ ucidef_set_led_netdev "lan" "LAN" "Livebox1:red:traffic" "eth0"
+ ucidef_set_led_netdev "wan" "WAN" "Livebox1:red:adsl" "eth1"
+ ucidef_set_led_netdev "wlan0" "WIFI" "Livebox1:red:wifi" "wlan0"
+ ;;
+netgear,dgnd3700-v1)
+ ucidef_set_led_netdev "lan" "LAN" "DGND3700v1_3800B:green:lan" "eth0.1"
+ ucidef_set_led_netdev "wan" "WAN" "DGND3700v1_3800B:green:inet" "eth0.2"
+ ucidef_set_led_netdev "wlan0" "WIFI2G" "DGND3700v1_3800B:green:wifi2g" "wlan0"
+ ucidef_set_led_netdev "wlan1" "WIFI5G" "DGND3700v1_3800B:blue:wifi5g" "wlan1"
+ ucidef_set_led_usbdev "usb1" "USB1" "DGND3700v1_3800B:green:usb-back" "1-1"
+ ucidef_set_led_usbdev "usb2" "USB2" "DGND3700v1_3800B:green:usb-front" "1-2"
+ ;;
+netgear,evg2000)
+ ucidef_set_led_netdev "lan" "LAN" "EVG2000:green:lan" "eth0"
+ ucidef_set_led_netdev "wan" "WAN" "EVG2000:green:wan" "eth1"
+ ucidef_set_led_netdev "wlan0" "WIFI" "EVG2000:green:wireless" "wlan0"
+ ucidef_set_led_usbdev "usb1" "USB1" "EVG2000:green:voip1" "1-1"
+ ucidef_set_led_usbdev "usb2" "USB2" "EVG2000:green:voip2" "1-2"
+ ;;
+nucom,r5010un-v2)
+ ucidef_set_led_usbdev "usb" "USB" "R5010UNv2:green:usb" "1-1"
+ ;;
+sagem,fast-2704n)
+ ucidef_set_led_netdev "wan" "WAN" "F@ST2704N:green:inet" "eth0.2"
+ ;;
+sagem,fast-2704-v2)
+ ucidef_set_led_usbdev "usb" "USB" "F@ST2704V2:green:usb" "1-1"
+ ;;
+sercomm,ad1018-nor)
+ ucidef_set_led_netdev "wlan0" "WLAN" "AD1018:green:wifi" "wlan0"
+ ;;
+telsey,cpva502plus)
+ ucidef_set_led_netdev "lan" "LAN" "CPVA502+:amber:link" "eth0"
+ ;;
+esac
+
+board_config_flush
+
+exit 0
--- /dev/null
+#!/bin/sh
+#
+# Copyright (C) 2012-2015 OpenWrt.org
+#
+
+. /lib/functions/uci-defaults.sh
+
+board_config_update
+
+case "$(board_name)" in
+actiontec,r1000h|\
+dynalink,rta770bw|\
+dynalink,rta770w|\
+netgear,cvg834g|\
+netgear,evg2000|\
+t-com,speedport-w-303v|\
+t-com,speedport-w-500v)
+ ucidef_set_interface_lan "eth0"
+ ;;
+adb,a4001n1|\
+adb,a4001n|\
+adb,av4202n|\
+brcm,bcm963281tan|\
+brcm,bcm96328avng|\
+brcm,bcm96368mvngr|\
+comtrend,ar-5381u|\
+comtrend,ar-5387un|\
+comtrend,vr-3025u|\
+comtrend,vr-3025un|\
+comtrend,vr-3026e|\
+d-link,dsl-274xb-f1|\
+d-link,dsl-275xb-d1|\
+huawei,echolife-hg622|\
+huawei,echolife-hg655b|\
+nucom,r5010un-v2|\
+sagem,fast-2504n|\
+sagem,fast-2704-v2|\
+zyxel,p870hw-51a-v2)
+ ucidef_add_switch "switch0" \
+ "0:lan:1" "1:lan:2" "2:lan:3" "3:lan:4" "8t@eth0"
+ ;;
+alcatel,rg100a|\
+belkin,f5d7633|\
+brcm,bcm96348gw|\
+brcm,bcm96348gw-10|\
+brcm,bcm96348gw-11|\
+brcm,bcm96358vw|\
+brcm,bcm96358vw2|\
+bt,voyager-2500v-bb|\
+davolink,dv-201amr|\
+d-link,dsl-2650u|\
+dynalink,rta1025w|\
+netgear,dg834gt-pn|\
+pirelli,agpf-s0|\
+sagem,fast-2404|\
+telsey,magic|\
+tp-link,td-w8900gb|\
+usrobotics,usr9108)
+ ucidef_set_interfaces_lan_wan "eth1" "eth0"
+ ucidef_add_switch "switch0" \
+ "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "5u@eth1"
+ ;;
+asmax,ar-1004g|\
+brcm,bcm96338gw|\
+brcm,bcm96338w|\
+bt,voyager-2110|\
+comtrend,ct-5365|\
+comtrend,ct-536plus|\
+comtrend,ct-6373|\
+d-link,dsl-2640b-b|\
+d-link,dsl-2640u|\
+dynalink,rta1320|\
+netgear,dg834g-v4|\
+sagem,fast-2604|\
+telsey,cpva642)
+ ucidef_add_switch "switch0" \
+ "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "5u@eth0"
+ ;;
+brcm,bcm963268bu-p300)
+ ucidef_add_switch "switch0" \
+ "0:lan" "3:lan" "4:lan" "5:lan" "6:lan" "7:lan" "8t@eth0"
+ ;;
+brcm,bcm96368mvwg)
+ ucidef_add_switch "switch0" \
+ "1:lan" "2:lan" "4:lan" "5:lan" "8t@eth0"
+ ;;
+bt,home-hub-2-a|\
+d-link,dsl-274xb-c2|\
+huawei,echolife-hg553|\
+huawei,echolife-hg556a-a|\
+huawei,echolife-hg556a-b|\
+huawei,echolife-hg556a-c)
+ ucidef_add_switch "switch0" \
+ "0:lan:1" "1:lan:2" "2:lan:3" "3:lan:4" "5t@eth0"
+ ;;
+comtrend,ar-5315u|\
+observa,vh4032n|\
+sagem,fast-2704n)
+ ucidef_add_switch "switch0" \
+ "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "8t@eth0"
+ ;;
+comtrend,wap-5813n)
+ ucidef_add_switch "switch0" \
+ "0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "5t@eth0"
+ ;;
+d-link,dva-g3810bn-tl|\
+huawei,echolife-hg520v|\
+sfr,neufbox-4-foxconn-r1|\
+sfr,neufbox-4-sercomm-r0)
+ ucidef_set_interfaces_lan_wan "eth1.1" "eth0"
+ ucidef_add_switch "switch0" \
+ "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "5t@eth1"
+ ;;
+inteno,vg50)
+ ucidef_add_switch "switch0" \
+ "0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "8t@eth0"
+ ;;
+inventel,livebox-1|\
+telsey,cpva502plus)
+ ucidef_set_interfaces_lan_wan "eth0" "eth1"
+ ;;
+netgear,dgnd3700-v1)
+ ucidef_add_switch "switch0" \
+ "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0:wan" "8t@eth0"
+ ;;
+sercomm,ad1018-nor)
+ ucidef_add_switch "switch0" \
+ "1:lan:3" "2:lan:2" "3:lan:1" "0:wan" "8t@eth0"
+ ;;
+sfr,neufbox-6-sercomm-r0)
+ ucidef_add_switch "switch0" \
+ "1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "9t@eth0"
+ ;;
+sky,sr102)
+ ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
+ ucidef_add_switch "switch0" \
+ "0:lan" "1:lan" "2:lan" "3:wan" "8t@eth0"
+ ;;
+*)
+ ucidef_set_interfaces_lan_wan "eth1" "eth0"
+ ;;
+esac
+
+board_config_flush
+
+exit 0
--- /dev/null
+#!/bin/sh
+# Copyright (C) 2007-2013 OpenWrt.org
+
+. /lib/functions.sh
+. /lib/functions/leds.sh
+
+set_state() {
+ case "$(board_name)" in
+ actiontec,r1000h)
+ status_led="R1000H:green:power"
+ ;;
+ adb,a4001n)
+ status_led="A4001N:green:power"
+ ;;
+ adb,a4001n1)
+ status_led="A4001N1:green:power"
+ ;;
+ adb,av4202n)
+ status_led="AV4202N:white:power"
+ ;;
+ asmax,ar-1004g)
+ status_led="AR1004G:green:power"
+ ;;
+ brcm,bcm963281tan)
+ status_led="963281TAN::power"
+ ;;
+ brcm,bcm96328avng)
+ status_led="96328avng::power"
+ ;;
+ brcm,bcm96348gw)
+ status_led="96348GW:green:power"
+ ;;
+ brcm,bcm96348gw-11)
+ status_led="96348GW-11:green:power"
+ ;;
+ bt,home-hub-2-a)
+ status_led="HOMEHUB2A:green:upgrading"
+ status_led2="HOMEHUB2A:blue:upgrading"
+ ;;
+ bt,voyager-2110)
+ status_led="V2110:power:green"
+ ;;
+ comtrend,ar-5315u)
+ status_led="AR-5315u:green:power"
+ ;;
+ comtrend,ar-5381u)
+ status_led="AR-5381u:green:power"
+ ;;
+ comtrend,ar-5387un)
+ status_led="AR-5387un:green:power"
+ ;;
+ comtrend,ct-536plus)
+ status_led="CT536_CT5621:green:power"
+ ;;
+ comtrend,vr-3025u)
+ status_led="VR-3025u:green:power"
+ ;;
+ comtrend,vr-3025un)
+ status_led="VR-3025un:green:power"
+ ;;
+ comtrend,vr-3026e)
+ status_led="VR-3026e:green:power"
+ ;;
+ comtrend,wap-5813n)
+ status_led="WAP-5813n:green:power"
+ ;;
+ d-link,dsl-2640b-b)
+ status_led="D-4P-W:green:power"
+ ;;
+ d-link,dsl-274xb-c2|\
+ d-link,dsl-274xb-f1)
+ status_led="dsl-274xb:green:power"
+ ;;
+ d-link,dsl-275xb-d1)
+ status_led="dsl-275xb:green:power"
+ ;;
+ dynalink,rta770bw)
+ status_led="RTA770BW:green:diag"
+ ;;
+ dynalink,rta770w)
+ status_led="RTA770W:green:diag"
+ ;;
+ huawei,echolife-hg520v)
+ status_led="HW520:green:net"
+ ;;
+ huawei,echolife-hg553)
+ status_led="HW553:blue:power"
+ ;;
+ huawei,echolife-hg556a-a|\
+ huawei,echolife-hg556a-b|\
+ huawei,echolife-hg556a-c)
+ status_led="HW556:red:power"
+ ;;
+ huawei,echolife-hg655b)
+ status_led="HW65x:green:power"
+ ;;
+ inventel,livebox-1)
+ status_led="Livebox1:red:adsl-fail-power"
+ ;;
+ netgear,cvg834g)
+ status_led="CVG834G:green:power"
+ ;;
+ netgear,dgnd3700-v1)
+ status_led="DGND3700v1_3800B:green:power"
+ ;;
+ netgear,evg2000)
+ status_led="EVG2000:green:power"
+ ;;
+ nucom,r5010un-v2)
+ status_led="R5010UNv2:green:power"
+ ;;
+ observa,vh4032n)
+ status_led="VH4032N:blue:power"
+ ;;
+ sagem,fast-2504n)
+ status_led="fast2504n:green:ok"
+ ;;
+ sagem,fast-2704n)
+ status_led2="F@ST2704N:red:power"
+ ;;
+ sagem,fast-2704-v2)
+ status_led="F@ST2704V2:green:power"
+ ;;
+ sercomm,ad1018-nor)
+ status_led="AD1018:green:power"
+ ;;
+ sky,sr102)
+ status_led="SR102:white:power"
+ status_led2="SR102:red:power"
+ ;;
+ t-com,speedport-w-303v)
+ status_led="spw303v:green:power+adsl"
+ ;;
+ t-com,speedport-w-500v)
+ status_led="SPW500V:green:power"
+ ;;
+ tecom,gw6200)
+ status_led="GW6200:green:line1"
+ status_led2="GW6200:green:tel"
+ ;;
+ telsey,cpva642)
+ status_led="CPVA642:green:power:"
+ ;;
+ zyxel,p870hw-51a-v2)
+ status_led="P870HW-51a:green:power"
+ ;;
+ esac
+
+ case "$1" in
+ preinit)
+ status_led_blink_preinit
+ ;;
+ failsafe)
+ status_led_blink_failsafe
+ ;;
+ preinit_regular)
+ status_led_blink_preinit_regular
+ ;;
+ done)
+ if [ "${status_led/power}" != "$status_led" ]; then
+ status_led_on
+ else
+ status_led_off
+ fi
+ ;;
+ esac
+}
--- /dev/null
+#!/bin/sh
+# Based on gabors ralink wisoc implementation.
+
+[ -e /lib/firmware/$FIRMWARE ] && exit 0
+
+. /lib/functions/caldata.sh
+
+board=$(board_name)
+
+case "$FIRMWARE" in
+"rt2x00.eeprom" )
+ case $board in
+ huawei,echolife-hg556a-c)
+ caldata_extract "cal_data" 0x1fe00 0x200
+ ;;
+ huawei,echolife-hg622|\
+ huawei,echolife-hg655b)
+ caldata_extract "cal_data" 0x0 0x200
+ ;;
+ *)
+ caldata_die "board $board is not supported yet"
+ ;;
+ esac
+ ;;
+esac
--- /dev/null
+#!/bin/sh
+#
+# Copyright (C) 2007 OpenWrt.org
+#
+#
+
+. /lib/functions.sh
+
+do_fixcrc() {
+ mtd fixtrx linux
+}
+
+case "$(board_name)" in
+ actiontec,r1000h|\
+ adb,a4001n|\
+ adb,a4001n1|\
+ brcm,bcm96328avng|\
+ brcm,bcm963281tan|\
+ bt,voyager-2110|\
+ bt,voyager-2500v-bb|\
+ comtrend,ar-5315u|\
+ comtrend,ar-5381u|\
+ comtrend,ar-5387un|\
+ comtrend,vr-3025u|\
+ comtrend,vr-3025un|\
+ comtrend,vr-3026e|\
+ comtrend,wap-5813n|\
+ comtrend,ct-6373|\
+ d-link,dsl-274xb-f1|\
+ dynalink,rta770bw|\
+ dynalink,rta770w|\
+ huawei,echolife-hg622|\
+ netgear,evg2000|\
+ nucom,r5010un-v2|\
+ observa,vh4032n|\
+ t-com,speedport-w-303v|\
+ telsey,cpva502plus|\
+ telsey,cpva642|\
+ telsey,magic|\
+ zyxel,p870hw-51a-v2)
+ do_fixcrc
+ ;;
+esac
--- /dev/null
+PART_NAME=linux
+platform_check_image() {
+ [ "$#" -gt 1 ] && return 1
+ case "$(get_magic_word "$1")" in
+ 3600|3700|3800)
+ # 6348GW-11 boards use openwrt-96348GW-11-squashfs-cfe.bin files
+ return 0
+ ;;
+ *)
+ echo "Invalid image type. Please use only .bin files"
+ return 1
+ ;;
+ esac
+}
+
+# use default for platform_do_upgrade()
--- /dev/null
+CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
+# CONFIG_ARCH_HAS_SG_CHAIN is not set
+# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
+# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_MMAP_RND_BITS_MAX=15
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
+# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
+# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
+CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_BCM6345_EXT_IRQ=y
+CONFIG_BCM6345_PERIPH_IRQ=y
+CONFIG_BCM63XX=y
+CONFIG_BCM63XX_CPU_3368=y
+CONFIG_BCM63XX_CPU_6318=y
+CONFIG_BCM63XX_CPU_63268=y
+CONFIG_BCM63XX_CPU_6328=y
+CONFIG_BCM63XX_CPU_6338=y
+CONFIG_BCM63XX_CPU_6345=y
+CONFIG_BCM63XX_CPU_6348=y
+CONFIG_BCM63XX_CPU_6358=y
+CONFIG_BCM63XX_CPU_6362=y
+CONFIG_BCM63XX_CPU_6368=y
+CONFIG_BCM63XX_EHCI=y
+CONFIG_BCM63XX_ENET=y
+CONFIG_BCM63XX_OHCI=y
+CONFIG_BCM63XX_PHY=y
+CONFIG_BCM63XX_WDT=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+# CONFIG_BCMA_DEBUG is not set
+# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
+# CONFIG_BCMA_DRIVER_MIPS is not set
+CONFIG_BCMA_DRIVER_PCI=y
+# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+# CONFIG_BCMA_HOST_SOC is not set
+CONFIG_BCM_NET_PHYLIB=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BOARD_BCM63XX_DT=y
+CONFIG_BOARD_BCM963XX=y
+CONFIG_BOARD_LIVEBOX=y
+CONFIG_CEVT_R4K=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_BMIPS=y
+CONFIG_CPU_BMIPS32_3300=y
+CONFIG_CPU_BMIPS4350=y
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
+CONFIG_CPU_R4K_CACHE_TLB=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CRASH_CORE=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_FIXED_PHY=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_GENERIC_PINCTRL_GROUPS=y
+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_BCM63XX=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_GRO_CELLS is not set
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+# CONFIG_HAVE_ARCH_BITREVERSE is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_CBPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_BCM63XX=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_MIPS_CPU=y
+CONFIG_IRQ_WORK=y
+CONFIG_KEXEC=y
+CONFIG_KEXEC_CORE=y
+CONFIG_LEDS_BCM6328=y
+CONFIG_LEDS_BCM6358=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LIBFDT=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MIPS=y
+CONFIG_MIPS_ASID_BITS=8
+CONFIG_MIPS_ASID_SHIFT=0
+CONFIG_MIPS_CLOCK_VSYSCALL=y
+# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
+# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
+CONFIG_MIPS_CMDLINE_FROM_DTB=y
+# CONFIG_MIPS_ELF_APPENDED_DTB is not set
+CONFIG_MIPS_EXTERNAL_TIMER=y
+# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+CONFIG_MIPS_L1_CACHE_SHIFT_4=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_MIPS_NO_APPENDED_DTB is not set
+CONFIG_MIPS_RAW_APPENDED_DTB=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MTD_BCM63XX_PARTS=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_CFI_NOSWAP is not set
+CONFIG_MTD_CFI_STAA=y
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_PARSER_IMAGETAG=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+# CONFIG_NO_IOPORT_MAP is not set
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_ADDRESS_PCI=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_PCI=y
+# CONFIG_PCIEAER is not set
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DRIVERS_LEGACY=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_BCM6318=y
+CONFIG_PINCTRL_BCM63268=y
+CONFIG_PINCTRL_BCM6328=y
+CONFIG_PINCTRL_BCM6348=y
+CONFIG_PINCTRL_BCM6358=y
+CONFIG_PINCTRL_BCM6362=y
+CONFIG_PINCTRL_BCM6368=y
+CONFIG_PINCTRL_BCM63XX=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_RCU_NEED_SEGCBLIST is not set
+# CONFIG_RCU_STALL_COMMON is not set
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_RELAY=y
+CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367_PHY=y
+# CONFIG_SCHED_INFO is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_BCM63XX=y
+CONFIG_SERIAL_BCM63XX_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SPI_BCM63XX=y
+CONFIG_SPI_BCM63XX_HSSPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_SRCU=y
+CONFIG_SSB=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_BLOCKIO=y
+# CONFIG_SSB_DRIVER_MIPS is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SWCONFIG=y
+CONFIG_SWCONFIG_B53=y
+CONFIG_SWCONFIG_B53_MMAP_DRIVER=y
+CONFIG_SWCONFIG_B53_PHY_DRIVER=y
+CONFIG_SWCONFIG_B53_PHY_FIXUP=y
+CONFIG_SWCONFIG_B53_SPI_DRIVER=y
+# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
+CONFIG_SWPHY=y
+CONFIG_SYNC_R4K=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_SYS_HAS_CPU_BMIPS=y
+CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
+CONFIG_SYS_HAS_CPU_BMIPS4350=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
+CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TINY_SRCU=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WEAK_ORDERING=y
--- /dev/null
+CONFIG_ARCH_BINFMT_ELF_STATE=y
+CONFIG_ARCH_CLOCKSOURCE_DATA=y
+CONFIG_ARCH_DISCARD_MEMBLOCK=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
+# CONFIG_ARCH_HAS_SG_CHAIN is not set
+# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
+# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_MMAP_RND_BITS_MAX=15
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
+# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
+# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
+CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_BCM6345_EXT_IRQ=y
+CONFIG_BCM6345_PERIPH_IRQ=y
+CONFIG_BCM63XX=y
+CONFIG_BCM63XX_CPU_3368=y
+CONFIG_BCM63XX_CPU_6318=y
+CONFIG_BCM63XX_CPU_63268=y
+CONFIG_BCM63XX_CPU_6328=y
+CONFIG_BCM63XX_CPU_6338=y
+CONFIG_BCM63XX_CPU_6345=y
+CONFIG_BCM63XX_CPU_6348=y
+CONFIG_BCM63XX_CPU_6358=y
+CONFIG_BCM63XX_CPU_6362=y
+CONFIG_BCM63XX_CPU_6368=y
+CONFIG_BCM63XX_EHCI=y
+CONFIG_BCM63XX_ENET=y
+CONFIG_BCM63XX_OHCI=y
+CONFIG_BCM63XX_PHY=y
+CONFIG_BCM63XX_WDT=y
+CONFIG_BCMA=y
+CONFIG_BCMA_BLOCKIO=y
+# CONFIG_BCMA_DEBUG is not set
+# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
+# CONFIG_BCMA_DRIVER_MIPS is not set
+CONFIG_BCMA_DRIVER_PCI=y
+# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set
+CONFIG_BCMA_HOST_PCI=y
+CONFIG_BCMA_HOST_PCI_POSSIBLE=y
+# CONFIG_BCMA_HOST_SOC is not set
+CONFIG_BCM_NET_PHYLIB=y
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BOARD_BCM63XX_DT=y
+CONFIG_BOARD_BCM963XX=y
+CONFIG_BOARD_LIVEBOX=y
+CONFIG_CEVT_R4K=y
+CONFIG_CLKDEV_LOOKUP=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CPU_BMIPS=y
+CONFIG_CPU_BMIPS32_3300=y
+CONFIG_CPU_BMIPS4350=y
+CONFIG_CPU_GENERIC_DUMP_TLB=y
+CONFIG_CPU_HAS_PREFETCH=y
+CONFIG_CPU_HAS_SYNC=y
+CONFIG_CPU_MIPS32=y
+CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
+CONFIG_CPU_R4K_CACHE_TLB=y
+CONFIG_CPU_R4K_FPU=y
+CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
+CONFIG_CPU_SUPPORTS_CPUFREQ=y
+CONFIG_CPU_SUPPORTS_HIGHMEM=y
+CONFIG_CRASH_CORE=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_WORKQUEUE=y
+CONFIG_CSRC_R4K=y
+CONFIG_DMA_NONCOHERENT=y
+CONFIG_DTC=y
+CONFIG_EARLY_PRINTK=y
+CONFIG_FIRMWARE_IN_KERNEL=y
+CONFIG_FIXED_PHY=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_IO=y
+CONFIG_GENERIC_IRQ_CHIP=y
+CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_PINCONF=y
+CONFIG_GENERIC_PINCTRL_GROUPS=y
+CONFIG_GENERIC_PINMUX_FUNCTIONS=y
+CONFIG_GENERIC_SCHED_CLOCK=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+CONFIG_GPIOLIB=y
+CONFIG_GPIO_BCM63XX=y
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_SYSFS=y
+# CONFIG_GRO_CELLS is not set
+CONFIG_HANDLE_DOMAIN_IRQ=y
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
+# CONFIG_HAVE_ARCH_BITREVERSE is not set
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
+CONFIG_HAVE_CBPF_JIT=y
+CONFIG_HAVE_CC_STACKPROTECTOR=y
+CONFIG_HAVE_CLK=y
+CONFIG_HAVE_CONTEXT_TRACKING=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DMA_API_DEBUG=y
+CONFIG_HAVE_DMA_CONTIGUOUS=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_GENERIC_DMA_COHERENT=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_LATENCYTOP_SUPPORT=y
+CONFIG_HAVE_MEMBLOCK=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
+CONFIG_HW_HAS_PCI=y
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_BCM63XX=y
+CONFIG_HZ=250
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_250=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_INITRAMFS_SOURCE=""
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_MIPS_CPU=y
+CONFIG_IRQ_WORK=y
+CONFIG_KEXEC=y
+CONFIG_KEXEC_CORE=y
+CONFIG_LEDS_BCM6328=y
+CONFIG_LEDS_BCM6358=y
+CONFIG_LEDS_GPIO=y
+CONFIG_LIBFDT=y
+CONFIG_MDIO_BUS=y
+CONFIG_MDIO_DEVICE=y
+CONFIG_MFD_SYSCON=y
+CONFIG_MIPS=y
+CONFIG_MIPS_ASID_BITS=8
+CONFIG_MIPS_ASID_SHIFT=0
+CONFIG_MIPS_CLOCK_VSYSCALL=y
+# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
+# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
+CONFIG_MIPS_CMDLINE_FROM_DTB=y
+# CONFIG_MIPS_ELF_APPENDED_DTB is not set
+CONFIG_MIPS_EXTERNAL_TIMER=y
+# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
+CONFIG_MIPS_L1_CACHE_SHIFT=4
+CONFIG_MIPS_L1_CACHE_SHIFT_4=y
+# CONFIG_MIPS_MACHINE is not set
+# CONFIG_MIPS_NO_APPENDED_DTB is not set
+CONFIG_MIPS_RAW_APPENDED_DTB=y
+CONFIG_MODULES_USE_ELF_REL=y
+CONFIG_MODULE_FORCE_LOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MTD_BCM63XX_PARTS=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+CONFIG_MTD_CFI_BE_BYTE_SWAP=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_CFI_NOSWAP is not set
+CONFIG_MTD_CFI_STAA=y
+# CONFIG_MTD_COMPLEX_MAPPINGS is not set
+CONFIG_MTD_JEDECPROBE=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_PARSER_IMAGETAG=y
+CONFIG_MTD_PHYSMAP=y
+CONFIG_MTD_REDBOOT_PARTS=y
+CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
+CONFIG_MTD_SPI_NOR=y
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
+# CONFIG_NO_IOPORT_MAP is not set
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_ADDRESS_PCI=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_OF_PCI=y
+CONFIG_OF_PCI_IRQ=y
+CONFIG_PCI=y
+# CONFIG_PCIEAER is not set
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_DRIVERS_LEGACY=y
+CONFIG_PERF_USE_VMALLOC=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PINCTRL=y
+CONFIG_PINCTRL_BCM6318=y
+CONFIG_PINCTRL_BCM63268=y
+CONFIG_PINCTRL_BCM6328=y
+CONFIG_PINCTRL_BCM6348=y
+CONFIG_PINCTRL_BCM6358=y
+CONFIG_PINCTRL_BCM6362=y
+CONFIG_PINCTRL_BCM6368=y
+CONFIG_PINCTRL_BCM63XX=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_POSIX_MQUEUE_SYSCTL=y
+# CONFIG_RCU_NEED_SEGCBLIST is not set
+# CONFIG_RCU_STALL_COMMON is not set
+CONFIG_REGMAP=y
+CONFIG_REGMAP_MMIO=y
+CONFIG_RELAY=y
+CONFIG_RTL8366_SMI=y
+CONFIG_RTL8367_PHY=y
+# CONFIG_SCHED_INFO is not set
+# CONFIG_SCSI_DMA is not set
+# CONFIG_SERIAL_8250 is not set
+CONFIG_SERIAL_BCM63XX=y
+CONFIG_SERIAL_BCM63XX_CONSOLE=y
+CONFIG_SPI=y
+CONFIG_SPI_BCM63XX=y
+CONFIG_SPI_BCM63XX_HSSPI=y
+CONFIG_SPI_MASTER=y
+CONFIG_SQUASHFS_EMBEDDED=y
+CONFIG_SRCU=y
+CONFIG_SSB=y
+CONFIG_SSB_B43_PCI_BRIDGE=y
+CONFIG_SSB_BLOCKIO=y
+# CONFIG_SSB_DRIVER_MIPS is not set
+CONFIG_SSB_DRIVER_PCICORE=y
+CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
+CONFIG_SSB_PCIHOST=y
+CONFIG_SSB_PCIHOST_POSSIBLE=y
+CONFIG_SSB_SPROM=y
+CONFIG_SWAP_IO_SPACE=y
+CONFIG_SWCONFIG=y
+CONFIG_SWCONFIG_B53=y
+CONFIG_SWCONFIG_B53_MMAP_DRIVER=y
+CONFIG_SWCONFIG_B53_PHY_DRIVER=y
+CONFIG_SWCONFIG_B53_PHY_FIXUP=y
+CONFIG_SWCONFIG_B53_SPI_DRIVER=y
+# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
+CONFIG_SWPHY=y
+CONFIG_SYNC_R4K=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+CONFIG_SYS_HAS_CPU_BMIPS=y
+CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
+CONFIG_SYS_HAS_CPU_BMIPS4350=y
+CONFIG_SYS_HAS_EARLY_PRINTK=y
+CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
+CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
+CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
+CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
+CONFIG_SYS_SUPPORTS_SMP=y
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TINY_SRCU=y
+CONFIG_USB_SUPPORT=y
+CONFIG_USE_OF=y
+CONFIG_VM_EVENT_COUNTERS=y
+CONFIG_WATCHDOG_NOWAYOUT=y
+CONFIG_WEAK_ORDERING=y
--- /dev/null
+/dts-v1/;
+
+#include "bcm3368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Netgear CVG834G";
+ compatible = "netgear,cvg834g", "brcm,bcm3368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "CVG834G:green:power";
+ gpios = <&gpio1 5 0>;
+ default-state = "on";
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
+
+&uart1 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm3368";
+
+ aliases {
+ pflash = &pflash;
+ gpio0 = &gpio0;
+ gpio1 = &gpio1;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &lsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ pflash: nor@1e000000 {
+ compatible = "cfi-flash";
+ reg = <0x1e000000 0x2000000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus@fff00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ periph_intc: interrupt-controller@fff8c00c {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0xfff8c00c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc0: interrupt-controller@fff8c014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfff8c014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <25>, <26>, <27>, <28>;
+ };
+
+ gpio1: gpio-controller@fff8c080 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xfff8c080 4>, <0xfff8c088 4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ ngpios = <8>;
+ };
+
+ gpio0: gpio-controller@fff8c084 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xfff8c084 4>, <0xfff8c08c 4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+ };
+
+ uart0: serial@fff8c100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfff8c100 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ uart1: serial@fff8c120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfff8c120 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <3>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ lsspi: spi@fff8c800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0xfff8c800 0x70c>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm63268.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "SKY SR102";
+ compatible = "sky,sr102", "brcm,bcm63168", "brcm,bcm63268";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 33 0>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ lan1_green {
+ label = "SR102:green:lan1";
+ gpios = <&pinctrl 1 1>;
+ };
+ power_red {
+ label = "SR102:red:power";
+ gpios = <&pinctrl 2 1>;
+ };
+ wifi_red {
+ label = "SR102:red:wifi";
+ gpios = <&pinctrl 3 1>;
+ };
+ inet_red {
+ label = "SR102:red:inet";
+ gpios = <&pinctrl 4 1>;
+ };
+ inet_white {
+ label = "SR102:white:inet";
+ gpios = <&pinctrl 5 0>;
+ };
+ power_white {
+ label = "SR102:white:power";
+ gpios = <&pinctrl 6 0>;
+ default-state = "on";
+ };
+ wifi_white {
+ label = "SR102:white:wifi";
+ gpios = <&pinctrl 8 0>;
+ };
+ lan2_red {
+ label = "SR102:red:lan2";
+ gpios = <&pinctrl 9 1>;
+ };
+ lan3_red {
+ label = "SR102:red:lan3";
+ gpios = <&pinctrl 10 1>;
+ };
+ lan4_red {
+ label = "SR102:red:lan4";
+ gpios = <&pinctrl 11 1>;
+ };
+ lan1_red {
+ label = "SR102:red:lan1";
+ gpios = <&pinctrl 12 1>;
+ };
+ lan2_green {
+ label = "SR102:green:lan2";
+ gpios = <&pinctrl 13 0>;
+ };
+ lan3_green {
+ label = "SR102:green:lan3";
+ gpios = <&pinctrl 14 1>;
+ };
+ lan4_green {
+ label = "SR102:green:lan4";
+ gpios = <&pinctrl 15 1>;
+ };
+ hd_white {
+ label = "SR102:white:hd";
+ gpios = <&pinctrl 18 0>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96318REF_P300 reference board";
+ compatible = "brcm,bcm96318ref-p300", "brcm,bcm6318";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet {
+ label = "96318REF_P300:green:inet";
+ gpios = <&pinctrl 8 1>;
+ };
+
+ inet_fail {
+ label = "96318REF_P300:red:inet-fail";
+ gpios = <&pinctrl 9 1>;
+ };
+
+ post_failed {
+ label = "96318REF_P300:red:post-failed";
+ gpios = <&pinctrl 11 1>;
+ };
+
+ usb_pwron {
+ label = "96318REF_P300::usb-pwron";
+ gpios = <&pinctrl 13 1>;
+ default-state = "on";
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <62500000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_pwron>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96318REF reference board";
+ compatible = "brcm,bcm96318ref", "brcm,bcm6318";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet {
+ label = "96318REF:green:inet";
+ gpios = <&pinctrl 8 1>;
+ };
+
+ inet_fail {
+ label = "96318REF:red:inet-fail";
+ gpios = <&pinctrl 9 1>;
+ };
+
+ post_failed {
+ label = "96318REF:red:post-failed";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <62500000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_pwron>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend AR-5315u";
+ compatible = "comtrend,ar-5315u", "brcm,bcm6318";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 3 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wps_green {
+ label = "AR-5315u:green:wps";
+ gpios = <&pinctrl 0 1>;
+ };
+ power_green {
+ label = "AR-5315u:green:power";
+ gpios = <&pinctrl 1 1>;
+ default-state = "on";
+ };
+ usb_green {
+ label = "AR-5315u:green:usb";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_green {
+ label = "AR-5315u:green:inet";
+ gpios = <&pinctrl 8 1>;
+ };
+ inet_red {
+ label = "AR-5315u:red:inet";
+ gpios = <&pinctrl 9 1>;
+ };
+ dsl_green {
+ label = "AR-5315u:green:dsl";
+ gpios = <&pinctrl 10 1>;
+ };
+ power_red {
+ label = "AR-5315u:red:power";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <62500000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0xfe0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@ff0000 {
+ reg = <0xff0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ephy0_act_led &pinctrl_ephy1_act_led
+ &pinctrl_ephy2_act_led &pinctrl_ephy3_act_led>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "D-Link DSL-2750B/DSL-2751 rev D1";
+ compatible = "d-link,dsl-275xb-d1", "brcm,bcm6318";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wifi {
+ label = "wifi";
+ gpios = <&pinctrl 2 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "dsl-275xb:green:power";
+ gpios = <&pinctrl 3 1>;
+ default-state = "on";
+ };
+
+ inet_green {
+ label = "dsl-275xb:green:inet";
+ gpios = <&pinctrl 8 1>;
+ };
+
+ inet_red {
+ label = "dsl-275xb:red:inet-fail";
+ gpios = <&pinctrl 9 1>;
+ };
+
+ power_red {
+ label = "dsl-275xb:red:post-failed";
+ gpios = <&pinctrl 11 1>;
+ };
+
+ wps_blue {
+ label = "dsl-275xb:blue:wps";
+ gpios = <&pinctrl 16 1>;
+ };
+
+ dsl_green {
+ label = "dsl-275xb:green:dsl";
+ gpios = <&pinctrl 17 1>;
+ };
+
+ usb_green {
+ /* not user controllable? */
+ label = "dsl-275xb:green:usb";
+ gpios = <&pinctrl 49 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <62500000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0x7e0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ reg = <0x7f0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+
+ pinctrl-0 = <&pinctrl_ephy0_act_led &pinctrl_ephy1_act_led
+ &pinctrl_ephy2_act_led &pinctrl_ephy3_act_led>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6318.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Sagem F@st 2704N";
+ compatible = "sagem,fast-2704n", "brcm,bcm6318";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 1 0>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ wps_green {
+ label = "F@ST2704N:green:wps";
+ gpios = <&pinctrl 2 1>;
+ };
+ lan1_green {
+ label = "F@ST2704N:green:lan1";
+ gpios = <&pinctrl 4 1>;
+ };
+ lan2_green {
+ label = "F@ST2704N:green:lan2";
+ gpios = <&pinctrl 5 1>;
+ };
+ lan3_green {
+ label = "F@ST2704N:green:lan3";
+ gpios = <&pinctrl 6 1>;
+ };
+ lan4_green {
+ label = "F@ST2704N:green:lan4";
+ gpios = <&pinctrl 7 1>;
+ };
+ inet_green {
+ label = "F@ST2704N:green:inet";
+ gpios = <&pinctrl 8 1>;
+ };
+ inet_red {
+ label = "F@ST2704N:red:inet";
+ gpios = <&pinctrl 9 1>;
+ };
+ dsl_green {
+ label = "F@ST2704N:green:dsl";
+ gpios = <&pinctrl 10 1>;
+ };
+ power_red {
+ label = "F@ST2704N:red:power";
+ gpios = <&pinctrl 11 1>;
+ };
+ power_green {
+ label = "F@ST2704N:green:power";
+ gpios = <&pinctrl 47 1>;
+ default-state = "on";
+ };
+ usb_green {
+ label = "F@ST2704N:green:usb";
+ gpios = <&pinctrl 49 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <62500000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0x7e0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ reg = <0x7f0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6318";
+
+ aliases {
+ pinctrl = &pinctrl;
+ serial0 = &uart0;
+ spi1 = &hsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips3300", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6318-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <24>, <25>, <26>, <27>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0x10000020 0x20>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ pinctrl: pin-controller@10000080 {
+ compatible = "brcm,bcm6318-pinctrl";
+ reg = <0x10000080 0x08>,
+ <0x10000088 0x08>,
+ <0x10000098 0x04>,
+ <0x1000009c 0x0c>,
+ <0x100000d4 0x18>;
+ reg-names = "dirout", "dat", "mode", "mux", "pad";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&ext_intc>;
+ interrupts = <0 0>, <1 0>;
+ interrupt-names = "gpio33", "gpio34";
+
+ pinctrl_ephy0_spd_led: ephy0_spd_led {
+ function = "ephy0_spd_led";
+ pins = "gpio0";
+ };
+
+ pinctrl_ephy1_spd_led: ephy1_spd_led {
+ function = "ephy1_spd_led";
+ pins = "gpio1";
+ };
+
+ pinctrl_ephy2_spd_led: ephy2_spd_led {
+ function = "ephy2_spd_led";
+ pins = "gpio2";
+ };
+
+ pinctrl_ephy3_spd_led: ephy3_spd_led {
+ function = "ephy3_spd_led";
+ pins = "gpio3";
+ };
+
+ pinctrl_ephy0_act_led: ephy0_act_led {
+ function = "ephy0_act_led";
+ pins = "gpio4";
+ };
+
+ pinctrl_ephy1_act_led: ephy1_act_led {
+ function = "ephy1_act_led";
+ pins = "gpio5";
+ };
+
+ pinctrl_ephy2_act_led: ephy2_act_led {
+ function = "ephy2_act_led";
+ pins = "gpio6";
+ };
+
+ pinctrl_ephy3_act_led: ephy3_act_led {
+ function = "ephy3_act_led";
+ pins = "gpio7";
+ };
+
+ pinctrl_serial_led: serial_led {
+ pinctrl_serial_led_data: serial_led_data {
+ function = "serial_led_data";
+ pins = "gpio6";
+ };
+
+ pinctrl_serial_led_clk: serial_led_clk {
+ function = "serial_led_clk";
+ pins = "gpio7";
+ };
+ };
+
+ pinctrl_inet_act_led: inet_act_led {
+ function = "inet_act_led";
+ pins = "gpio8";
+ };
+
+ pinctrl_inet_fail_led: inet_fail_led {
+ function = "inet_fail_led";
+ pins = "gpio9";
+ };
+
+ pinctrl_dsl_led: dsl_led {
+ function = "dsl_led";
+ pins = "gpio10";
+ };
+
+ pinctrl_post_fail_led: post_fail_led {
+ function = "post_fail_led";
+ pins = "gpio11";
+ };
+
+ pinctrl_wlan_wps_led: wlan_wps_led {
+ function = "wlan_wps_led";
+ pins = "gpio12";
+ };
+
+ pinctrl_usb_pwron: usb_pwron {
+ function = "usb_pwron";
+ pins = "gpio13";
+ };
+
+ pinctrl_usb_device_led: usb_device_led {
+ function = "usb_device_led";
+ pins = "gpio13";
+ };
+
+ pinctrl_usb_active: usb_active {
+ function = "usb_active";
+ pins = "gpio40";
+ };
+ };
+
+ uart0: serial@10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <28>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ leds: led-controller@10000200 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10000200 0x24>;
+ status = "disabled";
+ };
+
+ hsspi: spi@10003000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10003000 0x600>;
+ interrupts = <29>;
+ /* clocks = <&clkctl 25>; */
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm63268.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM963268BU_P300 reference board";
+ compatible = "brcm,bcm963268bu-p300", "brcm,bcm63268";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 32 0>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 33 0>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <20000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm63268.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Inteno VG50";
+ compatible = "inteno,vg50", "brcm,bcm63268";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 32 0>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 34 0>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <20000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm63268";
+
+ aliases {
+ pinctrl = &pinctrl;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &lsspi;
+ spi1 = &hsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <44>, <45>, <46>, <47>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0x10000020 0x20>,
+ <0x10000040 0x20>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
+
+ pinctrl: pin-controller@100000c0 {
+ compatible = "brcm,bcm63268-pinctrl";
+ reg = <0x100000c0 0x8>,
+ <0x100000c8 0x8>,
+ <0x100000d0 0x4>,
+ <0x100000d8 0x4>,
+ <0x100000dc 0x4>,
+ <0x100000f8 0x4>;
+ reg-names = "dirout", "dat", "led", "mode",
+ "ctrl", "basemode";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
+ interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
+
+ pinctrl_serial_led: serial_led {
+ pinctrl_serial_led_clk: serial_led_clk {
+ function = "serial_led_clk";
+ pins = "gpio0";
+ };
+
+ pinctrl_serial_led_data: serial_led_data {
+ function = "serial_led_data";
+ pins = "gpio1";
+ };
+ };
+
+ pinctrl_hsspi_cs4: hsspi_cs4 {
+ function = "hsspi_cs4";
+ pins = "gpio16";
+ };
+
+ pinctrl_hsspi_cs5: hsspi_cs5 {
+ function = "hsspi_cs5";
+ pins = "gpio17";
+ };
+
+ pinctrl_hsspi_cs6: hsspi_cs6 {
+ function = "hsspi_cs6";
+ pins = "gpio8";
+ };
+
+ pinctrl_hsspi_cs7: hsspi_cs7 {
+ function = "hsspi_cs7";
+ pins = "gpio9";
+ };
+
+ pinctrl_adsl_spi: adsl_spi {
+ pinctrl_adsl_spi_miso: adsl_spi_miso {
+ function = "adsl_spi_miso";
+ pins = "gpio18";
+ };
+
+ pinctrl_adsl_spi_mosi: adsl_spi_mosi {
+ function = "adsl_spi_mosi";
+ pins = "gpio19";
+ };
+ };
+
+ pinctrl_vreq_clk: vreq_clk {
+ function = "vreq_clk";
+ pins = "gpio22";
+ };
+
+ pinctrl_pcie_clkreq_b: pcie_clkreq_b {
+ function = "pcie_clkreq_b";
+ pins = "gpio23";
+ };
+
+ pinctrl_robosw_led_clk: robosw_led_clk {
+ function = "robosw_led_clk";
+ pins = "gpio30";
+ };
+
+ pinctrl_robosw_led_data: robosw_led_data {
+ function = "robosw_led_data";
+ pins = "gpio31";
+ };
+
+ pinctrl_nand: nand {
+ function = "nand";
+ group = "nand_grp";
+ };
+
+ pinctrl_gpio35_alt: gpio35_alt {
+ function = "gpio35_alt";
+ pin = "gpio35";
+ };
+
+ pinctrl_dectpd: dectpd {
+ function = "dectpd";
+ group = "dectpd_grp";
+ };
+
+ pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
+ function = "vdsl_phy_override_0";
+ group = "vdsl_phy_override_0_grp";
+ };
+
+ pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
+ function = "vdsl_phy_override_1";
+ group = "vdsl_phy_override_1_grp";
+ };
+
+ pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
+ function = "vdsl_phy_override_2";
+ group = "vdsl_phy_override_2_grp";
+ };
+
+ pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
+ function = "vdsl_phy_override_3";
+ group = "vdsl_phy_override_3_grp";
+ };
+
+ pinctrl_dsl_gpio8: dsl_gpio8 {
+ function = "dsl_gpio8";
+ group = "dsl_gpio8";
+ };
+
+ pinctrl_dsl_gpio9: dsl_gpio9 {
+ function = "dsl_gpio9";
+ group = "dsl_gpio9";
+ };
+ };
+
+ uart0: serial@10000180 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000180 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <5>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ uart1: serial@100001a0 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x100001a0 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <34>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ lsspi: spi@10000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ interrupts = <80>;
+ /* clocks = <&clkctl 15>; */
+ };
+
+ hsspi: spi@10001000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+ interrupts = <6>;
+ /* clocks = <&clkctl 16>; */
+ };
+
+ leds: led-controller@10001900 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10001900 0x24>;
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm63268.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM963269BHR reference board";
+ compatible = "brcm,bcm963269bhr", "brcm,bcm63269", "brcm,bcm63268";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 32 0>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ usb1 {
+ label = "963269BHR:green:usb1";
+ gpios = <&pinctrl 9 1>;
+ };
+
+ usb2 {
+ label = "963269BHR:green:usb2";
+ gpios = <&pinctrl 10 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <20000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "ADB P.DG A4001N";
+ compatible = "adb,a4001n", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_red {
+ label = "A4001N:red:inet";
+ gpios = <&pinctrl 1 0>;
+ };
+ power_red {
+ label = "A4001N:red:power";
+ gpios = <&pinctrl 4 0>;
+ };
+ power_green {
+ label = "A4001N:green:power";
+ gpios = <&pinctrl 8 0>;
+ default-state = "on";
+ };
+ usb_green {
+ label = "A4001N:green:usb";
+ gpios = <&pinctrl 10 1>;
+ };
+ dsl_green {
+ label = "A4001N:green:dsl";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0x7e0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ reg = <0x7f0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "ADB P.DG A4001N1";
+ compatible = "adb,a4001n1", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wlan";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_red {
+ label = "A4001N1:red:inet";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "A4001N1:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "A4001N1:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ ppp_red {
+ label = "A4001N1:red:ppp";
+ gpios = <&pinctrl 5 1>;
+ };
+ usb_green {
+ label = "A4001N1:green:3g";
+ gpios = <&pinctrl 6 1>;
+ };
+ usb_red {
+ label = "A4001N1:red:3g";
+ gpios = <&pinctrl 7 1>;
+ };
+ power_red {
+ label = "A4001N1:red:power";
+ gpios = <&pinctrl 8 1>;
+ };
+ wlan_green {
+ label = "A4001N1:green:wlan";
+ gpios = <&pinctrl 9 1>;
+ };
+ wlan_red {
+ label = "A4001N1:red:wlan";
+ gpios = <&pinctrl 10 1>;
+ };
+ inet_green {
+ label = "A4001N1:green:inet";
+ gpios = <&pinctrl 11 1>;
+ };
+ eth_red {
+ label = "A4001N1:red:eth";
+ gpios = <&pinctrl 20 1>;
+ };
+ eth_green {
+ label = "A4001N1:green:eth";
+ gpios = <&pinctrl 31 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0xfe0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@ff0000 {
+ reg = <0xff0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom bcm963281TAN reference board";
+ compatible = "brcm,bcm963281tan", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet {
+ label = "963281TAN::internet";
+ gpios = <&pinctrl 1 1>;
+ };
+ power {
+ label = "963281TAN::power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ inet_fail {
+ label = "963281TAN::internet-fail";
+ gpios = <&pinctrl 7 1>;
+ };
+ power_fail {
+ label = "963281TAN::power-fail";
+ gpios = <&pinctrl 8 1>;
+ };
+ wps {
+ label = "963281TAN::wps";
+ gpios = <&pinctrl 9 1>;
+ };
+ dsl {
+ label = "963281TAN::dsl";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96328avng reference board";
+ compatible = "brcm,bcm96328avng", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_fail {
+ label = "96328avng::internet-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ dsl {
+ label = "96328avng::dsl";
+ gpios = <&pinctrl 3 1>;
+ };
+ power {
+ label = "96328avng::power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_fail {
+ label = "96328avng::power-fail";
+ gpios = <&pinctrl 8 1>;
+ };
+ wps {
+ label = "96328avng::wps";
+ gpios = <&pinctrl 9 1>;
+ };
+ inet {
+ label = "96328avng::internet";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_usb_port1_device>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend AR-5381u";
+ compatible = "comtrend,ar-5381u", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ alarm_red {
+ label = "AR-5381u:red:alarm";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_green {
+ label = "AR-5381u:green:inet";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "AR-5381u:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0xfe0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@ff0000 {
+ reg = <0xff0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend AR-5387un";
+ compatible = "comtrend,ar-5387un", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_red {
+ label = "AR-5387un:red:inet";
+ gpios = <&pinctrl 1 0>;
+ };
+ power_red {
+ label = "AR-5387un:red:power";
+ gpios = <&pinctrl 4 0>;
+ };
+ inet_green {
+ label = "AR-5387un:green:inet";
+ gpios = <&pinctrl 7 0>;
+ };
+ power_green {
+ label = "AR-5387un:green:power";
+ gpios = <&pinctrl 8 0>;
+ default-state = "on";
+ };
+ dsl_green {
+ label = "AR-5387un:green:dsl";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0xfe0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@ff0000 {
+ reg = <0xff0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "D-Link DSL-2740B/DSL-2741B rev F1";
+ compatible = "d-link,dsl-274xb-f1", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wifi {
+ label = "wifi";
+ gpios = <&pinctrl 10 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_red {
+ label = "dsl-274xb:red:internet";
+ gpios = <&pinctrl 2 1>;
+ };
+ dsl_green {
+ label = "dsl-274xb:green:dsl";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "dsl-274xb:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "dsl-274xb:red:power";
+ gpios = <&pinctrl 8 1>;
+ };
+ wps_blue {
+ label = "dsl-274xb:blue:wps";
+ gpios = <&pinctrl 9 1>;
+ };
+ inet_green {
+ label = "dsl-274xb:green:internet";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0x7c0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ cal_data@7d0000 {
+ reg = <0x7d0000 0x010000>;
+ label = "cal_data";
+ read-only;
+ };
+
+ nvram@7e0000 {
+ reg = <0x7e0000 0x020000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "NuCom R5010UN v2";
+ compatible = "nucom,r5010un-v2", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "R5010UNv2:green:inet";
+ gpios = <&pinctrl 1 1>;
+ };
+ inet_fail_red {
+ label = "R5010UNv2:red:inet-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ dsl_red {
+ label = "R5010UNv2:green:dsl";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "R5010UNv2:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_fail_red {
+ label = "R5010UNv2:red:power-fail";
+ gpios = <&pinctrl 5 1>;
+ };
+ wps_green {
+ label = "R5010UNv2:green:wps";
+ gpios = <&pinctrl 10 1>;
+ };
+ usb_green {
+ label = "R5010UNv2:green:usb";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0x7e0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ reg = <0x7f0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Sagem F@st 2704 V2";
+ compatible = "sagem,fast-2704-v2", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ rfkill {
+ label = "rfkill";
+ gpios = <&pinctrl 15 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ usb_green {
+ label = "F@ST2704V2:green:usb";
+ gpios = <&pinctrl 1 1>;
+ };
+ inet_red {
+ label = "F@ST2704V2:red:inet";
+ gpios = <&pinctrl 2 1>;
+ };
+ dsl_green {
+ label = "F@ST2704V2:green:dsl";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "F@ST2704V2:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "F@ST2704V2:red:power";
+ gpios = <&pinctrl 5 1>;
+ };
+ wps_green {
+ label = "F@ST2704V2:green:wps";
+ gpios = <&pinctrl 10 1>;
+ };
+ inet_green {
+ label = "F@ST2704V2:green:inet";
+ gpios = <&pinctrl 11 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0x7e0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ reg = <0x7f0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6328.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Sercomm AD1018 (SPI flash mod)";
+ compatible = "sercomm,ad1018-nor", "brcm,bcm6328";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ wifi {
+ label = "wifi";
+ gpios = <&pinctrl 25 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 31 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl_leds: leds {
+ function = "led";
+ pins = "gpio0", "gpio1";
+ };
+};
+
+&leds {
+ status = "ok";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_leds &pinctrl_serial_led
+ &pinctrl_ephy0_spd_led &pinctrl_ephy1_act_led
+ &pinctrl_ephy2_act_led &pinctrl_ephy3_act_led>;
+
+ brcm,serial-leds;
+ brcm,serial-shift-inv;
+ brcm,serial-dat-low;
+
+ inet_red@0 {
+ reg = <0>;
+ active-low;
+ label = "AD1018:red:internet";
+ };
+
+ inet_green@1 {
+ reg = <1>;
+ active-low;
+ label = "AD1018:green:internet";
+ };
+
+ power_green@8 {
+ reg = <8>;
+ active-low;
+ label = "AD1018:green:power";
+ default-state = "on";
+ };
+
+ adsl_green@10 {
+ reg = <10>;
+ active-low;
+ label = "AD1018:green:adsl";
+ };
+
+ adsl_red@11 {
+ reg = <11>;
+ active-low;
+ label = "AD1018:red:adsl";
+ };
+
+ phone_green@12 {
+ reg = <12>;
+ active-low;
+ label = "AD1018:green:phone";
+ };
+
+ wps_green@13 {
+ reg = <13>;
+ active-low;
+ label = "AD1018:green:wps";
+ };
+
+ wifi_green@14 {
+ reg = <14>;
+ active-low;
+ label = "AD1018:green:wifi";
+ };
+
+ usb_green@15 {
+ reg = <15>;
+ active-low;
+ label = "AD1018:green:usb";
+ };
+
+ ephy0_spd@17 {
+ reg = <17>;
+ brcm,hardware-controlled;
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <16666667>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6328";
+
+ aliases {
+ pinctrl = &pinctrl;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi1 = &hsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <24>, <25>, <26>, <27>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0x10000020 0x10>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ pinctrl: pin-controller@10000080 {
+ compatible = "brcm,bcm6328-pinctrl";
+ reg = <0x10000080 0x8>,
+ <0x10000088 0x8>,
+ <0x10000098 0x4>,
+ <0x1000009c 0xc>;
+ reg-names = "dirout", "dat", "mode", "mux";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&ext_intc>;
+ interrupts = <3 0>, <2 0>, <0 0>, <1 0>;
+ interrupt-names = "gpio12", "gpio15",
+ "gpio23", "gpio24";
+
+ pinctrl_serial_led: serial_led {
+ pinctrl_serial_led_data: serial_led_data {
+ function = "serial_led_data";
+ pins = "gpio6";
+ };
+
+ pinctrl_serial_led_clk: serial_led_clk {
+ function = "serial_led_clk";
+ pins = "gpio7";
+ };
+ };
+
+ pinctrl_inet_act_led: inet_act_led {
+ function = "inet_act_led";
+ pins = "gpio11";
+ };
+
+ pinctrl_pcie_clkreq: pcie_clkreq {
+ function = "pcie_clkreq";
+ pins = "gpio16";
+ };
+
+ pinctrl_ephy0_spd_led: ephy0_spd_led {
+ function = "led";
+ pins = "gpio17";
+ };
+
+ pinctrl_ephy1_spd_led: ephy1_spd_led {
+ function = "led";
+ pins = "gpio18";
+ };
+
+ pinctrl_ephy2_spd_led: ephy2_spd_led {
+ function = "led";
+ pins = "gpio19";
+ };
+
+ pinctrl_ephy3_spd_led: ephy3_spd_led {
+ function = "led";
+ pins = "gpio20";
+ };
+
+ pinctrl_ephy0_act_led: ephy0_act_led {
+ function = "ephy0_act_led";
+ pins = "gpio25";
+ };
+
+ pinctrl_ephy1_act_led: ephy1_act_led {
+ function = "ephy1_act_led";
+ pins = "gpio26";
+ };
+
+ pinctrl_ephy2_act_led: ephy2_act_led {
+ function = "ephy2_act_led";
+ pins = "gpio27";
+ };
+
+ pinctrl_ephy3_act_led: ephy3_act_led {
+ function = "ephy3_act_led";
+ pins = "gpio28";
+ };
+
+ pinctrl_hsspi_cs1: hsspi_cs1 {
+ function = "hsspi_cs1";
+ pins = "hsspi_cs1";
+ };
+
+ pinctrl_usb_port1_device: usb_port1_device {
+ function = "usb_device_port";
+ pins = "usb_port1";
+ };
+
+ pinctrl_usb_port1_host: usb_port1_host {
+ function = "usb_host_port";
+ pins = "usb_port1";
+ };
+ };
+
+ uart0: serial@10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <28>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ uart1: serial@10000120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000120 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <39>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ leds: led-controller@10000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10000800 0x24>;
+ status = "disabled";
+ };
+
+ hsspi: spi@10001000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+ interrupts = <29>;
+ /* clocks = <&clkctl 9>; */
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96338GW reference board";
+ compatible = "brcm,bcm96338gw", "brcm,bcm6338";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96338GW:green:power";
+ gpios = <&gpio0 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96338GW:green:stop";
+ gpios = <&gpio0 1 1>;
+ };
+ dsl_green {
+ label = "96338GW:green:adsl";
+ gpios = <&gpio0 3 1>;
+ };
+ ppp_fail_green {
+ label = "96338GW:green:ppp-fail";
+ gpios = <&gpio0 4 1>;
+ };
+ ses_green {
+ label = "96338GW:green:ses";
+ gpios = <&gpio0 5 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96338W reference board";
+ compatible = "brcm,bcm96338w", "brcm,bcm6338";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96338W:green:power";
+ gpios = <&gpio0 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96338W:green:stop";
+ gpios = <&gpio0 1 1>;
+ };
+ dsl_green {
+ label = "96338W:green:adsl";
+ gpios = <&gpio0 3 1>;
+ };
+ ppp_fail_green {
+ label = "96338W:green:ppp-fail";
+ gpios = <&gpio0 4 1>;
+ };
+ ses_green {
+ label = "96338W:green:ses";
+ gpios = <&gpio0 5 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "D-Link DSL-2640U/BRU/C";
+ compatible = "d-link,dsl-2640u", "brcm,bcm6338";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ green_power {
+ label = "96338W2_E7T:green:power";
+ gpios = <&gpio0 0 1>;
+ default-state = "on";
+ };
+
+ green_stop {
+ label = "96338W2_E7T:green:ppp";
+ gpios = <&gpio0 4 1>;
+ };
+
+ green_adsl {
+ label = "96338W2_E7T:green:ppp-fail";
+ gpios = <&gpio0 5 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6338.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Dynalink RTA1320";
+ compatible = "dynalink,rta1320", "brcm,bcm6338";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ green_power {
+ label = "RTA1320_16M:green:power";
+ gpios = <&gpio0 0 1>;
+ default-state = "on";
+ };
+ green_stop {
+ label = "RTA1320_16M:green:stop";
+ gpios = <&gpio0 1 1>;
+ };
+ green_adsl {
+ label = "RTA1320_16M:green:adsl";
+ gpios = <&gpio0 3 1>;
+ };
+ green_ppp {
+ label = "RTA1320_16M:green:ppp";
+ gpios = <&gpio0 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6338";
+
+ aliases {
+ pflash = &pflash;
+ gpio0 = &gpio0;
+ serial0 = &uart0;
+ spi0 = &lsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips3300", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ pflash: nor@1fc00000 {
+ compatible = "cfi-flash";
+ reg = <0x1fc00000 0x400000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus@fff00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0xfffe000c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <3>, <4>, <5>, <6>;
+ };
+
+ gpio0: gpio-controller@fffe0404 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xfffe0404 4>, <0xfffe040c 4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ ngpios = <8>;
+ };
+
+ uart0: serial@fffe0300 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0300 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ lsspi: spi@fffe0c00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6348-spi";
+ reg = <0xfffe0c00 0x40>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6345.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96345GW2 reference board";
+ compatible = "brcm,bcm96345gw2", "brcm,bcm6345";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6345.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Siemens Gigaset SE515";
+ compatible = "dynalink,rta770bw", "brcm,bcm6345";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio0 13 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ usb {
+ label = "RTA770BW:green:usb";
+ gpios = <&gpio0 7 1>;
+ };
+
+ adsl {
+ label = "RTA770BW:green:adsl";
+ gpios = <&gpio0 8 0>;
+ };
+
+ diag {
+ label = "RTA770BW:green:diag";
+ gpios = <&gpio0 10 1>;
+ };
+
+ wlan {
+ label = "RTA770BW:green:wlan";
+ gpios = <&gpio0 11 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6345.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Dynalink RTA770W";
+ compatible = "dynalink,rta770w", "brcm,bcm6345";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&gpio0 13 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ usb {
+ label = "RTA770W:green:usb";
+ gpios = <&gpio0 7 1>;
+ };
+
+ adsl {
+ label = "RTA770W:green:adsl";
+ gpios = <&gpio0 8 0>;
+ };
+
+ diag {
+ label = "RTA770W:green:diag";
+ gpios = <&gpio0 10 1>;
+ };
+
+ wlan {
+ label = "RTA770W:green:wlan";
+ gpios = <&gpio0 11 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6345";
+
+ aliases {
+ pflash = &pflash;
+ serial0 = &uart0;
+ gpio0 = &gpio0;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips32", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ pflash: nor@1fc00000 {
+ compatible = "cfi-flash";
+ reg = <0x1fc00000 0x400000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus@fff00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0xfffe000c 0x9>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <3>, <4>, <5>, <6>;
+ };
+
+ uart0: serial@fffe0300 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0300 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ gpio0: gpio-controller@fffe0404 {
+ compatible = "brcm,bcm6345-gpio";
+ reg = <0xfffe0404 4>, <0xfffe0408 4>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ ngpios = <16>;
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "ASMAX AR 1004g";
+ compatible = "asmax,ar-1004g", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "AR1004G:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ inet_green {
+ label = "AR1004G:green:inet";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_red {
+ label = "AR1004G:red:power";
+ gpios = <&pinctrl 6 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_ext_mii &pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Belkin F5D7633";
+ compatible = "belkin,f5d7633", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 6 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348GW-10:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96348GW-10:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_fail_green {
+ label = "96348GW-10:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96348GW-10:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ ppp_fail_green {
+ label = "96348GW-10:green:ppp-fail";
+ gpios = <&pinctrl 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0x3c0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3e0000 {
+ label = "nvram";
+ reg = <0x3e0000 0x020000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96348GW-10 reference board";
+ compatible = "brcm,bcm96348gw-10", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 6 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348GW-10:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96348GW-10:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_fail_green {
+ label = "96348GW-10:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96348GW-10:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ ppp_fail_green {
+ label = "96348GW-10:green:ppp-fail";
+ gpios = <&pinctrl 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96348GW-11 reference board";
+ compatible = "brcm,bcm96348gw-11", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348GW-11:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96348GW-11:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_fail_green {
+ label = "96348GW-11:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96348GW-11:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ ppp_fail_green {
+ label = "96348GW-11:green:ppp-fail";
+ gpios = <&pinctrl 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96348GW reference board";
+ compatible = "brcm,bcm96348gw", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348GW:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96348GW:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_fail_green {
+ label = "96348GW:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96348GW:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ ppp_fail_green {
+ label = "96348GW:green:ppp-fail";
+ gpios = <&pinctrl 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom 96348R reference board";
+ compatible = "brcm,bcm96348r", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348R:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96348R:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_fail_green {
+ label = "96348R:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96348R:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ ppp_fail_green {
+ label = "96348R:green:ppp-fail";
+ gpios = <&pinctrl 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "BT Voyager 2110";
+ compatible = "bt,voyager-2110", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "V2110:green:power";
+ gpios = <&pinctrl 0 1>;
+ };
+ power_red {
+ label = "V2110:red:power";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_green {
+ label = "V2110:green:adsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "V2110:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ wireless_green {
+ label = "V2110:green:wireless";
+ gpios = <&pinctrl 6 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "BT Voyager 2500V";
+ compatible = "bt,voyager-2500v-bb", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 31 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "V2500V_BB:green:power";
+ gpios = <&pinctrl 0 1>;
+ };
+ power_red {
+ label = "V2500V_BB:red:power";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_green {
+ label = "V2500V_BB:green:adsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "V2500V_BB:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ wireless_green {
+ label = "V2500V_BB:green:wireless";
+ gpios = <&pinctrl 6 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend CT-5365";
+ compatible = "comtrend,ct-5365", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 35 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348A-122:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ alarm_red {
+ label = "96348A-122:red:alarm";
+ gpios = <&pinctrl 2 1>;
+ };
+ wps_green {
+ label = "96348A-122:green:wps";
+ gpios = <&pinctrl 6 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend CT-536+/CT-5621T";
+ compatible = "comtrend,ct-536plus", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "CT536_CT5621:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ adsl_fail_green {
+ label = "CT536_CT5621:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "D-Link DSL-2640B rev B2";
+ compatible = "d-link,dsl-2640b-b", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 7 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "D-4P-W:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ status {
+ label = "D-4P-W::status";
+ gpios = <&pinctrl 3 1>;
+ };
+ inet_green {
+ label = "D-4P-W:green:internet";
+ gpios = <&pinctrl 4 1>;
+ };
+ inet_red {
+ label = "D-4P-W:red:internet";
+ gpios = <&pinctrl 5 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Davolink DV-201AMR";
+ compatible = "davolink,dv-201amr", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ backup@0 {
+ label = "backup";
+ reg = <0x000000 0x400000>;
+ };
+
+ cfe@400000 {
+ label = "cfe";
+ reg = <0x400000 0x010000>;
+ read-only;
+ };
+
+ linux@410000 {
+ label = "linux";
+ reg = <0x410000 0x3f0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Dynalink RTA1025W";
+ compatible = "dynalink,rta1025w", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Inventel Livebox 1";
+ compatible = "inventel,livebox-1", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ button1 {
+ label = "1";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ button2 {
+ label = "2";
+ gpios = <&pinctrl 7 1>;
+ linux,code = <BTN_2>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ red_adsl_fail {
+ label = "Livebox1:red:adsl-fail-power";
+ gpios = <&pinctrl 0 0>;
+ default-state = "on";
+ };
+
+ red_adsl {
+ label = "Livebox1:red:adsl";
+ gpios = <&pinctrl 1 0>;
+ };
+
+ red_traffic {
+ label = "Livebox1:red:traffic";
+ gpios = <&pinctrl 2 0>;
+ };
+
+ red_phone {
+ label = "Livebox1:red:phone";
+ gpios = <&pinctrl 3 0>;
+ };
+
+ red_wifi {
+ label = "Livebox1:red:wifi";
+ gpios = <&pinctrl 4 0>;
+ };
+ };
+};
+
+&pflash {
+ reg = <0x1e400000 0x800000>;
+ status = "ok";
+
+ partitions {
+ compatible = "ecoscentric,redboot-fis-partitions";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Netgear DG834G v4";
+ compatible = "netgear,dg834g-v4", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 6 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348W3:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ status {
+ label = "96348W3:red:power";
+ gpios = <&pinctrl 1 1>;
+ };
+ inet_green {
+ label = "96348W3::adsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_red {
+ label = "96348W3::internet";
+ gpios = <&pinctrl 3 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Netgear DG834GT/PN";
+ compatible = "netgear,dg834gt-pn", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 6 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348GW-10:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96348GW-10:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_fail_green {
+ label = "96348GW-10:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96348GW-10:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ ppp_fail_green {
+ label = "96348GW-10:green:ppp-fail";
+ gpios = <&pinctrl 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Sagem F@st 2404";
+ compatible = "sagem,fast-2404", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Sagem F@st 2604";
+ compatible = "sagem,fast-2604", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "F@ST2604:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "F@ST2604:red:power";
+ gpios = <&pinctrl 1 1>;
+ };
+ inet_red {
+ label = "F@ST2604:red:inet";
+ gpios = <&pinctrl 4 1>;
+ };
+ wps_green {
+ label = "F@ST2604:green:wps";
+ gpios = <&pinctrl 5 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "T-Com Speedport W 500V";
+ compatible = "t-com,speedport-w-500v", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "SPW500V:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "SPW500V:red:power";
+ gpios = <&pinctrl 1 1>;
+ };
+ ppp_green {
+ label = "SPW500V:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ pstn_green {
+ label = "SPW500V:green:pstn";
+ gpios = <&pinctrl 28 1>;
+ };
+ voip_green {
+ label = "SPW500V:green:voip";
+ gpios = <&pinctrl 32 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "TECOM GW6000";
+ compatible = "tecom,gw6000", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "TECOM GW6200";
+ compatible = "tecom,gw6200", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ line1_green {
+ label = "GW6200:green:line1";
+ gpios = <&pinctrl 4 1>;
+ };
+ line2_green {
+ label = "GW6200:green:line2";
+ gpios = <&pinctrl 5 1>;
+ };
+ line3_green {
+ label = "GW6200:green:line3";
+ gpios = <&pinctrl 6 1>;
+ };
+ tel_green {
+ label = "GW6200:green:tel";
+ gpios = <&pinctrl 7 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Telsey CPVA502+";
+ compatible = "telsey,cpva502plus", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ phone_green {
+ label = "CPVA502+:green:phone";
+ gpios = <&pinctrl 0 1>;
+ };
+
+ link_amber {
+ label = "CPVA502+:amber:link";
+ gpios = <&pinctrl 5 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Alice W-Gate";
+ compatible = "telsey,magic", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power {
+ label = "MAGIC:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+
+ stop {
+ label = "MAGIC:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+
+ hpna {
+ label = "MAGIC:green:hpna";
+ gpios = <&pinctrl 4 1>;
+ };
+
+ status {
+ label = "MAGIC:green:adsl";
+ gpios = <&pinctrl 5 1>;
+ };
+
+ voip {
+ label = "MAGIC:green:voip";
+ gpios = <&pinctrl 22 1>;
+ };
+
+ wifi {
+ label = "MAGIC:green:wifi";
+ gpios = <&pinctrl 28 0>;
+ };
+
+ usb {
+ label = "MAGIC:green:usb";
+ gpios = <&pinctrl 35 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "TP-Link TD-W8900GB";
+ compatible = "tp-link,td-w8900gb", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 33 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96348GW-11:green:power";
+ gpios = <&pinctrl 0 1>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96348GW-11:green:stop";
+ gpios = <&pinctrl 1 1>;
+ };
+ adsl_fail_green {
+ label = "96348GW-11:green:adsl-fail";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96348GW-11:green:ppp";
+ gpios = <&pinctrl 3 1>;
+ };
+ ppp_fail_green {
+ label = "96348GW-11:green:ppp-fail";
+ gpios = <&pinctrl 4 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0x3d0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3e0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6348.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "USRobotics USR9108";
+ compatible = "usrobotics,usr9108", "brcm,bcm6348";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ usb {
+ label = "96348GW-A::usb";
+ gpios = <&pinctrl 0 1>;
+ };
+ dsl {
+ label = "96348GW-A::adsl";
+ gpios = <&pinctrl 3 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6348";
+
+ aliases {
+ pflash = &pflash;
+ pinctrl = &pinctrl;
+ serial0 = &uart0;
+ spi0 = &lsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips3300", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ pflash: nor@1fc00000 {
+ compatible = "cfi-flash";
+ reg = <0x1fc00000 0x400000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus@fff00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0xfffe000c 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>;
+ };
+
+ ext_intc: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <3>, <4>, <5>, <6>;
+
+ brcm,field-width = <5>;
+ };
+
+ pinctrl: pin-controller@fffe0400 {
+ compatible = "brcm,bcm6348-pinctrl";
+ reg = <0xfffe0400 0x8>,
+ <0xfffe0408 0x8>,
+ <0xfffe0418 0x4>;
+ reg-names = "dirout", "dat", "mode";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&ext_intc>;
+ interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
+ interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
+
+ pinctrl_ext_ephy: ext_ephy {
+ function = "ext_ephy";
+ groups = "group1", "group4";
+ };
+
+ pinctrl_mii_snoop: mii_snoop {
+ function = "ext_ephy";
+ groups = "group1", "group4";
+ };
+
+ pinctrl_legacy_led: legacy_led {
+ function = "legacy_led";
+ groups = "group4";
+ };
+
+ pinctrl_mii_pccard: mii_pccard {
+ function = "mii_pccard";
+ groups = "group1";
+ };
+
+ pinctrl_pci: pci {
+ function = "pci";
+ groups = "group2";
+ };
+
+ pinctrl_spi_master_uart: spi_master_uart {
+ function = "spi_master_uart";
+ groups = "group1";
+ };
+
+ pinctrl_ext_mii: ext_mii {
+ function = "ext_mii";
+ groups = "group0", "group3";
+ };
+
+ pinctrl_utopia: utopia {
+ function = "utopia";
+ groups = "group0", "group1", "group3";
+ };
+ };
+
+ uart0: serial@fffe0300 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0300 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ lsspi: spi@fffe0c00 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6348-spi";
+ reg = <0xfffe0c00 0x40>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Alcatel RG100A";
+ compatible = "alcatel,rg100a", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ stop_green {
+ label = "96358VW2:green:stop";
+ gpios = <&pinctrl 4 1>;
+ };
+ power_green {
+ label = "96358VW2:green:power";
+ gpios = <&pinctrl 5 1>;
+ default-state = "on";
+ };
+ adsl_green {
+ label = "96358VW2:green:adsl";
+ gpios = <&pinctrl 22 1>;
+ };
+ ppp_fail_green {
+ label = "96358VW2:green:ppp-fail";
+ gpios = <&pinctrl 23 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xfc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96358VW reference board";
+ compatible = "brcm,bcm96358vw", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "96358VW:green:power";
+ gpios = <&pinctrl 4 0>;
+ default-state = "on";
+ };
+ stop_green {
+ label = "96358VW:green:stop";
+ gpios = <&pinctrl 5 0>;
+ };
+ adsl_fail_green {
+ label = "96358VW:green:adsl-fail";
+ gpios = <&pinctrl 15 1>;
+ };
+ ppp_green {
+ label = "96358VW:green:ppp";
+ gpios = <&pinctrl 22 1>;
+ };
+ ppp_fail_green {
+ label = "96358VW:green:ppp-fail";
+ gpios = <&pinctrl 23 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96358VW2 reference board";
+ compatible = "brcm,bcm96358vw2", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ stop_green {
+ label = "96358VW2:green:stop";
+ gpios = <&pinctrl 4 1>;
+ };
+ power_green {
+ label = "96358VW2:green:power";
+ gpios = <&pinctrl 5 1>;
+ default-state = "on";
+ };
+ adsl_green {
+ label = "96358VW2:green:adsl";
+ gpios = <&pinctrl 22 1>;
+ };
+ ppp_fail_green {
+ label = "96358VW2:green:ppp-fail";
+ gpios = <&pinctrl 23 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "BT Home Hub 2.0 Type A";
+ compatible = "bt,home-hub-2-a", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ phone {
+ label = "phone";
+ gpios = <&pinctrl 1 1>;
+ linux,code = <KEY_PHONE>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 9 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 11 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+};
+
+&leds {
+ status = "ok";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial_led>;
+
+ led@0 {
+ reg = <0>;
+ active-low;
+ label = "HOMEHUB2A:red:power";
+ };
+
+ led@1 {
+ reg = <0>;
+ active-low;
+ label = "HOMEHUB2A:green:power";
+ default-state = "on";
+ };
+
+ led@2 {
+ reg = <2>;
+ active-low;
+ label = "HOMEHUB2A:blue:power";
+ };
+
+ led@3 {
+ reg = <3>;
+ active-low;
+ label = "HOMEHUB2A:red:broadband";
+ };
+
+ led@4 {
+ reg = <4>;
+ active-low;
+ label = "HOMEHUB2A:green:broadband";
+ };
+
+ led@5 {
+ reg = <5>;
+ active-low;
+ label = "HOMEHUB2A:blue:broadband";
+ };
+
+ led@6 {
+ reg = <6>;
+ active-low;
+ label = "HOMEHUB2A:red:wireless";
+ };
+
+ led@7 {
+ reg = <7>;
+ active-low;
+ label = "HOMEHUB2A:green:wireless";
+ };
+
+ led@8 {
+ reg = <8>;
+ active-low;
+ label = "HOMEHUB2A:blue:wireless";
+ };
+
+ led@9 {
+ reg = <9>;
+ active-low;
+ label = "HOMEHUB2A:red:phone";
+ };
+
+ led@10 {
+ reg = <10>;
+ active-low;
+ label = "HOMEHUB2A:green:phone";
+ };
+
+ led@11 {
+ reg = <11>;
+ active-low;
+ label = "HOMEHUB2A:blue:phone";
+ };
+
+ led@12 {
+ reg = <12>;
+ active-low;
+ label = "HOMEHUB2A:red:upgrading";
+ };
+
+ led@13 {
+ reg = <13>;
+ active-low;
+ label = "HOMEHUB2A:green:upgrading";
+ };
+
+ led@14 {
+ reg = <14>;
+ active-low;
+ label = "HOMEHUB2A:blue:upgrading";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xfc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend CT-6373";
+ compatible = "comtrend,ct-6373", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 35 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "CT6373-1:green:power";
+ gpios = <&pinctrl 0 0>;
+ default-state = "on";
+ };
+ usb_green {
+ label = "CT6373-1:green:usb";
+ gpios = <&pinctrl 3 1>;
+ };
+ wlan_green {
+ label = "CT6373-1:green:wlan";
+ gpios = <&pinctrl 9 1>;
+ };
+ };
+};
+
+&leds {
+ status = "ok";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial_led>;
+
+ led@0 {
+ reg = <0>;
+ active-low;
+ label = "CT6373-1:green:adsl";
+ };
+
+ led@1 {
+ reg = <1>;
+ active-low;
+ label = "CT6373-1:green:line";
+ };
+
+ led@2 {
+ reg = <2>;
+ active-low;
+ label = "CT6373-1:green:fxs1";
+ };
+
+ led@3 {
+ reg = <3>;
+ active-low;
+ label = "CT6373-1:green:fxs2";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "D-Link DSL-2650U";
+ compatible = "d-link,dsl-2650u", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ stop_green {
+ label = "96358VW2:green:stop";
+ gpios = <&pinctrl 4 1>;
+ };
+ power_green {
+ label = "96358VW2:green:power";
+ gpios = <&pinctrl 5 1>;
+ default-state = "on";
+ };
+ adsl_green {
+ label = "96358VW2:green:adsl";
+ gpios = <&pinctrl 22 1>;
+ };
+ ppp_fail_green {
+ label = "96358VW2:green:ppp-fail";
+ gpios = <&pinctrl 23 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "D-Link DSL-2740B/DSL-2741B rev C2/3";
+ compatible = "d-link,dsl-274xb-c2", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "dsl-274xb:green:internet";
+ gpios = <&pinctrl 2 0>;
+ };
+ power_red {
+ label = "dsl-274xb:red:power";
+ gpios = <&pinctrl 4 1>;
+ };
+ power_green {
+ label = "dsl-274xb:green:power";
+ gpios = <&pinctrl 5 1>;
+ default-state = "on";
+ };
+ dsl_green {
+ label = "dsl-274xb:green:adsl";
+ gpios = <&pinctrl 9 1>;
+ };
+ inet_red {
+ label = "dsl-274xb:red:internet";
+ gpios = <&pinctrl 10 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "D-Link DVA-G3810BN/TL";
+ compatible = "d-link,dva-g3810bn-tl", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ voip {
+ label = "DVAG3810BN::voip";
+ gpios = <&pinctrl 1 0>;
+ };
+ power {
+ label = "DVAG3810BN::power";
+ gpios = <&pinctrl 4 0>;
+ default-state = "on";
+ };
+ stop {
+ label = "DVAG3810BN::stop";
+ gpios = <&pinctrl 5 0>;
+ };
+ dsl {
+ label = "DVAG3810BN::dsl";
+ gpios = <&pinctrl 22 1>;
+ };
+ inet {
+ label = "DVAG3810BN::internet";
+ gpios = <&pinctrl 23 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Huawei EchoLife HG553";
+ compatible = "huawei,echolife-hg553", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ rfkill {
+ label = "rfkill";
+ gpios = <&pinctrl 9 1>;
+ linux,code = <KEY_RFKILL>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "HW553:blue:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "HW553:red:power";
+ gpios = <&pinctrl 5 1>;
+ };
+ hspa_red {
+ label = "HW553:red:hspa";
+ gpios = <&pinctrl 12 1>;
+ };
+ hspa_blue {
+ label = "HW553:blue:hspa";
+ gpios = <&pinctrl 13 1>;
+ };
+ lan_red {
+ label = "HW553:red:lan";
+ gpios = <&pinctrl 22 1>;
+ };
+ lan_blue {
+ label = "HW553:blue:lan";
+ gpios = <&pinctrl 23 1>;
+ };
+ wifi_red {
+ label = "HW553:red:wifi";
+ gpios = <&pinctrl 25 1>;
+ };
+ dsl_red {
+ label = "HW553:red:adsl";
+ gpios = <&pinctrl 34 1>;
+ };
+ dsl_blue {
+ label = "HW553:blue:adsl";
+ gpios = <&pinctrl 35 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xfc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Huawei EchoLife HG556a (version A)";
+ compatible = "huawei,echolife-hg556a-a", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ help {
+ label = "help";
+ gpios = <&pinctrl 8 1>;
+ linux,code = <KEY_HELP>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 9 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ restart {
+ label = "restart";
+ gpios = <&pinctrl 10 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 11 1>;
+ linux,code = <KEY_CONFIG>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ message_red {
+ label = "HW556:red:message";
+ gpios = <&pinctrl 0 1>;
+ };
+ hspa_red {
+ label = "HW556:red:hspa";
+ gpios = <&pinctrl 1 1>;
+ };
+ dsl_red {
+ label = "HW556:red:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ power_red {
+ label = "HW556:red:power";
+ gpios = <&pinctrl 3 1>;
+ default-state = "on";
+ };
+ all_red {
+ label = "HW556:red:all";
+ gpios = <&pinctrl 6 1>;
+ default-state = "on";
+ };
+ lan1_green {
+ label = "HW556:green:lan1";
+ gpios = <&pinctrl 12 1>;
+ };
+ lan1_red {
+ label = "HW556:red:lan1";
+ gpios = <&pinctrl 13 1>;
+ };
+ lan2_green {
+ label = "HW556:green:lan2";
+ gpios = <&pinctrl 15 1>;
+ };
+ lan2_red {
+ label = "HW556:red:lan2";
+ gpios = <&pinctrl 22 1>;
+ };
+ lan3_green {
+ label = "HW556:green:lan3";
+ gpios = <&pinctrl 23 1>;
+ };
+ lan3_red {
+ label = "HW556:red:lan3";
+ gpios = <&pinctrl 26 1>;
+ };
+ lan4_green {
+ label = "HW556:green:lan4";
+ gpios = <&pinctrl 27 1>;
+ };
+ lan4_red {
+ label = "HW556:red:lan4";
+ gpios = <&pinctrl 28 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xec0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ cal_data@ee0000 {
+ label = "cal_data";
+ reg = <0xee0000 0x100000>;
+ read-only;
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Huawei EchoLife HG556a (version B)";
+ compatible = "huawei,echolife-hg556a-b", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ help {
+ label = "help";
+ gpios = <&pinctrl 8 1>;
+ linux,code = <KEY_HELP>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 9 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ restart {
+ label = "restart";
+ gpios = <&pinctrl 10 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 11 1>;
+ linux,code = <KEY_CONFIG>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ message_red {
+ label = "HW556:red:message";
+ gpios = <&pinctrl 0 1>;
+ };
+ hspa_red {
+ label = "HW556:red:hspa";
+ gpios = <&pinctrl 1 1>;
+ };
+ dsl_red {
+ label = "HW556:red:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ power_red {
+ label = "HW556:red:power";
+ gpios = <&pinctrl 3 1>;
+ default-state = "on";
+ };
+ all_red {
+ label = "HW556:red:all";
+ gpios = <&pinctrl 6 1>;
+ default-state = "on";
+ };
+ lan1_green {
+ label = "HW556:green:lan1";
+ gpios = <&pinctrl 12 1>;
+ };
+ lan1_red {
+ label = "HW556:red:lan1";
+ gpios = <&pinctrl 13 1>;
+ };
+ lan2_green {
+ label = "HW556:green:lan2";
+ gpios = <&pinctrl 15 1>;
+ };
+ lan2_red {
+ label = "HW556:red:lan2";
+ gpios = <&pinctrl 22 1>;
+ };
+ lan3_green {
+ label = "HW556:green:lan3";
+ gpios = <&pinctrl 23 1>;
+ };
+ lan3_red {
+ label = "HW556:red:lan3";
+ gpios = <&pinctrl 26 1>;
+ };
+ lan4_green {
+ label = "HW556:green:lan4";
+ gpios = <&pinctrl 27 1>;
+ };
+ lan4_red {
+ label = "HW556:red:lan4";
+ gpios = <&pinctrl 28 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xec0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ cal_data@ee0000 {
+ label = "cal_data";
+ reg = <0xee0000 0x100000>;
+ read-only;
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Huawei EchoLife HG556a (version C)";
+ compatible = "huawei,echolife-hg556a-c", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ help {
+ label = "help";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_HELP>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 9 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ restart {
+ label = "restart";
+ gpios = <&pinctrl 10 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 11 1>;
+ linux,code = <KEY_CONFIG>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ lan1_green {
+ label = "HW556:green:lan1";
+ gpios = <&pinctrl 0 1>;
+ };
+ lan2_green {
+ label = "HW556:green:lan2";
+ gpios = <&pinctrl 1 1>;
+ };
+ dsl_red {
+ label = "HW556:red:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ power_red {
+ label = "HW556:red:power";
+ gpios = <&pinctrl 3 1>;
+ default-state = "on";
+ };
+ message_red {
+ label = "HW556:red:message";
+ gpios = <&pinctrl 12 1>;
+ };
+ lan1_red {
+ label = "HW556:red:lan1";
+ gpios = <&pinctrl 13 1>;
+ };
+ hspa_red {
+ label = "HW556:red:hspa";
+ gpios = <&pinctrl 15 1>;
+ };
+ lan2_red {
+ label = "HW556:red:lan2";
+ gpios = <&pinctrl 22 1>;
+ };
+ lan3_green {
+ label = "HW556:green:lan3";
+ gpios = <&pinctrl 23 1>;
+ };
+ lan3_red {
+ label = "HW556:red:lan3";
+ gpios = <&pinctrl 26 1>;
+ };
+ lan4_green {
+ label = "HW556:green:lan4";
+ gpios = <&pinctrl 27 1>;
+ };
+ lan4_red {
+ label = "HW556:red:lan4";
+ gpios = <&pinctrl 28 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xec0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ cal_data@ee0000 {
+ label = "cal_data";
+ reg = <0xee0000 0x100000>;
+ read-only;
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Pirelli A226G";
+ compatible = "pirelli,a226g", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ voip_red {
+ label = "DWV-S0:red:VoIP";
+ gpios = <&pinctrl 0 1>;
+ };
+ eth_red {
+ label = "DWV-S0:red:ethernet";
+ gpios = <&pinctrl 1 1>;
+ };
+ dsl_green {
+ label = "DWV-S0:green:ADSL";
+ gpios = <&pinctrl 2 1>;
+ };
+ usb_green {
+ label = "DWV-S0:green:USB";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "DWV-S0:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "DWV-S0:red:power";
+ gpios = <&pinctrl 5 1>;
+ };
+ inet_red {
+ label = "DWV-S0:red:internet";
+ gpios = <&pinctrl 6 1>;
+ };
+ inet_green {
+ label = "DWV-S0:green:internet";
+ gpios = <&pinctrl 7 1>;
+ };
+ eth_green {
+ label = "DWV-S0:green:ethernet";
+ gpios = <&pinctrl 8 1>;
+ };
+ voip_green {
+ label = "DWV-S0:green:VoIP";
+ gpios = <&pinctrl 9 1>;
+ };
+ wifi_red {
+ label = "DWV-S0:red:wifi";
+ gpios = <&pinctrl 10 1>;
+ };
+ usb_red {
+ label = "DWV-S0:red:USB";
+ gpios = <&pinctrl 11 1>;
+ };
+ dsl_red {
+ label = "DWV-S0:red:ADSL";
+ gpios = <&pinctrl 12 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Pirelli A226M-FWB";
+ compatible = "pirelli,a226m-fwb", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ voip_red {
+ label = "DWV-S0:red:VoIP";
+ gpios = <&pinctrl 0 1>;
+ };
+ eth_red {
+ label = "DWV-S0:red:ethernet";
+ gpios = <&pinctrl 1 1>;
+ };
+ dsl_green {
+ label = "DWV-S0:green:ADSL";
+ gpios = <&pinctrl 2 1>;
+ };
+ usb_green {
+ label = "DWV-S0:green:USB";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "DWV-S0:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "DWV-S0:red:power";
+ gpios = <&pinctrl 5 1>;
+ };
+ inet_red {
+ label = "DWV-S0:red:internet";
+ gpios = <&pinctrl 6 1>;
+ };
+ inet_green {
+ label = "DWV-S0:green:internet";
+ gpios = <&pinctrl 7 1>;
+ };
+ eth_green {
+ label = "DWV-S0:green:ethernet";
+ gpios = <&pinctrl 8 1>;
+ };
+ voip_green {
+ label = "DWV-S0:green:VoIP";
+ gpios = <&pinctrl 9 1>;
+ };
+ wifi_red {
+ label = "DWV-S0:red:wifi";
+ gpios = <&pinctrl 10 1>;
+ };
+ usb_red {
+ label = "DWV-S0:red:USB";
+ gpios = <&pinctrl 11 1>;
+ };
+ dsl_red {
+ label = "DWV-S0:red:ADSL";
+ gpios = <&pinctrl 12 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0xfc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Pirelli A226M";
+ compatible = "pirelli,a226m", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ voip_red {
+ label = "DWV-S0:red:VoIP";
+ gpios = <&pinctrl 0 1>;
+ };
+ eth_red {
+ label = "DWV-S0:red:ethernet";
+ gpios = <&pinctrl 1 1>;
+ };
+ dsl_green {
+ label = "DWV-S0:green:ADSL";
+ gpios = <&pinctrl 2 1>;
+ };
+ usb_green {
+ label = "DWV-S0:green:USB";
+ gpios = <&pinctrl 3 1>;
+ };
+ power_green {
+ label = "DWV-S0:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "DWV-S0:red:power";
+ gpios = <&pinctrl 5 1>;
+ };
+ inet_red {
+ label = "DWV-S0:red:internet";
+ gpios = <&pinctrl 6 1>;
+ };
+ inet_green {
+ label = "DWV-S0:green:internet";
+ gpios = <&pinctrl 7 1>;
+ };
+ eth_green {
+ label = "DWV-S0:green:ethernet";
+ gpios = <&pinctrl 8 1>;
+ };
+ voip_green {
+ label = "DWV-S0:green:VoIP";
+ gpios = <&pinctrl 9 1>;
+ };
+ wifi_red {
+ label = "DWV-S0:red:wifi";
+ gpios = <&pinctrl 10 1>;
+ };
+ usb_red {
+ label = "DWV-S0:red:USB";
+ gpios = <&pinctrl 11 1>;
+ };
+ dsl_red {
+ label = "DWV-S0:red:ADSL";
+ gpios = <&pinctrl 12 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Pirelli Alice Gate AGPF-S0";
+ compatible = "pirelli,agpf-s0", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "AGPF-S0:green:power";
+ gpios = <&pinctrl 4 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "AGPF-S0:red:power";
+ gpios = <&pinctrl 5 1>;
+ };
+ service_green {
+ label = "AGPF-S0:green:service";
+ gpios = <&pinctrl 6 1>;
+ };
+ service_red {
+ label = "AGPF-S0:red:service";
+ gpios = <&pinctrl 7 1>;
+ };
+ dsl_green {
+ label = "AGPF-S0:green:adsl";
+ gpios = <&pinctrl 9 1>;
+ };
+ dsl_red {
+ label = "AGPF-S0:red:adsl";
+ gpios = <&pinctrl 10 1>;
+ };
+ wifi_green {
+ label = "AGPF-S0:green:wifi";
+ gpios = <&pinctrl 22 1>;
+ };
+ wifi_red {
+ label = "AGPF-S0:red:wifi";
+ gpios = <&pinctrl 23 1>;
+ };
+ inet_red {
+ label = "AGPF-S0:red:internet";
+ gpios = <&pinctrl 24 1>;
+ };
+ inet_green {
+ label = "AGPF-S0:green:internet";
+ gpios = <&pinctrl 25 1>;
+ };
+ usr1_green {
+ label = "AGPF-S0:green:usr1";
+ gpios = <&pinctrl 26 1>;
+ };
+ usr1_red {
+ label = "AGPF-S0:red:usr1";
+ gpios = <&pinctrl 27 1>;
+ };
+ usr2_green {
+ label = "AGPF-S0:green:usr2";
+ gpios = <&pinctrl 29 1>;
+ };
+ usr2_red {
+ label = "AGPF-S0:red:usr2";
+ gpios = <&pinctrl 30 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xfc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "SFR Neufbox 4 (Foxconn)";
+ compatible = "sfr,neufbox-4-foxconn-r1", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ service {
+ label = "service";
+ gpios = <&pinctrl 27 1>;
+ linux,code = <BTN_0>;
+ debounce-interval = <60>;
+ };
+
+ clip {
+ label = "clip";
+ gpios = <&pinctrl 31 1>;
+ linux,code = <BTN_1>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ traffic_white {
+ label = "NB4-FXC-r1:white:traffic";
+ gpios = <&pinctrl 2 0>;
+ };
+ service_blue {
+ label = "NB4-FXC-r1:blue:service";
+ gpios = <&pinctrl 4 0>;
+ };
+ wifi_white {
+ label = "NB4-FXC-r1:white:wifi";
+ gpios = <&pinctrl 15 0>;
+ };
+ service_red {
+ label = "NB4-FXC-r1:red:service";
+ gpios = <&pinctrl 29 0>;
+ };
+ service_green {
+ label = "NB4-FXC-r1:green:service";
+ gpios = <&pinctrl 30 0>;
+ };
+ };
+};
+
+&leds {
+ status = "ok";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial_led>;
+
+ led@0 {
+ reg = <0>;
+ active-low;
+ label = "NB4-FXC-r1:white:alarm";
+ };
+
+ led@2 {
+ reg = <2>;
+ active-low;
+ label = "NB4-FXC-r1:white:tv";
+ };
+
+ led@3 {
+ reg = <3>;
+ active-low;
+ label = "NB4-FXC-r1:white:tel";
+ };
+
+ led@4 {
+ reg = <4>;
+ active-low;
+ label = "NB4-FXC-r1:white:adsl";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "SFR Neufbox 4 (Sercomm)";
+ compatible = "sfr,neufbox-4-sercomm-r0", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ service {
+ label = "service";
+ gpios = <&pinctrl 27 1>;
+ linux,code = <BTN_0>;
+ debounce-interval = <60>;
+ };
+
+ clip {
+ label = "clip";
+ gpios = <&pinctrl 31 1>;
+ linux,code = <BTN_1>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ traffic_white {
+ label = "NB4-SER-r0:white:traffic";
+ gpios = <&pinctrl 2 1>;
+ };
+ service_blue {
+ label = "NB4-SER-r0:blue:service";
+ gpios = <&pinctrl 4 1>;
+ };
+ wifi_white {
+ label = "NB4-SER-r0:white:wifi";
+ gpios = <&pinctrl 15 1>;
+ };
+ service_red {
+ label = "NB4-SER-r0:red:service";
+ gpios = <&pinctrl 29 1>;
+ };
+ service_green {
+ label = "NB4-SER-r0:green:service";
+ gpios = <&pinctrl 30 1>;
+ };
+ };
+};
+
+&leds {
+ status = "ok";
+
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_serial_led>;
+
+ led@0 {
+ reg = <0>;
+ active-low;
+ label = "NB4-SER-r0:white:alarm";
+ };
+
+ led@2 {
+ reg = <2>;
+ active-low;
+ label = "NB4-SER-r0:white:tv";
+ };
+
+ led@3 {
+ reg = <3>;
+ active-low;
+ label = "NB4-SER-r0:white:tel";
+ };
+
+ led@4 {
+ reg = <4>;
+ active-low;
+ label = "NB4-SER-r0:white:adsl";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "T-Com Speedport W 303V";
+ compatible = "t-com,speedport-w-303v", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 11 0>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ ses {
+ label = "ses";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ ses_green {
+ label = "spw303v:green:ses";
+ gpios = <&pinctrl 0 1>;
+ };
+ power_adsl_red {
+ label = "spw303v:red:power+adsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "spw303v:green:ppp";
+ gpios = <&pinctrl 5 1>;
+ };
+ power_adsl_green {
+ label = "spw303v:green:power+adsl";
+ gpios = <&pinctrl 22 1>;
+ default-state = "on";
+ };
+ voip_green {
+ label = "spw303v:green:voip";
+ gpios = <&pinctrl 27 1>;
+ };
+ pots_green {
+ label = "spw303v:green:pots";
+ gpios = <&pinctrl 31 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Telsey CPVA642-type (CPA-ZNTE60T)";
+ compatible = "telsey,cpva642", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 37 0>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ eth_green {
+ label = "CPVA642:green:ether";
+ gpios = <&pinctrl 1 1>;
+ };
+ phone2_green {
+ label = "CPVA642:green:phone2";
+ gpios = <&pinctrl 2 1>;
+ };
+ usb_green {
+ label = "CPVA642:green:usb";
+ gpios = <&pinctrl 3 1>;
+ };
+ phone1_green {
+ label = "CPVA642:green:phone1";
+ gpios = <&pinctrl 4 1>;
+ };
+ wifi_red {
+ label = "CPVA642:red:wifi";
+ gpios = <&pinctrl 6 1>;
+ };
+ link_red {
+ label = "CPVA642:red:link";
+ gpios = <&pinctrl 9 1>;
+ };
+ link_green {
+ label = "CPVA642:green:link";
+ gpios = <&pinctrl 10 1>;
+ };
+ power_green {
+ label = "CPVA642:green:power";
+ gpios = <&pinctrl 11 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "CPVA642:red:power";
+ gpios = <&pinctrl 14 1>;
+ };
+ wifi_green {
+ label = "CPVA642:green:wifi";
+ gpios = <&pinctrl 28 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6358";
+
+ aliases {
+ pflash = &pflash;
+ pinctrl = &pinctrl;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &lsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ pflash: nor@1e000000 {
+ compatible = "cfi-flash";
+ reg = <0x1e000000 0x2000000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ status = "disabled";
+ };
+
+ ubus@fff00000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ periph_intc: interrupt-controller@fffe000c {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0xfffe000c 0x8>,
+ <0xfffe0038 0x8>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
+
+ ext_intc0: interrupt-controller@fffe0014 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe0014 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <25>, <26>, <27>, <28>;
+ };
+
+ ext_intc1: interrupt-controller@fffe001c {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0xfffe001c 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <20>, <21>;
+ };
+
+ pinctrl: pin-controller@fffe0080 {
+ compatible = "brcm,bcm6358-pinctrl";
+ reg = <0xfffe0080 0x8>,
+ <0xfffe0088 0x8>;
+ reg-names = "dirout", "dat", "mode";
+ brcm,gpiomode = <&gpiomode>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupts-extended = <&ext_intc1 0 0>,
+ <&ext_intc1 1 0>,
+ <&ext_intc0 0 0>,
+ <&ext_intc0 1 0>,
+ <&ext_intc0 2 0>,
+ <&ext_intc0 3 0>;
+ interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
+ "gpio36", "gpio37";
+
+ pinctrl_ebi_cs: ebi_cs {
+ function = "ebi_cs";
+ groups = "ebi_cs_grp";
+ };
+
+ pinctrl_uart1: uart1 {
+ function = "uart1";
+ groups = "uart1_grp";
+ };
+
+ pinctrl_serial_led: serial_led {
+ function = "serial_led";
+ groups = "serial_led_grp";
+ };
+
+ pinctrl_legacy_led: legacy_led {
+ function = "legacy_led";
+ groups = "legacy_led_grp";
+ };
+
+ pinctrl_led: led {
+ function = "led";
+ groups = "led_grp";
+ };
+
+ pinctrl_spi_cs_23: spi_cs {
+ function = "spi_cs";
+ groups = "spi_cs_grp";
+ };
+
+ pinctrl_utopia: utopia {
+ function = "utopia";
+ groups = "utopia_grp";
+ };
+
+ pinctrl_pwm_syn_clk: pwm_syn_clk {
+ function = "pwm_syn_clk";
+ groups = "pwm_syn_clk_grp";
+ };
+
+ pinctrl_sys_irq: sys_irq {
+ function = "sys_irq";
+ groups = "sys_irq_grp";
+ };
+ };
+
+ gpiomode: gpiomode@fffe0098 {
+ compatible = "brcm,bcm6358-gpiomode", "syscon";
+ reg = <0xfffe0098 0x4>;
+ };
+
+ leds: led-controller@fffe00d0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-leds";
+ reg = <0xfffe00d0 0x8>;
+ status = "disabled";
+ };
+
+ uart0: serial@fffe0100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0100 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ uart1: serial@fffe0120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0xfffe0120 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <3>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ lsspi: spi@fffe0800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0xfffe0800 0x70c>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6358.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Huawei EchoLife HG520v";
+ compatible = "huawei,echolife-hg520v", "brcm,bcm6359", "brcm,bcm6358";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 37 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "HW520:green:net";
+ gpios = <&pinctrl 32 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6362.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "SFR Neufbox 6 (Sercomm)";
+ compatible = "sfr,neufbox-6-sercomm-r0", "brcm,bcm6361", "brcm,bcm6362";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ service {
+ label = "service";
+ gpios = <&pinctrl 10 1>;
+ linux,code = <BTN_0>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 12 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 25 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ switch {
+ compatible = "realtek,rtl8367";
+ gpio-sda = <&pinctrl 18 0>;
+ gpio-sck = <&pinctrl 20 0>;
+
+ realtek,extif0 = <1 5 1 1 1 1 1 1 2>;
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <20000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0xfe0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@ff0000 {
+ reg = <0xff0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6362.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Sagem F@st 2504N";
+ compatible = "sagem,fast-2504n", "brcm,bcm6362";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 24 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 25 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_orange {
+ label = "fast2504n:orange:power";
+ gpios = <&pinctrl 2 1>;
+ };
+ power_green {
+ label = "fast2504n:green:power";
+ gpios = <&pinctrl 10 1>;
+ default-state = "on";
+ };
+ inet_red {
+ label = "fast2504n:red:internet";
+ gpios = <&pinctrl 26 1>;
+ };
+ ok_green {
+ label = "fast2504n:green:ok";
+ gpios = <&pinctrl 28 1>;
+ };
+ ok_orange {
+ label = "fast2504n:orange:ok";
+ gpios = <&pinctrl 29 1>;
+ };
+ wlan_orangee {
+ label = "fast2504n:orange:wlan";
+ gpios = <&pinctrl 30 1>;
+ };
+ };
+};
+
+&hsspi {
+ status = "ok";
+
+ flash@0 {
+ compatible = "jedec,spi-nor";
+ spi-max-frequency = <20000000>;
+ spi-tx-bus-width = <2>;
+ spi-rx-bus-width = <2>;
+ reg = <0>;
+
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ reg = <0x000000 0x010000>;
+ label = "cfe";
+ read-only;
+ };
+
+ linux@10000 {
+ reg = <0x010000 0x7e0000>;
+ label = "linux";
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ reg = <0x7f0000 0x010000>;
+ label = "nvram";
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6362";
+
+ aliases {
+ pinctrl = &pinctrl;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &lsspi;
+ spi1 = &hsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ ext_intc: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <40>, <41>, <42>, <43>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0x10000020 0x10>,
+ <0x10000030 0x10>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
+
+ pinctrl: pin-controller@10000080 {
+ compatible = "brcm,bcm6362-pinctrl";
+ reg = <0x10000080 0x8>,
+ <0x10000088 0x8>,
+ <0x10000090 0x4>,
+ <0x10000098 0x4>,
+ <0x1000009c 0x4>,
+ <0x100000b8 0x4>;
+ reg-names = "dirout", "dat", "led",
+ "mode", "ctrl", "basemode";
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupt-parent = <&ext_intc>;
+ interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
+ interrupt-names = "gpio24", "gpio25",
+ "gpio26", "gpio27";
+
+ pinctrl_usb_device_led: usb_device_led {
+ function = "usb_device_led";
+ pins = "gpio0";
+ };
+
+ pinctrl_sys_irq: sys_irq {
+ function = "sys_irq";
+ pins = "gpio1";
+ };
+
+ pinctrl_serial_led: serial_led {
+ pinctrl_serial_led_clk: serial_led_clk {
+ function = "serial_led_clk";
+ pins = "gpio2";
+ };
+
+ pinctrl_serial_led_data: serial_led_data {
+ function = "serial_led_data";
+ pins = "gpio3";
+ };
+ };
+
+ pinctrl_robosw_led_data: robosw_led_data {
+ function = "robosw_led_data";
+ pins = "gpio4";
+ };
+
+ pinctrl_robosw_led_clk: robosw_led_clk {
+ function = "robosw_led_clk";
+ pins = "gpio5";
+ };
+
+ pinctrl_robosw_led0: robosw_led0 {
+ function = "robosw_led0";
+ pins = "gpio6";
+ };
+
+ pinctrl_robosw_led1: robosw_led1 {
+ function = "robosw_led1";
+ pins = "gpio7";
+ };
+
+ pinctrl_inet_led: inet_led {
+ function = "inet_led";
+ pins = "gpio8";
+ };
+
+ pinctrl_spi_cs2: spi_cs2 {
+ function = "spi_cs2";
+ pins = "gpio9";
+ };
+
+ pinctrl_spi_cs3: spi_cs3 {
+ function = "spi_cs3";
+ pins = "gpio10";
+ };
+
+ pinctrl_ntr_pulse: ntr_pulse {
+ function = "ntr_pulse";
+ pins = "gpio11";
+ };
+
+ pinctrl_uart1_scts: uart1_scts {
+ function = "uart1_scts";
+ pins = "gpio12";
+ };
+
+ pinctrl_uart1_srts: uart1_srts {
+ function = "uart1_srts";
+ pins = "gpio13";
+ };
+
+
+ pinctrl_uart1: uart1 {
+ pinctrl_uart1_sdin: uart1_sdin {
+ function = "uart1_sdin";
+ pins = "gpio14";
+ };
+
+ pinctrl_uart1_sdout: uart1_sdout {
+ function = "uart1_sdout";
+ pins = "gpio15";
+ };
+ };
+
+ pinctrl_adsl_spi: adsl_spi {
+ pinctrl_adsl_spi_miso: adsl_spi_miso {
+ function = "adsl_spi_miso";
+ pins = "gpio16";
+ };
+
+ pinctrl_adsl_spi_mosi: adsl_spi_mosi {
+ function = "adsl_spi_mosi";
+ pins = "gpio17";
+ };
+
+ pinctrl_adsl_spi_clk: adsl_spi_clk {
+ function = "adsl_spi_clk";
+ pins = "gpio18";
+ };
+
+ pinctrl_adsl_spi_cs: adsl_spi_cs {
+ function = "adsl_spi_cs";
+ pins = "gpio19";
+ };
+ };
+
+ pinctrl_ephy0_led: ephy0_led {
+ function = "ephy0_led";
+ pins = "gpio20";
+ };
+
+ pinctrl_ephy1_led: ephy1_led {
+ function = "ephy1_led";
+ pins = "gpio21";
+ };
+
+ pinctrl_ephy2_led: ephy2_led {
+ function = "ephy2_led";
+ pins = "gpio22";
+ };
+
+ pinctrl_ephy3_led: ephy3_led {
+ function = "ephy3_led";
+ pins = "gpio23";
+ };
+
+ pinctrl_ext_irq0: ext_irq0 {
+ function = "ext_irq0";
+ pins = "gpio24";
+ };
+
+ pinctrl_ext_irq1: ext_irq1 {
+ function = "ext_irq1";
+ pins = "gpio25";
+ };
+
+ pinctrl_ext_irq2: ext_irq2 {
+ function = "ext_irq2";
+ pins = "gpio26";
+ };
+
+ pinctrl_ext_irq3: ext_irq3 {
+ function = "ext_irq3";
+ pins = "gpio27";
+ };
+
+ pinctrl_nand: nand {
+ function = "nand";
+ group = "nand_grp";
+ };
+ };
+
+ uart0: serial@10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <3>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ uart1: serial@10000120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000120 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <4>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ lsspi: spi@10000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ interrupts = <2>;
+ /* clocks = <&clkctl 15>; */
+ };
+
+ hsspi: spi@10001000 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-hsspi";
+ reg = <0x10001000 0x600>;
+ interrupts = <5>;
+ /* clocks = <&clkctl 16>; */
+ };
+
+ leds: led-controller@10001900 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6328-leds";
+ reg = <0x10001900 0x24>;
+ status = "disabled";
+ };
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Actiontec R1000H";
+ compatible = "actiontec,r1000h", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 35 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "R1000H:green:inet";
+ gpios = <&pinctrl 5 0>;
+ };
+
+ usb_green {
+ label = "R1000H:green:usb";
+ gpios = <&pinctrl 21 1>;
+ };
+
+ power_green {
+ label = "R1000H:green:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+
+ wps_green {
+ label = "R1000H:green:wps";
+ gpios = <&pinctrl 23 1>;
+ };
+
+ power_red {
+ label = "R1000H:red:power";
+ gpios = <&pinctrl 24 0>;
+ };
+
+ wps_red {
+ label = "R1000H:red:wps";
+ gpios = <&pinctrl 30 1>;
+ };
+
+ inet_red {
+ label = "R1000H:red:inet";
+ gpios = <&pinctrl 31 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ CFE@0 {
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ reg = <0x020000 0x1fc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@1fe0000 {
+ reg = <0x1fe0000 0x20000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
+
+&uart1 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "ADB P.DG AV4202N";
+ compatible = "adb,av4202n", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 37 GPIO_ACTIVE_LOW>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_white {
+ label = "AV4202N:white:power";
+ gpios = <&pinctrl 10 GPIO_ACTIVE_LOW>;
+ default-state = "on";
+ };
+ power_red {
+ label = "AV4202N:red:power";
+ gpios = <&pinctrl 11 GPIO_ACTIVE_LOW>;
+ };
+ wan_white {
+ label = "AV4202N:white:wan";
+ gpios = <&pinctrl 26 GPIO_ACTIVE_LOW>;
+ };
+ wan_red {
+ label = "AV4202N:red:wan";
+ gpios = <&pinctrl 27 GPIO_ACTIVE_LOW>;
+ };
+ phone_white {
+ label = "AV4202N:white:phone";
+ gpios = <&pinctrl 24 GPIO_ACTIVE_LOW>;
+ };
+ phone_red {
+ label = "AV4202N:red:phone";
+ gpios = <&pinctrl 25 GPIO_ACTIVE_LOW>;
+ };
+ wifi {
+ label = "AV4202N:blue:wifi";
+ gpios = <&pinctrl 22 GPIO_ACTIVE_LOW>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xfc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96368MVNgr reference board";
+ compatible = "brcm,bcm96368mvngr", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "96368MVNgr:green:adsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_fail_green {
+ label = "96368MVNgr:green:inet-fail";
+ gpios = <&pinctrl 3 0>;
+ };
+ inet_green {
+ label = "96368MVNgr:green:inet";
+ gpios = <&pinctrl 5 0>;
+ };
+ power_green {
+ label = "96368MVNgr:green:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+ wps_green {
+ label = "96368MVNgr:green:wps";
+ gpios = <&pinctrl 23 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Broadcom BCM96368MVWG reference board";
+ compatible = "brcm,bcm96368mvwg", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "96368MVWG:green:adsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ ppp_green {
+ label = "96368MVWG:green:ppp";
+ gpios = <&pinctrl 5 0>;
+ };
+ power_green {
+ label = "96368MVWG:green:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+ wps_green {
+ label = "96368MVWG:green:wps";
+ gpios = <&pinctrl 23 1>;
+ };
+ ppp_fail_red {
+ label = "96368MVWG:red:ppp-fail";
+ gpios = <&pinctrl 31 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "brcm,bcm963xx-cfe-nor-partitions";
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend VR-3025u";
+ compatible = "comtrend,vr-3025u", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "VR-3025u:green:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_green {
+ label = "VR-3025u:green:inet";
+ gpios = <&pinctrl 5 0>;
+ };
+ power_green {
+ label = "VR-3025u:green:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+ power_red {
+ label = "VR-3025u:red:power";
+ gpios = <&pinctrl 24 0>;
+ };
+ inet_red {
+ label = "VR-3025u:red:inet";
+ gpios = <&pinctrl 31 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x0000000 0x0020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x0020000 0x1fc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@1fe0000 {
+ label = "nvram";
+ reg = <0x1fe0000 0x020000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
+ &pinctrl_ephy2_led &pinctrl_ephy3_led>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend VR-3025un";
+ compatible = "comtrend,vr-3025un", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "VR-3025un:green:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_green {
+ label = "VR-3025un:green:inet";
+ gpios = <&pinctrl 5 0>;
+ };
+ power_green {
+ label = "VR-3025un:green:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+ power_red {
+ label = "VR-3025un:red:power";
+ gpios = <&pinctrl 24 0>;
+ };
+ inet_red {
+ label = "VR-3025un:red:inet";
+ gpios = <&pinctrl 31 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
+ &pinctrl_ephy2_led &pinctrl_ephy3_led>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend VR-3026e";
+ compatible = "comtrend,vr-3026e", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "VR-3026e:green:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_green {
+ label = "VR-3026e:green:inet";
+ gpios = <&pinctrl 5 0>;
+ };
+ power_green {
+ label = "VR-3026e:green:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+ power_red {
+ label = "VR-3026e:red:power";
+ gpios = <&pinctrl 24 0>;
+ };
+ inet_red {
+ label = "VR-3026e:red:inet";
+ gpios = <&pinctrl 31 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
+ &pinctrl_ephy2_led &pinctrl_ephy3_led>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Huawei EchoLife HG622";
+ compatible = "huawei,echolife-hg622", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "HG622:green:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_green {
+ label = "HG622:green:inet";
+ gpios = <&pinctrl 5 1>;
+ };
+ usb_green {
+ label = "HG622:green:usb";
+ gpios = <&pinctrl 11 1>;
+ };
+ power_green {
+ label = "HG622:green:power";
+ gpios = <&pinctrl 22 1>;
+ default-state = "on";
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0xf80000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ cal_data@fa0000 {
+ label = "cal_data";
+ reg = <0xfa0000 0x020000>;
+ read-only;
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0xfe0000 0x020000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci_gnt0 &pinctrl_pci_req0
+ &pinctrl_pci_intb &pinctrl_pci_gnt1
+ &pinctrl_pci_req1>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Huawei EchoLife HG655b";
+ compatible = "huawei,echolife-hg655b", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 12 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 23 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "HW65x:green:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ internet_green {
+ label = "HW65x:green:internet";
+ gpios = <&pinctrl 5 1>;
+ };
+
+ usb_green {
+ label = "HW65x:green:usb";
+ gpios = <&pinctrl 14 1>;
+ };
+ power_green {
+ label = "HW65x:green:power";
+ gpios = <&pinctrl 22 1>;
+ default-state = "on";
+ };
+ voip_green {
+ label = "HW65x:green:voip";
+ gpios = <&pinctrl 25 1>;
+ };
+ wps_green {
+ label = "HW65x:green:wps";
+ gpios = <&pinctrl 27 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0x770000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ board_data@790000 {
+ label = "board_data";
+ reg = <0x790000 0x030000>;
+ };
+
+ cal_data@7c0000 {
+ label = "cal_data";
+ reg = <0x7c0000 0x020000>;
+ read-only;
+ };
+
+ nvram@7d0000 {
+ label = "nvram";
+ reg = <0x7e0000 0x020000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
+ &pinctrl_ephy2_led &pinctrl_ephy3_led>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Netgear DGND3700v1/DGND3800B";
+ compatible = "netgear,dgnd3700-v1", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 10 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 12 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 35 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_green {
+ label = "DGND3700v1_3800B:green:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_red {
+ label = "DGND3700v1_3800B:red:inet";
+ gpios = <&pinctrl 4 1>;
+ };
+ inet_green {
+ label = "DGND3700v1_3800B:green:inet";
+ gpios = <&pinctrl 5 1>;
+ };
+ wps_green {
+ label = "DGND3700v1_3800B:green:wps";
+ gpios = <&pinctrl 11 1>;
+ };
+ usbfront_green {
+ label = "DGND3700v1_3800B:green:usb-front";
+ gpios = <&pinctrl 13 1>;
+ };
+ usbback_green {
+ label = "DGND3700v1_3800B:green:usb-back";
+ gpios = <&pinctrl 14 1>;
+ };
+ power_red {
+ label = "DGND3700v1_3800B:red:power";
+ gpios = <&pinctrl 22 1>;
+ };
+ lan_green {
+ label = "DGND3700v1_3800B:green:lan";
+ gpios = <&pinctrl 23 1>;
+ };
+ power_green {
+ label = "DGND3700v1_3800B:green:power";
+ gpios = <&pinctrl 24 1>;
+ default-state = "on";
+ };
+ wifi2g_green {
+ label = "DGND3700v1_3800B:green:wifi2g";
+ gpios = <&pinctrl 26 1>;
+ };
+ wifi5g_blue {
+ label = "DGND3700v1_3800B:blue:wifi5g";
+ gpios = <&pinctrl 27 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x020000 0x1e20000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ board_data@1e40000 {
+ label = "board_data";
+ reg = <0x1e40000 0x1a0000>;
+ read-only;
+ };
+
+ nvram@1fe0000 {
+ label = "nvram";
+ reg = <0x1fe0000 0x20000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&lsspi {
+ switch@1 {
+ compatible = "brcm,bcm53115";
+ reg = <1>;
+ spi-max-frequency = <781000>;
+
+ lede,alias = "eth0";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ wan@0 {
+ reg = <0>;
+ label = "wan";
+ };
+
+ lan@1 {
+ reg = <1>;
+ label = "lan1";
+ };
+
+ lan@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ lan@3 {
+ reg = <3>;
+ label = "lan3";
+ };
+
+ lan@4 {
+ reg = <4>;
+ label = "lan4";
+ };
+
+ cpu@8 {
+ reg = <8>;
+ label = "cpu";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ };
+ };
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Observa VH4032N";
+ compatible = "observa,vh4032n", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 35 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ dsl_blue {
+ label = "VH4032N:blue:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ dsl_red {
+ label = "VH4032N:red:dsl";
+ gpios = <&pinctrl 5 1>;
+ };
+ hspa_blue {
+ label = "VH4032N:blue:hspa";
+ gpios = <&pinctrl 11 1>;
+ };
+ hspa_red {
+ label = "VH4032N:red:hspa";
+ gpios = <&pinctrl 12 1>;
+ };
+ power_blue {
+ label = "VH4032N:blue:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+ power_red {
+ label = "VH4032N:red:power";
+ gpios = <&pinctrl 24 0>;
+ };
+ voice_blue {
+ label = "VH4032N:blue:voice";
+ gpios = <&pinctrl 25 1>;
+ };
+ voice_red {
+ label = "VH4032N:red:voice";
+ gpios = <&pinctrl 26 1>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
+ &pinctrl_ephy2_led &pinctrl_ephy3_led>;
+
+ usb_hub_reset {
+ gpio-hog;
+ gpios = <27 0>;
+ output-high;
+ line-name = "usb-hub-reset-gpio";
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x0000000 0x0020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x0020000 0x1fc0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@1fe0000 {
+ label = "nvram";
+ reg = <0x1fe0000 0x020000>;
+ };
+ };
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Zyxel P870HW-51a v2";
+ compatible = "zyxel,p870hw-51a-v2", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 35 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 36 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ power_green {
+ label = "P870HW-51a:green:power";
+ gpios = <&pinctrl 0 0>;
+ default-state = "on";
+ };
+ dsl_green {
+ label = "P870HW-51a:green:dsl";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_green {
+ label = "P870HW-51a:green:inet";
+ gpios = <&pinctrl 22 1>;
+ };
+ wps_orange {
+ label = "P870HW-51a:orange:wps";
+ gpios = <&pinctrl 24 1>;
+ };
+ inet_red {
+ label = "P870HW-51a:red:inet";
+ gpios = <&pinctrl 33 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x3e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@3f0000 {
+ label = "nvram";
+ reg = <0x3f0000 0x010000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/ {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ compatible = "brcm,bcm6368";
+
+ aliases {
+ pflash = &pflash;
+ pinctrl = &pinctrl;
+ serial0 = &uart0;
+ serial1 = &uart1;
+ spi0 = &lsspi;
+ };
+
+ cpus {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ cpu@0 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <0>;
+ };
+
+ cpu@1 {
+ compatible = "brcm,bmips4350", "mips,mips4Kc";
+ device_type = "cpu";
+ reg = <1>;
+ };
+ };
+
+ cpu_intc: interrupt-controller {
+ #address-cells = <0>;
+ compatible = "mti,cpu-interrupt-controller";
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+ };
+
+ memory { device_type = "memory"; reg = <0 0>; };
+
+ ubus@10000000 {
+ #address-cells = <1>;
+ #size-cells = <1>;
+ ranges;
+ compatible = "simple-bus";
+ interrupt-parent = <&periph_intc>;
+
+ ext_intc0: interrupt-controller@10000018 {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x10000018 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <20>, <21>, <22>, <23>;
+ };
+
+ ext_intc1: interrupt-controller@1000001c {
+ compatible = "brcm,bcm6345-ext-intc";
+ reg = <0x1000001c 0x4>;
+
+ interrupt-controller;
+ #interrupt-cells = <2>;
+
+ interrupts = <24>, <25>;
+ };
+
+ periph_intc: interrupt-controller@10000020 {
+ compatible = "brcm,bcm6345-l1-intc";
+ reg = <0x10000020 0x10>,
+ <0x10000030 0x10>;
+
+ interrupt-controller;
+ #interrupt-cells = <1>;
+
+ interrupt-parent = <&cpu_intc>;
+ interrupts = <2>, <3>;
+ };
+
+ pinctrl: pin-controller@10000080 {
+ compatible = "brcm,bcm6368-pinctrl";
+ reg = <0x10000080 0x8>,
+ <0x10000088 0x8>,
+ <0x10000098 0x4>;
+ reg-names = "dirout", "dat", "mode";
+ brcm,gpiobasemode = <&gpiobasemode>;
+
+ gpio-controller;
+ #gpio-cells = <2>;
+
+ interrupts-extended = <&ext_intc1 0 0>,
+ <&ext_intc1 1 0>,
+ <&ext_intc0 0 0>,
+ <&ext_intc0 1 0>,
+ <&ext_intc0 2 0>,
+ <&ext_intc0 3 0>;
+ interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
+ "gpio36", "gpio37";
+
+ pinctrl_analog_afe_0: analog_afe_0 {
+ function = "analog_afe_0";
+ pins = "gpio0";
+ };
+
+ pinctrl_analog_afe_1: analog_afe_1 {
+ function = "analog_afe_1";
+ pins = "gpio1";
+ };
+
+ pinctrl_sys_irq: sys_irq {
+ function = "sys_irq";
+ pins = "gpio2";
+ };
+
+ pinctrl_serial_led: serial_led {
+ pinctrl_serial_led_data: serial_led_data {
+ function = "serial_led_data";
+ pins = "gpio3";
+ };
+
+ pinctrl_serial_led_clk: serial_led_clk {
+ function = "serial_led_clk";
+ pins = "gpio4";
+ };
+ };
+
+ pinctrl_inet_led: inet_led {
+ function = "inet_led";
+ pins = "gpio5";
+ };
+
+ pinctrl_ephy0_led: ephy0_led {
+ function = "ephy0_led";
+ pins = "gpio6";
+ };
+
+ pinctrl_ephy1_led: ephy1_led {
+ function = "ephy1_led";
+ pins = "gpio7";
+ };
+
+ pinctrl_ephy2_led: ephy2_led {
+ function = "ephy2_led";
+ pins = "gpio8";
+ };
+
+ pinctrl_ephy3_led: ephy3_led {
+ function = "ephy3_led";
+ pins = "gpio9";
+ };
+
+ pinctrl_robosw_led_data: robosw_led_data {
+ function = "robosw_led_data";
+ pins = "gpio10";
+ };
+
+ pinctrl_robosw_led_clk: robosw_led_clk {
+ function = "robosw_led_clk";
+ pins = "gpio11";
+ };
+
+ pinctrl_robosw_led0: robosw_led0 {
+ function = "robosw_led0";
+ pins = "gpio12";
+ };
+
+ pinctrl_robosw_led1: robosw_led1 {
+ function = "robosw_led1";
+ pins = "gpio13";
+ };
+
+ pinctrl_usb_device_led: usb_device_led {
+ function = "usb_device_led";
+ pins = "gpio14";
+ };
+
+ pinctrl_pci: pci {
+ pinctrl_pci_req1: pci_req1 {
+ function = "pci_req1";
+ pins = "gpio16";
+ };
+
+ pinctrl_pci_gnt1: pci_gnt1 {
+ function = "pci_gnt1";
+ pins = "gpio17";
+ };
+
+ pinctrl_pci_intb: pci_intb {
+ function = "pci_intb";
+ pins = "gpio18";
+ };
+
+ pinctrl_pci_req0: pci_req0 {
+ function = "pci_req0";
+ pins = "gpio19";
+ };
+
+ pinctrl_pci_gnt0: pci_gnt0 {
+ function = "pci_gnt0";
+ pins = "gpio20";
+ };
+ };
+
+ pinctrl_pcmcia: pcmcia {
+ pinctrl_pcmcia_cd1: pcmcia_cd1 {
+ function = "pcmcia_cd1";
+ pins = "gpio22";
+ };
+
+ pinctrl_pcmcia_cd2: pcmcia_cd2 {
+ function = "pcmcia_cd2";
+ pins = "gpio23";
+ };
+
+ pinctrl_pcmcia_vs1: pcmcia_vs1 {
+ function = "pcmcia_vs1";
+ pins = "gpio24";
+ };
+
+ pinctrl_pcmcia_vs2: pcmcia_vs2 {
+ function = "pcmcia_vs2";
+ pins = "gpio25";
+ };
+ };
+
+ pinctrl_ebi_cs2: ebi_cs2 {
+ function = "ebi_cs2";
+ pins = "gpio26";
+ };
+
+ pinctrl_ebi_cs3: ebi_cs3 {
+ function = "ebi_cs2";
+ pins = "gpio27";
+ };
+
+ pinctrl_spi_cs2: spi_cs2 {
+ function = "spi_cs2";
+ pins = "gpio28";
+ };
+
+ pinctrl_spi_cs3: spi_cs3 {
+ function = "spi_cs3";
+ pins = "gpio29";
+ };
+
+ pinctrl_spi_cs4: spi_cs4 {
+ function = "spi_cs4";
+ pins = "gpio30";
+ };
+
+ pinctrl_spi_cs5: spi_cs5 {
+ function = "spi_cs5";
+ pins = "gpio31";
+ };
+
+ pinctrl_uart1: uart1 {
+ function = "uart1";
+ group = "uart1_grp";
+ };
+ };
+
+ gpiobasemode: gpiobasemode@100000b8 {
+ compatible = "brcm,bcm6368-gpiobasemode", "syscon";
+ reg = <0x100000b8 0x4>;
+ };
+
+ leds: led-controller@100000d0 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-leds";
+ reg = <0x100000d0 0x8>;
+ status = "disabled";
+ };
+
+ uart0: serial@10000100 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000100 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ uart1: serial@10000120 {
+ compatible = "brcm,bcm6345-uart";
+ reg = <0x10000120 0x18>;
+
+ interrupt-parent = <&periph_intc>;
+ interrupts = <3>;
+
+ /* clocks = <&periph_clk>; */
+ /* clock-names = "refclk"; */
+
+ status = "disabled";
+ };
+
+ lsspi: spi@10000800 {
+ #address-cells = <1>;
+ #size-cells = <0>;
+ compatible = "brcm,bcm6358-spi";
+ reg = <0x10000800 0x70c>;
+ interrupts = <1>;
+ /* clocks = <&clkctl 9>; */
+ };
+ };
+
+ pflash: nor@18000000 {
+ compatible = "cfi-flash";
+ reg = <0x18000000 0x2000000>;
+ bank-width = <2>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+ status = "disabled";
+ };
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Comtrend WAP-5813n";
+ compatible = "comtrend,wap-5813n", "brcm,bcm6369", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ wlan {
+ label = "wlan";
+ gpios = <&pinctrl 32 1>;
+ linux,code = <KEY_WLAN>;
+ debounce-interval = <60>;
+ };
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 34 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 35 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ inet_green {
+ label = "WAP-5813n:green:inet";
+ gpios = <&pinctrl 5 0>;
+ };
+ power_green {
+ label = "WAP-5813n:green:power";
+ gpios = <&pinctrl 22 0>;
+ default-state = "on";
+ };
+ wps_green {
+ label = "WAP-5813n:green:wps";
+ gpios = <&pinctrl 23 1>;
+ };
+ power_red {
+ label = "WAP-5813n:red:power";
+ gpios = <&pinctrl 24 0>;
+ };
+ inet_red {
+ label = "WAP-5813n:red:inet";
+ gpios = <&pinctrl 31 0>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x000000 0x010000>;
+ read-only;
+ };
+
+ linux@10000 {
+ label = "linux";
+ reg = <0x010000 0x7e0000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ nvram@7f0000 {
+ label = "nvram";
+ reg = <0x7f0000 0x010000>;
+ };
+ };
+};
+
+&lsspi {
+ switch@0 {
+ compatible = "brcm,bcm53115";
+ reg = <0>;
+ spi-max-frequency = <781000>;
+
+ lede,alias = "eth0";
+
+ ports {
+ #address-cells = <1>;
+ #size-cells = <0>;
+
+ lan@0 {
+ reg = <0>;
+ label = "lan4";
+ };
+
+ lan@1 {
+ reg = <1>;
+ label = "lan3";
+ };
+
+ lan@2 {
+ reg = <2>;
+ label = "lan2";
+ };
+
+ lan@3 {
+ reg = <3>;
+ label = "lan1";
+ };
+
+ wan@4 {
+ reg = <4>;
+ label = "wan";
+ };
+
+ cpu@5 {
+ reg = <5>;
+ label = "cpu";
+
+ fixed-link {
+ speed = <1000>;
+ full-duplex;
+ asym-pause;
+ pause;
+ };
+ };
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+/dts-v1/;
+
+#include "bcm6368.dtsi"
+
+#include <dt-bindings/input/input.h>
+
+/ {
+ model = "Netgear EVG2000";
+ compatible = "netgear,evg2000", "brcm,bcm6369", "brcm,bcm6368";
+
+ chosen {
+ bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
+ stdout-path = "serial0:115200n8";
+ };
+
+ keys {
+ compatible = "gpio-keys-polled";
+ #address-cells = <1>;
+ #size-cells = <0>;
+ poll-interval = <20>;
+
+ reset {
+ label = "reset";
+ gpios = <&pinctrl 25 1>;
+ linux,code = <KEY_RESTART>;
+ debounce-interval = <60>;
+ };
+
+ wps {
+ label = "wps";
+ gpios = <&pinctrl 26 1>;
+ linux,code = <KEY_WPS_BUTTON>;
+ debounce-interval = <60>;
+ };
+ };
+
+ leds {
+ compatible = "gpio-leds";
+
+ voip1_green {
+ label = "EVG2000:green:voip1";
+ gpios = <&pinctrl 14 1>;
+ };
+ voip2_green {
+ label = "EVG2000:green:voip2";
+ gpios = <&pinctrl 2 1>;
+ };
+ inet_red {
+ label = "EVG2000:red:inet";
+ gpios = <&pinctrl 4 1>;
+ };
+ inet_green {
+ label = "EVG2000:green:inet";
+ gpios = <&pinctrl 5 1>;
+ };
+ usb_green {
+ label = "EVG2000:green:usb";
+ gpios = <&pinctrl 15 1>;
+ };
+ power_green {
+ label = "EVG2000:green:power";
+ gpios = <&pinctrl 22 1>;
+ default-state = "on";
+ };
+ power_red {
+ label = "EVG2000:red:power";
+ gpios = <&pinctrl 23 1>;
+ };
+ lan_green {
+ label = "EVG2000:green:lan";
+ gpios = <&pinctrl 24 1>;
+ };
+ wireless_green {
+ label = "EVG2000:green:wireless";
+ gpios = <&pinctrl 26 1>;
+ };
+ wan_green {
+ label = "EVG2000:green:wan";
+ gpios = <&pinctrl 27 1>;
+ };
+ };
+};
+
+&pflash {
+ status = "ok";
+
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cfe@0 {
+ label = "CFE";
+ reg = <0x00000000 0x00020000>;
+ read-only;
+ };
+
+ linux@20000 {
+ label = "linux";
+ reg = <0x00020000 0x00f40000>;
+ compatible = "brcm,bcm963xx-imagetag";
+ };
+
+ board_data@f60000 {
+ label = "board_data";
+ reg = <0x00f60000 0x00080000>;
+ read-only;
+ };
+
+ nvram@fe0000 {
+ label = "nvram";
+ reg = <0x00fe0000 0x00020000>;
+ };
+ };
+};
+
+&pinctrl {
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinctrl_pci>;
+};
+
+&uart0 {
+ status = "ok";
+};
--- /dev/null
+BOARDNAME:=generic
+
+define Target/Description
+ Build firmware images for BCM63XX boards without SMP support.
+endef
+
+
--- /dev/null
+#
+# Copyright (C) 2006-2015 OpenWrt.org
+# Copyright (C) 2016 LEDE project
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+include $(TOPDIR)/rules.mk
+include $(INCLUDE_DIR)/image.mk
+
+LOADADDR = 0x80010000 # RAM start + 64K
+KERNEL_ENTRY = $(LOADADDR) # Newer kernels add a jmp to the kernel_entry at the start of the binary
+LOADER_ENTRY = 0x80a00000 # RAM start + 10M, for relocate
+RAMSIZE = 0x02000000 # 32MB
+LZMA_TEXT_START = 0x81800000 # 32MB - 8MB
+
+LOADER_MAKEOPTS= \
+ KDIR=$(KDIR) \
+ LOADADDR=$(LOADADDR) \
+ KERNEL_ENTRY=$(KERNEL_ENTRY) \
+ RAMSIZE=$(RAMSIZE) \
+ LZMA_TEXT_START=$(LZMA_TEXT_START) \
+
+RELOCATE_MAKEOPTS= \
+ CACHELINE_SIZE=16 \
+ KERNEL_ADDR=$(KERNEL_ENTRY) \
+ CROSS_COMPILE=$(TARGET_CROSS) \
+ LZMA_TEXT_START=$(LOADER_ENTRY)
+
+define Build/Compile
+ rm -rf $(KDIR)/relocate
+ $(CP) ../../generic/image/relocate $(KDIR)
+ $(MAKE) -C $(KDIR)/relocate $(RELOCATE_MAKEOPTS)
+endef
+
+### Kernel scripts ###
+define Build/hcs-initramfs
+ $(STAGING_DIR_HOST)/bin/hcsmakeimage --magic_bytes=$(HCS_MAGIC_BYTES) \
+ --rev_maj=$(HCS_REV_MAJ) --rev_min=$(HCS_REV_MIN) --input_file=$@ \
+ --output_file=$@.hcs --ldaddress=$(LOADADDR)
+ mv $@.hcs $@
+endef
+
+define Build/loader-lzma
+ rm -rf $@.src
+ $(MAKE) -C lzma-loader \
+ $(LOADER_MAKEOPTS) \
+ PKG_BUILD_DIR="$@.src" \
+ TARGET_DIR="$(dir $@)" \
+ LOADER_DATA="$@" \
+ LOADER_NAME="$(notdir $@)" \
+ compile loader.$(1)
+ mv "$@.$(1)" "$@"
+ rm -rf $@.src
+endef
+
+define Build/lzma
+ # CFE is a LZMA nazi! It took me hours to find out the parameters!
+ # Also I think lzma has a bug cause it generates different output depending on
+ # if you use stdin / stdout or not. Use files instead of stdio here, cause
+ # otherwise CFE will complain and not boot the image.
+ $(STAGING_DIR_HOST)/bin/lzma e $@ -d22 -fb64 -a1 $@.lzma
+ mv $@.lzma $@
+endef
+
+define Build/lzma-cfe
+ # Strip out the length, CFE doesn't like this
+ dd if=$@ of=$@.lzma.cfe bs=5 count=1
+ dd if=$@ of=$@.lzma.cfe ibs=13 obs=5 skip=1 seek=1 conv=notrunc
+ mv $@.lzma.cfe $@
+endef
+
+define Build/relocate-kernel
+ # CFE only allows ~4 MiB for the uncompressed kernels, but uncompressed
+ # kernel might get larger than that, so let CFE unpack and load at a
+ # higher address and make the kernel relocate itself to the expected
+ # location.
+ ( \
+ dd if=$(KDIR)/relocate/loader.bin bs=32 conv=sync && \
+ perl -e '@s = stat("$@"); print pack("N", @s[7])' && \
+ cat $@ \
+ ) > $@.relocate
+ mv $@.relocate $@
+endef
+
+### Image scripts ###
+define rootfspad/jffs2-128k
+--align-rootfs
+endef
+define rootfspad/jffs2-64k
+--align-rootfs
+endef
+define rootfspad/squashfs
+endef
+
+define Image/LimitName16
+$(shell expr substr "$(1)" 1 16)
+endef
+
+define Image/FileSystemStrip
+$(firstword $(subst +,$(space),$(subst root.,,$(notdir $(1)))))
+endef
+
+define Build/cfe-bin
+ $(STAGING_DIR_HOST)/bin/imagetag -i $(IMAGE_KERNEL) -f $(IMAGE_ROOTFS) \
+ --output $@ --boardid $(CFE_BOARD_ID) --chipid $(CFE_CHIP_ID) \
+ --entry $(LOADER_ENTRY) --load-addr $(LOADER_ENTRY) \
+ --info1 "$(call Image/LimitName16,$(DEVICE_NAME))" \
+ --info2 "$(call Image/FileSystemStrip,$(IMAGE_ROOTFS))" \
+ $(call rootfspad/$(call Image/FileSystemStrip,$(IMAGE_ROOTFS))) \
+ $(CFE_EXTRAS) $(1)
+endef
+
+define Build/cfe-old-bin
+ $(TOPDIR)/scripts/brcmImage.pl -t -p \
+ -o $@ -b $(CFE_BOARD_ID) -c $(CFE_CHIP_ID) \
+ -e $(LOADER_ENTRY) -a $(LOADER_ENTRY) \
+ -k $(IMAGE_KERNEL) -r $(IMAGE_ROOTFS) \
+ $(CFE_EXTRAS)
+endef
+
+define Build/cfe-spw303v-bin
+ $(STAGING_DIR_HOST)/bin/imagetag -i $(IMAGE_KERNEL) -f $(IMAGE_ROOTFS) \
+ --output $@ --boardid $(CFE_BOARD_ID) --chipid $(CFE_CHIP_ID) \
+ --entry $(LOADER_ENTRY) --load-addr $(LOADER_ENTRY) \
+ $(call rootfspad/$(call Image/FileSystemStrip,$(IMAGE_ROOTFS))) \
+ $(CFE_EXTRAS) $(1)
+endef
+
+define Build/spw303v-bin
+ $(STAGING_DIR_HOST)/bin/spw303v -i $@ -o $@.spw303v
+ mv $@.spw303v $@
+endef
+
+define Build/zyxel-bin
+ $(STAGING_DIR_HOST)/bin/zyxbcm -i $@ -o $@.zyxel
+ mv $@.zyxel $@
+endef
+
+define Build/redboot-bin
+ # Prepare kernel and rootfs
+ dd if=$(IMAGE_KERNEL) of=$(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz bs=65536 conv=sync
+ dd if=$(IMAGE_ROOTFS) of=$(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS)) bs=64k conv=sync
+ echo -ne \\xDE\\xAD\\xC0\\xDE >> $(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS))
+ # Generate the scripted image
+ $(TOPDIR)/scripts/redboot-script.pl \
+ -k $(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz \
+ -r $(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS)) \
+ -a $(strip $(LOADER_ENTRY)) -f 0xbe430000 -l 0x7c0000 \
+ -s 0x1000 -t 20 -o $@.redbootscript
+ dd if="$@.redbootscript" of="$@.redbootscript.padded" bs=4096 conv=sync
+ cat \
+ "$@.redbootscript.padded" \
+ "$(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz" \
+ "$(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS))" \
+ > "$@"
+endef
+
+define Device/Default
+ PROFILES = Default $$(DEVICE_NAME)
+ KERNEL_DEPENDS = $$(wildcard ../dts/$$(DEVICE_DTS).dts)
+ KERNEL_INITRAMFS_SUFFIX := .elf
+ DEVICE_DTS_DIR := ../dts
+ SOC = bcm$$(CFE_CHIP_ID)
+ DEVICE_DTS = $$(SOC)-$(subst _,-,$(1))
+endef
+
+ATH5K_PACKAGES := kmod-ath5k wpad-basic
+ATH9K_PACKAGES := kmod-ath9k wpad-basic
+B43_PACKAGES := kmod-b43 wpad-basic
+BRCMWL_PACKAGES := kmod-brcm-wl nas wlc
+RT28_PACKAGES := kmod-rt2800-pci wpad-basic
+RT61_PACKAGES := kmod-rt61-pci wpad-basic
+USB1_PACKAGES := kmod-usb-ohci kmod-usb-ledtrig-usbport
+USB2_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
+
+include bcm63xx.mk
+
+$(eval $(call BuildImage))
--- /dev/null
+The image neede to flash onto a Broadcom 63xx-series board depends on the
+board, method you are using to flash, and, for web-based flash, on the version
+of the Broadcom code your router uses.
+
+There are two major revisions of the Broadcom code as far as imagetags are
+concerned, before 3.08 and after 3.08, however there are some variations
+within in that, either due to vendor differences or due to changes at
+Broadcom (it's not clear yet which is the case). In addtion Pirelli modified
+the Broadcom code, so Alice Gate models use a different imagetag than any
+other vendor.
+
+The imagetag format for flashing via CFE is the same for almost all the
+boards, and is the same for all images generated by the imagetag utility.
+Images flashable using cfe are labelled openwrt-<board>-<filesystem>-cfe.bin
+
+The imagetags for tftp/ftp flashing is based on Broadcom 3.00-3.04 imagetags
+and is known to be correct as the source code GPL and is available for reading.
+
+Broadcom code 2.21 is based on the BT Voyager firmware image I looked at. It
+may in fact be BT Voyager-specific. 2.21 is actually more difficult to deal
+with the imagetag from 3.00 as it has three different CRC calculations in
+addtition to the header CRC.
+
+Broadcom 3.00-3.02 flashing has been tested on Comtrend CT-5261, CT-536 and
+Tecom GW6000, and is the version of the flashing that was present before the
+imagetags were split by broadcom code version (early June 2009)
+
+3.04 is guessed to be the same as 3.00-3.02 based on available information
+
+Broadom 3.06 is thought to be the same as 3.00-3.02, however the only 3.06
+this author (Daniel Dickinson) has seen is the Alice Gate (Pirelli) firmware
+which is known to be different due to vendor (Pirelli) modifications to the
+Broadcom code.
+
+Broadcom 3.10 uses an imagetag that is believed to apply to all 3.10 and 3.12
+versions, and has been tested on the Tecom GW6200. This version introdec changes to
+the imagetag to deal with TR69 (a remote rouer management system developed by the
+DSL forum). There is a field for vendor-specific information, that at least in some
+cases is not optional. It is based on the hexedit of a neufbox4 firmware image, the
+information in https://dev.openwrt.org/ticket/4987, and the hexedit of a Tecom
+GW6200 image.
+
+Some boards share the same tag format, but require vendor-specific fields in
+the board. In that case the tagid is shared, but the filename of the generated
+image reflects the router for which the image was created.
+
+router |method | codever |filename
++-------------+-------------+---------+---------------------------------------
+|any |cfe+most web | any |openwrt-<board>-<fs>-cfe.bin
+|AGVoIP2+WiFi |cfe |alice3.06|openwrt-AGV2+W-cfe-<fs>-cfe.bin
+|AGVoIP2+WiFi |web |alice3.06|openwrt-AGV2+W-cfe-<fs>-cfe.bin
+|CT536 |web |3.02 |openwrt-CT536_CT5621-<fs>-cfe.bin
+|CT5621 |web |3.02 |openwrt-CT536_CT5621-<fs>-cfe.bin
+|DG834GT |web |3.02 |openwrt-DG834GT_DG834PN-<fs>-cfe.bin
+|DG834PN |web |3.02 |openwrt-DG834GT_DG834PN-<fs>-cfe.bin
+|DSL-2640B |web |3.10 |openwrt-DSL2640B-<fs>-cfe.bin
+|DSL-2740B |web |3.10 |openwrt-DSL2670B-<fs>-cfe.bin
+|F5D7633 |web |3.10 |openwrt-F5D7633-<fs>-cfe.bin
+|F@ST2404 |web |3.0X? |openwrt-F@ST2404-cfe-<fs>-cfe.bin
+|F@ST2404 |web |3.1X? |openwrt-F@ST2404-<fs>-cfe.bin
+|GW6000 |web |3.00 |openwrt-GW6000-<fs>-cfe.bin
+|GW6200 |web |3.10 |openwrt-GW6200-<fs>-cfe.bin
+|Neufbox4 |web |3.12 |openwrt-NEUFBOX4-<fs>-cfe.bin
+|TD8810A |web |3.06 |openwrt-TD8810-<fs>-cfe.bin
+|TD8810B |web |3.06 |openwrt-TD8810-<fs>-cfe.bin
+|TD8811A |web |3.06 |openwrt-TD8811-<fs>-cfe.bin
+|TD8811B |web |3.06 |openwrt-TD881-<fs>-cfe.bin
+|TD8900GB |web |3.06 |openwrt-TD8900DB<fs>-cfe.bin
+|USR9108 |web |3.0X? |openwrt-USR9108-<fs>-cfe.bin
+|V2091_BTR |web |2.21 |openwrt-V2091_BTR-<fs>-cfe.bin
+|V2091_ROI |web |2.21 |openwrt-V2091-<fs>-cfe.bin
+|V2091_WB |web |2.21 |openwrt-V2091-<fs>-cfe.bin
+|V210_BTR |web |2.21 |openwrt-V210_BTR-<fs>-cfe.bin
+|V210_ROI |web |2.21 |openwrt-V210-ROI_WB<fs>-cfe.bin
+|V210_WB |web |2.21 |openwrt-V210-ROI_WB<fs>-cfe.bin
+|V2110 |web |2.21 |openwrt-V2110-<fs>-cfe.bin
+|V2110_AA |web |2.21 |openwrt-V2110-<fs>-cfe.bin
+|V2110_ROI |web |2.21 |openwrt-V2110-<fs>-cfe.bin
+|V2500V |web |2.21 |openwrt-V2500V<fs>-cfe.bin
+|V2500V_AA |web |2.21 |openwrt-V2500V-<fs>-cfe.bin
+|V2500V_SIP_CLUB |web |2.21 |openwrt-V2500V-<fs>-cfe.bin
+
+Old imagetag routers
+--------------------
+Davolink DV201AMR
+
+Redboot routers
+---------------
+Inventel Livebox
+
+Known router->code versions
+---------------------------
+
+Vendor |Model |Code Ver
+---------------------------+------------------------------------------+--------
+Belkin |F5D7633 |3.10
+British Telecom (BT) |Voyager V2091_BTR |2.21
+British Telecom (BT) |Voyager V2091_ROI |2.21
+British Telecom (BT) |Voyager V2091_WB |2.21
+British Telecom (BT) |Voyager V210_BTR |2.21
+British Telecom (BT) |Voyager V210_ROI |2.21
+British Telecom (BT) |Voyager V210_WB |2.21
+British Telecom (BT) |Voyager V2110 |2.21
+British Telecom (BT) |Voyager V2110_AA |2.21
+British Telecom (BT) |Voyager V2110_ROI |2.21
+British Telecom (BT) |Voyager V220V |2.21
+British Telecom (BT) |Voyager V2500V |2.21
+British Telecom (BT) |Voyager V2500V_AA |2.21
+British Telecom (BT) |Voyager V2500V_SIP_CLUB |2.21
+Comtrend |CT-5261 |3.02
+Comtrend |CT-536 |3.02
+D-Link |DSL-2640B |3.10
+D-Link |DSL-2670B |3.10
+NetGear |DG834GT |3.02
+NetGear |DG834PN |3.02
+Neuf Cegetel |Neufbox 4 |3.12
+Pirelli |Alice Gate Wi-Fi (+VoIP models?) |ag 3.06
+Sagem |F@ST2404 |?
+TP-Link |TD-8810A |3.06
+TP-Link |TD-8810B |3.06
+TP-Link |TD-8811A |3.06
+TP-Link |TD-8811B |3.06
+TP-Link |TD-W8900GB |3.06
+Tecom |GW6000 |3.00
+Tecom |GW6200 |3.10
+USR |9108 |?
+
--- /dev/null
+
+#
+# BCM33XX/BCM63XX Profiles
+#
+
+define Device/bcm33xx
+ KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma bin | hcs-initramfs
+ IMAGES :=
+ HCS_MAGIC_BYTES :=
+ HCS_REV_MIN :=
+ HCS_REV_MAJ :=
+endef
+DEVICE_VARS += HCS_MAGIC_BYTES HCS_REV_MIN HCS_REV_MAJ
+
+define Device/bcm63xx
+ FILESYSTEMS := squashfs jffs2-64k jffs2-128k
+ KERNEL := kernel-bin | append-dtb | relocate-kernel | lzma | lzma-cfe
+ KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma elf
+ IMAGES := cfe.bin
+ IMAGE/cfe.bin := cfe-bin --pad $$$$(shell expr $$$$(FLASH_MB) / 2)
+ IMAGE/cfe-4M.bin := cfe-bin --pad 2
+ IMAGE/cfe-8M.bin := cfe-bin --pad 4
+ IMAGE/cfe-16M.bin := cfe-bin --pad 8
+ IMAGE/cfe-bc221.bin := cfe-bin --layoutver 5
+ IMAGE/cfe-old.bin := cfe-old-bin
+ IMAGE/sysupgrade.bin := cfe-bin
+ BLOCK_SIZE := 0x10000
+ IMAGE_OFFSET :=
+ FLASH_MB := 4
+ CFE_BOARD_ID :=
+ CFE_CHIP_ID :=
+ CFE_EXTRAS = --block-size $$(BLOCK_SIZE) --image-offset $$(if $$(IMAGE_OFFSET),$$(IMAGE_OFFSET),$$(BLOCK_SIZE))
+endef
+DEVICE_VARS += BLOCK_SIZE FLASH_MB IMAGE_OFFSET
+DEVICE_VARS += CFE_BOARD_ID CFE_CHIP_ID CFE_EXTRAS
+
+define Device/bcm63xx_netgear
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := NETGEAR
+ IMAGES := factory.chk sysupgrade.bin
+ IMAGE/factory.chk := cfe-bin | netgear-chk
+ NETGEAR_BOARD_ID :=
+ NETGEAR_REGION :=
+endef
+DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_REGION
+
+define Device/bcm63xx_redboot
+ FILESYSTEMS := squashfs
+ KERNEL := kernel-bin | append-dtb | relocate-kernel | gzip
+ KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma elf
+ IMAGES := redboot.bin
+ IMAGE/redboot.bin := redboot-bin
+ REDBOOT_PREFIX := $$(IMAGE_PREFIX)
+endef
+DEVICE_VARS += REDBOOT_PREFIX
+
+### Generic ###
+define Device/brcm_bcm963281tan
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 963281TAN
+ IMAGES := cfe-4M.bin cfe-8M.bin cfe-16M.bin
+ CFE_BOARD_ID := 963281TAN
+ CFE_CHIP_ID := 6328
+endef
+TARGET_DEVICES += brcm_bcm963281tan
+
+define Device/brcm_bcm96328avng
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96328avng
+ IMAGES := cfe-4M.bin cfe-8M.bin cfe-16M.bin
+ CFE_BOARD_ID := 96328avng
+ CFE_CHIP_ID := 6328
+endef
+TARGET_DEVICES += brcm_bcm96328avng
+
+define Device/brcm_bcm96338gw
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96338GW
+ CFE_BOARD_ID := 6338GW
+ CFE_CHIP_ID := 6338
+endef
+TARGET_DEVICES += brcm_bcm96338gw
+
+define Device/brcm_bcm96338w
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96338W
+ CFE_BOARD_ID := 6338W
+ CFE_CHIP_ID := 6338
+endef
+TARGET_DEVICES += brcm_bcm96338w
+
+define Device/brcm_bcm96345gw2
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96345GW2
+ IMAGES += cfe-bc221.bin
+ CFE_BOARD_ID := 96345GW2
+ CFE_CHIP_ID := 6345
+ DEFAULT := n
+endef
+TARGET_DEVICES += brcm_bcm96345gw2
+
+define Device/brcm_bcm96348gw
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96348GW
+ IMAGES += cfe-bc221.bin
+ CFE_BOARD_ID := 96348GW
+ CFE_CHIP_ID := 6348
+endef
+TARGET_DEVICES += brcm_bcm96348gw
+
+define Device/brcm_bcm96348gw-10
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96348GW-10
+ CFE_BOARD_ID := 96348GW-10
+ CFE_CHIP_ID := 6348
+endef
+TARGET_DEVICES += brcm_bcm96348gw-10
+
+define Device/brcm_bcm96348gw-11
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96348GW-11
+ CFE_BOARD_ID := 96348GW-11
+ CFE_CHIP_ID := 6348
+endef
+TARGET_DEVICES += brcm_bcm96348gw-11
+
+define Device/brcm_bcm96348r
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96348R
+ CFE_BOARD_ID := 96348R
+ CFE_CHIP_ID := 6348
+endef
+TARGET_DEVICES += brcm_bcm96348r
+
+define Device/brcm_bcm96358vw
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96358VW
+ CFE_BOARD_ID := 96358VW
+ CFE_CHIP_ID := 6358
+endef
+TARGET_DEVICES += brcm_bcm96358vw
+
+define Device/brcm_bcm96358vw2
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96358VW2
+ CFE_BOARD_ID := 96358VW2
+ CFE_CHIP_ID := 6358
+endef
+TARGET_DEVICES += brcm_bcm96358vw2
+
+define Device/brcm_bcm96368mvngr
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96368MVNgr
+ CFE_BOARD_ID := 96368MVNgr
+ CFE_CHIP_ID := 6368
+endef
+TARGET_DEVICES += brcm_bcm96368mvngr
+
+define Device/brcm_bcm96368mvwg
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Generic
+ DEVICE_MODEL := 96368MVWG
+ CFE_BOARD_ID := 96368MVWG
+ CFE_CHIP_ID := 6368
+endef
+TARGET_DEVICES += brcm_bcm96368mvwg
+
+### Actiontec ###
+define Device/actiontec_r1000h
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Actiontec
+ DEVICE_MODEL := R1000H
+ FILESYSTEMS := squashfs
+ CFE_BOARD_ID := 96368MVWG
+ CFE_CHIP_ID := 6368
+ FLASH_MB := 32
+ IMAGE_OFFSET := 0x20000
+ DEVICE_PACKAGES := $(USB2_PACKAGES) $(BRCMWL_PACKAGES)
+endef
+TARGET_DEVICES += actiontec_r1000h
+
+### ADB ###
+define Device/adb_a4001n
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := ADB
+ DEVICE_MODEL := P.DG A4001N
+ CFE_BOARD_ID := 96328dg2x2
+ CFE_CHIP_ID := 6328
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
+endef
+TARGET_DEVICES += adb_a4001n
+
+define Device/adb_a4001n1
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := ADB
+ DEVICE_MODEL := P.DG A4001N1
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 963281T_TEF
+ CFE_CHIP_ID := 6328
+ FLASH_MB := 16
+ DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
+endef
+TARGET_DEVICES += adb_a4001n1
+
+define Device/adb_av4202n
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := ADB
+ DEVICE_MODEL := P.DG AV4202N
+ IMAGE_OFFSET := 0x20000
+ CFE_BOARD_ID := 96368_Swiss_S1
+ CFE_CHIP_ID := 6368
+ DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
+endef
+TARGET_DEVICES += adb_av4202n
+
+### Alcatel ###
+define Device/alcatel_rg100a
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Alcatel
+ DEVICE_MODEL := RG100A
+ CFE_BOARD_ID := 96358VW2
+ CFE_CHIP_ID := 6358
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
+endef
+TARGET_DEVICES += alcatel_rg100a
+
+### Asmax ###
+define Device/asmax_ar-1004g
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Asmax
+ DEVICE_MODEL := AR 1004g
+ CFE_BOARD_ID := 96348GW-10
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += asmax_ar-1004g
+
+### Belkin ###
+define Device/belkin_f5d7633
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Belkin
+ DEVICE_MODEL := F5D7633
+ CFE_BOARD_ID := 96348GW-10
+ CFE_CHIP_ID := 6348
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += belkin_f5d7633
+
+### Broadcom ###
+define Device/brcm_bcm96318ref
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Broadcom
+ DEVICE_MODEL := BCM96318REF reference board
+ IMAGES :=
+ CFE_BOARD_ID := 96318REF
+ CFE_CHIP_ID := 6318
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES) kmod-bcm63xx-udc
+endef
+TARGET_DEVICES += brcm_bcm96318ref
+
+define Device/brcm_bcm96318ref-p300
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Broadcom
+ DEVICE_MODEL := BCM96318REF_P300 reference board
+ IMAGES :=
+ CFE_BOARD_ID := 96318REF_P300
+ CFE_CHIP_ID := 6318
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES) kmod-bcm63xx-udc
+endef
+TARGET_DEVICES += brcm_bcm96318ref-p300
+
+define Device/brcm_bcm963268bu-p300
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Broadcom
+ DEVICE_MODEL := BCM963268BU_P300 reference board
+ IMAGES :=
+ CFE_BOARD_ID := 963268BU_P300
+ CFE_CHIP_ID := 63268
+ DEVICE_PACKAGES := $(USB2_PACKAGES) kmod-bcm63xx-udc
+endef
+TARGET_DEVICES += brcm_bcm963268bu-p300
+
+define Device/brcm_bcm963269bhr
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Broadcom
+ DEVICE_MODEL := BCM963269BHR reference board
+ IMAGES :=
+ CFE_BOARD_ID := 963269BHR
+ CFE_CHIP_ID := 63268
+ SOC := bcm63269
+ DEVICE_PACKAGES := $(USB2_PACKAGES) kmod-bcm63xx-udc
+endef
+TARGET_DEVICES += brcm_bcm963269bhr
+
+### BT ###
+define Device/bt_home-hub-2-a
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := BT
+ DEVICE_MODEL := Home Hub 2.0
+ DEVICE_VARIANT := A
+ CFE_BOARD_ID := HOMEHUB2A
+ CFE_CHIP_ID := 6358
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += bt_home-hub-2-a
+
+define Device/bt_voyager-2110
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := BT
+ DEVICE_MODEL := Voyager 2110
+ CFE_BOARD_ID := V2110
+ CFE_CHIP_ID := 6348
+ CFE_EXTRAS += --layoutver 5
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += bt_voyager-2110
+
+define Device/bt_voyager-2500v-bb
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := BT
+ DEVICE_MODEL := Voyager 2500V
+ CFE_BOARD_ID := V2500V_BB
+ CFE_CHIP_ID := 6348
+ CFE_EXTRAS += --layoutver 5
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += bt_voyager-2500v-bb
+
+### Comtrend ###
+define Device/comtrend_ar-5315u
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := AR-5315u
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 96318A-1441N1
+ CFE_CHIP_ID := 6318
+ FLASH_MB := 16
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_ar-5315u
+
+define Device/comtrend_ar-5381u
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := AR-5381u
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 96328A-1241N
+ CFE_CHIP_ID := 6328
+ FLASH_MB := 16
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_ar-5381u
+
+define Device/comtrend_ar-5387un
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := AR-5387un
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 96328A-1441N1
+ CFE_CHIP_ID := 6328
+ FLASH_MB := 16
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_ar-5387un
+
+define Device/comtrend_ct-536plus
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := CT-536+
+ DEVICE_ALT0_VENDOR := Comtrend
+ DEVICE_ALT0_MODEL := CT-5621
+ CFE_BOARD_ID := 96348GW-11
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += comtrend_ct-536plus
+
+define Device/comtrend_ct-5365
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := CT-5365
+ CFE_BOARD_ID := 96348A-122
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += comtrend_ct-5365
+
+define Device/comtrend_ct-6373
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := CT-6373
+ CFE_BOARD_ID := CT6373-1
+ CFE_CHIP_ID := 6358
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_ct-6373
+
+define Device/comtrend_vr-3025u
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := VR-3025u
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 96368M-1541N
+ CFE_CHIP_ID := 6368
+ BLOCK_SIZE := 0x20000
+ FLASH_MB := 32
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_vr-3025u
+
+define Device/comtrend_vr-3025un
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := VR-3025un
+ CFE_BOARD_ID := 96368M-1341N
+ CFE_CHIP_ID := 6368
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_vr-3025un
+
+define Device/comtrend_vr-3026e
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := VR-3026e
+ CFE_BOARD_ID := 96368MT-1341N1
+ CFE_CHIP_ID := 6368
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_vr-3026e
+
+define Device/comtrend_wap-5813n
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Comtrend
+ DEVICE_MODEL := WAP-5813n
+ CFE_BOARD_ID := 96369R-1231N
+ CFE_CHIP_ID := 6368
+ FLASH_MB := 8
+ SOC := bcm6369
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += comtrend_wap-5813n
+
+### D-Link ###
+define Device/d-link_dsl-2640b-b
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DSL-2640B
+ DEVICE_VARIANT := B2
+ CFE_BOARD_ID := D-4P-W
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += d-link_dsl-2640b-b
+
+define Device/d-link_dsl-2640u
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DSL-2640U
+ DEVICE_VARIANT := C1
+ DEVICE_ALT0_VENDOR := D-Link
+ DEVICE_ALT0_MODEL := DSL-2640U/BRU/C
+ CFE_BOARD_ID := 96338W2_E7T
+ CFE_CHIP_ID := 6338
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += d-link_dsl-2640u
+
+define Device/d-link_dsl-2650u
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DSL-2650U
+ CFE_BOARD_ID := 96358VW2
+ CFE_CHIP_ID := 6358
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += d-link_dsl-2650u
+
+define Device/d-link_dsl-274xb-c2
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DSL-2740B
+ DEVICE_VARIANT := C2
+ DEVICE_ALT0_VENDOR := D-Link
+ DEVICE_ALT0_MODEL := DSL-2741B
+ DEVICE_ALT0_VARIANT := C2
+ CFE_BOARD_ID := 96358GW
+ CFE_CHIP_ID := 6358
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += d-link_dsl-274xb-c2
+
+define Device/d-link_dsl-274xb-c3
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DSL-2740B
+ DEVICE_VARIANT := C3
+ DEVICE_ALT0_VENDOR := D-Link
+ DEVICE_ALT0_MODEL := DSL-2741B
+ DEVICE_ALT0_VARIANT := C3
+ DEVICE_DTS := bcm6358-d-link-dsl-274xb-c2
+ CFE_BOARD_ID := AW4139
+ CFE_CHIP_ID := 6358
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += d-link_dsl-274xb-c3
+
+define Device/d-link_dsl-274xb-f1
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DSL-2740B
+ DEVICE_VARIANT := F1
+ DEVICE_ALT0_VENDOR := D-Link
+ DEVICE_ALT0_MODEL := DSL-2741B
+ DEVICE_ALT0_VARIANT := F1
+ CFE_BOARD_ID := AW4339U
+ CFE_CHIP_ID := 6328
+ IMAGES := cfe-EU.bin cfe-AU.bin
+ IMAGE/cfe-AU.bin := cfe-bin --signature2 "4.06.01.AUF1" --pad 4
+ IMAGE/cfe-EU.bin := cfe-bin --signature2 "4.06.01.EUF1" --pad 4
+ DEVICE_PACKAGES := $(ATH9K_PACKAGES)
+endef
+TARGET_DEVICES += d-link_dsl-274xb-f1
+
+define Device/d-link_dsl-275xb-d1
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DSL-2750B
+ DEVICE_VARIANT := D1
+ DEVICE_ALT0_VENDOR := D-Link
+ DEVICE_ALT0_MODEL := DSL-2751
+ DEVICE_ALT0_VARIANT := D1
+ CFE_BOARD_ID := AW5200B
+ CFE_CHIP_ID := 6318
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += d-link_dsl-275xb-d1
+
+define Device/d-link_dva-g3810bn-tl
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := D-Link
+ DEVICE_MODEL := DVA-G3810BN/TL
+ CFE_BOARD_ID := 96358VW
+ CFE_CHIP_ID := 6358
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += d-link_dva-g3810bn-tl
+
+### Davolink ###
+define Device/davolink_dv-201amr
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Davolink
+ DEVICE_MODEL := DV-201AMR
+ IMAGES := cfe-old.bin
+ CFE_BOARD_ID := DV201AMR
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += davolink_dv-201amr
+
+### Dynalink ###
+define Device/dynalink_rta770bw
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Dynalink
+ DEVICE_MODEL := RTA770BW
+ DEVICE_ALT0_VENDOR := Siemens
+ DEVICE_ALT0_MODEL := SE515
+ IMAGES =
+ CFE_BOARD_ID := RTA770BW
+ CFE_CHIP_ID := 6345
+ CFE_EXTRAS += --layoutver 5
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += dynalink_rta770bw
+
+define Device/dynalink_rta770w
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Dynalink
+ DEVICE_MODEL := RTA770W
+ IMAGES =
+ CFE_BOARD_ID := RTA770W
+ CFE_CHIP_ID := 6345
+ CFE_EXTRAS += --layoutver 5
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += dynalink_rta770w
+
+define Device/dynalink_rta1025w
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Dynalink
+ DEVICE_MODEL := RTA1025W
+ CFE_BOARD_ID := RTA1025W_16
+ CFE_CHIP_ID := 6348
+ CFE_EXTRAS += --layoutver 5
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += dynalink_rta1025w
+
+define Device/dynalink_rta1320
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Dynalink
+ DEVICE_MODEL := RTA1320
+ CFE_BOARD_ID := RTA1320_16M
+ CFE_CHIP_ID := 6338
+ CFE_EXTRAS += --layoutver 5
+ DEFAULT := n
+endef
+TARGET_DEVICES += dynalink_rta1320
+
+### Huawei ###
+define Device/huawei_echolife-hg520v
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Huawei
+ DEVICE_MODEL := EchoLife HG520v
+ CFE_BOARD_ID := HW6358GW_B
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --rsa-signature "EchoLife_HG520v"
+ SOC := bcm6359
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += huawei_echolife-hg520v
+
+define Device/huawei_echolife-hg553
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Huawei
+ DEVICE_MODEL := EchoLife HG553
+ CFE_BOARD_ID := HW553
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --rsa-signature "EchoLife_HG553" --tag-version 7
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += huawei_echolife-hg553
+
+define Device/huawei_echolife-hg556a-a
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Huawei
+ DEVICE_MODEL := EchoLife HG556a
+ DEVICE_VARIANT := A
+ DEVICE_DESCRIPTION = Build firmware images for Huawei HG556a version A (Atheros)
+ CFE_BOARD_ID := HW556
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --rsa-signature "EchoLife_HG556a" --tag-version 8
+ IMAGE_OFFSET := 0x20000
+ DEVICE_PACKAGES := $(ATH9K_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += huawei_echolife-hg556a-a
+
+define Device/huawei_echolife-hg556a-b
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Huawei
+ DEVICE_MODEL := EchoLife HG556a
+ DEVICE_VARIANT := B
+ DEVICE_DESCRIPTION = Build firmware images for Huawei HG556a version B (Atheros)
+ CFE_BOARD_ID := HW556
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --rsa-signature "EchoLife_HG556a" --tag-version 8
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(ATH9K_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += huawei_echolife-hg556a-b
+
+define Device/huawei_echolife-hg556a-c
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Huawei
+ DEVICE_MODEL := EchoLife HG556a
+ DEVICE_VARIANT := C
+ DEVICE_DESCRIPTION = Build firmware images for Huawei HG556a version C (Ralink)
+ CFE_BOARD_ID := HW556
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --rsa-signature "EchoLife_HG556a" --tag-version 8
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(RT28_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += huawei_echolife-hg556a-c
+
+define Device/huawei_echolife-hg622
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Huawei
+ DEVICE_MODEL := EchoLife HG622
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 96368MVWG_hg622
+ CFE_CHIP_ID := 6368
+ CFE_EXTRAS += --tag-version 7
+ BLOCK_SIZE := 0x20000
+ FLASH_MB := 16
+ DEVICE_PACKAGES := $(RT28_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += huawei_echolife-hg622
+
+define Device/huawei_echolife-hg655b
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Huawei
+ DEVICE_MODEL := EchoLife HG655b
+ CFE_BOARD_ID := HW65x
+ CFE_CHIP_ID := 6368
+ CFE_EXTRAS += --tag-version 7
+ IMAGE_OFFSET := 0x20000
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(RT28_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += huawei_echolife-hg655b
+
+### Inteno ###
+define Device/inteno_vg50
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Inteno
+ DEVICE_MODEL := VG50 Multi-WAN CPE
+ IMAGES :=
+ CFE_BOARD_ID := VW6339GU
+ CFE_CHIP_ID := 63268
+ DEVICE_PACKAGES := $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += inteno_vg50
+
+### Inventel ###
+define Device/inventel_livebox-1
+ $(Device/bcm63xx_redboot)
+ DEVICE_VENDOR := Inventel
+ DEVICE_MODEL := Livebox 1
+ SOC := bcm6348
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB1_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += inventel_livebox-1
+
+### Netgear ###
+define Device/netgear_cvg834g
+ $(Device/bcm33xx)
+ DEVICE_VENDOR := NETGEAR
+ DEVICE_MODEL := CVG834G
+ SOC := bcm3368
+ HCS_MAGIC_BYTES := 0xa020
+ HCS_REV_MIN := 0001
+ HCS_REV_MAJ := 0022
+endef
+TARGET_DEVICES += netgear_cvg834g
+
+define Device/netgear_dg834gt-pn
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := NETGEAR
+ DEVICE_MODEL := DG834GT
+ DEVICE_ALT0_VENDOR := NETGEAR
+ DEVICE_ALT0_MODEL := DG834PN
+ CFE_BOARD_ID := 96348GW-10
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(ATH5K_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += netgear_dg834gt-pn
+
+define Device/netgear_dg834g-v4
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := NETGEAR
+ DEVICE_MODEL := DG834G
+ DEVICE_VARIANT := v4
+ IMAGES :=
+ CFE_BOARD_ID := 96348W3
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += netgear_dg834g-v4
+
+define Device/netgear_dgnd3700-v1
+ $(Device/bcm63xx_netgear)
+ DEVICE_MODEL := DGND3700
+ DEVICE_VARIANT := v1
+ CFE_BOARD_ID := 96368MVWG
+ CFE_CHIP_ID := 6368
+ BLOCK_SIZE := 0x20000
+ NETGEAR_BOARD_ID := U12L144T01_NETGEAR_NEWLED
+ NETGEAR_REGION := 1
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += netgear_dgnd3700-v1
+
+define Device/netgear_dgnd3800b
+ $(Device/bcm63xx_netgear)
+ DEVICE_MODEL := DGND3800B
+ DEVICE_DTS := bcm6368-netgear-dgnd3700-v1
+ CFE_BOARD_ID := 96368MVWG
+ CFE_CHIP_ID := 6368
+ BLOCK_SIZE := 0x20000
+ NETGEAR_BOARD_ID := U12L144T11_NETGEAR_NEWLED
+ NETGEAR_REGION := 1
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += netgear_dgnd3800b
+
+define Device/netgear_evg2000
+ $(Device/bcm63xx_netgear)
+ DEVICE_MODEL := EVG2000
+ CFE_BOARD_ID := 96369PVG
+ CFE_CHIP_ID := 6368
+ BLOCK_SIZE := 0x20000
+ NETGEAR_BOARD_ID := U12H154T90_NETGEAR
+ NETGEAR_REGION := 1
+ SOC := bcm6369
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += netgear_evg2000
+
+### NuCom ###
+define Device/nucom_r5010un-v2
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := NuCom
+ DEVICE_MODEL := R5010UN
+ DEVICE_VARIANT := v2
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 96328ang
+ CFE_CHIP_ID := 6328
+ FLASH_MB := 16
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += nucom_r5010un-v2
+
+### Observa ###
+define Device/observa_vh4032n
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Observa
+ DEVICE_MODEL := VH4032N
+ IMAGES += sysupgrade.bin
+ CFE_BOARD_ID := 96368VVW
+ CFE_CHIP_ID := 6368
+ BLOCK_SIZE := 0x20000
+ FLASH_MB := 32
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += observa_vh4032n
+
+### Pirelli ###
+define Device/pirelli_a226g
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Pirelli
+ DEVICE_MODEL := A226G
+ CFE_BOARD_ID := DWV-S0
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --signature2 IMAGE --tag-version 8
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += pirelli_a226g
+
+define Device/pirelli_a226m
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Pirelli
+ DEVICE_MODEL := A226M
+ CFE_BOARD_ID := DWV-S0
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --signature2 IMAGE --tag-version 8
+ DEVICE_PACKAGES := $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += pirelli_a226m
+
+define Device/pirelli_a226m-fwb
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Pirelli
+ DEVICE_MODEL := A226M-FWB
+ CFE_BOARD_ID := DWV-S0
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --signature2 IMAGE --tag-version 8
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += pirelli_a226m-fwb
+
+define Device/pirelli_agpf-s0
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Pirelli
+ DEVICE_MODEL := Alice Gate VoIP 2 Plus Wi-Fi AGPF-S0
+ CFE_BOARD_ID := AGPF-S0
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --signature2 IMAGE --tag-version 8
+ BLOCK_SIZE := 0x20000
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += pirelli_agpf-s0
+
+### Sagem ###
+define Device/sagem_fast-2404
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Sagemcom
+ DEVICE_MODEL := F@st 2404
+ CFE_BOARD_ID := F@ST2404
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += sagem_fast-2404
+
+define Device/sagem_fast-2504n
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Sagemcom
+ DEVICE_MODEL := F@st 2504N
+ CFE_BOARD_ID := F@ST2504n
+ CFE_CHIP_ID := 6362
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += sagem_fast-2504n
+
+define Device/sagem_fast-2604
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Sagemcom
+ DEVICE_MODEL := F@st 2604
+ CFE_BOARD_ID := F@ST2604
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += sagem_fast-2604
+
+define Device/sagem_fast-2704n
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Sagemcom
+ DEVICE_MODEL := F@st 2704N
+ CFE_BOARD_ID := F@ST2704N
+ CFE_CHIP_ID := 6318
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += sagem_fast-2704n
+
+define Device/sagem_fast-2704-v2
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Sagemcom
+ DEVICE_MODEL := F@st 2704
+ DEVICE_VARIANT := V2
+ CFE_BOARD_ID := F@ST2704V2
+ CFE_CHIP_ID := 6328
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += sagem_fast-2704-v2
+
+### Sercomm ###
+define Device/sercomm_ad1018-nor
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Sercomm
+ DEVICE_MODEL := AD1018
+ DEVICE_VARIANT := SPI flash mod
+ CFE_BOARD_ID := 96328avngr
+ CFE_CHIP_ID := 6328
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += sercomm_ad1018-nor
+
+### SFR ###
+define Device/sfr_neufbox-4-sercomm-r0
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := SFR
+ DEVICE_MODEL := Neufbox 4
+ DEVICE_VARIANT := Sercomm
+ CFE_BOARD_ID := 96358VW
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += sfr_neufbox-4-sercomm-r0
+
+define Device/sfr_neufbox-4-foxconn-r1
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := SFR
+ DEVICE_MODEL := Neufbox 4
+ DEVICE_VARIANT := Foxconn
+ CFE_BOARD_ID := 96358VW
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += sfr_neufbox-4-foxconn-r1
+
+define Device/sfr_neufbox-6-sercomm-r0
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := SFR
+ DEVICE_MODEL := Neufbox 6
+ CFE_BOARD_ID := NB6-SER-r0
+ CFE_CHIP_ID := 6362
+ CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
+ SOC := bcm6361
+ DEVICE_PACKAGES := $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += sfr_neufbox-6-sercomm-r0
+
+define Device/sky_sr102
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := SKY
+ DEVICE_MODEL := SR102
+ CFE_BOARD_ID := BSKYB_63168
+ CFE_CHIP_ID := 63268
+ CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
+ SOC := bcm63168
+ DEVICE_PACKAGES := $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += sky_sr102
+
+### T-Com ###
+define Device/t-com_speedport-w-303v
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := T-Com
+ DEVICE_MODEL := Speedport W 303V
+ IMAGES := factory.bin sysupgrade.bin
+ IMAGE/factory.bin := cfe-spw303v-bin --pad 4 | spw303v-bin | xor-image
+ IMAGE/sysupgrade.bin := cfe-spw303v-bin | spw303v-bin
+ CFE_BOARD_ID := 96358-502V
+ CFE_CHIP_ID := 6358
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += t-com_speedport-w-303v
+
+define Device/t-com_speedport-w-500v
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := T-Com
+ DEVICE_MODEL := Speedport W 500V
+ CFE_BOARD_ID := 96348GW
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += t-com_speedport-w-500v
+
+### Tecom ###
+define Device/tecom_gw6000
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Tecom
+ DEVICE_MODEL := GW6000
+ CFE_BOARD_ID := 96348GW
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(BRCMWL_PACKAGES) $(USB1_PACKAGES)
+endef
+TARGET_DEVICES += tecom_gw6000
+
+define Device/tecom_gw6200
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Tecom
+ DEVICE_MODEL := GW6200
+ CFE_BOARD_ID := 96348GW
+ CFE_CHIP_ID := 6348
+ CFE_EXTRAS += --rsa-signature "$(shell printf '\x99')"
+ DEVICE_PACKAGES := $(BRCMWL_PACKAGES) $(USB1_PACKAGES)
+endef
+TARGET_DEVICES += tecom_gw6200
+
+### Telsey ###
+define Device/telsey_cpva502plus
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Telsey
+ DEVICE_MODEL := CPVA502+
+ CFE_BOARD_ID := CPVA502+
+ CFE_CHIP_ID := 6348
+ CFE_EXTRAS += --signature "Telsey Tlc" --signature2 "99.99.999"
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += telsey_cpva502plus
+
+define Device/telsey_cpva642
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Telsey
+ DEVICE_MODEL := CPVA642-type (CPA-ZNTE60T)
+ CFE_BOARD_ID := CPVA642
+ CFE_CHIP_ID := 6358
+ CFE_EXTRAS += --signature "Telsey Tlc" --signature2 "99.99.999" --second-image-flag "0"
+ FLASH_MB := 8
+ DEVICE_PACKAGES := $(RT63_PACKAGES) $(USB2_PACKAGES)
+endef
+TARGET_DEVICES += telsey_cpva642
+
+define Device/telsey_magic
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := Alice
+ DEVICE_MODEL := W-Gate
+ DEVICE_ALT0_VENDOR := Telsey
+ DEVICE_ALT0_MODEL := MAGIC
+ IMAGES :=
+ CFE_BOARD_ID := MAGIC
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(RT63_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += telsey_magic
+
+### TP-Link ###
+define Device/tp-link_td-w8900gb
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := TP-Link
+ DEVICE_MODEL := TD-W8900GB
+ CFE_BOARD_ID := 96348GW-11
+ CFE_CHIP_ID := 6348
+ CFE_EXTRAS += --rsa-signature "$(shell printf 'PRID\x89\x10\x00\x02')"
+ IMAGE_OFFSET := 0x20000
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += tp-link_td-w8900gb
+
+### USRobotics ###
+define Device/usrobotics_usr9108
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := USRobotics
+ DEVICE_MODEL := USR9108
+ CFE_BOARD_ID := 96348GW-A
+ CFE_CHIP_ID := 6348
+ DEVICE_PACKAGES := $(B43_PACKAGES) $(USB1_PACKAGES)
+ DEFAULT := n
+endef
+TARGET_DEVICES += usrobotics_usr9108
+
+### ZyXEL ###
+define Device/zyxel_p870hw-51a-v2
+ $(Device/bcm63xx)
+ DEVICE_VENDOR := ZyXEL
+ DEVICE_MODEL := P870HW-51a
+ DEVICE_VARIANT := v2
+ IMAGES := factory.bin
+ IMAGE/factory.bin := cfe-bin | zyxel-bin
+ CFE_BOARD_ID := 96368VVW
+ CFE_CHIP_ID := 6368
+ CFE_EXTRAS += --rsa-signature "ZyXEL" --signature "ZyXEL_0001"
+ DEVICE_PACKAGES := $(B43_PACKAGES)
+endef
+TARGET_DEVICES += zyxel_p870hw-51a-v2
--- /dev/null
+#
+# Copyright (C) 2011 OpenWrt.org
+# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+include $(TOPDIR)/rules.mk
+
+LZMA_TEXT_START := 0x80a00000
+LOADER := loader.bin
+LOADER_NAME := $(basename $(notdir $(LOADER)))
+LOADER_DATA :=
+TARGET_DIR :=
+FLASH_OFFS :=
+FLASH_MAX :=
+
+ifeq ($(TARGET_DIR),)
+TARGET_DIR := $(KDIR)
+endif
+
+LOADER_BIN := $(TARGET_DIR)/$(LOADER_NAME).bin
+LOADER_GZ := $(TARGET_DIR)/$(LOADER_NAME).gz
+LOADER_ELF := $(TARGET_DIR)/$(LOADER_NAME).elf
+
+PKG_NAME := lzma-loader
+PKG_BUILD_DIR := $(KDIR)/$(PKG_NAME)
+
+.PHONY : loader-compile loader.bin loader.elf loader.gz
+
+$(PKG_BUILD_DIR)/.prepared:
+ mkdir $(PKG_BUILD_DIR)
+ $(CP) ./src/* $(PKG_BUILD_DIR)/
+ touch $@
+
+loader-compile: $(PKG_BUILD_DIR)/.prepared
+ $(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE="$(TARGET_CROSS)" \
+ LZMA_TEXT_START=$(LZMA_TEXT_START) \
+ LOADER_DATA=$(LOADER_DATA) \
+ FLASH_OFFS=$(FLASH_OFFS) \
+ FLASH_MAX=$(FLASH_MAX) \
+ clean all
+
+loader.gz: $(PKG_BUILD_DIR)/loader.bin
+ gzip -nc9 $< > $(LOADER_GZ)
+
+loader.elf: $(PKG_BUILD_DIR)/loader.elf
+ $(CP) $< $(LOADER_ELF)
+
+loader.bin: $(PKG_BUILD_DIR)/loader.bin
+ $(CP) $< $(LOADER_BIN)
+
+download:
+prepare: $(PKG_BUILD_DIR)/.prepared
+compile: loader-compile
+
+install:
+
+clean:
+ rm -rf $(PKG_BUILD_DIR)
+
--- /dev/null
+/*
+ LzmaDecode.c
+ LZMA Decoder (optimized for Speed version)
+
+ LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
+ http://www.7-zip.org/
+
+ LZMA SDK is licensed under two licenses:
+ 1) GNU Lesser General Public License (GNU LGPL)
+ 2) Common Public License (CPL)
+ It means that you can select one of these two licenses and
+ follow rules of that license.
+
+ SPECIAL EXCEPTION:
+ Igor Pavlov, as the author of this Code, expressly permits you to
+ statically or dynamically link your Code (or bind by name) to the
+ interfaces of this file without subjecting your linked Code to the
+ terms of the CPL or GNU LGPL. Any modifications or additions
+ to this file, however, are subject to the LGPL or CPL terms.
+*/
+
+#include "LzmaDecode.h"
+
+#define kNumTopBits 24
+#define kTopValue ((UInt32)1 << kNumTopBits)
+
+#define kNumBitModelTotalBits 11
+#define kBitModelTotal (1 << kNumBitModelTotalBits)
+#define kNumMoveBits 5
+
+#define RC_READ_BYTE (*Buffer++)
+
+#define RC_INIT2 Code = 0; Range = 0xFFFFFFFF; \
+ { int i; for(i = 0; i < 5; i++) { RC_TEST; Code = (Code << 8) | RC_READ_BYTE; }}
+
+#ifdef _LZMA_IN_CB
+
+#define RC_TEST { if (Buffer == BufferLim) \
+ { SizeT size; int result = InCallback->Read(InCallback, &Buffer, &size); if (result != LZMA_RESULT_OK) return result; \
+ BufferLim = Buffer + size; if (size == 0) return LZMA_RESULT_DATA_ERROR; }}
+
+#define RC_INIT Buffer = BufferLim = 0; RC_INIT2
+
+#else
+
+#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
+
+#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
+
+#endif
+
+#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
+
+#define IfBit0(p) RC_NORMALIZE; bound = (Range >> kNumBitModelTotalBits) * *(p); if (Code < bound)
+#define UpdateBit0(p) Range = bound; *(p) += (kBitModelTotal - *(p)) >> kNumMoveBits;
+#define UpdateBit1(p) Range -= bound; Code -= bound; *(p) -= (*(p)) >> kNumMoveBits;
+
+#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
+ { UpdateBit0(p); mi <<= 1; A0; } else \
+ { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
+
+#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
+
+#define RangeDecoderBitTreeDecode(probs, numLevels, res) \
+ { int i = numLevels; res = 1; \
+ do { CProb *p = probs + res; RC_GET_BIT(p, res) } while(--i != 0); \
+ res -= (1 << numLevels); }
+
+
+#define kNumPosBitsMax 4
+#define kNumPosStatesMax (1 << kNumPosBitsMax)
+
+#define kLenNumLowBits 3
+#define kLenNumLowSymbols (1 << kLenNumLowBits)
+#define kLenNumMidBits 3
+#define kLenNumMidSymbols (1 << kLenNumMidBits)
+#define kLenNumHighBits 8
+#define kLenNumHighSymbols (1 << kLenNumHighBits)
+
+#define LenChoice 0
+#define LenChoice2 (LenChoice + 1)
+#define LenLow (LenChoice2 + 1)
+#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
+#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
+#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
+
+
+#define kNumStates 12
+#define kNumLitStates 7
+
+#define kStartPosModelIndex 4
+#define kEndPosModelIndex 14
+#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
+
+#define kNumPosSlotBits 6
+#define kNumLenToPosStates 4
+
+#define kNumAlignBits 4
+#define kAlignTableSize (1 << kNumAlignBits)
+
+#define kMatchMinLen 2
+
+#define IsMatch 0
+#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
+#define IsRepG0 (IsRep + kNumStates)
+#define IsRepG1 (IsRepG0 + kNumStates)
+#define IsRepG2 (IsRepG1 + kNumStates)
+#define IsRep0Long (IsRepG2 + kNumStates)
+#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
+#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
+#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
+#define LenCoder (Align + kAlignTableSize)
+#define RepLenCoder (LenCoder + kNumLenProbs)
+#define Literal (RepLenCoder + kNumLenProbs)
+
+#if Literal != LZMA_BASE_SIZE
+StopCompilingDueBUG
+#endif
+
+int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size)
+{
+ unsigned char prop0;
+ if (size < LZMA_PROPERTIES_SIZE)
+ return LZMA_RESULT_DATA_ERROR;
+ prop0 = propsData[0];
+ if (prop0 >= (9 * 5 * 5))
+ return LZMA_RESULT_DATA_ERROR;
+ {
+ for (propsRes->pb = 0; prop0 >= (9 * 5); propsRes->pb++, prop0 -= (9 * 5));
+ for (propsRes->lp = 0; prop0 >= 9; propsRes->lp++, prop0 -= 9);
+ propsRes->lc = prop0;
+ /*
+ unsigned char remainder = (unsigned char)(prop0 / 9);
+ propsRes->lc = prop0 % 9;
+ propsRes->pb = remainder / 5;
+ propsRes->lp = remainder % 5;
+ */
+ }
+
+ #ifdef _LZMA_OUT_READ
+ {
+ int i;
+ propsRes->DictionarySize = 0;
+ for (i = 0; i < 4; i++)
+ propsRes->DictionarySize += (UInt32)(propsData[1 + i]) << (i * 8);
+ if (propsRes->DictionarySize == 0)
+ propsRes->DictionarySize = 1;
+ }
+ #endif
+ return LZMA_RESULT_OK;
+}
+
+#define kLzmaStreamWasFinishedId (-1)
+
+int LzmaDecode(CLzmaDecoderState *vs,
+ #ifdef _LZMA_IN_CB
+ ILzmaInCallback *InCallback,
+ #else
+ const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
+ #endif
+ unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed)
+{
+ CProb *p = vs->Probs;
+ SizeT nowPos = 0;
+ Byte previousByte = 0;
+ UInt32 posStateMask = (1 << (vs->Properties.pb)) - 1;
+ UInt32 literalPosMask = (1 << (vs->Properties.lp)) - 1;
+ int lc = vs->Properties.lc;
+
+ #ifdef _LZMA_OUT_READ
+
+ UInt32 Range = vs->Range;
+ UInt32 Code = vs->Code;
+ #ifdef _LZMA_IN_CB
+ const Byte *Buffer = vs->Buffer;
+ const Byte *BufferLim = vs->BufferLim;
+ #else
+ const Byte *Buffer = inStream;
+ const Byte *BufferLim = inStream + inSize;
+ #endif
+ int state = vs->State;
+ UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
+ int len = vs->RemainLen;
+ UInt32 globalPos = vs->GlobalPos;
+ UInt32 distanceLimit = vs->DistanceLimit;
+
+ Byte *dictionary = vs->Dictionary;
+ UInt32 dictionarySize = vs->Properties.DictionarySize;
+ UInt32 dictionaryPos = vs->DictionaryPos;
+
+ Byte tempDictionary[4];
+
+ #ifndef _LZMA_IN_CB
+ *inSizeProcessed = 0;
+ #endif
+ *outSizeProcessed = 0;
+ if (len == kLzmaStreamWasFinishedId)
+ return LZMA_RESULT_OK;
+
+ if (dictionarySize == 0)
+ {
+ dictionary = tempDictionary;
+ dictionarySize = 1;
+ tempDictionary[0] = vs->TempDictionary[0];
+ }
+
+ if (len == kLzmaNeedInitId)
+ {
+ {
+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
+ UInt32 i;
+ for (i = 0; i < numProbs; i++)
+ p[i] = kBitModelTotal >> 1;
+ rep0 = rep1 = rep2 = rep3 = 1;
+ state = 0;
+ globalPos = 0;
+ distanceLimit = 0;
+ dictionaryPos = 0;
+ dictionary[dictionarySize - 1] = 0;
+ #ifdef _LZMA_IN_CB
+ RC_INIT;
+ #else
+ RC_INIT(inStream, inSize);
+ #endif
+ }
+ len = 0;
+ }
+ while(len != 0 && nowPos < outSize)
+ {
+ UInt32 pos = dictionaryPos - rep0;
+ if (pos >= dictionarySize)
+ pos += dictionarySize;
+ outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
+ if (++dictionaryPos == dictionarySize)
+ dictionaryPos = 0;
+ len--;
+ }
+ if (dictionaryPos == 0)
+ previousByte = dictionary[dictionarySize - 1];
+ else
+ previousByte = dictionary[dictionaryPos - 1];
+
+ #else /* if !_LZMA_OUT_READ */
+
+ int state = 0;
+ UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
+ int len = 0;
+ const Byte *Buffer;
+ const Byte *BufferLim;
+ UInt32 Range;
+ UInt32 Code;
+
+ #ifndef _LZMA_IN_CB
+ *inSizeProcessed = 0;
+ #endif
+ *outSizeProcessed = 0;
+
+ {
+ UInt32 i;
+ UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
+ for (i = 0; i < numProbs; i++)
+ p[i] = kBitModelTotal >> 1;
+ }
+
+ #ifdef _LZMA_IN_CB
+ RC_INIT;
+ #else
+ RC_INIT(inStream, inSize);
+ #endif
+
+ #endif /* _LZMA_OUT_READ */
+
+ while(nowPos < outSize)
+ {
+ CProb *prob;
+ UInt32 bound;
+ int posState = (int)(
+ (nowPos
+ #ifdef _LZMA_OUT_READ
+ + globalPos
+ #endif
+ )
+ & posStateMask);
+
+ prob = p + IsMatch + (state << kNumPosBitsMax) + posState;
+ IfBit0(prob)
+ {
+ int symbol = 1;
+ UpdateBit0(prob)
+ prob = p + Literal + (LZMA_LIT_SIZE *
+ (((
+ (nowPos
+ #ifdef _LZMA_OUT_READ
+ + globalPos
+ #endif
+ )
+ & literalPosMask) << lc) + (previousByte >> (8 - lc))));
+
+ if (state >= kNumLitStates)
+ {
+ int matchByte;
+ #ifdef _LZMA_OUT_READ
+ UInt32 pos = dictionaryPos - rep0;
+ if (pos >= dictionarySize)
+ pos += dictionarySize;
+ matchByte = dictionary[pos];
+ #else
+ matchByte = outStream[nowPos - rep0];
+ #endif
+ do
+ {
+ int bit;
+ CProb *probLit;
+ matchByte <<= 1;
+ bit = (matchByte & 0x100);
+ probLit = prob + 0x100 + bit + symbol;
+ RC_GET_BIT2(probLit, symbol, if (bit != 0) break, if (bit == 0) break)
+ }
+ while (symbol < 0x100);
+ }
+ while (symbol < 0x100)
+ {
+ CProb *probLit = prob + symbol;
+ RC_GET_BIT(probLit, symbol)
+ }
+ previousByte = (Byte)symbol;
+
+ outStream[nowPos++] = previousByte;
+ #ifdef _LZMA_OUT_READ
+ if (distanceLimit < dictionarySize)
+ distanceLimit++;
+
+ dictionary[dictionaryPos] = previousByte;
+ if (++dictionaryPos == dictionarySize)
+ dictionaryPos = 0;
+ #endif
+ if (state < 4) state = 0;
+ else if (state < 10) state -= 3;
+ else state -= 6;
+ }
+ else
+ {
+ UpdateBit1(prob);
+ prob = p + IsRep + state;
+ IfBit0(prob)
+ {
+ UpdateBit0(prob);
+ rep3 = rep2;
+ rep2 = rep1;
+ rep1 = rep0;
+ state = state < kNumLitStates ? 0 : 3;
+ prob = p + LenCoder;
+ }
+ else
+ {
+ UpdateBit1(prob);
+ prob = p + IsRepG0 + state;
+ IfBit0(prob)
+ {
+ UpdateBit0(prob);
+ prob = p + IsRep0Long + (state << kNumPosBitsMax) + posState;
+ IfBit0(prob)
+ {
+ #ifdef _LZMA_OUT_READ
+ UInt32 pos;
+ #endif
+ UpdateBit0(prob);
+
+ #ifdef _LZMA_OUT_READ
+ if (distanceLimit == 0)
+ #else
+ if (nowPos == 0)
+ #endif
+ return LZMA_RESULT_DATA_ERROR;
+
+ state = state < kNumLitStates ? 9 : 11;
+ #ifdef _LZMA_OUT_READ
+ pos = dictionaryPos - rep0;
+ if (pos >= dictionarySize)
+ pos += dictionarySize;
+ previousByte = dictionary[pos];
+ dictionary[dictionaryPos] = previousByte;
+ if (++dictionaryPos == dictionarySize)
+ dictionaryPos = 0;
+ #else
+ previousByte = outStream[nowPos - rep0];
+ #endif
+ outStream[nowPos++] = previousByte;
+ #ifdef _LZMA_OUT_READ
+ if (distanceLimit < dictionarySize)
+ distanceLimit++;
+ #endif
+
+ continue;
+ }
+ else
+ {
+ UpdateBit1(prob);
+ }
+ }
+ else
+ {
+ UInt32 distance;
+ UpdateBit1(prob);
+ prob = p + IsRepG1 + state;
+ IfBit0(prob)
+ {
+ UpdateBit0(prob);
+ distance = rep1;
+ }
+ else
+ {
+ UpdateBit1(prob);
+ prob = p + IsRepG2 + state;
+ IfBit0(prob)
+ {
+ UpdateBit0(prob);
+ distance = rep2;
+ }
+ else
+ {
+ UpdateBit1(prob);
+ distance = rep3;
+ rep3 = rep2;
+ }
+ rep2 = rep1;
+ }
+ rep1 = rep0;
+ rep0 = distance;
+ }
+ state = state < kNumLitStates ? 8 : 11;
+ prob = p + RepLenCoder;
+ }
+ {
+ int numBits, offset;
+ CProb *probLen = prob + LenChoice;
+ IfBit0(probLen)
+ {
+ UpdateBit0(probLen);
+ probLen = prob + LenLow + (posState << kLenNumLowBits);
+ offset = 0;
+ numBits = kLenNumLowBits;
+ }
+ else
+ {
+ UpdateBit1(probLen);
+ probLen = prob + LenChoice2;
+ IfBit0(probLen)
+ {
+ UpdateBit0(probLen);
+ probLen = prob + LenMid + (posState << kLenNumMidBits);
+ offset = kLenNumLowSymbols;
+ numBits = kLenNumMidBits;
+ }
+ else
+ {
+ UpdateBit1(probLen);
+ probLen = prob + LenHigh;
+ offset = kLenNumLowSymbols + kLenNumMidSymbols;
+ numBits = kLenNumHighBits;
+ }
+ }
+ RangeDecoderBitTreeDecode(probLen, numBits, len);
+ len += offset;
+ }
+
+ if (state < 4)
+ {
+ int posSlot;
+ state += kNumLitStates;
+ prob = p + PosSlot +
+ ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
+ kNumPosSlotBits);
+ RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
+ if (posSlot >= kStartPosModelIndex)
+ {
+ int numDirectBits = ((posSlot >> 1) - 1);
+ rep0 = (2 | ((UInt32)posSlot & 1));
+ if (posSlot < kEndPosModelIndex)
+ {
+ rep0 <<= numDirectBits;
+ prob = p + SpecPos + rep0 - posSlot - 1;
+ }
+ else
+ {
+ numDirectBits -= kNumAlignBits;
+ do
+ {
+ RC_NORMALIZE
+ Range >>= 1;
+ rep0 <<= 1;
+ if (Code >= Range)
+ {
+ Code -= Range;
+ rep0 |= 1;
+ }
+ }
+ while (--numDirectBits != 0);
+ prob = p + Align;
+ rep0 <<= kNumAlignBits;
+ numDirectBits = kNumAlignBits;
+ }
+ {
+ int i = 1;
+ int mi = 1;
+ do
+ {
+ CProb *prob3 = prob + mi;
+ RC_GET_BIT2(prob3, mi, ; , rep0 |= i);
+ i <<= 1;
+ }
+ while(--numDirectBits != 0);
+ }
+ }
+ else
+ rep0 = posSlot;
+ if (++rep0 == (UInt32)(0))
+ {
+ /* it's for stream version */
+ len = kLzmaStreamWasFinishedId;
+ break;
+ }
+ }
+
+ len += kMatchMinLen;
+ #ifdef _LZMA_OUT_READ
+ if (rep0 > distanceLimit)
+ #else
+ if (rep0 > nowPos)
+ #endif
+ return LZMA_RESULT_DATA_ERROR;
+
+ #ifdef _LZMA_OUT_READ
+ if (dictionarySize - distanceLimit > (UInt32)len)
+ distanceLimit += len;
+ else
+ distanceLimit = dictionarySize;
+ #endif
+
+ do
+ {
+ #ifdef _LZMA_OUT_READ
+ UInt32 pos = dictionaryPos - rep0;
+ if (pos >= dictionarySize)
+ pos += dictionarySize;
+ previousByte = dictionary[pos];
+ dictionary[dictionaryPos] = previousByte;
+ if (++dictionaryPos == dictionarySize)
+ dictionaryPos = 0;
+ #else
+ previousByte = outStream[nowPos - rep0];
+ #endif
+ len--;
+ outStream[nowPos++] = previousByte;
+ }
+ while(len != 0 && nowPos < outSize);
+ }
+ }
+ RC_NORMALIZE;
+
+ #ifdef _LZMA_OUT_READ
+ vs->Range = Range;
+ vs->Code = Code;
+ vs->DictionaryPos = dictionaryPos;
+ vs->GlobalPos = globalPos + (UInt32)nowPos;
+ vs->DistanceLimit = distanceLimit;
+ vs->Reps[0] = rep0;
+ vs->Reps[1] = rep1;
+ vs->Reps[2] = rep2;
+ vs->Reps[3] = rep3;
+ vs->State = state;
+ vs->RemainLen = len;
+ vs->TempDictionary[0] = tempDictionary[0];
+ #endif
+
+ #ifdef _LZMA_IN_CB
+ vs->Buffer = Buffer;
+ vs->BufferLim = BufferLim;
+ #else
+ *inSizeProcessed = (SizeT)(Buffer - inStream);
+ #endif
+ *outSizeProcessed = nowPos;
+ return LZMA_RESULT_OK;
+}
--- /dev/null
+/*
+ LzmaDecode.h
+ LZMA Decoder interface
+
+ LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
+ http://www.7-zip.org/
+
+ LZMA SDK is licensed under two licenses:
+ 1) GNU Lesser General Public License (GNU LGPL)
+ 2) Common Public License (CPL)
+ It means that you can select one of these two licenses and
+ follow rules of that license.
+
+ SPECIAL EXCEPTION:
+ Igor Pavlov, as the author of this code, expressly permits you to
+ statically or dynamically link your code (or bind by name) to the
+ interfaces of this file without subjecting your linked code to the
+ terms of the CPL or GNU LGPL. Any modifications or additions
+ to this file, however, are subject to the LGPL or CPL terms.
+*/
+
+#ifndef __LZMADECODE_H
+#define __LZMADECODE_H
+
+#include "LzmaTypes.h"
+
+/* #define _LZMA_IN_CB */
+/* Use callback for input data */
+
+/* #define _LZMA_OUT_READ */
+/* Use read function for output data */
+
+/* #define _LZMA_PROB32 */
+/* It can increase speed on some 32-bit CPUs,
+ but memory usage will be doubled in that case */
+
+/* #define _LZMA_LOC_OPT */
+/* Enable local speed optimizations inside code */
+
+#ifdef _LZMA_PROB32
+#define CProb UInt32
+#else
+#define CProb UInt16
+#endif
+
+#define LZMA_RESULT_OK 0
+#define LZMA_RESULT_DATA_ERROR 1
+
+#ifdef _LZMA_IN_CB
+typedef struct _ILzmaInCallback
+{
+ int (*Read)(void *object, const unsigned char **buffer, SizeT *bufferSize);
+} ILzmaInCallback;
+#endif
+
+#define LZMA_BASE_SIZE 1846
+#define LZMA_LIT_SIZE 768
+
+#define LZMA_PROPERTIES_SIZE 5
+
+typedef struct _CLzmaProperties
+{
+ int lc;
+ int lp;
+ int pb;
+ #ifdef _LZMA_OUT_READ
+ UInt32 DictionarySize;
+ #endif
+}CLzmaProperties;
+
+int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size);
+
+#define LzmaGetNumProbs(Properties) (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((Properties)->lc + (Properties)->lp)))
+
+#define kLzmaNeedInitId (-2)
+
+typedef struct _CLzmaDecoderState
+{
+ CLzmaProperties Properties;
+ CProb *Probs;
+
+ #ifdef _LZMA_IN_CB
+ const unsigned char *Buffer;
+ const unsigned char *BufferLim;
+ #endif
+
+ #ifdef _LZMA_OUT_READ
+ unsigned char *Dictionary;
+ UInt32 Range;
+ UInt32 Code;
+ UInt32 DictionaryPos;
+ UInt32 GlobalPos;
+ UInt32 DistanceLimit;
+ UInt32 Reps[4];
+ int State;
+ int RemainLen;
+ unsigned char TempDictionary[4];
+ #endif
+} CLzmaDecoderState;
+
+#ifdef _LZMA_OUT_READ
+#define LzmaDecoderInit(vs) { (vs)->RemainLen = kLzmaNeedInitId; }
+#endif
+
+int LzmaDecode(CLzmaDecoderState *vs,
+ #ifdef _LZMA_IN_CB
+ ILzmaInCallback *inCallback,
+ #else
+ const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
+ #endif
+ unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed);
+
+#endif
--- /dev/null
+/*
+LzmaTypes.h
+
+Types for LZMA Decoder
+
+This file written and distributed to public domain by Igor Pavlov.
+This file is part of LZMA SDK 4.40 (2006-05-01)
+*/
+
+#ifndef __LZMATYPES_H
+#define __LZMATYPES_H
+
+#ifndef _7ZIP_BYTE_DEFINED
+#define _7ZIP_BYTE_DEFINED
+typedef unsigned char Byte;
+#endif
+
+#ifndef _7ZIP_UINT16_DEFINED
+#define _7ZIP_UINT16_DEFINED
+typedef unsigned short UInt16;
+#endif
+
+#ifndef _7ZIP_UINT32_DEFINED
+#define _7ZIP_UINT32_DEFINED
+#ifdef _LZMA_UINT32_IS_ULONG
+typedef unsigned long UInt32;
+#else
+typedef unsigned int UInt32;
+#endif
+#endif
+
+/* #define _LZMA_NO_SYSTEM_SIZE_T */
+/* You can use it, if you don't want <stddef.h> */
+
+#ifndef _7ZIP_SIZET_DEFINED
+#define _7ZIP_SIZET_DEFINED
+#ifdef _LZMA_NO_SYSTEM_SIZE_T
+typedef UInt32 SizeT;
+#else
+#include <stddef.h>
+typedef size_t SizeT;
+#endif
+#endif
+
+#endif
--- /dev/null
+#
+# Makefile for the LZMA compressed kernel loader for
+# Atheros AR7XXX/AR9XXX based boards
+#
+# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+#
+# Some parts of this file was based on the OpenWrt specific lzma-loader
+# for the BCM47xx and ADM5120 based boards:
+# Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
+# Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
+# Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
+#
+# This program is free software; you can redistribute it and/or modify it
+# under the terms of the GNU General Public License version 2 as published
+# by the Free Software Foundation.
+#
+
+LOADADDR :=
+LZMA_TEXT_START := 0x80a00000
+LOADER_DATA :=
+
+CC := $(CROSS_COMPILE)gcc
+LD := $(CROSS_COMPILE)ld
+OBJCOPY := $(CROSS_COMPILE)objcopy
+OBJDUMP := $(CROSS_COMPILE)objdump
+
+BIN_FLAGS := -O binary -R .reginfo -R .note -R .comment -R .mdebug \
+ -R .MIPS.abiflags -S
+
+CFLAGS = -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
+ -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 \
+ -mno-abicalls -fno-pic -ffunction-sections -pipe \
+ -ffreestanding -fhonour-copts \
+ -mabi=32 -march=mips32 \
+ -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap
+CFLAGS += -D_LZMA_PROB32
+
+ASFLAGS = $(CFLAGS) -D__ASSEMBLY__
+
+LDFLAGS = -static --gc-sections -no-warn-mismatch
+LDFLAGS += -e startup -T loader.lds -Ttext $(LZMA_TEXT_START)
+
+O_FORMAT = $(shell $(OBJDUMP) -i | head -2 | grep elf32)
+
+OBJECTS := head.o loader.o cache.o board.o printf.o LzmaDecode.o
+
+ifneq ($(strip $(LOADER_DATA)),)
+OBJECTS += data.o
+CFLAGS += -DLZMA_WRAPPER=1 -DLOADADDR=$(LOADADDR)
+endif
+
+
+all: loader.elf
+
+# Don't build dependencies, this may die if $(CC) isn't gcc
+dep:
+
+install:
+
+%.o : %.c
+ $(CC) $(CFLAGS) -c -o $@ $<
+
+%.o : %.S
+ $(CC) $(ASFLAGS) -c -o $@ $<
+
+data.o: $(LOADER_DATA)
+ $(LD) -r -b binary --oformat $(O_FORMAT) -T lzma-data.lds -o $@ $<
+
+loader: $(OBJECTS)
+ $(LD) $(LDFLAGS) -o $@ $(OBJECTS)
+
+loader.bin: loader
+ $(OBJCOPY) $(BIN_FLAGS) $< $@
+
+loader2.o: loader.bin
+ $(LD) -r -b binary --oformat $(O_FORMAT) -o $@ $<
+
+loader.elf: loader2.o
+ $(LD) -e startup -T loader2.lds -Ttext $(LOADADDR) -o $@ $<
+
+mrproper: clean
+
+clean:
+ rm -f loader *.elf *.bin *.o
+
+
+
--- /dev/null
+/*
+ * BCM63XX specific implementation parts
+ *
+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <stddef.h>
+#include "config.h"
+#include "cp0regdef.h"
+
+#define READREG(r) *(volatile unsigned int *)(r)
+#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
+
+#define UART_IR_REG 0x10
+#define UART_FIFO_REG 0x14
+
+unsigned long uart_base;
+
+static void wait_xfered(void)
+{
+ unsigned int val;
+
+ do {
+ val = READREG(uart_base + UART_IR_REG);
+ if (val & (1 << 5))
+ break;
+ } while (1);
+}
+
+void board_putc(int ch)
+{
+ if (!uart_base)
+ return;
+
+ wait_xfered();
+ WRITEREG(uart_base + UART_FIFO_REG, ch);
+ wait_xfered();
+}
+
+#define PRID_IMP_BMIPS32_REV4 0x4000
+#define PRID_IMP_BMIPS32_REV8 0x8000
+#define PRID_IMP_BMIPS3300 0x9000
+#define PRID_IMP_BMIPS3300_ALT 0x9100
+#define PRID_IMP_BMIPS3300_BUG 0x0000
+#define PRID_IMP_BMIPS43XX 0xa000
+
+void board_init(void)
+{
+ unsigned long prid, chipid, chipid_reg;
+
+ prid = read_32bit_c0_register($15, 0);
+
+ switch (prid & 0xff00) {
+ case PRID_IMP_BMIPS32_REV4:
+ case PRID_IMP_BMIPS32_REV8:
+ case PRID_IMP_BMIPS3300_ALT:
+ case PRID_IMP_BMIPS3300_BUG:
+ chipid_reg = 0xfffe0000;
+ break;
+ case PRID_IMP_BMIPS3300:
+ if ((prid & 0xff) >= 0x33)
+ chipid_reg = 0xb0000000;
+ else
+ chipid_reg = 0xfffe0000;
+ break;
+ case PRID_IMP_BMIPS43XX:
+ if ((prid & 0xff) == 0x04)
+ chipid_reg = 0xfff8c000;
+ else if ((prid & 0xff) == 0x70)
+ return; /* FIXME: 0002a070 can be 6362 and 3380 */
+ else if ((prid & 0xff) >= 0x30)
+ chipid_reg = 0xb0000000;
+ else
+ chipid_reg = 0xfffe0000;
+ break;
+ default:
+ return;
+ }
+
+ chipid = READREG(chipid_reg);
+
+ switch (chipid >> 16) {
+ case 0x3368:
+ case 0x6318:
+ case 0x6328:
+ case 0x6358:
+ case 0x6362:
+ case 0x6368:
+ case 0x6369:
+ uart_base = chipid_reg + 0x100;
+ break;
+ case 0x6316:
+ case 0x6326:
+ uart_base = chipid_reg + 0x180;
+ break;
+ case 0x3380:
+ uart_base = chipid_reg + 0x200;
+ break;
+ case 0x6338:
+ case 0x6345:
+ case 0x6348:
+ uart_base = chipid_reg + 0x300;
+ break;
+ default:
+ return;
+ }
+}
--- /dev/null
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * The cache manipulation routine has been taken from the U-Boot project.
+ * (C) Copyright 2003
+ * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+
+#include "cache.h"
+#include "cacheops.h"
+#include "config.h"
+#include "printf.h"
+
+#define cache_op(op,addr) \
+ __asm__ __volatile__( \
+ " .set push \n" \
+ " .set noreorder \n" \
+ " .set mips3\n\t \n" \
+ " cache %0, %1 \n" \
+ " .set pop \n" \
+ : \
+ : "i" (op), "R" (*(unsigned char *)(addr)))
+
+void flush_cache(unsigned long start_addr, unsigned long size)
+{
+ unsigned long lsize = CONFIG_CACHELINE_SIZE;
+ unsigned long addr = start_addr & ~(lsize - 1);
+ unsigned long aend = (start_addr + size + (lsize - 1)) & ~(lsize - 1);
+
+ printf("blasting from 0x%08x to 0x%08x (0x%08x - 0x%08x)\n", start_addr, size, addr, aend);
+
+ while (1) {
+ cache_op(Hit_Writeback_Inv_D, addr);
+ cache_op(Hit_Invalidate_I, addr);
+ if (addr == aend)
+ break;
+ addr += lsize;
+ }
+}
--- /dev/null
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+
+#ifndef __CACHE_H
+#define __CACHE_H
+
+void flush_cache(unsigned long start_addr, unsigned long size);
+
+#endif /* __CACHE_H */
--- /dev/null
+/*
+ * Cache operations for the cache instruction.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle
+ * (C) Copyright 1999 Silicon Graphics, Inc.
+ */
+#ifndef __ASM_CACHEOPS_H
+#define __ASM_CACHEOPS_H
+
+/*
+ * Cache Operations available on all MIPS processors with R4000-style caches
+ */
+#define Index_Invalidate_I 0x00
+#define Index_Writeback_Inv_D 0x01
+#define Index_Load_Tag_I 0x04
+#define Index_Load_Tag_D 0x05
+#define Index_Store_Tag_I 0x08
+#define Index_Store_Tag_D 0x09
+#if defined(CONFIG_CPU_LOONGSON2)
+#define Hit_Invalidate_I 0x00
+#else
+#define Hit_Invalidate_I 0x10
+#endif
+#define Hit_Invalidate_D 0x11
+#define Hit_Writeback_Inv_D 0x15
+
+/*
+ * R4000-specific cacheops
+ */
+#define Create_Dirty_Excl_D 0x0d
+#define Fill 0x14
+#define Hit_Writeback_I 0x18
+#define Hit_Writeback_D 0x19
+
+/*
+ * R4000SC and R4400SC-specific cacheops
+ */
+#define Index_Invalidate_SI 0x02
+#define Index_Writeback_Inv_SD 0x03
+#define Index_Load_Tag_SI 0x06
+#define Index_Load_Tag_SD 0x07
+#define Index_Store_Tag_SI 0x0A
+#define Index_Store_Tag_SD 0x0B
+#define Create_Dirty_Excl_SD 0x0f
+#define Hit_Invalidate_SI 0x12
+#define Hit_Invalidate_SD 0x13
+#define Hit_Writeback_Inv_SD 0x17
+#define Hit_Writeback_SD 0x1b
+#define Hit_Set_Virtual_SI 0x1e
+#define Hit_Set_Virtual_SD 0x1f
+
+/*
+ * R5000-specific cacheops
+ */
+#define R5K_Page_Invalidate_S 0x17
+
+/*
+ * RM7000-specific cacheops
+ */
+#define Page_Invalidate_T 0x16
+
+/*
+ * R10000-specific cacheops
+ *
+ * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
+ * Most of the _S cacheops are identical to the R4000SC _SD cacheops.
+ */
+#define Index_Writeback_Inv_S 0x03
+#define Index_Load_Tag_S 0x07
+#define Index_Store_Tag_S 0x0B
+#define Hit_Invalidate_S 0x13
+#define Cache_Barrier 0x14
+#define Hit_Writeback_Inv_S 0x17
+#define Index_Load_Data_I 0x18
+#define Index_Load_Data_D 0x19
+#define Index_Load_Data_S 0x1b
+#define Index_Store_Data_I 0x1c
+#define Index_Store_Data_D 0x1d
+#define Index_Store_Data_S 0x1f
+
+#endif /* __ASM_CACHEOPS_H */
--- /dev/null
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ *
+ */
+
+#ifndef _CONFIG_H_
+#define _CONFIG_H_
+
+#define CONFIG_ICACHE_SIZE (32 * 1024)
+#define CONFIG_DCACHE_SIZE (32 * 1024)
+#define CONFIG_CACHELINE_SIZE 16
+
+#ifndef CONFIG_FLASH_OFFS
+#define CONFIG_FLASH_OFFS 0
+#endif
+
+#ifndef CONFIG_FLASH_MAX
+#define CONFIG_FLASH_MAX 0
+#endif
+
+#ifndef CONFIG_FLASH_STEP
+#define CONFIG_FLASH_STEP 0x1000
+#endif
+
+#endif /* _CONFIG_H_ */
--- /dev/null
+/*
+ * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle
+ *
+ * Copyright (C) 2001, Monta Vista Software
+ * Author: jsun@mvista.com or jsun@junsun.net
+ */
+#ifndef _cp0regdef_h_
+#define _cp0regdef_h_
+
+#define CP0_INDEX $0
+#define CP0_RANDOM $1
+#define CP0_ENTRYLO0 $2
+#define CP0_ENTRYLO1 $3
+#define CP0_CONTEXT $4
+#define CP0_PAGEMASK $5
+#define CP0_WIRED $6
+#define CP0_BADVADDR $8
+#define CP0_COUNT $9
+#define CP0_ENTRYHI $10
+#define CP0_COMPARE $11
+#define CP0_STATUS $12
+#define CP0_CAUSE $13
+#define CP0_EPC $14
+#define CP0_PRID $15
+#define CP0_CONFIG $16
+#define CP0_LLADDR $17
+#define CP0_WATCHLO $18
+#define CP0_WATCHHI $19
+#define CP0_XCONTEXT $20
+#define CP0_FRAMEMASK $21
+#define CP0_DIAGNOSTIC $22
+#define CP0_PERFORMANCE $25
+#define CP0_ECC $26
+#define CP0_CACHEERR $27
+#define CP0_TAGLO $28
+#define CP0_TAGHI $29
+#define CP0_ERROREPC $30
+
+#define read_32bit_c0_register(reg,sel) \
+({ int __res; \
+ if (sel == 0) \
+ __asm__ __volatile__( \
+ "mfc0\t%0, " #reg "\n\t" \
+ : "=r" (__res)); \
+ else \
+ __asm__ __volatile__( \
+ ".set\tmips32\n\t" \
+ "mfc0\t%0, " #reg ", " #sel "\n\t" \
+ ".set mips0\n\t" \
+ : "=r" (__res)); \
+ __res; \
+})
+
+#endif
--- /dev/null
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Some parts of this code was based on the OpenWrt specific lzma-loader
+ * for the BCM47xx and ADM5120 based boards:
+ * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
+ * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <asm/asm.h>
+#include <asm/regdef.h>
+#include "cp0regdef.h"
+#include "cacheops.h"
+#include "config.h"
+
+#define KSEG0 0x80000000
+
+ .macro ehb
+ sll zero, 3
+ .endm
+
+ .text
+
+LEAF(startup)
+ .set noreorder
+ .set mips32
+
+ mtc0 zero, CP0_WATCHLO # clear watch registers
+ mtc0 zero, CP0_WATCHHI
+ mtc0 zero, CP0_CAUSE # clear before writing status register
+
+ mfc0 t0, CP0_STATUS
+ li t1, 0x1000001f
+ or t0, t1
+ xori t0, 0x1f
+ mtc0 t0, CP0_STATUS
+ ehb
+
+ mtc0 zero, CP0_COUNT
+ mtc0 zero, CP0_COMPARE
+ ehb
+
+ la t0, __reloc_label # get linked address of label
+ bal __reloc_label # branch and link to label to
+ nop # get actual address
+__reloc_label:
+ subu t0, ra, t0 # get reloc_delta
+
+ beqz t0, __reloc_done # if delta is 0 we are in the right place
+ nop
+
+ /* Copy our code to the right place */
+ la t1, _code_start # get linked address of _code_start
+ la t2, _code_end # get linked address of _code_end
+ addu t0, t0, t1 # calculate actual address of _code_start
+
+__reloc_copy:
+ lw t3, 0(t0)
+ sw t3, 0(t1)
+ add t1, 4
+ blt t1, t2, __reloc_copy
+ add t0, 4
+
+ /* flush cache */
+ la t0, _code_start
+ la t1, _code_end
+
+ li t2, ~(CONFIG_CACHELINE_SIZE - 1)
+ and t0, t2
+ and t1, t2
+ li t2, CONFIG_CACHELINE_SIZE
+
+ b __flush_check
+ nop
+
+__flush_line:
+ cache Hit_Writeback_Inv_D, 0(t0)
+ cache Hit_Invalidate_I, 0(t0)
+ add t0, t2
+
+__flush_check:
+ bne t0, t1, __flush_line
+ nop
+
+ sync
+
+__reloc_done:
+
+ /* clear bss */
+ la t0, _bss_start
+ la t1, _bss_end
+ b __bss_check
+ nop
+
+__bss_fill:
+ sw zero, 0(t0)
+ addi t0, 4
+
+__bss_check:
+ bne t0, t1, __bss_fill
+ nop
+
+ /* Setup new "C" stack */
+ la sp, _stack
+
+ /* reserve stack space for a0-a3 registers */
+ subu sp, 16
+
+ /* jump to the decompressor routine */
+ la t0, loader_main
+ jr t0
+ nop
+
+ .set reorder
+END(startup)
--- /dev/null
+/*
+ * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
+ *
+ * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
+ *
+ * Some parts of this code was based on the OpenWrt specific lzma-loader
+ * for the BCM47xx and ADM5120 based boards:
+ * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
+ * Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
+ * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
+ *
+ * The image_header structure has been taken from the U-Boot project.
+ * (C) Copyright 2008 Semihalf
+ * (C) Copyright 2000-2005
+ * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+
+#include <stddef.h>
+#include <stdint.h>
+
+#include "config.h"
+#include "cache.h"
+#include "printf.h"
+#include "LzmaDecode.h"
+
+#define KSEG0 0x80000000
+#define KSEG1 0xa0000000
+
+#define KSEG1ADDR(a) ((((unsigned)(a)) & 0x1fffffffU) | KSEG1)
+
+#undef LZMA_DEBUG
+
+#ifdef LZMA_DEBUG
+# define DBG(f, a...) printf(f, ## a)
+#else
+# define DBG(f, a...) do {} while (0)
+#endif
+
+/* beyond the image end, size not known in advance */
+extern unsigned char workspace[];
+
+
+extern void board_init(void);
+
+static CLzmaDecoderState lzma_state;
+static unsigned char *lzma_data;
+static unsigned long lzma_datasize;
+static unsigned long lzma_outsize;
+static unsigned long kernel_la;
+
+static void halt(void)
+{
+ printf("\nSystem halted!\n");
+ for(;;);
+}
+
+static __inline__ unsigned char lzma_get_byte(void)
+{
+ unsigned char c;
+
+ lzma_datasize--;
+ c = *lzma_data++;
+
+ return c;
+}
+
+static int lzma_init_props(void)
+{
+ unsigned char props[LZMA_PROPERTIES_SIZE];
+ int res;
+ int i;
+
+ /* read lzma properties */
+ for (i = 0; i < LZMA_PROPERTIES_SIZE; i++)
+ props[i] = lzma_get_byte();
+
+ /* read the lower half of uncompressed size in the header */
+ lzma_outsize = ((SizeT) lzma_get_byte()) +
+ ((SizeT) lzma_get_byte() << 8) +
+ ((SizeT) lzma_get_byte() << 16) +
+ ((SizeT) lzma_get_byte() << 24);
+
+ /* skip rest of the header (upper half of uncompressed size) */
+ for (i = 0; i < 4; i++)
+ lzma_get_byte();
+
+ res = LzmaDecodeProperties(&lzma_state.Properties, props,
+ LZMA_PROPERTIES_SIZE);
+ return res;
+}
+
+static int lzma_decompress(unsigned char *outStream)
+{
+ SizeT ip, op;
+ int ret;
+
+ lzma_state.Probs = (CProb *) workspace;
+
+ ret = LzmaDecode(&lzma_state, lzma_data, lzma_datasize, &ip, outStream,
+ lzma_outsize, &op);
+
+ if (ret != LZMA_RESULT_OK) {
+ int i;
+
+ DBG("LzmaDecode error %d at %08x, osize:%d ip:%d op:%d\n",
+ ret, lzma_data + ip, lzma_outsize, ip, op);
+
+ for (i = 0; i < 16; i++)
+ DBG("%02x ", lzma_data[ip + i]);
+
+ DBG("\n");
+ }
+
+ return ret;
+}
+
+static void lzma_init_data(void)
+{
+ extern unsigned char _lzma_data_start[];
+ extern unsigned char _lzma_data_end[];
+
+ kernel_la = LOADADDR;
+ lzma_data = _lzma_data_start;
+ lzma_datasize = _lzma_data_end - _lzma_data_start;
+}
+
+void loader_main(unsigned long reg_a0, unsigned long reg_a1,
+ unsigned long reg_a2, unsigned long reg_a3)
+{
+ void (*kernel_entry) (unsigned long, unsigned long, unsigned long,
+ unsigned long);
+ int res;
+
+ board_init();
+
+ printf("\n\nOpenWrt kernel loader for BCM63XX\n");
+ printf("Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>\n");
+ printf("Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>\n");
+
+ lzma_init_data();
+
+ res = lzma_init_props();
+ if (res != LZMA_RESULT_OK) {
+ printf("Incorrect LZMA stream properties!\n");
+ halt();
+ }
+
+ printf("Decompressing kernel... ");
+
+ res = lzma_decompress((unsigned char *) kernel_la);
+ if (res != LZMA_RESULT_OK) {
+ printf("failed, ");
+ switch (res) {
+ case LZMA_RESULT_DATA_ERROR:
+ printf("data error!\n");
+ break;
+ default:
+ printf("unknown error %d!\n", res);
+ }
+ halt();
+ } else {
+ printf("done!\n");
+ }
+
+ flush_cache(kernel_la, lzma_outsize);
+
+ printf("Starting kernel at %08x...\n\n", kernel_la);
+
+ kernel_entry = (void *) kernel_la;
+ kernel_entry(reg_a0, reg_a1, reg_a2, reg_a3);
+}
--- /dev/null
+OUTPUT_ARCH(mips)
+SECTIONS {
+ .text : {
+ _code_start = .;
+ *(.text)
+ *(.text.*)
+ *(.rodata)
+ *(.rodata.*)
+ *(.data.lzma)
+ }
+
+ . = ALIGN(32);
+ .data : {
+ *(.data)
+ *(.data.*)
+ }
+
+ . = ALIGN(32);
+ _code_end = .;
+
+ _bss_start = .;
+ .bss : {
+ *(.bss)
+ *(.bss.*)
+ }
+
+ . = ALIGN(32);
+ _bss_end = .;
+
+ . = . + 8192;
+ _stack = .;
+
+ workspace = .;
+}
--- /dev/null
+OUTPUT_ARCH(mips)
+SECTIONS {
+ .text : {
+ startup = .;
+ *(.text)
+ *(.text.*)
+ *(.data)
+ *(.data.*)
+ }
+}
--- /dev/null
+OUTPUT_ARCH(mips)
+SECTIONS {
+ .data.lzma : {
+ _lzma_data_start = .;
+ *(.data)
+ _lzma_data_end = .;
+ }
+}
--- /dev/null
+/*
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#include "printf.h"
+
+extern void board_putc(int ch);
+
+/* this is the maximum width for a variable */
+#define LP_MAX_BUF 256
+
+/* macros */
+#define IsDigit(x) ( ((x) >= '0') && ((x) <= '9') )
+#define Ctod(x) ( (x) - '0')
+
+/* forward declaration */
+static int PrintChar(char *, char, int, int);
+static int PrintString(char *, char *, int, int);
+static int PrintNum(char *, unsigned long, int, int, int, int, char, int);
+
+/* private variable */
+static const char theFatalMsg[] = "fatal error in lp_Print!";
+
+/* -*-
+ * A low level printf() function.
+ */
+static void
+lp_Print(void (*output)(void *, char *, int),
+ void * arg,
+ char *fmt,
+ va_list ap)
+{
+
+#define OUTPUT(arg, s, l) \
+ { if (((l) < 0) || ((l) > LP_MAX_BUF)) { \
+ (*output)(arg, (char*)theFatalMsg, sizeof(theFatalMsg)-1); for(;;); \
+ } else { \
+ (*output)(arg, s, l); \
+ } \
+ }
+
+ char buf[LP_MAX_BUF];
+
+ char c;
+ char *s;
+ long int num;
+
+ int longFlag;
+ int negFlag;
+ int width;
+ int prec;
+ int ladjust;
+ char padc;
+
+ int length;
+
+ for(;;) {
+ {
+ /* scan for the next '%' */
+ char *fmtStart = fmt;
+ while ( (*fmt != '\0') && (*fmt != '%')) {
+ fmt ++;
+ }
+
+ /* flush the string found so far */
+ OUTPUT(arg, fmtStart, fmt-fmtStart);
+
+ /* are we hitting the end? */
+ if (*fmt == '\0') break;
+ }
+
+ /* we found a '%' */
+ fmt ++;
+
+ /* check for long */
+ if (*fmt == 'l') {
+ longFlag = 1;
+ fmt ++;
+ } else {
+ longFlag = 0;
+ }
+
+ /* check for other prefixes */
+ width = 0;
+ prec = -1;
+ ladjust = 0;
+ padc = ' ';
+
+ if (*fmt == '-') {
+ ladjust = 1;
+ fmt ++;
+ }
+
+ if (*fmt == '0') {
+ padc = '0';
+ fmt++;
+ }
+
+ if (IsDigit(*fmt)) {
+ while (IsDigit(*fmt)) {
+ width = 10 * width + Ctod(*fmt++);
+ }
+ }
+
+ if (*fmt == '.') {
+ fmt ++;
+ if (IsDigit(*fmt)) {
+ prec = 0;
+ while (IsDigit(*fmt)) {
+ prec = prec*10 + Ctod(*fmt++);
+ }
+ }
+ }
+
+
+ /* check format flag */
+ negFlag = 0;
+ switch (*fmt) {
+ case 'b':
+ if (longFlag) {
+ num = va_arg(ap, long int);
+ } else {
+ num = va_arg(ap, int);
+ }
+ length = PrintNum(buf, num, 2, 0, width, ladjust, padc, 0);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case 'd':
+ case 'D':
+ if (longFlag) {
+ num = va_arg(ap, long int);
+ } else {
+ num = va_arg(ap, int);
+ }
+ if (num < 0) {
+ num = - num;
+ negFlag = 1;
+ }
+ length = PrintNum(buf, num, 10, negFlag, width, ladjust, padc, 0);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case 'o':
+ case 'O':
+ if (longFlag) {
+ num = va_arg(ap, long int);
+ } else {
+ num = va_arg(ap, int);
+ }
+ length = PrintNum(buf, num, 8, 0, width, ladjust, padc, 0);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case 'u':
+ case 'U':
+ if (longFlag) {
+ num = va_arg(ap, long int);
+ } else {
+ num = va_arg(ap, int);
+ }
+ length = PrintNum(buf, num, 10, 0, width, ladjust, padc, 0);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case 'x':
+ if (longFlag) {
+ num = va_arg(ap, long int);
+ } else {
+ num = va_arg(ap, int);
+ }
+ length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 0);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case 'X':
+ if (longFlag) {
+ num = va_arg(ap, long int);
+ } else {
+ num = va_arg(ap, int);
+ }
+ length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 1);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case 'c':
+ c = (char)va_arg(ap, int);
+ length = PrintChar(buf, c, width, ladjust);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case 's':
+ s = (char*)va_arg(ap, char *);
+ length = PrintString(buf, s, width, ladjust);
+ OUTPUT(arg, buf, length);
+ break;
+
+ case '\0':
+ fmt --;
+ break;
+
+ default:
+ /* output this char as it is */
+ OUTPUT(arg, fmt, 1);
+ } /* switch (*fmt) */
+
+ fmt ++;
+ } /* for(;;) */
+
+ /* special termination call */
+ OUTPUT(arg, "\0", 1);
+}
+
+
+/* --------------- local help functions --------------------- */
+static int
+PrintChar(char * buf, char c, int length, int ladjust)
+{
+ int i;
+
+ if (length < 1) length = 1;
+ if (ladjust) {
+ *buf = c;
+ for (i=1; i< length; i++) buf[i] = ' ';
+ } else {
+ for (i=0; i< length-1; i++) buf[i] = ' ';
+ buf[length - 1] = c;
+ }
+ return length;
+}
+
+static int
+PrintString(char * buf, char* s, int length, int ladjust)
+{
+ int i;
+ int len=0;
+ char* s1 = s;
+ while (*s1++) len++;
+ if (length < len) length = len;
+
+ if (ladjust) {
+ for (i=0; i< len; i++) buf[i] = s[i];
+ for (i=len; i< length; i++) buf[i] = ' ';
+ } else {
+ for (i=0; i< length-len; i++) buf[i] = ' ';
+ for (i=length-len; i < length; i++) buf[i] = s[i-length+len];
+ }
+ return length;
+}
+
+static int
+PrintNum(char * buf, unsigned long u, int base, int negFlag,
+ int length, int ladjust, char padc, int upcase)
+{
+ /* algorithm :
+ * 1. prints the number from left to right in reverse form.
+ * 2. fill the remaining spaces with padc if length is longer than
+ * the actual length
+ * TRICKY : if left adjusted, no "0" padding.
+ * if negtive, insert "0" padding between "0" and number.
+ * 3. if (!ladjust) we reverse the whole string including paddings
+ * 4. otherwise we only reverse the actual string representing the num.
+ */
+
+ int actualLength =0;
+ char *p = buf;
+ int i;
+
+ do {
+ int tmp = u %base;
+ if (tmp <= 9) {
+ *p++ = '0' + tmp;
+ } else if (upcase) {
+ *p++ = 'A' + tmp - 10;
+ } else {
+ *p++ = 'a' + tmp - 10;
+ }
+ u /= base;
+ } while (u != 0);
+
+ if (negFlag) {
+ *p++ = '-';
+ }
+
+ /* figure out actual length and adjust the maximum length */
+ actualLength = p - buf;
+ if (length < actualLength) length = actualLength;
+
+ /* add padding */
+ if (ladjust) {
+ padc = ' ';
+ }
+ if (negFlag && !ladjust && (padc == '0')) {
+ for (i = actualLength-1; i< length-1; i++) buf[i] = padc;
+ buf[length -1] = '-';
+ } else {
+ for (i = actualLength; i< length; i++) buf[i] = padc;
+ }
+
+
+ /* prepare to reverse the string */
+ {
+ int begin = 0;
+ int end;
+ if (ladjust) {
+ end = actualLength - 1;
+ } else {
+ end = length -1;
+ }
+
+ while (end > begin) {
+ char tmp = buf[begin];
+ buf[begin] = buf[end];
+ buf[end] = tmp;
+ begin ++;
+ end --;
+ }
+ }
+
+ /* adjust the string pointer */
+ return length;
+}
+
+static void printf_output(void *arg, char *s, int l)
+{
+ int i;
+
+ // special termination call
+ if ((l==1) && (s[0] == '\0')) return;
+
+ for (i=0; i< l; i++) {
+ board_putc(s[i]);
+ if (s[i] == '\n') board_putc('\r');
+ }
+}
+
+void printf(char *fmt, ...)
+{
+ va_list ap;
+ va_start(ap, fmt);
+ lp_Print(printf_output, 0, fmt, ap);
+ va_end(ap);
+}
--- /dev/null
+/*
+ * Copyright (C) 2001 MontaVista Software Inc.
+ * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License as published by the
+ * Free Software Foundation; either version 2 of the License, or (at your
+ * option) any later version.
+ *
+ */
+
+#ifndef _printf_h_
+#define _printf_h_
+
+#include <stdarg.h>
+void printf(char *fmt, ...);
+
+#endif /* _printf_h_ */
--- /dev/null
+#
+# Copyright (C) 2010 OpenWrt.org
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define KernelPackage/pcmcia-bcm63xx
+ SUBMENU:=$(PCMCIA_MENU)
+ TITLE:=Broadcom BCM63xx PCMCIA support
+ DEPENDS:=@TARGET_bcm63xx +kmod-pcmcia-rsrc
+ KCONFIG:=CONFIG_PCMCIA_BCM63XX
+ FILES:=$(LINUX_DIR)/drivers/pcmcia/bcm63xx_pcmcia.ko
+ AUTOLOAD:=$(call AutoLoad,41,bcm63xx_pcmcia)
+endef
+
+define KernelPackage/pcmcia-bcm63xx/description
+ Kernel support for PCMCIA/CardBus controller on the BCM63xx SoC
+endef
+
+$(eval $(call KernelPackage,pcmcia-bcm63xx))
+
+define KernelPackage/bcm63xx-udc
+ SUBMENU:=$(USB_MENU)
+ TITLE:=Broadcom BCM63xx UDC support
+ DEPENDS:=@TARGET_bcm63xx +kmod-usb-gadget
+ KCONFIG:=CONFIG_USB_BCM63XX_UDC
+ FILES:= \
+ $(LINUX_DIR)/drivers/usb/gadget/udc/bcm63xx_udc.ko
+ AUTOLOAD:=$(call AutoLoad,51,bcm63xx_udc)
+ $(call AddDepends/usb)
+endef
+
+define KernelPackage/bcm63xx-udc/description
+ Kernel support for the USB gadget (device) controller on the BCM63xx SoC
+endef
+
+$(eval $(call KernelPackage,bcm63xx-udc))
--- /dev/null
+From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 16 Jul 2017 12:23:47 +0200
+Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support
+
+Enable clkdev lookup support to allow us providing clocks under
+different names to devices more easily, so we don't need to care
+about clock name clashes anymore.
+
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/Kconfig | 1 +
+ arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++-----------
+ 2 files changed, 116 insertions(+), 35 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -279,6 +279,7 @@ config BCM63XX
+ select GPIOLIB
+ select HAVE_CLK
+ select MIPS_L1_CACHE_SHIFT_4
++ select CLKDEV_LOOKUP
+ help
+ Support for BCM63XX based boards
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -11,6 +11,7 @@
+ #include <linux/mutex.h>
+ #include <linux/err.h>
+ #include <linux/clk.h>
++#include <linux/clkdev.h>
+ #include <linux/delay.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_io.h>
+@@ -359,44 +360,103 @@ long clk_round_rate(struct clk *clk, uns
+ }
+ EXPORT_SYMBOL_GPL(clk_round_rate);
+
+-struct clk *clk_get(struct device *dev, const char *id)
+-{
+- if (!strcmp(id, "enet0"))
+- return &clk_enet0;
+- if (!strcmp(id, "enet1"))
+- return &clk_enet1;
+- if (!strcmp(id, "enetsw"))
+- return &clk_enetsw;
+- if (!strcmp(id, "ephy"))
+- return &clk_ephy;
+- if (!strcmp(id, "usbh"))
+- return &clk_usbh;
+- if (!strcmp(id, "usbd"))
+- return &clk_usbd;
+- if (!strcmp(id, "spi"))
+- return &clk_spi;
+- if (!strcmp(id, "hsspi"))
+- return &clk_hsspi;
+- if (!strcmp(id, "xtm"))
+- return &clk_xtm;
+- if (!strcmp(id, "periph"))
+- return &clk_periph;
+- if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
+- return &clk_pcm;
+- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
+- return &clk_ipsec;
+- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
+- return &clk_pcie;
+- return ERR_PTR(-ENOENT);
+-}
+-
+-EXPORT_SYMBOL(clk_get);
+-
+-void clk_put(struct clk *clk)
+-{
+-}
+-
+-EXPORT_SYMBOL(clk_put);
++static struct clk_lookup bcm3368_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
++ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
++ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
++};
++
++static struct clk_lookup bcm6328_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
++ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
++};
++
++static struct clk_lookup bcm6338_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
++ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
++ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++};
++
++static struct clk_lookup bcm6345_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
++ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
++ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++};
++
++static struct clk_lookup bcm6348_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
++ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
++ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++};
++
++static struct clk_lookup bcm6358_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
++ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
++ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
++};
++
++static struct clk_lookup bcm6362_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
++ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
++ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
++};
++
++static struct clk_lookup bcm6368_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT(NULL, "xtm", &clk_xtm),
++ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
++};
+
+ #define HSSPI_PLL_HZ_6328 133333333
+ #define HSSPI_PLL_HZ_6362 400000000
+@@ -404,11 +464,31 @@ EXPORT_SYMBOL(clk_put);
+ static int __init bcm63xx_clk_init(void)
+ {
+ switch (bcm63xx_get_cpu_id()) {
++ case BCM3368_CPU_ID:
++ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
++ break;
+ case BCM6328_CPU_ID:
+ clk_hsspi.rate = HSSPI_PLL_HZ_6328;
++ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
++ break;
++ case BCM6338_CPU_ID:
++ clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks));
++ break;
++ case BCM6345_CPU_ID:
++ clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks));
++ break;
++ case BCM6348_CPU_ID:
++ clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks));
++ break;
++ case BCM6358_CPU_ID:
++ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
+ break;
+ case BCM6362_CPU_ID:
+ clk_hsspi.rate = HSSPI_PLL_HZ_6362;
++ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
++ break;
++ case BCM6368_CPU_ID:
++ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
+ break;
+ }
+
--- /dev/null
+From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 16 Jul 2017 12:31:44 +0200
+Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart
+
+Add a lookup as "refclk" to describe its function for the uarts.
+
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/clk.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -363,6 +363,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
+ static struct clk_lookup bcm3368_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -376,6 +378,8 @@ static struct clk_lookup bcm3368_clks[]
+ static struct clk_lookup bcm6328_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -387,6 +391,7 @@ static struct clk_lookup bcm6328_clks[]
+ static struct clk_lookup bcm6338_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -399,6 +404,7 @@ static struct clk_lookup bcm6338_clks[]
+ static struct clk_lookup bcm6345_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -411,6 +417,7 @@ static struct clk_lookup bcm6345_clks[]
+ static struct clk_lookup bcm6348_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -423,6 +430,8 @@ static struct clk_lookup bcm6348_clks[]
+ static struct clk_lookup bcm6358_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -436,6 +445,8 @@ static struct clk_lookup bcm6358_clks[]
+ static struct clk_lookup bcm6362_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -449,6 +460,8 @@ static struct clk_lookup bcm6362_clks[]
+ static struct clk_lookup bcm6368_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
--- /dev/null
+From 8124706e6040b1cf0d2dd3a05759df6cec4bddfb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 16 Jul 2017 12:32:37 +0200
+Subject: [PATCH V2 3/8] tty/bcm63xx_uart: use refclk for the expected clock
+ name
+
+We now have the clock available under refclk, so use that.
+
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/tty/serial/bcm63xx_uart.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/tty/serial/bcm63xx_uart.c
++++ b/drivers/tty/serial/bcm63xx_uart.c
+@@ -847,7 +847,7 @@ static int bcm_uart_probe(struct platfor
+ return -ENODEV;
+
+ clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
+- clk_get(&pdev->dev, "periph");
++ clk_get(&pdev->dev, "refclk");
+ if (IS_ERR(clk))
+ return -ENODEV;
+
--- /dev/null
+From 317f8659bba01b307cbe4e9902d4e3d333fd7164 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 16 Jul 2017 12:39:17 +0200
+Subject: [PATCH V2 4/8] tty/bcm63xx_uart: allow naming clock in device tree
+
+Codify using a named clock for the refclk of the uart. This makes it
+easier if we might need to add a gating clock (like present on the
+BCM6345).
+
+Acked-by: Rob Herring <robh@kernel.org>
+Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt | 6 ++++++
+ drivers/tty/serial/bcm63xx_uart.c | 6 ++++--
+ 2 files changed, 10 insertions(+), 2 deletions(-)
+
+--- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
++++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
+@@ -11,6 +11,11 @@ Required properties:
+ - clocks: Clock driving the hardware; used to figure out the baud rate
+ divisor.
+
++
++Optional properties:
++
++- clock-names: Should be "refclk".
++
+ Example:
+
+ uart0: serial@14e00520 {
+@@ -19,6 +24,7 @@ Example:
+ interrupt-parent = <&periph_intc>;
+ interrupts = <2>;
+ clocks = <&periph_clk>;
++ clock-names = "refclk";
+ };
+
+ clocks {
+--- a/drivers/tty/serial/bcm63xx_uart.c
++++ b/drivers/tty/serial/bcm63xx_uart.c
+@@ -846,8 +846,10 @@ static int bcm_uart_probe(struct platfor
+ if (!res_irq)
+ return -ENODEV;
+
+- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
+- clk_get(&pdev->dev, "refclk");
++ clk = clk_get(&pdev->dev, "refclk");
++ if (IS_ERR(clk) && pdev->dev.of_node)
++ clk = of_clk_get(pdev->dev.of_node, 0);
++
+ if (IS_ERR(clk))
+ return -ENODEV;
+
--- /dev/null
+From cb86630379c8f3432c916d62045b5176f17f4123 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 16 Jul 2017 12:57:21 +0200
+Subject: [PATCH V2 6/8] MIPS: BCM63XX: move the HSSPI PLL HZ into its own
+ clock
+
+Split up the HSSPL clock into rate and a gate clock, to more closely
+match the actual hardware.
+
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/clk.c | 10 ++++++++--
+ 1 file changed, 8 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -248,6 +248,10 @@ static struct clk clk_hsspi = {
+ .set = hsspi_set,
+ };
+
++/*
++ * HSSPI PLL
++ */
++static struct clk clk_hsspi_pll;
+
+ /*
+ * XTM clock
+@@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -447,6 +452,7 @@ static struct clk_lookup bcm6362_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -481,7 +487,7 @@ static int __init bcm63xx_clk_init(void)
+ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
+ break;
+ case BCM6328_CPU_ID:
+- clk_hsspi.rate = HSSPI_PLL_HZ_6328;
++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
+ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
+ break;
+ case BCM6338_CPU_ID:
+@@ -497,7 +503,7 @@ static int __init bcm63xx_clk_init(void)
+ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
+ break;
+ case BCM6362_CPU_ID:
+- clk_hsspi.rate = HSSPI_PLL_HZ_6362;
++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
+ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
+ break;
+ case BCM6368_CPU_ID:
--- /dev/null
+From 6d43970a2eb1c7ee88caf7328d201f9c001262e9 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 16 Jul 2017 12:48:41 +0200
+Subject: [PATCH V2 7/8] MIPS: BCM63XX: provide enet clocks as "enet" to the
+ ethernet devices
+
+Add lookups to provide the appropriate enetX clocks as just "enet" to
+the ethernet devices.
+
+Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/clk.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -377,6 +377,8 @@ static struct clk_lookup bcm3368_clks[]
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
+ };
+
+ static struct clk_lookup bcm6328_clks[] = {
+@@ -404,6 +406,7 @@ static struct clk_lookup bcm6338_clks[]
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
+ };
+
+ static struct clk_lookup bcm6345_clks[] = {
+@@ -417,6 +420,7 @@ static struct clk_lookup bcm6345_clks[]
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
+ };
+
+ static struct clk_lookup bcm6348_clks[] = {
+@@ -430,6 +434,8 @@ static struct clk_lookup bcm6348_clks[]
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc),
+ };
+
+ static struct clk_lookup bcm6358_clks[] = {
+@@ -445,6 +451,8 @@ static struct clk_lookup bcm6358_clks[]
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
++ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
++ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
+ };
+
+ static struct clk_lookup bcm6362_clks[] = {
--- /dev/null
+From b98027285bd1fa95da0645a4234a5fc1f1a83f92 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 26 Feb 2017 11:59:52 +0100
+Subject: [PATCH V2 8/8] MIPS: BCM63XX: split out swpkt_sar/usb clocks
+
+Make the secondary switch clocks their own clocks. This allows proper
+enable reference counting between SAR/XTM and the main switch clocks,
+and controlling them individually from drivers.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++--------
+ 1 file changed, 51 insertions(+), 10 deletions(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -122,21 +122,56 @@ static struct clk clk_ephy = {
+ };
+
+ /*
++ * Ethernet switch SAR clock
++ */
++static void swpkt_sar_set(struct clk *clk, int enable)
++{
++ if (BCMCPU_IS_6368())
++ bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable);
++ else
++ return;
++}
++
++static struct clk clk_swpkt_sar = {
++ .set = swpkt_sar_set,
++};
++
++/*
++ * Ethernet switch USB clock
++ */
++static void swpkt_usb_set(struct clk *clk, int enable)
++{
++ if (BCMCPU_IS_6368())
++ bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable);
++ else
++ return;
++}
++
++static struct clk clk_swpkt_usb = {
++ .set = swpkt_usb_set,
++};
++
++/*
+ * Ethernet switch clock
+ */
+ static void enetsw_set(struct clk *clk, int enable)
+ {
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6328()) {
+ bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
+- else if (BCMCPU_IS_6362())
++ } else if (BCMCPU_IS_6362()) {
+ bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
+- else if (BCMCPU_IS_6368())
+- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
+- CKCTL_6368_SWPKT_USB_EN |
+- CKCTL_6368_SWPKT_SAR_EN,
+- enable);
+- else
++ } else if (BCMCPU_IS_6368()) {
++ if (enable) {
++ clk_enable_unlocked(&clk_swpkt_sar);
++ clk_enable_unlocked(&clk_swpkt_usb);
++ } else {
++ clk_disable_unlocked(&clk_swpkt_usb);
++ clk_disable_unlocked(&clk_swpkt_sar);
++ }
++ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
++ } else {
+ return;
++ }
+
+ if (enable) {
+ /* reset switch core afer clock change */
+@@ -261,8 +296,12 @@ static void xtm_set(struct clk *clk, int
+ if (!BCMCPU_IS_6368())
+ return;
+
+- bcm_hwclock_set(CKCTL_6368_SAR_EN |
+- CKCTL_6368_SWPKT_SAR_EN, enable);
++ if (enable)
++ clk_enable_unlocked(&clk_swpkt_sar);
++ else
++ clk_disable_unlocked(&clk_swpkt_sar);
++
++ bcm_hwclock_set(CKCTL_6368_SAR_EN, enable);
+
+ if (enable) {
+ /* reset sar core afer clock change */
+@@ -451,6 +490,8 @@ static struct clk_lookup bcm6358_clks[]
+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
+ CLKDEV_INIT(NULL, "spi", &clk_spi),
+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
++ CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar),
++ CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb),
+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
+ };
--- /dev/null
+From 71710bb6cbc82f411a4e5faafa0c3178e48e7137 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 30 May 2017 13:31:45 +0200
+Subject: [PATCH 3/6] bcm63xx_enet: do not rely on probe order
+
+Do not rely on the shared device being probed before the enet(sw)
+devices. This makes it easier to eventually move out the shared
+device as a dma controller driver (what it should be).
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 9 ++-------
+ 1 file changed, 2 insertions(+), 7 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1723,10 +1723,8 @@ static int bcm_enet_probe(struct platfor
+ const char *clk_name;
+ int i, ret;
+
+- /* stop if shared driver failed, assume driver->probe will be
+- * called in the same order we register devices (correct ?) */
+ if (!bcm_enet_shared_base[0])
+- return -ENODEV;
++ return -EPROBE_DEFER;
+
+ res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
+ res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
+@@ -2701,11 +2699,8 @@ static int bcm_enetsw_probe(struct platf
+ struct resource *res_mem;
+ int ret, irq_rx, irq_tx;
+
+- /* stop if shared driver failed, assume driver->probe will be
+- * called in the same order we register devices (correct ?)
+- */
+ if (!bcm_enet_shared_base[0])
+- return -ENODEV;
++ return -EPROBE_DEFER;
+
+ res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ irq_rx = platform_get_irq(pdev, 0);
--- /dev/null
+From 179a445ae4ef36ec44f4aea18e5f42d21334d186 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sat, 25 Feb 2017 12:39:25 +0100
+Subject: [PATCH 4/6] bcm63xx_enet: use managed functions for clock/ioremap
+
+Use managed functions where possible to reduce the amount of resource
+handling on error and remove paths.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 54 +++++++---------------------
+ 1 file changed, 12 insertions(+), 42 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1768,14 +1768,14 @@ static int bcm_enet_probe(struct platfor
+ clk_name = "enet1";
+ }
+
+- priv->mac_clk = clk_get(&pdev->dev, clk_name);
++ priv->mac_clk = devm_clk_get(&pdev->dev, clk_name);
+ if (IS_ERR(priv->mac_clk)) {
+ ret = PTR_ERR(priv->mac_clk);
+ goto out;
+ }
+ ret = clk_prepare_enable(priv->mac_clk);
+ if (ret)
+- goto out_put_clk_mac;
++ goto out;
+
+ /* initialize default and fetch platform data */
+ priv->rx_ring_size = BCMENET_DEF_RX_DESC;
+@@ -1803,7 +1803,7 @@ static int bcm_enet_probe(struct platfor
+
+ if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
+ /* using internal PHY, enable clock */
+- priv->phy_clk = clk_get(&pdev->dev, "ephy");
++ priv->phy_clk = devm_clk_get(&pdev->dev, "ephy");
+ if (IS_ERR(priv->phy_clk)) {
+ ret = PTR_ERR(priv->phy_clk);
+ priv->phy_clk = NULL;
+@@ -1811,7 +1811,7 @@ static int bcm_enet_probe(struct platfor
+ }
+ ret = clk_prepare_enable(priv->phy_clk);
+ if (ret)
+- goto out_put_clk_phy;
++ goto out_disable_clk_mac;
+ }
+
+ /* do minimal hardware init to be able to probe mii bus */
+@@ -1908,14 +1908,8 @@ out_uninit_hw:
+ if (priv->phy_clk)
+ clk_disable_unprepare(priv->phy_clk);
+
+-out_put_clk_phy:
+- if (priv->phy_clk)
+- clk_put(priv->phy_clk);
+-
+ out_disable_clk_mac:
+ clk_disable_unprepare(priv->mac_clk);
+-out_put_clk_mac:
+- clk_put(priv->mac_clk);
+ out:
+ free_netdev(dev);
+ return ret;
+@@ -1951,12 +1945,10 @@ static int bcm_enet_remove(struct platfo
+ }
+
+ /* disable hw block clocks */
+- if (priv->phy_clk) {
++ if (priv->phy_clk)
+ clk_disable_unprepare(priv->phy_clk);
+- clk_put(priv->phy_clk);
+- }
++
+ clk_disable_unprepare(priv->mac_clk);
+- clk_put(priv->mac_clk);
+
+ free_netdev(dev);
+ return 0;
+@@ -2739,26 +2731,20 @@ static int bcm_enetsw_probe(struct platf
+ if (ret)
+ goto out;
+
+- if (!request_mem_region(res_mem->start, resource_size(res_mem),
+- "bcm63xx_enetsw")) {
+- ret = -EBUSY;
++ priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
++ if (IS_ERR(priv->base)) {
++ ret = PTR_ERR(priv->base);
+ goto out;
+ }
+
+- priv->base = ioremap(res_mem->start, resource_size(res_mem));
+- if (priv->base == NULL) {
+- ret = -ENOMEM;
+- goto out_release_mem;
+- }
+-
+- priv->mac_clk = clk_get(&pdev->dev, "enetsw");
++ priv->mac_clk = devm_clk_get(&pdev->dev, "enetsw");
+ if (IS_ERR(priv->mac_clk)) {
+ ret = PTR_ERR(priv->mac_clk);
+- goto out_unmap;
++ goto out;
+ }
+ ret = clk_prepare_enable(priv->mac_clk);
+ if (ret)
+- goto out_put_clk;
++ goto out;
+
+ priv->rx_chan = 0;
+ priv->tx_chan = 1;
+@@ -2790,15 +2776,6 @@ static int bcm_enetsw_probe(struct platf
+
+ out_disable_clk:
+ clk_disable_unprepare(priv->mac_clk);
+-
+-out_put_clk:
+- clk_put(priv->mac_clk);
+-
+-out_unmap:
+- iounmap(priv->base);
+-
+-out_release_mem:
+- release_mem_region(res_mem->start, resource_size(res_mem));
+ out:
+ free_netdev(dev);
+ return ret;
+@@ -2810,20 +2787,13 @@ static int bcm_enetsw_remove(struct plat
+ {
+ struct bcm_enet_priv *priv;
+ struct net_device *dev;
+- struct resource *res;
+
+ /* stop netdevice */
+ dev = platform_get_drvdata(pdev);
+ priv = netdev_priv(dev);
+ unregister_netdev(dev);
+
+- /* release device resources */
+- iounmap(priv->base);
+- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+- release_mem_region(res->start, resource_size(res));
+-
+ clk_disable_unprepare(priv->mac_clk);
+- clk_put(priv->mac_clk);
+
+ free_netdev(dev);
+ return 0;
--- /dev/null
+From 555baec974ede81e616ca88ac6d3fca09239368f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 18 Jul 2017 13:18:01 +0200
+Subject: [PATCH 5/6] bcm63xx_enet: drop unneeded NULL phy_clk check
+
+clk_disable and clk_unprepare are NULL-safe, so need to duplicate the
+NULL check of the functions.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 7 ++-----
+ 1 file changed, 2 insertions(+), 5 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1905,8 +1905,7 @@ out_free_mdio:
+ out_uninit_hw:
+ /* turn off mdc clock */
+ enet_writel(priv, 0, ENET_MIISC_REG);
+- if (priv->phy_clk)
+- clk_disable_unprepare(priv->phy_clk);
++ clk_disable_unprepare(priv->phy_clk);
+
+ out_disable_clk_mac:
+ clk_disable_unprepare(priv->mac_clk);
+@@ -1945,9 +1944,7 @@ static int bcm_enet_remove(struct platfo
+ }
+
+ /* disable hw block clocks */
+- if (priv->phy_clk)
+- clk_disable_unprepare(priv->phy_clk);
+-
++ clk_disable_unprepare(priv->phy_clk);
+ clk_disable_unprepare(priv->mac_clk);
+
+ free_netdev(dev);
--- /dev/null
+From 77364ce98037972fb1c57d0ee0418eb1c2b26521 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 29 May 2017 13:11:14 +0200
+Subject: [PATCH 6/6] bcm63xx_enet: remove unneeded include
+
+We don't use anyhing from that file, so drop it.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.h | 1 -
+ 1 file changed, 1 deletion(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+@@ -9,7 +9,6 @@
+ #include <linux/platform_device.h>
+
+ #include <bcm63xx_regs.h>
+-#include <bcm63xx_irq.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_iudma.h>
+
--- /dev/null
+From 943b0832e0cf3afe5bd40ffb1885d06106122c5d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 16 Jul 2017 12:49:49 +0200
+Subject: [PATCH 1/4] bcm63xx_enet: just use "enet" as the clock name
+
+Now that we have the individual clocks available as "enet" we
+don't need to rely on the device id for them anymore.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 5 +----
+ 1 file changed, 1 insertion(+), 4 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1720,7 +1720,6 @@ static int bcm_enet_probe(struct platfor
+ struct bcm63xx_enet_platform_data *pd;
+ struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx;
+ struct mii_bus *bus;
+- const char *clk_name;
+ int i, ret;
+
+ if (!bcm_enet_shared_base[0])
+@@ -1761,14 +1760,12 @@ static int bcm_enet_probe(struct platfor
+ if (priv->mac_id == 0) {
+ priv->rx_chan = 0;
+ priv->tx_chan = 1;
+- clk_name = "enet0";
+ } else {
+ priv->rx_chan = 2;
+ priv->tx_chan = 3;
+- clk_name = "enet1";
+ }
+
+- priv->mac_clk = devm_clk_get(&pdev->dev, clk_name);
++ priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
+ if (IS_ERR(priv->mac_clk)) {
+ ret = PTR_ERR(priv->mac_clk);
+ goto out;
--- /dev/null
+From b7d1d1f345bb3b25c360c1df812d98866e2ee7fb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sat, 30 Sep 2017 13:50:03 +0200
+Subject: [PATCH 2/4] bcm63xx_enet: use platform data for dma channel numbers
+
+To reduce the reliance on device ids, pass the dma channel numbers to
+the enet devices as platform data.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/dev-enet.c | 8 ++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 4 ++++
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 11 ++---------
+ 3 files changed, 14 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -265,6 +265,14 @@ int __init bcm63xx_enet_register(int uni
+ dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
+ }
+
++ if (unit == 0) {
++ dpd->rx_chan = 0;
++ dpd->tx_chan = 1;
++ } else {
++ dpd->rx_chan = 2;
++ dpd->tx_chan = 3;
++ }
++
+ ret = platform_device_register(pdev);
+ if (ret)
+ return ret;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
+@@ -55,6 +55,10 @@ struct bcm63xx_enet_platform_data {
+
+ /* DMA descriptor shift */
+ unsigned int dma_desc_shift;
++
++ /* dma channel ids */
++ int rx_chan;
++ int tx_chan;
+ };
+
+ /*
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1756,15 +1756,6 @@ static int bcm_enet_probe(struct platfor
+ priv->irq_tx = res_irq_tx->start;
+ priv->mac_id = pdev->id;
+
+- /* get rx & tx dma channel id for this mac */
+- if (priv->mac_id == 0) {
+- priv->rx_chan = 0;
+- priv->tx_chan = 1;
+- } else {
+- priv->rx_chan = 2;
+- priv->tx_chan = 3;
+- }
+-
+ priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
+ if (IS_ERR(priv->mac_clk)) {
+ ret = PTR_ERR(priv->mac_clk);
+@@ -1796,6 +1787,8 @@ static int bcm_enet_probe(struct platfor
+ priv->dma_chan_width = pd->dma_chan_width;
+ priv->dma_has_sram = pd->dma_has_sram;
+ priv->dma_desc_shift = pd->dma_desc_shift;
++ priv->rx_chan = pd->rx_chan;
++ priv->tx_chan = pd->tx_chan;
+ }
+
+ if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
--- /dev/null
+From 8c61608e5dd2e15575c171ee9cd558ddc3b94962 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 17 Dec 2017 12:54:30 +0100
+Subject: [PATCH 3/4] bcm63xx_enet: remove pointless mac_id check
+
+Enabling the ephy clock for mac 1 is harmless, and the actual usage of
+the ephy is not restricted to mac 0, so we might as well remove the
+check.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1791,7 +1791,7 @@ static int bcm_enet_probe(struct platfor
+ priv->tx_chan = pd->tx_chan;
+ }
+
+- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
++ if (priv->has_phy && !priv->use_external_mii) {
+ /* using internal PHY, enable clock */
+ priv->phy_clk = devm_clk_get(&pdev->dev, "ephy");
+ if (IS_ERR(priv->phy_clk)) {
--- /dev/null
+From faea89cd893a1a7af81185f026a64dad603ef72f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 17 Dec 2017 12:58:12 +0100
+Subject: [PATCH 4/4] bcm63xx_enet: use platform device id directly for miibus
+ name
+
+Directly use the platform device for generating the miibus name. This removes
+the last user of bcm_enet_priv::mac_id and we can remove the field.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 +--
+ drivers/net/ethernet/broadcom/bcm63xx_enet.h | 3 ---
+ 2 files changed, 1 insertion(+), 5 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1754,7 +1754,6 @@ static int bcm_enet_probe(struct platfor
+ dev->irq = priv->irq = res_irq->start;
+ priv->irq_rx = res_irq_rx->start;
+ priv->irq_tx = res_irq_tx->start;
+- priv->mac_id = pdev->id;
+
+ priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
+ if (IS_ERR(priv->mac_clk)) {
+@@ -1822,7 +1821,7 @@ static int bcm_enet_probe(struct platfor
+ bus->priv = priv;
+ bus->read = bcm_enet_mdio_read_phylib;
+ bus->write = bcm_enet_mdio_write_phylib;
+- sprintf(bus->id, "%s-%d", pdev->name, priv->mac_id);
++ sprintf(bus->id, "%s-%d", pdev->name, pdev->id);
+
+ /* only probe bus where we think the PHY is, because
+ * the mdio read operation return 0 instead of 0xffff
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+@@ -193,9 +193,6 @@ struct bcm_enet_mib_counters {
+
+ struct bcm_enet_priv {
+
+- /* mac id (from platform device id) */
+- int mac_id;
+-
+ /* base remapped address of device */
+ void __iomem *base;
+
--- /dev/null
+From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:19 +0100
+Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
+
+Knowledge of the clock setup delay should remain at the clock level (so
+it can be clock specific and CPU specific). Add the 100 milliseconds
+required clock delay for the USB host clock when it gets enabled.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -214,6 +214,11 @@ static void usbh_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++ else
++ return;
++
++ if (enable)
++ msleep(100);
+ }
+
+ static struct clk clk_usbh = {
--- /dev/null
+From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:20 +0100
+Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
+ clock code
+
+This patch adds the required 10 micro seconds delay to the USB device
+clock enable operation. Put this where the correct clock knowledege is,
+which is in the clock code, and remove this delay from the bcm63xx_udc
+gadget driver where it was before.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c | 5 +++++
+ drivers/usb/gadget/bcm63xx_udc.c | 1 -
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -236,6 +236,11 @@ static void usbd_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++ else
++ return;
++
++ if (enable)
++ udelay(10);
+ }
+
+ static struct clk clk_usbd = {
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -410,7 +410,6 @@ static inline void set_clocks(struct bcm
+ if (is_enabled) {
+ clk_enable(udc->usbh_clk);
+ clk_enable(udc->usbd_clk);
+- udelay(10);
+ } else {
+ clk_disable(udc->usbd_clk);
+ clk_disable(udc->usbh_clk);
--- /dev/null
+From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:21 +0100
+Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
+ register
+
+This patch moves the code touching the USB private register in the
+bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
+preparation for adding support for OHCI and EHCI host controllers which
+will also touch the USB private register.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++
+ drivers/usb/gadget/bcm63xx_udc.c | 27 ++--------
+ 4 files changed, 67 insertions(+), 24 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/usb-common.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-usbd.o
++ dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -0,0 +1,53 @@
++/*
++ * Broadcom BCM63xx common USB device configuration code
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
++ * Copyright (C) 2012 Broadcom Corporation
++ *
++ */
++#include <linux/export.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
++{
++ u32 val;
++
++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++ if (is_device) {
++ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ } else {
++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ }
++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ if (is_device)
++ val |= USBH_PRIV_SWAP_USBD_MASK;
++ else
++ val &= ~USBH_PRIV_SWAP_USBD_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
++
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
++{
++ u32 val;
++
++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++ if (is_on)
++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ else
++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -0,0 +1,9 @@
++#ifndef BCM63XX_USB_PRIV_H_
++#define BCM63XX_USB_PRIV_H_
++
++#include <linux/types.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++
++#endif /* BCM63XX_USB_PRIV_H_ */
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -39,6 +39,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_usb_priv.h>
+
+ #define DRV_MODULE_NAME "bcm63xx_udc"
+
+@@ -887,22 +888,7 @@ static void bcm63xx_select_phy_mode(stru
+ bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
+ }
+
+- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+- if (is_device) {
+- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- } else {
+- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- }
+- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
+-
+- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
+- if (is_device)
+- val |= USBH_PRIV_SWAP_USBD_MASK;
+- else
+- val &= ~USBH_PRIV_SWAP_USBD_MASK;
+- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++ bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
+ }
+
+ /**
+@@ -916,14 +902,9 @@ static void bcm63xx_select_phy_mode(stru
+ */
+ static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
+ {
+- u32 val, portmask = BIT(udc->pd->port_no);
++ u32 portmask = BIT(udc->pd->port_no);
+
+- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+- if (is_on)
+- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- else
+- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++ bcm63xx_usb_priv_select_pullup(portmask, is_on);
+ }
+
+ /**
--- /dev/null
+From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:22 +0100
+Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
+ common USB code
+
+This patch updates the common USB code touching the USB private
+registers with the specific bits to properly enable OHCI and EHCI
+controllers on BCM63xx SoCs. As a result we now need to protect access
+to Read Modify Write sequences using a spinlock because we cannot
+guarantee that any of the exposed helper will not be called
+concurrently.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 +
+ 2 files changed, 99 insertions(+)
+
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -5,10 +5,12 @@
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
+ * Copyright (C) 2012 Broadcom Corporation
+ *
+ */
++#include <linux/spinlock.h>
+ #include <linux/export.h>
+
+ #include <bcm63xx_cpu.h>
+@@ -16,9 +18,14 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_usb_priv.h>
+
++static DEFINE_SPINLOCK(usb_priv_reg_lock);
++
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
+ {
+ u32 val;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
+
+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ if (is_device) {
+@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
+ else
+ val &= ~USBH_PRIV_SWAP_USBD_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
+
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
+ {
+ u32 val;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
+
+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ if (is_on)
+@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
+ else
+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
++
++/* The following array represents the meaning of the DESC/DATA
++ * endian swapping with respect to the CPU configured endianness
++ *
++ * DATA ENDN mmio descriptor
++ * 0 0 BE invalid
++ * 0 1 BE LE
++ * 1 0 BE BE
++ * 1 1 BE invalid
++ *
++ * Since BCM63XX SoCs are configured to be in big-endian mode
++ * we want configuration at line 3.
++ */
++void bcm63xx_usb_priv_ohci_cfg_set(void)
++{
++ u32 reg;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++ if (BCMCPU_IS_6348())
++ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
++ else if (BCMCPU_IS_6358()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++ /*
++ * The magic value comes for the original vendor BSP
++ * and is needed for USB to work. Datasheet does not
++ * help, so the magic value is used as-is.
++ */
++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++ USBH_PRIV_TEST_6358_REG);
++
++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ }
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
++
++void bcm63xx_usb_priv_ehci_cfg_set(void)
++{
++ u32 reg;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++ if (BCMCPU_IS_6358()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++
++ /*
++ * The magic value comes for the original vendor BSP
++ * and is needed for USB to work. Datasheet does not
++ * help, so the magic value is used as-is.
++ */
++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++ USBH_PRIV_TEST_6358_REG);
++
++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ }
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -5,5 +5,7 @@
+
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++void bcm63xx_usb_priv_ohci_cfg_set(void);
++void bcm63xx_usb_priv_ehci_cfg_set(void);
+
+ #endif /* BCM63XX_USB_PRIV_H_ */
--- /dev/null
+From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:23 +0100
+Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+OHCI controller, and ensures that all relevant OHCI-related
+configuration options are correctly selected. So far, OHCI support is
+available for the 6328, 6348, 6358 and 6358 SoCs.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -7,10 +7,17 @@ config BCM63XX_CPU_3368
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+
++config BCM63XX_OHCI
++ bool
++ select USB_ARCH_HAS_OHCI
++ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
++ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
++
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6338
+ bool "support 6338 CPU"
+@@ -25,21 +32,25 @@ config BCM63XX_CPU_6348
+ bool "support 6348 CPU"
+ select SYS_HAS_CPU_BMIPS32_3300
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6358
+ bool "support 6358 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6362
+ bool "support 6362 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6368
+ bool "support 6368 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
--- /dev/null
+From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:24 +0100
+Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
+driven by the ohci-platform generic driver by using specific power
+on/off/suspend callback to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++
+ 3 files changed, 101 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-usbd.o usb-common.o
++ dev-usb-ohci.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -0,0 +1,94 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ohci_pdriver.h>
++#include <linux/dma-mapping.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ohci.h>
++
++static struct resource ohci_resources[] = {
++ {
++ .start = -1, /* filled at runtime */
++ .end = -1, /* filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ .start = -1, /* filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static u64 ohci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ohci_power_on(struct platform_device *pdev)
++{
++ usb_host_clock = clk_get(&pdev->dev, "usbh");
++ if (IS_ERR_OR_NULL(usb_host_clock))
++ return -ENODEV;
++
++ clk_prepare_enable(usb_host_clock);
++
++ bcm63xx_usb_priv_ohci_cfg_set();
++
++ return 0;
++}
++
++static void bcm63xx_ohci_power_off(struct platform_device *pdev)
++{
++ if (!IS_ERR_OR_NULL(usb_host_clock)) {
++ clk_disable_unprepare(usb_host_clock);
++ clk_put(usb_host_clock);
++ }
++}
++
++static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
++ .big_endian_desc = 1,
++ .big_endian_mmio = 1,
++ .no_big_frame_no = 1,
++ .num_ports = 1,
++ .power_on = bcm63xx_ohci_power_on,
++ .power_off = bcm63xx_ohci_power_off,
++ .power_suspend = bcm63xx_ohci_power_off,
++};
++
++static struct platform_device bcm63xx_ohci_device = {
++ .name = "ohci-platform",
++ .id = -1,
++ .num_resources = ARRAY_SIZE(ohci_resources),
++ .resource = ohci_resources,
++ .dev = {
++ .platform_data = &bcm63xx_ohci_pdata,
++ .dma_mask = &ohci_dmamask,
++ .coherent_dma_mask = DMA_BIT_MASK(32),
++ },
++};
++
++int __init bcm63xx_ohci_register(void)
++{
++ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
++ return -ENODEV;
++
++ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
++ ohci_resources[0].end = ohci_resources[0].start;
++ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
++ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
++
++ return platform_device_register(&bcm63xx_ohci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_OHCI_H_
++#define BCM63XX_DEV_USB_OHCI_H_
++
++int bcm63xx_ohci_register(void);
++
++#endif /* BCM63XX_DEV_USB_OHCI_H_ */
--- /dev/null
+From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:25 +0100
+Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
+ enables it
+
+BCM63XX-based boards can control the registration of the OHCI controller
+by setting their has_ohci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to
+register the OHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -27,6 +27,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+
+@@ -881,6 +882,9 @@ int __init board_register_devices(void)
+ if (board.has_usbd)
+ bcm63xx_usbd_register(&board.usbd);
+
++ if (board.has_ohci0)
++ bcm63xx_ohci_register();
++
+ /* Generate MAC address for WLAN and register our SPROM,
+ * do this after registering enet devices
+ */
--- /dev/null
+From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:26 +0100
+Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+EHCI controller, and ensures that all relevant EHCI-related
+configuration options are selected. So far BCM6328, BCM6358 and BCM6368
+have an EHCI controller and do select this symbol. Update
+drivers/usb/host/Kconfig with BCM63XX to update direct unmet
+dependencies.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig | 9 +++++++++
+ drivers/usb/host/Kconfig | 5 +++--
+ 2 files changed, 12 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -13,11 +13,18 @@ config BCM63XX_OHCI
+ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
+ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
+
++config BCM63XX_EHCI
++ bool
++ select USB_ARCH_HAS_EHCI
++ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
++ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
++
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6338
+ bool "support 6338 CPU"
+@@ -39,18 +46,21 @@ config BCM63XX_CPU_6358
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6362
+ bool "support 6362 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6368
+ bool "support 6368 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
--- /dev/null
+From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:27 +0100
+Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
+driven by the generic ehci-platform driver by using specific power
+on/off/suspend callbacks to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++
+ 3 files changed, 99 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-ohci.o dev-usb-usbd.o usb-common.o
++ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -0,0 +1,92 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/usb/ehci_pdriver.h>
++#include <linux/dma-mapping.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ehci.h>
++
++static struct resource ehci_resources[] = {
++ {
++ .start = -1, /* filled at runtime */
++ .end = -1, /* filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ .start = -1, /* filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static u64 ehci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ehci_power_on(struct platform_device *pdev)
++{
++ usb_host_clock = clk_get(&pdev->dev, "usbh");
++ if (IS_ERR_OR_NULL(usb_host_clock))
++ return -ENODEV;
++
++ clk_prepare_enable(usb_host_clock);
++
++ bcm63xx_usb_priv_ehci_cfg_set();
++
++ return 0;
++}
++
++static void bcm63xx_ehci_power_off(struct platform_device *pdev)
++{
++ if (!IS_ERR_OR_NULL(usb_host_clock)) {
++ clk_disable_unprepare(usb_host_clock);
++ clk_put(usb_host_clock);
++ }
++}
++
++static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
++ .big_endian_desc = 1,
++ .big_endian_mmio = 1,
++ .power_on = bcm63xx_ehci_power_on,
++ .power_off = bcm63xx_ehci_power_off,
++ .power_suspend = bcm63xx_ehci_power_off,
++};
++
++static struct platform_device bcm63xx_ehci_device = {
++ .name = "ehci-platform",
++ .id = -1,
++ .num_resources = ARRAY_SIZE(ehci_resources),
++ .resource = ehci_resources,
++ .dev = {
++ .platform_data = &bcm63xx_ehci_pdata,
++ .dma_mask = &ehci_dmamask,
++ .coherent_dma_mask = DMA_BIT_MASK(32),
++ },
++};
++
++int __init bcm63xx_ehci_register(void)
++{
++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ return 0;
++
++ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
++ ehci_resources[0].end = ehci_resources[0].start;
++ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
++ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
++
++ return platform_device_register(&bcm63xx_ehci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_EHCI_H_
++#define BCM63XX_DEV_USB_EHCI_H_
++
++int bcm63xx_ehci_register(void);
++
++#endif /* BCM63XX_DEV_USB_EHCI_H_ */
--- /dev/null
+From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:28 +0100
+Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
+ enables it
+
+BCM63XX-based board can control the registration of the EHCI controller
+by setting their has_ehci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to register
+the EHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -27,6 +27,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+@@ -882,6 +883,9 @@ int __init board_register_devices(void)
+ if (board.has_usbd)
+ bcm63xx_usbd_register(&board.usbd);
+
++ if (board.has_ehci0)
++ bcm63xx_ehci_register();
++
+ if (board.has_ohci0)
+ bcm63xx_ohci_register();
+
--- /dev/null
+From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:30 +0100
+Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
+ overcurrent
+
+This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
+does not support proper overcurrent reporting.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-usb-ehci.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
+ static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
+ .big_endian_desc = 1,
+ .big_endian_mmio = 1,
++ .ignore_oc = 1,
+ .power_on = bcm63xx_ehci_power_on,
+ .power_off = bcm63xx_ehci_power_off,
+ .power_suspend = bcm63xx_ehci_power_off,
--- /dev/null
+From a2b8c7f648e168573905818dbb4cb90ca3957c65 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 28 Jun 2017 18:29:43 +0200
+Subject: [PATCH] mtd: bcm63xxpart: move imagetag parsing to its own parser
+
+Move the bcm963xx Image Tag parsing into its own partition parser. This
+Allows reusing the parser with different full flash parsers.
+
+While moving it, rename it to bcm963* to better reflect it isn't chip
+but board specific.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+I tried to keep the code as-is, to keep the changes as small as
+possible.
+
+One side effect is that the partitions get renumbered, which means any
+root=/dev/mtdblock* will now point to the wrong mtd device. But since
+bcm963xx boards will require these hardcoded in the kernel commandline
+anyway this should b a non issue, as it can be easily updated.
+
+There is no such thing in the mips/bcm63xx defconfig, so nothing to update
+there.
+
+ drivers/mtd/Kconfig | 1 +
+ drivers/mtd/bcm63xxpart.c | 155 ++----------------------
+ drivers/mtd/parsers/Kconfig | 11 ++
+ drivers/mtd/parsers/Makefile | 1 +
+ drivers/mtd/parsers/parser_imagetag.c | 214 ++++++++++++++++++++++++++++++++++
+ 5 files changed, 235 insertions(+), 147 deletions(-)
+ create mode 100644 drivers/mtd/parsers/parser_imagetag.c
+
+--- a/drivers/mtd/Kconfig
++++ b/drivers/mtd/Kconfig
+@@ -163,6 +163,7 @@ config MTD_BCM63XX_PARTS
+ tristate "BCM63XX CFE partitioning support"
+ depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
+ select CRC32
++ select MTD_PARSER_IMAGETAG
+ help
+ This provides partions parsing for BCM63xx devices with CFE
+ bootloaders.
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -93,51 +93,19 @@ static int bcm63xx_read_nvram(struct mtd
+ return 0;
+ }
+
+-static int bcm63xx_read_image_tag(struct mtd_info *master, const char *name,
+- loff_t tag_offset, struct bcm_tag *buf)
+-{
+- int ret;
+- size_t retlen;
+- u32 computed_crc;
+-
+- ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
+- if (ret)
+- return ret;
+-
+- if (retlen != sizeof(*buf))
+- return -EIO;
+-
+- computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
+- offsetof(struct bcm_tag, header_crc));
+- if (computed_crc == buf->header_crc) {
+- STR_NULL_TERMINATE(buf->board_id);
+- STR_NULL_TERMINATE(buf->tag_version);
+-
+- pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
+- name, tag_offset, buf->tag_version, buf->board_id);
+-
+- return 0;
+- }
+-
+- pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
+- name, tag_offset, buf->header_crc, computed_crc);
+- return 1;
+-}
++static const char * const bcm63xx_cfe_part_types[] = {
++ "bcm963xx-imagetag",
++ NULL,
++};
+
+ static int bcm63xx_parse_cfe_nor_partitions(struct mtd_info *master,
+ const struct mtd_partition **pparts, struct bcm963xx_nvram *nvram)
+ {
+- /* CFE, NVRAM and global Linux are always present */
+- int nrparts = 3, curpart = 0;
+- struct bcm_tag *buf = NULL;
+ struct mtd_partition *parts;
+- int ret;
+- unsigned int rootfsaddr, kerneladdr, spareaddr;
+- unsigned int rootfslen, kernellen, sparelen, totallen;
++ int nrparts = 3, curpart = 0;
+ unsigned int cfelen, nvramlen;
+ unsigned int cfe_erasesize;
+ int i;
+- bool rootfs_first = false;
+
+ cfe_erasesize = max_t(uint32_t, master->erasesize,
+ BCM963XX_CFE_BLOCK_SIZE);
+@@ -146,83 +114,9 @@ static int bcm63xx_parse_cfe_nor_partiti
+ nvramlen = nvram->psi_size * SZ_1K;
+ nvramlen = roundup(nvramlen, cfe_erasesize);
+
+- buf = vmalloc(sizeof(struct bcm_tag));
+- if (!buf)
+- return -ENOMEM;
+-
+- /* Get the tag */
+- ret = bcm63xx_read_image_tag(master, "rootfs", cfelen, buf);
+- if (!ret) {
+- STR_NULL_TERMINATE(buf->flash_image_start);
+- if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
+- rootfsaddr < BCM963XX_EXTENDED_SIZE) {
+- pr_err("invalid rootfs address: %*ph\n",
+- (int)sizeof(buf->flash_image_start),
+- buf->flash_image_start);
+- goto invalid_tag;
+- }
+-
+- STR_NULL_TERMINATE(buf->kernel_address);
+- if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
+- kerneladdr < BCM963XX_EXTENDED_SIZE) {
+- pr_err("invalid kernel address: %*ph\n",
+- (int)sizeof(buf->kernel_address),
+- buf->kernel_address);
+- goto invalid_tag;
+- }
+-
+- STR_NULL_TERMINATE(buf->kernel_length);
+- if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
+- pr_err("invalid kernel length: %*ph\n",
+- (int)sizeof(buf->kernel_length),
+- buf->kernel_length);
+- goto invalid_tag;
+- }
+-
+- STR_NULL_TERMINATE(buf->total_length);
+- if (kstrtouint(buf->total_length, 10, &totallen)) {
+- pr_err("invalid total length: %*ph\n",
+- (int)sizeof(buf->total_length),
+- buf->total_length);
+- goto invalid_tag;
+- }
+-
+- kerneladdr = kerneladdr - BCM963XX_EXTENDED_SIZE;
+- rootfsaddr = rootfsaddr - BCM963XX_EXTENDED_SIZE;
+- spareaddr = roundup(totallen, master->erasesize) + cfelen;
+-
+- if (rootfsaddr < kerneladdr) {
+- /* default Broadcom layout */
+- rootfslen = kerneladdr - rootfsaddr;
+- rootfs_first = true;
+- } else {
+- /* OpenWrt layout */
+- rootfsaddr = kerneladdr + kernellen;
+- rootfslen = spareaddr - rootfsaddr;
+- }
+- } else if (ret > 0) {
+-invalid_tag:
+- kernellen = 0;
+- rootfslen = 0;
+- rootfsaddr = 0;
+- spareaddr = cfelen;
+- } else {
+- goto out;
+- }
+- sparelen = master->size - spareaddr - nvramlen;
+-
+- /* Determine number of partitions */
+- if (rootfslen > 0)
+- nrparts++;
+-
+- if (kernellen > 0)
+- nrparts++;
+-
+ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
+- if (!parts) {
+- ret = -ENOMEM;
+- goto out;
+- }
++ if (!parts)
++ return -ENOMEM;
+
+ /* Start building partition list */
+ parts[curpart].name = "CFE";
+@@ -230,30 +124,6 @@ invalid_tag:
+ parts[curpart].size = cfelen;
+ curpart++;
+
+- if (kernellen > 0) {
+- int kernelpart = curpart;
+-
+- if (rootfslen > 0 && rootfs_first)
+- kernelpart++;
+- parts[kernelpart].name = "kernel";
+- parts[kernelpart].offset = kerneladdr;
+- parts[kernelpart].size = kernellen;
+- curpart++;
+- }
+-
+- if (rootfslen > 0) {
+- int rootfspart = curpart;
+-
+- if (kernellen > 0 && rootfs_first)
+- rootfspart--;
+- parts[rootfspart].name = "rootfs";
+- parts[rootfspart].offset = rootfsaddr;
+- parts[rootfspart].size = rootfslen;
+- if (sparelen > 0 && !rootfs_first)
+- parts[rootfspart].size += sparelen;
+- curpart++;
+- }
+-
+ parts[curpart].name = "nvram";
+ parts[curpart].offset = master->size - nvramlen;
+ parts[curpart].size = nvramlen;
+@@ -263,22 +133,13 @@ invalid_tag:
+ parts[curpart].name = "linux";
+ parts[curpart].offset = cfelen;
+ parts[curpart].size = master->size - cfelen - nvramlen;
++ parts[curpart].types = bcm63xx_cfe_part_types;
+
+ for (i = 0; i < nrparts; i++)
+ pr_info("Partition %d is %s offset %llx and length %llx\n", i,
+ parts[i].name, parts[i].offset, parts[i].size);
+
+- pr_info("Spare partition is offset %x and length %x\n", spareaddr,
+- sparelen);
+-
+ *pparts = parts;
+- ret = 0;
+-
+-out:
+- vfree(buf);
+-
+- if (ret)
+- return ret;
+
+ return nrparts;
+ }
+--- a/drivers/mtd/parsers/Kconfig
++++ b/drivers/mtd/parsers/Kconfig
+@@ -1,3 +1,14 @@
++config MTD_PARSER_IMAGETAG
++ tristate "Parser for BCM963XX Image Tag format partitions"
++ depends on BCM63XX || BMIPS || COMPILE_TEST
++ select CRC32
++ help
++ Image Tag is the firmware header used by broadcom on their xDSL line
++ of devices. It is used to describe the offsets and lengths of kernel
++ and rootfs partitions.
++ This driver adds support for parsing a partition with an Image Tag
++ header and creates up to two partitions, kernel and rootfs.
++
+ config MTD_PARSER_TRX
+ tristate "Parser for TRX format partitions"
+ depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST)
+--- a/drivers/mtd/parsers/Makefile
++++ b/drivers/mtd/parsers/Makefile
+@@ -1 +1,2 @@
++obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o
+ obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o
+--- /dev/null
++++ b/drivers/mtd/parsers/parser_imagetag.c
+@@ -0,0 +1,214 @@
++/*
++ * BCM63XX CFE image tag parser
++ *
++ * Copyright © 2006-2008 Florian Fainelli <florian@openwrt.org>
++ * Mike Albon <malbon@openwrt.org>
++ * Copyright © 2009-2010 Daniel Dickinson <openwrt@cshore.neomailbox.net>
++ * Copyright © 2011-2013 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
++
++#include <linux/bcm963xx_tag.h>
++#include <linux/crc32.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/sizes.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++/* Ensure strings read from flash structs are null terminated */
++#define STR_NULL_TERMINATE(x) \
++ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
++
++static int bcm963xx_read_imagetag(struct mtd_info *master, const char *name,
++ loff_t tag_offset, struct bcm_tag *buf)
++{
++ int ret;
++ size_t retlen;
++ u32 computed_crc;
++
++ ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
++ if (ret)
++ return ret;
++
++ if (retlen != sizeof(*buf))
++ return -EIO;
++
++ computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
++ offsetof(struct bcm_tag, header_crc));
++ if (computed_crc == buf->header_crc) {
++ STR_NULL_TERMINATE(buf->board_id);
++ STR_NULL_TERMINATE(buf->tag_version);
++
++ pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
++ name, tag_offset, buf->tag_version, buf->board_id);
++
++ return 0;
++ }
++
++ pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
++ name, tag_offset, buf->header_crc, computed_crc);
++ return -EINVAL;
++}
++
++static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master,
++ const struct mtd_partition **pparts,
++ struct mtd_part_parser_data *data)
++{
++ /* CFE, NVRAM and global Linux are always present */
++ int nrparts = 0, curpart = 0;
++ struct bcm_tag *buf = NULL;
++ struct mtd_partition *parts;
++ int ret;
++ unsigned int rootfsaddr, kerneladdr, spareaddr, offset;
++ unsigned int rootfslen, kernellen, sparelen, totallen;
++ int i;
++ bool rootfs_first = false;
++
++ buf = vmalloc(sizeof(struct bcm_tag));
++ if (!buf)
++ return -ENOMEM;
++
++ /* Get the tag */
++ ret = bcm963xx_read_imagetag(master, "rootfs", 0, buf);
++ if (!ret) {
++ STR_NULL_TERMINATE(buf->flash_image_start);
++ if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
++ rootfsaddr < BCM963XX_EXTENDED_SIZE) {
++ pr_err("invalid rootfs address: %*ph\n",
++ (int)sizeof(buf->flash_image_start),
++ buf->flash_image_start);
++ goto out;
++ }
++
++ STR_NULL_TERMINATE(buf->kernel_address);
++ if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
++ kerneladdr < BCM963XX_EXTENDED_SIZE) {
++ pr_err("invalid kernel address: %*ph\n",
++ (int)sizeof(buf->kernel_address),
++ buf->kernel_address);
++ goto out;
++ }
++
++ STR_NULL_TERMINATE(buf->kernel_length);
++ if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
++ pr_err("invalid kernel length: %*ph\n",
++ (int)sizeof(buf->kernel_length),
++ buf->kernel_length);
++ goto out;
++ }
++
++ STR_NULL_TERMINATE(buf->total_length);
++ if (kstrtouint(buf->total_length, 10, &totallen)) {
++ pr_err("invalid total length: %*ph\n",
++ (int)sizeof(buf->total_length),
++ buf->total_length);
++ goto out;
++ }
++
++ /*
++ * Addresses are flash absolute, so convert to partition
++ * relative addresses. Assume either kernel or rootfs will
++ * directly follow the image tag.
++ */
++ if (rootfsaddr < kerneladdr)
++ offset = rootfsaddr - sizeof(struct bcm_tag);
++ else
++ offset = kerneladdr - sizeof(struct bcm_tag);
++
++ kerneladdr = kerneladdr - offset;
++ rootfsaddr = rootfsaddr - offset;
++ spareaddr = roundup(totallen, master->erasesize);
++
++ if (rootfsaddr < kerneladdr) {
++ /* default Broadcom layout */
++ rootfslen = kerneladdr - rootfsaddr;
++ rootfs_first = true;
++ } else {
++ /* OpenWrt layout */
++ rootfsaddr = kerneladdr + kernellen;
++ rootfslen = spareaddr - rootfsaddr;
++ }
++ } else {
++ goto out;
++ }
++ sparelen = master->size - spareaddr;
++
++ /* Determine number of partitions */
++ if (rootfslen > 0)
++ nrparts++;
++
++ if (kernellen > 0)
++ nrparts++;
++
++ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
++ if (!parts) {
++ ret = -ENOMEM;
++ goto out;
++ }
++
++ /* Start building partition list */
++ if (kernellen > 0) {
++ int kernelpart = curpart;
++
++ if (rootfslen > 0 && rootfs_first)
++ kernelpart++;
++ parts[kernelpart].name = "kernel";
++ parts[kernelpart].offset = kerneladdr;
++ parts[kernelpart].size = kernellen;
++ curpart++;
++ }
++
++ if (rootfslen > 0) {
++ int rootfspart = curpart;
++
++ if (kernellen > 0 && rootfs_first)
++ rootfspart--;
++ parts[rootfspart].name = "rootfs";
++ parts[rootfspart].offset = rootfsaddr;
++ parts[rootfspart].size = rootfslen;
++ if (sparelen > 0 && !rootfs_first)
++ parts[rootfspart].size += sparelen;
++ curpart++;
++ }
++
++ for (i = 0; i < nrparts; i++)
++ pr_info("Partition %d is %s offset %llx and length %llx\n", i,
++ parts[i].name, parts[i].offset, parts[i].size);
++
++ pr_info("Spare partition is offset %x and length %x\n", spareaddr,
++ sparelen);
++
++ *pparts = parts;
++ ret = 0;
++
++out:
++ vfree(buf);
++
++ if (ret)
++ return ret;
++
++ return nrparts;
++}
++
++static struct mtd_part_parser bcm963xx_imagetag_parser = {
++ .parse_fn = bcm963xx_parse_imagetag_partitions,
++ .name = "bcm963xx-imagetag",
++};
++module_mtd_part_parser(bcm963xx_imagetag_parser);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Daniel Dickinson <openwrt@cshore.neomailbox.net>");
++MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
++MODULE_AUTHOR("Mike Albon <malbon@openwrt.org>");
++MODULE_AUTHOR("Jonas Gorski <jonas.gorski@gmail.com");
++MODULE_DESCRIPTION("MTD parser for BCM963XX CFE Image Tag partitions");
--- /dev/null
+From 89cd5efa4a0d342b860a726bb1d382e4db4b96a4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 28 Jun 2017 18:34:42 +0200
+Subject: [PATCH 1/2] mtd: bcm63xxpart: add of_match_table
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/bcm63xxpart.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -34,6 +34,7 @@
+ #include <linux/vmalloc.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/of.h>
+
+ #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
+
+@@ -172,9 +173,16 @@ out:
+ return ret;
+ };
+
++static const struct of_device_id parse_bcm63xx_cfe_match_table[] = {
++ { .compatible = "brcm,bcm963xx-cfe-nor-partitions" },
++ {},
++};
++MODULE_DEVICE_TABLE(of, parse_bcm63xx_cfe_match_table);
++
+ static struct mtd_part_parser bcm63xx_cfe_parser = {
+ .parse_fn = bcm63xx_parse_cfe_partitions,
+ .name = "bcm63xxpart",
++ .of_match_table = parse_bcm63xx_cfe_match_table,
+ };
+ module_mtd_part_parser(bcm63xx_cfe_parser);
+
--- /dev/null
+From 3303dd9f5b197cc2efd9cbd7b9b45fc1e510a393 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 28 Jun 2017 18:37:12 +0200
+Subject: [PATCH 2/2] mtd: parser_bcm63xx_imagetag: add of_match_table support
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/parsers/parser_imagetag.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/mtd/parsers/parser_imagetag.c
++++ b/drivers/mtd/parsers/parser_imagetag.c
+@@ -24,6 +24,7 @@
+ #include <linux/vmalloc.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/of.h>
+
+ /* Ensure strings read from flash structs are null terminated */
+ #define STR_NULL_TERMINATE(x) \
+@@ -200,9 +201,16 @@ out:
+ return nrparts;
+ }
+
++static const struct of_device_id parse_bcm963xx_imagetag_match_table[] = {
++ { .compatible = "brcm,bcm963xx-imagetag" },
++ {},
++};
++MODULE_DEVICE_TABLE(of, parse_bcm963xx_imagetag_match_table);
++
+ static struct mtd_part_parser bcm963xx_imagetag_parser = {
+ .parse_fn = bcm963xx_parse_imagetag_partitions,
+ .name = "bcm963xx-imagetag",
++ .of_match_table = parse_bcm963xx_imagetag_match_table,
+ };
+ module_mtd_part_parser(bcm963xx_imagetag_parser);
+
--- /dev/null
+From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:07:42 +0200
+Subject: [PATCH 01/13] pinctrl: add bcm63xx base code
+
+Setup directory and add a helper for bcm63xx pinctrl support.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/Kconfig | 1 +
+ drivers/pinctrl/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/Kconfig | 3 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++
+ drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++
+ 7 files changed, 163 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/Kconfig
+ create mode 100644 drivers/pinctrl/bcm63xx/Makefile
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
+
+--- a/drivers/pinctrl/Kconfig
++++ b/drivers/pinctrl/Kconfig
+@@ -351,6 +351,7 @@ config PINCTRL_RK805
+
+ source "drivers/pinctrl/aspeed/Kconfig"
+ source "drivers/pinctrl/bcm/Kconfig"
++source "drivers/pinctrl/bcm63xx/Kconfig"
+ source "drivers/pinctrl/berlin/Kconfig"
+ source "drivers/pinctrl/freescale/Kconfig"
+ source "drivers/pinctrl/intel/Kconfig"
+--- a/drivers/pinctrl/Makefile
++++ b/drivers/pinctrl/Makefile
+@@ -48,6 +48,7 @@ obj-$(CONFIG_PINCTRL_RK805) += pinctrl-r
+
+ obj-$(CONFIG_ARCH_ASPEED) += aspeed/
+ obj-y += bcm/
++obj-y += bcm63xx/
+ obj-$(CONFIG_PINCTRL_BERLIN) += berlin/
+ obj-y += freescale/
+ obj-$(CONFIG_X86) += intel/
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -0,0 +1,3 @@
++config PINCTRL_BCM63XX
++ bool
++ select GPIO_GENERIC
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
+@@ -0,0 +1,155 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/bitops.h>
++#include <linux/device.h>
++#include <linux/gpio/driver.h>
++#include <linux/of_irq.h>
++
++#include "pinctrl-bcm63xx.h"
++#include "../core.h"
++
++#define BANK_SIZE sizeof(u32)
++#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE)
++
++#ifdef CONFIG_OF
++static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc,
++ const struct of_phandle_args *gpiospec,
++ u32 *flags)
++{
++ struct gpio_chip *base = gpiochip_get_data(gc);
++ int pin = gpiospec->args[0];
++
++ if (gc != &base[pin / PINS_PER_BANK])
++ return -EINVAL;
++
++ pin = pin % PINS_PER_BANK;
++
++ if (pin >= gc->ngpio)
++ return -EINVAL;
++
++ if (flags)
++ *flags = gpiospec->args[1];
++
++ return pin;
++}
++#endif
++
++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++ struct gpio_chip *base = gpiochip_get_data(chip);
++ char irq_name[7]; /* "gpioXX" */
++
++ /* FIXME: this is ugly */
++ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base));
++ return of_irq_get_byname(chip->of_node, irq_name);
++}
++
++static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc,
++ void __iomem *dirout, void __iomem *data,
++ size_t sz, int ngpio)
++
++{
++ int banks, chips, i, ret = -EINVAL;
++
++ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
++ banks = sz / BANK_SIZE;
++
++ for (i = 0; i < chips; i++) {
++ int offset, pins;
++ int reg_offset;
++ char *label;
++
++ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i);
++ if (!label)
++ return -ENOMEM;
++
++ offset = i * PINS_PER_BANK;
++ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
++
++ /* the registers are treated like a huge big endian register */
++ reg_offset = (banks - i - 1) * BANK_SIZE;
++
++ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset,
++ NULL, NULL, dirout + reg_offset, NULL,
++ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
++ if (ret)
++ return ret;
++
++ gc[i].request = gpiochip_generic_request;
++ gc[i].free = gpiochip_generic_free;
++
++ if (of_get_property(dev->of_node, "interrupt-names", NULL))
++ gc[i].to_irq = bcm63xx_gpio_to_irq;
++
++#ifdef CONFIG_OF
++ gc[i].of_gpio_n_cells = 2;
++ gc[i].of_xlate = bcm63xx_gpio_of_xlate;
++#endif
++
++ gc[i].label = label;
++ gc[i].ngpio = pins;
++
++ devm_gpiochip_add_data(dev, &gc[i], gc);
++ }
++
++ return 0;
++}
++
++static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name,
++ int ngpio)
++{
++ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
++
++ for (i = 0; i < chips; i++) {
++ int offset, pins;
++
++ offset = i * PINS_PER_BANK;
++ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
++
++ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins);
++ }
++}
++
++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
++ struct pinctrl_desc *desc,
++ void *priv, struct gpio_chip *gc,
++ int ngpio)
++{
++ struct pinctrl_dev *pctldev;
++ struct resource *res;
++ void __iomem *dirout, *data;
++ size_t sz;
++ int ret;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout");
++ dirout = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(dirout))
++ return ERR_CAST(dirout);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
++ data = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(data))
++ return ERR_CAST(data);
++
++ sz = resource_size(res);
++
++ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio);
++ if (ret)
++ return ERR_PTR(ret);
++
++ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv);
++ if (IS_ERR(pctldev))
++ return pctldev;
++
++ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio);
++
++ dev_info(&pdev->dev, "registered at mmio %p\n", dirout);
++
++ return pctldev;
++}
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
+@@ -0,0 +1,14 @@
++#ifndef __PINCTRL_BCM63XX
++#define __PINCTRL_BCM63XX
++
++#include <linux/kernel.h>
++#include <linux/gpio.h>
++#include <linux/pinctrl/pinctrl.h>
++#include <linux/platform_device.h>
++
++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
++ struct pinctrl_desc *desc,
++ void *priv, struct gpio_chip *gc,
++ int ngpio);
++
++#endif
--- /dev/null
+From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:33:56 +0200
+Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6328 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt | 61 ++++++++++++++++++++++
+ 1 file changed, 61 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
+@@ -0,0 +1,61 @@
++* Broadcom BCM6328 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6328-pinctrl".
++- reg: Register specifies of dirout, dat, mode, mux registers.
++- reg-names: Must be "dirout", "dat", "mode", "mux".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6328-pinctrl";
++ reg = <0x10000080 0x8>,
++ <0x10000088 0x8>,
++ <0x10000098 0x4>,
++ <0x1000009c 0xc>;
++ reg-names = "dirout", "dat", "mode", "mux";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led
++gpio1 1 led
++gpio2 2 led
++gpio3 3 led
++gpio4 4 led
++gpio5 5 led
++gpio6 6 led, serial_led_data
++gpio7 7 led, serial_led_clk
++gpio8 8 led
++gpio9 9 led
++gpio10 10 led
++gpio11 11 led
++gpio12 12 led
++gpio13 13 led
++gpio14 14 led
++gpio15 15 led
++gpio16 16 led, pcie_clkreq
++gpio17 17 led
++gpio18 18 led
++gpio19 19 led
++gpio20 20 led
++gpio21 21 led
++gpio22 22 led
++gpio23 23 led
++gpio24 24 -
++gpio25 25 ephy0_act_led
++gpio26 26 ephy1_act_led
++gpio27 27 ephy2_act_led
++gpio28 28 ephy3_act_led
++gpio29 29 -
++gpio30 30 -
++gpio31 31 -
++hsspi_cs1 - hsspi_cs1
++usb_port1 - usb_host_port, usb_device_port
--- /dev/null
+From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:12:50 +0200
+Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328
+
+Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
+GPIOs, as LEDs for the integrated LED controller, or various other
+functions. Its pincontrol mux registers also control other aspects, like
+switching the second USB port between host and device mode.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++
+ 3 files changed, 464 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -1,3 +1,10 @@
+ config PINCTRL_BCM63XX
+ bool
+ select GPIO_GENERIC
++
++config PINCTRL_BCM6328
++ bool "BCM6328 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1 +1,2 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
++obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
+@@ -0,0 +1,456 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/machine.h>
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6328_MUX_LO_REG 0x4
++#define BCM6328_MUX_HI_REG 0x0
++#define BCM6328_MUX_OTHER_REG 0x8
++
++#define BCM6328_NGPIO 32
++
++struct bcm6328_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6328_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ unsigned mode_val:1;
++ unsigned mux_val:2;
++};
++
++struct bcm6328_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++ void __iomem *mux[3];
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio;
++};
++
++static const struct pinctrl_pin_desc bcm6328_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ PINCTRL_PIN(8, "gpio8"),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ PINCTRL_PIN(12, "gpio12"),
++ PINCTRL_PIN(13, "gpio13"),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ PINCTRL_PIN(27, "gpio27"),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ PINCTRL_PIN(30, "gpio30"),
++ PINCTRL_PIN(31, "gpio31"),
++
++ /*
++ * No idea where they really are; so let's put them according
++ * to their mux offsets.
++ */
++ PINCTRL_PIN(36, "hsspi_cs1"),
++ PINCTRL_PIN(38, "usb_p2"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++
++static unsigned hsspi_cs1_pins[] = { 36 };
++static unsigned usb_port1_pins[] = { 38 };
++
++#define BCM6328_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6328_pingroup bcm6328_groups[] = {
++ BCM6328_GROUP(gpio0),
++ BCM6328_GROUP(gpio1),
++ BCM6328_GROUP(gpio2),
++ BCM6328_GROUP(gpio3),
++ BCM6328_GROUP(gpio4),
++ BCM6328_GROUP(gpio5),
++ BCM6328_GROUP(gpio6),
++ BCM6328_GROUP(gpio7),
++ BCM6328_GROUP(gpio8),
++ BCM6328_GROUP(gpio9),
++ BCM6328_GROUP(gpio10),
++ BCM6328_GROUP(gpio11),
++ BCM6328_GROUP(gpio12),
++ BCM6328_GROUP(gpio13),
++ BCM6328_GROUP(gpio14),
++ BCM6328_GROUP(gpio15),
++ BCM6328_GROUP(gpio16),
++ BCM6328_GROUP(gpio17),
++ BCM6328_GROUP(gpio18),
++ BCM6328_GROUP(gpio19),
++ BCM6328_GROUP(gpio20),
++ BCM6328_GROUP(gpio21),
++ BCM6328_GROUP(gpio22),
++ BCM6328_GROUP(gpio23),
++ BCM6328_GROUP(gpio24),
++ BCM6328_GROUP(gpio25),
++ BCM6328_GROUP(gpio26),
++ BCM6328_GROUP(gpio27),
++ BCM6328_GROUP(gpio28),
++ BCM6328_GROUP(gpio29),
++ BCM6328_GROUP(gpio30),
++ BCM6328_GROUP(gpio31),
++
++ BCM6328_GROUP(hsspi_cs1),
++ BCM6328_GROUP(usb_port1),
++};
++
++/* GPIO_MODE */
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++/* PINMUX_SEL */
++static const char * const serial_led_data_groups[] = {
++ "gpio6",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio7",
++};
++
++static const char * const inet_act_led_groups[] = {
++ "gpio11",
++};
++
++static const char * const pcie_clkreq_groups[] = {
++ "gpio16",
++};
++
++static const char * const ephy0_act_led_groups[] = {
++ "gpio25",
++};
++
++static const char * const ephy1_act_led_groups[] = {
++ "gpio26",
++};
++
++static const char * const ephy2_act_led_groups[] = {
++ "gpio27",
++};
++
++static const char * const ephy3_act_led_groups[] = {
++ "gpio28",
++};
++
++static const char * const hsspi_cs1_groups[] = {
++ "hsspi_cs1"
++};
++
++static const char * const usb_host_port_groups[] = {
++ "usb_port1",
++};
++
++static const char * const usb_device_port_groups[] = {
++ "usb_port1",
++};
++
++#define BCM6328_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mode_val = 1, \
++ }
++
++#define BCM6328_MUX_FUN(n, mux) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mux_val = mux, \
++ }
++
++static const struct bcm6328_function bcm6328_funcs[] = {
++ BCM6328_MODE_FUN(led),
++ BCM6328_MUX_FUN(serial_led_data, 2),
++ BCM6328_MUX_FUN(serial_led_clk, 2),
++ BCM6328_MUX_FUN(inet_act_led, 1),
++ BCM6328_MUX_FUN(pcie_clkreq, 2),
++ BCM6328_MUX_FUN(ephy0_act_led, 1),
++ BCM6328_MUX_FUN(ephy1_act_led, 1),
++ BCM6328_MUX_FUN(ephy2_act_led, 1),
++ BCM6328_MUX_FUN(ephy3_act_led, 1),
++ BCM6328_MUX_FUN(hsspi_cs1, 2),
++ BCM6328_MUX_FUN(usb_host_port, 1),
++ BCM6328_MUX_FUN(usb_device_port, 2),
++};
++
++static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6328_groups);
++}
++
++static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6328_groups[group].name;
++}
++
++static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6328_groups[group].pins;
++ *num_pins = bcm6328_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6328_funcs);
++}
++
++static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6328_funcs[selector].name;
++}
++
++static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6328_funcs[selector].groups;
++ *num_groups = bcm6328_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
++ u32 mode, u32 mux)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ if (pin < 32) {
++ reg = __raw_readl(pctl->mode);
++ reg &= ~BIT(pin);
++ if (mode)
++ reg |= BIT(pin);
++ __raw_writel(reg, pctl->mode);
++ }
++
++ reg = __raw_readl(pctl->mux[pin / 16]);
++ reg &= ~(3UL << ((pin % 16) * 2));
++ reg |= mux << ((pin % 16) * 2);
++ __raw_writel(reg, pctl->mux[pin / 16]);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
++ const struct bcm6328_function *f = &bcm6328_funcs[selector];
++
++ bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
++
++ return 0;
++}
++
++static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ bcm6328_rmw_mux(pctl, offset, 0, 0);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6328_pctl_ops = {
++ .get_groups_count = bcm6328_pinctrl_get_group_count,
++ .get_group_name = bcm6328_pinctrl_get_group_name,
++ .get_group_pins = bcm6328_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6328_pmx_ops = {
++ .get_functions_count = bcm6328_pinctrl_get_func_count,
++ .get_function_name = bcm6328_pinctrl_get_func_name,
++ .get_function_groups = bcm6328_pinctrl_get_groups,
++ .set_mux = bcm6328_pinctrl_set_mux,
++ .gpio_request_enable = bcm6328_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6328_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6328_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode, *mux;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
++ mux = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mux))
++ return PTR_ERR(mux);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++ pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
++ pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
++ pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6328_pctl_ops;
++ pctl->desc.pmxops = &bcm6328_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
++ pctl->desc.pins = bcm6328_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ &pctl->gpio, BCM6328_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6328_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6328-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6328_pinctrl_driver = {
++ .probe = bcm6328_pinctrl_probe,
++ .driver = {
++ .name = "bcm6328-pinctrl",
++ .of_match_table = bcm6328_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6328_pinctrl_driver);
--- /dev/null
+From 962c46bf7f43df730e2d3698930e77958cc6b191 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:35:45 +0200
+Subject: [PATCH 04/16] Documentation: add BCM6348 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6348 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt | 32 ++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
+@@ -0,0 +1,32 @@
++* Broadcom BCM6348 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6348-pinctrl".
++- reg: register Specifiers of dirout, dat, mode registers.
++- reg-names: Must be "dirout", "dat", "mode".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@fffe0080 {
++ compatible = "brcm,bcm6348-pinctrl";
++ reg = <0xfffe0080 0x8>,
++ <0xfffe0088 0x8>,
++ <0xfffe0098 0x4>;
++ reg-names = "dirout", "dat", "mode";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++group0 32-36 ext_mii, utopia, diag
++group1 22-31 ext_ephy, mii_snoop, mii_pccard,
++ spi_master_uart, utopia, diag
++group2 16-21 pci, diag
++group3 8-15 ext_mii, utopia
++group4 0-7 ext_ephy, mii_snoop, legacy_led, diag
--- /dev/null
+From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:14:13 +0200
+Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348
+
+Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of
+up to ten gpios into fourteen potential functions. It does not allow
+muxing individual pins. Some functions require more than one group to be
+muxed to the same function.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 391 ++++++++++++++++++++++++++++++
+ 3 files changed, 399 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -8,3 +8,10 @@ config PINCTRL_BCM6328
+ select PINCONF
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
++
++config PINCTRL_BCM6348
++ bool "BCM6348 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1,2 +1,3 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
++obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
+@@ -0,0 +1,391 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/machine.h>
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6348_NGPIO 37
++
++#define MAX_GROUP 4
++#define PINS_PER_GROUP 8
++#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP))
++#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4)
++#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin))
++
++struct bcm6348_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6348_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++ unsigned int value;
++};
++
++struct bcm6348_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6348_PIN(a, b, group) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(group), \
++ }
++
++static const struct pinctrl_pin_desc bcm6348_pins[] = {
++ BCM6348_PIN(0, "gpio0", 4),
++ BCM6348_PIN(1, "gpio1", 4),
++ BCM6348_PIN(2, "gpio2", 4),
++ BCM6348_PIN(3, "gpio3", 4),
++ BCM6348_PIN(4, "gpio4", 4),
++ BCM6348_PIN(5, "gpio5", 4),
++ BCM6348_PIN(6, "gpio6", 4),
++ BCM6348_PIN(7, "gpio7", 4),
++ BCM6348_PIN(8, "gpio8", 3),
++ BCM6348_PIN(9, "gpio9", 3),
++ BCM6348_PIN(10, "gpio10", 3),
++ BCM6348_PIN(11, "gpio11", 3),
++ BCM6348_PIN(12, "gpio12", 3),
++ BCM6348_PIN(13, "gpio13", 3),
++ BCM6348_PIN(14, "gpio14", 3),
++ BCM6348_PIN(15, "gpio15", 3),
++ BCM6348_PIN(16, "gpio16", 2),
++ BCM6348_PIN(17, "gpio17", 2),
++ BCM6348_PIN(18, "gpio18", 2),
++ BCM6348_PIN(19, "gpio19", 2),
++ BCM6348_PIN(20, "gpio20", 2),
++ BCM6348_PIN(21, "gpio21", 2),
++ BCM6348_PIN(22, "gpio22", 1),
++ BCM6348_PIN(23, "gpio23", 1),
++ BCM6348_PIN(24, "gpio24", 1),
++ BCM6348_PIN(25, "gpio25", 1),
++ BCM6348_PIN(26, "gpio26", 1),
++ BCM6348_PIN(27, "gpio27", 1),
++ BCM6348_PIN(28, "gpio28", 1),
++ BCM6348_PIN(29, "gpio29", 1),
++ BCM6348_PIN(30, "gpio30", 1),
++ BCM6348_PIN(31, "gpio31", 1),
++ BCM6348_PIN(32, "gpio32", 0),
++ BCM6348_PIN(33, "gpio33", 0),
++ BCM6348_PIN(34, "gpio34", 0),
++ BCM6348_PIN(35, "gpio35", 0),
++ BCM6348_PIN(36, "gpio36", 0),
++};
++
++enum bcm6348_muxes {
++ BCM6348_MUX_GPIO = 0,
++ BCM6348_MUX_EXT_EPHY,
++ BCM6348_MUX_MII_SNOOP,
++ BCM6348_MUX_LEGACY_LED,
++ BCM6348_MUX_MII_PCCARD,
++ BCM6348_MUX_PCI,
++ BCM6348_MUX_SPI_MASTER_UART,
++ BCM6348_MUX_EXT_MII,
++ BCM6348_MUX_UTOPIA,
++ BCM6348_MUX_DIAG,
++};
++
++static unsigned group0_pins[] = {
++ 32, 33, 34, 35, 36,
++};
++
++static unsigned group1_pins[] = {
++ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
++};
++
++static unsigned group2_pins[] = {
++ 16, 17, 18, 19, 20, 21,
++};
++
++static unsigned group3_pins[] = {
++ 8, 9, 10, 11, 12, 13, 14, 15,
++};
++
++static unsigned group4_pins[] = {
++ 0, 1, 2, 3, 4, 5, 6, 7,
++};
++
++#define BCM6348_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ } \
++
++static struct bcm6348_pingroup bcm6348_groups[] = {
++ BCM6348_GROUP(group0),
++ BCM6348_GROUP(group1),
++ BCM6348_GROUP(group2),
++ BCM6348_GROUP(group3),
++ BCM6348_GROUP(group4),
++};
++
++static const char * const ext_mii_groups[] = {
++ "group0",
++ "group3",
++};
++
++static const char * const ext_ephy_groups[] = {
++ "group1",
++ "group4"
++};
++
++static const char * const mii_snoop_groups[] = {
++ "group1",
++ "group4",
++};
++
++static const char * const legacy_led_groups[] = {
++ "group4",
++};
++
++static const char * const mii_pccard_groups[] = {
++ "group1",
++};
++
++static const char * const pci_groups[] = {
++ "group2",
++};
++
++static const char * const spi_master_uart_groups[] = {
++ "group1",
++};
++
++static const char * const utopia_groups[] = {
++ "group0",
++ "group1",
++ "group3",
++};
++
++static const char * const diag_groups[] = {
++ "group0",
++ "group1",
++ "group2",
++ "group4",
++};
++
++#define BCM6348_FUN(n, f) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .value = BCM6348_MUX_##f, \
++ }
++
++static const struct bcm6348_function bcm6348_funcs[] = {
++ BCM6348_FUN(ext_mii, EXT_MII),
++ BCM6348_FUN(ext_ephy, EXT_EPHY),
++ BCM6348_FUN(mii_snoop, MII_SNOOP),
++ BCM6348_FUN(legacy_led, LEGACY_LED),
++ BCM6348_FUN(mii_pccard, MII_PCCARD),
++ BCM6348_FUN(pci, PCI),
++ BCM6348_FUN(spi_master_uart, SPI_MASTER_UART),
++ BCM6348_FUN(utopia, UTOPIA),
++ BCM6348_FUN(diag, DIAG),
++};
++
++static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6348_groups);
++}
++
++static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6348_groups[group].name;
++}
++
++static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6348_groups[group].pins;
++ *num_pins = bcm6348_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6348_funcs);
++}
++
++static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6348_funcs[selector].name;
++}
++
++static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6348_funcs[selector].groups;
++ *num_groups = bcm6348_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++
++ reg = __raw_readl(pctl->mode);
++ reg &= ~mask;
++ reg |= val & mask;
++ __raw_writel(reg, pctl->mode);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6348_pingroup *grp = &bcm6348_groups[group];
++ const struct bcm6348_function *f = &bcm6348_funcs[selector];
++ u32 mask, val;
++
++ /*
++ * pins n..(n+7) share the same group, so we only need to look at
++ * the first pin.
++ */
++ mask = GROUP_MASK(grp->pins[0]);
++ val = f->value << GROUP_SHIFT(grp->pins[0]);
++
++ bcm6348_rmw_mux(pctl, mask, val);
++
++ return 0;
++}
++
++static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ struct pin_desc *desc;
++ u32 mask;
++
++ /* don't reconfigure if already muxed */
++ desc = pin_desc_get(pctldev, offset);
++ if (desc->mux_usecount)
++ return 0;
++
++ mask = GROUP_MASK(offset);
++
++ /* disable all functions using this pin */
++ bcm6348_rmw_mux(pctl, mask, 0);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6348_pctl_ops = {
++ .get_groups_count = bcm6348_pinctrl_get_group_count,
++ .get_group_name = bcm6348_pinctrl_get_group_name,
++ .get_group_pins = bcm6348_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6348_pmx_ops = {
++ .get_functions_count = bcm6348_pinctrl_get_func_count,
++ .get_function_name = bcm6348_pinctrl_get_func_name,
++ .get_function_groups = bcm6348_pinctrl_get_groups,
++ .set_mux = bcm6348_pinctrl_set_mux,
++ .gpio_request_enable = bcm6348_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6348_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6348_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++
++ /* disable all muxes by default */
++ __raw_writel(0, pctl->mode);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6348_pctl_ops;
++ pctl->desc.pmxops = &bcm6348_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6348_pins);
++ pctl->desc.pins = bcm6348_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6348_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6348_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6348-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6348_pinctrl_driver = {
++ .probe = bcm6348_pinctrl_probe,
++ .driver = {
++ .name = "bcm6348-pinctrl",
++ .of_match_table = bcm6348_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6348_pinctrl_driver);
--- /dev/null
+From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:00 +0200
+Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6358 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
+@@ -0,0 +1,44 @@
++* Broadcom BCM6358 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6358-pinctrl".
++- reg: Register specifiers of dirout, dat registers.
++- reg-names: Must be "dirout", "dat".
++- brcm,gpiomode: Phandle to the shared gpiomode register.
++- gpio-controller: Identifies this node as a gpio-controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@fffe0080 {
++ compatible = "brcm,bcm6358-pinctrl";
++ reg = <0xfffe0080 0x8>,
++ <0xfffe0088 0x8>,
++ <0xfffe0098 0x4>;
++ reg-names = "dirout", "dat";
++ brcm,gpiomode = <&gpiomode>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++gpiomode: syscon@fffe0098 {
++ compatible = "brcm,bcm6358-gpiomode", "syscon";
++ reg = <0xfffe0098 0x4>;
++ native-endian;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++ebi_cs_grp 30-31 ebi_cs
++uart1_grp 28-31 uart1
++spi_cs_grp 32-33 spi_cs
++async_modem_grp 12-15 async_modem
++legacy_led_grp 9-15 legacy_led
++serial_led_grp 6-7 serial_led
++led_grp 0-3 led
++utopia_grp 12-15, 22-31 utopia
++pwm_syn_clk_grp 8 pwm_syn_clk
++sys_irq_grp 5 sys_irq
--- /dev/null
+From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:16:01 +0200
+Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
+
+Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
+functions onto the GPIO pins. It does not support configuring individual
+pins but only whole groups. These groups may overlap, and still require
+the directions to be set correctly in the GPIO register. In addition the
+functions register controls other, not directly mux related functions.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 8 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
+ 3 files changed, 402 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -15,3 +15,11 @@ config PINCTRL_BCM6348
+ select PINCONF
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
++
++config PINCTRL_BCM6358
++ bool "BCM6358 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
++ select MFD_SYSCON
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1,3 +1,4 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
++obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
+@@ -0,0 +1,393 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/gpio/driver.h>
++#include <linux/mfd/syscon.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/regmap.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++/* GPIO_MODE register */
++#define BCM6358_MODE_MUX_NONE 0
++
++/* overlays on gpio pins */
++#define BCM6358_MODE_MUX_EBI_CS BIT(5)
++#define BCM6358_MODE_MUX_UART1 BIT(6)
++#define BCM6358_MODE_MUX_SPI_CS BIT(7)
++#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
++#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
++#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
++#define BCM6358_MODE_MUX_LED BIT(11)
++#define BCM6358_MODE_MUX_UTOPIA BIT(12)
++#define BCM6358_MODE_MUX_CLKRST BIT(13)
++#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
++#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
++
++#define BCM6358_NGPIO 40
++
++struct bcm6358_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++
++ const u16 mode_val;
++
++ /* non-GPIO function muxes require the gpio direction to be set */
++ const u16 direction;
++};
++
++struct bcm6358_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++};
++
++struct bcm6358_pinctrl {
++ struct device *dev;
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ struct regmap_field *overlays;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
++ BCM6358_MODE_MUX_##bit2 | \
++ BCM6358_MODE_MUX_##bit3), \
++ }
++
++static const struct pinctrl_pin_desc bcm6358_pins[] = {
++ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
++ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
++ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
++ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
++ PINCTRL_PIN(4, "gpio4"),
++ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
++ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
++ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
++ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
++ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
++ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
++ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
++ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++};
++
++static unsigned ebi_cs_grp_pins[] = { 30, 31 };
++
++static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
++
++static unsigned spi_cs_grp_pins[] = { 32, 33 };
++
++static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
++
++static unsigned serial_led_grp_pins[] = { 6, 7 };
++
++static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
++
++static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
++
++static unsigned utopia_grp_pins[] = {
++ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
++};
++
++static unsigned pwm_syn_clk_grp_pins[] = { 8 };
++
++static unsigned sys_irq_grp_pins[] = { 5 };
++
++#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ .mode_val = BCM6358_MODE_MUX_##bit, \
++ .direction = dir, \
++ }
++
++static const struct bcm6358_pingroup bcm6358_groups[] = {
++ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
++ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
++ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
++ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
++ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
++ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
++ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
++ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
++ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
++ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
++};
++
++static const char * const ebi_cs_groups[] = {
++ "ebi_cs_grp"
++};
++
++static const char * const uart1_groups[] = {
++ "uart1_grp"
++};
++
++static const char * const spi_cs_2_3_groups[] = {
++ "spi_cs_2_3_grp"
++};
++
++static const char * const async_modem_groups[] = {
++ "async_modem_grp"
++};
++
++static const char * const legacy_led_groups[] = {
++ "legacy_led_grp",
++};
++
++static const char * const serial_led_groups[] = {
++ "serial_led_grp",
++};
++
++static const char * const led_groups[] = {
++ "led_grp",
++};
++
++static const char * const clkrst_groups[] = {
++ "clkrst_grp",
++};
++
++static const char * const pwm_syn_clk_groups[] = {
++ "pwm_syn_clk_grp",
++};
++
++static const char * const sys_irq_groups[] = {
++ "sys_irq_grp",
++};
++
++#define BCM6358_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ }
++
++static const struct bcm6358_function bcm6358_funcs[] = {
++ BCM6358_FUN(ebi_cs),
++ BCM6358_FUN(uart1),
++ BCM6358_FUN(spi_cs_2_3),
++ BCM6358_FUN(async_modem),
++ BCM6358_FUN(legacy_led),
++ BCM6358_FUN(serial_led),
++ BCM6358_FUN(led),
++ BCM6358_FUN(clkrst),
++ BCM6358_FUN(pwm_syn_clk),
++ BCM6358_FUN(sys_irq),
++};
++
++static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6358_groups);
++}
++
++static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6358_groups[group].name;
++}
++
++static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6358_groups[group].pins;
++ *num_pins = bcm6358_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6358_funcs);
++}
++
++static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6358_funcs[selector].name;
++}
++
++static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6358_funcs[selector].groups;
++ *num_groups = bcm6358_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
++ u32 val = grp->mode_val;
++ u32 mask = val;
++ unsigned pin;
++
++ for (pin = 0; pin < grp->num_pins; pin++)
++ mask |= (unsigned long)bcm6358_pins[pin].drv_data;
++
++ regmap_field_update_bits(pctl->overlays, mask, val);
++
++ for (pin = 0; pin < grp->num_pins; pin++) {
++ int hw_gpio = bcm6358_pins[pin].number;
++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
++
++ if (grp->direction & BIT(pin))
++ gc->direction_output(gc, hw_gpio % 32, 0);
++ else
++ gc->direction_input(gc, hw_gpio % 32);
++ }
++
++ return 0;
++}
++
++static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ u32 mask;
++
++ mask = (unsigned long)bcm6358_pins[offset].drv_data;
++ if (!mask)
++ return 0;
++
++ /* disable all functions using this pin */
++ return regmap_field_update_bits(pctl->overlays, mask, 0);
++}
++
++static struct pinctrl_ops bcm6358_pctl_ops = {
++ .get_groups_count = bcm6358_pinctrl_get_group_count,
++ .get_group_name = bcm6358_pinctrl_get_group_name,
++ .get_group_pins = bcm6358_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6358_pmx_ops = {
++ .get_functions_count = bcm6358_pinctrl_get_func_count,
++ .get_function_name = bcm6358_pinctrl_get_func_name,
++ .get_function_groups = bcm6358_pinctrl_get_groups,
++ .set_mux = bcm6358_pinctrl_set_mux,
++ .gpio_request_enable = bcm6358_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6358_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6358_pinctrl *pctl;
++ struct regmap *mode;
++ struct reg_field overlays = REG_FIELD(0, 0, 15);
++
++ if (pdev->dev.of_node)
++ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
++ "brcm,gpiomode");
++ else
++ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098");
++
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
++ if (IS_ERR(pctl->overlays))
++ return PTR_ERR(pctl->overlays);
++
++ /* disable all muxes by default */
++ regmap_field_write(pctl->overlays, 0);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6358_pctl_ops;
++ pctl->desc.pmxops = &bcm6358_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
++ pctl->desc.pins = bcm6358_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6358_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6358_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6358-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6358_pinctrl_driver = {
++ .probe = bcm6358_pinctrl_probe,
++ .driver = {
++ .name = "bcm6358-pinctrl",
++ .of_match_table = bcm6358_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6358_pinctrl_driver);
--- /dev/null
+From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:18 +0200
+Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6362 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt | 79 ++++++++++++++++++++++
+ 1 file changed, 79 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
+@@ -0,0 +1,79 @@
++* Broadcom BCM6362 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6362-pinctrl"
++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6362-pinctrl";
++ reg = <0x10000080 0x8>,
++ <0x10000088 0x8>,
++ <0x10000090 0x4>,
++ <0x10000098 0x4>,
++ <0x1000009c 0x4>,
++ <0x100000b8 0x4>;
++ reg-names = "dirout", "dat", "led",
++ "mode", "ctrl", "basemode";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led, usb_device_led
++gpio1 1 led, sys_irq
++gpio2 2 led, serial_led_clk
++gpio3 3 led, serial_led_data
++gpio4 4 led, robosw_led_data
++gpio5 5 led, robosw_led_clk
++gpio6 6 led, robosw_led0
++gpio7 7 led, robosw_led1
++gpio8 8 led, inet_led
++gpio9 9 led, spi_cs2
++gpio10 10 led, spi_cs3
++gpio11 11 led, ntr_pulse
++gpio12 12 led, uart1_scts
++gpio13 13 led, uart1_srts
++gpio14 14 led, uart1_sdin
++gpio15 15 led, uart1_sdout
++gpio16 16 led, adsl_spi_miso
++gpio17 17 led, adsl_spi_mosi
++gpio18 18 led, adsl_spi_clk
++gpio19 19 led, adsl_spi_cs
++gpio20 20 led, ephy0_led
++gpio21 21 led, ephy1_led
++gpio22 22 led, ephy2_led
++gpio23 23 led, ephy3_led
++gpio24 24 ext_irq0
++gpio25 25 ext_irq1
++gpio26 26 ext_irq2
++gpio27 27 ext_irq3
++gpio28 28 -
++gpio29 29 -
++gpio30 30 -
++gpio31 31 -
++gpio32 32 wifi
++gpio33 33 wifi
++gpio34 34 wifi
++gpio35 35 wifi
++gpio36 36 wifi
++gpio37 37 wifi
++gpio38 38 wifi
++gpio39 39 wifi
++gpio40 40 wifi
++gpio41 41 wifi
++gpio42 42 wifi
++gpio43 43 wifi
++gpio44 44 wifi
++gpio45 45 wifi
++gpio46 46 wifi
++gpio47 47 wifi
++nand_grp 8, 12-23, 27 nand
--- /dev/null
+From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:17:20 +0200
+Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362
+
+Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
+GPIO pins to the LED controller, to be available by the integrated
+wifi, or other functions. It also supports overlay groups, of which
+only NAND is documented.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++
+ 3 files changed, 700 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -23,3 +23,10 @@ config PINCTRL_BCM6358
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
+ select MFD_SYSCON
++
++config PINCTRL_BCM6362
++ bool "BCM6362 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
++obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
+@@ -0,0 +1,692 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6362_NGPIO 48
++
++/* GPIO_BASEMODE register */
++#define BASEMODE_NAND BIT(2)
++
++enum bcm6362_pinctrl_reg {
++ BCM6362_LEDCTRL,
++ BCM6362_MODE,
++ BCM6362_CTRL,
++ BCM6362_BASEMODE,
++};
++
++struct bcm6362_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6362_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ enum bcm6362_pinctrl_reg reg;
++ u32 basemode_mask;
++};
++
++struct bcm6362_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *led;
++ void __iomem *mode;
++ void __iomem *ctrl;
++ void __iomem *basemode;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6362_PIN(a, b, mask) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(mask), \
++ }
++
++static const struct pinctrl_pin_desc bcm6362_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ BCM6362_PIN(8, "gpio8", BASEMODE_NAND),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ BCM6362_PIN(12, "gpio12", BASEMODE_NAND),
++ BCM6362_PIN(13, "gpio13", BASEMODE_NAND),
++ BCM6362_PIN(14, "gpio14", BASEMODE_NAND),
++ BCM6362_PIN(15, "gpio15", BASEMODE_NAND),
++ BCM6362_PIN(16, "gpio16", BASEMODE_NAND),
++ BCM6362_PIN(17, "gpio17", BASEMODE_NAND),
++ BCM6362_PIN(18, "gpio18", BASEMODE_NAND),
++ BCM6362_PIN(19, "gpio19", BASEMODE_NAND),
++ BCM6362_PIN(20, "gpio20", BASEMODE_NAND),
++ BCM6362_PIN(21, "gpio21", BASEMODE_NAND),
++ BCM6362_PIN(22, "gpio22", BASEMODE_NAND),
++ BCM6362_PIN(23, "gpio23", BASEMODE_NAND),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ BCM6362_PIN(27, "gpio27", BASEMODE_NAND),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ PINCTRL_PIN(30, "gpio30"),
++ PINCTRL_PIN(31, "gpio31"),
++ PINCTRL_PIN(32, "gpio32"),
++ PINCTRL_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++ PINCTRL_PIN(40, "gpio40"),
++ PINCTRL_PIN(41, "gpio41"),
++ PINCTRL_PIN(42, "gpio42"),
++ PINCTRL_PIN(43, "gpio43"),
++ PINCTRL_PIN(44, "gpio44"),
++ PINCTRL_PIN(45, "gpio45"),
++ PINCTRL_PIN(46, "gpio46"),
++ PINCTRL_PIN(47, "gpio47"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned gpio32_pins[] = { 32 };
++static unsigned gpio33_pins[] = { 33 };
++static unsigned gpio34_pins[] = { 34 };
++static unsigned gpio35_pins[] = { 35 };
++static unsigned gpio36_pins[] = { 36 };
++static unsigned gpio37_pins[] = { 37 };
++static unsigned gpio38_pins[] = { 38 };
++static unsigned gpio39_pins[] = { 39 };
++static unsigned gpio40_pins[] = { 40 };
++static unsigned gpio41_pins[] = { 41 };
++static unsigned gpio42_pins[] = { 42 };
++static unsigned gpio43_pins[] = { 43 };
++static unsigned gpio44_pins[] = { 44 };
++static unsigned gpio45_pins[] = { 45 };
++static unsigned gpio46_pins[] = { 46 };
++static unsigned gpio47_pins[] = { 47 };
++
++static unsigned nand_grp_pins[] = {
++ 8, 12, 13, 14, 15, 16, 17,
++ 18, 19, 20, 21, 22, 23, 27,
++};
++
++#define BCM6362_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6362_pingroup bcm6362_groups[] = {
++ BCM6362_GROUP(gpio0),
++ BCM6362_GROUP(gpio1),
++ BCM6362_GROUP(gpio2),
++ BCM6362_GROUP(gpio3),
++ BCM6362_GROUP(gpio4),
++ BCM6362_GROUP(gpio5),
++ BCM6362_GROUP(gpio6),
++ BCM6362_GROUP(gpio7),
++ BCM6362_GROUP(gpio8),
++ BCM6362_GROUP(gpio9),
++ BCM6362_GROUP(gpio10),
++ BCM6362_GROUP(gpio11),
++ BCM6362_GROUP(gpio12),
++ BCM6362_GROUP(gpio13),
++ BCM6362_GROUP(gpio14),
++ BCM6362_GROUP(gpio15),
++ BCM6362_GROUP(gpio16),
++ BCM6362_GROUP(gpio17),
++ BCM6362_GROUP(gpio18),
++ BCM6362_GROUP(gpio19),
++ BCM6362_GROUP(gpio20),
++ BCM6362_GROUP(gpio21),
++ BCM6362_GROUP(gpio22),
++ BCM6362_GROUP(gpio23),
++ BCM6362_GROUP(gpio24),
++ BCM6362_GROUP(gpio25),
++ BCM6362_GROUP(gpio26),
++ BCM6362_GROUP(gpio27),
++ BCM6362_GROUP(gpio28),
++ BCM6362_GROUP(gpio29),
++ BCM6362_GROUP(gpio30),
++ BCM6362_GROUP(gpio31),
++ BCM6362_GROUP(gpio32),
++ BCM6362_GROUP(gpio33),
++ BCM6362_GROUP(gpio34),
++ BCM6362_GROUP(gpio35),
++ BCM6362_GROUP(gpio36),
++ BCM6362_GROUP(gpio37),
++ BCM6362_GROUP(gpio38),
++ BCM6362_GROUP(gpio39),
++ BCM6362_GROUP(gpio40),
++ BCM6362_GROUP(gpio41),
++ BCM6362_GROUP(gpio42),
++ BCM6362_GROUP(gpio43),
++ BCM6362_GROUP(gpio44),
++ BCM6362_GROUP(gpio45),
++ BCM6362_GROUP(gpio46),
++ BCM6362_GROUP(gpio47),
++ BCM6362_GROUP(nand_grp),
++};
++
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++static const char * const usb_device_led_groups[] = {
++ "gpio0",
++};
++
++static const char * const sys_irq_groups[] = {
++ "gpio1",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio2",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio3",
++};
++
++static const char * const robosw_led_data_groups[] = {
++ "gpio4",
++};
++
++static const char * const robosw_led_clk_groups[] = {
++ "gpio5",
++};
++
++static const char * const robosw_led0_groups[] = {
++ "gpio6",
++};
++
++static const char * const robosw_led1_groups[] = {
++ "gpio7",
++};
++
++static const char * const inet_led_groups[] = {
++ "gpio8",
++};
++
++static const char * const spi_cs2_groups[] = {
++ "gpio9",
++};
++
++static const char * const spi_cs3_groups[] = {
++ "gpio10",
++};
++
++static const char * const ntr_pulse_groups[] = {
++ "gpio11",
++};
++
++static const char * const uart1_scts_groups[] = {
++ "gpio12",
++};
++
++static const char * const uart1_srts_groups[] = {
++ "gpio13",
++};
++
++static const char * const uart1_sdin_groups[] = {
++ "gpio14",
++};
++
++static const char * const uart1_sdout_groups[] = {
++ "gpio15",
++};
++
++static const char * const adsl_spi_miso_groups[] = {
++ "gpio16",
++};
++
++static const char * const adsl_spi_mosi_groups[] = {
++ "gpio17",
++};
++
++static const char * const adsl_spi_clk_groups[] = {
++ "gpio18",
++};
++
++static const char * const adsl_spi_cs_groups[] = {
++ "gpio19",
++};
++
++static const char * const ephy0_led_groups[] = {
++ "gpio20",
++};
++
++static const char * const ephy1_led_groups[] = {
++ "gpio21",
++};
++
++static const char * const ephy2_led_groups[] = {
++ "gpio22",
++};
++
++static const char * const ephy3_led_groups[] = {
++ "gpio23",
++};
++
++static const char * const ext_irq0_groups[] = {
++ "gpio24",
++};
++
++static const char * const ext_irq1_groups[] = {
++ "gpio25",
++};
++
++static const char * const ext_irq2_groups[] = {
++ "gpio26",
++};
++
++static const char * const ext_irq3_groups[] = {
++ "gpio27",
++};
++
++static const char * const wifi_groups[] = {
++ "gpio32",
++ "gpio33",
++ "gpio34",
++ "gpio35",
++ "gpio36",
++ "gpio37",
++ "gpio38",
++ "gpio39",
++ "gpio40",
++ "gpio41",
++ "gpio42",
++ "gpio43",
++ "gpio44",
++ "gpio45",
++ "gpio46",
++ "gpio47",
++};
++
++static const char * const nand_groups[] = {
++ "nand_grp",
++};
++
++#define BCM6362_LED_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_LEDCTRL, \
++ }
++
++#define BCM6362_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_MODE, \
++ }
++
++#define BCM6362_CTRL_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_CTRL, \
++ }
++
++#define BCM6362_BASEMODE_FUN(n, mask) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_BASEMODE, \
++ .basemode_mask = (mask), \
++ }
++
++static const struct bcm6362_function bcm6362_funcs[] = {
++ BCM6362_LED_FUN(led),
++ BCM6362_MODE_FUN(usb_device_led),
++ BCM6362_MODE_FUN(sys_irq),
++ BCM6362_MODE_FUN(serial_led_clk),
++ BCM6362_MODE_FUN(serial_led_data),
++ BCM6362_MODE_FUN(robosw_led_data),
++ BCM6362_MODE_FUN(robosw_led_clk),
++ BCM6362_MODE_FUN(robosw_led0),
++ BCM6362_MODE_FUN(robosw_led1),
++ BCM6362_MODE_FUN(inet_led),
++ BCM6362_MODE_FUN(spi_cs2),
++ BCM6362_MODE_FUN(spi_cs3),
++ BCM6362_MODE_FUN(ntr_pulse),
++ BCM6362_MODE_FUN(uart1_scts),
++ BCM6362_MODE_FUN(uart1_srts),
++ BCM6362_MODE_FUN(uart1_sdin),
++ BCM6362_MODE_FUN(uart1_sdout),
++ BCM6362_MODE_FUN(adsl_spi_miso),
++ BCM6362_MODE_FUN(adsl_spi_mosi),
++ BCM6362_MODE_FUN(adsl_spi_clk),
++ BCM6362_MODE_FUN(adsl_spi_cs),
++ BCM6362_MODE_FUN(ephy0_led),
++ BCM6362_MODE_FUN(ephy1_led),
++ BCM6362_MODE_FUN(ephy2_led),
++ BCM6362_MODE_FUN(ephy3_led),
++ BCM6362_MODE_FUN(ext_irq0),
++ BCM6362_MODE_FUN(ext_irq1),
++ BCM6362_MODE_FUN(ext_irq2),
++ BCM6362_MODE_FUN(ext_irq3),
++ BCM6362_CTRL_FUN(wifi),
++ BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
++};
++
++static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6362_groups);
++}
++
++static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6362_groups[group].name;
++}
++
++static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6362_groups[group].pins;
++ *num_pins = bcm6362_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6362_funcs);
++}
++
++static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6362_funcs[selector].name;
++}
++
++static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6362_funcs[selector].groups;
++ *num_groups = bcm6362_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg,
++ u32 mask, u32 val)
++{
++ unsigned long flags;
++ u32 tmp;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ tmp = __raw_readl(reg);
++ tmp &= ~mask;
++ tmp |= val & mask;
++ __raw_writel(tmp, reg);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin)
++{
++ const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
++ u32 mask = BIT(pin % 32);
++
++ if (desc->drv_data)
++ bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0);
++
++ if (pin < 32) {
++ /* base mode 0 => gpio 1 => mux function */
++ bcm6362_rmw_mux(pctl, pctl->mode, mask, 0);
++
++ /* pins 0-23 might be muxed to led */
++ if (pin < 24)
++ bcm6362_rmw_mux(pctl, pctl->led, mask, 0);
++ } else {
++ /* ctrl reg 0 => wifi function 1 => gpio */
++ bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask);
++ }
++}
++
++static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6362_pingroup *grp = &bcm6362_groups[group];
++ const struct bcm6362_function *f = &bcm6362_funcs[selector];
++ unsigned i;
++ void __iomem *reg;
++ u32 val, mask;
++
++ for (i = 0; i < grp->num_pins; i++)
++ bcm6362_set_gpio(pctl, grp->pins[i]);
++
++ switch (f->reg) {
++ case BCM6362_LEDCTRL:
++ reg = pctl->led;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM6362_MODE:
++ reg = pctl->ctrl;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM6362_CTRL:
++ reg = pctl->ctrl;
++ mask = BIT(grp->pins[0]);
++ val = 0;
++ break;
++ case BCM6362_BASEMODE:
++ reg = pctl->basemode;
++ mask = f->basemode_mask;
++ val = f->basemode_mask;
++ break;
++ default:
++ WARN_ON(1);
++ return -EINVAL;
++ }
++
++ bcm6362_rmw_mux(pctl, reg, mask, val);
++
++ return 0;
++}
++
++static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ bcm6362_set_gpio(pctl, offset);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6362_pctl_ops = {
++ .get_groups_count = bcm6362_pinctrl_get_group_count,
++ .get_group_name = bcm6362_pinctrl_get_group_name,
++ .get_group_pins = bcm6362_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6362_pmx_ops = {
++ .get_functions_count = bcm6362_pinctrl_get_func_count,
++ .get_function_name = bcm6362_pinctrl_get_func_name,
++ .get_function_groups = bcm6362_pinctrl_get_groups,
++ .set_mux = bcm6362_pinctrl_set_mux,
++ .gpio_request_enable = bcm6362_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6362_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6362_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *led, *mode, *ctrl, *basemode;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
++ led = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(led))
++ return PTR_ERR(led);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
++ ctrl = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(ctrl))
++ return PTR_ERR(ctrl);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
++ basemode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(basemode))
++ return PTR_ERR(basemode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->led = led;
++ pctl->mode = mode;
++ pctl->ctrl = ctrl;
++ pctl->basemode = basemode;
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6362_pctl_ops;
++ pctl->desc.pmxops = &bcm6362_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6362_pins);
++ pctl->desc.pins = bcm6362_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6362_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6362_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6362-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6362_pinctrl_driver = {
++ .probe = bcm6362_pinctrl_probe,
++ .driver = {
++ .name = "bcm6362-pinctrl",
++ .of_match_table = bcm6362_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6362_pinctrl_driver);
--- /dev/null
+From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:51 +0200
+Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6368 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++
+ 1 file changed, 67 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
+@@ -0,0 +1,67 @@
++* Broadcom BCM6368 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6368-pinctrl".
++- reg: Register specifiers of dirout, dat, mode registers.
++- reg-names: Must be "dirout", "dat", "mode".
++- brcm,gpiobasemode: Phandle to the gpio basemode register.
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6368-pinctrl";
++ reg = <0x10000080 0x08>,
++ <0x10000088 0x08>,
++ <0x10000098 0x04>;
++ reg-names = "dirout", "dat", "mode";
++ brcm,gpiobasemode = <&gpiobasemode>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++gpiobasemode: syscon@100000b8 {
++ compatible = "brcm,bcm6368-gpiobasemode", "syscon";
++ reg = <0x100000b8 4>;
++ native-endian;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 analog_afe0
++gpio1 1 analog_afe1
++gpio2 2 sys_irq
++gpio3 3 serial_led_data
++gpio4 4 serial_led_clk
++gpio5 5 inet_led
++gpio6 6 ephy0_led
++gpio7 7 ephy1_led
++gpio8 8 ephy2_led
++gpio9 9 ephy3_led
++gpio10 10 robosw_led_data
++gpio11 11 robosw_led_clk
++gpio12 12 robosw_led0
++gpio13 13 robosw_led1
++gpio14 14 usb_device_led
++gpio15 15 -
++gpio16 16 pci_req1
++gpio17 17 pci_gnt1
++gpio18 18 pci_intb
++gpio19 19 pci_req0
++gpio20 20 pci_gnt0
++gpio21 21 -
++gpio22 22 pcmcia_cd1
++gpio23 23 pcmcia_cd2
++gpio24 24 pcmcia_vs1
++gpio25 25 pcmcia_vs2
++gpio26 26 ebi_cs2
++gpio27 27 ebi_cs3
++gpio28 28 spi_cs2
++gpio29 29 spi_cs3
++gpio30 30 spi_cs4
++gpio31 31 spi_cs5
++uart1_grp 30-33 uart1
--- /dev/null
+From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:18:25 +0200
+Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368
+
+Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
+GPIOs onto alternative functions. Not all are documented.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 15 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++
+ 3 files changed, 589 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -30,3 +30,18 @@ config PINCTRL_BCM6362
+ select PINCONF
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
++
++config PINCTRL_BCM6368
++ bool "BCM6368 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
++ select MFD_SYSCON
++
++config PINCTRL_BCM63268
++ bool "BCM63268 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
++obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
+@@ -0,0 +1,573 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/bitops.h>
++#include <linux/kernel.h>
++#include <linux/gpio.h>
++#include <linux/mfd/syscon.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/of_gpio.h>
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6368_NGPIO 38
++
++#define BCM6368_BASEMODE_MASK 0x7
++#define BCM6368_BASEMODE_GPIO 0x0
++#define BCM6368_BASEMODE_UART1 0x1
++
++struct bcm6368_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6368_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ unsigned dir_out:16;
++ unsigned basemode:3;
++};
++
++struct bcm6368_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++ struct regmap_field *overlay;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6368_BASEMODE_PIN(a, b) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)true \
++ }
++
++static const struct pinctrl_pin_desc bcm6368_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ PINCTRL_PIN(8, "gpio8"),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ PINCTRL_PIN(12, "gpio12"),
++ PINCTRL_PIN(13, "gpio13"),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ PINCTRL_PIN(27, "gpio27"),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ BCM6368_BASEMODE_PIN(30, "gpio30"),
++ BCM6368_BASEMODE_PIN(31, "gpio31"),
++ BCM6368_BASEMODE_PIN(32, "gpio32"),
++ BCM6368_BASEMODE_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
++
++#define BCM6368_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6368_pingroup bcm6368_groups[] = {
++ BCM6368_GROUP(gpio0),
++ BCM6368_GROUP(gpio1),
++ BCM6368_GROUP(gpio2),
++ BCM6368_GROUP(gpio3),
++ BCM6368_GROUP(gpio4),
++ BCM6368_GROUP(gpio5),
++ BCM6368_GROUP(gpio6),
++ BCM6368_GROUP(gpio7),
++ BCM6368_GROUP(gpio8),
++ BCM6368_GROUP(gpio9),
++ BCM6368_GROUP(gpio10),
++ BCM6368_GROUP(gpio11),
++ BCM6368_GROUP(gpio12),
++ BCM6368_GROUP(gpio13),
++ BCM6368_GROUP(gpio14),
++ BCM6368_GROUP(gpio15),
++ BCM6368_GROUP(gpio16),
++ BCM6368_GROUP(gpio17),
++ BCM6368_GROUP(gpio18),
++ BCM6368_GROUP(gpio19),
++ BCM6368_GROUP(gpio20),
++ BCM6368_GROUP(gpio21),
++ BCM6368_GROUP(gpio22),
++ BCM6368_GROUP(gpio23),
++ BCM6368_GROUP(gpio24),
++ BCM6368_GROUP(gpio25),
++ BCM6368_GROUP(gpio26),
++ BCM6368_GROUP(gpio27),
++ BCM6368_GROUP(gpio28),
++ BCM6368_GROUP(gpio29),
++ BCM6368_GROUP(gpio30),
++ BCM6368_GROUP(gpio31),
++ BCM6368_GROUP(uart1_grp),
++};
++
++static const char * const analog_afe_0_groups[] = {
++ "gpio0",
++};
++
++static const char * const analog_afe_1_groups[] = {
++ "gpio1",
++};
++
++static const char * const sys_irq_groups[] = {
++ "gpio2",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio3",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio4",
++};
++
++static const char * const inet_led_groups[] = {
++ "gpio5",
++};
++
++static const char * const ephy0_led_groups[] = {
++ "gpio6",
++};
++
++static const char * const ephy1_led_groups[] = {
++ "gpio7",
++};
++
++static const char * const ephy2_led_groups[] = {
++ "gpio8",
++};
++
++static const char * const ephy3_led_groups[] = {
++ "gpio9",
++};
++
++static const char * const robosw_led_data_groups[] = {
++ "gpio10",
++};
++
++static const char * const robosw_led_clk_groups[] = {
++ "gpio11",
++};
++
++static const char * const robosw_led0_groups[] = {
++ "gpio12",
++};
++
++static const char * const robosw_led1_groups[] = {
++ "gpio13",
++};
++
++static const char * const usb_device_led_groups[] = {
++ "gpio14",
++};
++
++static const char * const pci_req1_groups[] = {
++ "gpio16",
++};
++
++static const char * const pci_gnt1_groups[] = {
++ "gpio17",
++};
++
++static const char * const pci_intb_groups[] = {
++ "gpio18",
++};
++
++static const char * const pci_req0_groups[] = {
++ "gpio19",
++};
++
++static const char * const pci_gnt0_groups[] = {
++ "gpio20",
++};
++
++static const char * const pcmcia_cd1_groups[] = {
++ "gpio22",
++};
++
++static const char * const pcmcia_cd2_groups[] = {
++ "gpio23",
++};
++
++static const char * const pcmcia_vs1_groups[] = {
++ "gpio24",
++};
++
++static const char * const pcmcia_vs2_groups[] = {
++ "gpio25",
++};
++
++static const char * const ebi_cs2_groups[] = {
++ "gpio26",
++};
++
++static const char * const ebi_cs3_groups[] = {
++ "gpio27",
++};
++
++static const char * const spi_cs2_groups[] = {
++ "gpio28",
++};
++
++static const char * const spi_cs3_groups[] = {
++ "gpio29",
++};
++
++static const char * const spi_cs4_groups[] = {
++ "gpio30",
++};
++
++static const char * const spi_cs5_groups[] = {
++ "gpio31",
++};
++
++static const char * const uart1_groups[] = {
++ "uart1_grp",
++};
++
++#define BCM6368_FUN(n, out) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .dir_out = out, \
++ }
++
++#define BCM6368_BASEMODE_FUN(n, val, out) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .basemode = BCM6368_BASEMODE_##val, \
++ .dir_out = out, \
++ }
++
++static const struct bcm6368_function bcm6368_funcs[] = {
++ BCM6368_FUN(analog_afe_0, 1),
++ BCM6368_FUN(analog_afe_1, 1),
++ BCM6368_FUN(sys_irq, 1),
++ BCM6368_FUN(serial_led_data, 1),
++ BCM6368_FUN(serial_led_clk, 1),
++ BCM6368_FUN(inet_led, 1),
++ BCM6368_FUN(ephy0_led, 1),
++ BCM6368_FUN(ephy1_led, 1),
++ BCM6368_FUN(ephy2_led, 1),
++ BCM6368_FUN(ephy3_led, 1),
++ BCM6368_FUN(robosw_led_data, 1),
++ BCM6368_FUN(robosw_led_clk, 1),
++ BCM6368_FUN(robosw_led0, 1),
++ BCM6368_FUN(robosw_led1, 1),
++ BCM6368_FUN(usb_device_led, 1),
++ BCM6368_FUN(pci_req1, 0),
++ BCM6368_FUN(pci_gnt1, 0),
++ BCM6368_FUN(pci_intb, 0),
++ BCM6368_FUN(pci_req0, 0),
++ BCM6368_FUN(pci_gnt0, 0),
++ BCM6368_FUN(pcmcia_cd1, 0),
++ BCM6368_FUN(pcmcia_cd2, 0),
++ BCM6368_FUN(pcmcia_vs1, 0),
++ BCM6368_FUN(pcmcia_vs2, 0),
++ BCM6368_FUN(ebi_cs2, 1),
++ BCM6368_FUN(ebi_cs3, 1),
++ BCM6368_FUN(spi_cs2, 1),
++ BCM6368_FUN(spi_cs3, 1),
++ BCM6368_FUN(spi_cs4, 1),
++ BCM6368_FUN(spi_cs5, 1),
++ BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
++};
++
++static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6368_groups);
++}
++
++static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6368_groups[group].name;
++}
++
++static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6368_groups[group].pins;
++ *num_pins = bcm6368_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6368_funcs);
++}
++
++static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6368_funcs[selector].name;
++}
++
++static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6368_funcs[selector].groups;
++ *num_groups = bcm6368_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg,
++ u32 mask, u32 val)
++{
++ u32 tmp;
++
++ tmp = __raw_readl(reg);
++ tmp &= ~mask;
++ tmp |= (val & mask);
++ __raw_writel(tmp, reg);
++}
++
++static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6368_pingroup *grp = &bcm6368_groups[group];
++ const struct bcm6368_function *fun = &bcm6368_funcs[selector];
++ unsigned long flags;
++ int i, pin;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ if (fun->basemode) {
++ u32 mask = 0;
++
++ for (i = 0; i < grp->num_pins; i++) {
++ pin = grp->pins[i];
++ if (pin < 32)
++ mask |= BIT(pin);
++ }
++
++ bcm6368_rmw_mux(pctl, pctl->mode, mask, 0);
++ regmap_field_write(pctl->overlay, fun->basemode);
++ } else {
++ pin = grp->pins[0];
++
++ if (bcm6368_pins[pin].drv_data)
++ regmap_field_write(pctl->overlay,
++ BCM6368_BASEMODE_GPIO);
++
++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin));
++ }
++ spin_unlock_irqrestore(&pctl->lock, flags);
++
++ for (pin = 0; pin < grp->num_pins; pin++) {
++ int hw_gpio = bcm6368_pins[pin].number;
++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
++
++ if (fun->dir_out & BIT(pin))
++ gc->direction_output(gc, hw_gpio % 32, 0);
++ else
++ gc->direction_input(gc, hw_gpio % 32);
++ }
++
++ return 0;
++}
++
++static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ unsigned long flags;
++
++ if (offset >= 32 && !bcm6368_pins[offset].drv_data)
++ return 0;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ /* disable all functions using this pin */
++ if (offset < 32)
++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0);
++
++ if (bcm6368_pins[offset].drv_data)
++ regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6368_pctl_ops = {
++ .get_groups_count = bcm6368_pinctrl_get_group_count,
++ .get_group_name = bcm6368_pinctrl_get_group_name,
++ .get_group_pins = bcm6368_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6368_pmx_ops = {
++ .get_functions_count = bcm6368_pinctrl_get_func_count,
++ .get_function_name = bcm6368_pinctrl_get_func_name,
++ .get_function_groups = bcm6368_pinctrl_get_groups,
++ .set_mux = bcm6368_pinctrl_set_mux,
++ .gpio_request_enable = bcm6368_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6368_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6368_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode;
++ struct regmap *basemode;
++ struct reg_field overlay = REG_FIELD(0, 0, 3);
++
++ if (pdev->dev.of_node)
++ basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
++ "brcm,gpiobasemode");
++ else
++ basemode = syscon_regmap_lookup_by_pdevname("syscon.b00000b8");
++
++ if (IS_ERR(basemode))
++ return PTR_ERR(basemode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay);
++ if (IS_ERR(pctl->overlay))
++ return PTR_ERR(pctl->overlay);
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++
++ /* disable all muxes by default */
++ __raw_writel(0, pctl->mode);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6368_pctl_ops;
++ pctl->desc.pmxops = &bcm6368_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6368_pins);
++ pctl->desc.pins = bcm6368_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6368_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6368_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6368-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6368_pinctrl_driver = {
++ .probe = bcm6368_pinctrl_probe,
++ .driver = {
++ .name = "bcm6368-pinctrl",
++ .of_match_table = bcm6368_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6368_pinctrl_driver);
--- /dev/null
+From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:37:08 +0200
+Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in the BCM63268
+family SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++
+ 1 file changed, 88 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
+@@ -0,0 +1,88 @@
++* Broadcom BCM63268 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6362-pinctrl".
++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@100000c0 {
++ compatible = "brcm,bcm63268-pinctrl";
++ reg = <0x100000c0 0x8>,
++ <0x100000c8 0x8>,
++ <0x100000d0 0x4>,
++ <0x100000d8 0x4>,
++ <0x100000dc 0x4>,
++ <0x100000f8 0x4>;
++ reg-names = "dirout", "dat", "led", "mode",
++ "ctrl", "basemode";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led, serial_led_clk
++gpio1 1 led, serial_led_data
++gpio2 2 led,
++gpio3 3 led,
++gpio4 4 led,
++gpio5 5 led,
++gpio6 6 led,
++gpio7 7 led,
++gpio8 8 led, hsspi_cs6
++gpio9 9 led, hsspi_cs7
++gpio10 10 led, uart1_scts
++gpio11 11 led, uart1_srts
++gpio12 12 led, uart1_sdin
++gpio13 13 led, uart1_sdout
++gpio14 14 led, ntr_pulse_in
++gpio15 15 led, dsl_ntr_pulse_out
++gpio16 16 led, hsspi_cs4
++gpio17 17 led, hsspi_cs5
++gpio18 18 led, adsl_spi_miso
++gpio19 19 led, adsl_spi_mosi
++gpio20 20 led,
++gpio21 21 led,
++gpio22 22 led, vreg_clk
++gpio23 23 led, pcie_clkreq_b
++gpio24 24 uart1_scts
++gpio25 25 uart1_srts
++gpio26 26 uart1_sdin
++gpio27 27 uart1_sdout
++gpio28 28 ntr_pulse_in
++gpio29 29 dsl_ntr_pulse_out
++gpio30 30 switch_led_clk
++gpio31 31 switch_led_data
++gpio32 32 wifi
++gpio33 33 wifi
++gpio34 34 wifi
++gpio35 35 wifi
++gpio36 36 wifi
++gpio37 37 wifi
++gpio38 38 wifi
++gpio39 39 wifi
++gpio40 40 wifi
++gpio41 41 wifi
++gpio42 42 wifi
++gpio43 43 wifi
++gpio44 44 wifi
++gpio45 45 wifi
++gpio46 46 wifi
++gpio47 47 wifi
++gpio48 48 wifi
++gpio49 49 wifi
++gpio50 50 wifi
++gpio51 51 wifi
++nand_grp 2-7,24-31 nand
++dect_pd_grp 8-9 dect_pd
++vdsl_phy0_grp 10-11 vdsl_phy0
++vdsl_phy1_grp 12-13 vdsl_phy1
++vdsl_phy2_grp 24-25 vdsl_phy2
++vdsl_phy3_grp 26-27 vdsl_phy3
--- /dev/null
+From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:19:12 +0200
+Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268
+
+Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs
+to different functions. Depending on the mux, these are either single
+pin configurations or whole pin groups.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++
+ 2 files changed, 711 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
+
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
+ obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
++obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
+@@ -0,0 +1,710 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM63268_NGPIO 52
++
++/* GPIO_BASEMODE register */
++#define BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */
++#define BASEMODE_GPIO35 BIT(4) /* GPIO 35 */
++#define BASEMODE_DECTPD BIT(5) /* GPIOs 8/9 */
++#define BASEMODE_VDSL_PHY_0 BIT(6) /* GPIOs 10/11 */
++#define BASEMODE_VDSL_PHY_1 BIT(7) /* GPIOs 12/13 */
++#define BASEMODE_VDSL_PHY_2 BIT(8) /* GPIOs 24/25 */
++#define BASEMODE_VDSL_PHY_3 BIT(9) /* GPIOs 26/27 */
++
++enum bcm63268_pinctrl_reg {
++ BCM63268_LEDCTRL,
++ BCM63268_MODE,
++ BCM63268_CTRL,
++ BCM63268_BASEMODE,
++};
++
++struct bcm63268_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm63268_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ enum bcm63268_pinctrl_reg reg;
++ u32 mask;
++};
++
++struct bcm63268_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *led;
++ void __iomem *mode;
++ void __iomem *ctrl;
++ void __iomem *basemode;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM63268_PIN(a, b, basemode) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(basemode) \
++ }
++
++static const struct pinctrl_pin_desc bcm63268_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ BCM63268_PIN(2, "gpio2", BASEMODE_NAND),
++ BCM63268_PIN(3, "gpio3", BASEMODE_NAND),
++ BCM63268_PIN(4, "gpio4", BASEMODE_NAND),
++ BCM63268_PIN(5, "gpio5", BASEMODE_NAND),
++ BCM63268_PIN(6, "gpio6", BASEMODE_NAND),
++ BCM63268_PIN(7, "gpio7", BASEMODE_NAND),
++ BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD),
++ BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD),
++ BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0),
++ BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0),
++ BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1),
++ BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
++ BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
++ BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
++ BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
++ BCM63268_PIN(28, "gpio28", BASEMODE_NAND),
++ BCM63268_PIN(29, "gpio29", BASEMODE_NAND),
++ BCM63268_PIN(30, "gpio30", BASEMODE_NAND),
++ BCM63268_PIN(31, "gpio31", BASEMODE_NAND),
++ PINCTRL_PIN(32, "gpio32"),
++ PINCTRL_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++ PINCTRL_PIN(40, "gpio40"),
++ PINCTRL_PIN(41, "gpio41"),
++ PINCTRL_PIN(42, "gpio42"),
++ PINCTRL_PIN(43, "gpio43"),
++ PINCTRL_PIN(44, "gpio44"),
++ PINCTRL_PIN(45, "gpio45"),
++ PINCTRL_PIN(46, "gpio46"),
++ PINCTRL_PIN(47, "gpio47"),
++ PINCTRL_PIN(48, "gpio48"),
++ PINCTRL_PIN(49, "gpio49"),
++ PINCTRL_PIN(50, "gpio50"),
++ PINCTRL_PIN(51, "gpio51"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned gpio32_pins[] = { 32 };
++static unsigned gpio33_pins[] = { 33 };
++static unsigned gpio34_pins[] = { 34 };
++static unsigned gpio35_pins[] = { 35 };
++static unsigned gpio36_pins[] = { 36 };
++static unsigned gpio37_pins[] = { 37 };
++static unsigned gpio38_pins[] = { 38 };
++static unsigned gpio39_pins[] = { 39 };
++static unsigned gpio40_pins[] = { 40 };
++static unsigned gpio41_pins[] = { 41 };
++static unsigned gpio42_pins[] = { 42 };
++static unsigned gpio43_pins[] = { 43 };
++static unsigned gpio44_pins[] = { 44 };
++static unsigned gpio45_pins[] = { 45 };
++static unsigned gpio46_pins[] = { 46 };
++static unsigned gpio47_pins[] = { 47 };
++static unsigned gpio48_pins[] = { 48 };
++static unsigned gpio49_pins[] = { 49 };
++static unsigned gpio50_pins[] = { 50 };
++static unsigned gpio51_pins[] = { 51 };
++
++static unsigned nand_grp_pins[] = {
++ 2, 3, 4, 5, 6, 7, 24,
++ 25, 26, 27, 28, 29, 30, 31,
++};
++
++static unsigned dectpd_grp_pins[] = { 8, 9 };
++static unsigned vdsl_phy0_grp_pins[] = { 10, 11 };
++static unsigned vdsl_phy1_grp_pins[] = { 12, 13 };
++static unsigned vdsl_phy2_grp_pins[] = { 24, 25 };
++static unsigned vdsl_phy3_grp_pins[] = { 26, 27 };
++
++#define BCM63268_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm63268_pingroup bcm63268_groups[] = {
++ BCM63268_GROUP(gpio0),
++ BCM63268_GROUP(gpio1),
++ BCM63268_GROUP(gpio2),
++ BCM63268_GROUP(gpio3),
++ BCM63268_GROUP(gpio4),
++ BCM63268_GROUP(gpio5),
++ BCM63268_GROUP(gpio6),
++ BCM63268_GROUP(gpio7),
++ BCM63268_GROUP(gpio8),
++ BCM63268_GROUP(gpio9),
++ BCM63268_GROUP(gpio10),
++ BCM63268_GROUP(gpio11),
++ BCM63268_GROUP(gpio12),
++ BCM63268_GROUP(gpio13),
++ BCM63268_GROUP(gpio14),
++ BCM63268_GROUP(gpio15),
++ BCM63268_GROUP(gpio16),
++ BCM63268_GROUP(gpio17),
++ BCM63268_GROUP(gpio18),
++ BCM63268_GROUP(gpio19),
++ BCM63268_GROUP(gpio20),
++ BCM63268_GROUP(gpio21),
++ BCM63268_GROUP(gpio22),
++ BCM63268_GROUP(gpio23),
++ BCM63268_GROUP(gpio24),
++ BCM63268_GROUP(gpio25),
++ BCM63268_GROUP(gpio26),
++ BCM63268_GROUP(gpio27),
++ BCM63268_GROUP(gpio28),
++ BCM63268_GROUP(gpio29),
++ BCM63268_GROUP(gpio30),
++ BCM63268_GROUP(gpio31),
++ BCM63268_GROUP(gpio32),
++ BCM63268_GROUP(gpio33),
++ BCM63268_GROUP(gpio34),
++ BCM63268_GROUP(gpio35),
++ BCM63268_GROUP(gpio36),
++ BCM63268_GROUP(gpio37),
++ BCM63268_GROUP(gpio38),
++ BCM63268_GROUP(gpio39),
++ BCM63268_GROUP(gpio40),
++ BCM63268_GROUP(gpio41),
++ BCM63268_GROUP(gpio42),
++ BCM63268_GROUP(gpio43),
++ BCM63268_GROUP(gpio44),
++ BCM63268_GROUP(gpio45),
++ BCM63268_GROUP(gpio46),
++ BCM63268_GROUP(gpio47),
++ BCM63268_GROUP(gpio48),
++ BCM63268_GROUP(gpio49),
++ BCM63268_GROUP(gpio50),
++ BCM63268_GROUP(gpio51),
++
++ /* multi pin groups */
++ BCM63268_GROUP(nand_grp),
++ BCM63268_GROUP(dectpd_grp),
++ BCM63268_GROUP(vdsl_phy0_grp),
++ BCM63268_GROUP(vdsl_phy1_grp),
++ BCM63268_GROUP(vdsl_phy2_grp),
++ BCM63268_GROUP(vdsl_phy3_grp),
++};
++
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio0",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio1",
++};
++
++static const char * const hsspi_cs4_groups[] = {
++ "gpio16",
++};
++
++static const char * const hsspi_cs5_groups[] = {
++ "gpio17",
++};
++
++static const char * const hsspi_cs6_groups[] = {
++ "gpio8",
++};
++
++static const char * const hsspi_cs7_groups[] = {
++ "gpio9",
++};
++
++static const char * const uart1_scts_groups[] = {
++ "gpio10",
++ "gpio24",
++};
++
++static const char * const uart1_srts_groups[] = {
++ "gpio11",
++ "gpio25",
++};
++
++static const char * const uart1_sdin_groups[] = {
++ "gpio12",
++ "gpio26",
++};
++
++static const char * const uart1_sdout_groups[] = {
++ "gpio13",
++ "gpio27",
++};
++
++static const char * const ntr_pulse_in_groups[] = {
++ "gpio14",
++ "gpio28",
++};
++
++static const char * const dsl_ntr_pulse_out_groups[] = {
++ "gpio15",
++ "gpio29",
++};
++
++static const char * const adsl_spi_miso_groups[] = {
++ "gpio18",
++};
++
++static const char * const adsl_spi_mosi_groups[] = {
++ "gpio19",
++};
++
++static const char * const vreg_clk_groups[] = {
++ "gpio22",
++};
++
++static const char * const pcie_clkreq_b_groups[] = {
++ "gpio23",
++};
++
++static const char * const switch_led_clk_groups[] = {
++ "gpio30",
++};
++
++static const char * const switch_led_data_groups[] = {
++ "gpio31",
++};
++
++static const char * const wifi_groups[] = {
++ "gpio32",
++ "gpio33",
++ "gpio34",
++ "gpio35",
++ "gpio36",
++ "gpio37",
++ "gpio38",
++ "gpio39",
++ "gpio40",
++ "gpio41",
++ "gpio42",
++ "gpio43",
++ "gpio44",
++ "gpio45",
++ "gpio46",
++ "gpio47",
++ "gpio48",
++ "gpio49",
++ "gpio50",
++ "gpio51",
++};
++
++static const char * const nand_groups[] = {
++ "nand_grp",
++};
++
++static const char * const dectpd_groups[] = {
++ "dectpd_grp",
++};
++
++static const char * const vdsl_phy_override_0_groups[] = {
++ "vdsl_phy_override_0_grp",
++};
++
++static const char * const vdsl_phy_override_1_groups[] = {
++ "vdsl_phy_override_1_grp",
++};
++
++static const char * const vdsl_phy_override_2_groups[] = {
++ "vdsl_phy_override_2_grp",
++};
++
++static const char * const vdsl_phy_override_3_groups[] = {
++ "vdsl_phy_override_3_grp",
++};
++
++#define BCM63268_LED_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_LEDCTRL, \
++ }
++
++#define BCM63268_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_MODE, \
++ }
++
++#define BCM63268_CTRL_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_CTRL, \
++ }
++
++#define BCM63268_BASEMODE_FUN(n, val) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_BASEMODE, \
++ .mask = val, \
++ }
++
++static const struct bcm63268_function bcm63268_funcs[] = {
++ BCM63268_LED_FUN(led),
++ BCM63268_MODE_FUN(serial_led_clk),
++ BCM63268_MODE_FUN(serial_led_data),
++ BCM63268_MODE_FUN(hsspi_cs6),
++ BCM63268_MODE_FUN(hsspi_cs7),
++ BCM63268_MODE_FUN(uart1_scts),
++ BCM63268_MODE_FUN(uart1_srts),
++ BCM63268_MODE_FUN(uart1_sdin),
++ BCM63268_MODE_FUN(uart1_sdout),
++ BCM63268_MODE_FUN(ntr_pulse_in),
++ BCM63268_MODE_FUN(dsl_ntr_pulse_out),
++ BCM63268_MODE_FUN(hsspi_cs4),
++ BCM63268_MODE_FUN(hsspi_cs5),
++ BCM63268_MODE_FUN(adsl_spi_miso),
++ BCM63268_MODE_FUN(adsl_spi_mosi),
++ BCM63268_MODE_FUN(vreg_clk),
++ BCM63268_MODE_FUN(pcie_clkreq_b),
++ BCM63268_MODE_FUN(switch_led_clk),
++ BCM63268_MODE_FUN(switch_led_data),
++ BCM63268_CTRL_FUN(wifi),
++ BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND),
++ BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3),
++};
++
++static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm63268_groups);
++}
++
++static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm63268_groups[group].name;
++}
++
++static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group,
++ const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm63268_groups[group].pins;
++ *num_pins = bcm63268_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm63268_funcs);
++}
++
++static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm63268_funcs[selector].name;
++}
++
++static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm63268_funcs[selector].groups;
++ *num_groups = bcm63268_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg,
++ u32 mask, u32 val)
++{
++ unsigned long flags;
++ u32 tmp;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ tmp = __raw_readl(reg);
++ tmp &= ~mask;
++ tmp |= val;
++ __raw_writel(tmp, reg);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin)
++{
++ const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin];
++ u32 basemode = (unsigned long)desc->drv_data;
++ u32 mask = BIT(pin % 32);
++
++ if (basemode)
++ bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0);
++
++ if (pin < 32) {
++ /* base mode: 0 => gpio, 1 => mux function */
++ bcm63268_rmw_mux(pctl, pctl->mode, mask, 0);
++
++ /* pins 0-23 might be muxed to led */
++ if (pin < 24)
++ bcm63268_rmw_mux(pctl, pctl->led, mask, 0);
++ } else if (pin < 52) {
++ /* ctrl reg: 0 => wifi function, 1 => gpio */
++ bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask);
++ }
++}
++
++static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm63268_pingroup *grp = &bcm63268_groups[group];
++ const struct bcm63268_function *f = &bcm63268_funcs[selector];
++ unsigned i;
++ void __iomem *reg;
++ u32 val, mask;
++
++ for (i = 0; i < grp->num_pins; i++)
++ bcm63268_set_gpio(pctl, grp->pins[i]);
++
++ switch (f->reg) {
++ case BCM63268_LEDCTRL:
++ reg = pctl->led;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM63268_MODE:
++ reg = pctl->mode;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM63268_CTRL:
++ reg = pctl->ctrl;
++ mask = BIT(grp->pins[0]);
++ val = 0;
++ break;
++ case BCM63268_BASEMODE:
++ reg = pctl->basemode;
++ mask = f->mask;
++ val = f->mask;
++ break;
++ default:
++ WARN_ON(1);
++ return -EINVAL;
++ }
++
++ bcm63268_rmw_mux(pctl, reg, mask, val);
++
++ return 0;
++}
++
++static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ bcm63268_set_gpio(pctl, offset);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm63268_pctl_ops = {
++ .get_groups_count = bcm63268_pinctrl_get_group_count,
++ .get_group_name = bcm63268_pinctrl_get_group_name,
++ .get_group_pins = bcm63268_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm63268_pmx_ops = {
++ .get_functions_count = bcm63268_pinctrl_get_func_count,
++ .get_function_name = bcm63268_pinctrl_get_func_name,
++ .get_function_groups = bcm63268_pinctrl_get_groups,
++ .set_mux = bcm63268_pinctrl_set_mux,
++ .gpio_request_enable = bcm63268_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm63268_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm63268_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *led, *mode, *ctrl, *basemode;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
++ led = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(led))
++ return PTR_ERR(led);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
++ ctrl = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(ctrl))
++ return PTR_ERR(ctrl);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
++ basemode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(basemode))
++ return PTR_ERR(basemode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->led = led;
++ pctl->mode = mode;
++ pctl->ctrl = ctrl;
++ pctl->basemode = basemode;
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm63268_pctl_ops;
++ pctl->desc.pmxops = &bcm63268_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm63268_pins);
++ pctl->desc.pins = bcm63268_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM63268_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm63268_pinctrl_match[] = {
++ { .compatible = "brcm,bcm63268-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm63268_pinctrl_driver = {
++ .probe = bcm63268_pinctrl_probe,
++ .driver = {
++ .name = "bcm63268-pinctrl",
++ .of_match_table = bcm63268_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm63268_pinctrl_driver);
--- /dev/null
+From e058fa1969019c2f6705c53c4130e364a877d4e6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 26 Nov 2017 12:07:31 +0100
+Subject: [PATCH] gpio: fix device tree gpio hogs on dual role gpio/pincontrol
+ controllers
+
+For dual role gpio and pincontrol controller, the device registration
+path is often:
+
+ pinctrl_register(...);
+ gpiochip_add_data(...);
+ gpiochip_add_pin_range(...);
+
+If the device tree node has any gpio-hogs, the code will try to apply them
+in the gpiochip_add_data step, but fail as they cannot be requested, as the
+ranges are missing. But we also cannot first add the pinranges, as the
+appropriate data structures are only initialized in gpiochip_add_data.
+
+To fix this, defer gpio-hogs to the time pin ranges get added instead of
+directly at chip request time, if the gpio-chip has a request method.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+
+ drivers/gpio/gpiolib-of.c | 20 +++++++++++++++-----
+ drivers/gpio/gpiolib.c | 5 +++--
+ drivers/gpio/gpiolib.h | 8 ++++++++
+ 3 files changed, 26 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpio/gpiolib-of.c
++++ b/drivers/gpio/gpiolib-of.c
+@@ -237,12 +237,15 @@ static struct gpio_desc *of_parse_own_gp
+ /**
+ * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
+ * @chip: gpio chip to act on
++ * @start: first gpio to check
++ * @num: number of gpios to check
+ *
+- * This is only used by of_gpiochip_add to request/set GPIO initial
+- * configuration.
++ * This is used by of_gpiochip_add, gpiochip_add_pingroup_range and
++ * gpiochip_add_pin_range to request/set GPIO initial configuration.
+ * It returns error if it fails otherwise 0 on success.
+ */
+-static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
++int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
++ unsigned int num)
+ {
+ struct gpio_desc *desc = NULL;
+ struct device_node *np;
+@@ -250,7 +253,7 @@ static int of_gpiochip_scan_gpios(struct
+ enum gpio_lookup_flags lflags;
+ enum gpiod_flags dflags;
+ unsigned int i;
+- int ret;
++ int ret, hwgpio;
+
+ for_each_available_child_of_node(chip->of_node, np) {
+ if (!of_property_read_bool(np, "gpio-hog"))
+@@ -262,6 +265,10 @@ static int of_gpiochip_scan_gpios(struct
+ if (IS_ERR(desc))
+ break;
+
++ hwgpio = gpio_chip_hwgpio(desc);
++ if (hwgpio < start || hwgpio >= (start + num))
++ continue;
++
+ ret = gpiod_hog(desc, name, lflags, dflags);
+ if (ret < 0) {
+ of_node_put(np);
+@@ -499,12 +506,13 @@ int of_gpiochip_add(struct gpio_chip *ch
+
+ of_node_get(chip->of_node);
+
+- status = of_gpiochip_scan_gpios(chip);
+- if (status) {
+- of_node_put(chip->of_node);
+- gpiochip_remove_pin_ranges(chip);
++ if (!chip->request) {
++ status = of_gpiochip_scan_gpios(chip, 0, chip->ngpio);
++ if (status) {
++ of_node_put(chip->of_node);
++ gpiochip_remove_pin_ranges(chip);
++ }
+ }
+-
+ return status;
+ }
+
+--- a/drivers/gpio/gpiolib.c
++++ b/drivers/gpio/gpiolib.c
+@@ -1958,7 +1958,8 @@ int gpiochip_add_pingroup_range(struct g
+
+ list_add_tail(&pin_range->node, &gdev->pin_ranges);
+
+- return 0;
++ return of_gpiochip_scan_gpios(chip, gpio_offset,
++ pin_range->range.npins);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
+
+@@ -2010,7 +2011,7 @@ int gpiochip_add_pin_range(struct gpio_c
+
+ list_add_tail(&pin_range->node, &gdev->pin_ranges);
+
+- return 0;
++ return of_gpiochip_scan_gpios(chip, gpio_offset, npins);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
+
+--- a/drivers/gpio/gpiolib.h
++++ b/drivers/gpio/gpiolib.h
+@@ -99,6 +99,8 @@ struct gpio_desc *of_get_named_gpiod_fla
+ const char *list_name, int index, enum of_gpio_flags *flags);
+ int of_gpiochip_add(struct gpio_chip *gc);
+ void of_gpiochip_remove(struct gpio_chip *gc);
++int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
++ unsigned int num);
+ #else
+ static inline struct gpio_desc *of_find_gpio(struct device *dev,
+ const char *con_id,
+@@ -114,6 +116,12 @@ static inline struct gpio_desc *of_get_n
+ }
+ static inline int of_gpiochip_add(struct gpio_chip *gc) { return 0; }
+ static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
++static inline int of_gpiochip_scan_gpios(struct gpio_chip *chip,
++ unsigned int start,
++ unsigned int num)
++{
++ return 0;
++}
+ #endif /* CONFIG_OF_GPIO */
+
+ #ifdef CONFIG_ACPI
--- /dev/null
+From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 19 Jan 2014 12:18:03 +0100
+Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
+
+In the same way as the ohci platform driver allows limiting ports,
+enable the same for ehci. This prevents a mismatch in the available
+ports between ehci/ohci on USB 2.0 controllers.
+
+This is needed if the USB host controller always reports the maximum
+number of ports regardless of the number of available ports (because
+one might be set to be usb device).
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/usb/host/ehci-hcd.c | 4 ++++
+ drivers/usb/host/ehci-platform.c | 2 ++
+ drivers/usb/host/ehci.h | 1 +
+ include/linux/usb/ehci_pdriver.h | 1 +
+ 4 files changed, 8 insertions(+)
+
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -678,6 +678,10 @@ int ehci_setup(struct usb_hcd *hcd)
+
+ /* cache this readonly data; minimize chip reads */
+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
++ if (ehci->num_ports) {
++ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
++ ehci->hcs_params |= ehci->num_ports;
++ }
+
+ ehci->sbrn = HCD_USB2;
+
+--- a/drivers/usb/host/ehci-platform.c
++++ b/drivers/usb/host/ehci-platform.c
+@@ -62,6 +62,9 @@ static int ehci_platform_reset(struct us
+
+ ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
+
++ if (pdata->num_ports && pdata->num_ports <= 15)
++ ehci->num_ports = pdata->num_ports;
++
+ if (pdata->pre_setup) {
+ retval = pdata->pre_setup(hcd);
+ if (retval < 0)
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -216,6 +216,7 @@ struct ehci_hcd { /* one per controlle
+ u32 command;
+
+ /* SILICON QUIRKS */
++ unsigned int num_ports;
+ unsigned no_selective_suspend:1;
+ unsigned has_fsl_port_bug:1; /* FreeScale */
+ unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
+--- a/include/linux/usb/ehci_pdriver.h
++++ b/include/linux/usb/ehci_pdriver.h
+@@ -42,6 +42,7 @@ struct usb_hcd;
+ */
+ struct usb_ehci_pdata {
+ int caps_offset;
++ unsigned int num_ports;
+ unsigned has_tt:1;
+ unsigned has_synopsys_hc_bug:1;
+ unsigned big_endian_desc:1;
--- /dev/null
+From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 03:54:05 +0100
+Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
+ own file
+
+Move device registration code into its own file to allow sharing it
+between board implementations.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Makefile | 1 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
+ arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h | 8 ++
+ 4 files changed, 223 insertions(+), 183 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.c
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.h
+
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1 +1,2 @@
++obj-y += board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -12,33 +12,21 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+-#include <linux/platform_device.h>
+-#include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_nvram.h>
+-#include <bcm63xx_dev_pci.h>
+-#include <bcm63xx_dev_enet.h>
+-#include <bcm63xx_dev_flash.h>
+-#include <bcm63xx_dev_hsspi.h>
+-#include <bcm63xx_dev_pcmcia.h>
+-#include <bcm63xx_dev_spi.h>
+-#include <bcm63xx_dev_usb_ehci.h>
+-#include <bcm63xx_dev_usb_ohci.h>
+-#include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+
++#include "board_common.h"
++
+ #include <uapi/linux/bcm933xx_hcs.h>
+
+
+ #define HCS_OFFSET_128K 0x20000
+
+-static struct board_info board;
+-
+ /*
+ * known 3368 boards
+ */
+@@ -695,52 +683,6 @@ static const struct board_info __initcon
+ };
+
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+- .revision = 0x02,
+- .board_rev = 0x17,
+- .country_code = 0x0,
+- .ant_available_bg = 0x3,
+- .pa0b0 = 0x15ae,
+- .pa0b1 = 0xfa85,
+- .pa0b2 = 0xfe8d,
+- .pa1b0 = 0xffff,
+- .pa1b1 = 0xffff,
+- .pa1b2 = 0xffff,
+- .gpio0 = 0xff,
+- .gpio1 = 0xff,
+- .gpio2 = 0xff,
+- .gpio3 = 0xff,
+- .maxpwr_bg = 0x004c,
+- .itssi_bg = 0x00,
+- .boardflags_lo = 0x2848,
+- .boardflags_hi = 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+- if (bus->bustype == SSB_BUSTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+- return 0;
+- } else {
+- pr_err("unable to fill SPROM for given bustype\n");
+- return -EINVAL;
+- }
+-}
+-#endif
+-
+-/*
+- * return board name for /proc/cpuinfo
+- */
+-const char *board_get_name(void)
+-{
+- return board.name;
+-}
+-
+-/*
+ * early init callback, read nvram data from flash and checksum it
+ */
+ void __init board_prom_init(void)
+@@ -785,137 +727,15 @@ void __init board_prom_init(void)
+ if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ continue;
+ /* copy, board desc array is marked initdata */
+- memcpy(&board, bcm963xx_boards[i], sizeof(board));
++ board_early_setup(bcm963xx_boards[i]);
+ break;
+ }
+
+- /* bail out if board is not found, will complain later */
+- if (!board.name[0]) {
++ /* warn if board is not found, will complain later */
++ if (i == ARRAY_SIZE(bcm963xx_boards)) {
+ char name[17];
+ memcpy(name, board_name, 16);
+ name[16] = 0;
+ pr_err("unknown bcm963xx board: %s\n", name);
+- return;
+- }
+-
+- /* setup pin multiplexing depending on board enabled device,
+- * this has to be done this early since PCI init is done
+- * inside arch_initcall */
+- val = 0;
+-
+-#ifdef CONFIG_PCI
+- if (board.has_pci) {
+- bcm63xx_pci_enabled = 1;
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G2_PCI;
+ }
+-#endif
+-
+- if (board.has_pccard) {
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G1_MII_PCCARD;
+- }
+-
+- if (board.has_enet0 && !board.enet0.use_internal_phy) {
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G3_EXT_MII |
+- GPIO_MODE_6348_G0_EXT_MII;
+- }
+-
+- if (board.has_enet1 && !board.enet1.use_internal_phy) {
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G3_EXT_MII |
+- GPIO_MODE_6348_G0_EXT_MII;
+- }
+-
+- bcm_gpio_writel(val, GPIO_MODE_REG);
+-}
+-
+-/*
+- * second stage init callback, good time to panic if we couldn't
+- * identify on which board we're running since early printk is working
+- */
+-void __init board_setup(void)
+-{
+- if (!board.name[0])
+- panic("unable to detect bcm963xx board");
+- pr_info("board name: %s\n", board.name);
+-
+- /* make sure we're running on expected cpu */
+- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+- panic("unexpected CPU for bcm963xx board");
+-}
+-
+-static struct gpio_led_platform_data bcm63xx_led_data;
+-
+-static struct platform_device bcm63xx_gpio_leds = {
+- .name = "leds-gpio",
+- .id = 0,
+- .dev.platform_data = &bcm63xx_led_data,
+-};
+-
+-/*
+- * third stage init callback, register all board devices.
+- */
+-int __init board_register_devices(void)
+-{
+- if (board.has_uart0)
+- bcm63xx_uart_register(0);
+-
+- if (board.has_uart1)
+- bcm63xx_uart_register(1);
+-
+- if (board.has_pccard)
+- bcm63xx_pcmcia_register();
+-
+- if (board.has_enet0 &&
+- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
+- bcm63xx_enet_register(0, &board.enet0);
+-
+- if (board.has_enet1 &&
+- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
+- bcm63xx_enet_register(1, &board.enet1);
+-
+- if (board.has_enetsw &&
+- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
+- bcm63xx_enetsw_register(&board.enetsw);
+-
+- if (board.has_usbd)
+- bcm63xx_usbd_register(&board.usbd);
+-
+- if (board.has_ehci0)
+- bcm63xx_ehci_register();
+-
+- if (board.has_ohci0)
+- bcm63xx_ohci_register();
+-
+- /* Generate MAC address for WLAN and register our SPROM,
+- * do this after registering enet devices
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
+- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- if (ssb_arch_register_fallback_sprom(
+- &bcm63xx_get_fallback_sprom) < 0)
+- pr_err("failed to register fallback SPROM\n");
+- }
+-#endif
+-
+- bcm63xx_spi_register();
+-
+- bcm63xx_hsspi_register();
+-
+- bcm63xx_flash_register();
+-
+- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+- bcm63xx_led_data.leds = board.leds;
+-
+- platform_device_register(&bcm63xx_gpio_leds);
+-
+- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+- gpio_request_one(board.ephy_reset_gpio,
+- board.ephy_reset_gpio_flags, "ephy-reset");
+-
+- return 0;
+ }
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -0,0 +1,214 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_dev_uart.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_gpio.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_enet.h>
++#include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
++#include <bcm63xx_dev_pcmcia.h>
++#include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
++#include <bcm63xx_dev_usb_ohci.h>
++#include <bcm63xx_dev_usb_usbd.h>
++#include <board_bcm963xx.h>
++
++#define PFX "board: "
++
++static struct board_info board;
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++ .revision = 0x02,
++ .board_rev = 0x17,
++ .country_code = 0x0,
++ .ant_available_bg = 0x3,
++ .pa0b0 = 0x15ae,
++ .pa0b1 = 0xfa85,
++ .pa0b2 = 0xfe8d,
++ .pa1b0 = 0xffff,
++ .pa1b1 = 0xffff,
++ .pa1b2 = 0xffff,
++ .gpio0 = 0xff,
++ .gpio1 = 0xff,
++ .gpio2 = 0xff,
++ .gpio3 = 0xff,
++ .maxpwr_bg = 0x004c,
++ .itssi_bg = 0x00,
++ .boardflags_lo = 0x2848,
++ .boardflags_hi = 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++ if (bus->bustype == SSB_BUSTYPE_PCI) {
++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ return 0;
++ } else {
++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++ return -EINVAL;
++ }
++}
++#endif
++
++/*
++ * return board name for /proc/cpuinfo
++ */
++const char *board_get_name(void)
++{
++ return board.name;
++}
++
++/*
++ * setup board for device registration
++ */
++void __init board_early_setup(const struct board_info *target)
++{
++ u32 val;
++
++ memcpy(&board, target, sizeof(board));
++
++ /* setup pin multiplexing depending on board enabled device,
++ * this has to be done this early since PCI init is done
++ * inside arch_initcall */
++ val = 0;
++
++#ifdef CONFIG_PCI
++ if (board.has_pci) {
++ bcm63xx_pci_enabled = 1;
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G2_PCI;
++ }
++#endif
++
++ if (board.has_pccard) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G1_MII_PCCARD;
++ }
++
++ if (board.has_enet0 && !board.enet0.use_internal_phy) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G3_EXT_MII |
++ GPIO_MODE_6348_G0_EXT_MII;
++ }
++
++ if (board.has_enet1 && !board.enet1.use_internal_phy) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G3_EXT_MII |
++ GPIO_MODE_6348_G0_EXT_MII;
++ }
++
++ bcm_gpio_writel(val, GPIO_MODE_REG);
++}
++
++
++/*
++ * second stage init callback, good time to panic if we couldn't
++ * identify on which board we're running since early printk is working
++ */
++void __init board_setup(void)
++{
++ if (!board.name[0])
++ panic("unable to detect bcm963xx board");
++ printk(KERN_INFO PFX "board name: %s\n", board.name);
++
++ /* make sure we're running on expected cpu */
++ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
++ panic("unexpected CPU for bcm963xx board");
++}
++
++static struct gpio_led_platform_data bcm63xx_led_data;
++
++static struct platform_device bcm63xx_gpio_leds = {
++ .name = "leds-gpio",
++ .id = 0,
++ .dev.platform_data = &bcm63xx_led_data,
++};
++
++/*
++ * third stage init callback, register all board devices.
++ */
++int __init board_register_devices(void)
++{
++ if (board.has_uart0)
++ bcm63xx_uart_register(0);
++
++ if (board.has_uart1)
++ bcm63xx_uart_register(1);
++
++ if (board.has_pccard)
++ bcm63xx_pcmcia_register();
++
++ if (board.has_enet0 &&
++ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++ bcm63xx_enet_register(0, &board.enet0);
++
++ if (board.has_enet1 &&
++ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++ bcm63xx_enet_register(1, &board.enet1);
++
++ if (board.has_enetsw &&
++ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++ bcm63xx_enetsw_register(&board.enetsw);
++
++ if (board.has_usbd)
++ bcm63xx_usbd_register(&board.usbd);
++
++ if (board.has_ehci0)
++ bcm63xx_ehci_register();
++
++ if (board.has_ohci0)
++ bcm63xx_ohci_register();
++
++ /* Generate MAC address for WLAN and register our SPROM,
++ * do this after registering enet devices
++ */
++#ifdef CONFIG_SSB_PCIHOST
++ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++ if (ssb_arch_register_fallback_sprom(
++ &bcm63xx_get_fallback_sprom) < 0)
++ pr_err(PFX "failed to register fallback SPROM\n");
++ }
++#endif
++
++ bcm63xx_spi_register();
++
++ bcm63xx_hsspi_register();
++
++ bcm63xx_flash_register();
++
++ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
++ bcm63xx_led_data.leds = board.leds;
++
++ platform_device_register(&bcm63xx_gpio_leds);
++
++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
++ gpio_request_one(board.ephy_reset_gpio,
++ board.ephy_reset_gpio_flags, "ephy-reset");
++
++ return 0;
++}
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -0,0 +1,8 @@
++#ifndef __BOARD_COMMON_H
++#define __BOARD_COMMON_H
++
++#include <board_bcm963xx.h>
++
++void board_early_setup(const struct board_info *board);
++
++#endif /* __BOARD_COMMON_H */
--- /dev/null
+From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:08:06 +0100
+Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
+ setup
+
+Pass a mac address allocator to board setup code to allow board
+implementations to work with third party bootloaders not using nvram
+for configuration storage.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++-
+ arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------
+ arch/mips/bcm63xx/boards/board_common.h | 3 ++-
+ 3 files changed, 14 insertions(+), 8 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -727,7 +727,8 @@ void __init board_prom_init(void)
+ if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ continue;
+ /* copy, board desc array is marked initdata */
+- board_early_setup(bcm963xx_boards[i]);
++ board_early_setup(bcm963xx_boards[i],
++ bcm63xx_nvram_get_mac_address);
+ break;
+ }
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -18,7 +18,6 @@
+ #include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+-#include <bcm63xx_nvram.h>
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_dev_pci.h>
+ #include <bcm63xx_dev_enet.h>
+@@ -81,15 +80,20 @@ const char *board_get_name(void)
+ return board.name;
+ }
+
++static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
++
+ /*
+ * setup board for device registration
+ */
+-void __init board_early_setup(const struct board_info *target)
++void __init board_early_setup(const struct board_info *target,
++ int (*get_mac_address)(u8 mac[ETH_ALEN]))
+ {
+ u32 val;
+
+ memcpy(&board, target, sizeof(board));
+
++ board_get_mac_address = get_mac_address;
++
+ /* setup pin multiplexing depending on board enabled device,
+ * this has to be done this early since PCI init is done
+ * inside arch_initcall */
+@@ -162,15 +166,15 @@ int __init board_register_devices(void)
+ bcm63xx_pcmcia_register();
+
+ if (board.has_enet0 &&
+- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++ !board_get_mac_address(board.enet0.mac_addr))
+ bcm63xx_enet_register(0, &board.enet0);
+
+ if (board.has_enet1 &&
+- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++ !board_get_mac_address(board.enet1.mac_addr))
+ bcm63xx_enet_register(1, &board.enet1);
+
+ if (board.has_enetsw &&
+- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++ !board_get_mac_address(board.enetsw.mac_addr))
+ bcm63xx_enetsw_register(&board.enetsw);
+
+ if (board.has_usbd)
+@@ -186,7 +190,7 @@ int __init board_register_devices(void)
+ * do this after registering enet devices
+ */
+ #ifdef CONFIG_SSB_PCIHOST
+- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ if (ssb_arch_register_fallback_sprom(
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -3,6 +3,7 @@
+
+ #include <board_bcm963xx.h>
+
+-void board_early_setup(const struct board_info *board);
++void board_early_setup(const struct board_info *board,
++ int (*get_mac_address)(u8 mac[ETH_ALEN]));
+
+ #endif /* __BOARD_COMMON_H */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -707,10 +707,20 @@ void __init board_prom_init(void)
+
+ /* dump cfe version */
+ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+- if (!memcmp(cfe, "cfe-v", 5))
+- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
+- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
+- else
++ if (strstarts(cfe, "cfe-")) {
++ if(cfe[4] == 'v') {
++ if(cfe[5] == 'd')
++ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
++ else if (cfe[10] > 0)
++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
++ else
++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
++ } else {
++ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
++ }
++ } else
+ strcpy(cfe_version, "unknown");
+ pr_info("CFE version: %s\n", cfe_version);
+
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
+@@ -2,6 +2,8 @@
+ #ifndef BCM63XX_BOARD_H_
+ #define BCM63XX_BOARD_H_
+
++#include <asm/bootinfo.h>
++
+ const char *board_get_name(void);
+
+ void board_prom_init(void);
+@@ -10,4 +12,8 @@ void board_setup(void);
+
+ int board_register_devices(void);
+
++static inline bool bcm63xx_is_cfe_present(void) {
++ return fw_arg3 == 0x43464531;
++}
++
+ #endif /* ! BCM63XX_BOARD_H_ */
--- /dev/null
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -35,6 +35,8 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/of.h>
++
++#include <asm/mach-bcm63xx/bcm63xx_board.h>
+
+ #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
+
+@@ -46,30 +48,6 @@
+ #define STR_NULL_TERMINATE(x) \
+ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
+
+-static int bcm63xx_detect_cfe(struct mtd_info *master)
+-{
+- char buf[9];
+- int ret;
+- size_t retlen;
+-
+- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
+- (void *)buf);
+- buf[retlen] = 0;
+-
+- if (ret)
+- return ret;
+-
+- if (strncmp("cfe-v", buf, 5) == 0)
+- return 0;
+-
+- /* very old CFE's do not have the cfe-v string, so check for magic */
+- ret = mtd_read(master, BCM963XX_CFE_MAGIC_OFFSET, 8, &retlen,
+- (void *)buf);
+- buf[retlen] = 0;
+-
+- return strncmp("CFE1CFE1", buf, 8);
+-}
+-
+ static int bcm63xx_read_nvram(struct mtd_info *master,
+ struct bcm963xx_nvram *nvram)
+ {
+@@ -152,7 +130,7 @@ static int bcm63xx_parse_cfe_partitions(
+ struct bcm963xx_nvram *nvram = NULL;
+ int ret;
+
+- if (bcm63xx_detect_cfe(master))
++ if (!bcm63xx_is_cfe_present())
+ return -EINVAL;
+
+ nvram = vzalloc(sizeof(*nvram));
--- /dev/null
+From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:53:12 +0100
+Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq
+ controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../brcm,bcm6345-periph-intc.txt | 50 +++
+ drivers/irqchip/Kconfig | 4 +
+ drivers/irqchip/Makefile | 1 +
+ drivers/irqchip/irq-bcm6345-periph.c | 339 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-periph.h | 16 +
+ 5 files changed, 410 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-periph.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+@@ -0,0 +1,50 @@
++Broadcom BCM6345 Level 1 periphery interrupt controller
++
++This block is a interrupt controller that is typically connected directly
++to one of the HW INT lines on each CPU. Every BCM63XX xDSL chip since
++BCM6345 has contained this hardware.
++
++Key elements of the hardware design include:
++
++- 32, 64, or 128 incoming level IRQ lines
++
++- All onchip peripherals are wired directly to an L2 input
++
++- A separate instance of the register set for each CPU, allowing individual
++ peripheral IRQs to be routed to any CPU
++
++- No atomic mask/unmask operations
++
++- No polarity/level/edge settings
++
++- No FIFO or priority encoder logic; software is expected to read all
++ 1-4 status words to determine which IRQs are pending
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-periph-intc".
++- reg: Specifies the base physical address and size of the registers.
++ Multiple register addresses may be specified, and must match the amount of
++ parent interrupts.
++- interrupt-controller: Identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++ source, should be 1.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++ this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++ node, valid values depend on the type of parent interrupt controller.
++ Multiple lines are used to route interrupts to different cpus, with the first
++ assumed to be for the boot CPU.
++
++Example:
++
++periph_intc: interrupt-controller@f0406800 {
++ compatible = "brcm,bcm6345-periph-intc";
++ reg = <0x10000020 0x10>, <0x10000030 0x10>;
++
++ interrupt-controller;
++ #interrupt-cells = <1>;
++
++ interrupt-parent = <&cpu_intc>;
++ interrupts = <2>, <3>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -114,6 +114,10 @@ config BRCMSTB_L2_IRQ
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
++config BCM6345_PERIPH_IRQ
++ bool
++ select IRQ_DOMAIN
++
+ config DW_APB_ICTL
+ bool
+ select GENERIC_IRQ_CHIP
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
+ obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
+ obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
+ obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
+ obj-$(CONFIG_METAG) += irq-metag-ext.o
+ obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-periph.c
+@@ -0,0 +1,339 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE IRQ_INTERNAL_BASE
++#else
++#define VIRQ_BASE 0
++#endif
++
++#define MAX_WORDS 4
++#define MAX_PARENT_IRQS 2
++#define IRQS_PER_WORD 32
++
++struct intc_block {
++ int parent_irq;
++ void __iomem *base;
++ void __iomem *en_reg[MAX_WORDS];
++ void __iomem *status_reg[MAX_WORDS];
++ u32 mask_cache[MAX_WORDS];
++};
++
++struct intc_data {
++ struct irq_chip chip;
++ struct intc_block block[MAX_PARENT_IRQS];
++
++ int num_words;
++
++ struct irq_domain *domain;
++ raw_spinlock_t lock;
++};
++
++static void bcm6345_periph_irq_handle(struct irq_desc *desc)
++{
++ struct intc_data *data = irq_desc_get_handler_data(desc);
++ struct irq_chip *chip = irq_desc_get_chip(desc);
++ struct intc_block *block;
++ unsigned int irq = irq_desc_get_irq(desc);
++ unsigned int idx;
++
++ chained_irq_enter(chip, desc);
++
++ for (idx = 0; idx < MAX_PARENT_IRQS; idx++)
++ if (irq == data->block[idx].parent_irq)
++ block = &data->block[idx];
++
++ for (idx = 0; idx < data->num_words; idx++) {
++ int base = idx * IRQS_PER_WORD;
++ unsigned long pending;
++ int hw_irq;
++
++ raw_spin_lock(&data->lock);
++ pending = __raw_readl(block->en_reg[idx]) &
++ __raw_readl(block->status_reg[idx]);
++ raw_spin_unlock(&data->lock);
++
++ for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) {
++ int virq;
++
++ virq = irq_find_mapping(data->domain, base + hw_irq);
++ generic_handle_irq(virq);
++ }
++ }
++
++ chained_irq_exit(chip, desc);
++}
++
++static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit,
++ bool enable)
++{
++ u32 val;
++
++ val = __raw_readl(block->en_reg[reg]);
++ if (enable)
++ val |= BIT(bit);
++ else
++ val &= ~BIT(bit);
++ __raw_writel(val, block->en_reg[reg]);
++}
++
++static void bcm6345_periph_irq_mask(struct irq_data *data)
++{
++ unsigned int i, reg, bit;
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++
++ reg = hwirq / IRQS_PER_WORD;
++ bit = hwirq % IRQS_PER_WORD;
++
++ raw_spin_lock(&priv->lock);
++ for (i = 0; i < MAX_PARENT_IRQS; i++) {
++ struct intc_block *block = &priv->block[i];
++
++ if (!block->parent_irq)
++ break;
++
++ __bcm6345_periph_enable(block, reg, bit, false);
++ }
++ raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_periph_irq_unmask(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ unsigned int i, reg, bit;
++
++ reg = hwirq / IRQS_PER_WORD;
++ bit = hwirq % IRQS_PER_WORD;
++
++ raw_spin_lock(&priv->lock);
++ for (i = 0; i < MAX_PARENT_IRQS; i++) {
++ struct intc_block *block = &priv->block[i];
++
++ if (!block->parent_irq)
++ break;
++
++ if (block->mask_cache[reg] & BIT(bit))
++ __bcm6345_periph_enable(block, reg, bit, true);
++ else
++ __bcm6345_periph_enable(block, reg, bit, false);
++ }
++ raw_spin_unlock(&priv->lock);
++}
++
++#ifdef CONFIG_SMP
++static int bcm6345_periph_set_affinity(struct irq_data *data,
++ const struct cpumask *mask, bool force)
++{
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ struct intc_data *priv = data->domain->host_data;
++ unsigned int i, reg, bit;
++ unsigned long flags;
++ bool enabled;
++ int cpu;
++
++ reg = hwirq / IRQS_PER_WORD;
++ bit = hwirq % IRQS_PER_WORD;
++
++ /* we could route to more than one cpu, but performance
++ suffers, so fix it to one.
++ */
++ cpu = cpumask_any_and(mask, cpu_online_mask);
++ if (cpu >= nr_cpu_ids)
++ return -EINVAL;
++
++ if (cpu >= MAX_PARENT_IRQS)
++ return -EINVAL;
++
++ if (!priv->block[cpu].parent_irq)
++ return -EINVAL;
++
++ raw_spin_lock_irqsave(&priv->lock, flags);
++ enabled = !irqd_irq_masked(data);
++ for (i = 0; i < MAX_PARENT_IRQS; i++) {
++ struct intc_block *block = &priv->block[i];
++
++ if (!block->parent_irq)
++ break;
++
++ if (i == cpu) {
++ block->mask_cache[reg] |= BIT(bit);
++ __bcm6345_periph_enable(block, reg, bit, enabled);
++ } else {
++ block->mask_cache[reg] &= ~BIT(bit);
++ __bcm6345_periph_enable(block, reg, bit, false);
++ }
++ }
++ raw_spin_unlock_irqrestore(&priv->lock, flags);
++
++ return 0;
++}
++#endif
++
++static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq,
++ irq_hw_number_t hw)
++{
++ struct intc_data *priv = d->host_data;
++
++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++ return 0;
++}
++
++static const struct irq_domain_ops bcm6345_periph_domain_ops = {
++ .xlate = irq_domain_xlate_onecell,
++ .map = bcm6345_periph_map,
++};
++
++static int __init __bcm6345_periph_intc_init(struct device_node *node,
++ int num_blocks, int *irq,
++ void __iomem **base, int num_words)
++{
++ struct intc_data *data;
++ unsigned int i, w, status_offset;
++
++ data = kzalloc(sizeof(*data), GFP_KERNEL);
++ if (!data)
++ return -ENOMEM;
++
++ raw_spin_lock_init(&data->lock);
++
++ status_offset = num_words * sizeof(u32);
++
++ for (i = 0; i < num_blocks; i++) {
++ struct intc_block *block = &data->block[i];
++
++ block->parent_irq = irq[i];
++ block->base = base[i];
++
++ for (w = 0; w < num_words; w++) {
++ int word_offset = sizeof(u32) * ((num_words - w) - 1);
++
++ block->en_reg[w] = base[i] + word_offset;
++ block->status_reg[w] = base[i] + status_offset;
++ block->status_reg[w] += word_offset;
++
++ /* route all interrupts to line 0 by default */
++ if (i == 0)
++ block->mask_cache[w] = 0xffffffff;
++ }
++
++ irq_set_handler_data(block->parent_irq, data);
++ irq_set_chained_handler(block->parent_irq,
++ bcm6345_periph_irq_handle);
++ }
++
++ data->num_words = num_words;
++
++ data->chip.name = "bcm6345-periph-intc";
++ data->chip.irq_mask = bcm6345_periph_irq_mask;
++ data->chip.irq_unmask = bcm6345_periph_irq_unmask;
++
++#ifdef CONFIG_SMP
++ if (num_blocks > 1)
++ data->chip.irq_set_affinity = bcm6345_periph_set_affinity;
++#endif
++
++ data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words,
++ VIRQ_BASE,
++ &bcm6345_periph_domain_ops, data);
++ if (!data->domain) {
++ kfree(data);
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++void __init bcm6345_periph_intc_init(int num_blocks, int *irq,
++ void __iomem **base, int num_words)
++{
++ __bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_periph_of_init(struct device_node *node,
++ struct device_node *parent)
++{
++ struct resource res;
++ int num_irqs, ret = -EINVAL;
++ int irqs[MAX_PARENT_IRQS] = { 0 };
++ void __iomem *bases[MAX_PARENT_IRQS] = { NULL };
++ int words = 0;
++ int i;
++
++ num_irqs = of_irq_count(node);
++
++ if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS)
++ return -EINVAL;
++
++ for (i = 0; i < num_irqs; i++) {
++ resource_size_t size;
++
++ irqs[i] = irq_of_parse_and_map(node, i);
++ if (!irqs[i])
++ goto out_unmap;
++
++ if (of_address_to_resource(node, i, &res))
++ goto out_unmap;
++
++ size = resource_size(&res);
++ switch (size) {
++ case 8:
++ case 16:
++ case 32:
++ size = size / 8;
++ break;
++ default:
++ goto out_unmap;
++ }
++
++ if (words && words != size) {
++ ret = -EINVAL;
++ goto out_unmap;
++ }
++ words = size;
++
++ bases[i] = of_iomap(node, i);
++ if (!bases[i]) {
++ ret = -ENOMEM;
++ goto out_unmap;
++ }
++ }
++
++ ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words);
++ if (!ret)
++ return 0;
++
++out_unmap:
++ for (i = 0; i < num_irqs; i++) {
++ iounmap(bases[i]);
++ irq_dispose_mapping(irqs[i]);
++ }
++
++ return ret;
++}
++
++IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-l1-intc",
++ bcm6345_periph_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-periph.h
+@@ -0,0 +1,16 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++
++void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base,
++ int num_words);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */
--- /dev/null
+From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:54:27 +0100
+Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
+ interrupt controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++
+ drivers/irqchip/Kconfig | 4 +
+ drivers/irqchip/Makefile | 1 +
+ drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-ext.h | 14 +
+ 5 files changed, 335 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+@@ -0,0 +1,29 @@
++Broadcom BCM6345-style external interrupt controller
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc".
++- reg: Specifies the base physical addresses and size of the registers.
++- interrupt-controller: identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++ source, Should be 2.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++ this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++ node, valid values depend on the type of parent interrupt controller.
++
++Optional properties:
++
++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
++ register. Defaults to 4.
++
++Example:
++
++ext_intc: interrupt-controller@10000018 {
++ compatible = "brcm,bcm6345-ext-intc";
++ interrupt-parent = <&periph_intc>;
++ #interrupt-cells = <2>;
++ reg = <0x10000018 0x4>;
++ interrupt-controller;
++ interrupts = <24>, <25>, <26>, <27>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -114,6 +114,10 @@ config BRCMSTB_L2_IRQ
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
++config BCM6345_EXT_IRQ
++ bool
++ select IRQ_DOMAIN
++
+ config BCM6345_PERIPH_IRQ
+ bool
+ select IRQ_DOMAIN
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
+ obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
+ obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
+ obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o
+ obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
+ obj-$(CONFIG_METAG) += irq-metag-ext.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-ext.c
+@@ -0,0 +1,301 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE IRQ_EXTERNAL_BASE
++#else
++#define VIRQ_BASE 0
++#endif
++
++#define MAX_IRQS 4
++
++#define EXTIRQ_CFG_SENSE 0
++#define EXTIRQ_CFG_STAT 1
++#define EXTIRQ_CFG_CLEAR 2
++#define EXTIRQ_CFG_MASK 3
++#define EXTIRQ_CFG_BOTHEDGE 4
++#define EXTIRQ_CFG_LEVELSENSE 5
++
++struct intc_data {
++ struct irq_chip chip;
++ struct irq_domain *domain;
++ raw_spinlock_t lock;
++
++ int parent_irq[MAX_IRQS];
++ void __iomem *reg;
++ int shift;
++ unsigned int toggle_clear_on_ack:1;
++};
++
++static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
++{
++ struct intc_data *data = irq_desc_get_handler_data(desc);
++ struct irq_chip *chip = irq_desc_get_chip(desc);
++ unsigned int irq = irq_desc_get_irq(desc);
++ unsigned int idx;
++
++ chained_irq_enter(chip, desc);
++
++ for (idx = 0; idx < MAX_IRQS; idx++) {
++ if (data->parent_irq[idx] != irq)
++ continue;
++
++ generic_handle_irq(irq_find_mapping(data->domain, idx));
++ }
++
++ chained_irq_exit(chip, desc);
++}
++
++static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ u32 reg;
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
++ priv->reg);
++ if (priv->toggle_clear_on_ack)
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ u32 reg;
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ u32 reg;
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++}
++
++static int bcm6345_ext_intc_set_type(struct irq_data *data,
++ unsigned int flow_type)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ bool levelsense = 0, sense = 0, bothedge = 0;
++ u32 reg;
++
++ flow_type &= IRQ_TYPE_SENSE_MASK;
++
++ if (flow_type == IRQ_TYPE_NONE)
++ flow_type = IRQ_TYPE_LEVEL_LOW;
++
++ switch (flow_type) {
++ case IRQ_TYPE_EDGE_BOTH:
++ bothedge = 1;
++ break;
++
++ case IRQ_TYPE_EDGE_RISING:
++ sense = 1;
++ break;
++
++ case IRQ_TYPE_EDGE_FALLING:
++ break;
++
++ case IRQ_TYPE_LEVEL_HIGH:
++ levelsense = 1;
++ sense = 1;
++ break;
++
++ case IRQ_TYPE_LEVEL_LOW:
++ levelsense = 1;
++ break;
++
++ default:
++ pr_err("bogus flow type combination given!\n");
++ return -EINVAL;
++ }
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++
++ if (levelsense)
++ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
++ else
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
++ if (sense)
++ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
++ else
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
++ if (bothedge)
++ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
++ else
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
++
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++
++ irqd_set_trigger_type(data, flow_type);
++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++ irq_set_handler_locked(data, handle_level_irq);
++ else
++ irq_set_handler_locked(data, handle_edge_irq);
++
++ return 0;
++}
++
++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
++ irq_hw_number_t hw)
++{
++ struct intc_data *priv = d->host_data;
++
++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++ return 0;
++}
++
++static const struct irq_domain_ops bcm6345_ext_domain_ops = {
++ .xlate = irq_domain_xlate_twocell,
++ .map = bcm6345_ext_intc_map,
++};
++
++static int __init __bcm6345_ext_intc_init(struct device_node *node,
++ int num_irqs, int *irqs,
++ void __iomem *reg, int shift,
++ bool toggle_clear_on_ack)
++{
++ struct intc_data *data;
++ unsigned int i;
++ int start = VIRQ_BASE;
++
++ data = kzalloc(sizeof(*data), GFP_KERNEL);
++ if (!data)
++ return -ENOMEM;
++
++ raw_spin_lock_init(&data->lock);
++
++ for (i = 0; i < num_irqs; i++) {
++ data->parent_irq[i] = irqs[i];
++
++ irq_set_handler_data(irqs[i], data);
++ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
++ }
++
++ data->reg = reg;
++ data->shift = shift;
++ data->toggle_clear_on_ack = toggle_clear_on_ack;
++
++ data->chip.name = "bcm6345-ext-intc";
++ data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
++ data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
++ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
++ data->chip.irq_set_type = bcm6345_ext_intc_set_type;
++
++ /*
++ * If we have less than 4 irqs, this is the second controller on
++ * bcm63xx. So increase the VIRQ start to not overlap with the first
++ * one, but only do so if we actually use a non-zero start.
++ *
++ * This can be removed when bcm63xx has no legacy users anymore.
++ */
++ if (start && num_irqs < 4)
++ start += 4;
++
++ data->domain = irq_domain_add_simple(node, num_irqs, start,
++ &bcm6345_ext_domain_ops, data);
++ if (!data->domain) {
++ kfree(data);
++ return -ENOMEM;
++ }
++
++ return 0;
++}
++
++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
++ int shift)
++{
++ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_ext_intc_of_init(struct device_node *node,
++ struct device_node *parent)
++{
++ int num_irqs, ret = -EINVAL;
++ unsigned i;
++ void __iomem *base;
++ int irqs[MAX_IRQS] = { 0 };
++ u32 shift;
++ bool toggle_clear_on_ack = false;
++
++ num_irqs = of_irq_count(node);
++
++ if (!num_irqs || num_irqs > MAX_IRQS)
++ return -EINVAL;
++
++ if (of_property_read_u32(node, "brcm,field-width", &shift))
++ shift = 4;
++
++ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */
++ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
++ toggle_clear_on_ack = true;
++
++ for (i = 0; i < num_irqs; i++) {
++ irqs[i] = irq_of_parse_and_map(node, i);
++ if (!irqs[i]) {
++ ret = -ENOMEM;
++ goto out_unmap;
++ }
++ }
++
++ base = of_iomap(node, 0);
++ if (!base)
++ goto out_unmap;
++
++ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
++ toggle_clear_on_ack);
++ if (!ret)
++ return 0;
++out_unmap:
++ iounmap(base);
++
++ for (i = 0; i < num_irqs; i++)
++ irq_dispose_mapping(irqs[i]);
++
++ return ret;
++}
++
++IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
++ bcm6345_ext_intc_of_init);
++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
++ bcm6345_ext_intc_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-ext.h
+@@ -0,0 +1,14 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++
++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
--- /dev/null
+From d2d2489e0a4b740abd980e9d1cad952d15bc2d9e Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:55:02 +0100
+Subject: [PATCH] MIPS: BCM63XX: switch to IRQ_DOMAIN
+
+Now that we have working IRQ_DOMAIN drivers for both interrupt controllers,
+switch to using them.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/Kconfig | 3 +
+ arch/mips/bcm63xx/irq.c | 612 +++++++++---------------------------------------
+ 2 files changed, 108 insertions(+), 507 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -272,6 +272,9 @@ config BCM63XX
+ select SYNC_R4K
+ select DMA_NONCOHERENT
+ select IRQ_MIPS_CPU
++ select BCM6345_EXT_IRQ
++ select BCM6345_PERIPH_IRQ
++ select IRQ_DOMAIN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_HAS_EARLY_PRINTK
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -11,7 +11,9 @@
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/irq.h>
+-#include <linux/spinlock.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -19,544 +21,140 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+
+-
+-static DEFINE_SPINLOCK(ipic_lock);
+-static DEFINE_SPINLOCK(epic_lock);
+-
+-static u32 irq_stat_addr[2];
+-static u32 irq_mask_addr[2];
+-static void (*dispatch_internal)(int cpu);
+-static int is_ext_irq_cascaded;
+-static unsigned int ext_irq_count;
+-static unsigned int ext_irq_start, ext_irq_end;
+-static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
+-static void (*internal_irq_mask)(struct irq_data *d);
+-static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
+-
+-
+-static inline u32 get_ext_irq_perf_reg(int irq)
+-{
+- if (irq < 4)
+- return ext_irq_cfg_reg1;
+- return ext_irq_cfg_reg2;
+-}
+-
+-static inline void handle_internal(int intbit)
+-{
+- if (is_ext_irq_cascaded &&
+- intbit >= ext_irq_start && intbit <= ext_irq_end)
+- do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
+- else
+- do_IRQ(intbit + IRQ_INTERNAL_BASE);
+-}
+-
+-static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
+- const struct cpumask *m)
+-{
+- bool enable = cpu_online(cpu);
+-
+-#ifdef CONFIG_SMP
+- if (m)
+- enable &= cpumask_test_cpu(cpu, m);
+- else if (irqd_affinity_was_set(d))
+- enable &= cpumask_test_cpu(cpu, irq_data_get_affinity_mask(d));
+-#endif
+- return enable;
+-}
+-
+-/*
+- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
+- * prioritize any interrupt relatively to another. the static counter
+- * will resume the loop where it ended the last time we left this
+- * function.
+- */
+-
+-#define BUILD_IPIC_INTERNAL(width) \
+-void __dispatch_internal_##width(int cpu) \
+-{ \
+- u32 pending[width / 32]; \
+- unsigned int src, tgt; \
+- bool irqs_pending = false; \
+- static unsigned int i[2]; \
+- unsigned int *next = &i[cpu]; \
+- unsigned long flags; \
+- \
+- /* read registers in reverse order */ \
+- spin_lock_irqsave(&ipic_lock, flags); \
+- for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
+- u32 val; \
+- \
+- val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
+- val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
+- pending[--tgt] = val; \
+- \
+- if (val) \
+- irqs_pending = true; \
+- } \
+- spin_unlock_irqrestore(&ipic_lock, flags); \
+- \
+- if (!irqs_pending) \
+- return; \
+- \
+- while (1) { \
+- unsigned int to_call = *next; \
+- \
+- *next = (*next + 1) & (width - 1); \
+- if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
+- handle_internal(to_call); \
+- break; \
+- } \
+- } \
+-} \
+- \
+-static void __internal_irq_mask_##width(struct irq_data *d) \
+-{ \
+- u32 val; \
+- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
+- unsigned reg = (irq / 32) ^ (width/32 - 1); \
+- unsigned bit = irq & 0x1f; \
+- unsigned long flags; \
+- int cpu; \
+- \
+- spin_lock_irqsave(&ipic_lock, flags); \
+- for_each_present_cpu(cpu) { \
+- if (!irq_mask_addr[cpu]) \
+- break; \
+- \
+- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+- val &= ~(1 << bit); \
+- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+- } \
+- spin_unlock_irqrestore(&ipic_lock, flags); \
+-} \
+- \
+-static void __internal_irq_unmask_##width(struct irq_data *d, \
+- const struct cpumask *m) \
+-{ \
+- u32 val; \
+- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
+- unsigned reg = (irq / 32) ^ (width/32 - 1); \
+- unsigned bit = irq & 0x1f; \
+- unsigned long flags; \
+- int cpu; \
+- \
+- spin_lock_irqsave(&ipic_lock, flags); \
+- for_each_present_cpu(cpu) { \
+- if (!irq_mask_addr[cpu]) \
+- break; \
+- \
+- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+- if (enable_irq_for_cpu(cpu, d, m)) \
+- val |= (1 << bit); \
+- else \
+- val &= ~(1 << bit); \
+- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+- } \
+- spin_unlock_irqrestore(&ipic_lock, flags); \
+-}
+-
+-BUILD_IPIC_INTERNAL(32);
+-BUILD_IPIC_INTERNAL(64);
+-
+-asmlinkage void plat_irq_dispatch(void)
+-{
+- u32 cause;
+-
+- do {
+- cause = read_c0_cause() & read_c0_status() & ST0_IM;
+-
+- if (!cause)
+- break;
+-
+- if (cause & CAUSEF_IP7)
+- do_IRQ(7);
+- if (cause & CAUSEF_IP0)
+- do_IRQ(0);
+- if (cause & CAUSEF_IP1)
+- do_IRQ(1);
+- if (cause & CAUSEF_IP2)
+- dispatch_internal(0);
+- if (is_ext_irq_cascaded) {
+- if (cause & CAUSEF_IP3)
+- dispatch_internal(1);
+- } else {
+- if (cause & CAUSEF_IP3)
+- do_IRQ(IRQ_EXT_0);
+- if (cause & CAUSEF_IP4)
+- do_IRQ(IRQ_EXT_1);
+- if (cause & CAUSEF_IP5)
+- do_IRQ(IRQ_EXT_2);
+- if (cause & CAUSEF_IP6)
+- do_IRQ(IRQ_EXT_3);
+- }
+- } while (1);
+-}
+-
+-/*
+- * internal IRQs operations: only mask/unmask on PERF irq mask
+- * register.
+- */
+-static void bcm63xx_internal_irq_mask(struct irq_data *d)
+-{
+- internal_irq_mask(d);
+-}
+-
+-static void bcm63xx_internal_irq_unmask(struct irq_data *d)
+-{
+- internal_irq_unmask(d, NULL);
+-}
+-
+-/*
+- * external IRQs operations: mask/unmask and clear on PERF external
+- * irq control register.
+- */
+-static void bcm63xx_external_irq_mask(struct irq_data *d)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- unsigned long flags;
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+-
+- if (BCMCPU_IS_6348())
+- reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4);
+- else
+- reg &= ~EXTIRQ_CFG_MASK(irq % 4);
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-
+- if (is_ext_irq_cascaded)
+- internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
+-}
+-
+-static void bcm63xx_external_irq_unmask(struct irq_data *d)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- unsigned long flags;
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+-
+- if (BCMCPU_IS_6348())
+- reg |= EXTIRQ_CFG_MASK_6348(irq % 4);
+- else
+- reg |= EXTIRQ_CFG_MASK(irq % 4);
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-
+- if (is_ext_irq_cascaded)
+- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
+- NULL);
+-}
+-
+-static void bcm63xx_external_irq_clear(struct irq_data *d)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- unsigned long flags;
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+-
+- if (BCMCPU_IS_6348())
+- reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4);
+- else
+- reg |= EXTIRQ_CFG_CLEAR(irq % 4);
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-}
+-
+-static int bcm63xx_external_irq_set_type(struct irq_data *d,
+- unsigned int flow_type)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- int levelsense, sense, bothedge;
+- unsigned long flags;
+-
+- flow_type &= IRQ_TYPE_SENSE_MASK;
+-
+- if (flow_type == IRQ_TYPE_NONE)
+- flow_type = IRQ_TYPE_LEVEL_LOW;
+-
+- levelsense = sense = bothedge = 0;
+- switch (flow_type) {
+- case IRQ_TYPE_EDGE_BOTH:
+- bothedge = 1;
+- break;
+-
+- case IRQ_TYPE_EDGE_RISING:
+- sense = 1;
+- break;
+-
+- case IRQ_TYPE_EDGE_FALLING:
+- break;
+-
+- case IRQ_TYPE_LEVEL_HIGH:
+- levelsense = 1;
+- sense = 1;
+- break;
+-
+- case IRQ_TYPE_LEVEL_LOW:
+- levelsense = 1;
+- break;
+-
+- default:
+- pr_err("bogus flow type combination given !\n");
+- return -EINVAL;
+- }
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+- irq %= 4;
+-
+- switch (bcm63xx_get_cpu_id()) {
+- case BCM6348_CPU_ID:
+- if (levelsense)
+- reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
+- else
+- reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq);
+- if (sense)
+- reg |= EXTIRQ_CFG_SENSE_6348(irq);
+- else
+- reg &= ~EXTIRQ_CFG_SENSE_6348(irq);
+- if (bothedge)
+- reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
+- else
+- reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
+- break;
+-
+- case BCM3368_CPU_ID:
+- case BCM6328_CPU_ID:
+- case BCM6338_CPU_ID:
+- case BCM6345_CPU_ID:
+- case BCM6358_CPU_ID:
+- case BCM6362_CPU_ID:
+- case BCM6368_CPU_ID:
+- if (levelsense)
+- reg |= EXTIRQ_CFG_LEVELSENSE(irq);
+- else
+- reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
+- if (sense)
+- reg |= EXTIRQ_CFG_SENSE(irq);
+- else
+- reg &= ~EXTIRQ_CFG_SENSE(irq);
+- if (bothedge)
+- reg |= EXTIRQ_CFG_BOTHEDGE(irq);
+- else
+- reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+- break;
+- default:
+- BUG();
+- }
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-
+- irqd_set_trigger_type(d, flow_type);
+- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+- irq_set_handler_locked(d, handle_level_irq);
+- else
+- irq_set_handler_locked(d, handle_edge_irq);
+-
+- return IRQ_SET_MASK_OK_NOCOPY;
+-}
+-
+-#ifdef CONFIG_SMP
+-static int bcm63xx_internal_set_affinity(struct irq_data *data,
+- const struct cpumask *dest,
+- bool force)
+-{
+- if (!irqd_irq_disabled(data))
+- internal_irq_unmask(data, dest);
+-
+- return 0;
+-}
+-#endif
+-
+-static struct irq_chip bcm63xx_internal_irq_chip = {
+- .name = "bcm63xx_ipic",
+- .irq_mask = bcm63xx_internal_irq_mask,
+- .irq_unmask = bcm63xx_internal_irq_unmask,
+-};
+-
+-static struct irq_chip bcm63xx_external_irq_chip = {
+- .name = "bcm63xx_epic",
+- .irq_ack = bcm63xx_external_irq_clear,
+-
+- .irq_mask = bcm63xx_external_irq_mask,
+- .irq_unmask = bcm63xx_external_irq_unmask,
+-
+- .irq_set_type = bcm63xx_external_irq_set_type,
+-};
+-
+-static struct irqaction cpu_ip2_cascade_action = {
+- .handler = no_action,
+- .name = "cascade_ip2",
+- .flags = IRQF_NO_THREAD,
+-};
+-
+-#ifdef CONFIG_SMP
+-static struct irqaction cpu_ip3_cascade_action = {
+- .handler = no_action,
+- .name = "cascade_ip3",
+- .flags = IRQF_NO_THREAD,
+-};
+-#endif
+-
+-static struct irqaction cpu_ext_cascade_action = {
+- .handler = no_action,
+- .name = "cascade_extirq",
+- .flags = IRQF_NO_THREAD,
+-};
+-
+-static void bcm63xx_init_irq(void)
++void __init arch_init_irq(void)
+ {
+- int irq_bits;
+-
+- irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
+- irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
+- irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
+- irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
++ void __iomem *periph_bases[2];
++ void __iomem *ext_intc_bases[2];
++ int periph_irq_count, periph_width, ext_irq_count, ext_shift;
++ int periph_irqs[2] = { 2, 3 };
++ int ext_irqs[6];
++
++ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++ ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM3368_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
++ periph_bases[0] += PERF_IRQMASK_3368_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_3368_EXT_IRQ0;
++ ext_irqs[1] = BCM_3368_EXT_IRQ1;
++ ext_irqs[2] = BCM_3368_EXT_IRQ2;
++ ext_irqs[3] = BCM_3368_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6328_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
+- irq_bits = 64;
+- ext_irq_count = 4;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
++ periph_bases[0] += PERF_IRQMASK_6328_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6328_REG(1);
++ periph_irq_count = 2;
++ periph_width = 2;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6328_EXT_IRQ0;
++ ext_irqs[1] = BCM_6328_EXT_IRQ1;
++ ext_irqs[2] = BCM_6328_EXT_IRQ2;
++ ext_irqs[3] = BCM_6328_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6338_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
++ periph_bases[0] += PERF_IRQMASK_6338_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338;
++ ext_irq_count = 4;
++ ext_irqs[0] = 3;
++ ext_irqs[1] = 4;
++ ext_irqs[2] = 5;
++ ext_irqs[3] = 6;
++ ext_shift = 4;
+ break;
+ case BCM6345_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
++ periph_bases[0] += PERF_IRQMASK_6345_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345;
++ ext_irq_count = 4;
++ ext_irqs[0] = 3;
++ ext_irqs[1] = 4;
++ ext_irqs[2] = 5;
++ ext_irqs[3] = 6;
++ ext_shift = 4;
+ break;
+ case BCM6348_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
++ periph_bases[0] += PERF_IRQMASK_6348_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348;
++ ext_irq_count = 4;
++ ext_irqs[0] = 3;
++ ext_irqs[1] = 4;
++ ext_irqs[2] = 5;
++ ext_irqs[3] = 6;
++ ext_shift = 5;
+ break;
+ case BCM6358_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
+- irq_bits = 32;
+- ext_irq_count = 4;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
++ periph_bases[0] += PERF_IRQMASK_6358_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6358_REG(1);
++ periph_irq_count = 2;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6358_EXT_IRQ0;
++ ext_irqs[1] = BCM_6358_EXT_IRQ1;
++ ext_irqs[2] = BCM_6358_EXT_IRQ2;
++ ext_irqs[3] = BCM_6358_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6362_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
+- irq_bits = 64;
+- ext_irq_count = 4;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
++ periph_bases[0] += PERF_IRQMASK_6362_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6362_REG(1);
++ periph_irq_count = 2;
++ periph_width = 2;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6362_EXT_IRQ0;
++ ext_irqs[1] = BCM_6362_EXT_IRQ1;
++ ext_irqs[2] = BCM_6362_EXT_IRQ2;
++ ext_irqs[3] = BCM_6362_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6368_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
+- irq_bits = 64;
++ periph_bases[0] += PERF_IRQMASK_6368_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6368_REG(1);
++ periph_irq_count = 2;
++ periph_width = 2;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368;
++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368;
+ ext_irq_count = 6;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
+- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
++ ext_irqs[0] = BCM_6368_EXT_IRQ0;
++ ext_irqs[1] = BCM_6368_EXT_IRQ1;
++ ext_irqs[2] = BCM_6368_EXT_IRQ2;
++ ext_irqs[3] = BCM_6368_EXT_IRQ3;
++ ext_irqs[4] = BCM_6368_EXT_IRQ4;
++ ext_irqs[5] = BCM_6368_EXT_IRQ5;
++ ext_shift = 4;
+ break;
+ default:
+ BUG();
+ }
+
+- if (irq_bits == 32) {
+- dispatch_internal = __dispatch_internal_32;
+- internal_irq_mask = __internal_irq_mask_32;
+- internal_irq_unmask = __internal_irq_unmask_32;
+- } else {
+- dispatch_internal = __dispatch_internal_64;
+- internal_irq_mask = __internal_irq_mask_64;
+- internal_irq_unmask = __internal_irq_unmask_64;
+- }
+-}
+-
+-void __init arch_init_irq(void)
+-{
+- int i;
+-
+- bcm63xx_init_irq();
+ mips_cpu_irq_init();
+- for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
+- irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
+- handle_level_irq);
+-
+- for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i)
+- irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip,
+- handle_edge_irq);
+-
+- if (!is_ext_irq_cascaded) {
+- for (i = 3; i < 3 + ext_irq_count; ++i)
+- setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
+- }
+-
+- setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
+-#ifdef CONFIG_SMP
+- if (is_ext_irq_cascaded) {
+- setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
+- bcm63xx_internal_irq_chip.irq_set_affinity =
+- bcm63xx_internal_set_affinity;
+-
+- cpumask_clear(irq_default_affinity);
+- cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
+- }
+-#endif
++ bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases,
++ periph_width);
++ bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift);
++ if (ext_irq_count > 4)
++ bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1],
++ ext_shift);
+ }
--- /dev/null
+From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 20:20:30 +0100
+Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
+ and 5
+
+Due to the external interrupts being non consecutive, the previous
+implementation did not support them. Now that we treat both registers
+as separate irq controllers, there is no such limitation anymore and
+we can expose them for drivers to use.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 5 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
+ 3 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -108,11 +108,14 @@ void __init arch_init_irq(void)
+ periph_width = 1;
+
+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
+- ext_irq_count = 4;
++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
++ ext_irq_count = 6;
+ ext_irqs[0] = BCM_6358_EXT_IRQ0;
+ ext_irqs[1] = BCM_6358_EXT_IRQ1;
+ ext_irqs[2] = BCM_6358_EXT_IRQ2;
+ ext_irqs[3] = BCM_6358_EXT_IRQ3;
++ ext_irqs[4] = BCM_6358_EXT_IRQ4;
++ ext_irqs[5] = BCM_6358_EXT_IRQ5;
+ ext_shift = 4;
+ break;
+ case BCM6362_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -896,6 +896,8 @@ enum bcm63xx_irq {
+ #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
+ #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
+ #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
++#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20)
++#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21)
+
+ /*
+ * 6362 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -244,6 +244,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6362 0x18
+ #define PERF_EXTIRQ_CFG_REG_6368 0x18
+
++#define PERF_EXTIRQ_CFG_REG2_6358 0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
+
+ /* for 6348 only */
--- /dev/null
+From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:08:36 +0100
+Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
+
+---
+ arch/mips/bcm63xx/cpu.c | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
+ 2 files changed, 28 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
+ u16 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+
++static u32 bcm63xx_cpu_variant __read_mostly;
++
+ static u8 bcm63xx_cpu_rev;
+ static unsigned int bcm63xx_cpu_freq;
+ static unsigned int bcm63xx_memory_size;
+@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
+
+ };
+
++u32 bcm63xx_get_cpu_variant(void)
++{
++ return bcm63xx_cpu_variant;
++}
++
++EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
++
+ u8 bcm63xx_get_cpu_rev(void)
+ {
+ return bcm63xx_cpu_rev;
+@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
+ /* read out CPU type */
+ tmp = bcm_readl(chipid_reg);
+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+
+ switch (bcm63xx_cpu_id) {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -20,6 +20,7 @@
+ #define BCM6368_CPU_ID 0x6368
+
+ void __init bcm63xx_cpu_init(void);
++u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+
+@@ -83,6 +84,23 @@ static inline u16 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
+
++#define BCMCPU_VARIANT_IS_3368() \
++ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6328() \
++ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_6338() \
++ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
++#define BCMCPU_VARIANT_IS_6345() \
++ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
++#define BCMCPU_VARIANT_IS_6348() \
++ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
++#define BCMCPU_VARIANT_IS_6358() \
++ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6362() \
++ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
++#define BCMCPU_VARIANT_IS_6368() \
++ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
+ * address of these sets do change.
--- /dev/null
+From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:22:41 +0100
+Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
+
+Some SoC have a variant id field in the chip id register.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -10,6 +10,8 @@
+ #define PERF_REV_REG 0x0
+ #define REV_CHIPID_SHIFT 16
+ #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
++#define REV_VARID_SHIFT 12
++#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT 0
+ #define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
+
--- /dev/null
+From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:30:59 +0100
+Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
+ 2 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void)
+ unsigned int tmp;
+ unsigned int cpu = smp_processor_id();
+ u32 chipid_reg;
++ u8 __maybe_unused varid = 0;
+
+ /* soc registers location depends on cpu type */
+ chipid_reg = 0;
+@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void)
+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
+
+ switch (bcm63xx_cpu_id) {
+ case BCM3368_CPU_ID:
+@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void)
+ case BCM6328_CPU_ID:
+ bcm63xx_regs_base = bcm6328_regs_base;
+ bcm63xx_irqs = bcm6328_irqs;
++
++ if (varid == 1)
++ bcm63xx_cpu_variant = BCM63281_CPU_ID;
++ else if (varid == 3)
++ bcm63xx_cpu_variant = BCM63283_CPU_ID;
++ else
++ pr_warn("unknown BCM6328 variant: %x\n", varid);
++
+ break;
+ case BCM6338_CPU_ID:
+ bcm63xx_regs_base = bcm6338_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -12,6 +12,8 @@
+ */
+ #define BCM3368_CPU_ID 0x3368
+ #define BCM6328_CPU_ID 0x6328
++#define BCM63281_CPU_ID 0x63281
++#define BCM63283_CPU_ID 0x63283
+ #define BCM6338_CPU_ID 0x6338
+ #define BCM6345_CPU_ID 0x6345
+ #define BCM6348_CPU_ID 0x6348
+@@ -86,8 +88,10 @@ static inline u16 __pure bcm63xx_get_cpu
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+-#define BCMCPU_VARIANT_IS_6328() \
+- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_63281() \
++ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
++#define BCMCPU_VARIANT_IS_63283() \
++ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6338() \
+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6345() \
--- /dev/null
+From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:33:28 +0100
+Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
+
+---
+ arch/mips/bcm63xx/cpu.c | 8 ++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 11 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void)
+ case BCM6362_CPU_ID:
+ bcm63xx_regs_base = bcm6362_regs_base;
+ bcm63xx_irqs = bcm6362_irqs;
++
++ if (varid == 1)
++ bcm63xx_cpu_variant = BCM6362_CPU_ID;
++ else if (varid == 2)
++ bcm63xx_cpu_variant = BCM6361_CPU_ID;
++ else
++ pr_warn("unknown BCM6362 variant: %x\n", varid);
++
+ break;
+ case BCM6368_CPU_ID:
+ bcm63xx_regs_base = bcm6368_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -18,6 +18,7 @@
+ #define BCM6345_CPU_ID 0x6345
+ #define BCM6348_CPU_ID 0x6348
+ #define BCM6358_CPU_ID 0x6358
++#define BCM6361_CPU_ID 0x6361
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
+
+@@ -100,6 +101,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6358() \
+ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6361() \
++ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6362() \
+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
--- /dev/null
+From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:36:56 +0100
+Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
+
+The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
+from missing DSL, there is no difference to BCM6368, so treat it such.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
+
+ break;
+ case BCM6368_CPU_ID:
++ case BCM6369_CPU_ID:
+ bcm63xx_regs_base = bcm6368_regs_base;
+ bcm63xx_irqs = bcm6368_irqs;
++
++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
++ bcm63xx_cpu_id = BCM6368_CPU_ID;
+ break;
+ default:
+ panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -21,6 +21,7 @@
+ #define BCM6361_CPU_ID 0x6361
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
++#define BCM6369_CPU_ID 0x6369
+
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -107,6 +108,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6369() \
++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
--- /dev/null
+From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:05:54 +0100
+Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -42,7 +42,7 @@
+ BCM_CB_MEM_SIZE - 1)
+
+ #define BCM_PCIE_MEM_BASE_PA 0x10f00000
+-#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024)
++#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
+ BCM_PCIE_MEM_SIZE - 1)
+
--- /dev/null
+From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:13:06 +0100
+Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
+
+Different SoCs use different memory windows (and sizes), so don't
+hardcode it.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++----
+ arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++-----
+ 2 files changed, 14 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -41,10 +41,10 @@
+ #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
+ BCM_CB_MEM_SIZE - 1)
+
+-#define BCM_PCIE_MEM_BASE_PA 0x10f00000
+-#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
+-#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
+- BCM_PCIE_MEM_SIZE - 1)
++#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
++#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
++ BCM_PCIE_MEM_SIZE_6328 - 1)
+
+ /*
+ * Internal registers are accessed through KSEG3
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
+
+ static struct resource bcm_pcie_mem_resource = {
+ .name = "bcm63xx PCIe memory space",
+- .start = BCM_PCIE_MEM_BASE_PA,
+- .end = BCM_PCIE_MEM_END_PA,
++ .start = 0,
++ .end = 0,
+ .flags = IORESOURCE_MEM,
+ };
+
+@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
+ bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+
+ /* set bar0 to little endian */
+- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
+- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+ val |= BASEMASK_REMAP_EN;
+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+
+- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+
+ register_pci_controller(&bcm63xx_pcie_controller);
+@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
+ if (!bcm63xx_pci_enabled)
+ return -ENODEV;
+
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++ }
++
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
--- /dev/null
+From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:54:51 +0100
+Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
+
+---
+ arch/mips/bcm63xx/cpu.c | 2 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
+ const int *bcm63xx_irqs;
+ EXPORT_SYMBOL(bcm63xx_irqs);
+
+-u16 bcm63xx_cpu_id __read_mostly;
++u32 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+
+ static u32 bcm63xx_cpu_variant __read_mostly;
+@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
+
+ static unsigned int detect_cpu_clock(void)
+ {
+- u16 cpu_id = bcm63xx_get_cpu_id();
++ u32 cpu_id = bcm63xx_get_cpu_id();
+
+ switch (cpu_id) {
+ case BCM3368_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -28,7 +28,7 @@ u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+
+-static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
++static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
+ {
+ switch (cpu_id) {
+ #ifdef CONFIG_BCM63XX_CPU_3368
+@@ -70,11 +70,11 @@ static inline u16 __pure __bcm63xx_get_c
+ return cpu_id;
+ }
+
+-extern u16 bcm63xx_cpu_id;
++extern u32 bcm63xx_cpu_id;
+
+-static inline u16 __pure bcm63xx_get_cpu_id(void)
++static inline u32 __pure bcm63xx_get_cpu_id(void)
+ {
+- const u16 cpu_id = bcm63xx_cpu_id;
++ const u32 cpu_id = bcm63xx_cpu_id;
+
+ return __bcm63xx_get_cpu_id(cpu_id);
+ }
--- /dev/null
+From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:46:26 +0100
+Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
+
+Newer SoCs have 128 bit wide irq registers, thus 128 available internal
+interupts.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
+ arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
+@@ -2,10 +2,12 @@
+ #ifndef BCM63XX_IRQ_H_
+ #define BCM63XX_IRQ_H_
+
++#include <irq.h>
+ #include <bcm63xx_cpu.h>
+
+ #define IRQ_INTERNAL_BASE 8
+-#define IRQ_EXTERNAL_BASE 100
++#define NR_INTERNAL_IRQS 128
++#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
+ #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
+ #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
+ #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
+--- a/arch/mips/include/asm/mach-bcm63xx/irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
+@@ -2,7 +2,7 @@
+ #ifndef __ASM_MACH_BCM63XX_IRQ_H
+ #define __ASM_MACH_BCM63XX_IRQ_H
+
+-#define NR_IRQS 128
++#define NR_IRQS 256
+ #define MIPS_CPU_IRQ_BASE 0
+
+ #endif
--- /dev/null
+From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 17:14:17 +0100
+Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig | 5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/clk.c | 25 ++++-
+ arch/mips/bcm63xx/cpu.c | 59 +++++++++-
+ arch/mips/bcm63xx/dev-flash.c | 6 +
+ arch/mips/bcm63xx/dev-spi.c | 4 +-
+ arch/mips/bcm63xx/irq.c | 20 +++-
+ arch/mips/bcm63xx/reset.c | 21 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 130 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 +
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 79 +++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
+ 12 files changed, 342 insertions(+), 12 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -61,6 +61,11 @@ config BCM63XX_CPU_6368
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++
++config BCM63XX_CPU_63268
++ bool "support 63268 CPU"
++ select SYS_HAS_CPU_BMIPS4350
++ select HW_HAS_PCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -697,7 +697,7 @@ void __init board_prom_init(void)
+ /* read base address of boot chip select (0)
+ * 6328/6362 do not have MPI but boot from a fixed address
+ */
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ val = 0x18000000;
+ } else {
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -169,6 +169,8 @@ static void enetsw_set(struct clk *clk,
+ clk_disable_unlocked(&clk_swpkt_sar);
+ }
+ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
++ } else if (BCMCPU_IS_63268()) {
++ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
+ } else {
+ return;
+ }
+@@ -214,6 +216,8 @@ static void usbh_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++ else if (BCMCPU_IS_63268())
++ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+ else
+ return;
+
+@@ -236,6 +240,8 @@ static void usbd_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++ else if (BCMCPU_IS_63268())
++ bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
+ else
+ return;
+
+@@ -262,9 +268,13 @@ static void spi_set(struct clk *clk, int
+ mask = CKCTL_6358_SPI_EN;
+ else if (BCMCPU_IS_6362())
+ mask = CKCTL_6362_SPI_EN;
+- else
+- /* BCMCPU_IS_6368 */
++ else if (BCMCPU_IS_6368())
+ mask = CKCTL_6368_SPI_EN;
++ else if (BCMCPU_IS_63268())
++ mask = CKCTL_63268_SPI_EN;
++ else
++ return;
++
+ bcm_hwclock_set(mask, enable);
+ }
+
+@@ -283,6 +293,8 @@ static void hsspi_set(struct clk *clk, i
+ mask = CKCTL_6328_HSSPI_EN;
+ else if (BCMCPU_IS_6362())
+ mask = CKCTL_6362_HSSPI_EN;
++ else if (BCMCPU_IS_63268())
++ mask = CKCTL_63268_HSSPI_EN;
+ else
+ return;
+
+@@ -352,6 +364,8 @@ static void pcie_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+ else if (BCMCPU_IS_6362())
+ bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
++ else if (BCMCPU_IS_63268())
++ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
+ }
+
+ static struct clk clk_pcie = {
+@@ -536,6 +550,21 @@ static struct clk_lookup bcm6368_clks[]
+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
+ };
+
++static struct clk_lookup bcm63268_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
++ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
++};
++
+ #define HSSPI_PLL_HZ_6328 133333333
+ #define HSSPI_PLL_HZ_6362 400000000
+
+@@ -568,6 +597,10 @@ static int __init bcm63xx_clk_init(void)
+ case BCM6368_CPU_ID:
+ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
+ break;
++ case BCM63268_CPU_ID:
++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
++ clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks));
++ break;
+ }
+
+ return 0;
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
+
+ };
+
++static const unsigned long bcm63268_regs_base[] = {
++ __GEN_CPU_REGS_TABLE(63268)
++};
++
++static const int bcm63268_irqs[] = {
++ __GEN_CPU_IRQ_TABLE(63268)
++
++};
++
+ u32 bcm63xx_get_cpu_variant(void)
+ {
+ return bcm63xx_cpu_variant;
+@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
+
+ return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
+ }
++ case BCM63268_CPU_ID:
++ {
++ unsigned int tmp, mips_pll_fcvo;
++
++ tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++ mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
++ STRAPBUS_63268_FCVO_SHIFT;
++ switch (mips_pll_fcvo) {
++ case 0x3:
++ case 0xe:
++ return 320000000;
++ case 0xa:
++ return 333000000;
++ case 0x2:
++ case 0xb:
++ case 0xf:
++ return 400000000;
++ default:
++ return 0;
++ }
++ }
+
+ default:
+ panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
+@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
+ unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ u32 val;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+
+ if (BCMCPU_IS_6345()) {
+@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void)
+ unsigned int tmp;
+ unsigned int cpu = smp_processor_id();
+ u32 chipid_reg;
++ bool long_chipid = false;
+ u8 __maybe_unused varid = 0;
+
+ /* soc registers location depends on cpu type */
+@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void)
+ case 0x10:
+ chipid_reg = BCM_6345_PERF_BASE;
+ break;
++ case 0x80:
++ long_chipid = true;
++ /* fall-through */
+ default:
+ chipid_reg = BCM_6368_PERF_BASE;
+ break;
+@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void)
+ break;
+ }
+
++
+ /*
+ * really early to panic, but delaying panic would not help since we
+ * will never get any working console
+@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void)
+
+ /* read out CPU type */
+ tmp = bcm_readl(chipid_reg);
+- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+- bcm63xx_cpu_variant = bcm63xx_cpu_id;
++
++ if (long_chipid) {
++ bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
++ bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
++ } else {
++ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++ }
++
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+- varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+
+ switch (bcm63xx_cpu_id) {
+ case BCM3368_CPU_ID:
+@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
+ bcm63xx_cpu_id = BCM6368_CPU_ID;
+ break;
++ case BCM63168_CPU_ID:
++ case BCM63169_CPU_ID:
++ case BCM63268_CPU_ID:
++ case BCM63269_CPU_ID:
++ bcm63xx_regs_base = bcm63268_regs_base;
++ bcm63xx_irqs = bcm63268_irqs;
++
++ bcm63xx_cpu_id = BCM63268_CPU_ID;
++ break;
+ default:
+ panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+ break;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
+ case STRAPBUS_6368_BOOT_SEL_PARALLEL:
+ return BCM63XX_FLASH_TYPE_PARALLEL;
+ }
++ case BCM63268_CPU_ID:
++ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
++ return BCM63XX_FLASH_TYPE_SERIAL;
++ else
++ return BCM63XX_FLASH_TYPE_NAND;
+ default:
+ return -EINVAL;
+ }
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -51,7 +51,7 @@ int __init bcm63xx_spi_register(void)
+ }
+
+ if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
+- BCMCPU_IS_6368()) {
++ BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
+ bcm63xx_spi_device.name = "bcm6358-spi",
+ spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
+ }
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -149,6 +149,20 @@ void __init arch_init_irq(void)
+ ext_irqs[5] = BCM_6368_EXT_IRQ5;
+ ext_shift = 4;
+ break;
++ case BCM63268_CPU_ID:
++ periph_bases[0] += PERF_IRQMASK_63268_REG(0);
++ periph_bases[1] += PERF_IRQMASK_63268_REG(1);
++ periph_irq_count = 2;
++ periph_width = 4;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_63268_EXT_IRQ0;
++ ext_irqs[1] = BCM_63268_EXT_IRQ1;
++ ext_irqs[2] = BCM_63268_EXT_IRQ2;
++ ext_irqs[3] = BCM_63268_EXT_IRQ3;
++ ext_shift = 4;
++ break;
+ default:
+ BUG();
+ }
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -126,6 +126,20 @@
+ #define BCM6368_RESET_PCIE 0
+ #define BCM6368_RESET_PCIE_EXT 0
+
++#define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
++#define BCM63268_RESET_ENET 0
++#define BCM63268_RESET_USBH SOFTRESET_63268_USBH_MASK
++#define BCM63268_RESET_USBD SOFTRESET_63268_USBS_MASK
++#define BCM63268_RESET_DSL 0
++#define BCM63268_RESET_SAR SOFTRESET_63268_SAR_MASK
++#define BCM63268_RESET_EPHY 0
++#define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
++#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
++#define BCM63268_RESET_MPI 0
++#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
++ SOFTRESET_63268_PCIE_CORE_MASK)
++#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
++
+ /*
+ * core reset bits
+ */
+@@ -157,6 +171,10 @@ static const u32 bcm6368_reset_bits[] =
+ __GEN_RESET_BITS_TABLE(6368)
+ };
+
++static const u32 bcm63268_reset_bits[] = {
++ __GEN_RESET_BITS_TABLE(63268)
++};
++
+ const u32 *bcm63xx_reset_bits;
+ static int reset_reg;
+
+@@ -183,6 +201,9 @@ static int __init bcm63xx_reset_bits_ini
+ } else if (BCMCPU_IS_6368()) {
+ reset_reg = PERF_SOFTRESET_6368_REG;
+ bcm63xx_reset_bits = bcm6368_reset_bits;
++ } else if (BCMCPU_IS_63268()) {
++ reset_reg = PERF_SOFTRESET_63268_REG;
++ bcm63xx_reset_bits = bcm63268_reset_bits;
+ }
+
+ return 0;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -22,6 +22,10 @@
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
+ #define BCM6369_CPU_ID 0x6369
++#define BCM63168_CPU_ID 0x63168
++#define BCM63169_CPU_ID 0x63169
++#define BCM63268_CPU_ID 0x63268
++#define BCM63269_CPU_ID 0x63269
+
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -62,6 +66,10 @@ static inline u32 __pure __bcm63xx_get_c
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ case BCM6368_CPU_ID:
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_63268
++ case BCM63268_CPU_ID:
++#endif
+ break;
+ default:
+ unreachable();
+@@ -87,6 +95,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
+ #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
++#define BCMCPU_IS_63268() (bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+@@ -110,6 +119,14 @@ static inline u32 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6369() \
+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
++#define BCMCPU_VARIANT_IS_63168() \
++ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
++#define BCMCPU_VARIANT_IS_63169() \
++ (bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
++#define BCMCPU_VARIANT_IS_63268() \
++ (bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
++#define BCMCPU_VARIANT_IS_63269() \
++ (bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
+
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
+@@ -574,6 +591,52 @@ enum bcm63xx_regs_set {
+ #define BCM_6368_RNG_BASE (0xb0004180)
+ #define BCM_6368_MISC_BASE (0xdeadbeef)
+
++/*
++ * 63268 register sets base address
++ */
++#define BCM_63268_DSL_LMEM_BASE (0xdeadbeef)
++#define BCM_63268_PERF_BASE (0xb0000000)
++#define BCM_63268_TIMER_BASE (0xb0000080)
++#define BCM_63268_WDT_BASE (0xb000009c)
++#define BCM_63268_UART0_BASE (0xb0000180)
++#define BCM_63268_UART1_BASE (0xb00001a0)
++#define BCM_63268_GPIO_BASE (0xb00000c0)
++#define BCM_63268_SPI_BASE (0xb0000800)
++#define BCM_63268_HSSPI_BASE (0xb0001000)
++#define BCM_63268_UDC0_BASE (0xdeadbeef)
++#define BCM_63268_USBDMA_BASE (0xb000c800)
++#define BCM_63268_OHCI0_BASE (0xb0002600)
++#define BCM_63268_OHCI_PRIV_BASE (0xdeadbeef)
++#define BCM_63268_USBH_PRIV_BASE (0xb0002700)
++#define BCM_63268_USBD_BASE (0xb0002400)
++#define BCM_63268_MPI_BASE (0xdeadbeef)
++#define BCM_63268_PCMCIA_BASE (0xdeadbeef)
++#define BCM_63268_PCIE_BASE (0xb06e0000)
++#define BCM_63268_SDRAM_REGS_BASE (0xdeadbeef)
++#define BCM_63268_DSL_BASE (0xdeadbeef)
++#define BCM_63268_UBUS_BASE (0xdeadbeef)
++#define BCM_63268_ENET0_BASE (0xdeadbeef)
++#define BCM_63268_ENET1_BASE (0xdeadbeef)
++#define BCM_63268_ENETDMA_BASE (0xb000d800)
++#define BCM_63268_ENETDMAC_BASE (0xb000da00)
++#define BCM_63268_ENETDMAS_BASE (0xb000dc00)
++#define BCM_63268_ENETSW_BASE (0xb0700000)
++#define BCM_63268_EHCI0_BASE (0xb0002500)
++#define BCM_63268_SDRAM_BASE (0xdeadbeef)
++#define BCM_63268_MEMC_BASE (0xdeadbeef)
++#define BCM_63268_DDR_BASE (0xb0003000)
++#define BCM_63268_M2M_BASE (0xdeadbeef)
++#define BCM_63268_ATM_BASE (0xdeadbeef)
++#define BCM_63268_XTM_BASE (0xb0007000)
++#define BCM_63268_XTMDMA_BASE (0xb000b800)
++#define BCM_63268_XTMDMAC_BASE (0xdeadbeef)
++#define BCM_63268_XTMDMAS_BASE (0xdeadbeef)
++#define BCM_63268_PCM_BASE (0xb000b000)
++#define BCM_63268_PCMDMA_BASE (0xb000b800)
++#define BCM_63268_PCMDMAC_BASE (0xdeadbeef)
++#define BCM_63268_PCMDMAS_BASE (0xdeadbeef)
++#define BCM_63268_RNG_BASE (0xdeadbeef)
++#define BCM_63268_MISC_BASE (0xb0001800)
+
+ extern const unsigned long *bcm63xx_regs_base;
+
+@@ -1042,6 +1105,73 @@ enum bcm63xx_irq {
+ #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
+ #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)
+
++/*
++ * 63268 irqs
++ */
++#define BCM_63268_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
++#define BCM_63268_VERY_HIGH_IRQ_BASE (BCM_63268_HIGH_IRQ_BASE + 32)
++
++#define BCM_63268_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
++#define BCM_63268_SPI_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 16)
++#define BCM_63268_UART0_IRQ (IRQ_INTERNAL_BASE + 5)
++#define BCM_63268_UART1_IRQ (BCM_63268_HIGH_IRQ_BASE + 2)
++#define BCM_63268_DSL_IRQ (IRQ_INTERNAL_BASE + 23)
++#define BCM_63268_UDC0_IRQ 0
++#define BCM_63268_ENET0_IRQ 0
++#define BCM_63268_ENET1_IRQ 0
++#define BCM_63268_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_HSSPI_IRQ (IRQ_INTERNAL_BASE + 6)
++#define BCM_63268_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
++#define BCM_63268_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
++#define BCM_63268_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
++#define BCM_63268_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_USBD_TXDMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 4)
++#define BCM_63268_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 20)
++#define BCM_63268_USBD_TXDMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 5)
++#define BCM_63268_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 21)
++#define BCM_63268_USBD_TXDMA2_IRQ (BCM_63268_HIGH_IRQ_BASE + 6)
++#define BCM_63268_PCMCIA_IRQ 0
++#define BCM_63268_ENET0_RXDMA_IRQ 0
++#define BCM_63268_ENET0_TXDMA_IRQ 0
++#define BCM_63268_ENET1_RXDMA_IRQ 0
++#define BCM_63268_ENET1_TXDMA_IRQ 0
++#define BCM_63268_PCI_IRQ (BCM_63268_HIGH_IRQ_BASE + 8)
++#define BCM_63268_ATM_IRQ 0
++#define BCM_63268_ENETSW_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 1)
++#define BCM_63268_ENETSW_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 2)
++#define BCM_63268_ENETSW_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 3)
++#define BCM_63268_ENETSW_RXDMA3_IRQ (IRQ_INTERNAL_BASE + 4)
++#define BCM_63268_ENETSW_TXDMA0_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 0)
++#define BCM_63268_ENETSW_TXDMA1_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 1)
++#define BCM_63268_ENETSW_TXDMA2_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 2)
++#define BCM_63268_ENETSW_TXDMA3_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 3)
++#define BCM_63268_XTM_IRQ (BCM_63268_HIGH_IRQ_BASE + 17)
++#define BCM_63268_XTM_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
++
++#define BCM_63268_RING_OSC_IRQ (BCM_63268_HIGH_IRQ_BASE + 20)
++#define BCM_63268_WLAN_GPIO_IRQ (BCM_63268_HIGH_IRQ_BASE + 3)
++#define BCM_63268_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
++#define BCM_63268_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
++#define BCM_63268_NAND_IRQ (BCM_63268_HIGH_IRQ_BASE + 18)
++#define BCM_63268_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_DG_IRQ (IRQ_INTERNAL_BASE + 15)
++#define BCM_63268_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
++#define BCM_63268_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
++#define BCM_63268_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
++#define BCM_63268_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 22)
++#define BCM_63268_IPSEC_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 7)
++#define BCM_63268_FAP0_IRQ (IRQ_INTERNAL_BASE + 24)
++#define BCM_63268_FAP1_IRQ (IRQ_INTERNAL_BASE + 25)
++#define BCM_63268_PCM_DMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 10)
++#define BCM_63268_PCM_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 11)
++#define BCM_63268_DECT0_IRQ (BCM_63268_HIGH_IRQ_BASE + 0)
++#define BCM_63268_DECT1_IRQ (BCM_63268_HIGH_IRQ_BASE + 1)
++#define BCM_63268_EXT_IRQ0 (BCM_63268_HIGH_IRQ_BASE + 12)
++#define BCM_63268_EXT_IRQ1 (BCM_63268_HIGH_IRQ_BASE + 13)
++#define BCM_63268_EXT_IRQ2 (BCM_63268_HIGH_IRQ_BASE + 14)
++#define BCM_63268_EXT_IRQ3 (BCM_63268_HIGH_IRQ_BASE + 15)
++
+ extern const int *bcm63xx_irqs;
+
+ #define __GEN_CPU_IRQ_TABLE(__cpu) \
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -23,6 +23,8 @@ static inline unsigned long bcm63xx_gpio
+ return 48;
+ case BCM6368_CPU_ID:
+ return 38;
++ case BCM63268_CPU_ID:
++ return 52;
+ case BCM6348_CPU_ID:
+ default:
+ return 37;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -10,6 +10,8 @@
+ #define PERF_REV_REG 0x0
+ #define REV_CHIPID_SHIFT 16
+ #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
++#define REV_LONG_CHIPID_SHIFT 12
++#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
+ #define REV_VARID_SHIFT 12
+ #define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT 0
+@@ -212,6 +214,52 @@
+ CKCTL_6368_NAND_EN | \
+ CKCTL_6368_IPSEC_EN)
+
++#define CKCTL_63268_DISABLE_GLESS (1 << 0)
++#define CKCTL_63268_VDSL_QPROC_EN (1 << 1)
++#define CKCTL_63268_VDSL_AFE_EN (1 << 2)
++#define CKCTL_63268_VDSL_EN (1 << 3)
++#define CKCTL_63268_MIPS_EN (1 << 4)
++#define CKCTL_63268_WLAN_OCP_EN (1 << 5)
++#define CKCTL_63268_DECT_EN (1 << 6)
++#define CKCTL_63268_FAP0_EN (1 << 7)
++#define CKCTL_63268_FAP1_EN (1 << 8)
++#define CKCTL_63268_SAR_EN (1 << 9)
++#define CKCTL_63268_ROBOSW_EN (1 << 10)
++#define CKCTL_63268_PCM_EN (1 << 11)
++#define CKCTL_63268_USBD_EN (1 << 12)
++#define CKCTL_63268_USBH_EN (1 << 13)
++#define CKCTL_63268_IPSEC_EN (1 << 14)
++#define CKCTL_63268_SPI_EN (1 << 15)
++#define CKCTL_63268_HSSPI_EN (1 << 16)
++#define CKCTL_63268_PCIE_EN (1 << 17)
++#define CKCTL_63268_PHYMIPS_EN (1 << 18)
++#define CKCTL_63268_GMAC_EN (1 << 19)
++#define CKCTL_63268_NAND_EN (1 << 20)
++#define CKCTL_63268_TBUS_EN (1 << 27)
++#define CKCTL_63268_ROBOSW250_EN (1 << 31)
++
++#define CKCTL_63268_ALL_SAFE_EN (CKCTL_63268_VDSL_QPROC_EN | \
++ CKCTL_63268_VDSL_AFE_EN | \
++ CKCTL_63268_VDSL_EN | \
++ CKCTL_63268_WLAN_OCP_EN | \
++ CKCTL_63268_DECT_EN | \
++ CKCTL_63268_FAP0_EN | \
++ CKCTL_63268_FAP1_EN | \
++ CKCTL_63268_SAR_EN | \
++ CKCTL_63268_ROBOSW_EN | \
++ CKCTL_63268_PCM_EN | \
++ CKCTL_63268_USBD_EN | \
++ CKCTL_63268_USBH_EN | \
++ CKCTL_63268_IPSEC_EN | \
++ CKCTL_63268_SPI_EN | \
++ CKCTL_63268_HSSPI_EN | \
++ CKCTL_63268_PCIE_EN | \
++ CKCTL_63268_PHYMIPS_EN | \
++ CKCTL_63268_GMAC_EN | \
++ CKCTL_63268_NAND_EN | \
++ CKCTL_63268_TBUS_EN | \
++ CKCTL_63268_ROBOSW250_EN)
++
+ /* System PLL Control register */
+ #define PERF_SYS_PLL_CTL_REG 0x8
+ #define SYS_PLL_SOFT_RESET 0x1
+@@ -225,6 +273,7 @@
+ #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c)
+ #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10)
++#define PERF_IRQMASK_63268_REG(x) (0x20 + (x) * 0x20)
+
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG 0x10
+@@ -235,6 +284,7 @@
+ #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c)
+ #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10)
++#define PERF_IRQSTAT_63268_REG(x) (0x30 + (x) * 0x20)
+
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368 0x14
+@@ -245,6 +295,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6358 0x14
+ #define PERF_EXTIRQ_CFG_REG_6362 0x18
+ #define PERF_EXTIRQ_CFG_REG_6368 0x18
++#define PERF_EXTIRQ_CFG_REG_63268 0x18
+
+ #define PERF_EXTIRQ_CFG_REG2_6358 0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
+@@ -275,6 +326,7 @@
+ #define PERF_SOFTRESET_6358_REG 0x34
+ #define PERF_SOFTRESET_6362_REG 0x10
+ #define PERF_SOFTRESET_6368_REG 0x10
++#define PERF_SOFTRESET_63268_REG 0x10
+
+ #define SOFTRESET_3368_SPI_MASK (1 << 0)
+ #define SOFTRESET_3368_ENET_MASK (1 << 2)
+@@ -368,6 +420,26 @@
+ #define SOFTRESET_6368_USBH_MASK (1 << 12)
+ #define SOFTRESET_6368_PCM_MASK (1 << 13)
+
++#define SOFTRESET_63268_SPI_MASK (1 << 0)
++#define SOFTRESET_63268_IPSEC_MASK (1 << 1)
++#define SOFTRESET_63268_EPHY_MASK (1 << 2)
++#define SOFTRESET_63268_SAR_MASK (1 << 3)
++#define SOFTRESET_63268_ENETSW_MASK (1 << 4)
++#define SOFTRESET_63268_USBS_MASK (1 << 5)
++#define SOFTRESET_63268_USBH_MASK (1 << 6)
++#define SOFTRESET_63268_PCM_MASK (1 << 7)
++#define SOFTRESET_63268_PCIE_CORE_MASK (1 << 8)
++#define SOFTRESET_63268_PCIE_MASK (1 << 9)
++#define SOFTRESET_63268_PCIE_EXT_MASK (1 << 10)
++#define SOFTRESET_63268_WLAN_SHIM_MASK (1 << 11)
++#define SOFTRESET_63268_DDR_PHY_MASK (1 << 12)
++#define SOFTRESET_63268_FAP0_MASK (1 << 13)
++#define SOFTRESET_63268_WLAN_UBUS_MASK (1 << 14)
++#define SOFTRESET_63268_DECT_MASK (1 << 15)
++#define SOFTRESET_63268_FAP1_MASK (1 << 16)
++#define SOFTRESET_63268_PCIE_HARD_MASK (1 << 17)
++#define SOFTRESET_63268_GPHY_MASK (1 << 18)
++
+ /* MIPS PLL control register */
+ #define PERF_MIPSPLLCTL_REG 0x34
+ #define MIPSPLLCTL_N1_SHIFT 20
+@@ -1367,6 +1439,13 @@
+ #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
+ #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)
+
++#define MISC_STRAPBUS_63268_REG 0x14
++#define STRAPBUS_63268_HSSPI_CLK_FAST (1 << 9)
++#define STRAPBUS_63268_BOOT_SEL_SERIAL (1 << 11)
++#define STRAPBUS_63268_BOOT_SEL_NAND (0 << 11)
++#define STRAPBUS_63268_FCVO_SHIFT 21
++#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
++
+ #define MISC_STRAPBUS_6328_REG 0x240
+ #define STRAPBUS_6328_FCVO_SHIFT 7
+ #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -26,6 +26,7 @@ static inline int is_bcm63xx_internal_re
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
+ case BCM6368_CPU_ID:
++ case BCM63268_CPU_ID:
+ if (offset >= 0xb0000000 && offset < 0xb1000000)
+ return 1;
+ break;
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
+
+ int __init bcm63xx_hsspi_register(void)
+ {
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -176,7 +176,8 @@ static int __init register_shared(void)
+ else
+ shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
++ BCMCPU_IS_63268())
+ chan_count = 32;
+ else if (BCMCPU_IS_6345())
+ chan_count = 8;
+@@ -284,7 +285,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ int ret;
+
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
++ !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ ret = register_shared();
+@@ -305,6 +307,8 @@ bcm63xx_enetsw_register(const struct bcm
+ enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ enetsw_pd.num_ports = ENETSW_PORTS_6368;
++ else if (BCMCPU_IS_63268())
++ enetsw_pd.num_ports = ENETSW_PORTS_63268;
+
+ enetsw_pd.dma_has_sram = true;
+ enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
+@@ -67,6 +67,7 @@ struct bcm63xx_enet_platform_data {
+ #define ENETSW_MAX_PORT 8
+ #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
+ #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
++#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
+
+ #define ENETSW_RGMII_PORT0 4
+
--- /dev/null
+From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:22:40 +0100
+Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
+
+---
+ arch/mips/bcm63xx/reset.c | 3 ++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
+ arch/mips/pci/pci-bcm63xx.c | 4 ++++
+ 3 files changed, 11 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -137,7 +137,8 @@
+ #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI 0
+ #define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
+- SOFTRESET_63268_PCIE_CORE_MASK)
++ SOFTRESET_63268_PCIE_CORE_MASK | \
++ SOFTRESET_63268_PCIE_HARD_MASK)
+ #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
+
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -46,6 +46,11 @@
+ #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
+ BCM_PCIE_MEM_SIZE_6328 - 1)
+
++#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000
++#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \
++ BCM_PCIE_MEM_SIZE_63268 - 1)
++
+ /*
+ * Internal registers are accessed through KSEG3
+ */
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++ } else if (BCMCPU_IS_63268()) {
++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
+ }
+
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
++ case BCM63268_CPU_ID:
+ return bcm63xx_register_pcie();
+ case BCM3368_CPU_ID:
+ case BCM6348_CPU_ID:
--- /dev/null
+From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 01:24:09 +0100
+Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
+
+---
+ arch/mips/bcm63xx/Kconfig | 5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/clk.c | 8 +-
+ arch/mips/bcm63xx/cpu.c | 53 +++++++++++
+ arch/mips/bcm63xx/dev-flash.c | 3 +
+ arch/mips/bcm63xx/dev-spi.c | 2 +-
+ arch/mips/bcm63xx/irq.c | 10 ++
+ arch/mips/bcm63xx/prom.c | 2 +-
+ arch/mips/bcm63xx/reset.c | 24 +++++
+ arch/mips/bcm63xx/setup.c | 5 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 107 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 75 ++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
+ 13 files changed, 291 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -19,6 +19,11 @@ config BCM63XX_EHCI
+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
+
++config BCM63XX_CPU_6318
++ bool "support 6318 CPU"
++ select SYS_HAS_CPU_BMIPS32_3300
++ select HW_HAS_PCI
++
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -697,7 +697,7 @@ void __init board_prom_init(void)
+ /* read base address of boot chip select (0)
+ * 6328/6362 do not have MPI but boot from a fixed address
+ */
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ val = 0x18000000;
+ } else {
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -289,7 +289,9 @@ static void hsspi_set(struct clk *clk, i
+ {
+ u32 mask;
+
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318())
++ mask = CKCTL_6318_HSSPI_EN;
++ else if (BCMCPU_IS_6328())
+ mask = CKCTL_6328_HSSPI_EN;
+ else if (BCMCPU_IS_6362())
+ mask = CKCTL_6362_HSSPI_EN;
+@@ -444,6 +446,19 @@ static struct clk_lookup bcm3368_clks[]
+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
+ };
+
++static struct clk_lookup bcm6318_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbh),
++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
++ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
++};
++
+ static struct clk_lookup bcm6328_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+@@ -565,6 +580,7 @@ static struct clk_lookup bcm63268_clks[]
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
+ };
+
++#define HSSPI_PLL_HZ_6318 250000000
+ #define HSSPI_PLL_HZ_6328 133333333
+ #define HSSPI_PLL_HZ_6362 400000000
+
+@@ -574,6 +590,10 @@ static int __init bcm63xx_clk_init(void)
+ case BCM3368_CPU_ID:
+ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
+ break;
++ case BCM6318_CPU_ID:
++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318;
++ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks));
++ break;
+ case BCM6328_CPU_ID:
+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
+ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {
+ __GEN_CPU_IRQ_TABLE(3368)
+ };
+
++static const unsigned long bcm6318_regs_base[] = {
++ __GEN_CPU_REGS_TABLE(6318)
++};
++
++static const int bcm6318_irqs[] = {
++ __GEN_CPU_IRQ_TABLE(6318)
++};
++
+ static const unsigned long bcm6328_regs_base[] = {
+ __GEN_CPU_REGS_TABLE(6328)
+ };
+@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
+ return bcm63xx_memory_size;
+ }
+
++#define STRAP_OVERRIDE_BUS_REG 0x0
++#define OVERRIDE_BUS_MIPS_FREQ_SHIFT 23
++#define OVERRIDE_BUS_MIPS_FREQ_MASK (0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT)
++
+ static unsigned int detect_cpu_clock(void)
+ {
+ u32 cpu_id = bcm63xx_get_cpu_id();
+@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
+ case BCM3368_CPU_ID:
+ return 300000000;
+
++ case BCM6318_CPU_ID:
++ {
++ unsigned int tmp, mips_pll_fcvo;
++
++ tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG);
++
++ pr_info("strap_override_bus = %08x\n", tmp);
++
++ mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK)
++ >> OVERRIDE_BUS_MIPS_FREQ_SHIFT;
++
++ switch (mips_pll_fcvo) {
++ case 0:
++ return 166000000;
++ case 1:
++ return 400000000;
++ case 2:
++ return 250000000;
++ case 3:
++ return 333000000;
++ };
++ }
+ case BCM6328_CPU_ID:
+ {
+ unsigned int tmp, mips_pll_fcvo;
+@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
+ unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ u32 val;
+
++ if (BCMCPU_IS_6318()) {
++ val = bcm_sdram_readl(SDRAM_CFG_REG);
++ val = val & SDRAM_CFG_6318_SPACE_MASK;
++ val >>= SDRAM_CFG_6318_SPACE_SHIFT;
++ return 1 << (val + 20);
++ }
++
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+
+@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void)
+
+ switch (current_cpu_type()) {
+ case CPU_BMIPS3300:
++ if ((read_c0_prid() & 0xff) >= 0x33) {
++ /* BCM6318 */
++ chipid_reg = BCM_6368_PERF_BASE;
++ break;
++ }
++
+ if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
+ __cpu_name[cpu] = "Broadcom BCM6338";
+ /* fall-through */
+@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void)
+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+
+ switch (bcm63xx_cpu_id) {
++ case BCM6318_CPU_ID:
++ bcm63xx_regs_base = bcm6318_regs_base;
++ bcm63xx_irqs = bcm6318_irqs;
++ break;
+ case BCM3368_CPU_ID:
+ bcm63xx_regs_base = bcm3368_regs_base;
+ bcm63xx_irqs = bcm3368_irqs;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t
+ u32 val;
+
+ switch (bcm63xx_get_cpu_id()) {
++ case BCM6318_CPU_ID:
++ /* only support serial flash */
++ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6328_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
+ if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -38,7 +38,7 @@ static struct platform_device bcm63xx_sp
+
+ int __init bcm63xx_spi_register(void)
+ {
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
+ return -ENODEV;
+
+ spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -48,6 +48,19 @@ void __init arch_init_irq(void)
+ ext_irqs[3] = BCM_3368_EXT_IRQ3;
+ ext_shift = 4;
+ break;
++ case BCM6318_CPU_ID:
++ periph_bases[0] += PERF_IRQMASK_6318_REG;
++ periph_irq_count = 1;
++ periph_width = 4;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6318_EXT_IRQ0;
++ ext_irqs[1] = BCM_6318_EXT_IRQ0;
++ ext_irqs[2] = BCM_6318_EXT_IRQ0;
++ ext_irqs[3] = BCM_6318_EXT_IRQ0;
++ ext_shift = 4;
++ break;
+ case BCM6328_CPU_ID:
+ periph_bases[0] += PERF_IRQMASK_6328_REG(0);
+ periph_bases[1] += PERF_IRQMASK_6328_REG(1);
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -68,7 +68,7 @@ void __init prom_init(void)
+
+ if (reg & OTP_6328_REG3_TP1_DISABLED)
+ bmips_smp_enabled = 0;
+- } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
++ } else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
+ bmips_smp_enabled = 0;
+ }
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -44,6 +44,23 @@
+ #define BCM3368_RESET_PCIE 0
+ #define BCM3368_RESET_PCIE_EXT 0
+
++
++#define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
++#define BCM6318_RESET_ENET 0
++#define BCM6318_RESET_USBH SOFTRESET_6318_USBH_MASK
++#define BCM6318_RESET_USBD SOFTRESET_6318_USBS_MASK
++#define BCM6318_RESET_DSL 0
++#define BCM6318_RESET_SAR SOFTRESET_6318_SAR_MASK
++#define BCM6318_RESET_EPHY SOFTRESET_6318_EPHY_MASK
++#define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
++#define BCM6318_RESET_PCM 0
++#define BCM6318_RESET_MPI 0
++#define BCM6318_RESET_PCIE \
++ (SOFTRESET_6318_PCIE_MASK | \
++ SOFTRESET_6318_PCIE_CORE_MASK | \
++ SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
++
+ #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET 0
+ #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK
+@@ -148,6 +165,10 @@ static const u32 bcm3368_reset_bits[] =
+ __GEN_RESET_BITS_TABLE(3368)
+ };
+
++static const u32 bcm6318_reset_bits[] = {
++ __GEN_RESET_BITS_TABLE(6318)
++};
++
+ static const u32 bcm6328_reset_bits[] = {
+ __GEN_RESET_BITS_TABLE(6328)
+ };
+@@ -184,6 +205,9 @@ static int __init bcm63xx_reset_bits_ini
+ if (BCMCPU_IS_3368()) {
+ reset_reg = PERF_SOFTRESET_6358_REG;
+ bcm63xx_reset_bits = bcm3368_reset_bits;
++ } else if (BCMCPU_IS_6318()) {
++ reset_reg = PERF_SOFTRESET_6318_REG;
++ bcm63xx_reset_bits = bcm6318_reset_bits;
+ } else if (BCMCPU_IS_6328()) {
+ reset_reg = PERF_SOFTRESET_6328_REG;
+ bcm63xx_reset_bits = bcm6328_reset_bits;
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void)
+ case BCM3368_CPU_ID:
+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
+ break;
++ case BCM6318_CPU_ID:
++ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318;
++ break;
+ case BCM6328_CPU_ID:
+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
+ break;
+@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void)
+ bcm6348_a1_reboot();
+
+ pr_info("triggering watchdog soft-reset...\n");
+- if (BCMCPU_IS_6328()) {
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) {
+ bcm_wdt_writel(1, WDT_SOFTRESET_REG);
+ } else {
+ reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -11,6 +11,7 @@
+ * arm mach-types)
+ */
+ #define BCM3368_CPU_ID 0x3368
++#define BCM6318_CPU_ID 0x6318
+ #define BCM6328_CPU_ID 0x6328
+ #define BCM63281_CPU_ID 0x63281
+ #define BCM63283_CPU_ID 0x63283
+@@ -39,6 +40,10 @@ static inline u32 __pure __bcm63xx_get_c
+ case BCM3368_CPU_ID:
+ #endif
+
++#ifdef CONFIG_BCM63XX_CPU_6318
++ case BCM6318_CPU_ID:
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ case BCM6328_CPU_ID:
+ #endif
+@@ -88,6 +93,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ }
+
+ #define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
++#define BCMCPU_IS_6318() (bcm63xx_get_cpu_id() == BCM6318_CPU_ID)
+ #define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
+ #define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
+ #define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
+@@ -99,6 +105,8 @@ static inline u32 __pure bcm63xx_get_cpu
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6318() \
++ (bcm63xx_get_cpu_variant() == BCM6318_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63281() \
+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63283() \
+@@ -253,6 +261,56 @@ enum bcm63xx_regs_set {
+ #define BCM_3368_MISC_BASE (0xdeadbeef)
+
+ /*
++ * 6318 register sets base address
++ */
++#define BCM_6318_DSL_LMEM_BASE (0xdeadbeef)
++#define BCM_6318_PERF_BASE (0xb0000000)
++#define BCM_6318_TIMER_BASE (0xb0000040)
++#define BCM_6318_WDT_BASE (0xb0000068)
++#define BCM_6318_UART0_BASE (0xb0000100)
++#define BCM_6318_UART1_BASE (0xdeadbeef)
++#define BCM_6318_GPIO_BASE (0xb0000080)
++#define BCM_6318_SPI_BASE (0xdeadbeef)
++#define BCM_6318_HSSPI_BASE (0xb0003000)
++#define BCM_6318_UDC0_BASE (0xdeadbeef)
++#define BCM_6318_USBDMA_BASE (0xb0006800)
++#define BCM_6318_OHCI0_BASE (0xb0005100)
++#define BCM_6318_OHCI_PRIV_BASE (0xdeadbeef)
++#define BCM_6318_USBH_PRIV_BASE (0xb0005200)
++#define BCM_6318_USBD_BASE (0xb0006000)
++#define BCM_6318_MPI_BASE (0xdeadbeef)
++#define BCM_6318_PCMCIA_BASE (0xdeadbeef)
++#define BCM_6318_PCIE_BASE (0xb0010000)
++#define BCM_6318_SDRAM_REGS_BASE (0xdeadbeef)
++#define BCM_6318_DSL_BASE (0xdeadbeef)
++#define BCM_6318_UBUS_BASE (0xdeadbeef)
++#define BCM_6318_ENET0_BASE (0xdeadbeef)
++#define BCM_6318_ENET1_BASE (0xdeadbeef)
++#define BCM_6318_ENETDMA_BASE (0xb0088000)
++#define BCM_6318_ENETDMAC_BASE (0xb0088200)
++#define BCM_6318_ENETDMAS_BASE (0xb0088400)
++#define BCM_6318_ENETSW_BASE (0xb0080000)
++#define BCM_6318_EHCI0_BASE (0xb0005000)
++#define BCM_6318_SDRAM_BASE (0xb0004000)
++#define BCM_6318_MEMC_BASE (0xdeadbeef)
++#define BCM_6318_DDR_BASE (0xdeadbeef)
++#define BCM_6318_M2M_BASE (0xdeadbeef)
++#define BCM_6318_ATM_BASE (0xdeadbeef)
++#define BCM_6318_XTM_BASE (0xdeadbeef)
++#define BCM_6318_XTMDMA_BASE (0xb000c000)
++#define BCM_6318_XTMDMAC_BASE (0xdeadbeef)
++#define BCM_6318_XTMDMAS_BASE (0xdeadbeef)
++#define BCM_6318_PCM_BASE (0xdeadbeef)
++#define BCM_6318_PCMDMA_BASE (0xdeadbeef)
++#define BCM_6318_PCMDMAC_BASE (0xdeadbeef)
++#define BCM_6318_PCMDMAS_BASE (0xdeadbeef)
++#define BCM_6318_RNG_BASE (0xdeadbeef)
++#define BCM_6318_MISC_BASE (0xb0000280)
++#define BCM_6318_OTP_BASE (0xdeadbeef)
++
++#define BCM_6318_STRAP_BASE (0xb0000900)
++
++/*
+ * 6328 register sets base address
+ */
+ #define BCM_6328_DSL_LMEM_BASE (0xdeadbeef)
+@@ -775,6 +833,55 @@ enum bcm63xx_irq {
+ #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
+ #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
+
++/*
++ * 6318 irqs
++ */
++#define BCM_6318_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
++#define BCM_6318_VERY_HIGH_IRQ_BASE (BCM_6318_HIGH_IRQ_BASE + 32)
++
++#define BCM_6318_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
++#define BCM_6318_SPI_IRQ 0
++#define BCM_6318_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
++#define BCM_6318_UART1_IRQ 0
++#define BCM_6318_DSL_IRQ (IRQ_INTERNAL_BASE + 21)
++#define BCM_6318_UDC0_IRQ 0
++#define BCM_6318_ENET0_IRQ 0
++#define BCM_6318_ENET1_IRQ 0
++#define BCM_6318_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
++#define BCM_6318_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
++#define BCM_6318_OHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 9)
++#define BCM_6318_EHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 10)
++#define BCM_6318_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
++#define BCM_6318_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
++#define BCM_6318_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
++#define BCM_6318_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
++#define BCM_6318_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
++#define BCM_6318_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
++#define BCM_6318_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
++#define BCM_6318_PCMCIA_IRQ 0
++#define BCM_6318_ENET0_RXDMA_IRQ 0
++#define BCM_6318_ENET0_TXDMA_IRQ 0
++#define BCM_6318_ENET1_RXDMA_IRQ 0
++#define BCM_6318_ENET1_TXDMA_IRQ 0
++#define BCM_6318_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
++#define BCM_6318_ATM_IRQ 0
++#define BCM_6318_ENETSW_RXDMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 0)
++#define BCM_6318_ENETSW_RXDMA1_IRQ (BCM_6318_HIGH_IRQ_BASE + 1)
++#define BCM_6318_ENETSW_RXDMA2_IRQ (BCM_6318_HIGH_IRQ_BASE + 2)
++#define BCM_6318_ENETSW_RXDMA3_IRQ (BCM_6318_HIGH_IRQ_BASE + 3)
++#define BCM_6318_ENETSW_TXDMA0_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 10)
++#define BCM_6318_ENETSW_TXDMA1_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 11)
++#define BCM_6318_ENETSW_TXDMA2_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 12)
++#define BCM_6318_ENETSW_TXDMA3_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 13)
++#define BCM_6318_XTM_IRQ (BCM_6318_HIGH_IRQ_BASE + 31)
++#define BCM_6318_XTM_DMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 11)
++
++#define BCM_6318_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
++#define BCM_6318_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
++#define BCM_6318_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
++#define BCM_6318_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
++#define BCM_6318_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
++#define BCM_6318_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
+
+ /*
+ * 6328 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -53,6 +53,39 @@
+ CKCTL_3368_EMUSB_EN | \
+ CKCTL_3368_USBU_EN)
+
++#define CKCTL_6318_ADSL_ASB_EN (1 << 0)
++#define CKCTL_6318_USB_ASB_EN (1 << 1)
++#define CKCTL_6318_MIPS_ASB_EN (1 << 2)
++#define CKCTL_6318_PCIE_ASB_EN (1 << 3)
++#define CKCTL_6318_PHYMIPS_ASB_EN (1 << 4)
++#define CKCTL_6318_ROBOSW_ASB_EN (1 << 5)
++#define CKCTL_6318_SAR_ASB_EN (1 << 6)
++#define CKCTL_6318_SDR_ASB_EN (1 << 7)
++#define CKCTL_6318_SWREG_ASB_EN (1 << 8)
++#define CKCTL_6318_PERIPH_ASB_EN (1 << 9)
++#define CKCTL_6318_CPUBUS160_EN (1 << 10)
++#define CKCTL_6318_ADSL_EN (1 << 11)
++#define CKCTL_6318_SAR125_EN (1 << 12)
++#define CKCTL_6318_MIPS_EN (1 << 13)
++#define CKCTL_6318_PCIE_EN (1 << 14)
++#define CKCTL_6318_ROBOSW250_EN (1 << 16)
++#define CKCTL_6318_ROBOSW025_EN (1 << 17)
++#define CKCTL_6318_SDR_EN (1 << 19)
++#define CKCTL_6318_USB_EN (1 << 20) /* both device and host */
++#define CKCTL_6318_HSSPI_EN (1 << 25)
++#define CKCTL_6318_PCIE25_EN (1 << 27)
++#define CKCTL_6318_PHYMIPS_EN (1 << 28)
++#define CKCTL_6318_ADSL_AFE_EN (1 << 29)
++#define CKCTL_6318_ADSL_QPROC_EN (1 << 30)
++
++#define CKCTL_6318_ALL_SAFE_EN (CKCTL_6318_PHYMIPS_EN | \
++ CKCTL_6318_ADSL_QPROC_EN | \
++ CKCTL_6318_ADSL_AFE_EN | \
++ CKCTL_6318_ADSL_EN | \
++ CKCTL_6318_SAR_EN | \
++ CKCTL_6318_USB_EN | \
++ CKCTL_6318_PCIE_EN)
++
+ #define CKCTL_6328_PHYMIPS_EN (1 << 0)
+ #define CKCTL_6328_ADSL_QPROC_EN (1 << 1)
+ #define CKCTL_6328_ADSL_AFE_EN (1 << 2)
+@@ -260,12 +293,27 @@
+ CKCTL_63268_TBUS_EN | \
+ CKCTL_63268_ROBOSW250_EN)
+
++/* UBUS Clock Control register */
++#define PERF_UB_CKCTL_REG 0x10
++
++#define UB_CKCTL_6318_ADSL_EN (1 << 0)
++#define UB_CKCTL_6318_ARB_EN (1 << 1)
++#define UB_CKCTL_6318_MIPS_EN (1 << 2)
++#define UB_CKCTL_6318_PCIE_EN (1 << 3)
++#define UB_CKCTL_6318_PERIPH_EN (1 << 4)
++#define UB_CKCTL_6318_PHYMIPS_EN (1 << 5)
++#define UB_CKCTL_6318_ROBOSW_EN (1 << 6)
++#define UB_CKCTL_6318_SAR_EN (1 << 7)
++#define UB_CKCTL_6318_SDR_EN (1 << 8)
++#define UB_CKCTL_6318_USB_EN (1 << 9)
++
+ /* System PLL Control register */
+ #define PERF_SYS_PLL_CTL_REG 0x8
+ #define SYS_PLL_SOFT_RESET 0x1
+
+ /* Interrupt Mask register */
+ #define PERF_IRQMASK_3368_REG 0xc
++#define PERF_IRQMASK_6318_REG 0x20
+ #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6338_REG 0xc
+ #define PERF_IRQMASK_6345_REG 0xc
+@@ -277,6 +325,7 @@
+
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG 0x10
++#define PERF_IRQSTAT_6318_REG 0x30
+ #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6338_REG 0x10
+ #define PERF_IRQSTAT_6345_REG 0x10
+@@ -288,6 +337,7 @@
+
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368 0x14
++#define PERF_EXTIRQ_CFG_REG_6318 0x18
+ #define PERF_EXTIRQ_CFG_REG_6328 0x18
+ #define PERF_EXTIRQ_CFG_REG_6338 0x14
+ #define PERF_EXTIRQ_CFG_REG_6345 0x14
+@@ -322,6 +372,7 @@
+
+ /* Soft Reset register */
+ #define PERF_SOFTRESET_REG 0x28
++#define PERF_SOFTRESET_6318_REG 0x10
+ #define PERF_SOFTRESET_6328_REG 0x10
+ #define PERF_SOFTRESET_6358_REG 0x34
+ #define PERF_SOFTRESET_6362_REG 0x10
+@@ -335,6 +386,18 @@
+ #define SOFTRESET_3368_USBS_MASK (1 << 11)
+ #define SOFTRESET_3368_PCM_MASK (1 << 13)
+
++#define SOFTRESET_6318_SPI_MASK (1 << 0)
++#define SOFTRESET_6318_EPHY_MASK (1 << 1)
++#define SOFTRESET_6318_SAR_MASK (1 << 2)
++#define SOFTRESET_6318_ENETSW_MASK (1 << 3)
++#define SOFTRESET_6318_USBS_MASK (1 << 4)
++#define SOFTRESET_6318_USBH_MASK (1 << 5)
++#define SOFTRESET_6318_PCIE_CORE_MASK (1 << 6)
++#define SOFTRESET_6318_PCIE_MASK (1 << 7)
++#define SOFTRESET_6318_PCIE_EXT_MASK (1 << 8)
++#define SOFTRESET_6318_PCIE_HARD_MASK (1 << 9)
++#define SOFTRESET_6318_ADSL_MASK (1 << 10)
++
+ #define SOFTRESET_6328_SPI_MASK (1 << 0)
+ #define SOFTRESET_6328_EPHY_MASK (1 << 1)
+ #define SOFTRESET_6328_SAR_MASK (1 << 2)
+@@ -506,8 +569,17 @@
+ #define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9)
+ #define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10)
+
++#define TIMER_IRQMASK_6318_REG 0x0
++#define TIMER_IRQSTAT_6318_REG 0x4
++#define IRQSTATMASK_TIMER0 (1 << 0)
++#define IRQSTATMASK_TIMER1 (1 << 1)
++#define IRQSTATMASK_TIMER2 (1 << 2)
++#define IRQSTATMASK_TIMER3 (1 << 3)
++#define IRQSTATMASK_WDT (1 << 4)
++
+ /* Timer control register */
+ #define TIMER_CTLx_REG(x) (0x4 + (x * 4))
++#define TIMER_CTRx_6318_REG(x) (0x8 + (x * 4))
+ #define TIMER_CTL0_REG 0x4
+ #define TIMER_CTL1_REG 0x8
+ #define TIMER_CTL2_REG 0xC
+@@ -1254,6 +1326,8 @@
+ #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT)
+ #define SDRAM_CFG_BANK_SHIFT 13
+ #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
++#define SDRAM_CFG_6318_SPACE_SHIFT 4
++#define SDRAM_CFG_6318_SPACE_MASK (0xf << SDRAM_CFG_6318_SPACE_SHIFT)
+
+ #define SDRAM_MBASE_REG 0xc
+
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -23,6 +23,7 @@ static inline int is_bcm63xx_internal_re
+ if (offset >= 0xfff00000)
+ return 1;
+ break;
++ case BCM6318_CPU_ID:
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
+ case BCM6368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs
+
+ int __init bcm63xx_hsspi_register(void)
+ {
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++ !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-usb-usbd.c
++++ b/arch/mips/bcm63xx/dev-usb-usbd.c
+@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s
+ IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
+ int i;
+
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368())
+ return 0;
+
+ usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -176,8 +176,8 @@ static int __init register_shared(void)
+ else
+ shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
+- BCMCPU_IS_63268())
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++ BCMCPU_IS_6368() || BCMCPU_IS_63268())
+ chan_count = 32;
+ else if (BCMCPU_IS_6345())
+ chan_count = 8;
+@@ -285,8 +285,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ int ret;
+
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
+- !BCMCPU_IS_63268())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++ !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ ret = register_shared();
+@@ -303,7 +303,7 @@ bcm63xx_enetsw_register(const struct bcm
+
+ memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
+
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328())
+ enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ enetsw_pd.num_ports = ENETSW_PORTS_6368;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -10,6 +10,8 @@ int __init bcm63xx_gpio_init(void);
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+ switch (bcm63xx_get_cpu_id()) {
++ case BCM6318_CPU_ID:
++ return 50;
+ case BCM6328_CPU_ID:
+ return 32;
+ case BCM3368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh
+
+ int __init bcm63xx_ehci_register(void)
+ {
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
+ return 0;
+
+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
--- /dev/null
+From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 14:17:50 +0100
+Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals
+
+---
+ arch/mips/bcm63xx/reset.c | 39 ++++++++++++++--------
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++
+ arch/mips/pci/pci-bcm63xx.c | 7 ++++
+ 3 files changed, 34 insertions(+), 14 deletions(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -29,7 +29,9 @@
+ [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \
+ [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \
+ [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \
+- [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT,
++ [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \
++ [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \
++ [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD,
+
+ #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK
+ #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK
+@@ -43,6 +45,8 @@
+ #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK
+ #define BCM3368_RESET_PCIE 0
+ #define BCM3368_RESET_PCIE_EXT 0
++#define BCM3368_RESET_PCIE_CORE 0
++#define BCM3368_RESET_PCIE_HARD 0
+
+
+ #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
+@@ -55,11 +59,10 @@
+ #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
+ #define BCM6318_RESET_PCM 0
+ #define BCM6318_RESET_MPI 0
+-#define BCM6318_RESET_PCIE \
+- (SOFTRESET_6318_PCIE_MASK | \
+- SOFTRESET_6318_PCIE_CORE_MASK | \
+- SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK
+ #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
++#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK
++#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK
+
+ #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET 0
+@@ -71,11 +74,10 @@
+ #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK
+ #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK
+ #define BCM6328_RESET_MPI 0
+-#define BCM6328_RESET_PCIE \
+- (SOFTRESET_6328_PCIE_MASK | \
+- SOFTRESET_6328_PCIE_CORE_MASK | \
+- SOFTRESET_6328_PCIE_HARD_MASK)
++#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK
+ #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK
++#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK
++#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK
+
+ #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK
+ #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK
+@@ -89,6 +91,8 @@
+ #define BCM6338_RESET_MPI 0
+ #define BCM6338_RESET_PCIE 0
+ #define BCM6338_RESET_PCIE_EXT 0
++#define BCM6338_RESET_PCIE_CORE 0
++#define BCM6338_RESET_PCIE_HARD 0
+
+ #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK
+ #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK
+@@ -102,6 +106,8 @@
+ #define BCM6348_RESET_MPI 0
+ #define BCM6348_RESET_PCIE 0
+ #define BCM6348_RESET_PCIE_EXT 0
++#define BCM6348_RESET_PCIE_CORE 0
++#define BCM6348_RESET_PCIE_HARD 0
+
+ #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK
+ #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK
+@@ -115,6 +121,8 @@
+ #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK
+ #define BCM6358_RESET_PCIE 0
+ #define BCM6358_RESET_PCIE_EXT 0
++#define BCM6358_RESET_PCIE_CORE 0
++#define BCM6358_RESET_PCIE_HARD 0
+
+ #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK
+ #define BCM6362_RESET_ENET 0
+@@ -126,9 +134,10 @@
+ #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK
+ #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK
+ #define BCM6362_RESET_MPI 0
+-#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \
+- SOFTRESET_6362_PCIE_CORE_MASK)
++#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK
+ #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK
++#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK
++#define BCM6362_RESET_PCIE_HARD 0
+
+ #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK
+ #define BCM6368_RESET_ENET 0
+@@ -142,6 +151,8 @@
+ #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK
+ #define BCM6368_RESET_PCIE 0
+ #define BCM6368_RESET_PCIE_EXT 0
++#define BCM6368_RESET_PCIE_CORE 0
++#define BCM6368_RESET_PCIE_HARD 0
+
+ #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
+ #define BCM63268_RESET_ENET 0
+@@ -153,10 +164,10 @@
+ #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
+ #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI 0
+-#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
+- SOFTRESET_63268_PCIE_CORE_MASK | \
+- SOFTRESET_63268_PCIE_HARD_MASK)
++#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK
+ #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
++#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK
++#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK
+
+ /*
+ * core reset bits
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
+@@ -15,6 +15,8 @@ enum bcm63xx_core_reset {
+ BCM63XX_RESET_MPI,
+ BCM63XX_RESET_PCIE,
+ BCM63XX_RESET_PCIE_EXT,
++ BCM63XX_RESET_PCIE_CORE,
++ BCM63XX_RESET_PCIE_HARD,
+ };
+
+ void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo
+
+ /* reset the PCIe core */
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++ if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) {
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
++ }
+ mdelay(10);
+
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
+ mdelay(10);
+
--- /dev/null
+From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:47:34 +0100
+Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
+
+---
+ arch/mips/bcm63xx/clk.c | 25 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 6 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 60 +++++++++++-
+ arch/mips/pci/ops-bcm63xx.c | 16 +++-
+ arch/mips/pci/pci-bcm63xx.c | 106 ++++++++++++++++++----
+ 5 files changed, 184 insertions(+), 29 deletions(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -52,6 +52,18 @@ static void bcm_hwclock_set(u32 mask, in
+ bcm_perf_writel(reg, PERF_CKCTL_REG);
+ }
+
++static void bcm_ub_hwclock_set(u32 mask, int enable)
++{
++ u32 reg;
++
++ reg = bcm_perf_readl(PERF_UB_CKCTL_REG);
++ if (enable)
++ reg |= mask;
++ else
++ reg &= ~mask;
++ bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
++}
++
+ /*
+ * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+ */
+@@ -362,12 +374,17 @@ static struct clk clk_ipsec = {
+
+ static void pcie_set(struct clk *clk, int enable)
+ {
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318()) {
++ bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable);
++ bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable);
++ bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable);
++ } else if (BCMCPU_IS_6328()) {
+ bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+- else if (BCMCPU_IS_6362())
++ } else if (BCMCPU_IS_6362()) {
+ bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
+- else if (BCMCPU_IS_63268())
++ } else if (BCMCPU_IS_63268()) {
+ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
++ }
+ }
+
+ static struct clk clk_pcie = {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -41,6 +41,12 @@
+ #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
+ BCM_CB_MEM_SIZE - 1)
+
++#define BCM_PCIE_MEM_BASE_PA_6318 0x10200000
++#define BCM_PCIE_MEM_SIZE_6318 (1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6318 (BCM_PCIE_MEM_BASE_PA_6318 + \
++ BCM_PCIE_MEM_SIZE_6318 - 1)
++
++
+ #define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
+ #define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1530,6 +1530,17 @@
+ * _REG relative to RSET_PCIE
+ *************************************************************************/
+
++#define PCIE_SPECIFIC_REG 0x188
++#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT 0
++#define SPECIFIC_ENDIAN_MODE_BAR1_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT 2
++#define SPECIFIC_ENDIAN_MODE_BAR2_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT 4
++#define SPECIFIC_ENDIAN_MODE_BAR3_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN 0
++#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1
++#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN 2
++
+ #define PCIE_CONFIG2_REG 0x408
+ #define CONFIG2_BAR1_SIZE_EN 1
+ #define CONFIG2_BAR1_SIZE_MASK 0xf
+@@ -1575,7 +1586,54 @@
+ #define PCIE_RC_INT_C (1 << 2)
+ #define PCIE_RC_INT_D (1 << 3)
+
+-#define PCIE_DEVICE_OFFSET 0x8000
++#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG 0x400c
++#define C2P_MEM_WIN_ENDIAN_MODE_MASK 0x3
++#define C2P_MEM_WIN_ENDIAN_NO_SWAP 0
++#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1
++#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2
++#define C2P_MEM_WIN_BASE_ADDR_SHIFT 20
++#define C2P_MEM_WIN_BASE_ADDR_MASK (0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT)
++
++#define PCIE_RC_BAR1_CONFIG_LO_REG 0x402c
++#define RC_BAR_CFG_LO_SIZE_256MB 0xd
++#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT 20
++#define RC_BAR_CFG_LO_MATCH_ADDR_MASK (0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT)
++
++#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070
++#define C2P_BASELIMIT_LIMIT_SHIFT 20
++#define C2P_BASELIMIT_LIMIT_MASK (0xfff << C2P_BASELIMIT_LIMIT_SHIFT)
++#define C2P_BASELIMIT_BASE_SHIFT 4
++#define C2P_BASELIMIT_BASE_MASK (0xfff << C2P_BASELIMIT_BASE_SHIFT)
++
++#define PCIE_UBUS_BAR1_CFG_REMAP_REG 0x4088
++#define BAR1_CFG_REMAP_OFFSET_SHIFT 20
++#define BAR1_CFG_REMAP_OFFSET_MASK (0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT)
++#define BAR1_CFG_REMAP_ACCESS_EN 1
++
++#define PCIE_HARD_DEBUG_REG 0x4204
++#define HARD_DEBUG_SERDES_IDDQ (1 << 23)
++
++#define PCIE_CPU_INT1_MASK_CLEAR_REG 0x830c
++#define CPU_INT_PCIE_ERR_ATTN_CPU (1 << 0)
++#define CPU_INT_PCIE_INTA (1 << 1)
++#define CPU_INT_PCIE_INTB (1 << 2)
++#define CPU_INT_PCIE_INTC (1 << 3)
++#define CPU_INT_PCIE_INTD (1 << 4)
++#define CPU_INT_PCIE_INTR (1 << 5)
++#define CPU_INT_PCIE_NMI (1 << 6)
++#define CPU_INT_PCIE_UBUS (1 << 7)
++#define CPU_INT_IPI (1 << 8)
++
++#define PCIE_EXT_CFG_INDEX_REG 0x8400
++#define EXT_CFG_FUNC_NUM_SHIFT 12
++#define EXT_CFG_FUNC_NUM_MASK (0x7 << EXT_CFG_FUNC_NUM_SHIFT)
++#define EXT_CFG_DEV_NUM_SHIFT 15
++#define EXT_CFG_DEV_NUM_MASK (0xf << EXT_CFG_DEV_NUM_SHIFT)
++#define EXT_CFG_BUS_NUM_SHIFT 20
++#define EXT_CFG_BUS_NUM_MASK (0xff << EXT_CFG_BUS_NUM_SHIFT)
++
++#define PCIE_DEVICE_OFFSET_6318 0x9000
++#define PCIE_DEVICE_OFFSET_6328 0x8000
+
+ /*************************************************************************
+ * _REG relative to RSET_OTP
+--- a/arch/mips/pci/ops-bcm63xx.c
++++ b/arch/mips/pci/ops-bcm63xx.c
+@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
+ if (!bcm63xx_pcie_can_access(bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+- if (bus->number == PCIE_BUS_DEVICE)
+- reg += PCIE_DEVICE_OFFSET;
++ if (bus->number == PCIE_BUS_DEVICE) {
++ if (BCMCPU_IS_6318())
++ reg += PCIE_DEVICE_OFFSET_6318;
++ else
++ reg += PCIE_DEVICE_OFFSET_6328;
++ }
+
+ data = bcm_pcie_readl(reg);
+
+@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
+ if (!bcm63xx_pcie_can_access(bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+- if (bus->number == PCIE_BUS_DEVICE)
+- reg += PCIE_DEVICE_OFFSET;
++ if (bus->number == PCIE_BUS_DEVICE) {
++ if (BCMCPU_IS_6318())
++ reg += PCIE_DEVICE_OFFSET_6318;
++ else
++ reg += PCIE_DEVICE_OFFSET_6328;
++ }
+
+
+ data = bcm_pcie_readl(reg);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v
+
+ void __iomem *pci_iospace_start;
+
+-static void __init bcm63xx_reset_pcie(void)
++static void __init bcm63xx_reset_pcie_gen1(void)
+ {
+ u32 val;
+ u32 reg;
+@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo
+ mdelay(200);
+ }
+
+-static struct clk *pcie_clk;
+-
+-static int __init bcm63xx_register_pcie(void)
++static void __init bcm63xx_reset_pcie_gen2(void)
+ {
+ u32 val;
+
+- /* enable clock */
+- pcie_clk = clk_get(NULL, "pcie");
+- if (IS_ERR_OR_NULL(pcie_clk))
+- return -ENODEV;
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
+
+- clk_prepare_enable(pcie_clk);
++ /* reset the PCIe core */
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
++ mdelay(10);
++ val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG);
++ val &= ~HARD_DEBUG_SERDES_IDDQ;
++ bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
++ mdelay(200);
++}
+
+- bcm63xx_reset_pcie();
++static void __init bcm63xx_init_pcie_gen1(void)
++{
++ u32 val;
+
+ /* configure the PCIe bridge */
+ val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);
+@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie(
+ val |= OPT2_CFG_TYPE1_BD_SEL;
+ bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);
+
++ /* set bar0 to little endian */
++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
++ val |= BASEMASK_REMAP_EN;
++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
++
++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
++}
++
++static void __init bcm63xx_init_pcie_gen2(void)
++{
++ u32 val;
++
++ bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB |
++ CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD,
++ PCIE_CPU_INT1_MASK_CLEAR_REG);
++
++ val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK;
++ val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) <<
++ C2P_BASELIMIT_BASE_SHIFT;
++
++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG);
++
++ /* set bar0 to little endian */
++ val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++ val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK;
++ val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP;
++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++
++ bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG);
++ bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG);
++ bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG);
++
++ bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT,
++ PCIE_EXT_CFG_INDEX_REG);
++}
++
++static struct clk *pcie_clk;
++
++static int __init bcm63xx_register_pcie(void)
++{
++ u32 val;
++
++ /* enable clock */
++ pcie_clk = clk_get(NULL, "pcie");
++ if (IS_ERR_OR_NULL(pcie_clk))
++ return -ENODEV;
++
++ clk_prepare_enable(pcie_clk);
++
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++ bcm63xx_reset_pcie_gen1();
++ bcm63xx_init_pcie_gen1();
++ } else {
++ bcm63xx_reset_pcie_gen2();
++ bcm63xx_init_pcie_gen2();
++ }
++
+ /* setup class code as bridge */
+ val = bcm_pcie_readl(PCIE_IDVAL3_REG);
+ val &= ~IDVAL3_CLASS_CODE_MASK;
+@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie(
+ val &= ~CONFIG2_BAR1_SIZE_MASK;
+ bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+
+- /* set bar0 to little endian */
+- val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
+- val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+- val |= BASEMASK_REMAP_EN;
+- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+-
+- val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+-
+ register_pci_controller(&bcm63xx_pcie_controller);
+
+ return 0;
+@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void)
+ if (!bcm63xx_pci_enabled)
+ return -ENODEV;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++ if (BCMCPU_IS_6318()) {
++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318;
++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318;
++ } if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
+ } else if (BCMCPU_IS_63268()) {
+@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void)
+ }
+
+ switch (bcm63xx_get_cpu_id()) {
++ case BCM6318_CPU_ID:
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
+ case BCM63268_CPU_ID:
--- /dev/null
+From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 12:26:57 +0100
+Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
+ result
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 10 +++++++---
+ arch/mips/bcm63xx/prom.c | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 3 files changed, 13 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -22,6 +22,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+
++static int flash_type;
++
+ static struct mtd_partition mtd_partitions[] = {
+ {
+ .name = "cfe",
+@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
+ }
+ }
+
++void __init bcm63xx_flash_detect(void)
++{
++ flash_type = bcm63xx_detect_flash_type();
++}
++
+ int __init bcm63xx_flash_register(void)
+ {
+- int flash_type;
+ u32 val;
+
+- flash_type = bcm63xx_detect_flash_type();
+-
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
+ /* read base address of boot chip select (0) */
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -17,6 +17,7 @@
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_dev_flash.h>
+
+ void __init prom_init(void)
+ {
+@@ -52,6 +53,9 @@ void __init prom_init(void)
+ reg &= ~mask;
+ bcm_perf_writel(reg, PERF_CKCTL_REG);
+
++ /* detect and setup flash access */
++ bcm63xx_flash_detect();
++
+ /* do low level board init */
+ board_prom_init();
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -8,6 +8,8 @@ enum {
+ BCM63XX_FLASH_TYPE_NAND,
+ };
+
++void bcm63xx_flash_detect(void);
++
+ int __init bcm63xx_flash_register(void);
+
+ #endif /* __BCM63XX_FLASH_H */
--- /dev/null
+From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 13:25:25 +0100
+Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
+
+Some bootloaders leave the flash access in an invalid state with dual
+read enabled; fix it by disabling it and falling back to simple fast
+reads.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 51 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -16,6 +16,7 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
++#include <linux/mtd/spi-nor.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
+ }
+ }
+
++#define HSSPI_FLASH_CTRL_REG 0x14
++#define FLASH_CTRL_READ_OPCODE_MASK 0xff
++#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8)
++#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8)
++#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8)
++#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8)
++#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10
++#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
++#define FLASH_CTRL_MB_EN (1 << 23)
++
+ void __init bcm63xx_flash_detect(void)
+ {
+ flash_type = bcm63xx_detect_flash_type();
++
++ /* ensure flash mapping has sane values */
++ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
++ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++ BCMCPU_IS_63268())) {
++ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
++
++ if (val & FLASH_CTRL_MB_EN) {
++ /* cfe might configure non working dual-io mode */
++ val &= ~FLASH_CTRL_MB_EN;
++ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++
++ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
++ case FLASH_CTRL_ADDR_BYTES_3:
++ val |= SPINOR_OP_READ_FAST;
++ break;
++ case FLASH_CTRL_ADDR_BYTES_4:
++ val |= SPINOR_OP_READ_FAST_4B;
++ break;
++ case FLASH_CTRL_ADDR_BYTES_2:
++ default:
++ pr_warn("unsupported address byte mode (%x), not fixing up\n",
++ val & FLASH_CTRL_ADDR_BYTES_MASK);
++ return;
++ }
++ } else {
++ /* ensure dummy bytes is set to 1 for _FAST reads */
++ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
++
++ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ_FAST_4B)
++ return;
++
++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++ }
++
++ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
++ }
+ }
+
+ int __init bcm63xx_flash_register(void)
--- /dev/null
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -168,7 +168,11 @@ static struct clk clk_swpkt_usb = {
+ */
+ static void enetsw_set(struct clk *clk, int enable)
+ {
+- if (BCMCPU_IS_6328()) {
++ if (BCMCPU_IS_6318()) {
++ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
++ CKCTL_6318_ROBOSW025_EN, enable);
++ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
++ } else if (BCMCPU_IS_6328()) {
+ bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
+ } else if (BCMCPU_IS_6362()) {
+ bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
+@@ -220,18 +224,22 @@ static struct clk clk_pcm = {
+ */
+ static void usbh_set(struct clk *clk, int enable)
+ {
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318()) {
++ bcm_hwclock_set(CKCTL_6318_USB_EN, enable);
++ bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable);
++ } else if (BCMCPU_IS_6328()) {
+ bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
+- else if (BCMCPU_IS_6348())
++ } else if (BCMCPU_IS_6348()) {
+ bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
+- else if (BCMCPU_IS_6362())
++ } else if (BCMCPU_IS_6362()) {
+ bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+- else if (BCMCPU_IS_6368())
++ } else if (BCMCPU_IS_6368()) {
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+- else if (BCMCPU_IS_63268())
++ } else if (BCMCPU_IS_63268()) {
+ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+- else
++ } else {
+ return;
++ }
+
+ if (enable)
+ msleep(100);
--- /dev/null
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_6318()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ }
+
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_6318()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ }
+
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -682,6 +682,12 @@
+ #define GPIO_MODE_6368_SPI_SSN4 (1 << 30)
+ #define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
+
++#define GPIO_PINMUX_SEL0_6318 0x1c
++#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26
++#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
+
+ #define GPIO_PINMUX_OTHR_REG 0x24
+ #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
+@@ -1000,6 +1006,7 @@
+
+ #define USBH_PRIV_SWAP_6358_REG 0x0
+ #define USBH_PRIV_SWAP_6368_REG 0x1c
++#define USBH_PRIV_SWAP_6318_REG 0x0c
+
+ #define USBH_PRIV_SWAP_USBD_SHIFT 6
+ #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
+@@ -1025,6 +1032,13 @@
+ #define USBH_PRIV_SETUP_IOC_SHIFT 4
+ #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
+
++#define USBH_PRIV_SETUP_6318_REG 0x00
++#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
++#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
++#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
++#define USBH_PRIV_SIM_CTRL_6318_REG 0x20
++#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
++
+
+ /*************************************************************************
+ * _REG relative to RSET_USBD
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -125,6 +125,15 @@ void __init board_early_setup(const stru
+ }
+
+ bcm_gpio_writel(val, GPIO_MODE_REG);
++
++#if IS_ENABLED(CONFIG_USB)
++ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
++ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
++ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
++ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
++ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
++ }
++#endif
+ }
+
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -23,6 +23,8 @@ config BCM63XX_CPU_6318
+ bool "support 6318 CPU"
+ select SYS_HAS_CPU_BMIPS32_3300
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -587,6 +587,9 @@
+ #define TIMER_CTL_MONOTONIC_MASK (1 << 30)
+ #define TIMER_CTL_ENABLE_MASK (1 << 31)
+
++/* Clock reset control (63268 only) */
++#define TIMER_CLK_RST_CTL_REG 0x2c
++#define CLK_RST_CTL_USB_REF_CLK_EN (1 << 18)
+
+ /*************************************************************************
+ * _REG relative to RSET_WDT
+@@ -1534,6 +1537,11 @@
+ #define STRAPBUS_63268_FCVO_SHIFT 21
+ #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
+
++#define MISC_IDDQ_CTRL_6328_REG 0x48
++#define MISC_IDDQ_CTRL_63268_REG 0x4c
++
++#define IDDQ_CTRL_63268_USBH (1 << 4)
++
+ #define MISC_STRAPBUS_6328_REG 0x240
+ #define STRAPBUS_6328_FCVO_SHIFT 7
+ #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -64,6 +64,26 @@ static void bcm_ub_hwclock_set(u32 mask,
+ bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
+ }
+
++static void bcm_misc_iddq_set(u32 mask, int enable)
++{
++ u32 offset;
++ u32 reg;
++
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++ offset = MISC_IDDQ_CTRL_6328_REG;
++ else if (BCMCPU_IS_63268())
++ offset = MISC_IDDQ_CTRL_63268_REG;
++ else
++ return;
++
++ reg = bcm_misc_readl(offset);
++ if (enable)
++ reg &= ~mask;
++ else
++ reg |= mask;
++ bcm_misc_writel(reg, offset);
++}
++
+ /*
+ * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+ */
+@@ -236,7 +256,17 @@ static void usbh_set(struct clk *clk, in
+ } else if (BCMCPU_IS_6368()) {
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+ } else if (BCMCPU_IS_63268()) {
++ u32 reg;
++
+ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
++ bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
++ bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
++ reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
++ if (enable)
++ reg |= CLK_RST_CTL_USB_REF_CLK_EN;
++ else
++ reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
++ bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
+ } else {
+ return;
+ }
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1034,11 +1034,18 @@
+ #define USBH_PRIV_SETUP_6368_REG 0x28
+ #define USBH_PRIV_SETUP_IOC_SHIFT 4
+ #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
++#define USBH_PRIV_SETUP_IPP_SHIFT 5
++#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT)
+
+ #define USBH_PRIV_SETUP_6318_REG 0x00
++#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18
+ #define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
+-#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
+-#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
++
++#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27)
++#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31)
++#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9)
++#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10)
++
+ #define USBH_PRIV_SIM_CTRL_6318_REG 0x20
+ #define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -73,6 +73,8 @@ config BCM63XX_CPU_63268
+ bool "support 63268 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
+ int __init bcm63xx_ehci_register(void)
+ {
+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+- !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ return 0;
+
+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_63268()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ } else if (BCMCPU_IS_6318()) {
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
+@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_63268()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ } else if (BCMCPU_IS_6318()) {
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -40,6 +40,7 @@ struct board_info {
+
+ /* USB config */
+ struct bcm63xx_usbd_platform_data usbd;
++ unsigned int num_usbh_ports:2;
+
+ /* GPIO LEDs */
+ struct gpio_led leds[5];
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_EHCI_H_
+ #define BCM63XX_DEV_USB_EHCI_H_
+
+-int bcm63xx_ehci_register(void);
++int bcm63xx_ehci_register(unsigned int num_ports);
+
+ #endif /* BCM63XX_DEV_USB_EHCI_H_ */
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_OHCI_H_
+ #define BCM63XX_DEV_USB_OHCI_H_
+
+-int bcm63xx_ohci_register(void);
++int bcm63xx_ohci_register(unsigned int num_ports);
+
+ #endif /* BCM63XX_DEV_USB_OHCI_H_ */
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -165,6 +165,8 @@ static struct platform_device bcm63xx_gp
+ */
+ int __init board_register_devices(void)
+ {
++ int usbh_ports = 0;
++
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+
+@@ -186,14 +188,21 @@ int __init board_register_devices(void)
+ !board_get_mac_address(board.enetsw.mac_addr))
+ bcm63xx_enetsw_register(&board.enetsw);
+
++ if ((board.has_ohci0 || board.has_ehci0)) {
++ usbh_ports = board.num_usbh_ports;
++
++ if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd))
++ usbh_ports = 1;
++ }
++
+ if (board.has_usbd)
+ bcm63xx_usbd_register(&board.usbd);
+
+ if (board.has_ehci0)
+- bcm63xx_ehci_register();
++ bcm63xx_ehci_register(usbh_ports);
+
+ if (board.has_ohci0)
+- bcm63xx_ohci_register();
++ bcm63xx_ohci_register(usbh_ports);
+
+ /* Generate MAC address for WLAN and register our SPROM,
+ * do this after registering enet devices
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh
+ },
+ };
+
+-int __init bcm63xx_ehci_register(void)
++int __init bcm63xx_ehci_register(unsigned int num_ports)
+ {
+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ return 0;
+
++ bcm63xx_ehci_pdata.num_ports = num_ports;
++
+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+ ehci_resources[0].end = ehci_resources[0].start;
+ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
+--- a/arch/mips/bcm63xx/dev-usb-ohci.c
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc
+ .big_endian_desc = 1,
+ .big_endian_mmio = 1,
+ .no_big_frame_no = 1,
+- .num_ports = 1,
+ .power_on = bcm63xx_ohci_power_on,
+ .power_off = bcm63xx_ohci_power_off,
+ .power_suspend = bcm63xx_ohci_power_off,
+@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh
+ },
+ };
+
+-int __init bcm63xx_ohci_register(void)
++int __init bcm63xx_ohci_register(unsigned int num_ports)
+ {
+ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
+ return -ENODEV;
+
++ bcm63xx_ohci_pdata.num_ports = num_ports;
++
+ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
+ ohci_resources[0].end = ohci_resources[0].start;
+ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -576,6 +576,7 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
+
+ .leds = {
+ {
--- /dev/null
+From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Jun 2014 12:47:49 +0200
+Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one
+ board type
+
+Use the arguments passed to the kernel to detect being booted with
+CFE as the indicator for bcm963xx board support, allowing the
+non presence of CFE_EPTSEAL to assume a different board type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig | 7 +++----
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/boards/board_common.c | 13 +++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h | 6 ++++++
+ 4 files changed, 23 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -1,12 +1,11 @@
+ # SPDX-License-Identifier: GPL-2.0
+-choice
+- prompt "Board support"
++menu "Board support"
+ depends on BCM63XX
+- default BOARD_BCM963XX
+
+ config BOARD_BCM963XX
+ bool "Generic Broadcom 963xx boards"
+ select SSB
++ default y
+ help
+
+-endchoice
++endmenu
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -686,7 +686,7 @@ static const struct board_info __initcon
+ /*
+ * early init callback, read nvram data from flash and checksum it
+ */
+-void __init board_prom_init(void)
++void __init board_bcm963xx_init(void)
+ {
+ unsigned int i;
+ u8 *boot_addr, *cfe;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -13,6 +13,8 @@
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
++#include <asm/bootinfo.h>
++#include <asm/fw/cfe/cfe_api.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -30,6 +32,8 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+
++#include "board_common.h"
++
+ #define PFX "board: "
+
+ static struct board_info board;
+@@ -80,6 +84,15 @@ const char *board_get_name(void)
+ return board.name;
+ }
+
++void __init board_prom_init(void)
++{
++ /* detect bootloader */
++ if (fw_arg3 == CFE_EPTSEAL)
++ board_bcm963xx_init();
++ else
++ panic("unsupported bootloader detected");
++}
++
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+
+ /*
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -6,4 +6,10 @@
+ void board_early_setup(const struct board_info *board,
+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
+
++#if defined(CONFIG_BOARD_BCM963XX)
++void board_bcm963xx_init(void);
++#else
++static inline void board_bcm963xx_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
--- /dev/null
+From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:28:14 +0100
+Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
+ flash address
+
+Allow board implementations to force the physmap address.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++-----
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 2 files changed, 16 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
+ },
+ };
+
++void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
++{
++ mtd_resources[0].start = start;
++ mtd_resources[0].end = end;
++}
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ u32 val;
+@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void)
+
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
+- /* read base address of boot chip select (0) */
+- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+- val &= MPI_CSBASE_BASE_MASK;
+
+- mtd_resources[0].start = val;
+- mtd_resources[0].end = 0x1FFFFFFF;
++ if (!mtd_resources[0].start) {
++ /* read base address of boot chip select (0) */
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++
++ mtd_resources[0].start = val;
++ mtd_resources[0].end = 0x1FFFFFFF;
++ }
+
+ return platform_device_register(&mtd_dev);
+ case BCM63XX_FLASH_TYPE_SERIAL:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -10,6 +10,8 @@ enum {
+
+ void bcm63xx_flash_detect(void);
+
++void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
++
+ int __init bcm63xx_flash_register(void);
+
+ #endif /* __BCM63XX_FLASH_H */
--- /dev/null
+From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:31:12 +0200
+Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own
+ unit
+
+In preparation for enhancing it, move it into its own file. Require a
+mac address to be passed as the argument to always "reserve" the mac
+regardless of the inclusion state of SSB.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/boards/board_common.c | 53 ++--------------
+ arch/mips/bcm63xx/sprom.c | 70 ++++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 ++
+ 4 files changed, 83 insertions(+), 48 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/sprom.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,8 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
++ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
++ sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -39,44 +39,6 @@
+ static struct board_info board;
+
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+- .revision = 0x02,
+- .board_rev = 0x17,
+- .country_code = 0x0,
+- .ant_available_bg = 0x3,
+- .pa0b0 = 0x15ae,
+- .pa0b1 = 0xfa85,
+- .pa0b2 = 0xfe8d,
+- .pa1b0 = 0xffff,
+- .pa1b1 = 0xffff,
+- .pa1b2 = 0xffff,
+- .gpio0 = 0xff,
+- .gpio1 = 0xff,
+- .gpio2 = 0xff,
+- .gpio3 = 0xff,
+- .maxpwr_bg = 0x004c,
+- .itssi_bg = 0x00,
+- .boardflags_lo = 0x2848,
+- .boardflags_hi = 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+- if (bus->bustype == SSB_BUSTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+- return 0;
+- } else {
+- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+- return -EINVAL;
+- }
+-}
+-#endif
+-
+-/*
+ * return board name for /proc/cpuinfo
+ */
+ const char *board_get_name(void)
+@@ -179,6 +141,7 @@ static struct platform_device bcm63xx_gp
+ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
++ u8 mac[ETH_ALEN];
+
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+@@ -220,15 +183,10 @@ int __init board_register_devices(void)
+ /* Generate MAC address for WLAN and register our SPROM,
+ * do this after registering enet devices
+ */
+-#ifdef CONFIG_SSB_PCIHOST
+- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- if (ssb_arch_register_fallback_sprom(
+- &bcm63xx_get_fallback_sprom) < 0)
+- pr_err(PFX "failed to register fallback SPROM\n");
+- }
+-#endif
++
++ if (board_get_mac_address(mac) ||
++ bcm63xx_register_fallback_sprom(mac))
++ pr_err(PFX "failed to register fallback SPROM\n");
+
+ bcm63xx_spi_register();
+
+--- /dev/null
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -0,0 +1,70 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <bcm63xx_fallback_sprom.h>
++#include <board_bcm963xx.h>
++
++#define PFX "sprom: "
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++ .revision = 0x02,
++ .board_rev = 0x17,
++ .country_code = 0x0,
++ .ant_available_bg = 0x3,
++ .pa0b0 = 0x15ae,
++ .pa0b1 = 0xfa85,
++ .pa0b2 = 0xfe8d,
++ .pa1b0 = 0xffff,
++ .pa1b1 = 0xffff,
++ .pa1b2 = 0xffff,
++ .gpio0 = 0xff,
++ .gpio1 = 0xff,
++ .gpio2 = 0xff,
++ .gpio3 = 0xff,
++ .maxpwr_bg = 0x004c,
++ .itssi_bg = 0x00,
++ .boardflags_lo = 0x2848,
++ .boardflags_hi = 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++ if (bus->bustype == SSB_BUSTYPE_PCI) {
++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ return 0;
++ } else {
++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++ return -EINVAL;
++ }
++}
++#endif
++
++int __init bcm63xx_register_fallback_sprom(u8 *mac)
++{
++ int ret = 0;
++
++#ifdef CONFIG_SSB_PCIHOST
++ memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++
++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#endif
++ return ret;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -0,0 +1,6 @@
++#ifndef __BCM63XX_FALLBACK_SPROM
++#define __BCM63XX_FALLBACK_SPROM
++
++int bcm63xx_register_fallback_sprom(u8 *mac);
++
++#endif
--- /dev/null
+From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:43:49 +0200
+Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom
+
+Similar to ethernet setup, use a platform data struct for passing
+the mac. This eliminates the requirement to allocate an array on
+stack for the mac passed.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c | 6 ++----
+ arch/mips/bcm63xx/sprom.c | 8 ++++----
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 4 ++++
+ 4 files changed, 17 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -141,7 +141,6 @@ static struct platform_device bcm63xx_gp
+ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
+- u8 mac[ETH_ALEN];
+
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+@@ -184,8 +183,8 @@ int __init board_register_devices(void)
+ * do this after registering enet devices
+ */
+
+- if (board_get_mac_address(mac) ||
+- bcm63xx_register_fallback_sprom(mac))
++ if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++ bcm63xx_register_fallback_sprom(&board.fallback_sprom))
+ pr_err(PFX "failed to register fallback SPROM\n");
+
+ bcm63xx_spi_register();
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss
+ }
+ #endif
+
+-int __init bcm63xx_register_fallback_sprom(u8 *mac)
++int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ int ret = 0;
+
+ #ifdef CONFIG_SSB_PCIHOST
+- memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+
+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -1,6 +1,12 @@
+ #ifndef __BCM63XX_FALLBACK_SPROM
+ #define __BCM63XX_FALLBACK_SPROM
+
+-int bcm63xx_register_fallback_sprom(u8 *mac);
++#include <linux/if_ether.h>
++
++struct fallback_sprom_data {
++ u8 mac_addr[ETH_ALEN];
++};
++
++int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -7,6 +7,7 @@
+ #include <linux/leds.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
++#include <bcm63xx_fallback_sprom.h>
+
+ /*
+ * flash mapping
+@@ -50,6 +51,9 @@ struct board_info {
+
+ /* External PHY reset GPIO flags from gpio.h */
+ unsigned long ephy_reset_gpio_flags;
++
++ /* fallback sprom config */
++ struct fallback_sprom_data fallback_sprom;
+ };
+
+ #endif /* ! BOARD_BCM963XX_H_ */
--- /dev/null
+From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:52:56 +0200
+Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional
+
+Some devices do not provide enough mac addresses to populate wifi in
+addition to ethernet.
+
+Use having pci enabled as a rough heuristic which boards should have it
+enabled.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 12 ++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c | 5 +++--
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 1 +
+ 3 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -70,6 +70,7 @@ static struct board_info __initdata boar
+ .has_uart0 = 1,
+ .has_pci = 1,
+ .has_usbd = 0,
++ .use_fallback_sprom = 1,
+
+ .usbd = {
+ .use_fullspeed = 0,
+@@ -219,6 +220,7 @@ static struct board_info __initdata boar
+ .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -264,6 +266,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -316,6 +319,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -370,6 +374,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -420,6 +425,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -443,6 +449,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -461,6 +468,7 @@ static struct board_info __initdata boar
+
+ .has_uart0 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+@@ -483,6 +491,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -509,6 +518,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -561,6 +571,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -632,6 +643,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -183,8 +183,9 @@ int __init board_register_devices(void)
+ * do this after registering enet devices
+ */
+
+- if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
+- bcm63xx_register_fallback_sprom(&board.fallback_sprom))
++ if (board.use_fallback_sprom &&
++ (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++ bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
+ pr_err(PFX "failed to register fallback SPROM\n");
+
+ bcm63xx_spi_register();
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -33,6 +33,7 @@ struct board_info {
+ unsigned int has_usbd:1;
+ unsigned int has_uart0:1;
+ unsigned int has_uart1:1;
++ unsigned int use_fallback_sprom:1;
+
+ /* ethernet config */
+ struct bcm63xx_enet_platform_data enet0;
--- /dev/null
+From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:58:38 +0200
+Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom
+
+Different chips require different sprom contents, so prepare for
+supplying the appropriate sprom type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 13 ++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 5 +++++
+ 2 files changed, 17 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -22,7 +22,7 @@
+ * bcm4318 WLAN work
+ */
+ #ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
++static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ .revision = 0x02,
+ .board_rev = 0x17,
+ .country_code = 0x0,
+@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom =
+ .boardflags_hi = 0x0000,
+ };
+
++static struct ssb_sprom bcm63xx_sprom;
++
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
+@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr
+ int ret = 0;
+
+ #ifdef CONFIG_SSB_PCIHOST
++ switch (data->type) {
++ case SPROM_DEFAULT:
++ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
++ sizeof(bcm63xx_sprom));
++ break;
++ default:
++ return -EINVAL;
++ }
++
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -3,8 +3,13 @@
+
+ #include <linux/if_ether.h>
+
++enum sprom_type {
++ SPROM_DEFAULT, /* default fallback sprom */
++};
++
+ struct fallback_sprom_data {
+ u8 mac_addr[ETH_ALEN];
++ enum sprom_type type;
+ };
+
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
--- /dev/null
+From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:16:36 +0200
+Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
+
+Allow using raw sprom content as templates.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 482 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss
+ return -EINVAL;
+ }
+ }
++
++/* FIXME: use lib_sprom after submission upstream */
++
++/* Get the word-offset for a SSB_SPROM_XXX define. */
++#define SPOFF(offset) ((offset) / sizeof(u16))
++/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
++#define SPEX16(_outvar, _offset, _mask, _shift) \
++ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
++#define SPEX32(_outvar, _offset, _mask, _shift) \
++ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
++ in[SPOFF(_offset)]) & (_mask)) >> (_shift))
++#define SPEX(_outvar, _offset, _mask, _shift) \
++ SPEX16(_outvar, _offset, _mask, _shift)
++
++#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
++ do { \
++ SPEX(_field[0], _offset + 0, _mask, _shift); \
++ SPEX(_field[1], _offset + 2, _mask, _shift); \
++ SPEX(_field[2], _offset + 4, _mask, _shift); \
++ SPEX(_field[3], _offset + 6, _mask, _shift); \
++ SPEX(_field[4], _offset + 8, _mask, _shift); \
++ SPEX(_field[5], _offset + 10, _mask, _shift); \
++ SPEX(_field[6], _offset + 12, _mask, _shift); \
++ SPEX(_field[7], _offset + 14, _mask, _shift); \
++ } while (0)
++
++
++static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
++ u16 mask, u16 shift)
++{
++ u16 v;
++ u8 gain;
++
++ v = in[SPOFF(SSB_SPROM1_AGAIN)];
++ gain = (v & mask) >> shift;
++ if (gain == 0xFF)
++ gain = 2; /* If unset use 2dBm */
++ if (sprom_revision == 1) {
++ /* Convert to Q5.2 */
++ gain <<= 2;
++ } else {
++ /* Q5.2 Fractional part is stored in 0xC0 */
++ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
++ }
++
++ return (s8)gain;
++}
++
++static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
++{
++ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
++ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
++ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
++ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
++ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
++ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
++ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
++ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
++ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
++ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
++ SSB_SPROM2_MAXP_A_LO_SHIFT);
++}
++
++static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
++{
++ u16 loc[3];
++
++ if (out->revision == 3) /* rev 3 moved MAC */
++ loc[0] = SSB_SPROM3_IL0MAC;
++ else {
++ loc[0] = SSB_SPROM1_IL0MAC;
++ loc[1] = SSB_SPROM1_ET0MAC;
++ loc[2] = SSB_SPROM1_ET1MAC;
++ }
++
++ SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
++ SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
++ SSB_SPROM1_ETHPHY_ET1A_SHIFT);
++ SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
++ SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
++ SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++ if (out->revision == 1)
++ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
++ SSB_SPROM1_BINF_CCODE_SHIFT);
++ SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
++ SSB_SPROM1_BINF_ANTA_SHIFT);
++ SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
++ SSB_SPROM1_BINF_ANTBG_SHIFT);
++ SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
++ SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
++ SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
++ SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
++ SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
++ SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
++ SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
++ SSB_SPROM1_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
++ SSB_SPROM1_GPIOB_P3_SHIFT);
++ SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
++ SSB_SPROM1_MAXPWR_A_SHIFT);
++ SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
++ SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
++ SSB_SPROM1_ITSSI_A_SHIFT);
++ SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
++ SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
++
++ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
++
++ /* Extract the antenna gain values. */
++ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
++ SSB_SPROM1_AGAIN_BG,
++ SSB_SPROM1_AGAIN_BG_SHIFT);
++ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
++ SSB_SPROM1_AGAIN_A,
++ SSB_SPROM1_AGAIN_A_SHIFT);
++ if (out->revision >= 2)
++ sprom_extract_r23(out, in);
++}
++
++/* Revs 4 5 and 8 have partially shared layout */
++static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
++{
++ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
++ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
++ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
++ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
++ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
++ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
++ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
++ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
++
++ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
++ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
++ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
++ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
++ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
++ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
++ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
++ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
++
++ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
++ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
++ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
++ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
++ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
++ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
++ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
++ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
++
++ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
++ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
++ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
++ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
++ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
++ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
++ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
++ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
++}
++
++static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
++{
++ u16 il0mac_offset;
++
++ if (out->revision == 4)
++ il0mac_offset = SSB_SPROM4_IL0MAC;
++ else
++ il0mac_offset = SSB_SPROM5_IL0MAC;
++
++ SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
++ SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
++ SSB_SPROM4_ETHPHY_ET1A_SHIFT);
++ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++ if (out->revision == 4) {
++ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
++ SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
++ SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
++ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
++ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
++ } else {
++ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
++ SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
++ SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
++ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
++ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
++ }
++ SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
++ SSB_SPROM4_ANTAVAIL_A_SHIFT);
++ SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
++ SSB_SPROM4_ANTAVAIL_BG_SHIFT);
++ SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
++ SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
++ SSB_SPROM4_ITSSI_BG_SHIFT);
++ SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
++ SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
++ SSB_SPROM4_ITSSI_A_SHIFT);
++ if (out->revision == 4) {
++ SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
++ SSB_SPROM4_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
++ SSB_SPROM4_GPIOB_P3_SHIFT);
++ } else {
++ SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
++ SSB_SPROM5_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
++ SSB_SPROM5_GPIOB_P3_SHIFT);
++ }
++
++ /* Extract the antenna gain values. */
++ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
++ SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
++ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
++ SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
++ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
++ SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
++ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
++ SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
++
++ sprom_extract_r458(out, in);
++
++ /* TODO - get remaining rev 4 stuff needed */
++}
++
++static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
++{
++ int i;
++ u16 o;
++ u16 pwr_info_offset[] = {
++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
++ };
++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++ ARRAY_SIZE(out->core_pwr_info));
++
++ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
++ SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
++ SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
++ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
++ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
++ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
++ SSB_SPROM8_ANTAVAIL_A_SHIFT);
++ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
++ SSB_SPROM8_ANTAVAIL_BG_SHIFT);
++ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
++ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
++ SSB_SPROM8_ITSSI_BG_SHIFT);
++ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
++ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
++ SSB_SPROM8_ITSSI_A_SHIFT);
++ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
++ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
++ SSB_SPROM8_MAXP_AL_SHIFT);
++ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
++ SSB_SPROM8_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
++ SSB_SPROM8_GPIOB_P3_SHIFT);
++ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
++ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
++ SSB_SPROM8_TRI5G_SHIFT);
++ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
++ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
++ SSB_SPROM8_TRI5GH_SHIFT);
++ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
++ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
++ SSB_SPROM8_RXPO5G_SHIFT);
++ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
++ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
++ SSB_SPROM8_RSSISMC2G_SHIFT);
++ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
++ SSB_SPROM8_RSSISAV2G_SHIFT);
++ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
++ SSB_SPROM8_BXA2G_SHIFT);
++ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
++ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
++ SSB_SPROM8_RSSISMC5G_SHIFT);
++ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
++ SSB_SPROM8_RSSISAV5G_SHIFT);
++ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
++ SSB_SPROM8_BXA5G_SHIFT);
++ SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
++ SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
++ SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
++ SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
++ SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
++ SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
++ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
++ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
++ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
++ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
++ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
++ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
++ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
++ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
++ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
++ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
++ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
++
++ /* Extract the antenna gain values. */
++ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
++ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
++ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
++ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
++ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
++ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
++ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
++ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
++
++ /* Extract cores power info info */
++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++ o = pwr_info_offset[i];
++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_MAXP, 0);
++
++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
++
++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GH_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
++
++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
++ }
++
++ /* Extract FEM info */
++ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
++ SSB_SPROM8_LEDDC_ON_SHIFT);
++ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
++ SSB_SPROM8_LEDDC_OFF_SHIFT);
++
++ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
++ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
++ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
++ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
++ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
++ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
++
++ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
++
++ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
++ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
++ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
++ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
++
++ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
++ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
++ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
++ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
++ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
++ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
++ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
++ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
++ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
++ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
++ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
++ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
++
++ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
++ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
++ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
++ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
++
++ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
++ SSB_SPROM8_THERMAL_TRESH_SHIFT);
++ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
++ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
++ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
++ SSB_SPROM8_TEMPDELTA_PHYCAL,
++ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
++ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
++ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
++ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
++ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
++ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
++ sprom_extract_r458(out, in);
++
++ /* TODO - get remaining rev 8 stuff needed */
++}
++
++static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
++{
++ memset(out, 0, sizeof(*out));
++
++ out->revision = in[size - 1] & 0x00FF;
++ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
++ memset(out->et1mac, 0xFF, 6);
++
++ switch (out->revision) {
++ case 1:
++ case 2:
++ case 3:
++ sprom_extract_r123(out, in);
++ break;
++ case 4:
++ case 5:
++ sprom_extract_r45(out, in);
++ break;
++ case 8:
++ sprom_extract_r8(out, in);
++ break;
++ default:
++ pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
++ out->revision);
++ out->revision = 1;
++ sprom_extract_r123(out, in);
++ }
++
++ if (out->boardflags_lo == 0xFFFF)
++ out->boardflags_lo = 0; /* per specs */
++ if (out->boardflags_hi == 0xFFFF)
++ out->boardflags_hi = 0; /* per specs */
++
++ return 0;
++}
++
++static __initdata u16 template_sprom[220];
+ #endif
+
++
+ int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ int ret = 0;
+
+ #ifdef CONFIG_SSB_PCIHOST
++ u16 size = 0;
++
+ switch (data->type) {
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr
+ return -EINVAL;
+ }
+
++ if (size > 0)
++ sprom_extract(&bcm63xx_sprom, template_sprom, size);
++
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
--- /dev/null
+From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:33:38 +0200
+Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common
+ ssb cards
+
+Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 136 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 +
+ 2 files changed, 142 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6
+ .boardflags_hi = 0x0000,
+ };
+
++
++static __initconst u16 bcm4306_sprom[] = {
++ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4,
++ 0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff,
++ 0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4318_sprom[] = {
++ 0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000,
++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7,
++ 0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff,
++ 0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4321_sprom[] = {
++ 0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000,
++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36,
++ 0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0004,
++};
++
++static __initconst u16 bcm4322_sprom[] = {
++ 0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000,
++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43222_sprom[] = {
++ 0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000,
++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
+ static struct ssb_sprom bcm63xx_sprom;
+
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr
+ u16 size = 0;
+
+ switch (data->type) {
++ case SPROM_BCM4306:
++ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
++ size = ARRAY_SIZE(bcm4306_sprom);
++ break;
++ case SPROM_BCM4318:
++ memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom));
++ size = ARRAY_SIZE(bcm4318_sprom);
++ break;
++ case SPROM_BCM4321:
++ memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom));
++ size = ARRAY_SIZE(bcm4321_sprom);
++ break;
++ case SPROM_BCM4322:
++ memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom));
++ size = ARRAY_SIZE(bcm4322_sprom);
++ break;
++ case SPROM_BCM43222:
++ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
++ size = ARRAY_SIZE(bcm43222_sprom);
++ break;
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -5,6 +5,12 @@
+
+ enum sprom_type {
+ SPROM_DEFAULT, /* default fallback sprom */
++ /* SSB based */
++ SPROM_BCM4306,
++ SPROM_BCM4318,
++ SPROM_BCM4321,
++ SPROM_BCM4322,
++ SPROM_BCM43222,
+ };
+
+ struct fallback_sprom_data {
--- /dev/null
+From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:48:26 +0200
+Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma
+
+Similar to SSB, register a fallback sprom handler for BCMA.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig | 1 +
+ arch/mips/bcm63xx/sprom.c | 40 +++++++++++++++++++++++++++++++++++-----
+ 2 files changed, 36 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -5,6 +5,7 @@ menu "Board support"
+ config BOARD_BCM963XX
+ bool "Generic Broadcom 963xx boards"
+ select SSB
++ select BCMA
+ default y
+ help
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -12,6 +12,7 @@
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
++#include <linux/bcma/bcma.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <board_bcm963xx.h>
+
+@@ -21,7 +22,7 @@
+ * Register a sane SPROMv2 to make the on-board
+ * bcm4318 WLAN work
+ */
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ .revision = 0x02,
+ .board_rev = 0x17,
+@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6
+ .boardflags_hi = 0x0000,
+ };
+
+-
++#if defined (CONFIG_SSB_PCIHOST)
+ static __initconst u16 bcm4306_sprom[] = {
+ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
+@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[]
+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 0xffff, 0xffff, 0xffff, 0x0008,
+ };
++#endif /* CONFIG_SSB_PCIHOST */
+
+ static struct ssb_sprom bcm63xx_sprom;
+
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++#if defined(CONFIG_SSB_PCIHOST)
++int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss
+ return -EINVAL;
+ }
+ }
++#endif
++
++#if defined(CONFIG_BCMA_HOST_PCI)
++int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
++{
++ if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ return 0;
++ } else {
++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++ return -EINVAL;
++ }
++}
++#endif
+
+ /* FIXME: use lib_sprom after submission upstream */
+
+@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr
+ {
+ int ret = 0;
+
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ u16 size = 0;
+
+ switch (data->type) {
++#if defined(CONFIG_SSB_PCIHOST)
+ case SPROM_BCM4306:
+ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
+ size = ARRAY_SIZE(bcm4306_sprom);
+@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr
+ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
+ size = ARRAY_SIZE(bcm43222_sprom);
+ break;
++#endif
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ sizeof(bcm63xx_sprom));
+@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
++
++#if defined(CONFIG_SSB_PCIHOST)
++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom);
++ if (ret)
++ return ret;
++
++#endif
+
+- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#if defined(CONFIG_BCMA_HOST_PCI)
++ ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom);
++ if (ret)
++ return ret;
+ #endif
+ return ret;
+ }
--- /dev/null
+From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 30 Jul 2014 23:14:27 +0200
+Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates
+
+Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227,
+BCM43228, and BCM4331.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 256 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +
+ 2 files changed, 264 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[]
+ };
+ #endif /* CONFIG_SSB_PCIHOST */
+
++#if defined(CONFIG_BCMA_HOST_PCI)
++static __initconst u16 bcm4313_sprom[] = {
++ 0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++ 0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201,
++ 0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000,
++ 0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0008,
++};
++
++static __initconst u16 bcm43131_sprom[] = {
++ 0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202,
++ 0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43217_sprom[] = {
++ 0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x7a08,
++};
++
++static __initconst u16 bcm43225_sprom[] = {
++ 0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++ 0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555,
++ 0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43227_sprom[] = {
++ 0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43228_sprom[] = {
++ 0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215,
++ 0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c,
++ 0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000,
++ 0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446,
++ 0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888,
++ 0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xf008,
++};
++
++static __initconst u16 bcm4331_sprom[] = {
++ 0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202,
++ 0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++ 0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657,
++ 0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000,
++ 0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d,
++ 0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000,
++ 0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4,
++ 0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0009,
++};
++
++#endif /* CONFIG_BCMA_HOST_PCI */
++
+ static struct ssb_sprom bcm63xx_sprom;
+
+ #if defined(CONFIG_SSB_PCIHOST)
+@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr
+ size = ARRAY_SIZE(bcm43222_sprom);
+ break;
+ #endif
++#if defined(CONFIG_BCMA_HOST_PCI)
++ case SPROM_BCM4313:
++ memcpy(&template_sprom, &bcm4313_sprom,
++ sizeof(bcm4313_sprom));
++ size = ARRAY_SIZE(bcm4313_sprom);
++ break;
++ case SPROM_BCM43131:
++ memcpy(&template_sprom, &bcm43131_sprom,
++ sizeof(bcm43131_sprom));
++ size = ARRAY_SIZE(bcm43131_sprom);
++ break;
++ case SPROM_BCM43217:
++ memcpy(&template_sprom, &bcm43217_sprom,
++ sizeof(bcm43217_sprom));
++ size = ARRAY_SIZE(bcm43217_sprom);
++ break;
++ case SPROM_BCM43225:
++ memcpy(&template_sprom, &bcm43225_sprom,
++ sizeof(bcm43225_sprom));
++ size = ARRAY_SIZE(bcm43225_sprom);
++ break;
++ case SPROM_BCM43227:
++ memcpy(&template_sprom, &bcm43227_sprom,
++ sizeof(bcm43227_sprom));
++ size = ARRAY_SIZE(bcm43227_sprom);
++ break;
++ case SPROM_BCM43228:
++ memcpy(&template_sprom, &bcm43228_sprom,
++ sizeof(bcm43228_sprom));
++ size = ARRAY_SIZE(bcm43228_sprom);
++ break;
++ case SPROM_BCM4331:
++ memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom));
++ size = ARRAY_SIZE(bcm4331_sprom);
++ break;
++#endif
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -11,6 +11,14 @@ enum sprom_type {
+ SPROM_BCM4321,
+ SPROM_BCM4322,
+ SPROM_BCM43222,
++ /* BCMA based */
++ SPROM_BCM4313,
++ SPROM_BCM43131,
++ SPROM_BCM43217,
++ SPROM_BCM43225,
++ SPROM_BCM43227,
++ SPROM_BCM43228,
++ SPROM_BCM4331,
+ };
+
+ struct fallback_sprom_data {
--- /dev/null
+From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 19:12:33 +0200
+Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom
+ fixups
+
+Allow board_info files to supply fixups for the base sproms to adapt
+them to the actual used sprom contents in case they do not use the
+default ones.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 14 +++++++++++++-
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 ++++++++
+ 2 files changed, 21 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro
+ return 0;
+ }
+
++void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n)
++{
++ unsigned int i;
++
++ for (i = 0; i < n; i++)
++ sprom[fixups[i].offset] = fixups[i].value;
++}
++
+ static __initdata u16 template_sprom[220];
+ #endif
+
+@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr
+ return -EINVAL;
+ }
+
+- if (size > 0)
++ if (size > 0) {
++ sprom_apply_fixups(template_sprom, data->board_fixups,
++ data->num_board_fixups);
++
+ sprom_extract(&bcm63xx_sprom, template_sprom, size);
++ }
+
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -21,9 +21,17 @@ enum sprom_type {
+ SPROM_BCM4331,
+ };
+
++struct sprom_fixup {
++ u16 offset;
++ u16 value;
++};
++
+ struct fallback_sprom_data {
+ u8 mac_addr[ETH_ALEN];
+ enum sprom_type type;
++
++ struct sprom_fixup *board_fixups;
++ unsigned int num_board_fixups;
+ };
+
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
--- /dev/null
+From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 20:39:44 +0200
+Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for
+ fallback sprom
+
+Warn if the set pci bus/slot does not match the actual request.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 31 ++++++++++++++++++----
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 3 +++
+ 2 files changed, 29 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] =
+
+ #endif /* CONFIG_BCMA_HOST_PCI */
+
+-static struct ssb_sprom bcm63xx_sprom;
++struct fallback_sprom_match {
++ u8 pci_bus;
++ u8 pci_dev;
++ struct ssb_sprom sprom;
++};
++
++static struct fallback_sprom_match fallback_sprom;
+
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++ pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++ bus->host_pci->bus->number,
++ PCI_SLOT(bus->host_pci->devfn));
++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ return 0;
+ } else {
+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc
+ int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++ pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++ bus->host_pci->bus->number,
++ PCI_SLOT(bus->host_pci->devfn));
++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ return 0;
+ } else {
+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr
+ break;
+ #endif
+ case SPROM_DEFAULT:
+- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+- sizeof(bcm63xx_sprom));
++ memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom,
++ sizeof(bcm63xx_default_sprom));
+ break;
+ default:
+ return -EINVAL;
+@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr
+ sprom_apply_fixups(template_sprom, data->board_fixups,
+ data->num_board_fixups);
+
+- sprom_extract(&bcm63xx_sprom, template_sprom, size);
++ sprom_extract(&fallback_sprom.sprom, template_sprom, size);
+ }
+
+- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++ memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN);
++ memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN);
++ memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN);
++
++ fallback_sprom.pci_bus = data->pci_bus;
++ fallback_sprom.pci_dev = data->pci_dev;
+ #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
+
+ #if defined(CONFIG_SSB_PCIHOST)
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -30,6 +30,9 @@ struct fallback_sprom_data {
+ u8 mac_addr[ETH_ALEN];
+ enum sprom_type type;
+
++ u8 pci_bus;
++ u8 pci_dev;
++
+ struct sprom_fixup *board_fixups;
+ unsigned int num_board_fixups;
+ };
--- /dev/null
+From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 24 Jun 2014 10:57:51 +0200
+Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig | 4 ++++
+ arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++
+ arch/mips/bcm63xx/prom.c | 6 ++++++
+ 3 files changed, 44 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -2,6 +2,10 @@
+ menu "Board support"
+ depends on BCM63XX
+
++config BOARD_BCM63XX_DT
++ bool "Device Tree boards (experimential)"
++ select USE_OF
++
+ config BOARD_BCM963XX
+ bool "Generic Broadcom 963xx boards"
+ select SSB
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -10,11 +10,14 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/of_fdt.h>
++#include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
+ #include <asm/bootinfo.h>
+ #include <asm/fw/cfe/cfe_api.h>
++#include <asm/prom.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -125,8 +128,23 @@ void __init board_setup(void)
+ /* make sure we're running on expected cpu */
+ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+ panic("unexpected CPU for bcm963xx board");
++
++#if CONFIG_OF
++ if (initial_boot_params)
++ __dt_setup_arch(initial_boot_params);
++#endif
+ }
+
++#if CONFIG_OF
++void __init device_tree_init(void)
++{
++ if (!initial_boot_params)
++ return;
++
++ unflatten_and_copy_device_tree();
++}
++#endif
++
+ static struct gpio_led_platform_data bcm63xx_led_data;
+
+ static struct platform_device bcm63xx_gpio_leds = {
+@@ -135,6 +153,13 @@ static struct platform_device bcm63xx_gp
+ .dev.platform_data = &bcm63xx_led_data,
+ };
+
++#if CONFIG_OF
++static struct of_device_id of_ids[] = {
++ { /* filled at runtime */ },
++ { .compatible = "simple-bus" },
++ { },
++};
++#endif
+ /*
+ * third stage init callback, register all board devices.
+ */
+@@ -142,6 +167,15 @@ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
+
++#if CONFIG_OF
++ if (of_have_populated_dt()) {
++ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
++ "brcm,bcm%x", bcm63xx_get_cpu_id());
++
++ of_platform_populate(NULL, of_ids, NULL, NULL);
++ }
++#endif
++
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -8,6 +8,7 @@
+
+ #include <linux/init.h>
+ #include <linux/bootmem.h>
++#include <linux/of_fdt.h>
+ #include <linux/smp.h>
+ #include <asm/bootinfo.h>
+ #include <asm/bmips.h>
+@@ -23,6 +24,11 @@ void __init prom_init(void)
+ {
+ u32 reg, mask;
+
++#if CONFIG_OF
++ if (fw_passed_dtb)
++ early_init_dt_verify((void *)fw_passed_dtb);
++#endif
++
+ bcm63xx_cpu_init();
+
+ /* stop any running watchdog */
--- /dev/null
+From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 26 Jun 2014 12:51:00 +0200
+Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info
+ by dtb
+
+Allow using the passed dtb's compatible property to match board_info
+structs instead of nvram's boardname field, which is not unique anyway.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 +++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c | 18 ++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h | 3 +++
+ 3 files changed, 36 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -695,6 +695,10 @@ static const struct board_info __initcon
+ #endif
+ };
+
++static struct of_device_id const bcm963xx_boards_dt[] = {
++ { },
++};
++
+ /*
+ * early init callback, read nvram data from flash and checksum it
+ */
+@@ -706,6 +710,7 @@ void __init board_bcm963xx_init(void)
+ char *board_name = NULL;
+ u32 val;
+ struct bcm_hcs *hcs;
++ const struct of_device_id *board_match;
+
+ /* read base address of boot chip select (0)
+ * 6328/6362 do not have MPI but boot from a fixed address
+@@ -745,6 +750,16 @@ void __init board_bcm963xx_init(void)
+ } else {
+ board_name = bcm63xx_nvram_get_name();
+ }
++
++ /* find board by compat */
++ board_match = bcm63xx_match_board(bcm963xx_boards_dt);
++ if (board_match) {
++ board_early_setup(board_match->data,
++ bcm63xx_nvram_get_mac_address);
++
++ return;
++ }
++
+ /* find board by name */
+ for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
+ if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -239,3 +239,21 @@ int __init board_register_devices(void)
+
+ return 0;
+ }
++
++const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m)
++{
++ const struct of_device_id *match;
++ unsigned long dt_root;
++
++ if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params)
++ return NULL;
++
++ dt_root = of_get_flat_dt_root();
++
++ for (match = m; match->compatible[0]; match++) {
++ if (of_flat_dt_is_compatible(dt_root, match->compatible))
++ return match;
++ }
++
++ return NULL;
++}
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -1,11 +1,14 @@
+ #ifndef __BOARD_COMMON_H
+ #define __BOARD_COMMON_H
+
++#include <linux/of.h>
+ #include <board_bcm963xx.h>
+
+ void board_early_setup(const struct board_info *board,
+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
+
++const struct of_device_id *bcm63xx_match_board(const struct of_device_id *);
++
+ #if defined(CONFIG_BOARD_BCM963XX)
+ void board_bcm963xx_init(void);
+ #else
--- /dev/null
+From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 21 Nov 2014 16:54:06 +0100
+Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info
+ list
+
+Populate the compatible to board_info list to allow dtbs to be used
+for known boards.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 34 +++++++++++++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -696,6 +696,48 @@ static const struct board_info __initcon
+ };
+
+ static struct of_device_id const bcm963xx_boards_dt[] = {
++#ifdef CONFIG_OF
++#ifdef CONFIG_BCM63XX_CPU_3368
++ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6338
++ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
++ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6345
++ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6348
++ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
++ { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
++ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
++ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
++ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
++ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
++ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
++ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
++ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
++ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6358
++ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
++ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
++ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
++ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
++ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
++ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6368
++#endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++#endif
++#endif /* CONFIG_OF */
+ { },
+ };
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -143,6 +143,18 @@ void __init device_tree_init(void)
+
+ unflatten_and_copy_device_tree();
+ }
++
++int board_of_device_present(const char *alias)
++{
++ bool present;
++ struct device_node *np;
++
++ np = of_find_node_by_path(alias);
++ present = of_device_is_available(np);
++ of_node_put(np);
++
++ return present;
++}
+ #endif
+
+ static struct gpio_led_platform_data bcm63xx_led_data;
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -15,4 +15,13 @@ void board_bcm963xx_init(void);
+ static inline void board_bcm963xx_init(void) { }
+ #endif
+
++#if defined(CONFIG_OF)
++int board_of_device_present(const char *alias);
++#else
++static inline void board_of_device_present(const char *alias)
++{
++ return 0;
++}
++#endif
++
+ #endif /* __BOARD_COMMON_H */
--- /dev/null
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -23,6 +23,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+
++#include "boards/board_common.h"
++
+ static int flash_type;
+
+ static struct mtd_partition mtd_partitions[] = {
+@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void)
+
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
++ /* don't register when already registered through from dtb */
++ if (board_of_device_present("pflash"))
++ return 0;
+
+ if (!mtd_resources[0].start) {
+ /* read base address of boot chip select (0) */
--- /dev/null
+From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 1 Dec 2014 00:20:07 +0100
+Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -14,6 +14,8 @@
+ #include <linux/irqchip.h>
+ #include <linux/irqchip/irq-bcm6345-ext.h>
+ #include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/of.h>
++#include <linux/of_fdt.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -21,6 +23,9 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+
++IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
++ mips_cpu_irq_of_init);
++
+ void __init arch_init_irq(void)
+ {
+ void __iomem *periph_bases[2];
+@@ -29,6 +34,13 @@ void __init arch_init_irq(void)
+ int periph_irqs[2] = { 2, 3 };
+ int ext_irqs[6];
+
++#ifdef CONFIG_OF
++ if (initial_boot_params) {
++ irqchip_init();
++ return;
++ }
++#endif
++
+ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
--- /dev/null
+From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 19:55:32 +0100
+Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/gpio/Kconfig | 8 +++
+ drivers/gpio/Makefile | 1 +
+ drivers/gpio/gpio-bcm63xx.c | 135 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 131 insertions(+)
+ create mode 100644 drivers/gpio/gpio-bcm63xx.c
+
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -134,6 +134,13 @@ config GPIO_BCM_KONA
+ help
+ Turn on GPIO support for Broadcom "Kona" chips.
+
++config GPIO_BCM63XX
++ bool "Broadcom BCM63XX GPIO"
++ depends on MIPS || COMPILE_TEST
++ select GPIO_GENERIC
++ help
++ Turn on GPIO support for Broadcom BCM63XX xDSL chips.
++
+ config GPIO_BRCMSTB
+ tristate "BRCMSTB GPIO support"
+ default y if (ARCH_BRCMSTB || BMIPS_GENERIC)
+--- a/drivers/gpio/Makefile
++++ b/drivers/gpio/Makefile
+@@ -34,6 +34,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
+ obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
+ obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o
+ obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
++obj-$(CONFIG_GPIO_BCM63XX) += gpio-bcm63xx.o
+ obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
+ obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
+ obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
+--- /dev/null
++++ b/drivers/gpio/gpio-bcm63xx.c
+@@ -0,0 +1,135 @@
++/*
++ * Driver for BCM63XX memory-mapped GPIO controllers, based on
++ * Generic driver for memory-mapped GPIO controllers.
++ *
++ * Copyright 2008 MontaVista Software, Inc.
++ * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
++ * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/err.h>
++#include <linux/bug.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/spinlock.h>
++#include <linux/compiler.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/log2.h>
++#include <linux/ioport.h>
++#include <linux/io.h>
++#include <linux/gpio.h>
++#include <linux/gpio/driver.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++#include <linux/mod_devicetable.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_gpio.h>
++
++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++ char irq_name[7]; /* "gpioXX" */
++
++ sprintf(irq_name, "gpio%d", gpio);
++ return of_irq_get_byname(chip->of_node, irq_name);
++}
++
++static int bcm63xx_gpio_probe(struct platform_device *pdev)
++{
++ struct device *dev = &pdev->dev;
++ struct resource *dat_r, *dirout_r;
++ void __iomem *dat;
++ void __iomem *dirout;
++ unsigned long sz;
++ int err;
++ struct gpio_chip *gc;
++ struct bgpio_pdata *pdata = dev_get_platdata(dev);
++
++ dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++ if (!dat_r || !dirout_r)
++ return -EINVAL;
++
++ if (resource_size(dat_r) != resource_size(dirout_r))
++ return -EINVAL;
++
++ sz = resource_size(dat_r);
++
++ dat = devm_ioremap_resource(dev, dat_r);
++ if (IS_ERR(dat))
++ return PTR_ERR(dat);
++
++ dirout = devm_ioremap_resource(dev, dirout_r);
++ if (IS_ERR(dirout))
++ return PTR_ERR(dirout);
++
++ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
++ if (!gc)
++ return -ENOMEM;
++
++ err = bgpio_init(gc, dev, sz, dat, NULL, NULL, dirout, NULL,
++ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
++ if (err)
++ return err;
++
++ platform_set_drvdata(pdev, gc);
++
++ if (dev->of_node) {
++ int id = of_alias_get_id(dev->of_node, "gpio");
++ u32 ngpios;
++
++ if (id >= 0)
++ gc->label = devm_kasprintf(dev, GFP_KERNEL,
++ "bcm63xx-gpio.%d", id);
++
++ if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios))
++ gc->ngpio = ngpios;
++
++ if (of_get_property(dev->of_node, "interrupt-names", NULL))
++ gc->to_irq = bcm63xx_gpio_to_irq;
++
++ } else if (pdata) {
++ gc->base = pdata->base;
++ if (pdata->ngpio > 0)
++ gc->ngpio = pdata->ngpio;
++ }
++
++ return gpiochip_add(gc);
++}
++
++static int bcm63xx_gpio_remove(struct platform_device *pdev)
++{
++ struct gpio_chip *gc = platform_get_drvdata(pdev);
++
++ gpiochip_remove(gc);
++ return 0;
++}
++
++#ifdef CONFIG_OF
++static struct of_device_id bcm63xx_gpio_of_match[] = {
++ { .compatible = "brcm,bcm6345-gpio" },
++ { },
++};
++#endif
++
++static struct platform_driver bcm63xx_gpio_driver = {
++ .probe = bcm63xx_gpio_probe,
++ .remove = bcm63xx_gpio_remove,
++ .driver = {
++ .name = "bcm63xx-gpio",
++ .of_match_table = of_match_ptr(bcm63xx_gpio_of_match),
++ },
++};
++
++module_platform_driver(bcm63xx_gpio_driver);
++
++MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers");
++MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
++MODULE_LICENSE("GPL");
--- /dev/null
+From 302f69453721e5ee19f583339a3a646821d4a173 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 23:58:54 +0100
+Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c | 2 +
+ arch/mips/bcm63xx/gpio.c | 145 ++++++++++------------------------------------
+ arch/mips/bcm63xx/setup.c | 3 -
+ 3 files changed, 32 insertions(+), 118 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -188,6 +188,8 @@ int __init board_register_devices(void)
+ }
+ #endif
+
++ bcm63xx_gpio_init();
++
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -5,147 +5,62 @@
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+ */
+
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+-#include <linux/spinlock.h>
+ #include <linux/platform_device.h>
+ #include <linux/gpio/driver.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+-#include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
+
+-static u32 gpio_out_low_reg;
+-
+-static void bcm63xx_gpio_out_low_reg_init(void)
++static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+- switch (bcm63xx_get_cpu_id()) {
+- case BCM6345_CPU_ID:
+- gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
+- break;
+- default:
+- gpio_out_low_reg = GPIO_DATA_LO_REG;
+- break;
+- }
+-}
+-
+-static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
+-static u32 gpio_out_low, gpio_out_high;
++ struct resource res[2];
++ struct bgpio_pdata pdata;
+
+-static void bcm63xx_gpio_set(struct gpio_chip *chip,
+- unsigned gpio, int val)
+-{
+- u32 reg;
+- u32 mask;
+- u32 *v;
+- unsigned long flags;
+-
+- if (gpio >= chip->ngpio)
+- BUG();
+-
+- if (gpio < 32) {
+- reg = gpio_out_low_reg;
+- mask = 1 << gpio;
+- v = &gpio_out_low;
+- } else {
+- reg = GPIO_DATA_HI_REG;
+- mask = 1 << (gpio - 32);
+- v = &gpio_out_high;
+- }
+-
+- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+- if (val)
+- *v |= mask;
+- else
+- *v &= ~mask;
+- bcm_gpio_writel(*v, reg);
+- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
+-}
++ memset(res, 0, sizeof(res));
++ memset(&pdata, 0, sizeof(pdata));
+
+-static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
+-{
+- u32 reg;
+- u32 mask;
++ res[0].flags = IORESOURCE_MEM;
++ res[0].start = bcm63xx_regset_address(RSET_GPIO);
++ res[0].start += dir;
+
+- if (gpio >= chip->ngpio)
+- BUG();
++ res[0].end = res[0].start + 3;
+
+- if (gpio < 32) {
+- reg = gpio_out_low_reg;
+- mask = 1 << gpio;
+- } else {
+- reg = GPIO_DATA_HI_REG;
+- mask = 1 << (gpio - 32);
+- }
++ res[1].flags = IORESOURCE_MEM;
++ res[1].start = bcm63xx_regset_address(RSET_GPIO);
++ res[1].start += data;
+
+- return !!(bcm_gpio_readl(reg) & mask);
+-}
++ res[1].end = res[1].start + 3;
+
+-static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
+- unsigned gpio, int dir)
+-{
+- u32 reg;
+- u32 mask;
+- u32 tmp;
+- unsigned long flags;
+-
+- if (gpio >= chip->ngpio)
+- BUG();
+-
+- if (gpio < 32) {
+- reg = GPIO_CTL_LO_REG;
+- mask = 1 << gpio;
+- } else {
+- reg = GPIO_CTL_HI_REG;
+- mask = 1 << (gpio - 32);
+- }
+-
+- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+- tmp = bcm_gpio_readl(reg);
+- if (dir == BCM63XX_GPIO_DIR_IN)
+- tmp &= ~mask;
+- else
+- tmp |= mask;
+- bcm_gpio_writel(tmp, reg);
+- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
++ pdata.base = id * 32;
++ pdata.ngpio = ngpio;
+
+- return 0;
++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
++ &pdata, sizeof(pdata));
+ }
+
+-static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
++int __init bcm63xx_gpio_init(void)
+ {
+- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
+-}
++ int ngpio = bcm63xx_gpio_count();
++ int data_low_reg;
+
+-static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
+- unsigned gpio, int value)
+-{
+- bcm63xx_gpio_set(chip, gpio, value);
+- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
+-}
++ if (BCMCPU_IS_6345())
++ data_low_reg = GPIO_DATA_LO_REG_6345;
++ else
++ data_low_reg = GPIO_DATA_LO_REG;
+
++ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
+
+-static struct gpio_chip bcm63xx_gpio_chip = {
+- .label = "bcm63xx-gpio",
+- .direction_input = bcm63xx_gpio_direction_input,
+- .direction_output = bcm63xx_gpio_direction_output,
+- .get = bcm63xx_gpio_get,
+- .set = bcm63xx_gpio_set,
+- .base = 0,
+-};
++ if (ngpio <= 32)
++ return 0;
+
+-int __init bcm63xx_gpio_init(void)
+-{
+- bcm63xx_gpio_out_low_reg_init();
++ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
+
+- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
+- if (!BCMCPU_IS_6345())
+- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
+- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
+- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
++ return 0;
+
+- return gpiochip_add_data(&bcm63xx_gpio_chip, NULL);
+ }
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
+
+ int __init bcm63xx_register_devices(void)
+ {
+- /* register gpiochip */
+- bcm63xx_gpio_init();
+-
+ return board_register_devices();
+ }
+
--- /dev/null
+From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:21:59 +0100
+Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/boards/board_common.c | 7 +++--
+ arch/mips/bcm63xx/gpio.c | 32 ++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 ++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 5 +--
+ 5 files changed, 42 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -55,7 +55,7 @@ static struct board_info __initdata boar
+ },
+
+ .ephy_reset_gpio = 36,
+- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+ };
+ #endif
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -247,9 +247,10 @@ int __init board_register_devices(void)
+
+ platform_device_register(&bcm63xx_gpio_leds);
+
+- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+- gpio_request_one(board.ephy_reset_gpio,
+- board.ephy_reset_gpio_flags, "ephy-reset");
++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) {
++ bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio,
++ board.ephy_reset_gpio_flags);
++ }
+
+ return 0;
+ }
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -8,15 +8,23 @@
+ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+ */
+
++#include <asm/addrspace.h>
++
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+ #include <linux/platform_device.h>
+ #include <linux/gpio/driver.h>
++#include <linux/gpio/machine.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+
++static const char * const gpio_chip_labels[] = {
++ "bcm63xx-gpio.0",
++ "bcm63xx-gpio.1",
++};
++
+ static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+ struct resource res[2];
+@@ -64,3 +72,25 @@ int __init bcm63xx_gpio_init(void)
+ return 0;
+
+ }
++
++static struct gpiod_lookup_table ephy_reset = {
++ .dev_id = "bcm63xx_enet-0",
++ .table = {
++ { /* filled at runtime */ },
++ { },
++ },
++};
++
++
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags)
++{
++ if (ephy_reset.table[0].chip_label)
++ return;
++
++ ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32];
++ ephy_reset.table[0].chip_hwnum = hw_gpio % 32;
++ ephy_reset.table[0].con_id = "reset";
++ ephy_reset.table[0].flags = flags;
++
++ gpiod_add_lookup_table(&ephy_reset);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -3,9 +3,11 @@
+ #define BCM63XX_GPIO_H
+
+ #include <linux/init.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cpu.h>
+
+ int __init bcm63xx_gpio_init(void);
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags);
+
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -4,6 +4,7 @@
+
+ #include <linux/types.h>
+ #include <linux/gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/leds.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+@@ -50,8 +51,8 @@ struct board_info {
+ /* External PHY reset GPIO */
+ unsigned int ephy_reset_gpio;
+
+- /* External PHY reset GPIO flags from gpio.h */
+- unsigned long ephy_reset_gpio_flags;
++ /* External PHY reset GPIO flags from gpio/machine.h */
++ enum gpio_lookup_flags ephy_reset_gpio_flags;
+
+ /* fallback sprom config */
+ struct fallback_sprom_data fallback_sprom;
--- /dev/null
+From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:26:50 +0100
+Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if
+present in dtb
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/gpio.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -20,6 +20,8 @@
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+
++#include "boards/board_common.h"
++
+ static const char * const gpio_chip_labels[] = {
+ "bcm63xx-gpio.0",
+ "bcm63xx-gpio.1",
+@@ -48,8 +50,10 @@ static void __init bcm63xx_gpio_init_one
+ pdata.base = id * 32;
+ pdata.ngpio = ngpio;
+
+- platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
+- &pdata, sizeof(pdata));
++ if (!board_of_device_present("gpio0") &&
++ !board_of_device_present("pinctrl"))
++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res,
++ 2, &pdata, sizeof(pdata));
+ }
+
+ int __init bcm63xx_gpio_init(void)
--- /dev/null
+From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:52:02 +0100
+Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia
+ ready gpio
+
+To prepare for a time when gpiobases don't need to be fixed anymore.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-pcmcia.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-pcmcia.c
++++ b/arch/mips/bcm63xx/dev-pcmcia.c
+@@ -10,6 +10,7 @@
+ #include <linux/kernel.h>
+ #include <asm/bootinfo.h>
+ #include <linux/platform_device.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cs.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_pcmcia.h>
+@@ -101,6 +102,14 @@ static const struct {
+ },
+ };
+
++static struct gpiod_lookup_table pcmcia_gpios_table = {
++ .dev_id = "bcm63xx_pcmcia.0",
++ .table = {
++ GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH),
++ { },
++ },
++};
++
+ int __init bcm63xx_pcmcia_register(void)
+ {
+ int ret, i;
+@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void)
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6348_CPU_ID:
+ pd.ready_gpio = 22;
++ pcmcia_gpios_table.table[0].chip_hwnum = 22;
+ break;
+
+ case BCM6358_CPU_ID:
+ pd.ready_gpio = 18;
++ pcmcia_gpios_table.table[0].chip_hwnum = 18;
+ break;
+
+ default:
+ return -ENODEV;
+ }
+
++ gpiod_add_lookup_table(&pcmcia_gpios_table);
++
+ pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
+ pcmcia_resources[0].end = pcmcia_resources[0].start +
+ RSET_PCMCIA_SIZE - 1;
--- /dev/null
+From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:54:56 +0100
+Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio
+
+Use the new named gpio instead of relying on the hardware gpio numbers
+matching the virtual gpio numbers.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/pcmcia/bcm63xx_pcmcia.c | 9 ++++++++-
+ drivers/pcmcia/bcm63xx_pcmcia.h | 4 ++++
+ 2 files changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/pcmcia/bcm63xx_pcmcia.c
++++ b/drivers/pcmcia/bcm63xx_pcmcia.c
+@@ -237,7 +237,7 @@ static unsigned int __get_socket_status(
+ stat |= SS_XVCARD;
+ stat |= SS_POWERON;
+
+- if (gpio_get_value(skt->pd->ready_gpio))
++ if (gpiod_get_value(skt->ready_gpio))
+ stat |= SS_READY;
+
+ return stat;
+@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru
+ goto err;
+ }
+
++ /* get ready gpio */
++ skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN);
++ if (IS_ERR(skt->ready_gpio)) {
++ ret = PTR_ERR(skt->ready_gpio);
++ goto err;
++ }
++
+ /* resources are static */
+ sock->resource_ops = &pccard_static_ops;
+ sock->ops = &bcm63xx_pcmcia_operations;
+--- a/drivers/pcmcia/bcm63xx_pcmcia.h
++++ b/drivers/pcmcia/bcm63xx_pcmcia.h
+@@ -4,6 +4,7 @@
+
+ #include <linux/types.h>
+ #include <linux/timer.h>
++#include <linux/gpio/consumer.h>
+ #include <pcmcia/ss.h>
+ #include <bcm63xx_dev_pcmcia.h>
+
+@@ -56,6 +57,9 @@ struct bcm63xx_pcmcia_socket {
+
+ /* base address of io memory */
+ void __iomem *io_base;
++
++ /* ready gpio */
++ struct gpio_desc *ready_gpio;
+ };
+
+ #endif /* BCM63XX_PCMCIA_H_ */
--- /dev/null
+From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:38:05 +0200
+Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6318 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt | 79 ++++++++++++++++++++++
+ 1 file changed, 79 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
+@@ -0,0 +1,79 @@
++* Broadcom BCM6318 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6318-pinctrl".
++- regs: Register specifiers of dirout, dat, mode, mux, and pad registers.
++- reg-names: Must be "dirout", "dat", "mode", "mux", "pad".
++- gpio-controller: Identifies this node as a gpio controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6318-pinctrl";
++ reg = <0x10000080 0x08>,
++ <0x10000088 0x08>,
++ <0x10000098 0x04>,
++ <0x1000009c 0x0c>,
++ <0x100000d4 0x18>;
++ reg-names = "dirout", "dat", "mode", "mux", "pad";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led, ephy0_spd_led
++gpio1 1 led, ephy1_spd_led
++gpio2 2 led, ephy2_spd_led
++gpio3 3 led, ephy3_spd_led
++gpio4 4 led, ephy0_act_led
++gpio5 5 led, ephy1_act_led
++gpio6 6 led, ephy2_act_led, serial_led_data
++gpio7 7 led, ephy3_act_led, serial_led_clk
++gpio8 8 led, inet_act_led
++gpio9 9 led, inet_fail_led
++gpio10 10 led, dsl_led
++gpio11 11 led, post_fail_led
++gpio12 12 led, wlan_wps_led
++gpio13 13 led, usb_pwron, usb_device_led
++gpio14 14 led
++gpio15 15 led
++gpio16 16 led
++gpio17 17 led
++gpio18 18 led
++gpio19 19 led
++gpio20 20 led
++gpio21 21 led
++gpio22 22 led
++gpio23 23 led
++gpio24 24 -
++gpio25 25 -
++gpio26 26 -
++gpio27 27 -
++gpio28 28 -
++gpio29 29 -
++gpio30 30 -
++gpio31 31 -
++gpio32 32 -
++gpio33 33 -
++gpio34 34 -
++gpio35 35 -
++gpio36 36 -
++gpio37 37 -
++gpio38 38 -
++gpio39 39 -
++gpio40 40 usb_active
++gpio41 41 -
++gpio42 42 -
++gpio43 43 -
++gpio44 44 -
++gpio45 45 -
++gpio46 46 -
++gpio47 47 -
++gpio48 48 -
++gpio49 49 -
--- /dev/null
+From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:20:39 +0200
+Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
+
+Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
+to different functions. BCM6318 is similar to BCM6328 with the addition
+of a pad register, and the GPIO meaning of the mux register changes
+based on the GPIO number.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
+ 3 files changed, 572 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX
+ bool
+ select GPIO_GENERIC
+
++config PINCTRL_BCM6318
++ bool "BCM6318 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
++
+ config PINCTRL_BCM6328
+ bool "BCM6328 pincontrol driver" if COMPILE_TEST
+ select PINMUX
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1,4 +1,5 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
++obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
+@@ -0,0 +1,564 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/gpio/driver.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6318_NGPIO 50
++
++struct bcm6318_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6318_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ unsigned mode_val:1;
++ unsigned mux_val:2;
++};
++
++struct bcm6318_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++ void __iomem *mux[3];
++ void __iomem *pad[6];
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++static const struct pinctrl_pin_desc bcm6318_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ PINCTRL_PIN(8, "gpio8"),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ PINCTRL_PIN(12, "gpio12"),
++ PINCTRL_PIN(13, "gpio13"),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ PINCTRL_PIN(27, "gpio27"),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ PINCTRL_PIN(30, "gpio30"),
++ PINCTRL_PIN(31, "gpio31"),
++ PINCTRL_PIN(32, "gpio32"),
++ PINCTRL_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++ PINCTRL_PIN(40, "gpio40"),
++ PINCTRL_PIN(41, "gpio41"),
++ PINCTRL_PIN(42, "gpio42"),
++ PINCTRL_PIN(43, "gpio43"),
++ PINCTRL_PIN(44, "gpio44"),
++ PINCTRL_PIN(45, "gpio45"),
++ PINCTRL_PIN(46, "gpio46"),
++ PINCTRL_PIN(47, "gpio47"),
++ PINCTRL_PIN(48, "gpio48"),
++ PINCTRL_PIN(49, "gpio49"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned gpio32_pins[] = { 32 };
++static unsigned gpio33_pins[] = { 33 };
++static unsigned gpio34_pins[] = { 34 };
++static unsigned gpio35_pins[] = { 35 };
++static unsigned gpio36_pins[] = { 36 };
++static unsigned gpio37_pins[] = { 37 };
++static unsigned gpio38_pins[] = { 38 };
++static unsigned gpio39_pins[] = { 39 };
++static unsigned gpio40_pins[] = { 40 };
++static unsigned gpio41_pins[] = { 41 };
++static unsigned gpio42_pins[] = { 42 };
++static unsigned gpio43_pins[] = { 43 };
++static unsigned gpio44_pins[] = { 44 };
++static unsigned gpio45_pins[] = { 45 };
++static unsigned gpio46_pins[] = { 46 };
++static unsigned gpio47_pins[] = { 47 };
++static unsigned gpio48_pins[] = { 48 };
++static unsigned gpio49_pins[] = { 49 };
++
++#define BCM6318_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6318_pingroup bcm6318_groups[] = {
++ BCM6318_GROUP(gpio0),
++ BCM6318_GROUP(gpio1),
++ BCM6318_GROUP(gpio2),
++ BCM6318_GROUP(gpio3),
++ BCM6318_GROUP(gpio4),
++ BCM6318_GROUP(gpio5),
++ BCM6318_GROUP(gpio6),
++ BCM6318_GROUP(gpio7),
++ BCM6318_GROUP(gpio8),
++ BCM6318_GROUP(gpio9),
++ BCM6318_GROUP(gpio10),
++ BCM6318_GROUP(gpio11),
++ BCM6318_GROUP(gpio12),
++ BCM6318_GROUP(gpio13),
++ BCM6318_GROUP(gpio14),
++ BCM6318_GROUP(gpio15),
++ BCM6318_GROUP(gpio16),
++ BCM6318_GROUP(gpio17),
++ BCM6318_GROUP(gpio18),
++ BCM6318_GROUP(gpio19),
++ BCM6318_GROUP(gpio20),
++ BCM6318_GROUP(gpio21),
++ BCM6318_GROUP(gpio22),
++ BCM6318_GROUP(gpio23),
++ BCM6318_GROUP(gpio24),
++ BCM6318_GROUP(gpio25),
++ BCM6318_GROUP(gpio26),
++ BCM6318_GROUP(gpio27),
++ BCM6318_GROUP(gpio28),
++ BCM6318_GROUP(gpio29),
++ BCM6318_GROUP(gpio30),
++ BCM6318_GROUP(gpio31),
++ BCM6318_GROUP(gpio32),
++ BCM6318_GROUP(gpio33),
++ BCM6318_GROUP(gpio34),
++ BCM6318_GROUP(gpio35),
++ BCM6318_GROUP(gpio36),
++ BCM6318_GROUP(gpio37),
++ BCM6318_GROUP(gpio38),
++ BCM6318_GROUP(gpio39),
++ BCM6318_GROUP(gpio40),
++ BCM6318_GROUP(gpio41),
++ BCM6318_GROUP(gpio42),
++ BCM6318_GROUP(gpio43),
++ BCM6318_GROUP(gpio44),
++ BCM6318_GROUP(gpio45),
++ BCM6318_GROUP(gpio46),
++ BCM6318_GROUP(gpio47),
++ BCM6318_GROUP(gpio48),
++ BCM6318_GROUP(gpio49),
++};
++
++/* GPIO_MODE */
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++/* PINMUX_SEL */
++static const char * const ephy0_spd_led_groups[] = {
++ "gpio0",
++};
++
++static const char * const ephy1_spd_led_groups[] = {
++ "gpio1",
++};
++
++static const char * const ephy2_spd_led_groups[] = {
++ "gpio2",
++};
++
++static const char * const ephy3_spd_led_groups[] = {
++ "gpio3",
++};
++
++static const char * const ephy0_act_led_groups[] = {
++ "gpio4",
++};
++
++static const char * const ephy1_act_led_groups[] = {
++ "gpio5",
++};
++
++static const char * const ephy2_act_led_groups[] = {
++ "gpio6",
++};
++
++static const char * const ephy3_act_led_groups[] = {
++ "gpio7",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio6",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio7",
++};
++
++static const char * const inet_act_led_groups[] = {
++ "gpio8",
++};
++
++static const char * const inet_fail_led_groups[] = {
++ "gpio9",
++};
++
++static const char * const dsl_led_groups[] = {
++ "gpio10",
++};
++
++static const char * const post_fail_led_groups[] = {
++ "gpio11",
++};
++
++static const char * const wlan_wps_led_groups[] = {
++ "gpio12",
++};
++
++static const char * const usb_pwron_groups[] = {
++ "gpio13",
++};
++
++static const char * const usb_device_led_groups[] = {
++ "gpio13",
++};
++
++static const char * const usb_active_groups[] = {
++ "gpio40",
++};
++
++#define BCM6318_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mode_val = 1, \
++ }
++
++#define BCM6318_MUX_FUN(n, mux) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mux_val = mux, \
++ }
++
++static const struct bcm6318_function bcm6318_funcs[] = {
++ BCM6318_MODE_FUN(led),
++ BCM6318_MUX_FUN(ephy0_spd_led, 1),
++ BCM6318_MUX_FUN(ephy1_spd_led, 1),
++ BCM6318_MUX_FUN(ephy2_spd_led, 1),
++ BCM6318_MUX_FUN(ephy3_spd_led, 1),
++ BCM6318_MUX_FUN(ephy0_act_led, 1),
++ BCM6318_MUX_FUN(ephy1_act_led, 1),
++ BCM6318_MUX_FUN(ephy2_act_led, 1),
++ BCM6318_MUX_FUN(ephy3_act_led, 1),
++ BCM6318_MUX_FUN(serial_led_data, 3),
++ BCM6318_MUX_FUN(serial_led_clk, 3),
++ BCM6318_MUX_FUN(inet_act_led, 1),
++ BCM6318_MUX_FUN(inet_fail_led, 1),
++ BCM6318_MUX_FUN(dsl_led, 1),
++ BCM6318_MUX_FUN(post_fail_led, 1),
++ BCM6318_MUX_FUN(wlan_wps_led, 1),
++ BCM6318_MUX_FUN(usb_pwron, 1),
++ BCM6318_MUX_FUN(usb_device_led, 2),
++ BCM6318_MUX_FUN(usb_active, 2),
++};
++
++static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6318_groups);
++}
++
++static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6318_groups[group].name;
++}
++
++static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6318_groups[group].pins;
++ *num_pins = bcm6318_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6318_funcs);
++}
++
++static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6318_funcs[selector].name;
++}
++
++static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6318_funcs[selector].groups;
++ *num_groups = bcm6318_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
++ u32 mode, u32 mux)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ if (pin < 32) {
++ reg = __raw_readl(pctl->mode);
++ reg &= ~BIT(pin);
++ if (mode)
++ reg |= BIT(pin);
++ __raw_writel(reg, pctl->mode);
++ }
++
++ if (pin < 48) {
++ reg = __raw_readl(pctl->mux[pin / 16]);
++ reg &= ~(3UL << ((pin % 16) * 2));
++ reg |= mux << ((pin % 16) * 2);
++ __raw_writel(reg, pctl->mux[pin / 16]);
++ }
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ reg = __raw_readl(pctl->pad[pin / 8]);
++ reg &= ~(0xfUL << ((pin % 8) * 4));
++ reg |= val << ((pin % 8) * 4);
++ __raw_writel(reg, pctl->pad[pin / 8]);
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
++ const struct bcm6318_function *f = &bcm6318_funcs[selector];
++
++ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
++
++ return 0;
++}
++
++static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ if (offset < 13) {
++ /* GPIOs 0-12 use mux 0 as GPIO function */
++ bcm6318_rmw_mux(pctl, offset, 0, 0);
++ } else if (offset < 42) {
++ /* GPIOs 13-41 use mux 3 as GPIO function */
++ bcm6318_rmw_mux(pctl, offset, 0, 3);
++
++ /* FIXME: revert to old value for non gpio? */
++ bcm6318_set_pad(pctl, offset, 0);
++ } else {
++ /* no idea, really */
++ }
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6318_pctl_ops = {
++ .get_groups_count = bcm6318_pinctrl_get_group_count,
++ .get_group_name = bcm6318_pinctrl_get_group_name,
++ .get_group_pins = bcm6318_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6318_pmx_ops = {
++ .get_functions_count = bcm6318_pinctrl_get_func_count,
++ .get_function_name = bcm6318_pinctrl_get_func_name,
++ .get_function_groups = bcm6318_pinctrl_get_groups,
++ .set_mux = bcm6318_pinctrl_set_mux,
++ .gpio_request_enable = bcm6318_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6318_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6318_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode, *mux, *pad;
++ unsigned i;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
++ mux = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mux))
++ return PTR_ERR(mux);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
++ pad = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(pad))
++ return PTR_ERR(pad);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++
++ for (i = 0; i < 3; i++)
++ pctl->mux[i] = mux + (i * 4);
++
++ for (i = 0; i < 6; i++)
++ pctl->pad[i] = pad + (i * 4);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6318_pctl_ops;
++ pctl->desc.pmxops = &bcm6318_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
++ pctl->desc.pins = bcm6318_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6318_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6318_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6318-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6318_pinctrl_driver = {
++ .probe = bcm6318_pinctrl_probe,
++ .driver = {
++ .name = "bcm6318-pinctrl",
++ .of_match_table = bcm6318_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6318_pinctrl_driver);
--- /dev/null
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -25,6 +25,8 @@ config BCM63XX_CPU_6318
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6318
+
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+@@ -32,6 +34,8 @@ config BCM63XX_CPU_6328
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6328
+
+ config BCM63XX_CPU_6338
+ bool "support 6338 CPU"
+@@ -47,6 +51,8 @@ config BCM63XX_CPU_6348
+ select SYS_HAS_CPU_BMIPS32_3300
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select PINCTRL
++ select PINCTRL_BCM6348
+
+ config BCM63XX_CPU_6358
+ bool "support 6358 CPU"
+@@ -54,6 +60,8 @@ config BCM63XX_CPU_6358
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6358
+
+ config BCM63XX_CPU_6362
+ bool "support 6362 CPU"
+@@ -61,6 +69,8 @@ config BCM63XX_CPU_6362
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6362
+
+ config BCM63XX_CPU_6368
+ bool "support 6368 CPU"
+@@ -68,6 +78,8 @@ config BCM63XX_CPU_6368
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6368
+
+ config BCM63XX_CPU_63268
+ bool "support 63268 CPU"
+@@ -75,6 +87,8 @@ config BCM63XX_CPU_63268
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM63268
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
--- /dev/null
+From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 31 Jul 2017 20:10:36 +0200
+Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
+
+---
+ arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -489,6 +489,8 @@ static struct clk_lookup bcm3368_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -505,7 +507,9 @@ static struct clk_lookup bcm6318_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -519,7 +523,10 @@ static struct clk_lookup bcm6328_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -532,6 +539,7 @@ static struct clk_lookup bcm6338_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -546,6 +554,7 @@ static struct clk_lookup bcm6345_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -560,6 +569,7 @@ static struct clk_lookup bcm6348_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -576,6 +586,8 @@ static struct clk_lookup bcm6358_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -595,7 +607,10 @@ static struct clk_lookup bcm6362_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -611,6 +626,8 @@ static struct clk_lookup bcm6368_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -625,7 +642,10 @@ static struct clk_lookup bcm63268_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
--- /dev/null
+From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sat, 4 Feb 2017 12:58:50 +0100
+Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers
+
+We now register them through DT, so no need to keep them here.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 -------
+ 1 file changed, 7 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -27,9 +27,7 @@
+ #include <bcm63xx_dev_pci.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_flash.h>
+-#include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+-#include <bcm63xx_dev_spi.h>
+ #include <bcm63xx_dev_usb_ehci.h>
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+@@ -236,10 +234,6 @@ int __init board_register_devices(void)
+ bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
+ pr_err(PFX "failed to register fallback SPROM\n");
+
+- bcm63xx_spi_register();
+-
+- bcm63xx_hsspi_register();
+-
+ bcm63xx_flash_register();
+
+ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
++ dev-rng.o dev-uart.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+ sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ /dev/null
+@@ -1,48 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
+- */
+-
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/platform_device.h>
+-
+-#include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_hsspi.h>
+-#include <bcm63xx_regs.h>
+-
+-static struct resource spi_resources[] = {
+- {
+- .start = -1, /* filled at runtime */
+- .end = -1, /* filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- .start = -1, /* filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device bcm63xx_hsspi_device = {
+- .name = "bcm63xx-hsspi",
+- .id = 0,
+- .num_resources = ARRAY_SIZE(spi_resources),
+- .resource = spi_resources,
+-};
+-
+-int __init bcm63xx_hsspi_register(void)
+-{
+- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
+- !BCMCPU_IS_63268())
+- return -ENODEV;
+-
+- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+- spi_resources[0].end = spi_resources[0].start;
+- spi_resources[0].end += RSET_HSSPI_SIZE - 1;
+- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
+-
+- return platform_device_register(&bcm63xx_hsspi_device);
+-}
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ /dev/null
+@@ -1,60 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
+- * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
+- */
+-
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/export.h>
+-#include <linux/platform_device.h>
+-#include <linux/err.h>
+-#include <linux/clk.h>
+-
+-#include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_spi.h>
+-#include <bcm63xx_regs.h>
+-
+-static struct resource spi_resources[] = {
+- {
+- .start = -1, /* filled at runtime */
+- .end = -1, /* filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- .start = -1, /* filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device bcm63xx_spi_device = {
+- .id = -1,
+- .num_resources = ARRAY_SIZE(spi_resources),
+- .resource = spi_resources,
+-};
+-
+-int __init bcm63xx_spi_register(void)
+-{
+- if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
+- return -ENODEV;
+-
+- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
+- spi_resources[0].end = spi_resources[0].start;
+- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
+-
+- if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
+- bcm63xx_spi_device.name = "bcm6348-spi",
+- spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1;
+- }
+-
+- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
+- BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
+- bcm63xx_spi_device.name = "bcm6358-spi",
+- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
+- }
+-
+- return platform_device_register(&bcm63xx_spi_device);
+-}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
++++ /dev/null
+@@ -1,9 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0 */
+-#ifndef BCM63XX_DEV_HSSPI_H
+-#define BCM63XX_DEV_HSSPI_H
+-
+-#include <linux/types.h>
+-
+-int bcm63xx_hsspi_register(void);
+-
+-#endif /* BCM63XX_DEV_HSSPI_H */
--- /dev/null
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+- dev-rng.o dev-uart.o dev-wdt.o \
++ dev-rng.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+ sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+--- a/arch/mips/bcm63xx/dev-uart.c
++++ /dev/null
+@@ -1,76 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+- */
+-
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/platform_device.h>
+-#include <bcm63xx_cpu.h>
+-
+-static struct resource uart0_resources[] = {
+- {
+- /* start & end filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- /* start filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct resource uart1_resources[] = {
+- {
+- /* start & end filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- /* start filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device bcm63xx_uart_devices[] = {
+- {
+- .name = "bcm63xx_uart",
+- .id = 0,
+- .num_resources = ARRAY_SIZE(uart0_resources),
+- .resource = uart0_resources,
+- },
+-
+- {
+- .name = "bcm63xx_uart",
+- .id = 1,
+- .num_resources = ARRAY_SIZE(uart1_resources),
+- .resource = uart1_resources,
+- }
+-};
+-
+-int __init bcm63xx_uart_register(unsigned int id)
+-{
+- if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
+- return -ENODEV;
+-
+- if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() &&
+- !BCMCPU_IS_6368()))
+- return -ENODEV;
+-
+- if (id == 0) {
+- uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0);
+- uart0_resources[0].end = uart0_resources[0].start +
+- RSET_UART_SIZE - 1;
+- uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
+- }
+-
+- if (id == 1) {
+- uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1);
+- uart1_resources[0].end = uart1_resources[0].start +
+- RSET_UART_SIZE - 1;
+- uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1);
+- }
+-
+- return platform_device_register(&bcm63xx_uart_devices[id]);
+-}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
++++ /dev/null
+@@ -1,7 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0 */
+-#ifndef BCM63XX_DEV_UART_H_
+-#define BCM63XX_DEV_UART_H_
+-
+-int bcm63xx_uart_register(unsigned int id);
+-
+-#endif /* BCM63XX_DEV_UART_H_ */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -32,8 +32,6 @@ struct board_info {
+ unsigned int has_ohci0:1;
+ unsigned int has_ehci0:1;
+ unsigned int has_usbd:1;
+- unsigned int has_uart0:1;
+- unsigned int has_uart1:1;
+ unsigned int use_fallback_sprom:1;
+
+ /* ethernet config */
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -20,7 +20,6 @@
+ #include <asm/prom.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_gpio.h>
+@@ -188,12 +187,6 @@ int __init board_register_devices(void)
+
+ bcm63xx_gpio_init();
+
+- if (board.has_uart0)
+- bcm63xx_uart_register(0);
+-
+- if (board.has_uart1)
+- bcm63xx_uart_register(1);
+-
+ if (board.has_pccard)
+ bcm63xx_pcmcia_register();
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -35,9 +35,6 @@ static struct board_info __initdata boar
+ .name = "CVG834G_E15R3921",
+ .expected_cpu_id = 0x3368,
+
+- .has_uart0 = 1,
+- .has_uart1 = 1,
+-
+ .has_enet0 = 1,
+ .has_pci = 1,
+
+@@ -67,7 +64,6 @@ static struct board_info __initdata boar
+ .name = "96328avng",
+ .expected_cpu_id = 0x6328,
+
+- .has_uart0 = 1,
+ .has_pci = 1,
+ .has_usbd = 0,
+ .use_fallback_sprom = 1,
+@@ -116,7 +112,6 @@ static struct board_info __initdata boar
+ .name = "96338GW",
+ .expected_cpu_id = 0x6338,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .enet0 = {
+ .force_speed_100 = 1,
+@@ -159,7 +154,6 @@ static struct board_info __initdata boar
+ .name = "96338W",
+ .expected_cpu_id = 0x6338,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .enet0 = {
+ .force_speed_100 = 1,
+@@ -204,8 +198,6 @@ static struct board_info __initdata boar
+ static struct board_info __initdata board_96345gw2 = {
+ .name = "96345GW2",
+ .expected_cpu_id = 0x6345,
+-
+- .has_uart0 = 1,
+ };
+ #endif
+
+@@ -217,7 +209,6 @@ static struct board_info __initdata boar
+ .name = "96348R",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_pci = 1,
+ .use_fallback_sprom = 1,
+@@ -262,7 +253,6 @@ static struct board_info __initdata boar
+ .name = "96348GW-10",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -315,7 +305,6 @@ static struct board_info __initdata boar
+ .name = "96348GW-11",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -370,7 +359,6 @@ static struct board_info __initdata boar
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -421,7 +409,6 @@ static struct board_info __initdata boar
+ .name = "F@ST2404",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -466,7 +453,6 @@ static struct board_info __initdata boar
+ .name = "DV201AMR",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_pci = 1,
+ .use_fallback_sprom = 1,
+ .has_ohci0 = 1,
+@@ -487,7 +473,6 @@ static struct board_info __initdata boar
+ .name = "96348GW-A",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -514,7 +499,6 @@ static struct board_info __initdata boar
+ .name = "96358VW",
+ .expected_cpu_id = 0x6358,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -567,7 +551,6 @@ static struct board_info __initdata boar
+ .name = "96358VW2",
+ .expected_cpu_id = 0x6358,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -617,7 +600,6 @@ static struct board_info __initdata boar
+ .name = "AGPF-S0",
+ .expected_cpu_id = 0x6358,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
--- /dev/null
+From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Feb 2015 17:52:32 +0100
+Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 262 -----------------------------
+ 1 file changed, 262 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -43,14 +43,6 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+
+- .leds = {
+- {
+- .name = "CVG834G:green:power",
+- .gpio = 37,
+- .default_trigger= "default-on",
+- },
+- },
+-
+ .ephy_reset_gpio = 36,
+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+ };
+@@ -72,35 +64,6 @@ static struct board_info __initdata boar
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+-
+- .leds = {
+- {
+- .name = "96328avng::ppp-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "96328avng::power",
+- .gpio = 4,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "96328avng::power-fail",
+- .gpio = 8,
+- .active_low = 1,
+- },
+- {
+- .name = "96328avng::wps",
+- .gpio = 9,
+- .active_low = 1,
+- },
+- {
+- .name = "96328avng::ppp",
+- .gpio = 11,
+- .active_low = 1,
+- },
+- },
+ };
+ #endif
+
+@@ -119,35 +82,6 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ses",
+- .gpio = 5,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- }
+- },
+ };
+
+ static struct board_info __initdata board_96338w = {
+@@ -159,35 +93,6 @@ static struct board_info __initdata boar
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+-
+- .leds = {
+- {
+- .name = "adsl",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ses",
+- .gpio = 5,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+ #endif
+
+@@ -217,36 +122,6 @@ static struct board_info __initdata boar
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+-
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96348gw_10 = {
+@@ -270,35 +145,6 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96348gw_11 = {
+@@ -324,35 +170,6 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96348gw = {
+@@ -374,35 +191,6 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_FAST2404 = {
+@@ -518,33 +306,6 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 15,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 22,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 23,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 4,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 5,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96358vw2 = {
+@@ -571,29 +332,6 @@ static struct board_info __initdata boar
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+-
+- .leds = {
+- {
+- .name = "adsl",
+- .gpio = 22,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 23,
+- },
+- {
+- .name = "power",
+- .gpio = 5,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_AGPFS0 = {
--- /dev/null
+From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
+From: Axel Gembe <ago@bastart.eu.org>
+Date: Mon, 12 May 2008 18:54:09 +0200
+Subject: [PATCH] bcm963xx: flashmap support
+
+Signed-off-by: Axel Gembe <ago@bastart.eu.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +----------------
+ drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++----
+ drivers/mtd/redboot.c | 13 +++++++++--
+ 3 files changed, 38 insertions(+), 26 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio
+ }
+ };
+
+-static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
++static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
+
+ static struct physmap_flash_data flash_data = {
+ .width = 2,
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru
+ int nulllen = 0;
+ int numslots;
+ unsigned long offset;
++ unsigned long fis_origin = 0;
+ #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
+ static char nullstring[] = "unallocated";
+ #endif
+@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru
+ goto out;
+ }
+
++ if (data && data->origin) {
++ fis_origin = data->origin;
++ } else {
++ for (i = 0; i < numslots; i++) {
++ if (!strncmp(buf[i].name, "RedBoot", 8)) {
++ fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
++ }
++ }
++ }
++
+ for (i = 0; i < numslots; i++) {
+ struct fis_list *new_fl, **prev;
+
+@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru
+ goto out;
+ }
+ new_fl->img = &buf[i];
+- if (data && data->origin)
+- buf[i].flash_base -= data->origin;
+- else
+- buf[i].flash_base &= master->size-1;
++ if (fis_origin)
++ buf[i].flash_base -= fis_origin;
++
++ buf[i].flash_base &= (master->size << 1) - 1;
+
+ /* I'm sure the JFFS2 code has done me permanent damage.
+ * I now think the following is _normal_
--- /dev/null
+--- a/include/linux/bcm963xx_tag.h
++++ b/include/linux/bcm963xx_tag.h
+@@ -92,8 +92,10 @@ struct bcm_tag {
+ __u32 rootfs_crc;
+ /* 224-227: CRC32 of kernel partition */
+ __u32 kernel_crc;
+- /* 228-235: Unused at present */
+- char reserved1[8];
++ /* 228-231: Unused at present */
++ char reserved1[4];
++ /* 222-235: Openwrt: real rootfs length */
++ __u32 real_rootfs_length;
+ /* 236-239: CRC32 of header excluding last 20 bytes */
+ __u32 header_crc;
+ /* 240-255: Unused at present */
+--- a/drivers/mtd/parsers/parser_imagetag.c
++++ b/drivers/mtd/parsers/parser_imagetag.c
+@@ -137,7 +137,8 @@ static int bcm963xx_parse_imagetag_parti
+ } else {
+ /* OpenWrt layout */
+ rootfsaddr = kerneladdr + kernellen;
+- rootfslen = spareaddr - rootfsaddr;
++ rootfslen = buf->real_rootfs_length;
++ spareaddr = rootfsaddr + rootfslen;
+ }
+ } else {
+ goto out;
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1637,7 +1637,7 @@ static int bcm_enet_change_mtu(struct ne
+ return -EBUSY;
+
+ /* add ethernet header + vlan tag size */
+- actual_mtu += VLAN_ETH_HLEN;
++ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
+
+ /*
+ * setup maximum size before we get overflow mark in
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -97,6 +97,8 @@ void __init board_early_setup(const stru
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G3_EXT_MII |
+ GPIO_MODE_6348_G0_EXT_MII;
++ else if (BCMCPU_IS_6358())
++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
+ }
+
+ bcm_gpio_writel(val, GPIO_MODE_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -652,6 +652,8 @@
+ #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
+ #define GPIO_MODE_6358_SERIAL_LED (1 << 10)
+ #define GPIO_MODE_6358_UTOPIA (1 << 12)
++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
+
+ #define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0)
+ #define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1)
--- /dev/null
+From 7fa63fdde703aaabaa7199ae879219737a98a3f3 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 6 Jan 2012 12:24:18 +0100
+Subject: [PATCH] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
+
+Only connect/disconnect the phy during probe and remove, not during any
+open/close. The phy seldom changes during the runtime, and disconnecting
+the phy during close will prevent it from keeping any configuration over
+a down/up cycle.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 158 +++++++++++++--------------
+ 1 file changed, 78 insertions(+), 80 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -870,10 +870,8 @@ static int bcm_enet_open(struct net_devi
+ struct bcm_enet_priv *priv;
+ struct sockaddr addr;
+ struct device *kdev;
+- struct phy_device *phydev;
+ int i, ret;
+ unsigned int size;
+- char phy_id[MII_BUS_ID_SIZE + 3];
+ void *p;
+ u32 val;
+
+@@ -881,40 +879,10 @@ static int bcm_enet_open(struct net_devi
+ kdev = &priv->pdev->dev;
+
+ if (priv->has_phy) {
+- /* connect to PHY */
+- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
+- priv->mii_bus->id, priv->phy_id);
+-
+- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
+- PHY_INTERFACE_MODE_MII);
+-
+- if (IS_ERR(phydev)) {
+- dev_err(kdev, "could not attach to PHY\n");
+- return PTR_ERR(phydev);
+- }
+-
+- /* mask with MAC supported features */
+- phydev->supported &= (SUPPORTED_10baseT_Half |
+- SUPPORTED_10baseT_Full |
+- SUPPORTED_100baseT_Half |
+- SUPPORTED_100baseT_Full |
+- SUPPORTED_Autoneg |
+- SUPPORTED_Pause |
+- SUPPORTED_MII);
+- phydev->advertising = phydev->supported;
+-
+- if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
+- phydev->advertising |= SUPPORTED_Pause;
+- else
+- phydev->advertising &= ~SUPPORTED_Pause;
+-
+- phy_attached_info(phydev);
+-
++ /* Reset state */
+ priv->old_link = 0;
+ priv->old_duplex = -1;
+ priv->old_pause = -1;
+- } else {
+- phydev = NULL;
+ }
+
+ /* mask all interrupts and request them */
+@@ -924,7 +892,7 @@ static int bcm_enet_open(struct net_devi
+
+ ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
+ if (ret)
+- goto out_phy_disconnect;
++ return ret;
+
+ ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0,
+ dev->name, dev);
+@@ -1086,8 +1054,8 @@ static int bcm_enet_open(struct net_devi
+ enet_dmac_writel(priv, priv->dma_chan_int_mask,
+ ENETDMAC_IRMASK, priv->tx_chan);
+
+- if (phydev)
+- phy_start(phydev);
++ if (priv->has_phy)
++ phy_start(dev->phydev);
+ else
+ bcm_enet_adjust_link(dev);
+
+@@ -1128,10 +1096,6 @@ out_freeirq_rx:
+ out_freeirq:
+ free_irq(dev->irq, dev);
+
+-out_phy_disconnect:
+- if (phydev)
+- phy_disconnect(phydev);
+-
+ return ret;
+ }
+
+@@ -1236,10 +1200,6 @@ static int bcm_enet_stop(struct net_devi
+ free_irq(priv->irq_rx, dev);
+ free_irq(dev->irq, dev);
+
+- /* release phy */
+- if (priv->has_phy)
+- phy_disconnect(dev->phydev);
+-
+ return 0;
+ }
+
+@@ -1805,14 +1765,49 @@ static int bcm_enet_probe(struct platfor
+
+ /* do minimal hardware init to be able to probe mii bus */
+ bcm_enet_hw_preinit(priv);
++ spin_lock_init(&priv->rx_lock);
++
++ /* init rx timeout (used for oom) */
++ init_timer(&priv->rx_timeout);
++ priv->rx_timeout.function = bcm_enet_refill_rx_timer;
++ priv->rx_timeout.data = (unsigned long)dev;
++
++ /* init the mib update lock&work */
++ mutex_init(&priv->mib_update_lock);
++ INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
++
++ /* zero mib counters */
++ for (i = 0; i < ENET_MIB_REG_COUNT; i++)
++ enet_writel(priv, 0, ENET_MIB_REG(i));
++
++ /* register netdevice */
++ dev->netdev_ops = &bcm_enet_ops;
++ netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
++
++ dev->ethtool_ops = &bcm_enet_ethtool_ops;
++ /* MTU range: 46 - 2028 */
++ dev->min_mtu = ETH_ZLEN - ETH_HLEN;
++ dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
++ SET_NETDEV_DEV(dev, &pdev->dev);
++
++ ret = register_netdev(dev);
++ if (ret)
++ goto out_uninit_hw;
++
++ netif_carrier_off(dev);
++ platform_set_drvdata(pdev, dev);
++ priv->pdev = pdev;
++ priv->net_dev = dev;
+
+ /* MII bus registration */
+ if (priv->has_phy) {
++ struct phy_device *phydev;
++ char phy_id[MII_BUS_ID_SIZE + 3];
+
+ priv->mii_bus = mdiobus_alloc();
+ if (!priv->mii_bus) {
+ ret = -ENOMEM;
+- goto out_uninit_hw;
++ goto out_unregister_netdev;
+ }
+
+ bus = priv->mii_bus;
+@@ -1836,6 +1831,35 @@ static int bcm_enet_probe(struct platfor
+ dev_err(&pdev->dev, "unable to register mdio bus\n");
+ goto out_free_mdio;
+ }
++
++ /* connect to PHY */
++ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
++ priv->mii_bus->id, priv->phy_id);
++
++ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
++ PHY_INTERFACE_MODE_MII);
++
++ if (IS_ERR(phydev)) {
++ dev_err(&pdev->dev, "could not attach to PHY\n");
++ goto out_unregister_mdio;
++ }
++
++ /* mask with MAC supported features */
++ phydev->supported &= (SUPPORTED_10baseT_Half |
++ SUPPORTED_10baseT_Full |
++ SUPPORTED_100baseT_Half |
++ SUPPORTED_100baseT_Full |
++ SUPPORTED_Autoneg |
++ SUPPORTED_Pause |
++ SUPPORTED_MII);
++ phydev->advertising = phydev->supported;
++
++ if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
++ phydev->advertising |= SUPPORTED_Pause;
++ else
++ phydev->advertising &= ~SUPPORTED_Pause;
++
++ phy_attached_info(phydev);
+ } else {
+
+ /* run platform code to initialize PHY device */
+@@ -1843,47 +1867,16 @@ static int bcm_enet_probe(struct platfor
+ pd->mii_config(dev, 1, bcm_enet_mdio_read_mii,
+ bcm_enet_mdio_write_mii)) {
+ dev_err(&pdev->dev, "unable to configure mdio bus\n");
+- goto out_uninit_hw;
++ goto out_unregister_netdev;
+ }
+ }
+
+- spin_lock_init(&priv->rx_lock);
+-
+- /* init rx timeout (used for oom) */
+- init_timer(&priv->rx_timeout);
+- priv->rx_timeout.function = bcm_enet_refill_rx_timer;
+- priv->rx_timeout.data = (unsigned long)dev;
+-
+- /* init the mib update lock&work */
+- mutex_init(&priv->mib_update_lock);
+- INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
+-
+- /* zero mib counters */
+- for (i = 0; i < ENET_MIB_REG_COUNT; i++)
+- enet_writel(priv, 0, ENET_MIB_REG(i));
+-
+- /* register netdevice */
+- dev->netdev_ops = &bcm_enet_ops;
+- netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
+-
+- dev->ethtool_ops = &bcm_enet_ethtool_ops;
+- /* MTU range: 46 - 2028 */
+- dev->min_mtu = ETH_ZLEN - ETH_HLEN;
+- dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
+- SET_NETDEV_DEV(dev, &pdev->dev);
+-
+- ret = register_netdev(dev);
+- if (ret)
+- goto out_unregister_mdio;
+-
+- netif_carrier_off(dev);
+- platform_set_drvdata(pdev, dev);
+- priv->pdev = pdev;
+- priv->net_dev = dev;
+-
+ return 0;
+
+ out_unregister_mdio:
++ if (dev->phydev)
++ phy_disconnect(dev->phydev);
++
+ if (priv->mii_bus)
+ mdiobus_unregister(priv->mii_bus);
+
+@@ -1891,6 +1884,9 @@ out_free_mdio:
+ if (priv->mii_bus)
+ mdiobus_free(priv->mii_bus);
+
++out_unregister_netdev:
++ unregister_netdev(dev);
++
+ out_uninit_hw:
+ /* turn off mdc clock */
+ enet_writel(priv, 0, ENET_MIISC_REG);
+@@ -1921,6 +1917,7 @@ static int bcm_enet_remove(struct platfo
+ enet_writel(priv, 0, ENET_MIISC_REG);
+
+ if (priv->has_phy) {
++ phy_disconnect(dev->phydev);
+ mdiobus_unregister(priv->mii_bus);
+ mdiobus_free(priv->mii_bus);
+ } else {
--- /dev/null
+From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 15 Jul 2012 20:08:57 +0200
+Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++
+ 2 files changed, 25 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -968,6 +968,19 @@
+ #define ENETSW_PORTOV_FDX_MASK (1 << 1)
+ #define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
+
++/* Port RGMII control register */
++#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x))
++#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7)
++#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
++#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4)
++#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4)
++#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4)
++#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4)
++#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0)
++
++/* Port RGMII timing register */
++#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x))
++
+ /* MDIO control register */
+ #define ENETSW_MDIOC_REG (0xb0)
+ #define ENETSW_MDIOC_EXT_MASK (1 << 16)
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2192,6 +2192,18 @@ static int bcm_enetsw_open(struct net_de
+ priv->sw_port_link[i] = 0;
+ }
+
++ /* enable external ports */
++ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
++ u8 rgmii_ctrl;
++
++ if (!priv->used_ports[i].used)
++ continue;
++
++ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
++ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
++ }
++
+ /* reset mib */
+ val = enetsw_readb(priv, ENETSW_GMCR_REG);
+ val |= ENETSW_GMCR_RST_MIB_MASK;
--- /dev/null
+From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 3 Jul 2011 15:00:38 +0200
+Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +
+ 2 files changed, 33 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -17,6 +17,9 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
+ #include <linux/mtd/spi-nor.h>
++#include <linux/of.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+@@ -66,6 +69,41 @@ void __init bcm63xx_flash_force_phys_bas
+ mtd_resources[0].end = end;
+ }
+
++static struct spi_board_info bcm63xx_spi_flash_info[] = {
++ {
++ .bus_num = 0,
++ .chip_select = 0,
++ .mode = 0,
++ .max_speed_hz = 781000,
++ .modalias = "m25p80",
++ },
++};
++
++static void bcm63xx_of_update_spi_flash_speed(struct device_node *np,
++ unsigned int new_hz)
++{
++ struct property *max_hz;
++ __be32 *hz;
++
++ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL);
++ if (!max_hz)
++ return;
++
++ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL);
++ if (!max_hz->name) {
++ kfree(max_hz);
++ return;
++ }
++
++ max_hz->value = max_hz + 1;
++ max_hz->length = sizeof(*hz);
++
++ hz = max_hz->value;
++ *hz = cpu_to_be32(new_hz);
++
++ of_update_property(np, max_hz);
++}
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ u32 val;
+@@ -73,9 +111,15 @@ static int __init bcm63xx_detect_flash_t
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6318_CPU_ID:
+ /* only support serial flash */
++ bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6328_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
++ if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
++
+ if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+@@ -94,12 +138,20 @@ static int __init bcm63xx_detect_flash_t
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6362_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
++ if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+ return BCM63XX_FLASH_TYPE_NAND;
+ case BCM6368_CPU_ID:
+ val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
++ if (val & STRAPBUS_6368_SPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
+ case STRAPBUS_6368_BOOT_SEL_NAND:
+ return BCM63XX_FLASH_TYPE_NAND;
+@@ -110,6 +162,11 @@ static int __init bcm63xx_detect_flash_t
+ }
+ case BCM63268_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++ if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+@@ -176,6 +233,7 @@ void __init bcm63xx_flash_detect(void)
+
+ int __init bcm63xx_flash_register(void)
+ {
++ struct device_node *np;
+ u32 val;
+
+ switch (flash_type) {
+@@ -195,8 +253,14 @@ int __init bcm63xx_flash_register(void)
+
+ return platform_device_register(&mtd_dev);
+ case BCM63XX_FLASH_TYPE_SERIAL:
+- pr_warn("unsupported serial flash detected\n");
+- return -ENODEV;
++ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor");
++ if (np) {
++ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz);
++ of_node_put(np);
++ return 0;
++ } else {
++ return -ENODEV;
++ }
+ case BCM63XX_FLASH_TYPE_NAND:
+ pr_warn("unsupported NAND flash detected\n");
+ return -ENODEV;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -709,6 +709,7 @@
+ #define GPIO_STRAPBUS_REG 0x40
+ #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
+ #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
++#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
+ #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
+ #define STRAPBUS_6368_BOOT_SEL_NAND 0
+ #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
+@@ -1565,6 +1566,7 @@
+ #define IDDQ_CTRL_63268_USBH (1 << 4)
+
+ #define MISC_STRAPBUS_6328_REG 0x240
++#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4)
+ #define STRAPBUS_6328_FCVO_SHIFT 7
+ #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
+ #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
--- /dev/null
+From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:40:03 +0200
+Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 9 ++++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 10 ++++++++++
+ 2 files changed, 18 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -31,6 +31,7 @@
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
++#include <pci_ath9k_fixup.h>
+
+ #include "board_common.h"
+
+@@ -177,6 +178,7 @@ static struct of_device_id of_ids[] = {
+ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
++ int i;
+
+ #if CONFIG_OF
+ if (of_have_populated_dt()) {
+@@ -241,6 +243,10 @@ int __init board_register_devices(void)
+ board.ephy_reset_gpio_flags);
+ }
+
++ /* register any fixups */
++ for (i = 0; i < board.has_caldata; i++)
++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++
+ return 0;
+ }
+
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -9,6 +9,7 @@
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_fallback_sprom.h>
++#include <pci_ath9k_fixup.h>
+
+ /*
+ * flash mapping
+@@ -16,6 +17,11 @@
+ #define BCM963XX_CFE_VERSION_OFFSET 0x570
+ #define BCM963XX_NVRAM_OFFSET 0x580
+
++struct ath9k_caldata {
++ unsigned int slot;
++ u32 caldata_offset;
++};
++
+ /*
+ * board definition
+ */
+@@ -33,6 +39,10 @@ struct board_info {
+ unsigned int has_ehci0:1;
+ unsigned int has_usbd:1;
+ unsigned int use_fallback_sprom:1;
++ unsigned int has_caldata:2;
++
++ /* wifi calibration data config */
++ struct ath9k_caldata caldata[2];
+
+ /* ethernet config */
+ struct bcm63xx_enet_platform_data enet0;
--- /dev/null
+From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 13 Jan 2014 12:12:30 +0100
+Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 5 +++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -270,3 +270,8 @@ int __init bcm63xx_flash_register(void)
+ return -ENODEV;
+ }
+ }
++
++int bcm63xx_flash_get_type(void)
++{
++ return flash_type;
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -14,4 +14,6 @@ void bcm63xx_flash_force_phys_base_addre
+
+ int __init bcm63xx_flash_register(void);
+
++int bcm63xx_flash_get_type(void);
++
+ #endif /* __BCM63XX_FLASH_H */
--- /dev/null
+From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:36:11 +0200
+Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
+
+---
+ arch/mips/bcm63xx/Makefile | 3 +-
+ arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 +
+ 3 files changed, 199 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+- sprom.o
++ pci-ath9k-fixup.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -0,0 +1,200 @@
++/*
++ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ * Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ * Based on
++ *
++ * Atheros AP94 reference board PCI initialization
++ *
++ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/if_ether.h>
++#include <linux/pci.h>
++#include <linux/delay.h>
++#include <linux/ath9k_platform.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_flash.h>
++#include <pci_ath9k_fixup.h>
++
++#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
++
++struct ath9k_fixup {
++ unsigned slot;
++ u8 mac[ETH_ALEN];
++ struct ath9k_platform_data pdata;
++};
++
++static int ath9k_num_fixups;
++static struct ath9k_fixup ath9k_fixups[2] = {
++ {
++ .slot = 255,
++ .pdata = {
++ .led_pin = -1,
++ },
++ },
++ {
++ .slot = 255,
++ .pdata = {
++ .led_pin = -1,
++ },
++ },
++};
++
++static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
++{
++ u32 addr;
++
++ if (BCMCPU_IS_6328()) {
++ addr = 0x18000000;
++ } else {
++ addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ addr &= MPI_CSBASE_BASE_MASK;
++ }
++
++ switch (bcm63xx_flash_get_type()) {
++ case BCM63XX_FLASH_TYPE_PARALLEL:
++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++ return eeprom;
++ case BCM63XX_FLASH_TYPE_SERIAL:
++ /* the first megabyte is memory mapped */
++ if (offset < 0x100000) {
++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++ return eeprom;
++ }
++
++ if (BCMCPU_IS_6328()) {
++ /* we can change the memory mapped megabyte */
++ bcm_hsspi_writel(offset & 0xf00000, 0x18);
++ memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++ bcm_hsspi_writel(0, 0x18);
++ return eeprom;
++ }
++ /* can't do anything here without talking to the SPI controller. */
++ case BCM63XX_FLASH_TYPE_NAND:
++ default:
++ return NULL;
++ }
++}
++
++static void ath9k_pci_fixup(struct pci_dev *dev)
++{
++ void __iomem *mem;
++ struct ath9k_platform_data *pdata = NULL;
++ struct pci_dev *bridge = pci_upstream_bridge(dev);
++ u16 *cal_data = NULL;
++ u16 cmd;
++ u32 bar0;
++ u32 val;
++ unsigned i;
++
++ for (i = 0; i < ath9k_num_fixups; i++) {
++ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
++ continue;
++
++ cal_data = ath9k_fixups[i].pdata.eeprom_data;
++ pdata = &ath9k_fixups[i].pdata;
++ break;
++ }
++
++ if (cal_data == NULL)
++ return;
++
++ if (*cal_data != 0xa55a) {
++ pr_err("pci %s: invalid calibration data\n", pci_name(dev));
++ return;
++ }
++
++ pr_info("pci %s: fixup device configuration\n", pci_name(dev));
++
++ switch (bcm63xx_get_cpu_id()) {
++ case BCM6328_CPU_ID:
++ val = BCM_PCIE_MEM_BASE_PA_6328;
++ break;
++ case BCM6348_CPU_ID:
++ case BCM6358_CPU_ID:
++ case BCM6368_CPU_ID:
++ val = BCM_PCI_MEM_BASE_PA;
++ break;
++ default:
++ BUG();
++ }
++
++ mem = ioremap(val, 0x10000);
++ if (!mem) {
++ pr_err("pci %s: ioremap error\n", pci_name(dev));
++ return;
++ }
++
++ if (bridge)
++ pci_enable_device(bridge);
++
++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
++
++ pci_read_config_word(dev, PCI_COMMAND, &cmd);
++ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
++ pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++ /* set offset to first reg address */
++ cal_data += 3;
++ while(*cal_data != 0xffff) {
++ u32 reg;
++ reg = *cal_data++;
++ val = *cal_data++;
++ val |= (*cal_data++) << 16;
++
++ writel(val, mem + reg);
++ udelay(100);
++ }
++
++ pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
++ dev->vendor = val & 0xffff;
++ dev->device = (val >> 16) & 0xffff;
++
++ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
++ dev->revision = val & 0xff;
++ dev->class = val >> 8; /* upper 3 bytes */
++
++ pci_read_config_word(dev, PCI_COMMAND, &cmd);
++ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
++ pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
++
++ if (bridge)
++ pci_disable_device(bridge);
++
++ iounmap(mem);
++
++ dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
++
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++{
++ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
++ return;
++
++ ath9k_fixups[ath9k_num_fixups].slot = slot;
++
++ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
++ return;
++
++ if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
++ return;
++
++ ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
++ ath9k_num_fixups++;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -0,0 +1,7 @@
++#ifndef _PCI_ATH9K_FIXUP
++#define _PCI_ATH9K_FIXUP
++
++
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++
++#endif /* _PCI_ATH9K_FIXUP */
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -2,6 +2,7 @@
+ #define _PCI_ATH9K_FIXUP
+
+
+-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check) __init;
+
+ #endif /* _PCI_ATH9K_FIXUP */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -20,6 +20,7 @@
+ struct ath9k_caldata {
+ unsigned int slot;
+ u32 caldata_offset;
++ unsigned int endian_check:1;
+ };
+
+ /*
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -182,12 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+
+-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check)
+ {
+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ return;
+
+ ath9k_fixups[ath9k_num_fixups].slot = slot;
++ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
+
+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ return;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -245,7 +245,8 @@ int __init board_register_devices(void)
+
+ /* register any fixups */
+ for (i = 0; i < board.has_caldata; i++)
+- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
++ board.caldata[i].endian_check);
+
+ return 0;
+ }
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -246,7 +246,7 @@ int __init board_register_devices(void)
+ /* register any fixups */
+ for (i = 0; i < board.has_caldata; i++)
+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+- board.caldata[i].endian_check);
++ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
+
+ return 0;
+ }
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -183,13 +183,15 @@ static void ath9k_pci_fixup(struct pci_d
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+
+ void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+- unsigned endian_check)
++ unsigned endian_check, int led_pin, bool led_active_high)
+ {
+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ return;
+
+ ath9k_fixups[ath9k_num_fixups].slot = slot;
+ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
++ ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin;
++ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high;
+
+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ return;
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -21,6 +21,8 @@ struct ath9k_caldata {
+ unsigned int slot;
+ u32 caldata_offset;
+ unsigned int endian_check:1;
++ int led_pin;
++ bool led_active_high;
+ };
+
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -3,6 +3,6 @@
+
+
+ void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+- unsigned endian_check) __init;
++ unsigned endian_check, int led_pin, bool led_active_high) __init;
+
+ #endif /* _PCI_ATH9K_FIXUP */
--- /dev/null
+From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 7 Jan 2013 17:45:39 +0100
+Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
+
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++-
+ arch/mips/bcm63xx/dev-flash.c | 2 +-
+ arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +-
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++-
+ .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++
+ 7 files changed, 104 insertions(+), 8 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+- pci-ath9k-fixup.o sprom.o
++ pci-ath9k-fixup.o pci-rt2x00-fixup.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -32,6 +32,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+
+ #include "board_common.h"
+
+@@ -244,9 +245,19 @@ int __init board_register_devices(void)
+ }
+
+ /* register any fixups */
+- for (i = 0; i < board.has_caldata; i++)
+- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
++ for (i = 0; i < board.has_caldata; i++) {
++ switch (board.caldata[i].vendor) {
++ case PCI_VENDOR_ID_ATHEROS:
++ pci_enable_ath9k_fixup(board.caldata[i].slot,
++ board.caldata[i].caldata_offset, board.caldata[i].endian_check,
++ board.caldata[i].led_pin, board.caldata[i].led_active_high);
++ break;
++ case PCI_VENDOR_ID_RALINK:
++ pci_enable_rt2x00_fixup(board.caldata[i].slot,
++ board.caldata[i].eeprom);
++ break;
++ }
++ }
+
+ return 0;
+ }
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
+@@ -0,0 +1,72 @@
++/*
++ * Broadcom BCM63XX RT2x00 EEPROM fixup helper.
++ *
++ * Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
++ *
++ * Based on
++ *
++ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/if_ether.h>
++#include <linux/pci.h>
++#include <linux/platform_device.h>
++#include <linux/rt2x00_platform.h>
++
++#include <bcm63xx_nvram.h>
++#include <pci_rt2x00_fixup.h>
++
++struct rt2x00_fixup {
++ unsigned slot;
++ u8 mac[ETH_ALEN];
++ struct rt2x00_platform_data pdata;
++};
++
++static int rt2x00_num_fixups;
++static struct rt2x00_fixup rt2x00_fixups[2] = {
++ {
++ .slot = 255,
++ },
++ {
++ .slot = 255,
++ },
++};
++
++static void rt2x00_pci_fixup(struct pci_dev *dev)
++{
++ unsigned i;
++ struct rt2x00_platform_data *pdata = NULL;
++
++ for (i = 0; i < rt2x00_num_fixups; i++) {
++ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
++ continue;
++
++ pdata = &rt2x00_fixups[i].pdata;
++ break;
++ }
++
++ dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
++
++void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
++{
++ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
++ return;
++
++ rt2x00_fixups[rt2x00_num_fixups].slot = slot;
++ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
++
++ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
++ return;
++
++ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
++ rt2x00_num_fixups++;
++}
++
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -10,6 +10,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+
+ /*
+ * flash mapping
+@@ -17,12 +18,16 @@
+ #define BCM963XX_CFE_VERSION_OFFSET 0x570
+ #define BCM963XX_NVRAM_OFFSET 0x580
+
+-struct ath9k_caldata {
++struct bcm63xx_caldata {
++ unsigned int vendor;
+ unsigned int slot;
+ u32 caldata_offset;
++ /* Atheros */
+ unsigned int endian_check:1;
+ int led_pin;
+ bool led_active_high;
++ /* Ralink */
++ char* eeprom;
+ };
+
+ /*
+@@ -45,7 +50,7 @@ struct board_info {
+ unsigned int has_caldata:2;
+
+ /* wifi calibration data config */
+- struct ath9k_caldata caldata[2];
++ struct bcm63xx_caldata caldata[2];
+
+ /* ethernet config */
+ struct bcm63xx_enet_platform_data enet0;
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+@@ -0,0 +1,9 @@
++#ifndef _PCI_RT2X00_FIXUP
++#define _PCI_RT2X00_FIXUP
++
++#define PCI_VENDOR_ID_RALINK 0x1814
++
++void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
++
++#endif /* _PCI_RT2X00_FIXUP */
++
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+@@ -332,6 +332,9 @@ struct bcm_enet_priv {
+ struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
+ int sw_port_link[ENETSW_MAX_PORT];
+
++ /* platform device for associated switch */
++ struct platform_device *b53_device;
++
+ /* used to poll switch port state */
+ struct timer_list swphy_poll;
+ spinlock_t enetsw_mdio_lock;
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -30,6 +30,7 @@
+ #include <linux/dma-mapping.h>
+ #include <linux/platform_device.h>
+ #include <linux/if_vlan.h>
++#include <linux/platform_data/b53.h>
+
+ #include <bcm63xx_dev_enet.h>
+ #include "bcm63xx_enet.h"
+@@ -1937,7 +1938,8 @@ static int bcm_enet_remove(struct platfo
+ return 0;
+ }
+
+-struct platform_driver bcm63xx_enet_driver = {
++
++static struct platform_driver bcm63xx_enet_driver = {
+ .probe = bcm_enet_probe,
+ .remove = bcm_enet_remove,
+ .driver = {
+@@ -1946,6 +1948,42 @@ struct platform_driver bcm63xx_enet_driv
+ },
+ };
+
++struct b53_platform_data bcm63xx_b53_pdata = {
++ .chip_id = 0x6300,
++ .big_endian = 1,
++};
++
++struct platform_device bcm63xx_b53_dev = {
++ .name = "b53-switch",
++ .id = -1,
++ .dev = {
++ .platform_data = &bcm63xx_b53_pdata,
++ },
++};
++
++static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask)
++{
++ int ret;
++
++ bcm63xx_b53_pdata.regs = priv->base;
++ bcm63xx_b53_pdata.enabled_ports = port_mask;
++ bcm63xx_b53_pdata.alias = priv->net_dev->name;
++
++ ret = platform_device_register(&bcm63xx_b53_dev);
++ if (!ret)
++ priv->b53_device = &bcm63xx_b53_dev;
++
++ return ret;
++}
++
++static void bcmenet_switch_unregister(struct bcm_enet_priv *priv)
++{
++ if (priv->b53_device)
++ platform_device_unregister(&bcm63xx_b53_dev);
++
++ priv->b53_device = NULL;
++}
++
+ /*
+ * switch mii access callbacks
+ */
+@@ -2204,29 +2242,6 @@ static int bcm_enetsw_open(struct net_de
+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ }
+
+- /* reset mib */
+- val = enetsw_readb(priv, ENETSW_GMCR_REG);
+- val |= ENETSW_GMCR_RST_MIB_MASK;
+- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+- mdelay(1);
+- val &= ~ENETSW_GMCR_RST_MIB_MASK;
+- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+- mdelay(1);
+-
+- /* force CPU port state */
+- val = enetsw_readb(priv, ENETSW_IMPOV_REG);
+- val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
+- enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
+-
+- /* enable switch forward engine */
+- val = enetsw_readb(priv, ENETSW_SWMODE_REG);
+- val |= ENETSW_SWMODE_FWD_EN_MASK;
+- enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
+-
+- /* enable jumbo on all ports */
+- enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
+- enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
+-
+ /* initialize flow control buffer allocation */
+ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
+ ENETDMA_BUFALLOC_REG(priv->rx_chan));
+@@ -2685,6 +2700,9 @@ static int bcm_enetsw_probe(struct platf
+ struct bcm63xx_enetsw_platform_data *pd;
+ struct resource *res_mem;
+ int ret, irq_rx, irq_tx;
++ unsigned i, num_ports = 0;
++ u16 port_mask = BIT(8);
++ u8 val;
+
+ if (!bcm_enet_shared_base[0])
+ return -EPROBE_DEFER;
+@@ -2767,6 +2785,43 @@ static int bcm_enetsw_probe(struct platf
+ priv->pdev = pdev;
+ priv->net_dev = dev;
+
++ /* reset mib */
++ val = enetsw_readb(priv, ENETSW_GMCR_REG);
++ val |= ENETSW_GMCR_RST_MIB_MASK;
++ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++ mdelay(1);
++ val &= ~ENETSW_GMCR_RST_MIB_MASK;
++ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++ mdelay(1);
++
++ /* force CPU port state */
++ val = enetsw_readb(priv, ENETSW_IMPOV_REG);
++ val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
++ enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
++
++ /* enable switch forward engine */
++ val = enetsw_readb(priv, ENETSW_SWMODE_REG);
++ val |= ENETSW_SWMODE_FWD_EN_MASK;
++ enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
++
++ /* enable jumbo on all ports */
++ enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
++ enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
++
++ for (i = 0; i < priv->num_ports; i++) {
++ struct bcm63xx_enetsw_port *port = &priv->used_ports[i];
++
++ if (!port->used)
++ continue;
++
++ num_ports++;
++ port_mask |= BIT(i);
++ }
++
++ /* only register if there is more than one external port */
++ if (num_ports > 1)
++ bcmenet_switch_register(priv, port_mask);
++
+ return 0;
+
+ out_disable_clk:
+@@ -2788,6 +2843,9 @@ static int bcm_enetsw_remove(struct plat
+ priv = netdev_priv(dev);
+ unregister_netdev(dev);
+
++ /* remove switch */
++ bcmenet_switch_unregister(priv);
++
+ clk_disable_unprepare(priv->mac_clk);
+
+ free_netdev(dev);
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2744,9 +2744,9 @@ static int bcm_enetsw_probe(struct platf
+ if (ret)
+ goto out;
+
+- priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
+- if (IS_ERR(priv->base)) {
+- ret = PTR_ERR(priv->base);
++ priv->base = devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem));
++ if (priv->base == NULL) {
++ ret = -ENOMEM;
+ goto out;
+ }
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -77,6 +77,8 @@ static struct board_info __initdata boar
+
+ .has_enet0 = 1,
+ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -90,6 +92,8 @@ static struct board_info __initdata boar
+
+ .has_enet0 = 1,
+ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -138,6 +142,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -162,6 +168,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -186,6 +194,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -208,6 +218,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -231,6 +243,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -252,6 +266,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -271,6 +287,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -298,6 +316,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -323,6 +343,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -348,6 +370,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -371,6 +395,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -46,7 +46,7 @@ static struct board_info __initdata boar
+ .ephy_reset_gpio = 36,
+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_3368 */
+
+ /*
+ * known 6328 boards
+@@ -65,7 +65,7 @@ static struct board_info __initdata boar
+ .port_no = 0,
+ },
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+ * known 6338 boards
+@@ -98,7 +98,7 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6338 */
+
+ /*
+ * known 6345 boards
+@@ -108,7 +108,7 @@ static struct board_info __initdata boar
+ .name = "96345GW2",
+ .expected_cpu_id = 0x6345,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6345 */
+
+ /*
+ * known 6348 boards
+@@ -295,7 +295,7 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+ * known 6358 boards
+@@ -403,7 +403,7 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+ * all boards
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -295,6 +295,21 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
++
++static struct board_info __initdata board_96348_D4PW = {
++ .name = "D-4P-W",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -431,6 +446,7 @@ static const struct board_info __initcon
+ &board_DV201AMR,
+ &board_96348gw_a,
+ &board_rta1025w_16,
++ &board_96348_D4PW,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -462,6 +478,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -418,6 +418,60 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
++
++static struct board_info __initdata board_nb4_ser_r0 = {
++ .name = "NB4-SER-r0",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++};
++
++static struct board_info __initdata board_nb4_fxc_r1 = {
++ .name = "NB4-FXC-r1",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -454,6 +508,8 @@ static const struct board_info __initcon
+ &board_96358vw2,
+ &board_AGPFS0,
+ &board_DWVS0,
++ &board_nb4_ser_r0,
++ &board_nb4_fxc_r1,
+ #endif
+ };
+
+@@ -495,6 +551,8 @@ static struct of_device_id const bcm963x
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
++ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -98,6 +98,20 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++static struct board_info __initdata board_96338w2_e7t = {
++ .name = "96338W2_E7T",
++ .expected_cpu_id = 0x6338,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+
+ /*
+@@ -487,6 +501,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+ &board_96338w,
++ &board_96338w2_e7t,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
+@@ -524,6 +539,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -385,6 +385,25 @@ static struct board_info __initdata boar
+ .num_usbh_ports = 2,
+ };
+
++static struct board_info __initdata board_CPVA642 = {
++ .name = "CPVA642",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++};
++
++
+ static struct board_info __initdata board_AGPFS0 = {
+ .name = "AGPF-S0",
+ .expected_cpu_id = 0x6358,
+@@ -522,6 +541,7 @@ static const struct board_info __initcon
+ &board_96358vw,
+ &board_96358vw2,
+ &board_AGPFS0,
++ &board_CPVA642,
+ &board_DWVS0,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+@@ -569,6 +589,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
++ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -452,6 +452,22 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ };
+
++/* D-Link DSL-274xB revison C2/C3 */
++static struct board_info __initdata board_dsl_274xb_rev_c = {
++ .name = "AW4139",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+ static struct board_info __initdata board_nb4_ser_r0 = {
+ .name = "NB4-SER-r0",
+ .expected_cpu_id = 0x6358,
+@@ -543,6 +559,7 @@ static const struct board_info __initcon
+ &board_AGPFS0,
+ &board_CPVA642,
+ &board_DWVS0,
++ &board_dsl_274xb_rev_c,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ #endif
+@@ -582,6 +599,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -324,6 +324,36 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++static struct sprom_fixup __initdata spw500v_fixups[] = {
++ { .offset = 46, .value = 0x3046 },
++ { .offset = 47, .value = 0x15a7 },
++ { .offset = 48, .value = 0xfa89 },
++ { .offset = 49, .value = 0xfe79 },
++ { .offset = 57, .value = 0x6a49 },
++};
++
++static struct board_info __initdata board_spw500v = {
++ .name = "SPW500V",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = spw500v_fixups,
++ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -551,6 +581,7 @@ static const struct board_info __initcon
+ &board_96348gw_a,
+ &board_rta1025w_16,
+ &board_96348_D4PW,
++ &board_spw500v,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -592,6 +623,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
++ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -217,6 +217,48 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ };
+
++static struct board_info __initdata board_gw6200 = {
++ .name = "GW6200",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++};
++
++static struct board_info __initdata board_gw6000 = {
++ .name = "GW6000",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++};
++
++
++
+ static struct board_info __initdata board_FAST2404 = {
+ .name = "F@ST2404",
+ .expected_cpu_id = 0x6348,
+@@ -574,6 +616,8 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ &board_96348r,
+ &board_96348gw,
++ &board_gw6000,
++ &board_gw6200,
+ &board_96348gw_10,
+ &board_96348gw_11,
+ &board_FAST2404,
+@@ -624,6 +668,8 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
++ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
++ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -396,6 +396,31 @@ static struct board_info __initdata boar
+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
+ },
+ };
++
++static struct board_info __initdata board_96348sv = {
++ .name = "MAGIC",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ /* it has BP_ENET_EXTERNAL_PHY */
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -626,6 +651,7 @@ static const struct board_info __initcon
+ &board_rta1025w_16,
+ &board_96348_D4PW,
+ &board_spw500v,
++ &board_96348sv,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -670,6 +696,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
++ { .compatible = "telsey,magic", .data = &board_96348sv, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -618,6 +618,32 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+ };
++
++static struct board_info __initdata board_HW553 = {
++ .name = "HW553",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -663,6 +689,7 @@ static const struct board_info __initcon
+ &board_dsl_274xb_rev_c,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
++ &board_HW553,
+ #endif
+ };
+
+@@ -706,6 +733,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -112,6 +112,20 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++static struct board_info __initdata board_rta1320_16m = {
++ .name = "RTA1320_16M",
++ .expected_cpu_id = 0x6338,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+
+ /*
+@@ -660,6 +674,7 @@ static const struct board_info __initcon
+ &board_96338gw,
+ &board_96338w,
+ &board_96338w2_e7t,
++ &board_rta1320_16m,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
+@@ -704,6 +719,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
+ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -658,6 +658,20 @@ static struct board_info __initdata boar
+ .pci_dev = 1,
+ },
+ };
++
++ /* T-Home Speedport W 303V Typ B */
++static struct board_info __initdata board_spw303v = {
++ .name = "96358-502V",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -705,6 +719,7 @@ static const struct board_info __initcon
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ &board_HW553,
++ &board_spw303v,
+ #endif
+ };
+
+@@ -756,6 +771,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
++ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -435,6 +435,26 @@ static struct board_info __initdata boar
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+ };
++
++static struct board_info __initdata board_V2500V_BB = {
++ .name = "V2500V_BB",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -707,6 +727,7 @@ static const struct board_info __initcon
+ &board_96348_D4PW,
+ &board_spw500v,
+ &board_96348sv,
++ &board_V2500V_BB,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -746,6 +767,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+@@ -805,6 +827,22 @@ void __init board_bcm963xx_init(void)
+ val &= MPI_CSBASE_BASE_MASK;
+ }
+ boot_addr = (u8 *)KSEG1ADDR(val);
++ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
++
++ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
++ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
++ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
++ /* Do an early check of CFE and then select bank 0 */
++
++ if (boot_addr == (u8 *)0xbf800000) {
++ u8 *tmp_boot_addr = (u8*)0xbfc00000;
++
++ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
++ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
++ pr_info("V2500V: nvram bank 0\n");
++ boot_addr = tmp_boot_addr;
++ }
++ }
+
+ /* dump cfe version */
+ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -21,6 +21,7 @@
+ #include <linux/spi/spi.h>
+ #include <linux/spi/flash.h>
+
++#include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+ #include <bcm63xx_regs.h>
+@@ -247,6 +248,13 @@ int __init bcm63xx_flash_register(void)
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+
++ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
++ /* Loading from CFE always uses Bank 0 */
++ if (!strcmp(board_get_name(), "V2500V_BB")) {
++ pr_info("V2500V: Start in Bank 0\n");
++ val = val + 0x400000; // Select Bank 0 start address
++ }
++
+ mtd_resources[0].start = val;
+ mtd_resources[0].end = 0x1FFFFFFF;
+ }
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -208,6 +208,24 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++
++/* BT Voyager 2110 */
++static struct board_info __initdata board_V2110 = {
++ .name = "V2110",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -728,6 +746,7 @@ static const struct board_info __initcon
+ &board_spw500v,
+ &board_96348sv,
+ &board_V2500V_BB,
++ &board_V2110,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -767,6 +786,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
--- /dev/null
+From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:55:52 +0100
+Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
+
+---
+ arch/mips/bcm63xx/boards/Kconfig | 6 +
+ arch/mips/bcm63xx/boards/Makefile | 1 +
+ arch/mips/bcm63xx/boards/board_common.c | 2 +-
+ arch/mips/bcm63xx/boards/board_common.h | 6 +
+ arch/mips/bcm63xx/boards/board_livebox.c | 215 ++++++++++++++++++++++++++++++
+ 5 files changed, 229 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -13,4 +13,10 @@ config BOARD_BCM963XX
+ default y
+ help
+
++config BOARD_LIVEBOX
++ bool "Inventel Livebox(es) boards"
++ select SSB
++ help
++ Inventel Livebox boards using the RedBoot bootloader.
++
+ endmenu
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1,2 +1,3 @@
+ obj-y += board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
++obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -54,7 +54,7 @@ void __init board_prom_init(void)
+ if (fw_arg3 == CFE_EPTSEAL)
+ board_bcm963xx_init();
+ else
+- panic("unsupported bootloader detected");
++ board_livebox_init();
+ }
+
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -24,4 +24,10 @@ static inline void board_of_device_prese
+ }
+ #endif
+
++#if defined(CONFIG_BOARD_LIVEBOX)
++void board_livebox_init(void);
++#else
++static inline void board_livebox_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_livebox.c
+@@ -0,0 +1,155 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/input.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_dev_flash.h>
++#include <board_bcm963xx.h>
++
++#include "board_common.h"
++
++#define PFX "board_livebox: "
++
++static unsigned int mac_addr_used = 0;
++
++/*
++ * known 6348 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6348
++static struct board_info __initdata board_livebox_blue5g = {
++ .name = "Livebox-blue-5g",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 31,
++ },
++
++ .ephy_reset_gpio = 6,
++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++};
++#endif
++
++/*
++ * all boards
++ */
++static const struct board_info __initdata *bcm963xx_boards[] = {
++#ifdef CONFIG_BCM63XX_CPU_6348
++ &board_livebox_blue5g
++#endif
++};
++
++static struct of_device_id const livebox_boards_dt[] = {
++ { .compatible = "inventel,livebox-1", .data = &board_livebox_blue5g, },
++ { }
++};
++
++/*
++ * register & return a new board mac address
++ */
++static int livebox_get_mac_address(u8 *mac)
++{
++ u8 *p;
++ int count;
++
++ memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN);
++
++ p = mac + ETH_ALEN - 1;
++ count = mac_addr_used;
++
++ while (count--) {
++ do {
++ (*p)++;
++ if (*p != 0)
++ break;
++ p--;
++ } while (p != mac);
++ }
++
++ if (p == mac) {
++ printk(KERN_ERR PFX "unable to fetch mac address\n");
++ return -ENODEV;
++ }
++ mac_addr_used++;
++
++ return 0;
++}
++
++/*
++ * early init callback
++ */
++#define LIVEBOX_GPIO_DETECT_MASK 0x000000ff
++#define LIVEBOX_BOOT_ADDR 0x1e400000
++
++#define LIVEBOX_HW_BLUE5G_9 0x90
++
++void __init board_livebox_init(void)
++{
++ u32 val;
++ u8 hw_version;
++ const struct board_info *board;
++ const struct of_device_id *board_match;
++
++ /* find board by compat */
++ board_match = bcm63xx_match_board(livebox_boards_dt);
++ if (board_match) {
++ board = board_match->data;
++ } else {
++ /* Get hardware version */
++ val = bcm_gpio_readl(GPIO_CTL_LO_REG);
++ val &= ~LIVEBOX_GPIO_DETECT_MASK;
++ bcm_gpio_writel(val, GPIO_CTL_LO_REG);
++
++ hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG);
++ hw_version &= LIVEBOX_GPIO_DETECT_MASK;
++
++ switch (hw_version) {
++ case LIVEBOX_HW_BLUE5G_9:
++ printk(KERN_INFO PFX "Livebox BLUE5G.9\n");
++ board = bcm963xx_boards[0];
++ break;
++ default:
++ printk(KERN_INFO PFX "Unknown livebox version: %02x\n",
++ hw_version);
++ /* use default livebox configuration */
++ board = bcm963xx_boards[0];
++ break;
++ }
++ }
++
++ /* use default livebox configuration */
++ board_early_setup(board, livebox_get_mac_address);
++
++ /* read base address of boot chip select (0) */
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++ if (val != LIVEBOX_BOOT_ADDR) {
++ printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n",
++ val, LIVEBOX_BOOT_ADDR);
++ bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff);
++ }
++}
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -226,6 +226,33 @@ static struct board_info __initdata boar
+ };
+
+
++static struct board_info __initdata board_ct536_ct5621 = {
++ .name = "CT536_CT5621",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 0,
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -747,6 +774,7 @@ static const struct board_info __initcon
+ &board_96348sv,
+ &board_V2500V_BB,
+ &board_V2110,
++ &board_ct536_ct5621,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -788,6 +816,8 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
++ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
++ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -626,6 +626,7 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
++ .has_ehci0 = 1,
+ };
+
+ /* D-Link DSL-274xB revison C2/C3 */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -253,6 +253,30 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_96348A_122 = {
++ .name = "96348A-122",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -776,6 +800,7 @@ static const struct board_info __initcon
+ &board_V2500V_BB,
+ &board_V2110,
+ &board_ct536_ct5621,
++ &board_96348A_122,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -818,6 +843,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
++ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -225,6 +225,33 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_CPVA502plus = {
++ .name = "CPVA502+",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ },
++
++ .ephy_reset_gpio = 4,
++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
+
+ static struct board_info __initdata board_ct536_ct5621 = {
+ .name = "CT536_CT5621",
+@@ -801,6 +828,7 @@ static const struct board_info __initcon
+ &board_V2110,
+ &board_ct536_ct5621,
+ &board_96348A_122,
++ &board_CPVA502plus,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -853,6 +881,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
++ { .compatible = "telsey,cpva502plus", .data = &board_CPVA502plus, },
+ { .compatible = "telsey,magic", .data = &board_96348sv, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
--- /dev/null
+From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Wed, 20 Jan 2010 16:21:30 +0100
+Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
+ 2 files changed, 97 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -792,6 +792,58 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
++ * known 6368 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_96368mvwg = {
++ .name = "96368MVWG",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port1",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port2",
++ },
++
++ [4] = {
++ .used = 1,
++ .phy_id = 0x12,
++ .name = "port0",
++ },
++
++ [5] = {
++ .used = 1,
++ .phy_id = 0x11,
++ .name = "port3",
++ },
++ },
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++};
++#endif /* CONFIG_BCM63XX_CPU_6368 */
++
++/*
+ * all boards
+ */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -843,6 +895,10 @@ static const struct board_info __initcon
+ &board_HW553,
+ &board_spw303v,
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_6368
++ &board_96368mvwg,
++#endif
+ };
+
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -903,6 +959,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ #endif
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -81,12 +81,25 @@ void __init board_early_setup(const stru
+ bcm63xx_pci_enabled = 1;
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G2_PCI;
++
++ if (BCMCPU_IS_6368())
++ val |= GPIO_MODE_6368_PCI_REQ1 |
++ GPIO_MODE_6368_PCI_GNT1 |
++ GPIO_MODE_6368_PCI_INTB |
++ GPIO_MODE_6368_PCI_REQ0 |
++ GPIO_MODE_6368_PCI_GNT0;
+ }
+ #endif
+
+ if (board.has_pccard) {
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G1_MII_PCCARD;
++
++ if (BCMCPU_IS_6368())
++ val |= GPIO_MODE_6368_PCMCIA_CD1 |
++ GPIO_MODE_6368_PCMCIA_CD2 |
++ GPIO_MODE_6368_PCMCIA_VS1 |
++ GPIO_MODE_6368_PCMCIA_VS2;
+ }
+
+ if (board.has_enet0 && !board.enet0.use_internal_phy) {
--- /dev/null
+From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Fri, 4 Nov 2011 12:33:48 +0100
+Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++
+ 1 files changed, 67 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -841,6 +841,45 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ };
++
++static struct board_info __initdata board_96368mvngr = {
++ .name = "96368MVNgr",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+
+ /*
+@@ -898,6 +937,7 @@ static const struct board_info __initcon
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
++ &board_96368mvngr,
+ #endif
+ };
+
+@@ -959,6 +999,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 10:52:25 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++
+ 1 files changed, 77 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -64,6 +64,33 @@ static struct board_info __initdata boar
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
--- /dev/null
+From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 11:01:12 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++
+ 1 files changed, 71 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -92,6 +92,40 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_963281TAN = {
++ .name = "963281TAN",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -918,6 +952,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_963281TAN,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -974,6 +1009,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
--- /dev/null
+From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 30 Apr 2012 09:10:51 +0200
+Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
+ DSL-274xB rev F1
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++
+ 1 files changed, 104 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -126,6 +126,51 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_dsl_274xb_f1 = {
++ .name = "AW4339U",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_ATHEROS,
++ .caldata_offset = 0x7d1000,
++ .slot = 0,
++ .led_pin = -1,
++ .led_active_high = 1,
++ },
++ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 4",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 1",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -953,6 +998,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+ &board_963281TAN,
++ &board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -1011,6 +1057,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -568,6 +568,24 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ };
+
++/* NetGear DG834G v4 */
++static struct board_info __initdata board_96348W3 = {
++ .name = "96348W3",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++};
++
+ static struct board_info __initdata board_96348_D4PW = {
+ .name = "D-4P-W",
+ .expected_cpu_id = 0x6348,
+@@ -1028,6 +1046,7 @@ static const struct board_info __initcon
+ &board_ct536_ct5621,
+ &board_96348A_122,
+ &board_CPVA502plus,
++ &board_96348W3,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1083,6 +1102,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
++ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -874,6 +874,30 @@ static struct board_info __initdata boar
+ .num_usbh_ports = 2,
+ };
+
++static struct board_info __initdata board_ct6373_1 = {
++ .name = "CT6373-1",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_HW553 = {
+ .name = "HW553",
+ .expected_cpu_id = 0x6358,
+@@ -1058,6 +1082,7 @@ static const struct board_info __initcon
+ &board_dsl_274xb_rev_c,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
++ &board_ct6373_1,
+ &board_HW553,
+ &board_spw303v,
+ #endif
+@@ -1116,6 +1141,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -937,6 +937,33 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ };
++
++/* D-Link DVA-G3810BN/TL */
++static struct board_info __initdata board_DVAG3810BN = {
++ .name = "DVAG3810BN",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -1085,6 +1112,7 @@ static const struct board_info __initcon
+ &board_ct6373_1,
+ &board_HW553,
+ &board_spw303v,
++ &board_DVAG3810BN,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1144,6 +1172,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -966,6 +966,32 @@ static struct board_info __initdata boar
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
++#ifdef CONFIG_BCM63XX_CPU_6362
++static struct board_info __initdata board_nb6 = {
++ .name = "NB6",
++ .expected_cpu_id = 0x6362,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [4] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++};
++#endif /* CONFIG_BCM63XX_CPU_6362 */
++
+ /*
+ * known 6368 boards
+ */
+@@ -1115,6 +1141,10 @@ static const struct board_info __initcon
+ &board_DVAG3810BN,
+ #endif
+
++#ifdef CONFIG_BCM63XX_CPU_6362
++ &board_nb6,
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
+@@ -1183,6 +1213,9 @@ static struct of_device_id const bcm963x
+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6362
++ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -501,6 +501,22 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct board_info __initdata board_FAST2604 = {
++ .name = "F@ST2604",
++ .expected_cpu_id = 0x6348,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+ static struct board_info __initdata board_rta1025w_16 = {
+ .name = "RTA1025W_16",
+ .expected_cpu_id = 0x6348,
+@@ -1112,6 +1128,7 @@ static const struct board_info __initcon
+ &board_96348gw_10,
+ &board_96348gw_11,
+ &board_FAST2404,
++ &board_FAST2604,
+ &board_DV201AMR,
+ &board_96348gw_a,
+ &board_rta1025w_16,
+@@ -1187,6 +1204,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
++ { .compatible = "sagem,fast-2604", .data = &board_FAST2604, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -127,6 +127,49 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_A4001N1 = {
++ .name = "963281T_TEF",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ },
++};
++
+ static struct board_info __initdata board_dsl_274xb_f1 = {
+ .name = "AW4339U",
+ .expected_cpu_id = 0x6328,
+@@ -1109,6 +1152,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+ &board_963281TAN,
++ &board_A4001N1,
+ &board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+@@ -1174,6 +1218,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -93,6 +93,78 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ar5387un_fixups[] = {
++ { .offset = 2, .value = 0x05bb },
++ { .offset = 65, .value = 0x1204 },
++ { .offset = 78, .value = 0x0303 },
++ { .offset = 79, .value = 0x0202 },
++ { .offset = 80, .value = 0xff02 },
++ { .offset = 87, .value = 0x0315 },
++ { .offset = 88, .value = 0x0315 },
++ { .offset = 96, .value = 0x2048 },
++ { .offset = 97, .value = 0xff11 },
++ { .offset = 98, .value = 0x1567 },
++ { .offset = 99, .value = 0xfb24 },
++ { .offset = 100, .value = 0x3e3c },
++ { .offset = 101, .value = 0x4038 },
++ { .offset = 102, .value = 0xfe7f },
++ { .offset = 103, .value = 0x1279 },
++ { .offset = 112, .value = 0x2048 },
++ { .offset = 113, .value = 0xff03 },
++ { .offset = 114, .value = 0x154c },
++ { .offset = 115, .value = 0xfb27 },
++ { .offset = 116, .value = 0x3e3c },
++ { .offset = 117, .value = 0x4038 },
++ { .offset = 118, .value = 0xfe87 },
++ { .offset = 119, .value = 0x1233 },
++ { .offset = 203, .value = 0x2226 },
++};
++
++static struct board_info __initdata board_AR5387un = {
++ .name = "96328A-1441N1",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ar5387un_fixups,
++ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
++ },
++};
++
+ static struct board_info __initdata board_963281TAN = {
+ .name = "963281TAN",
+ .expected_cpu_id = 0x6328,
+@@ -1151,6 +1223,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_AR5387un,
+ &board_963281TAN,
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
+@@ -1221,6 +1294,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -93,6 +93,60 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ar5381u_fixups[] = {
++ { .offset = 97, .value = 0xfee5 },
++ { .offset = 98, .value = 0x157c },
++ { .offset = 99, .value = 0xfae7 },
++ { .offset = 113, .value = 0xfefa },
++ { .offset = 114, .value = 0x15d6 },
++ { .offset = 115, .value = 0xfaf8 },
++};
++
++static struct board_info __initdata board_AR5381u = {
++ .name = "96328A-1241N",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ar5381u_fixups,
++ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata ar5387un_fixups[] = {
+ { .offset = 2, .value = 0x05bb },
+ { .offset = 65, .value = 0x1204 },
+@@ -1223,6 +1277,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_AR5381u,
+ &board_AR5387un,
+ &board_963281TAN,
+ &board_A4001N1,
+@@ -1294,6 +1349,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -411,6 +411,20 @@ static struct board_info __initdata boar
+ .name = "96345GW2",
+ .expected_cpu_id = 0x6345,
+ };
++
++static struct board_info __initdata board_rta770bw = {
++ .name = "RTA770BW",
++ .expected_cpu_id = 0x6345,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+
+ /*
+@@ -1291,6 +1305,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
++ &board_rta770bw,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ &board_96348r,
+@@ -1361,6 +1376,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -12,6 +12,7 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/pci_ids.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -1123,6 +1124,92 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HW556_C = {
++ .name = "HW556_C",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_RALINK,
++ .caldata_offset = 0xeffe00,
++ .slot = 1,
++ .eeprom = "rt2x00.eeprom",
++ },
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++static struct board_info __initdata board_HW556_A = {
++ .name = "HW556_A",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_ATHEROS,
++ .caldata_offset = 0xf7e000,
++ .slot = 1,
++ .endian_check = 1,
++ .led_pin = 2,
++ .led_active_high = 1,
++ },
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++static struct board_info __initdata board_HW556_B = {
++ .name = "HW556_B",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_ATHEROS,
++ .caldata_offset = 0xefe000,
++ .slot = 1,
++ .endian_check = 1,
++ .led_pin = 2,
++ .led_active_high = 1,
++ },
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+ /* T-Home Speedport W 303V Typ B */
+ static struct board_info __initdata board_spw303v = {
+ .name = "96358-502V",
+@@ -1341,6 +1428,9 @@ static const struct board_info __initcon
+ &board_nb4_fxc_r1,
+ &board_ct6373_1,
+ &board_HW553,
++ &board_HW556_A,
++ &board_HW556_B,
++ &board_HW556_C,
+ &board_spw303v,
+ &board_DVAG3810BN,
+ #endif
+@@ -1413,6 +1503,9 @@ static struct of_device_id const bcm963x
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
++ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
++ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
++ { .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -426,6 +426,25 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++// Actually this board is the very same as the rta770bw,
++// where the additional 'b' within the name just
++// just indicates 'Annex B'. The ADSL Modem itself is able
++// to handle both Annex A as well as Annex B -
++// the loaded firmware makes the only difference
++static struct board_info __initdata board_rta770w = {
++ .name = "RTA770W",
++ .expected_cpu_id = 0x6345,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+
+ /*
+@@ -1393,6 +1412,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
+ &board_rta770bw,
++ &board_rta770w,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ &board_96348r,
+@@ -1467,6 +1487,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
+ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
++ { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
--- /dev/null
+From: Marcin Jurkowski <marcin1j@gmail.com>
+Date: Thu, 31 Oct 2013 22:33:10 +0000
+Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
+ router
+
+This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
+router.
+It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
+modem equipped with 64 MiB RAM and 8 MiB flash.
+
+Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -341,6 +341,43 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_FAST2704V2 = {
++ .name = "F@ST2704V2",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .has_usbd = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -1402,6 +1439,7 @@ static const struct board_info __initcon
+ &board_963281TAN,
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
++ &board_FAST2704V2,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -1477,6 +1515,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
++ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
--- /dev/null
+From: Max Staudt <openwrt.max@enpas.org>
+Date: Wed, 15 Jan 2014 18:51:13 +0000
+Subject: [PATCH] bcm63xx: F@ST2504n board support (Linux-3.10.26)
+
+Signed-off-by: Max Staudt <openwrt.max@enpas.org>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1332,6 +1332,41 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_fast2504n = {
++ .name = "F@ST2504n",
++ .expected_cpu_id = 0x6362,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6362 */
+
+ /*
+@@ -1495,6 +1530,7 @@ static const struct board_info __initcon
+
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ &board_nb6,
++ &board_fast2504n,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1576,6 +1612,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
++ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -50,6 +50,55 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_3368 */
+
+ /*
++ * known 6318 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6318
++static struct board_info __initdata board_96318ref = {
++ .name = "96318REF",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
++#endif /* CONFIG_BCM63XX_CPU_6318 */
++
++/*
+ * known 6328 boards
+ */
+ #ifdef CONFIG_BCM63XX_CPU_6328
+@@ -1467,6 +1516,9 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ &board_cvg834g,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++ &board_96318ref,
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+ &board_AR5381u,
+@@ -1544,6 +1596,9 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -96,6 +96,50 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_96318ref_p300 = {
++ .name = "96318REF_P300",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+
+ /*
+@@ -1518,6 +1562,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
++ &board_96318ref_p300,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+@@ -1598,6 +1643,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1554,6 +1554,50 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+
+ /*
++ * known 63268/63269 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963269bhr = {
++ .name = "963269BHR",
++ .expected_cpu_id = 0x63268,
++
++ .has_pci = 1,
++
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++};
++#endif /* CONFIG_BCM63XX_CPU_63268 */
++
++/*
+ * all boards
+ */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -1634,6 +1678,9 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++ &board_963269bhr,
++#endif
+ };
+
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -1721,6 +1768,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ #endif
+ #endif /* CONFIG_OF */
+ { },
--- /dev/null
+From: "mexit@o2.pl" <mexit@o2.pl>
+Date: Sun, 24 Nov 2013 21:33:38 +0000
+Subject: [PATCH 4/5] bcm63xx: add support for Asmax AR 1004g router
+
+Support for Asmax AR 1004g router
+
+Signed-off-by: Adrian Feliks <mexit@o2.pl>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -647,6 +647,21 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct board_info __initdata board_96348gw_10_AR1004G = {
++ .name = "AR1004G",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+
+ /* BT Voyager 2110 */
+ static struct board_info __initdata board_V2110 = {
+@@ -1649,6 +1664,7 @@ static const struct board_info __initcon
+ &board_96348A_122,
+ &board_CPVA502plus,
+ &board_96348W3,
++ &board_96348gw_10_AR1004G,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1713,6 +1729,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
++ { .compatible = "asmax,ar-1004g", .data = &board_96348gw_10_AR1004G, },
+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1610,6 +1610,51 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_vw6339gu = {
++ .name = "VW6339GU",
++ .expected_cpu_id = 0x63268,
++
++ .has_ehci0 = 1,
++ .has_ohci0 = 1,
++ .num_usbh_ports = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "LAN2",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN4",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++
++ [4] = {
++ .used = 1,
++ .phy_id = 7,
++ .name = "WAN",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_63268 */
+
+ /*
+@@ -1696,6 +1741,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ &board_963269bhr,
++ &board_vw6339gu,
+ #endif
+ };
+
+@@ -1786,6 +1832,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
++ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
+ #endif /* CONFIG_OF */
+ { },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1572,6 +1572,64 @@ static struct board_info __initdata boar
+ * known 63268/63269 boards
+ */
+ #ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963268bu_p300 = {
++ .name = "963268BU_P300",
++ .expected_cpu_id = 0x63268,
++
++ .has_ehci0 = 1,
++ .has_ohci0 = 1,
++ .num_usbh_ports = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 17,
++ .name = "FE1",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "GbE2",
++ },
++
++ [4] = {
++ .used = 1,
++ .phy_id = 0,
++ .name = "GbE3",
++ },
++
++ [5] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "GbE1",
++ },
++
++ [6] = {
++ .used = 1,
++ .phy_id = 24,
++ .name = "GbE4",
++ },
++
++ [7] = {
++ .used = 1,
++ .phy_id = 25,
++ .name = "GbE5",
++ },
++ },
++ },
++};
++
+ static struct board_info __initdata board_963269bhr = {
+ .name = "963269BHR",
+ .expected_cpu_id = 0x63268,
+@@ -1740,6 +1798,7 @@ static const struct board_info __initcon
+ &board_96368mvngr,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++ &board_963268bu_p300,
+ &board_963269bhr,
+ &board_vw6339gu,
+ #endif
+@@ -1831,6 +1890,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -13,6 +13,8 @@
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+ #include <linux/pci_ids.h>
++#include <linux/platform_data/b53.h>
++#include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -1566,6 +1568,47 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ };
++
++static struct sprom_fixup __initdata wap5813n_fixups[] = {
++ { .offset = 97, .value = 0xfeed },
++ { .offset = 98, .value = 0x15d1 },
++ { .offset = 99, .value = 0xfb0d },
++ { .offset = 113, .value = 0xfef7 },
++ { .offset = 114, .value = 0x15f7 },
++ { .offset = 115, .value = 0xfb1a },
++};
++
++static struct board_info __initdata board_WAP5813n = {
++ .name = "96369R-1231N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [4] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = wap5813n_fixups,
++ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+
+ /*
+@@ -1796,6 +1839,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ &board_963268bu_p300,
+@@ -1888,6 +1932,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1569,6 +1569,59 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct sprom_fixup __initdata vr3025u_fixups[] = {
++ { .offset = 97, .value = 0xfeb3 },
++ { .offset = 98, .value = 0x1618 },
++ { .offset = 99, .value = 0xfab0 },
++ { .offset = 113, .value = 0xfed1 },
++ { .offset = 114, .value = 0x1609 },
++ { .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025u = {
++ .name = "96368M-1541N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vr3025u_fixups,
++ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -1839,6 +1892,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_VR3025u,
+ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -1932,6 +1986,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1622,6 +1622,59 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata vr3025un_fixups[] = {
++ { .offset = 97, .value = 0xfeb3 },
++ { .offset = 98, .value = 0x1618 },
++ { .offset = 99, .value = 0xfab0 },
++ { .offset = 113, .value = 0xfed1 },
++ { .offset = 114, .value = 0x1609 },
++ { .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025un = {
++ .name = "96368M-1341N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vr3025un_fixups,
++ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -1893,6 +1946,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_VR3025u,
++ &board_VR3025un,
+ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -1987,6 +2041,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
++ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1578,6 +1578,48 @@ static struct sprom_fixup __initdata vr3
+ { .offset = 115, .value = 0xfad9 },
+ };
+
++static struct board_info __initdata board_P870HW51A_V2 = {
++ .name = "P870HW-51a_v2",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_VR3025u = {
+ .name = "96368M-1541N",
+ .expected_cpu_id = 0x6368,
+@@ -1945,6 +1987,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
+ &board_WAP5813n,
+@@ -2043,6 +2086,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1264,6 +1264,36 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HW520 = {
++ .name = "HW6358GW_B",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enet0 = 1,
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_HW553 = {
+ .name = "HW553",
+ .expected_cpu_id = 0x6358,
+@@ -1971,6 +2001,7 @@ static const struct board_info __initcon
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ &board_ct6373_1,
++ &board_HW520,
+ &board_HW553,
+ &board_HW556_A,
+ &board_HW556_B,
+@@ -2063,6 +2094,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
++ { .compatible = "huawei,echolife-hg520v", .data = &board_HW520, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
+ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -349,6 +349,49 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_A4001N = {
++ .name = "96328dg2x2",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ },
++};
++
+ static struct board_info __initdata board_A4001N1 = {
+ .name = "963281T_TEF",
+ .expected_cpu_id = 0x6328,
+@@ -1952,6 +1995,7 @@ static const struct board_info __initcon
+ &board_AR5381u,
+ &board_AR5387un,
+ &board_963281TAN,
++ &board_A4001N,
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
+ &board_FAST2704V2,
+@@ -2040,6 +2084,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "adb,a4001n", .data = &board_A4001N, },
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -142,6 +142,74 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
++ { .offset = 96, .value = 0x2046 },
++ { .offset = 97, .value = 0xfe9d },
++ { .offset = 98, .value = 0x1854 },
++ { .offset = 99, .value = 0xfa59 },
++ { .offset = 112, .value = 0x2046 },
++ { .offset = 113, .value = 0xfe79 },
++ { .offset = 114, .value = 0x17f5 },
++ { .offset = 115, .value = 0xfa47 },
++ { .offset = 161, .value = 0x2222 },
++ { .offset = 162, .value = 0x2222 },
++ { .offset = 169, .value = 0x2222 },
++ { .offset = 170, .value = 0x2222 },
++ { .offset = 171, .value = 0x5555 },
++ { .offset = 172, .value = 0x5555 },
++ { .offset = 173, .value = 0x4444 },
++ { .offset = 174, .value = 0x4444 },
++ { .offset = 175, .value = 0x5555 },
++ { .offset = 176, .value = 0x5555 },
++};
++
++static struct board_info __initdata board_dsl_2751b_d1 = {
++ .name = "AW5200B",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_enetsw = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = dsl2751b_e1_fixups,
++ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+
+ /*
+@@ -1989,6 +2057,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
+ &board_96318ref_p300,
++ &board_dsl_2751b_d1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+@@ -2082,6 +2151,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
++ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1710,6 +1710,30 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct board_info __initdata board_DGND3700v1_3800B = {
++ .name = "DGND3700v1_3800B",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [5] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+@@ -2131,6 +2155,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_DGND3700v1_3800B,
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
+@@ -2233,6 +2258,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1375,6 +1375,31 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_homehub2a = {
++ .name = "HOMEHUB2A",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4322,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_HW520 = {
+ .name = "HW6358GW_B",
+ .expected_cpu_id = 0x6358,
+@@ -2138,6 +2163,7 @@ static const struct board_info __initcon
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ &board_ct6373_1,
++ &board_homehub2a,
+ &board_HW520,
+ &board_HW553,
+ &board_HW556_A,
+@@ -2247,6 +2273,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
++ { .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1759,6 +1759,52 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HG655b = {
++ .name = "HW65x",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_RALINK,
++ .caldata_offset = 0x7c0000,
++ .slot = 1,
++ .eeprom = "rt2x00.eeprom",
++ },
++ },
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+@@ -2182,6 +2228,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
++ &board_HG655b,
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
+@@ -2285,6 +2332,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -210,6 +210,45 @@ static struct board_info __initdata boar
+ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
+ },
+ };
++
++static struct board_info __initdata board_FAST2704N = {
++ .name = "F@ST2704N",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_enetsw = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+
+ /*
+@@ -2153,6 +2192,7 @@ static const struct board_info __initcon
+ &board_96318ref,
+ &board_96318ref_p300,
+ &board_dsl_2751b_d1,
++ &board_FAST2704N,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+@@ -2250,6 +2290,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
++ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1992,6 +1992,59 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata vr3026e_fixups[] = {
++ { .offset = 97, .value = 0xfeb3 },
++ { .offset = 98, .value = 0x1618 },
++ { .offset = 99, .value = 0xfab0 },
++ { .offset = 113, .value = 0xfed1 },
++ { .offset = 114, .value = 0x1609 },
++ { .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3026e = {
++ .name = "96368MT-1341N1",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vr3026e_fixups,
++ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -2272,6 +2325,7 @@ static const struct board_info __initcon
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
++ &board_VR3026e,
+ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2372,6 +2426,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
++ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -623,6 +623,50 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_R5010UNV2 = {
++ .name = "96328ang",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ },
++};
++
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -2256,6 +2300,7 @@ static const struct board_info __initcon
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
+ &board_FAST2704V2,
++ &board_R5010UNV2,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -2354,6 +2399,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
++ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1888,6 +1888,52 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HG622 = {
++ .name = "96368MVWG_hg622",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_RALINK,
++ .caldata_offset = 0xfa0000,
++ .slot = 1,
++ .eeprom = "rt2x00.eeprom",
++ },
++ },
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+@@ -2366,6 +2412,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
++ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+@@ -2474,6 +2521,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1842,6 +1842,42 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata EVG2000_fixups[] = {
++ { .offset = 219, .value = 0xec08 },
++};
++
++static struct board_info __initdata board_EVG2000 = {
++ .name = "96369PVG",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [5] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++ .use_fallback_sprom = 1,
++ .fallback_sprom = {
++ .type = SPROM_BCM4322,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = EVG2000_fixups,
++ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
++ },
++};
++
+ static struct board_info __initdata board_HG655b = {
+ .name = "HW65x",
+ .expected_cpu_id = 0x6368,
+@@ -2412,6 +2448,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
++ &board_EVG2000,
+ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
+@@ -2524,6 +2561,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
++ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1732,6 +1732,51 @@ static struct board_info __initdata boar
+ * known 6368 boards
+ */
+ #ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_AV4202N = {
++ .name = "96368_Swiss_S1",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++ .use_fallback_sprom = 1,
++ .fallback_sprom = {
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++
++};
++
+ static struct board_info __initdata board_96368mvwg = {
+ .name = "96368MVWG",
+ .expected_cpu_id = 0x6368,
+@@ -2445,6 +2490,7 @@ static const struct board_info __initcon
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ &board_AV4202N,
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
+@@ -2552,6 +2598,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2216,6 +2216,106 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata vh4032n_fixups[] = {
++ { .offset = 2, .value = 0x04d2 },
++ { .offset = 4, .value = 0x4350 },
++ { .offset = 65, .value = 0x1300 },
++ { .offset = 68, .value = 0x0402 },
++ { .offset = 70, .value = 0x0090 },
++ { .offset = 71, .value = 0x4c19 },
++ { .offset = 72, .value = 0x2345 },
++ { .offset = 87, .value = 0x0315 },
++ { .offset = 88, .value = 0x0315 },
++ { .offset = 96, .value = 0x2048 },
++ { .offset = 97, .value = 0xfed7 },
++ { .offset = 98, .value = 0x15a6 },
++ { .offset = 99, .value = 0xfaee },
++ { .offset = 100, .value = 0x3e3a },
++ { .offset = 101, .value = 0x3a36 },
++ { .offset = 102, .value = 0xff7f },
++ { .offset = 103, .value = 0x11b9 },
++ { .offset = 104, .value = 0xfc53 },
++ { .offset = 105, .value = 0xffe6 },
++ { .offset = 106, .value = 0xfdd2 },
++ { .offset = 107, .value = 0xfe49 },
++ { .offset = 108, .value = 0xff6a },
++ { .offset = 109, .value = 0x136e },
++ { .offset = 110, .value = 0xfbed },
++ { .offset = 111, .value = 0x0000 },
++ { .offset = 112, .value = 0x2048 },
++ { .offset = 113, .value = 0xfee2 },
++ { .offset = 114, .value = 0x15e5 },
++ { .offset = 115, .value = 0xfaed },
++ { .offset = 116, .value = 0x3e3a },
++ { .offset = 117, .value = 0x3a36 },
++ { .offset = 118, .value = 0xffc8 },
++ { .offset = 119, .value = 0x12b8 },
++ { .offset = 120, .value = 0xfca1 },
++ { .offset = 121, .value = 0xff9b },
++ { .offset = 122, .value = 0x122a },
++ { .offset = 123, .value = 0xfcc8 },
++ { .offset = 124, .value = 0xff95 },
++ { .offset = 125, .value = 0x146b },
++ { .offset = 126, .value = 0xfbba },
++ { .offset = 127, .value = 0x0000 },
++ { .offset = 161, .value = 0x0000 },
++ { .offset = 162, .value = 0x0000 },
++ { .offset = 169, .value = 0x0000 },
++ { .offset = 170, .value = 0x0000 },
++ { .offset = 171, .value = 0x0000 },
++ { .offset = 172, .value = 0x0000 },
++ { .offset = 173, .value = 0x0000 },
++ { .offset = 174, .value = 0x0000 },
++ { .offset = 175, .value = 0x0000 },
++ { .offset = 176, .value = 0x0000 },
++ { .offset = 219, .value = 0x1108 },
++};
++
++static struct board_info __initdata board_VH4032N = {
++ .name = "VH4032N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "LAN4",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vh4032n_fixups,
++ .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -2498,6 +2598,7 @@ static const struct board_info __initcon
+ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
++ &board_VH4032N,
+ &board_VR3025u,
+ &board_VR3025un,
+ &board_VR3026e,
+@@ -2609,6 +2710,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
++ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2066,6 +2066,29 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_R1000H = {
++ .name = "R1000H",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [5] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++};
++
+ static struct board_info __initdata board_VR3025u = {
+ .name = "96368M-1541N",
+ .expected_cpu_id = 0x6368,
+@@ -2598,6 +2621,7 @@ static const struct board_info __initcon
+ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
++ &board_R1000H,
+ &board_VH4032N,
+ &board_VR3025u,
+ &board_VR3025un,
+@@ -2699,6 +2723,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
+ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -143,6 +143,67 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ar5315u_fixups[] = {
++ { .offset = 6, .value = 0x1c00 },
++ { .offset = 65, .value = 0x1255 },
++ { .offset = 97, .value = 0xfe55 },
++ { .offset = 98, .value = 0x171d },
++ { .offset = 99, .value = 0xfa42 },
++ { .offset = 113, .value = 0xfeb7 },
++ { .offset = 114, .value = 0x18cd },
++ { .offset = 115, .value = 0xfa4f },
++ { .offset = 162, .value = 0x6444 },
++ { .offset = 170, .value = 0x6444 },
++ { .offset = 172, .value = 0x6444 },
++};
++
++static struct board_info __initdata board_AR5315u = {
++ .name = "96318A-1441N1",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_enetsw = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "LAN4",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ar5315u_fixups,
++ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
+ { .offset = 96, .value = 0x2046 },
+ { .offset = 97, .value = 0xfe9d },
+@@ -2538,6 +2599,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
+ &board_96318ref_p300,
++ &board_AR5315u,
+ &board_dsl_2751b_d1,
+ &board_FAST2704N,
+ #endif
+@@ -2643,6 +2705,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
++ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, },
+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
+ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -357,6 +357,73 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ad1018_fixups[] = {
++ { .offset = 6, .value = 0x1c00 },
++ { .offset = 65, .value = 0x1256 },
++ { .offset = 96, .value = 0x2046 },
++ { .offset = 97, .value = 0xfe69 },
++ { .offset = 98, .value = 0x1726 },
++ { .offset = 99, .value = 0xfa5c },
++ { .offset = 112, .value = 0x2046 },
++ { .offset = 113, .value = 0xfea8 },
++ { .offset = 114, .value = 0x1978 },
++ { .offset = 115, .value = 0xfa26 },
++ { .offset = 161, .value = 0x2222 },
++ { .offset = 169, .value = 0x2222 },
++ { .offset = 171, .value = 0x2222 },
++ { .offset = 173, .value = 0x2222 },
++ { .offset = 174, .value = 0x4444 },
++ { .offset = 175, .value = 0x2222 },
++ { .offset = 176, .value = 0x4444 },
++};
++
++static struct board_info __initdata board_AD1018 = {
++ .name = "96328avngr",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "FIBRE",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ad1018_fixups,
++ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata ar5381u_fixups[] = {
+ { .offset = 97, .value = 0xfee5 },
+ { .offset = 98, .value = 0x157c },
+@@ -2605,6 +2672,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_AD1018,
+ &board_AR5381u,
+ &board_AR5387un,
+ &board_963281TAN,
+@@ -2719,6 +2787,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
++ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2654,6 +2654,49 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_BSKYB_63168 = {
++ .name = "BSKYB_63168",
++ .expected_cpu_id = 0x63268,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 0,
++
++ .has_ehci0 = 1,
++ .has_ohci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_63268 */
+
+ /*
+@@ -2762,6 +2805,7 @@ static const struct board_info __initcon
+ &board_963268bu_p300,
+ &board_963269bhr,
+ &board_vw6339gu,
++ &board_BSKYB_63168,
+ #endif
+ };
+
+@@ -2874,6 +2918,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
++ { .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
+ #endif
+ #endif /* CONFIG_OF */
+ { },
--- /dev/null
+--- a/arch/mips/bcm63xx/nvram.c
++++ b/arch/mips/bcm63xx/nvram.c
+@@ -24,6 +24,12 @@
+ static struct bcm963xx_nvram nvram;
+ static int mac_addr_used;
+
++/*
++ * Required export for WL
++ */
++u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 };
++EXPORT_SYMBOL(nvram_buf);
++
+ void __init bcm63xx_nvram_init(void *addr)
+ {
+ u32 crc, expected_crc;
+--- a/arch/mips/mm/cache.c
++++ b/arch/mips/mm/cache.c
+@@ -64,6 +64,7 @@ void (*_dma_cache_wback)(unsigned long s
+ void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+
+ EXPORT_SYMBOL(_dma_cache_wback_inv);
++EXPORT_SYMBOL(_dma_cache_inv);
+
+ #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */
+
--- /dev/null
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -8,6 +8,7 @@
+ */
+
+ #include <linux/init.h>
++#include <linux/export.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+@@ -387,7 +388,19 @@ struct fallback_sprom_match {
+ struct ssb_sprom sprom;
+ };
+
+-static struct fallback_sprom_match fallback_sprom;
++struct fallback_sprom_match fallback_sprom;
++
++int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out)
++{
++ if (pci_bus != fallback_sprom.pci_bus ||
++ pci_slot != fallback_sprom.pci_dev)
++ pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++ pci_bus, pci_slot);
++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
++ return 0;
++}
++EXPORT_SYMBOL(bcm63xx_get_fallback_sprom);
+
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--- /dev/null
+From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001
+From: Miguel GAIO <miguel.gaio@efixo.com>
+Date: Fri, 6 Jul 2012 14:12:33 +0200
+Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support
+
+---
+ drivers/net/phy/rtl8367.c | 5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+--- a/drivers/net/phy/rtl8367.c
++++ b/drivers/net/phy/rtl8367.c
+@@ -146,6 +146,10 @@
+ #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1
+ #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7
+
++#define RTL8367_PHY_AD_REG 0x130f
++#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5
++#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0
++
+ #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x))
+ #define RTL8367_DI_FORCE_MODE BIT(12)
+ #define RTL8367_DI_FORCE_NWAY BIT(7)
+@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct
+ case RTL8367_EXTIF_MODE_RGMII_33V:
+ REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
+ REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
++ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0);
+ break;
+
+ case RTL8367_EXTIF_MODE_TMII_MAC:
--- /dev/null
+From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 6 Apr 2014 22:33:16 +0200
+Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp
+
+Unligned memcpy_fromio randomly fails with an unaligned dst. Work around
+it by ensuring we are always doing aligned copies.
+
+Should fix filename corruption in jffs2 with SMP.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ fs/jffs2/nodelist.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/fs/jffs2/nodelist.h
++++ b/fs/jffs2/nodelist.h
+@@ -259,7 +259,7 @@ struct jffs2_full_dirent
+ uint32_t ino; /* == zero for unlink */
+ unsigned int nhash;
+ unsigned char type;
+- unsigned char name[0];
++ unsigned char name[0] __attribute__((aligned((sizeof(long)))));
+ };
+
+ /*
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2239,6 +2239,10 @@ static int bcm_enetsw_open(struct net_de
+
+ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
+ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++ if (BCMCPU_IS_63268()) {
++ rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN;
++ rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN;
++ }
+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ }
+
--- /dev/null
+From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:19 +0100
+Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
+
+Knowledge of the clock setup delay should remain at the clock level (so
+it can be clock specific and CPU specific). Add the 100 milliseconds
+required clock delay for the USB host clock when it gets enabled.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c | 5 +++++
+ 1 file changed, 5 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -214,6 +214,11 @@ static void usbh_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++ else
++ return;
++
++ if (enable)
++ msleep(100);
+ }
+
+ static struct clk clk_usbh = {
--- /dev/null
+From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:20 +0100
+Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
+ clock code
+
+This patch adds the required 10 micro seconds delay to the USB device
+clock enable operation. Put this where the correct clock knowledege is,
+which is in the clock code, and remove this delay from the bcm63xx_udc
+gadget driver where it was before.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/clk.c | 5 +++++
+ drivers/usb/gadget/bcm63xx_udc.c | 1 -
+ 2 files changed, 5 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -236,6 +236,11 @@ static void usbd_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++ else
++ return;
++
++ if (enable)
++ udelay(10);
+ }
+
+ static struct clk clk_usbd = {
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -402,7 +402,6 @@ static inline void set_clocks(struct bcm
+ if (is_enabled) {
+ clk_enable(udc->usbh_clk);
+ clk_enable(udc->usbd_clk);
+- udelay(10);
+ } else {
+ clk_disable(udc->usbd_clk);
+ clk_disable(udc->usbh_clk);
--- /dev/null
+From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:21 +0100
+Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
+ register
+
+This patch moves the code touching the USB private register in the
+bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
+preparation for adding support for OHCI and EHCI host controllers which
+will also touch the USB private register.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++
+ drivers/usb/gadget/bcm63xx_udc.c | 27 ++--------
+ 4 files changed, 67 insertions(+), 24 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/usb-common.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-usbd.o
++ dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -0,0 +1,53 @@
++/*
++ * Broadcom BCM63xx common USB device configuration code
++ *
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
++ * Copyright (C) 2012 Broadcom Corporation
++ *
++ */
++#include <linux/export.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
++{
++ u32 val;
++
++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++ if (is_device) {
++ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ } else {
++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ }
++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ if (is_device)
++ val |= USBH_PRIV_SWAP_USBD_MASK;
++ else
++ val &= ~USBH_PRIV_SWAP_USBD_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
++
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
++{
++ u32 val;
++
++ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
++ if (is_on)
++ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ else
++ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
++ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++}
++EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -0,0 +1,9 @@
++#ifndef BCM63XX_USB_PRIV_H_
++#define BCM63XX_USB_PRIV_H_
++
++#include <linux/types.h>
++
++void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
++void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++
++#endif /* BCM63XX_USB_PRIV_H_ */
+--- a/drivers/usb/gadget/udc/bcm63xx_udc.c
++++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
+@@ -35,6 +35,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_usb_priv.h>
+
+ #define DRV_MODULE_NAME "bcm63xx_udc"
+
+@@ -879,22 +880,7 @@ static void bcm63xx_select_phy_mode(stru
+ bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
+ }
+
+- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+- if (is_device) {
+- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- } else {
+- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
+- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- }
+- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
+-
+- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
+- if (is_device)
+- val |= USBH_PRIV_SWAP_USBD_MASK;
+- else
+- val &= ~USBH_PRIV_SWAP_USBD_MASK;
+- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++ bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
+ }
+
+ /**
+@@ -908,14 +894,9 @@ static void bcm63xx_select_phy_mode(stru
+ */
+ static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
+ {
+- u32 val, portmask = BIT(udc->pd->port_no);
++ u32 portmask = BIT(udc->pd->port_no);
+
+- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+- if (is_on)
+- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- else
+- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++ bcm63xx_usb_priv_select_pullup(portmask, is_on);
+ }
+
+ /**
--- /dev/null
+From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:22 +0100
+Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
+ common USB code
+
+This patch updates the common USB code touching the USB private
+registers with the specific bits to properly enable OHCI and EHCI
+controllers on BCM63xx SoCs. As a result we now need to protect access
+to Read Modify Write sequences using a spinlock because we cannot
+guarantee that any of the exposed helper will not be called
+concurrently.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 +
+ 2 files changed, 99 insertions(+)
+
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -5,10 +5,12 @@
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
+ * Copyright (C) 2012 Broadcom Corporation
+ *
+ */
++#include <linux/spinlock.h>
+ #include <linux/export.h>
+
+ #include <bcm63xx_cpu.h>
+@@ -16,9 +18,14 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_usb_priv.h>
+
++static DEFINE_SPINLOCK(usb_priv_reg_lock);
++
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
+ {
+ u32 val;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
+
+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ if (is_device) {
+@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
+ else
+ val &= ~USBH_PRIV_SWAP_USBD_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
+
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
+ {
+ u32 val;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
+
+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
+ if (is_on)
+@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
+ else
+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+ }
+ EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
++
++/* The following array represents the meaning of the DESC/DATA
++ * endian swapping with respect to the CPU configured endianness
++ *
++ * DATA ENDN mmio descriptor
++ * 0 0 BE invalid
++ * 0 1 BE LE
++ * 1 0 BE BE
++ * 1 1 BE invalid
++ *
++ * Since BCM63XX SoCs are configured to be in big-endian mode
++ * we want configuration at line 3.
++ */
++void bcm63xx_usb_priv_ohci_cfg_set(void)
++{
++ u32 reg;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++ if (BCMCPU_IS_6348())
++ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
++ else if (BCMCPU_IS_6358()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++ /*
++ * The magic value comes for the original vendor BSP
++ * and is needed for USB to work. Datasheet does not
++ * help, so the magic value is used as-is.
++ */
++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++ USBH_PRIV_TEST_6358_REG);
++
++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ }
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
++
++void bcm63xx_usb_priv_ehci_cfg_set(void)
++{
++ u32 reg;
++ unsigned long flags;
++
++ spin_lock_irqsave(&usb_priv_reg_lock, flags);
++
++ if (BCMCPU_IS_6358()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
++
++ /*
++ * The magic value comes for the original vendor BSP
++ * and is needed for USB to work. Datasheet does not
++ * help, so the magic value is used as-is.
++ */
++ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
++ USBH_PRIV_TEST_6358_REG);
++
++ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ }
++
++ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
+@@ -5,5 +5,7 @@
+
+ void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
+ void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
++void bcm63xx_usb_priv_ohci_cfg_set(void);
++void bcm63xx_usb_priv_ehci_cfg_set(void);
+
+ #endif /* BCM63XX_USB_PRIV_H_ */
--- /dev/null
+From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:23 +0100
+Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+OHCI controller, and ensures that all relevant OHCI-related
+configuration options are correctly selected. So far, OHCI support is
+available for the 6328, 6348, 6358 and 6358 SoCs.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig | 15 ++++++++++-----
+ 1 file changed, 10 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -7,10 +7,17 @@ config BCM63XX_CPU_3368
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+
++config BCM63XX_OHCI
++ bool
++ select USB_ARCH_HAS_OHCI
++ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
++ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
++
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6338
+ bool "support 6338 CPU"
+@@ -25,21 +32,25 @@ config BCM63XX_CPU_6348
+ bool "support 6348 CPU"
+ select SYS_HAS_CPU_BMIPS32_3300
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6358
+ bool "support 6358 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6362
+ bool "support 6362 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+
+ config BCM63XX_CPU_6368
+ bool "support 6368 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
--- /dev/null
+From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:24 +0100
+Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
+driven by the ohci-platform generic driver by using specific power
+on/off/suspend callback to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++
+ 3 files changed, 101 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-usbd.o usb-common.o
++ dev-usb-ohci.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -0,0 +1,94 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/usb/ohci_pdriver.h>
++#include <linux/dma-mapping.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ohci.h>
++
++static struct resource ohci_resources[] = {
++ {
++ .start = -1, /* filled at runtime */
++ .end = -1, /* filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ .start = -1, /* filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static u64 ohci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ohci_power_on(struct platform_device *pdev)
++{
++ usb_host_clock = clk_get(&pdev->dev, "usbh");
++ if (IS_ERR_OR_NULL(usb_host_clock))
++ return -ENODEV;
++
++ clk_prepare_enable(usb_host_clock);
++
++ bcm63xx_usb_priv_ohci_cfg_set();
++
++ return 0;
++}
++
++static void bcm63xx_ohci_power_off(struct platform_device *pdev)
++{
++ if (!IS_ERR_OR_NULL(usb_host_clock)) {
++ clk_disable_unprepare(usb_host_clock);
++ clk_put(usb_host_clock);
++ }
++}
++
++static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
++ .big_endian_desc = 1,
++ .big_endian_mmio = 1,
++ .no_big_frame_no = 1,
++ .num_ports = 1,
++ .power_on = bcm63xx_ohci_power_on,
++ .power_off = bcm63xx_ohci_power_off,
++ .power_suspend = bcm63xx_ohci_power_off,
++};
++
++static struct platform_device bcm63xx_ohci_device = {
++ .name = "ohci-platform",
++ .id = -1,
++ .num_resources = ARRAY_SIZE(ohci_resources),
++ .resource = ohci_resources,
++ .dev = {
++ .platform_data = &bcm63xx_ohci_pdata,
++ .dma_mask = &ohci_dmamask,
++ .coherent_dma_mask = DMA_BIT_MASK(32),
++ },
++};
++
++int __init bcm63xx_ohci_register(void)
++{
++ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
++ return -ENODEV;
++
++ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
++ ohci_resources[0].end = ohci_resources[0].start;
++ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
++ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
++
++ return platform_device_register(&bcm63xx_ohci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_OHCI_H_
++#define BCM63XX_DEV_USB_OHCI_H_
++
++int bcm63xx_ohci_register(void);
++
++#endif /* BCM63XX_DEV_USB_OHCI_H_ */
--- /dev/null
+From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:25 +0100
+Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
+ enables it
+
+BCM63XX-based boards can control the registration of the OHCI controller
+by setting their has_ohci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to
+register the OHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -27,6 +27,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+
+@@ -881,6 +882,9 @@ int __init board_register_devices(void)
+ if (board.has_usbd)
+ bcm63xx_usbd_register(&board.usbd);
+
++ if (board.has_ohci0)
++ bcm63xx_ohci_register();
++
+ /* Generate MAC address for WLAN and register our SPROM,
+ * do this after registering enet devices
+ */
--- /dev/null
+From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:26 +0100
+Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
+ symbol
+
+This configuration symbol can be used by CPUs supporting the on-chip
+EHCI controller, and ensures that all relevant EHCI-related
+configuration options are selected. So far BCM6328, BCM6358 and BCM6368
+have an EHCI controller and do select this symbol. Update
+drivers/usb/host/Kconfig with BCM63XX to update direct unmet
+dependencies.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig | 9 +++++++++
+ drivers/usb/host/Kconfig | 5 +++--
+ 2 files changed, 12 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -13,11 +13,18 @@ config BCM63XX_OHCI
+ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
+ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
+
++config BCM63XX_EHCI
++ bool
++ select USB_ARCH_HAS_EHCI
++ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
++ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
++
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6338
+ bool "support 6338 CPU"
+@@ -39,18 +46,21 @@ config BCM63XX_CPU_6358
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6362
+ bool "support 6362 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6368
+ bool "support 6368 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
--- /dev/null
+From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:27 +0100
+Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
+ controller
+
+Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
+driven by the generic ehci-platform driver by using specific power
+on/off/suspend callbacks to manage clocks and hardware specific
+configuration.
+
+Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++
+ 3 files changed, 99 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,7 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-ohci.o dev-usb-usbd.o usb-common.o
++ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -0,0 +1,92 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/platform_device.h>
++#include <linux/clk.h>
++#include <linux/delay.h>
++#include <linux/usb/ehci_pdriver.h>
++#include <linux/dma-mapping.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_usb_priv.h>
++#include <bcm63xx_dev_usb_ehci.h>
++
++static struct resource ehci_resources[] = {
++ {
++ .start = -1, /* filled at runtime */
++ .end = -1, /* filled at runtime */
++ .flags = IORESOURCE_MEM,
++ },
++ {
++ .start = -1, /* filled at runtime */
++ .flags = IORESOURCE_IRQ,
++ },
++};
++
++static u64 ehci_dmamask = DMA_BIT_MASK(32);
++
++static struct clk *usb_host_clock;
++
++static int bcm63xx_ehci_power_on(struct platform_device *pdev)
++{
++ usb_host_clock = clk_get(&pdev->dev, "usbh");
++ if (IS_ERR_OR_NULL(usb_host_clock))
++ return -ENODEV;
++
++ clk_prepare_enable(usb_host_clock);
++
++ bcm63xx_usb_priv_ehci_cfg_set();
++
++ return 0;
++}
++
++static void bcm63xx_ehci_power_off(struct platform_device *pdev)
++{
++ if (!IS_ERR_OR_NULL(usb_host_clock)) {
++ clk_disable_unprepare(usb_host_clock);
++ clk_put(usb_host_clock);
++ }
++}
++
++static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
++ .big_endian_desc = 1,
++ .big_endian_mmio = 1,
++ .power_on = bcm63xx_ehci_power_on,
++ .power_off = bcm63xx_ehci_power_off,
++ .power_suspend = bcm63xx_ehci_power_off,
++};
++
++static struct platform_device bcm63xx_ehci_device = {
++ .name = "ehci-platform",
++ .id = -1,
++ .num_resources = ARRAY_SIZE(ehci_resources),
++ .resource = ehci_resources,
++ .dev = {
++ .platform_data = &bcm63xx_ehci_pdata,
++ .dma_mask = &ehci_dmamask,
++ .coherent_dma_mask = DMA_BIT_MASK(32),
++ },
++};
++
++int __init bcm63xx_ehci_register(void)
++{
++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ return 0;
++
++ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
++ ehci_resources[0].end = ehci_resources[0].start;
++ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
++ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
++
++ return platform_device_register(&bcm63xx_ehci_device);
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -0,0 +1,6 @@
++#ifndef BCM63XX_DEV_USB_EHCI_H_
++#define BCM63XX_DEV_USB_EHCI_H_
++
++int bcm63xx_ehci_register(void);
++
++#endif /* BCM63XX_DEV_USB_EHCI_H_ */
--- /dev/null
+From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:28 +0100
+Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
+ enables it
+
+BCM63XX-based board can control the registration of the EHCI controller
+by setting their has_ehci0 flag to 1. Handle this in the generic
+code dealing with board registration and call the actual helper to register
+the EHCI controller.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
+ 1 file changed, 4 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -27,6 +27,7 @@
+ #include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+ #include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+@@ -882,6 +883,9 @@ int __init board_register_devices(void)
+ if (board.has_usbd)
+ bcm63xx_usbd_register(&board.usbd);
+
++ if (board.has_ehci0)
++ bcm63xx_ehci_register();
++
+ if (board.has_ohci0)
+ bcm63xx_ohci_register();
+
--- /dev/null
+From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
+From: Florian Fainelli <florian@openwrt.org>
+Date: Mon, 28 Jan 2013 20:06:30 +0100
+Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
+ overcurrent
+
+This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
+does not support proper overcurrent reporting.
+
+Signed-off-by: Florian Fainelli <florian@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-usb-ehci.c | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
+ static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
+ .big_endian_desc = 1,
+ .big_endian_mmio = 1,
++ .ignore_oc = 1,
+ .power_on = bcm63xx_ehci_power_on,
+ .power_off = bcm63xx_ehci_power_off,
+ .power_suspend = bcm63xx_ehci_power_off,
--- /dev/null
+From a2b8c7f648e168573905818dbb4cb90ca3957c65 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 28 Jun 2017 18:29:43 +0200
+Subject: [PATCH] mtd: bcm63xxpart: move imagetag parsing to its own parser
+
+Move the bcm963xx Image Tag parsing into its own partition parser. This
+Allows reusing the parser with different full flash parsers.
+
+While moving it, rename it to bcm963* to better reflect it isn't chip
+but board specific.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+I tried to keep the code as-is, to keep the changes as small as
+possible.
+
+One side effect is that the partitions get renumbered, which means any
+root=/dev/mtdblock* will now point to the wrong mtd device. But since
+bcm963xx boards will require these hardcoded in the kernel commandline
+anyway this should b a non issue, as it can be easily updated.
+
+There is no such thing in the mips/bcm63xx defconfig, so nothing to update
+there.
+
+ drivers/mtd/Kconfig | 1 +
+ drivers/mtd/bcm63xxpart.c | 155 ++----------------------
+ drivers/mtd/parsers/Kconfig | 11 ++
+ drivers/mtd/parsers/Makefile | 1 +
+ drivers/mtd/parsers/parser_imagetag.c | 214 ++++++++++++++++++++++++++++++++++
+ 5 files changed, 235 insertions(+), 147 deletions(-)
+ create mode 100644 drivers/mtd/parsers/parser_imagetag.c
+
+--- a/drivers/mtd/Kconfig
++++ b/drivers/mtd/Kconfig
+@@ -162,6 +162,7 @@ config MTD_BCM63XX_PARTS
+ tristate "BCM63XX CFE partitioning support"
+ depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
+ select CRC32
++ select MTD_PARSER_IMAGETAG
+ help
+ This provides partions parsing for BCM63xx devices with CFE
+ bootloaders.
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -93,51 +93,19 @@ static int bcm63xx_read_nvram(struct mtd
+ return 0;
+ }
+
+-static int bcm63xx_read_image_tag(struct mtd_info *master, const char *name,
+- loff_t tag_offset, struct bcm_tag *buf)
+-{
+- int ret;
+- size_t retlen;
+- u32 computed_crc;
+-
+- ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
+- if (ret)
+- return ret;
+-
+- if (retlen != sizeof(*buf))
+- return -EIO;
+-
+- computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
+- offsetof(struct bcm_tag, header_crc));
+- if (computed_crc == buf->header_crc) {
+- STR_NULL_TERMINATE(buf->board_id);
+- STR_NULL_TERMINATE(buf->tag_version);
+-
+- pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
+- name, tag_offset, buf->tag_version, buf->board_id);
+-
+- return 0;
+- }
+-
+- pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
+- name, tag_offset, buf->header_crc, computed_crc);
+- return 1;
+-}
++static const char * const bcm63xx_cfe_part_types[] = {
++ "bcm963xx-imagetag",
++ NULL,
++};
+
+ static int bcm63xx_parse_cfe_nor_partitions(struct mtd_info *master,
+ const struct mtd_partition **pparts, struct bcm963xx_nvram *nvram)
+ {
+- /* CFE, NVRAM and global Linux are always present */
+- int nrparts = 3, curpart = 0;
+- struct bcm_tag *buf = NULL;
+ struct mtd_partition *parts;
+- int ret;
+- unsigned int rootfsaddr, kerneladdr, spareaddr;
+- unsigned int rootfslen, kernellen, sparelen, totallen;
++ int nrparts = 3, curpart = 0;
+ unsigned int cfelen, nvramlen;
+ unsigned int cfe_erasesize;
+ int i;
+- bool rootfs_first = false;
+
+ cfe_erasesize = max_t(uint32_t, master->erasesize,
+ BCM963XX_CFE_BLOCK_SIZE);
+@@ -146,83 +114,9 @@ static int bcm63xx_parse_cfe_nor_partiti
+ nvramlen = nvram->psi_size * SZ_1K;
+ nvramlen = roundup(nvramlen, cfe_erasesize);
+
+- buf = vmalloc(sizeof(struct bcm_tag));
+- if (!buf)
+- return -ENOMEM;
+-
+- /* Get the tag */
+- ret = bcm63xx_read_image_tag(master, "rootfs", cfelen, buf);
+- if (!ret) {
+- STR_NULL_TERMINATE(buf->flash_image_start);
+- if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
+- rootfsaddr < BCM963XX_EXTENDED_SIZE) {
+- pr_err("invalid rootfs address: %*ph\n",
+- (int)sizeof(buf->flash_image_start),
+- buf->flash_image_start);
+- goto invalid_tag;
+- }
+-
+- STR_NULL_TERMINATE(buf->kernel_address);
+- if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
+- kerneladdr < BCM963XX_EXTENDED_SIZE) {
+- pr_err("invalid kernel address: %*ph\n",
+- (int)sizeof(buf->kernel_address),
+- buf->kernel_address);
+- goto invalid_tag;
+- }
+-
+- STR_NULL_TERMINATE(buf->kernel_length);
+- if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
+- pr_err("invalid kernel length: %*ph\n",
+- (int)sizeof(buf->kernel_length),
+- buf->kernel_length);
+- goto invalid_tag;
+- }
+-
+- STR_NULL_TERMINATE(buf->total_length);
+- if (kstrtouint(buf->total_length, 10, &totallen)) {
+- pr_err("invalid total length: %*ph\n",
+- (int)sizeof(buf->total_length),
+- buf->total_length);
+- goto invalid_tag;
+- }
+-
+- kerneladdr = kerneladdr - BCM963XX_EXTENDED_SIZE;
+- rootfsaddr = rootfsaddr - BCM963XX_EXTENDED_SIZE;
+- spareaddr = roundup(totallen, master->erasesize) + cfelen;
+-
+- if (rootfsaddr < kerneladdr) {
+- /* default Broadcom layout */
+- rootfslen = kerneladdr - rootfsaddr;
+- rootfs_first = true;
+- } else {
+- /* OpenWrt layout */
+- rootfsaddr = kerneladdr + kernellen;
+- rootfslen = spareaddr - rootfsaddr;
+- }
+- } else if (ret > 0) {
+-invalid_tag:
+- kernellen = 0;
+- rootfslen = 0;
+- rootfsaddr = 0;
+- spareaddr = cfelen;
+- } else {
+- goto out;
+- }
+- sparelen = master->size - spareaddr - nvramlen;
+-
+- /* Determine number of partitions */
+- if (rootfslen > 0)
+- nrparts++;
+-
+- if (kernellen > 0)
+- nrparts++;
+-
+ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
+- if (!parts) {
+- ret = -ENOMEM;
+- goto out;
+- }
++ if (!parts)
++ return -ENOMEM;
+
+ /* Start building partition list */
+ parts[curpart].name = "CFE";
+@@ -230,30 +124,6 @@ invalid_tag:
+ parts[curpart].size = cfelen;
+ curpart++;
+
+- if (kernellen > 0) {
+- int kernelpart = curpart;
+-
+- if (rootfslen > 0 && rootfs_first)
+- kernelpart++;
+- parts[kernelpart].name = "kernel";
+- parts[kernelpart].offset = kerneladdr;
+- parts[kernelpart].size = kernellen;
+- curpart++;
+- }
+-
+- if (rootfslen > 0) {
+- int rootfspart = curpart;
+-
+- if (kernellen > 0 && rootfs_first)
+- rootfspart--;
+- parts[rootfspart].name = "rootfs";
+- parts[rootfspart].offset = rootfsaddr;
+- parts[rootfspart].size = rootfslen;
+- if (sparelen > 0 && !rootfs_first)
+- parts[rootfspart].size += sparelen;
+- curpart++;
+- }
+-
+ parts[curpart].name = "nvram";
+ parts[curpart].offset = master->size - nvramlen;
+ parts[curpart].size = nvramlen;
+@@ -263,22 +133,13 @@ invalid_tag:
+ parts[curpart].name = "linux";
+ parts[curpart].offset = cfelen;
+ parts[curpart].size = master->size - cfelen - nvramlen;
++ parts[curpart].types = bcm63xx_cfe_part_types;
+
+ for (i = 0; i < nrparts; i++)
+ pr_info("Partition %d is %s offset %llx and length %llx\n", i,
+ parts[i].name, parts[i].offset, parts[i].size);
+
+- pr_info("Spare partition is offset %x and length %x\n", spareaddr,
+- sparelen);
+-
+ *pparts = parts;
+- ret = 0;
+-
+-out:
+- vfree(buf);
+-
+- if (ret)
+- return ret;
+
+ return nrparts;
+ }
+--- a/drivers/mtd/parsers/Kconfig
++++ b/drivers/mtd/parsers/Kconfig
+@@ -1,3 +1,14 @@
++config MTD_PARSER_IMAGETAG
++ tristate "Parser for BCM963XX Image Tag format partitions"
++ depends on BCM63XX || BMIPS || COMPILE_TEST
++ select CRC32
++ help
++ Image Tag is the firmware header used by broadcom on their xDSL line
++ of devices. It is used to describe the offsets and lengths of kernel
++ and rootfs partitions.
++ This driver adds support for parsing a partition with an Image Tag
++ header and creates up to two partitions, kernel and rootfs.
++
+ config MTD_PARSER_TRX
+ tristate "Parser for TRX format partitions"
+ depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST)
+--- a/drivers/mtd/parsers/Makefile
++++ b/drivers/mtd/parsers/Makefile
+@@ -1,2 +1,3 @@
++obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o
+ obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o
+ obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o
+--- /dev/null
++++ b/drivers/mtd/parsers/parser_imagetag.c
+@@ -0,0 +1,214 @@
++/*
++ * BCM63XX CFE image tag parser
++ *
++ * Copyright © 2006-2008 Florian Fainelli <florian@openwrt.org>
++ * Mike Albon <malbon@openwrt.org>
++ * Copyright © 2009-2010 Daniel Dickinson <openwrt@cshore.neomailbox.net>
++ * Copyright © 2011-2013 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify
++ * it under the terms of the GNU General Public License as published by
++ * the Free Software Foundation; either version 2 of the License, or
++ * (at your option) any later version.
++ *
++ */
++
++#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
++
++#include <linux/bcm963xx_tag.h>
++#include <linux/crc32.h>
++#include <linux/module.h>
++#include <linux/kernel.h>
++#include <linux/sizes.h>
++#include <linux/slab.h>
++#include <linux/vmalloc.h>
++#include <linux/mtd/mtd.h>
++#include <linux/mtd/partitions.h>
++
++/* Ensure strings read from flash structs are null terminated */
++#define STR_NULL_TERMINATE(x) \
++ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
++
++static int bcm963xx_read_imagetag(struct mtd_info *master, const char *name,
++ loff_t tag_offset, struct bcm_tag *buf)
++{
++ int ret;
++ size_t retlen;
++ u32 computed_crc;
++
++ ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
++ if (ret)
++ return ret;
++
++ if (retlen != sizeof(*buf))
++ return -EIO;
++
++ computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
++ offsetof(struct bcm_tag, header_crc));
++ if (computed_crc == buf->header_crc) {
++ STR_NULL_TERMINATE(buf->board_id);
++ STR_NULL_TERMINATE(buf->tag_version);
++
++ pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
++ name, tag_offset, buf->tag_version, buf->board_id);
++
++ return 0;
++ }
++
++ pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
++ name, tag_offset, buf->header_crc, computed_crc);
++ return -EINVAL;
++}
++
++static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master,
++ const struct mtd_partition **pparts,
++ struct mtd_part_parser_data *data)
++{
++ /* CFE, NVRAM and global Linux are always present */
++ int nrparts = 0, curpart = 0;
++ struct bcm_tag *buf = NULL;
++ struct mtd_partition *parts;
++ int ret;
++ unsigned int rootfsaddr, kerneladdr, spareaddr, offset;
++ unsigned int rootfslen, kernellen, sparelen, totallen;
++ int i;
++ bool rootfs_first = false;
++
++ buf = vmalloc(sizeof(struct bcm_tag));
++ if (!buf)
++ return -ENOMEM;
++
++ /* Get the tag */
++ ret = bcm963xx_read_imagetag(master, "rootfs", 0, buf);
++ if (!ret) {
++ STR_NULL_TERMINATE(buf->flash_image_start);
++ if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
++ rootfsaddr < BCM963XX_EXTENDED_SIZE) {
++ pr_err("invalid rootfs address: %*ph\n",
++ (int)sizeof(buf->flash_image_start),
++ buf->flash_image_start);
++ goto out;
++ }
++
++ STR_NULL_TERMINATE(buf->kernel_address);
++ if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
++ kerneladdr < BCM963XX_EXTENDED_SIZE) {
++ pr_err("invalid kernel address: %*ph\n",
++ (int)sizeof(buf->kernel_address),
++ buf->kernel_address);
++ goto out;
++ }
++
++ STR_NULL_TERMINATE(buf->kernel_length);
++ if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
++ pr_err("invalid kernel length: %*ph\n",
++ (int)sizeof(buf->kernel_length),
++ buf->kernel_length);
++ goto out;
++ }
++
++ STR_NULL_TERMINATE(buf->total_length);
++ if (kstrtouint(buf->total_length, 10, &totallen)) {
++ pr_err("invalid total length: %*ph\n",
++ (int)sizeof(buf->total_length),
++ buf->total_length);
++ goto out;
++ }
++
++ /*
++ * Addresses are flash absolute, so convert to partition
++ * relative addresses. Assume either kernel or rootfs will
++ * directly follow the image tag.
++ */
++ if (rootfsaddr < kerneladdr)
++ offset = rootfsaddr - sizeof(struct bcm_tag);
++ else
++ offset = kerneladdr - sizeof(struct bcm_tag);
++
++ kerneladdr = kerneladdr - offset;
++ rootfsaddr = rootfsaddr - offset;
++ spareaddr = roundup(totallen, master->erasesize);
++
++ if (rootfsaddr < kerneladdr) {
++ /* default Broadcom layout */
++ rootfslen = kerneladdr - rootfsaddr;
++ rootfs_first = true;
++ } else {
++ /* OpenWrt layout */
++ rootfsaddr = kerneladdr + kernellen;
++ rootfslen = spareaddr - rootfsaddr;
++ }
++ } else {
++ goto out;
++ }
++ sparelen = master->size - spareaddr;
++
++ /* Determine number of partitions */
++ if (rootfslen > 0)
++ nrparts++;
++
++ if (kernellen > 0)
++ nrparts++;
++
++ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
++ if (!parts) {
++ ret = -ENOMEM;
++ goto out;
++ }
++
++ /* Start building partition list */
++ if (kernellen > 0) {
++ int kernelpart = curpart;
++
++ if (rootfslen > 0 && rootfs_first)
++ kernelpart++;
++ parts[kernelpart].name = "kernel";
++ parts[kernelpart].offset = kerneladdr;
++ parts[kernelpart].size = kernellen;
++ curpart++;
++ }
++
++ if (rootfslen > 0) {
++ int rootfspart = curpart;
++
++ if (kernellen > 0 && rootfs_first)
++ rootfspart--;
++ parts[rootfspart].name = "rootfs";
++ parts[rootfspart].offset = rootfsaddr;
++ parts[rootfspart].size = rootfslen;
++ if (sparelen > 0 && !rootfs_first)
++ parts[rootfspart].size += sparelen;
++ curpart++;
++ }
++
++ for (i = 0; i < nrparts; i++)
++ pr_info("Partition %d is %s offset %llx and length %llx\n", i,
++ parts[i].name, parts[i].offset, parts[i].size);
++
++ pr_info("Spare partition is offset %x and length %x\n", spareaddr,
++ sparelen);
++
++ *pparts = parts;
++ ret = 0;
++
++out:
++ vfree(buf);
++
++ if (ret)
++ return ret;
++
++ return nrparts;
++}
++
++static struct mtd_part_parser bcm963xx_imagetag_parser = {
++ .parse_fn = bcm963xx_parse_imagetag_partitions,
++ .name = "bcm963xx-imagetag",
++};
++module_mtd_part_parser(bcm963xx_imagetag_parser);
++
++MODULE_LICENSE("GPL");
++MODULE_AUTHOR("Daniel Dickinson <openwrt@cshore.neomailbox.net>");
++MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
++MODULE_AUTHOR("Mike Albon <malbon@openwrt.org>");
++MODULE_AUTHOR("Jonas Gorski <jonas.gorski@gmail.com");
++MODULE_DESCRIPTION("MTD parser for BCM963XX CFE Image Tag partitions");
--- /dev/null
+From 89cd5efa4a0d342b860a726bb1d382e4db4b96a4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 28 Jun 2017 18:34:42 +0200
+Subject: [PATCH 1/2] mtd: bcm63xxpart: add of_match_table
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/bcm63xxpart.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -34,6 +34,7 @@
+ #include <linux/vmalloc.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/of.h>
+
+ #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
+
+@@ -172,9 +173,16 @@ out:
+ return ret;
+ };
+
++static const struct of_device_id parse_bcm63xx_cfe_match_table[] = {
++ { .compatible = "brcm,bcm963xx-cfe-nor-partitions" },
++ {},
++};
++MODULE_DEVICE_TABLE(of, parse_bcm63xx_cfe_match_table);
++
+ static struct mtd_part_parser bcm63xx_cfe_parser = {
+ .parse_fn = bcm63xx_parse_cfe_partitions,
+ .name = "bcm63xxpart",
++ .of_match_table = parse_bcm63xx_cfe_match_table,
+ };
+ module_mtd_part_parser(bcm63xx_cfe_parser);
+
--- /dev/null
+From 3303dd9f5b197cc2efd9cbd7b9b45fc1e510a393 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 28 Jun 2017 18:37:12 +0200
+Subject: [PATCH 2/2] mtd: parser_bcm63xx_imagetag: add of_match_table support
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/mtd/parsers/parser_imagetag.c | 8 ++++++++
+ 1 file changed, 8 insertions(+)
+
+--- a/drivers/mtd/parsers/parser_imagetag.c
++++ b/drivers/mtd/parsers/parser_imagetag.c
+@@ -24,6 +24,7 @@
+ #include <linux/vmalloc.h>
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
++#include <linux/of.h>
+
+ /* Ensure strings read from flash structs are null terminated */
+ #define STR_NULL_TERMINATE(x) \
+@@ -200,9 +201,16 @@ out:
+ return nrparts;
+ }
+
++static const struct of_device_id parse_bcm963xx_imagetag_match_table[] = {
++ { .compatible = "brcm,bcm963xx-imagetag" },
++ {},
++};
++MODULE_DEVICE_TABLE(of, parse_bcm963xx_imagetag_match_table);
++
+ static struct mtd_part_parser bcm963xx_imagetag_parser = {
+ .parse_fn = bcm963xx_parse_imagetag_partitions,
+ .name = "bcm963xx-imagetag",
++ .of_match_table = parse_bcm963xx_imagetag_match_table,
+ };
+ module_mtd_part_parser(bcm963xx_imagetag_parser);
+
--- /dev/null
+From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:07:42 +0200
+Subject: [PATCH 01/13] pinctrl: add bcm63xx base code
+
+Setup directory and add a helper for bcm63xx pinctrl support.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/Kconfig | 1 +
+ drivers/pinctrl/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/Kconfig | 3 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++
+ drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++
+ 7 files changed, 163 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/Kconfig
+ create mode 100644 drivers/pinctrl/bcm63xx/Makefile
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
+
+--- a/drivers/pinctrl/Kconfig
++++ b/drivers/pinctrl/Kconfig
+@@ -341,6 +341,7 @@ config PINCTRL_OCELOT
+ source "drivers/pinctrl/actions/Kconfig"
+ source "drivers/pinctrl/aspeed/Kconfig"
+ source "drivers/pinctrl/bcm/Kconfig"
++source "drivers/pinctrl/bcm63xx/Kconfig"
+ source "drivers/pinctrl/berlin/Kconfig"
+ source "drivers/pinctrl/freescale/Kconfig"
+ source "drivers/pinctrl/intel/Kconfig"
+--- a/drivers/pinctrl/Makefile
++++ b/drivers/pinctrl/Makefile
+@@ -46,6 +46,7 @@ obj-$(CONFIG_PINCTRL_OCELOT) += pinctrl-
+ obj-y += actions/
+ obj-$(CONFIG_ARCH_ASPEED) += aspeed/
+ obj-y += bcm/
++obj-y += bcm63xx/
+ obj-$(CONFIG_PINCTRL_BERLIN) += berlin/
+ obj-y += freescale/
+ obj-$(CONFIG_X86) += intel/
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -0,0 +1,3 @@
++config PINCTRL_BCM63XX
++ bool
++ select GPIO_GENERIC
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -0,0 +1 @@
++obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
+@@ -0,0 +1,155 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/bitops.h>
++#include <linux/device.h>
++#include <linux/gpio/driver.h>
++#include <linux/of_irq.h>
++
++#include "pinctrl-bcm63xx.h"
++#include "../core.h"
++
++#define BANK_SIZE sizeof(u32)
++#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE)
++
++#ifdef CONFIG_OF
++static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc,
++ const struct of_phandle_args *gpiospec,
++ u32 *flags)
++{
++ struct gpio_chip *base = gpiochip_get_data(gc);
++ int pin = gpiospec->args[0];
++
++ if (gc != &base[pin / PINS_PER_BANK])
++ return -EINVAL;
++
++ pin = pin % PINS_PER_BANK;
++
++ if (pin >= gc->ngpio)
++ return -EINVAL;
++
++ if (flags)
++ *flags = gpiospec->args[1];
++
++ return pin;
++}
++#endif
++
++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++ struct gpio_chip *base = gpiochip_get_data(chip);
++ char irq_name[7]; /* "gpioXX" */
++
++ /* FIXME: this is ugly */
++ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base));
++ return of_irq_get_byname(chip->of_node, irq_name);
++}
++
++static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc,
++ void __iomem *dirout, void __iomem *data,
++ size_t sz, int ngpio)
++
++{
++ int banks, chips, i, ret = -EINVAL;
++
++ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
++ banks = sz / BANK_SIZE;
++
++ for (i = 0; i < chips; i++) {
++ int offset, pins;
++ int reg_offset;
++ char *label;
++
++ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i);
++ if (!label)
++ return -ENOMEM;
++
++ offset = i * PINS_PER_BANK;
++ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
++
++ /* the registers are treated like a huge big endian register */
++ reg_offset = (banks - i - 1) * BANK_SIZE;
++
++ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset,
++ NULL, NULL, dirout + reg_offset, NULL,
++ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
++ if (ret)
++ return ret;
++
++ gc[i].request = gpiochip_generic_request;
++ gc[i].free = gpiochip_generic_free;
++
++ if (of_get_property(dev->of_node, "interrupt-names", NULL))
++ gc[i].to_irq = bcm63xx_gpio_to_irq;
++
++#ifdef CONFIG_OF
++ gc[i].of_gpio_n_cells = 2;
++ gc[i].of_xlate = bcm63xx_gpio_of_xlate;
++#endif
++
++ gc[i].label = label;
++ gc[i].ngpio = pins;
++
++ devm_gpiochip_add_data(dev, &gc[i], gc);
++ }
++
++ return 0;
++}
++
++static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name,
++ int ngpio)
++{
++ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
++
++ for (i = 0; i < chips; i++) {
++ int offset, pins;
++
++ offset = i * PINS_PER_BANK;
++ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
++
++ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins);
++ }
++}
++
++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
++ struct pinctrl_desc *desc,
++ void *priv, struct gpio_chip *gc,
++ int ngpio)
++{
++ struct pinctrl_dev *pctldev;
++ struct resource *res;
++ void __iomem *dirout, *data;
++ size_t sz;
++ int ret;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout");
++ dirout = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(dirout))
++ return ERR_CAST(dirout);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
++ data = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(data))
++ return ERR_CAST(data);
++
++ sz = resource_size(res);
++
++ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio);
++ if (ret)
++ return ERR_PTR(ret);
++
++ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv);
++ if (IS_ERR(pctldev))
++ return pctldev;
++
++ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio);
++
++ dev_info(&pdev->dev, "registered at mmio %p\n", dirout);
++
++ return pctldev;
++}
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
+@@ -0,0 +1,14 @@
++#ifndef __PINCTRL_BCM63XX
++#define __PINCTRL_BCM63XX
++
++#include <linux/kernel.h>
++#include <linux/gpio.h>
++#include <linux/pinctrl/pinctrl.h>
++#include <linux/platform_device.h>
++
++struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
++ struct pinctrl_desc *desc,
++ void *priv, struct gpio_chip *gc,
++ int ngpio);
++
++#endif
--- /dev/null
+From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:33:56 +0200
+Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6328 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt | 61 ++++++++++++++++++++++
+ 1 file changed, 61 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
+@@ -0,0 +1,61 @@
++* Broadcom BCM6328 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6328-pinctrl".
++- reg: Register specifies of dirout, dat, mode, mux registers.
++- reg-names: Must be "dirout", "dat", "mode", "mux".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6328-pinctrl";
++ reg = <0x10000080 0x8>,
++ <0x10000088 0x8>,
++ <0x10000098 0x4>,
++ <0x1000009c 0xc>;
++ reg-names = "dirout", "dat", "mode", "mux";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led
++gpio1 1 led
++gpio2 2 led
++gpio3 3 led
++gpio4 4 led
++gpio5 5 led
++gpio6 6 led, serial_led_data
++gpio7 7 led, serial_led_clk
++gpio8 8 led
++gpio9 9 led
++gpio10 10 led
++gpio11 11 led
++gpio12 12 led
++gpio13 13 led
++gpio14 14 led
++gpio15 15 led
++gpio16 16 led, pcie_clkreq
++gpio17 17 led
++gpio18 18 led
++gpio19 19 led
++gpio20 20 led
++gpio21 21 led
++gpio22 22 led
++gpio23 23 led
++gpio24 24 -
++gpio25 25 ephy0_act_led
++gpio26 26 ephy1_act_led
++gpio27 27 ephy2_act_led
++gpio28 28 ephy3_act_led
++gpio29 29 -
++gpio30 30 -
++gpio31 31 -
++hsspi_cs1 - hsspi_cs1
++usb_port1 - usb_host_port, usb_device_port
--- /dev/null
+From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:12:50 +0200
+Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328
+
+Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
+GPIOs, as LEDs for the integrated LED controller, or various other
+functions. Its pincontrol mux registers also control other aspects, like
+switching the second USB port between host and device mode.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++
+ 3 files changed, 464 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -1,3 +1,10 @@
+ config PINCTRL_BCM63XX
+ bool
+ select GPIO_GENERIC
++
++config PINCTRL_BCM6328
++ bool "BCM6328 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1 +1,2 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
++obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
+@@ -0,0 +1,456 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/kernel.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/machine.h>
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6328_MUX_LO_REG 0x4
++#define BCM6328_MUX_HI_REG 0x0
++#define BCM6328_MUX_OTHER_REG 0x8
++
++#define BCM6328_NGPIO 32
++
++struct bcm6328_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6328_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ unsigned mode_val:1;
++ unsigned mux_val:2;
++};
++
++struct bcm6328_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++ void __iomem *mux[3];
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio;
++};
++
++static const struct pinctrl_pin_desc bcm6328_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ PINCTRL_PIN(8, "gpio8"),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ PINCTRL_PIN(12, "gpio12"),
++ PINCTRL_PIN(13, "gpio13"),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ PINCTRL_PIN(27, "gpio27"),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ PINCTRL_PIN(30, "gpio30"),
++ PINCTRL_PIN(31, "gpio31"),
++
++ /*
++ * No idea where they really are; so let's put them according
++ * to their mux offsets.
++ */
++ PINCTRL_PIN(36, "hsspi_cs1"),
++ PINCTRL_PIN(38, "usb_p2"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++
++static unsigned hsspi_cs1_pins[] = { 36 };
++static unsigned usb_port1_pins[] = { 38 };
++
++#define BCM6328_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6328_pingroup bcm6328_groups[] = {
++ BCM6328_GROUP(gpio0),
++ BCM6328_GROUP(gpio1),
++ BCM6328_GROUP(gpio2),
++ BCM6328_GROUP(gpio3),
++ BCM6328_GROUP(gpio4),
++ BCM6328_GROUP(gpio5),
++ BCM6328_GROUP(gpio6),
++ BCM6328_GROUP(gpio7),
++ BCM6328_GROUP(gpio8),
++ BCM6328_GROUP(gpio9),
++ BCM6328_GROUP(gpio10),
++ BCM6328_GROUP(gpio11),
++ BCM6328_GROUP(gpio12),
++ BCM6328_GROUP(gpio13),
++ BCM6328_GROUP(gpio14),
++ BCM6328_GROUP(gpio15),
++ BCM6328_GROUP(gpio16),
++ BCM6328_GROUP(gpio17),
++ BCM6328_GROUP(gpio18),
++ BCM6328_GROUP(gpio19),
++ BCM6328_GROUP(gpio20),
++ BCM6328_GROUP(gpio21),
++ BCM6328_GROUP(gpio22),
++ BCM6328_GROUP(gpio23),
++ BCM6328_GROUP(gpio24),
++ BCM6328_GROUP(gpio25),
++ BCM6328_GROUP(gpio26),
++ BCM6328_GROUP(gpio27),
++ BCM6328_GROUP(gpio28),
++ BCM6328_GROUP(gpio29),
++ BCM6328_GROUP(gpio30),
++ BCM6328_GROUP(gpio31),
++
++ BCM6328_GROUP(hsspi_cs1),
++ BCM6328_GROUP(usb_port1),
++};
++
++/* GPIO_MODE */
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++/* PINMUX_SEL */
++static const char * const serial_led_data_groups[] = {
++ "gpio6",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio7",
++};
++
++static const char * const inet_act_led_groups[] = {
++ "gpio11",
++};
++
++static const char * const pcie_clkreq_groups[] = {
++ "gpio16",
++};
++
++static const char * const ephy0_act_led_groups[] = {
++ "gpio25",
++};
++
++static const char * const ephy1_act_led_groups[] = {
++ "gpio26",
++};
++
++static const char * const ephy2_act_led_groups[] = {
++ "gpio27",
++};
++
++static const char * const ephy3_act_led_groups[] = {
++ "gpio28",
++};
++
++static const char * const hsspi_cs1_groups[] = {
++ "hsspi_cs1"
++};
++
++static const char * const usb_host_port_groups[] = {
++ "usb_port1",
++};
++
++static const char * const usb_device_port_groups[] = {
++ "usb_port1",
++};
++
++#define BCM6328_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mode_val = 1, \
++ }
++
++#define BCM6328_MUX_FUN(n, mux) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mux_val = mux, \
++ }
++
++static const struct bcm6328_function bcm6328_funcs[] = {
++ BCM6328_MODE_FUN(led),
++ BCM6328_MUX_FUN(serial_led_data, 2),
++ BCM6328_MUX_FUN(serial_led_clk, 2),
++ BCM6328_MUX_FUN(inet_act_led, 1),
++ BCM6328_MUX_FUN(pcie_clkreq, 2),
++ BCM6328_MUX_FUN(ephy0_act_led, 1),
++ BCM6328_MUX_FUN(ephy1_act_led, 1),
++ BCM6328_MUX_FUN(ephy2_act_led, 1),
++ BCM6328_MUX_FUN(ephy3_act_led, 1),
++ BCM6328_MUX_FUN(hsspi_cs1, 2),
++ BCM6328_MUX_FUN(usb_host_port, 1),
++ BCM6328_MUX_FUN(usb_device_port, 2),
++};
++
++static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6328_groups);
++}
++
++static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6328_groups[group].name;
++}
++
++static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6328_groups[group].pins;
++ *num_pins = bcm6328_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6328_funcs);
++}
++
++static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6328_funcs[selector].name;
++}
++
++static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6328_funcs[selector].groups;
++ *num_groups = bcm6328_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
++ u32 mode, u32 mux)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ if (pin < 32) {
++ reg = __raw_readl(pctl->mode);
++ reg &= ~BIT(pin);
++ if (mode)
++ reg |= BIT(pin);
++ __raw_writel(reg, pctl->mode);
++ }
++
++ reg = __raw_readl(pctl->mux[pin / 16]);
++ reg &= ~(3UL << ((pin % 16) * 2));
++ reg |= mux << ((pin % 16) * 2);
++ __raw_writel(reg, pctl->mux[pin / 16]);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
++ const struct bcm6328_function *f = &bcm6328_funcs[selector];
++
++ bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
++
++ return 0;
++}
++
++static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ bcm6328_rmw_mux(pctl, offset, 0, 0);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6328_pctl_ops = {
++ .get_groups_count = bcm6328_pinctrl_get_group_count,
++ .get_group_name = bcm6328_pinctrl_get_group_name,
++ .get_group_pins = bcm6328_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6328_pmx_ops = {
++ .get_functions_count = bcm6328_pinctrl_get_func_count,
++ .get_function_name = bcm6328_pinctrl_get_func_name,
++ .get_function_groups = bcm6328_pinctrl_get_groups,
++ .set_mux = bcm6328_pinctrl_set_mux,
++ .gpio_request_enable = bcm6328_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6328_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6328_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode, *mux;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
++ mux = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mux))
++ return PTR_ERR(mux);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++ pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
++ pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
++ pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6328_pctl_ops;
++ pctl->desc.pmxops = &bcm6328_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
++ pctl->desc.pins = bcm6328_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ &pctl->gpio, BCM6328_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6328_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6328-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6328_pinctrl_driver = {
++ .probe = bcm6328_pinctrl_probe,
++ .driver = {
++ .name = "bcm6328-pinctrl",
++ .of_match_table = bcm6328_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6328_pinctrl_driver);
--- /dev/null
+From 962c46bf7f43df730e2d3698930e77958cc6b191 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:35:45 +0200
+Subject: [PATCH 04/16] Documentation: add BCM6348 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6348 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt | 32 ++++++++++++++++++++++
+ 1 file changed, 32 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
+@@ -0,0 +1,32 @@
++* Broadcom BCM6348 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6348-pinctrl".
++- reg: register Specifiers of dirout, dat, mode registers.
++- reg-names: Must be "dirout", "dat", "mode".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@fffe0080 {
++ compatible = "brcm,bcm6348-pinctrl";
++ reg = <0xfffe0080 0x8>,
++ <0xfffe0088 0x8>,
++ <0xfffe0098 0x4>;
++ reg-names = "dirout", "dat", "mode";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++group0 32-36 ext_mii, utopia, diag
++group1 22-31 ext_ephy, mii_snoop, mii_pccard,
++ spi_master_uart, utopia, diag
++group2 16-21 pci, diag
++group3 8-15 ext_mii, utopia
++group4 0-7 ext_ephy, mii_snoop, legacy_led, diag
--- /dev/null
+From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:14:13 +0200
+Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348
+
+Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of
+up to ten gpios into fourteen potential functions. It does not allow
+muxing individual pins. Some functions require more than one group to be
+muxed to the same function.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 391 ++++++++++++++++++++++++++++++
+ 3 files changed, 399 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -8,3 +8,10 @@ config PINCTRL_BCM6328
+ select PINCONF
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
++
++config PINCTRL_BCM6348
++ bool "BCM6348 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1,2 +1,3 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
++obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
+@@ -0,0 +1,391 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/machine.h>
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6348_NGPIO 37
++
++#define MAX_GROUP 4
++#define PINS_PER_GROUP 8
++#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP))
++#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4)
++#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin))
++
++struct bcm6348_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6348_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++ unsigned int value;
++};
++
++struct bcm6348_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6348_PIN(a, b, group) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(group), \
++ }
++
++static const struct pinctrl_pin_desc bcm6348_pins[] = {
++ BCM6348_PIN(0, "gpio0", 4),
++ BCM6348_PIN(1, "gpio1", 4),
++ BCM6348_PIN(2, "gpio2", 4),
++ BCM6348_PIN(3, "gpio3", 4),
++ BCM6348_PIN(4, "gpio4", 4),
++ BCM6348_PIN(5, "gpio5", 4),
++ BCM6348_PIN(6, "gpio6", 4),
++ BCM6348_PIN(7, "gpio7", 4),
++ BCM6348_PIN(8, "gpio8", 3),
++ BCM6348_PIN(9, "gpio9", 3),
++ BCM6348_PIN(10, "gpio10", 3),
++ BCM6348_PIN(11, "gpio11", 3),
++ BCM6348_PIN(12, "gpio12", 3),
++ BCM6348_PIN(13, "gpio13", 3),
++ BCM6348_PIN(14, "gpio14", 3),
++ BCM6348_PIN(15, "gpio15", 3),
++ BCM6348_PIN(16, "gpio16", 2),
++ BCM6348_PIN(17, "gpio17", 2),
++ BCM6348_PIN(18, "gpio18", 2),
++ BCM6348_PIN(19, "gpio19", 2),
++ BCM6348_PIN(20, "gpio20", 2),
++ BCM6348_PIN(21, "gpio21", 2),
++ BCM6348_PIN(22, "gpio22", 1),
++ BCM6348_PIN(23, "gpio23", 1),
++ BCM6348_PIN(24, "gpio24", 1),
++ BCM6348_PIN(25, "gpio25", 1),
++ BCM6348_PIN(26, "gpio26", 1),
++ BCM6348_PIN(27, "gpio27", 1),
++ BCM6348_PIN(28, "gpio28", 1),
++ BCM6348_PIN(29, "gpio29", 1),
++ BCM6348_PIN(30, "gpio30", 1),
++ BCM6348_PIN(31, "gpio31", 1),
++ BCM6348_PIN(32, "gpio32", 0),
++ BCM6348_PIN(33, "gpio33", 0),
++ BCM6348_PIN(34, "gpio34", 0),
++ BCM6348_PIN(35, "gpio35", 0),
++ BCM6348_PIN(36, "gpio36", 0),
++};
++
++enum bcm6348_muxes {
++ BCM6348_MUX_GPIO = 0,
++ BCM6348_MUX_EXT_EPHY,
++ BCM6348_MUX_MII_SNOOP,
++ BCM6348_MUX_LEGACY_LED,
++ BCM6348_MUX_MII_PCCARD,
++ BCM6348_MUX_PCI,
++ BCM6348_MUX_SPI_MASTER_UART,
++ BCM6348_MUX_EXT_MII,
++ BCM6348_MUX_UTOPIA,
++ BCM6348_MUX_DIAG,
++};
++
++static unsigned group0_pins[] = {
++ 32, 33, 34, 35, 36,
++};
++
++static unsigned group1_pins[] = {
++ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
++};
++
++static unsigned group2_pins[] = {
++ 16, 17, 18, 19, 20, 21,
++};
++
++static unsigned group3_pins[] = {
++ 8, 9, 10, 11, 12, 13, 14, 15,
++};
++
++static unsigned group4_pins[] = {
++ 0, 1, 2, 3, 4, 5, 6, 7,
++};
++
++#define BCM6348_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ } \
++
++static struct bcm6348_pingroup bcm6348_groups[] = {
++ BCM6348_GROUP(group0),
++ BCM6348_GROUP(group1),
++ BCM6348_GROUP(group2),
++ BCM6348_GROUP(group3),
++ BCM6348_GROUP(group4),
++};
++
++static const char * const ext_mii_groups[] = {
++ "group0",
++ "group3",
++};
++
++static const char * const ext_ephy_groups[] = {
++ "group1",
++ "group4"
++};
++
++static const char * const mii_snoop_groups[] = {
++ "group1",
++ "group4",
++};
++
++static const char * const legacy_led_groups[] = {
++ "group4",
++};
++
++static const char * const mii_pccard_groups[] = {
++ "group1",
++};
++
++static const char * const pci_groups[] = {
++ "group2",
++};
++
++static const char * const spi_master_uart_groups[] = {
++ "group1",
++};
++
++static const char * const utopia_groups[] = {
++ "group0",
++ "group1",
++ "group3",
++};
++
++static const char * const diag_groups[] = {
++ "group0",
++ "group1",
++ "group2",
++ "group4",
++};
++
++#define BCM6348_FUN(n, f) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .value = BCM6348_MUX_##f, \
++ }
++
++static const struct bcm6348_function bcm6348_funcs[] = {
++ BCM6348_FUN(ext_mii, EXT_MII),
++ BCM6348_FUN(ext_ephy, EXT_EPHY),
++ BCM6348_FUN(mii_snoop, MII_SNOOP),
++ BCM6348_FUN(legacy_led, LEGACY_LED),
++ BCM6348_FUN(mii_pccard, MII_PCCARD),
++ BCM6348_FUN(pci, PCI),
++ BCM6348_FUN(spi_master_uart, SPI_MASTER_UART),
++ BCM6348_FUN(utopia, UTOPIA),
++ BCM6348_FUN(diag, DIAG),
++};
++
++static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6348_groups);
++}
++
++static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6348_groups[group].name;
++}
++
++static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6348_groups[group].pins;
++ *num_pins = bcm6348_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6348_funcs);
++}
++
++static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6348_funcs[selector].name;
++}
++
++static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6348_funcs[selector].groups;
++ *num_groups = bcm6348_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++
++ reg = __raw_readl(pctl->mode);
++ reg &= ~mask;
++ reg |= val & mask;
++ __raw_writel(reg, pctl->mode);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6348_pingroup *grp = &bcm6348_groups[group];
++ const struct bcm6348_function *f = &bcm6348_funcs[selector];
++ u32 mask, val;
++
++ /*
++ * pins n..(n+7) share the same group, so we only need to look at
++ * the first pin.
++ */
++ mask = GROUP_MASK(grp->pins[0]);
++ val = f->value << GROUP_SHIFT(grp->pins[0]);
++
++ bcm6348_rmw_mux(pctl, mask, val);
++
++ return 0;
++}
++
++static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ struct pin_desc *desc;
++ u32 mask;
++
++ /* don't reconfigure if already muxed */
++ desc = pin_desc_get(pctldev, offset);
++ if (desc->mux_usecount)
++ return 0;
++
++ mask = GROUP_MASK(offset);
++
++ /* disable all functions using this pin */
++ bcm6348_rmw_mux(pctl, mask, 0);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6348_pctl_ops = {
++ .get_groups_count = bcm6348_pinctrl_get_group_count,
++ .get_group_name = bcm6348_pinctrl_get_group_name,
++ .get_group_pins = bcm6348_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6348_pmx_ops = {
++ .get_functions_count = bcm6348_pinctrl_get_func_count,
++ .get_function_name = bcm6348_pinctrl_get_func_name,
++ .get_function_groups = bcm6348_pinctrl_get_groups,
++ .set_mux = bcm6348_pinctrl_set_mux,
++ .gpio_request_enable = bcm6348_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6348_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6348_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++
++ /* disable all muxes by default */
++ __raw_writel(0, pctl->mode);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6348_pctl_ops;
++ pctl->desc.pmxops = &bcm6348_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6348_pins);
++ pctl->desc.pins = bcm6348_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6348_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6348_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6348-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6348_pinctrl_driver = {
++ .probe = bcm6348_pinctrl_probe,
++ .driver = {
++ .name = "bcm6348-pinctrl",
++ .of_match_table = bcm6348_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6348_pinctrl_driver);
--- /dev/null
+From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:00 +0200
+Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6358 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++
+ 1 file changed, 44 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
+@@ -0,0 +1,44 @@
++* Broadcom BCM6358 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6358-pinctrl".
++- reg: Register specifiers of dirout, dat registers.
++- reg-names: Must be "dirout", "dat".
++- brcm,gpiomode: Phandle to the shared gpiomode register.
++- gpio-controller: Identifies this node as a gpio-controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@fffe0080 {
++ compatible = "brcm,bcm6358-pinctrl";
++ reg = <0xfffe0080 0x8>,
++ <0xfffe0088 0x8>,
++ <0xfffe0098 0x4>;
++ reg-names = "dirout", "dat";
++ brcm,gpiomode = <&gpiomode>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++gpiomode: syscon@fffe0098 {
++ compatible = "brcm,bcm6358-gpiomode", "syscon";
++ reg = <0xfffe0098 0x4>;
++ native-endian;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++ebi_cs_grp 30-31 ebi_cs
++uart1_grp 28-31 uart1
++spi_cs_grp 32-33 spi_cs
++async_modem_grp 12-15 async_modem
++legacy_led_grp 9-15 legacy_led
++serial_led_grp 6-7 serial_led
++led_grp 0-3 led
++utopia_grp 12-15, 22-31 utopia
++pwm_syn_clk_grp 8 pwm_syn_clk
++sys_irq_grp 5 sys_irq
--- /dev/null
+From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:16:01 +0200
+Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
+
+Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
+functions onto the GPIO pins. It does not support configuring individual
+pins but only whole groups. These groups may overlap, and still require
+the directions to be set correctly in the GPIO register. In addition the
+functions register controls other, not directly mux related functions.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 8 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
+ 3 files changed, 402 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -15,3 +15,11 @@ config PINCTRL_BCM6348
+ select PINCONF
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
++
++config PINCTRL_BCM6358
++ bool "BCM6358 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
++ select MFD_SYSCON
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1,3 +1,4 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
++obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
+@@ -0,0 +1,393 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/gpio/driver.h>
++#include <linux/mfd/syscon.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/regmap.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++/* GPIO_MODE register */
++#define BCM6358_MODE_MUX_NONE 0
++
++/* overlays on gpio pins */
++#define BCM6358_MODE_MUX_EBI_CS BIT(5)
++#define BCM6358_MODE_MUX_UART1 BIT(6)
++#define BCM6358_MODE_MUX_SPI_CS BIT(7)
++#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
++#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
++#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
++#define BCM6358_MODE_MUX_LED BIT(11)
++#define BCM6358_MODE_MUX_UTOPIA BIT(12)
++#define BCM6358_MODE_MUX_CLKRST BIT(13)
++#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
++#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
++
++#define BCM6358_NGPIO 40
++
++struct bcm6358_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++
++ const u16 mode_val;
++
++ /* non-GPIO function muxes require the gpio direction to be set */
++ const u16 direction;
++};
++
++struct bcm6358_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++};
++
++struct bcm6358_pinctrl {
++ struct device *dev;
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ struct regmap_field *overlays;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
++ BCM6358_MODE_MUX_##bit2 | \
++ BCM6358_MODE_MUX_##bit3), \
++ }
++
++static const struct pinctrl_pin_desc bcm6358_pins[] = {
++ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
++ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
++ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
++ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
++ PINCTRL_PIN(4, "gpio4"),
++ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
++ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
++ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
++ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
++ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
++ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
++ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
++ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
++ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
++ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++};
++
++static unsigned ebi_cs_grp_pins[] = { 30, 31 };
++
++static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
++
++static unsigned spi_cs_grp_pins[] = { 32, 33 };
++
++static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
++
++static unsigned serial_led_grp_pins[] = { 6, 7 };
++
++static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
++
++static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
++
++static unsigned utopia_grp_pins[] = {
++ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
++};
++
++static unsigned pwm_syn_clk_grp_pins[] = { 8 };
++
++static unsigned sys_irq_grp_pins[] = { 5 };
++
++#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ .mode_val = BCM6358_MODE_MUX_##bit, \
++ .direction = dir, \
++ }
++
++static const struct bcm6358_pingroup bcm6358_groups[] = {
++ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
++ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
++ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
++ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
++ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
++ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
++ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
++ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
++ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
++ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
++};
++
++static const char * const ebi_cs_groups[] = {
++ "ebi_cs_grp"
++};
++
++static const char * const uart1_groups[] = {
++ "uart1_grp"
++};
++
++static const char * const spi_cs_2_3_groups[] = {
++ "spi_cs_2_3_grp"
++};
++
++static const char * const async_modem_groups[] = {
++ "async_modem_grp"
++};
++
++static const char * const legacy_led_groups[] = {
++ "legacy_led_grp",
++};
++
++static const char * const serial_led_groups[] = {
++ "serial_led_grp",
++};
++
++static const char * const led_groups[] = {
++ "led_grp",
++};
++
++static const char * const clkrst_groups[] = {
++ "clkrst_grp",
++};
++
++static const char * const pwm_syn_clk_groups[] = {
++ "pwm_syn_clk_grp",
++};
++
++static const char * const sys_irq_groups[] = {
++ "sys_irq_grp",
++};
++
++#define BCM6358_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ }
++
++static const struct bcm6358_function bcm6358_funcs[] = {
++ BCM6358_FUN(ebi_cs),
++ BCM6358_FUN(uart1),
++ BCM6358_FUN(spi_cs_2_3),
++ BCM6358_FUN(async_modem),
++ BCM6358_FUN(legacy_led),
++ BCM6358_FUN(serial_led),
++ BCM6358_FUN(led),
++ BCM6358_FUN(clkrst),
++ BCM6358_FUN(pwm_syn_clk),
++ BCM6358_FUN(sys_irq),
++};
++
++static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6358_groups);
++}
++
++static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6358_groups[group].name;
++}
++
++static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6358_groups[group].pins;
++ *num_pins = bcm6358_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6358_funcs);
++}
++
++static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6358_funcs[selector].name;
++}
++
++static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6358_funcs[selector].groups;
++ *num_groups = bcm6358_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
++ u32 val = grp->mode_val;
++ u32 mask = val;
++ unsigned pin;
++
++ for (pin = 0; pin < grp->num_pins; pin++)
++ mask |= (unsigned long)bcm6358_pins[pin].drv_data;
++
++ regmap_field_update_bits(pctl->overlays, mask, val);
++
++ for (pin = 0; pin < grp->num_pins; pin++) {
++ int hw_gpio = bcm6358_pins[pin].number;
++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
++
++ if (grp->direction & BIT(pin))
++ gc->direction_output(gc, hw_gpio % 32, 0);
++ else
++ gc->direction_input(gc, hw_gpio % 32);
++ }
++
++ return 0;
++}
++
++static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ u32 mask;
++
++ mask = (unsigned long)bcm6358_pins[offset].drv_data;
++ if (!mask)
++ return 0;
++
++ /* disable all functions using this pin */
++ return regmap_field_update_bits(pctl->overlays, mask, 0);
++}
++
++static struct pinctrl_ops bcm6358_pctl_ops = {
++ .get_groups_count = bcm6358_pinctrl_get_group_count,
++ .get_group_name = bcm6358_pinctrl_get_group_name,
++ .get_group_pins = bcm6358_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6358_pmx_ops = {
++ .get_functions_count = bcm6358_pinctrl_get_func_count,
++ .get_function_name = bcm6358_pinctrl_get_func_name,
++ .get_function_groups = bcm6358_pinctrl_get_groups,
++ .set_mux = bcm6358_pinctrl_set_mux,
++ .gpio_request_enable = bcm6358_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6358_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6358_pinctrl *pctl;
++ struct regmap *mode;
++ struct reg_field overlays = REG_FIELD(0, 0, 15);
++
++ if (pdev->dev.of_node)
++ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
++ "brcm,gpiomode");
++ else
++ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098");
++
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
++ if (IS_ERR(pctl->overlays))
++ return PTR_ERR(pctl->overlays);
++
++ /* disable all muxes by default */
++ regmap_field_write(pctl->overlays, 0);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6358_pctl_ops;
++ pctl->desc.pmxops = &bcm6358_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
++ pctl->desc.pins = bcm6358_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6358_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6358_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6358-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6358_pinctrl_driver = {
++ .probe = bcm6358_pinctrl_probe,
++ .driver = {
++ .name = "bcm6358-pinctrl",
++ .of_match_table = bcm6358_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6358_pinctrl_driver);
--- /dev/null
+From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:18 +0200
+Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6362 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt | 79 ++++++++++++++++++++++
+ 1 file changed, 79 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
+@@ -0,0 +1,79 @@
++* Broadcom BCM6362 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6362-pinctrl"
++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6362-pinctrl";
++ reg = <0x10000080 0x8>,
++ <0x10000088 0x8>,
++ <0x10000090 0x4>,
++ <0x10000098 0x4>,
++ <0x1000009c 0x4>,
++ <0x100000b8 0x4>;
++ reg-names = "dirout", "dat", "led",
++ "mode", "ctrl", "basemode";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led, usb_device_led
++gpio1 1 led, sys_irq
++gpio2 2 led, serial_led_clk
++gpio3 3 led, serial_led_data
++gpio4 4 led, robosw_led_data
++gpio5 5 led, robosw_led_clk
++gpio6 6 led, robosw_led0
++gpio7 7 led, robosw_led1
++gpio8 8 led, inet_led
++gpio9 9 led, spi_cs2
++gpio10 10 led, spi_cs3
++gpio11 11 led, ntr_pulse
++gpio12 12 led, uart1_scts
++gpio13 13 led, uart1_srts
++gpio14 14 led, uart1_sdin
++gpio15 15 led, uart1_sdout
++gpio16 16 led, adsl_spi_miso
++gpio17 17 led, adsl_spi_mosi
++gpio18 18 led, adsl_spi_clk
++gpio19 19 led, adsl_spi_cs
++gpio20 20 led, ephy0_led
++gpio21 21 led, ephy1_led
++gpio22 22 led, ephy2_led
++gpio23 23 led, ephy3_led
++gpio24 24 ext_irq0
++gpio25 25 ext_irq1
++gpio26 26 ext_irq2
++gpio27 27 ext_irq3
++gpio28 28 -
++gpio29 29 -
++gpio30 30 -
++gpio31 31 -
++gpio32 32 wifi
++gpio33 33 wifi
++gpio34 34 wifi
++gpio35 35 wifi
++gpio36 36 wifi
++gpio37 37 wifi
++gpio38 38 wifi
++gpio39 39 wifi
++gpio40 40 wifi
++gpio41 41 wifi
++gpio42 42 wifi
++gpio43 43 wifi
++gpio44 44 wifi
++gpio45 45 wifi
++gpio46 46 wifi
++gpio47 47 wifi
++nand_grp 8, 12-23, 27 nand
--- /dev/null
+From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:17:20 +0200
+Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362
+
+Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
+GPIO pins to the LED controller, to be available by the integrated
+wifi, or other functions. It also supports overlay groups, of which
+only NAND is documented.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++
+ 3 files changed, 700 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -23,3 +23,10 @@ config PINCTRL_BCM6358
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
+ select MFD_SYSCON
++
++config PINCTRL_BCM6362
++ bool "BCM6362 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
++obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
+@@ -0,0 +1,692 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6362_NGPIO 48
++
++/* GPIO_BASEMODE register */
++#define BASEMODE_NAND BIT(2)
++
++enum bcm6362_pinctrl_reg {
++ BCM6362_LEDCTRL,
++ BCM6362_MODE,
++ BCM6362_CTRL,
++ BCM6362_BASEMODE,
++};
++
++struct bcm6362_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6362_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ enum bcm6362_pinctrl_reg reg;
++ u32 basemode_mask;
++};
++
++struct bcm6362_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *led;
++ void __iomem *mode;
++ void __iomem *ctrl;
++ void __iomem *basemode;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6362_PIN(a, b, mask) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(mask), \
++ }
++
++static const struct pinctrl_pin_desc bcm6362_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ BCM6362_PIN(8, "gpio8", BASEMODE_NAND),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ BCM6362_PIN(12, "gpio12", BASEMODE_NAND),
++ BCM6362_PIN(13, "gpio13", BASEMODE_NAND),
++ BCM6362_PIN(14, "gpio14", BASEMODE_NAND),
++ BCM6362_PIN(15, "gpio15", BASEMODE_NAND),
++ BCM6362_PIN(16, "gpio16", BASEMODE_NAND),
++ BCM6362_PIN(17, "gpio17", BASEMODE_NAND),
++ BCM6362_PIN(18, "gpio18", BASEMODE_NAND),
++ BCM6362_PIN(19, "gpio19", BASEMODE_NAND),
++ BCM6362_PIN(20, "gpio20", BASEMODE_NAND),
++ BCM6362_PIN(21, "gpio21", BASEMODE_NAND),
++ BCM6362_PIN(22, "gpio22", BASEMODE_NAND),
++ BCM6362_PIN(23, "gpio23", BASEMODE_NAND),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ BCM6362_PIN(27, "gpio27", BASEMODE_NAND),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ PINCTRL_PIN(30, "gpio30"),
++ PINCTRL_PIN(31, "gpio31"),
++ PINCTRL_PIN(32, "gpio32"),
++ PINCTRL_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++ PINCTRL_PIN(40, "gpio40"),
++ PINCTRL_PIN(41, "gpio41"),
++ PINCTRL_PIN(42, "gpio42"),
++ PINCTRL_PIN(43, "gpio43"),
++ PINCTRL_PIN(44, "gpio44"),
++ PINCTRL_PIN(45, "gpio45"),
++ PINCTRL_PIN(46, "gpio46"),
++ PINCTRL_PIN(47, "gpio47"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned gpio32_pins[] = { 32 };
++static unsigned gpio33_pins[] = { 33 };
++static unsigned gpio34_pins[] = { 34 };
++static unsigned gpio35_pins[] = { 35 };
++static unsigned gpio36_pins[] = { 36 };
++static unsigned gpio37_pins[] = { 37 };
++static unsigned gpio38_pins[] = { 38 };
++static unsigned gpio39_pins[] = { 39 };
++static unsigned gpio40_pins[] = { 40 };
++static unsigned gpio41_pins[] = { 41 };
++static unsigned gpio42_pins[] = { 42 };
++static unsigned gpio43_pins[] = { 43 };
++static unsigned gpio44_pins[] = { 44 };
++static unsigned gpio45_pins[] = { 45 };
++static unsigned gpio46_pins[] = { 46 };
++static unsigned gpio47_pins[] = { 47 };
++
++static unsigned nand_grp_pins[] = {
++ 8, 12, 13, 14, 15, 16, 17,
++ 18, 19, 20, 21, 22, 23, 27,
++};
++
++#define BCM6362_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6362_pingroup bcm6362_groups[] = {
++ BCM6362_GROUP(gpio0),
++ BCM6362_GROUP(gpio1),
++ BCM6362_GROUP(gpio2),
++ BCM6362_GROUP(gpio3),
++ BCM6362_GROUP(gpio4),
++ BCM6362_GROUP(gpio5),
++ BCM6362_GROUP(gpio6),
++ BCM6362_GROUP(gpio7),
++ BCM6362_GROUP(gpio8),
++ BCM6362_GROUP(gpio9),
++ BCM6362_GROUP(gpio10),
++ BCM6362_GROUP(gpio11),
++ BCM6362_GROUP(gpio12),
++ BCM6362_GROUP(gpio13),
++ BCM6362_GROUP(gpio14),
++ BCM6362_GROUP(gpio15),
++ BCM6362_GROUP(gpio16),
++ BCM6362_GROUP(gpio17),
++ BCM6362_GROUP(gpio18),
++ BCM6362_GROUP(gpio19),
++ BCM6362_GROUP(gpio20),
++ BCM6362_GROUP(gpio21),
++ BCM6362_GROUP(gpio22),
++ BCM6362_GROUP(gpio23),
++ BCM6362_GROUP(gpio24),
++ BCM6362_GROUP(gpio25),
++ BCM6362_GROUP(gpio26),
++ BCM6362_GROUP(gpio27),
++ BCM6362_GROUP(gpio28),
++ BCM6362_GROUP(gpio29),
++ BCM6362_GROUP(gpio30),
++ BCM6362_GROUP(gpio31),
++ BCM6362_GROUP(gpio32),
++ BCM6362_GROUP(gpio33),
++ BCM6362_GROUP(gpio34),
++ BCM6362_GROUP(gpio35),
++ BCM6362_GROUP(gpio36),
++ BCM6362_GROUP(gpio37),
++ BCM6362_GROUP(gpio38),
++ BCM6362_GROUP(gpio39),
++ BCM6362_GROUP(gpio40),
++ BCM6362_GROUP(gpio41),
++ BCM6362_GROUP(gpio42),
++ BCM6362_GROUP(gpio43),
++ BCM6362_GROUP(gpio44),
++ BCM6362_GROUP(gpio45),
++ BCM6362_GROUP(gpio46),
++ BCM6362_GROUP(gpio47),
++ BCM6362_GROUP(nand_grp),
++};
++
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++static const char * const usb_device_led_groups[] = {
++ "gpio0",
++};
++
++static const char * const sys_irq_groups[] = {
++ "gpio1",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio2",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio3",
++};
++
++static const char * const robosw_led_data_groups[] = {
++ "gpio4",
++};
++
++static const char * const robosw_led_clk_groups[] = {
++ "gpio5",
++};
++
++static const char * const robosw_led0_groups[] = {
++ "gpio6",
++};
++
++static const char * const robosw_led1_groups[] = {
++ "gpio7",
++};
++
++static const char * const inet_led_groups[] = {
++ "gpio8",
++};
++
++static const char * const spi_cs2_groups[] = {
++ "gpio9",
++};
++
++static const char * const spi_cs3_groups[] = {
++ "gpio10",
++};
++
++static const char * const ntr_pulse_groups[] = {
++ "gpio11",
++};
++
++static const char * const uart1_scts_groups[] = {
++ "gpio12",
++};
++
++static const char * const uart1_srts_groups[] = {
++ "gpio13",
++};
++
++static const char * const uart1_sdin_groups[] = {
++ "gpio14",
++};
++
++static const char * const uart1_sdout_groups[] = {
++ "gpio15",
++};
++
++static const char * const adsl_spi_miso_groups[] = {
++ "gpio16",
++};
++
++static const char * const adsl_spi_mosi_groups[] = {
++ "gpio17",
++};
++
++static const char * const adsl_spi_clk_groups[] = {
++ "gpio18",
++};
++
++static const char * const adsl_spi_cs_groups[] = {
++ "gpio19",
++};
++
++static const char * const ephy0_led_groups[] = {
++ "gpio20",
++};
++
++static const char * const ephy1_led_groups[] = {
++ "gpio21",
++};
++
++static const char * const ephy2_led_groups[] = {
++ "gpio22",
++};
++
++static const char * const ephy3_led_groups[] = {
++ "gpio23",
++};
++
++static const char * const ext_irq0_groups[] = {
++ "gpio24",
++};
++
++static const char * const ext_irq1_groups[] = {
++ "gpio25",
++};
++
++static const char * const ext_irq2_groups[] = {
++ "gpio26",
++};
++
++static const char * const ext_irq3_groups[] = {
++ "gpio27",
++};
++
++static const char * const wifi_groups[] = {
++ "gpio32",
++ "gpio33",
++ "gpio34",
++ "gpio35",
++ "gpio36",
++ "gpio37",
++ "gpio38",
++ "gpio39",
++ "gpio40",
++ "gpio41",
++ "gpio42",
++ "gpio43",
++ "gpio44",
++ "gpio45",
++ "gpio46",
++ "gpio47",
++};
++
++static const char * const nand_groups[] = {
++ "nand_grp",
++};
++
++#define BCM6362_LED_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_LEDCTRL, \
++ }
++
++#define BCM6362_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_MODE, \
++ }
++
++#define BCM6362_CTRL_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_CTRL, \
++ }
++
++#define BCM6362_BASEMODE_FUN(n, mask) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM6362_BASEMODE, \
++ .basemode_mask = (mask), \
++ }
++
++static const struct bcm6362_function bcm6362_funcs[] = {
++ BCM6362_LED_FUN(led),
++ BCM6362_MODE_FUN(usb_device_led),
++ BCM6362_MODE_FUN(sys_irq),
++ BCM6362_MODE_FUN(serial_led_clk),
++ BCM6362_MODE_FUN(serial_led_data),
++ BCM6362_MODE_FUN(robosw_led_data),
++ BCM6362_MODE_FUN(robosw_led_clk),
++ BCM6362_MODE_FUN(robosw_led0),
++ BCM6362_MODE_FUN(robosw_led1),
++ BCM6362_MODE_FUN(inet_led),
++ BCM6362_MODE_FUN(spi_cs2),
++ BCM6362_MODE_FUN(spi_cs3),
++ BCM6362_MODE_FUN(ntr_pulse),
++ BCM6362_MODE_FUN(uart1_scts),
++ BCM6362_MODE_FUN(uart1_srts),
++ BCM6362_MODE_FUN(uart1_sdin),
++ BCM6362_MODE_FUN(uart1_sdout),
++ BCM6362_MODE_FUN(adsl_spi_miso),
++ BCM6362_MODE_FUN(adsl_spi_mosi),
++ BCM6362_MODE_FUN(adsl_spi_clk),
++ BCM6362_MODE_FUN(adsl_spi_cs),
++ BCM6362_MODE_FUN(ephy0_led),
++ BCM6362_MODE_FUN(ephy1_led),
++ BCM6362_MODE_FUN(ephy2_led),
++ BCM6362_MODE_FUN(ephy3_led),
++ BCM6362_MODE_FUN(ext_irq0),
++ BCM6362_MODE_FUN(ext_irq1),
++ BCM6362_MODE_FUN(ext_irq2),
++ BCM6362_MODE_FUN(ext_irq3),
++ BCM6362_CTRL_FUN(wifi),
++ BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
++};
++
++static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6362_groups);
++}
++
++static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6362_groups[group].name;
++}
++
++static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6362_groups[group].pins;
++ *num_pins = bcm6362_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6362_funcs);
++}
++
++static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6362_funcs[selector].name;
++}
++
++static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6362_funcs[selector].groups;
++ *num_groups = bcm6362_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg,
++ u32 mask, u32 val)
++{
++ unsigned long flags;
++ u32 tmp;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ tmp = __raw_readl(reg);
++ tmp &= ~mask;
++ tmp |= val & mask;
++ __raw_writel(tmp, reg);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin)
++{
++ const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
++ u32 mask = BIT(pin % 32);
++
++ if (desc->drv_data)
++ bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0);
++
++ if (pin < 32) {
++ /* base mode 0 => gpio 1 => mux function */
++ bcm6362_rmw_mux(pctl, pctl->mode, mask, 0);
++
++ /* pins 0-23 might be muxed to led */
++ if (pin < 24)
++ bcm6362_rmw_mux(pctl, pctl->led, mask, 0);
++ } else {
++ /* ctrl reg 0 => wifi function 1 => gpio */
++ bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask);
++ }
++}
++
++static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6362_pingroup *grp = &bcm6362_groups[group];
++ const struct bcm6362_function *f = &bcm6362_funcs[selector];
++ unsigned i;
++ void __iomem *reg;
++ u32 val, mask;
++
++ for (i = 0; i < grp->num_pins; i++)
++ bcm6362_set_gpio(pctl, grp->pins[i]);
++
++ switch (f->reg) {
++ case BCM6362_LEDCTRL:
++ reg = pctl->led;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM6362_MODE:
++ reg = pctl->ctrl;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM6362_CTRL:
++ reg = pctl->ctrl;
++ mask = BIT(grp->pins[0]);
++ val = 0;
++ break;
++ case BCM6362_BASEMODE:
++ reg = pctl->basemode;
++ mask = f->basemode_mask;
++ val = f->basemode_mask;
++ break;
++ default:
++ WARN_ON(1);
++ return -EINVAL;
++ }
++
++ bcm6362_rmw_mux(pctl, reg, mask, val);
++
++ return 0;
++}
++
++static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ bcm6362_set_gpio(pctl, offset);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6362_pctl_ops = {
++ .get_groups_count = bcm6362_pinctrl_get_group_count,
++ .get_group_name = bcm6362_pinctrl_get_group_name,
++ .get_group_pins = bcm6362_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6362_pmx_ops = {
++ .get_functions_count = bcm6362_pinctrl_get_func_count,
++ .get_function_name = bcm6362_pinctrl_get_func_name,
++ .get_function_groups = bcm6362_pinctrl_get_groups,
++ .set_mux = bcm6362_pinctrl_set_mux,
++ .gpio_request_enable = bcm6362_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6362_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6362_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *led, *mode, *ctrl, *basemode;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
++ led = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(led))
++ return PTR_ERR(led);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
++ ctrl = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(ctrl))
++ return PTR_ERR(ctrl);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
++ basemode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(basemode))
++ return PTR_ERR(basemode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->led = led;
++ pctl->mode = mode;
++ pctl->ctrl = ctrl;
++ pctl->basemode = basemode;
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6362_pctl_ops;
++ pctl->desc.pmxops = &bcm6362_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6362_pins);
++ pctl->desc.pins = bcm6362_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6362_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6362_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6362-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6362_pinctrl_driver = {
++ .probe = bcm6362_pinctrl_probe,
++ .driver = {
++ .name = "bcm6362-pinctrl",
++ .of_match_table = bcm6362_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6362_pinctrl_driver);
--- /dev/null
+From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:36:51 +0200
+Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6368 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++
+ 1 file changed, 67 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
+@@ -0,0 +1,67 @@
++* Broadcom BCM6368 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6368-pinctrl".
++- reg: Register specifiers of dirout, dat, mode registers.
++- reg-names: Must be "dirout", "dat", "mode".
++- brcm,gpiobasemode: Phandle to the gpio basemode register.
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6368-pinctrl";
++ reg = <0x10000080 0x08>,
++ <0x10000088 0x08>,
++ <0x10000098 0x04>;
++ reg-names = "dirout", "dat", "mode";
++ brcm,gpiobasemode = <&gpiobasemode>;
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++gpiobasemode: syscon@100000b8 {
++ compatible = "brcm,bcm6368-gpiobasemode", "syscon";
++ reg = <0x100000b8 4>;
++ native-endian;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 analog_afe0
++gpio1 1 analog_afe1
++gpio2 2 sys_irq
++gpio3 3 serial_led_data
++gpio4 4 serial_led_clk
++gpio5 5 inet_led
++gpio6 6 ephy0_led
++gpio7 7 ephy1_led
++gpio8 8 ephy2_led
++gpio9 9 ephy3_led
++gpio10 10 robosw_led_data
++gpio11 11 robosw_led_clk
++gpio12 12 robosw_led0
++gpio13 13 robosw_led1
++gpio14 14 usb_device_led
++gpio15 15 -
++gpio16 16 pci_req1
++gpio17 17 pci_gnt1
++gpio18 18 pci_intb
++gpio19 19 pci_req0
++gpio20 20 pci_gnt0
++gpio21 21 -
++gpio22 22 pcmcia_cd1
++gpio23 23 pcmcia_cd2
++gpio24 24 pcmcia_vs1
++gpio25 25 pcmcia_vs2
++gpio26 26 ebi_cs2
++gpio27 27 ebi_cs3
++gpio28 28 spi_cs2
++gpio29 29 spi_cs3
++gpio30 30 spi_cs4
++gpio31 31 spi_cs5
++uart1_grp 30-33 uart1
--- /dev/null
+From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:18:25 +0200
+Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368
+
+Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
+GPIOs onto alternative functions. Not all are documented.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 15 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++
+ 3 files changed, 589 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -30,3 +30,18 @@ config PINCTRL_BCM6362
+ select PINCONF
+ select PINCTRL_BCM63XX
+ select GENERIC_PINCONF
++
++config PINCTRL_BCM6368
++ bool "BCM6368 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
++ select MFD_SYSCON
++
++config PINCTRL_BCM63268
++ bool "BCM63268 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
++obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
+@@ -0,0 +1,573 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/bitops.h>
++#include <linux/kernel.h>
++#include <linux/gpio.h>
++#include <linux/mfd/syscon.h>
++#include <linux/of.h>
++#include <linux/of_address.h>
++#include <linux/of_gpio.h>
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++#include <linux/platform_device.h>
++#include <linux/regmap.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6368_NGPIO 38
++
++#define BCM6368_BASEMODE_MASK 0x7
++#define BCM6368_BASEMODE_GPIO 0x0
++#define BCM6368_BASEMODE_UART1 0x1
++
++struct bcm6368_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6368_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ unsigned dir_out:16;
++ unsigned basemode:3;
++};
++
++struct bcm6368_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++ struct regmap_field *overlay;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM6368_BASEMODE_PIN(a, b) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)true \
++ }
++
++static const struct pinctrl_pin_desc bcm6368_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ PINCTRL_PIN(8, "gpio8"),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ PINCTRL_PIN(12, "gpio12"),
++ PINCTRL_PIN(13, "gpio13"),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ PINCTRL_PIN(27, "gpio27"),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ BCM6368_BASEMODE_PIN(30, "gpio30"),
++ BCM6368_BASEMODE_PIN(31, "gpio31"),
++ BCM6368_BASEMODE_PIN(32, "gpio32"),
++ BCM6368_BASEMODE_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
++
++#define BCM6368_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6368_pingroup bcm6368_groups[] = {
++ BCM6368_GROUP(gpio0),
++ BCM6368_GROUP(gpio1),
++ BCM6368_GROUP(gpio2),
++ BCM6368_GROUP(gpio3),
++ BCM6368_GROUP(gpio4),
++ BCM6368_GROUP(gpio5),
++ BCM6368_GROUP(gpio6),
++ BCM6368_GROUP(gpio7),
++ BCM6368_GROUP(gpio8),
++ BCM6368_GROUP(gpio9),
++ BCM6368_GROUP(gpio10),
++ BCM6368_GROUP(gpio11),
++ BCM6368_GROUP(gpio12),
++ BCM6368_GROUP(gpio13),
++ BCM6368_GROUP(gpio14),
++ BCM6368_GROUP(gpio15),
++ BCM6368_GROUP(gpio16),
++ BCM6368_GROUP(gpio17),
++ BCM6368_GROUP(gpio18),
++ BCM6368_GROUP(gpio19),
++ BCM6368_GROUP(gpio20),
++ BCM6368_GROUP(gpio21),
++ BCM6368_GROUP(gpio22),
++ BCM6368_GROUP(gpio23),
++ BCM6368_GROUP(gpio24),
++ BCM6368_GROUP(gpio25),
++ BCM6368_GROUP(gpio26),
++ BCM6368_GROUP(gpio27),
++ BCM6368_GROUP(gpio28),
++ BCM6368_GROUP(gpio29),
++ BCM6368_GROUP(gpio30),
++ BCM6368_GROUP(gpio31),
++ BCM6368_GROUP(uart1_grp),
++};
++
++static const char * const analog_afe_0_groups[] = {
++ "gpio0",
++};
++
++static const char * const analog_afe_1_groups[] = {
++ "gpio1",
++};
++
++static const char * const sys_irq_groups[] = {
++ "gpio2",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio3",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio4",
++};
++
++static const char * const inet_led_groups[] = {
++ "gpio5",
++};
++
++static const char * const ephy0_led_groups[] = {
++ "gpio6",
++};
++
++static const char * const ephy1_led_groups[] = {
++ "gpio7",
++};
++
++static const char * const ephy2_led_groups[] = {
++ "gpio8",
++};
++
++static const char * const ephy3_led_groups[] = {
++ "gpio9",
++};
++
++static const char * const robosw_led_data_groups[] = {
++ "gpio10",
++};
++
++static const char * const robosw_led_clk_groups[] = {
++ "gpio11",
++};
++
++static const char * const robosw_led0_groups[] = {
++ "gpio12",
++};
++
++static const char * const robosw_led1_groups[] = {
++ "gpio13",
++};
++
++static const char * const usb_device_led_groups[] = {
++ "gpio14",
++};
++
++static const char * const pci_req1_groups[] = {
++ "gpio16",
++};
++
++static const char * const pci_gnt1_groups[] = {
++ "gpio17",
++};
++
++static const char * const pci_intb_groups[] = {
++ "gpio18",
++};
++
++static const char * const pci_req0_groups[] = {
++ "gpio19",
++};
++
++static const char * const pci_gnt0_groups[] = {
++ "gpio20",
++};
++
++static const char * const pcmcia_cd1_groups[] = {
++ "gpio22",
++};
++
++static const char * const pcmcia_cd2_groups[] = {
++ "gpio23",
++};
++
++static const char * const pcmcia_vs1_groups[] = {
++ "gpio24",
++};
++
++static const char * const pcmcia_vs2_groups[] = {
++ "gpio25",
++};
++
++static const char * const ebi_cs2_groups[] = {
++ "gpio26",
++};
++
++static const char * const ebi_cs3_groups[] = {
++ "gpio27",
++};
++
++static const char * const spi_cs2_groups[] = {
++ "gpio28",
++};
++
++static const char * const spi_cs3_groups[] = {
++ "gpio29",
++};
++
++static const char * const spi_cs4_groups[] = {
++ "gpio30",
++};
++
++static const char * const spi_cs5_groups[] = {
++ "gpio31",
++};
++
++static const char * const uart1_groups[] = {
++ "uart1_grp",
++};
++
++#define BCM6368_FUN(n, out) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .dir_out = out, \
++ }
++
++#define BCM6368_BASEMODE_FUN(n, val, out) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .basemode = BCM6368_BASEMODE_##val, \
++ .dir_out = out, \
++ }
++
++static const struct bcm6368_function bcm6368_funcs[] = {
++ BCM6368_FUN(analog_afe_0, 1),
++ BCM6368_FUN(analog_afe_1, 1),
++ BCM6368_FUN(sys_irq, 1),
++ BCM6368_FUN(serial_led_data, 1),
++ BCM6368_FUN(serial_led_clk, 1),
++ BCM6368_FUN(inet_led, 1),
++ BCM6368_FUN(ephy0_led, 1),
++ BCM6368_FUN(ephy1_led, 1),
++ BCM6368_FUN(ephy2_led, 1),
++ BCM6368_FUN(ephy3_led, 1),
++ BCM6368_FUN(robosw_led_data, 1),
++ BCM6368_FUN(robosw_led_clk, 1),
++ BCM6368_FUN(robosw_led0, 1),
++ BCM6368_FUN(robosw_led1, 1),
++ BCM6368_FUN(usb_device_led, 1),
++ BCM6368_FUN(pci_req1, 0),
++ BCM6368_FUN(pci_gnt1, 0),
++ BCM6368_FUN(pci_intb, 0),
++ BCM6368_FUN(pci_req0, 0),
++ BCM6368_FUN(pci_gnt0, 0),
++ BCM6368_FUN(pcmcia_cd1, 0),
++ BCM6368_FUN(pcmcia_cd2, 0),
++ BCM6368_FUN(pcmcia_vs1, 0),
++ BCM6368_FUN(pcmcia_vs2, 0),
++ BCM6368_FUN(ebi_cs2, 1),
++ BCM6368_FUN(ebi_cs3, 1),
++ BCM6368_FUN(spi_cs2, 1),
++ BCM6368_FUN(spi_cs3, 1),
++ BCM6368_FUN(spi_cs4, 1),
++ BCM6368_FUN(spi_cs5, 1),
++ BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
++};
++
++static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6368_groups);
++}
++
++static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6368_groups[group].name;
++}
++
++static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6368_groups[group].pins;
++ *num_pins = bcm6368_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6368_funcs);
++}
++
++static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6368_funcs[selector].name;
++}
++
++static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6368_funcs[selector].groups;
++ *num_groups = bcm6368_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg,
++ u32 mask, u32 val)
++{
++ u32 tmp;
++
++ tmp = __raw_readl(reg);
++ tmp &= ~mask;
++ tmp |= (val & mask);
++ __raw_writel(tmp, reg);
++}
++
++static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6368_pingroup *grp = &bcm6368_groups[group];
++ const struct bcm6368_function *fun = &bcm6368_funcs[selector];
++ unsigned long flags;
++ int i, pin;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ if (fun->basemode) {
++ u32 mask = 0;
++
++ for (i = 0; i < grp->num_pins; i++) {
++ pin = grp->pins[i];
++ if (pin < 32)
++ mask |= BIT(pin);
++ }
++
++ bcm6368_rmw_mux(pctl, pctl->mode, mask, 0);
++ regmap_field_write(pctl->overlay, fun->basemode);
++ } else {
++ pin = grp->pins[0];
++
++ if (bcm6368_pins[pin].drv_data)
++ regmap_field_write(pctl->overlay,
++ BCM6368_BASEMODE_GPIO);
++
++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin));
++ }
++ spin_unlock_irqrestore(&pctl->lock, flags);
++
++ for (pin = 0; pin < grp->num_pins; pin++) {
++ int hw_gpio = bcm6368_pins[pin].number;
++ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
++
++ if (fun->dir_out & BIT(pin))
++ gc->direction_output(gc, hw_gpio % 32, 0);
++ else
++ gc->direction_input(gc, hw_gpio % 32);
++ }
++
++ return 0;
++}
++
++static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ unsigned long flags;
++
++ if (offset >= 32 && !bcm6368_pins[offset].drv_data)
++ return 0;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ /* disable all functions using this pin */
++ if (offset < 32)
++ bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0);
++
++ if (bcm6368_pins[offset].drv_data)
++ regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6368_pctl_ops = {
++ .get_groups_count = bcm6368_pinctrl_get_group_count,
++ .get_group_name = bcm6368_pinctrl_get_group_name,
++ .get_group_pins = bcm6368_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6368_pmx_ops = {
++ .get_functions_count = bcm6368_pinctrl_get_func_count,
++ .get_function_name = bcm6368_pinctrl_get_func_name,
++ .get_function_groups = bcm6368_pinctrl_get_groups,
++ .set_mux = bcm6368_pinctrl_set_mux,
++ .gpio_request_enable = bcm6368_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6368_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6368_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode;
++ struct regmap *basemode;
++ struct reg_field overlay = REG_FIELD(0, 0, 3);
++
++ if (pdev->dev.of_node)
++ basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
++ "brcm,gpiobasemode");
++ else
++ basemode = syscon_regmap_lookup_by_pdevname("syscon.b00000b8");
++
++ if (IS_ERR(basemode))
++ return PTR_ERR(basemode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay);
++ if (IS_ERR(pctl->overlay))
++ return PTR_ERR(pctl->overlay);
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++
++ /* disable all muxes by default */
++ __raw_writel(0, pctl->mode);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6368_pctl_ops;
++ pctl->desc.pmxops = &bcm6368_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6368_pins);
++ pctl->desc.pins = bcm6368_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6368_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6368_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6368-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6368_pinctrl_driver = {
++ .probe = bcm6368_pinctrl_probe,
++ .driver = {
++ .name = "bcm6368-pinctrl",
++ .of_match_table = bcm6368_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6368_pinctrl_driver);
--- /dev/null
+From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:37:08 +0200
+Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in the BCM63268
+family SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++
+ 1 file changed, 88 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
+@@ -0,0 +1,88 @@
++* Broadcom BCM63268 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6362-pinctrl".
++- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
++- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
++- gpio-controller: Identifies this node as a GPIO controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@100000c0 {
++ compatible = "brcm,bcm63268-pinctrl";
++ reg = <0x100000c0 0x8>,
++ <0x100000c8 0x8>,
++ <0x100000d0 0x4>,
++ <0x100000d8 0x4>,
++ <0x100000dc 0x4>,
++ <0x100000f8 0x4>;
++ reg-names = "dirout", "dat", "led", "mode",
++ "ctrl", "basemode";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led, serial_led_clk
++gpio1 1 led, serial_led_data
++gpio2 2 led,
++gpio3 3 led,
++gpio4 4 led,
++gpio5 5 led,
++gpio6 6 led,
++gpio7 7 led,
++gpio8 8 led, hsspi_cs6
++gpio9 9 led, hsspi_cs7
++gpio10 10 led, uart1_scts
++gpio11 11 led, uart1_srts
++gpio12 12 led, uart1_sdin
++gpio13 13 led, uart1_sdout
++gpio14 14 led, ntr_pulse_in
++gpio15 15 led, dsl_ntr_pulse_out
++gpio16 16 led, hsspi_cs4
++gpio17 17 led, hsspi_cs5
++gpio18 18 led, adsl_spi_miso
++gpio19 19 led, adsl_spi_mosi
++gpio20 20 led,
++gpio21 21 led,
++gpio22 22 led, vreg_clk
++gpio23 23 led, pcie_clkreq_b
++gpio24 24 uart1_scts
++gpio25 25 uart1_srts
++gpio26 26 uart1_sdin
++gpio27 27 uart1_sdout
++gpio28 28 ntr_pulse_in
++gpio29 29 dsl_ntr_pulse_out
++gpio30 30 switch_led_clk
++gpio31 31 switch_led_data
++gpio32 32 wifi
++gpio33 33 wifi
++gpio34 34 wifi
++gpio35 35 wifi
++gpio36 36 wifi
++gpio37 37 wifi
++gpio38 38 wifi
++gpio39 39 wifi
++gpio40 40 wifi
++gpio41 41 wifi
++gpio42 42 wifi
++gpio43 43 wifi
++gpio44 44 wifi
++gpio45 45 wifi
++gpio46 46 wifi
++gpio47 47 wifi
++gpio48 48 wifi
++gpio49 49 wifi
++gpio50 50 wifi
++gpio51 51 wifi
++nand_grp 2-7,24-31 nand
++dect_pd_grp 8-9 dect_pd
++vdsl_phy0_grp 10-11 vdsl_phy0
++vdsl_phy1_grp 12-13 vdsl_phy1
++vdsl_phy2_grp 24-25 vdsl_phy2
++vdsl_phy3_grp 26-27 vdsl_phy3
--- /dev/null
+From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:19:12 +0200
+Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268
+
+Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs
+to different functions. Depending on the mux, these are either single
+pin configurations or whole pin groups.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++
+ 2 files changed, 711 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
+
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+ obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
+ obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
++obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
+@@ -0,0 +1,710 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM63268_NGPIO 52
++
++/* GPIO_BASEMODE register */
++#define BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */
++#define BASEMODE_GPIO35 BIT(4) /* GPIO 35 */
++#define BASEMODE_DECTPD BIT(5) /* GPIOs 8/9 */
++#define BASEMODE_VDSL_PHY_0 BIT(6) /* GPIOs 10/11 */
++#define BASEMODE_VDSL_PHY_1 BIT(7) /* GPIOs 12/13 */
++#define BASEMODE_VDSL_PHY_2 BIT(8) /* GPIOs 24/25 */
++#define BASEMODE_VDSL_PHY_3 BIT(9) /* GPIOs 26/27 */
++
++enum bcm63268_pinctrl_reg {
++ BCM63268_LEDCTRL,
++ BCM63268_MODE,
++ BCM63268_CTRL,
++ BCM63268_BASEMODE,
++};
++
++struct bcm63268_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm63268_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ enum bcm63268_pinctrl_reg reg;
++ u32 mask;
++};
++
++struct bcm63268_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *led;
++ void __iomem *mode;
++ void __iomem *ctrl;
++ void __iomem *basemode;
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++#define BCM63268_PIN(a, b, basemode) \
++ { \
++ .number = a, \
++ .name = b, \
++ .drv_data = (void *)(basemode) \
++ }
++
++static const struct pinctrl_pin_desc bcm63268_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ BCM63268_PIN(2, "gpio2", BASEMODE_NAND),
++ BCM63268_PIN(3, "gpio3", BASEMODE_NAND),
++ BCM63268_PIN(4, "gpio4", BASEMODE_NAND),
++ BCM63268_PIN(5, "gpio5", BASEMODE_NAND),
++ BCM63268_PIN(6, "gpio6", BASEMODE_NAND),
++ BCM63268_PIN(7, "gpio7", BASEMODE_NAND),
++ BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD),
++ BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD),
++ BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0),
++ BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0),
++ BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1),
++ BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
++ BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
++ BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
++ BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
++ BCM63268_PIN(28, "gpio28", BASEMODE_NAND),
++ BCM63268_PIN(29, "gpio29", BASEMODE_NAND),
++ BCM63268_PIN(30, "gpio30", BASEMODE_NAND),
++ BCM63268_PIN(31, "gpio31", BASEMODE_NAND),
++ PINCTRL_PIN(32, "gpio32"),
++ PINCTRL_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++ PINCTRL_PIN(40, "gpio40"),
++ PINCTRL_PIN(41, "gpio41"),
++ PINCTRL_PIN(42, "gpio42"),
++ PINCTRL_PIN(43, "gpio43"),
++ PINCTRL_PIN(44, "gpio44"),
++ PINCTRL_PIN(45, "gpio45"),
++ PINCTRL_PIN(46, "gpio46"),
++ PINCTRL_PIN(47, "gpio47"),
++ PINCTRL_PIN(48, "gpio48"),
++ PINCTRL_PIN(49, "gpio49"),
++ PINCTRL_PIN(50, "gpio50"),
++ PINCTRL_PIN(51, "gpio51"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned gpio32_pins[] = { 32 };
++static unsigned gpio33_pins[] = { 33 };
++static unsigned gpio34_pins[] = { 34 };
++static unsigned gpio35_pins[] = { 35 };
++static unsigned gpio36_pins[] = { 36 };
++static unsigned gpio37_pins[] = { 37 };
++static unsigned gpio38_pins[] = { 38 };
++static unsigned gpio39_pins[] = { 39 };
++static unsigned gpio40_pins[] = { 40 };
++static unsigned gpio41_pins[] = { 41 };
++static unsigned gpio42_pins[] = { 42 };
++static unsigned gpio43_pins[] = { 43 };
++static unsigned gpio44_pins[] = { 44 };
++static unsigned gpio45_pins[] = { 45 };
++static unsigned gpio46_pins[] = { 46 };
++static unsigned gpio47_pins[] = { 47 };
++static unsigned gpio48_pins[] = { 48 };
++static unsigned gpio49_pins[] = { 49 };
++static unsigned gpio50_pins[] = { 50 };
++static unsigned gpio51_pins[] = { 51 };
++
++static unsigned nand_grp_pins[] = {
++ 2, 3, 4, 5, 6, 7, 24,
++ 25, 26, 27, 28, 29, 30, 31,
++};
++
++static unsigned dectpd_grp_pins[] = { 8, 9 };
++static unsigned vdsl_phy0_grp_pins[] = { 10, 11 };
++static unsigned vdsl_phy1_grp_pins[] = { 12, 13 };
++static unsigned vdsl_phy2_grp_pins[] = { 24, 25 };
++static unsigned vdsl_phy3_grp_pins[] = { 26, 27 };
++
++#define BCM63268_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm63268_pingroup bcm63268_groups[] = {
++ BCM63268_GROUP(gpio0),
++ BCM63268_GROUP(gpio1),
++ BCM63268_GROUP(gpio2),
++ BCM63268_GROUP(gpio3),
++ BCM63268_GROUP(gpio4),
++ BCM63268_GROUP(gpio5),
++ BCM63268_GROUP(gpio6),
++ BCM63268_GROUP(gpio7),
++ BCM63268_GROUP(gpio8),
++ BCM63268_GROUP(gpio9),
++ BCM63268_GROUP(gpio10),
++ BCM63268_GROUP(gpio11),
++ BCM63268_GROUP(gpio12),
++ BCM63268_GROUP(gpio13),
++ BCM63268_GROUP(gpio14),
++ BCM63268_GROUP(gpio15),
++ BCM63268_GROUP(gpio16),
++ BCM63268_GROUP(gpio17),
++ BCM63268_GROUP(gpio18),
++ BCM63268_GROUP(gpio19),
++ BCM63268_GROUP(gpio20),
++ BCM63268_GROUP(gpio21),
++ BCM63268_GROUP(gpio22),
++ BCM63268_GROUP(gpio23),
++ BCM63268_GROUP(gpio24),
++ BCM63268_GROUP(gpio25),
++ BCM63268_GROUP(gpio26),
++ BCM63268_GROUP(gpio27),
++ BCM63268_GROUP(gpio28),
++ BCM63268_GROUP(gpio29),
++ BCM63268_GROUP(gpio30),
++ BCM63268_GROUP(gpio31),
++ BCM63268_GROUP(gpio32),
++ BCM63268_GROUP(gpio33),
++ BCM63268_GROUP(gpio34),
++ BCM63268_GROUP(gpio35),
++ BCM63268_GROUP(gpio36),
++ BCM63268_GROUP(gpio37),
++ BCM63268_GROUP(gpio38),
++ BCM63268_GROUP(gpio39),
++ BCM63268_GROUP(gpio40),
++ BCM63268_GROUP(gpio41),
++ BCM63268_GROUP(gpio42),
++ BCM63268_GROUP(gpio43),
++ BCM63268_GROUP(gpio44),
++ BCM63268_GROUP(gpio45),
++ BCM63268_GROUP(gpio46),
++ BCM63268_GROUP(gpio47),
++ BCM63268_GROUP(gpio48),
++ BCM63268_GROUP(gpio49),
++ BCM63268_GROUP(gpio50),
++ BCM63268_GROUP(gpio51),
++
++ /* multi pin groups */
++ BCM63268_GROUP(nand_grp),
++ BCM63268_GROUP(dectpd_grp),
++ BCM63268_GROUP(vdsl_phy0_grp),
++ BCM63268_GROUP(vdsl_phy1_grp),
++ BCM63268_GROUP(vdsl_phy2_grp),
++ BCM63268_GROUP(vdsl_phy3_grp),
++};
++
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio0",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio1",
++};
++
++static const char * const hsspi_cs4_groups[] = {
++ "gpio16",
++};
++
++static const char * const hsspi_cs5_groups[] = {
++ "gpio17",
++};
++
++static const char * const hsspi_cs6_groups[] = {
++ "gpio8",
++};
++
++static const char * const hsspi_cs7_groups[] = {
++ "gpio9",
++};
++
++static const char * const uart1_scts_groups[] = {
++ "gpio10",
++ "gpio24",
++};
++
++static const char * const uart1_srts_groups[] = {
++ "gpio11",
++ "gpio25",
++};
++
++static const char * const uart1_sdin_groups[] = {
++ "gpio12",
++ "gpio26",
++};
++
++static const char * const uart1_sdout_groups[] = {
++ "gpio13",
++ "gpio27",
++};
++
++static const char * const ntr_pulse_in_groups[] = {
++ "gpio14",
++ "gpio28",
++};
++
++static const char * const dsl_ntr_pulse_out_groups[] = {
++ "gpio15",
++ "gpio29",
++};
++
++static const char * const adsl_spi_miso_groups[] = {
++ "gpio18",
++};
++
++static const char * const adsl_spi_mosi_groups[] = {
++ "gpio19",
++};
++
++static const char * const vreg_clk_groups[] = {
++ "gpio22",
++};
++
++static const char * const pcie_clkreq_b_groups[] = {
++ "gpio23",
++};
++
++static const char * const switch_led_clk_groups[] = {
++ "gpio30",
++};
++
++static const char * const switch_led_data_groups[] = {
++ "gpio31",
++};
++
++static const char * const wifi_groups[] = {
++ "gpio32",
++ "gpio33",
++ "gpio34",
++ "gpio35",
++ "gpio36",
++ "gpio37",
++ "gpio38",
++ "gpio39",
++ "gpio40",
++ "gpio41",
++ "gpio42",
++ "gpio43",
++ "gpio44",
++ "gpio45",
++ "gpio46",
++ "gpio47",
++ "gpio48",
++ "gpio49",
++ "gpio50",
++ "gpio51",
++};
++
++static const char * const nand_groups[] = {
++ "nand_grp",
++};
++
++static const char * const dectpd_groups[] = {
++ "dectpd_grp",
++};
++
++static const char * const vdsl_phy_override_0_groups[] = {
++ "vdsl_phy_override_0_grp",
++};
++
++static const char * const vdsl_phy_override_1_groups[] = {
++ "vdsl_phy_override_1_grp",
++};
++
++static const char * const vdsl_phy_override_2_groups[] = {
++ "vdsl_phy_override_2_grp",
++};
++
++static const char * const vdsl_phy_override_3_groups[] = {
++ "vdsl_phy_override_3_grp",
++};
++
++#define BCM63268_LED_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_LEDCTRL, \
++ }
++
++#define BCM63268_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_MODE, \
++ }
++
++#define BCM63268_CTRL_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_CTRL, \
++ }
++
++#define BCM63268_BASEMODE_FUN(n, val) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .reg = BCM63268_BASEMODE, \
++ .mask = val, \
++ }
++
++static const struct bcm63268_function bcm63268_funcs[] = {
++ BCM63268_LED_FUN(led),
++ BCM63268_MODE_FUN(serial_led_clk),
++ BCM63268_MODE_FUN(serial_led_data),
++ BCM63268_MODE_FUN(hsspi_cs6),
++ BCM63268_MODE_FUN(hsspi_cs7),
++ BCM63268_MODE_FUN(uart1_scts),
++ BCM63268_MODE_FUN(uart1_srts),
++ BCM63268_MODE_FUN(uart1_sdin),
++ BCM63268_MODE_FUN(uart1_sdout),
++ BCM63268_MODE_FUN(ntr_pulse_in),
++ BCM63268_MODE_FUN(dsl_ntr_pulse_out),
++ BCM63268_MODE_FUN(hsspi_cs4),
++ BCM63268_MODE_FUN(hsspi_cs5),
++ BCM63268_MODE_FUN(adsl_spi_miso),
++ BCM63268_MODE_FUN(adsl_spi_mosi),
++ BCM63268_MODE_FUN(vreg_clk),
++ BCM63268_MODE_FUN(pcie_clkreq_b),
++ BCM63268_MODE_FUN(switch_led_clk),
++ BCM63268_MODE_FUN(switch_led_data),
++ BCM63268_CTRL_FUN(wifi),
++ BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND),
++ BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2),
++ BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3),
++};
++
++static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm63268_groups);
++}
++
++static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm63268_groups[group].name;
++}
++
++static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group,
++ const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm63268_groups[group].pins;
++ *num_pins = bcm63268_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm63268_funcs);
++}
++
++static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm63268_funcs[selector].name;
++}
++
++static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm63268_funcs[selector].groups;
++ *num_groups = bcm63268_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg,
++ u32 mask, u32 val)
++{
++ unsigned long flags;
++ u32 tmp;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ tmp = __raw_readl(reg);
++ tmp &= ~mask;
++ tmp |= val;
++ __raw_writel(tmp, reg);
++
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin)
++{
++ const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin];
++ u32 basemode = (unsigned long)desc->drv_data;
++ u32 mask = BIT(pin % 32);
++
++ if (basemode)
++ bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0);
++
++ if (pin < 32) {
++ /* base mode: 0 => gpio, 1 => mux function */
++ bcm63268_rmw_mux(pctl, pctl->mode, mask, 0);
++
++ /* pins 0-23 might be muxed to led */
++ if (pin < 24)
++ bcm63268_rmw_mux(pctl, pctl->led, mask, 0);
++ } else if (pin < 52) {
++ /* ctrl reg: 0 => wifi function, 1 => gpio */
++ bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask);
++ }
++}
++
++static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm63268_pingroup *grp = &bcm63268_groups[group];
++ const struct bcm63268_function *f = &bcm63268_funcs[selector];
++ unsigned i;
++ void __iomem *reg;
++ u32 val, mask;
++
++ for (i = 0; i < grp->num_pins; i++)
++ bcm63268_set_gpio(pctl, grp->pins[i]);
++
++ switch (f->reg) {
++ case BCM63268_LEDCTRL:
++ reg = pctl->led;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM63268_MODE:
++ reg = pctl->mode;
++ mask = BIT(grp->pins[0]);
++ val = BIT(grp->pins[0]);
++ break;
++ case BCM63268_CTRL:
++ reg = pctl->ctrl;
++ mask = BIT(grp->pins[0]);
++ val = 0;
++ break;
++ case BCM63268_BASEMODE:
++ reg = pctl->basemode;
++ mask = f->mask;
++ val = f->mask;
++ break;
++ default:
++ WARN_ON(1);
++ return -EINVAL;
++ }
++
++ bcm63268_rmw_mux(pctl, reg, mask, val);
++
++ return 0;
++}
++
++static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ bcm63268_set_gpio(pctl, offset);
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm63268_pctl_ops = {
++ .get_groups_count = bcm63268_pinctrl_get_group_count,
++ .get_group_name = bcm63268_pinctrl_get_group_name,
++ .get_group_pins = bcm63268_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm63268_pmx_ops = {
++ .get_functions_count = bcm63268_pinctrl_get_func_count,
++ .get_function_name = bcm63268_pinctrl_get_func_name,
++ .get_function_groups = bcm63268_pinctrl_get_groups,
++ .set_mux = bcm63268_pinctrl_set_mux,
++ .gpio_request_enable = bcm63268_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm63268_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm63268_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *led, *mode, *ctrl, *basemode;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
++ led = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(led))
++ return PTR_ERR(led);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
++ ctrl = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(ctrl))
++ return PTR_ERR(ctrl);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
++ basemode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(basemode))
++ return PTR_ERR(basemode);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->led = led;
++ pctl->mode = mode;
++ pctl->ctrl = ctrl;
++ pctl->basemode = basemode;
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm63268_pctl_ops;
++ pctl->desc.pmxops = &bcm63268_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm63268_pins);
++ pctl->desc.pins = bcm63268_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM63268_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm63268_pinctrl_match[] = {
++ { .compatible = "brcm,bcm63268-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm63268_pinctrl_driver = {
++ .probe = bcm63268_pinctrl_probe,
++ .driver = {
++ .name = "bcm63268-pinctrl",
++ .of_match_table = bcm63268_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm63268_pinctrl_driver);
--- /dev/null
+From e058fa1969019c2f6705c53c4130e364a877d4e6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 26 Nov 2017 12:07:31 +0100
+Subject: [PATCH] gpio: fix device tree gpio hogs on dual role gpio/pincontrol
+ controllers
+
+For dual role gpio and pincontrol controller, the device registration
+path is often:
+
+ pinctrl_register(...);
+ gpiochip_add_data(...);
+ gpiochip_add_pin_range(...);
+
+If the device tree node has any gpio-hogs, the code will try to apply them
+in the gpiochip_add_data step, but fail as they cannot be requested, as the
+ranges are missing. But we also cannot first add the pinranges, as the
+appropriate data structures are only initialized in gpiochip_add_data.
+
+To fix this, defer gpio-hogs to the time pin ranges get added instead of
+directly at chip request time, if the gpio-chip has a request method.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+
+ drivers/gpio/gpiolib-of.c | 20 +++++++++++++++-----
+ drivers/gpio/gpiolib.c | 5 +++--
+ drivers/gpio/gpiolib.h | 8 ++++++++
+ 3 files changed, 26 insertions(+), 7 deletions(-)
+
+--- a/drivers/gpio/gpiolib-of.c
++++ b/drivers/gpio/gpiolib-of.c
+@@ -363,12 +363,15 @@ static struct gpio_desc *of_parse_own_gp
+ /**
+ * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
+ * @chip: gpio chip to act on
++ * @start: first gpio to check
++ * @num: number of gpios to check
+ *
+- * This is only used by of_gpiochip_add to request/set GPIO initial
+- * configuration.
++ * This is used by of_gpiochip_add, gpiochip_add_pingroup_range and
++ * gpiochip_add_pin_range to request/set GPIO initial configuration.
+ * It returns error if it fails otherwise 0 on success.
+ */
+-static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
++int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
++ unsigned int num)
+ {
+ struct gpio_desc *desc = NULL;
+ struct device_node *np;
+@@ -376,7 +379,7 @@ static int of_gpiochip_scan_gpios(struct
+ enum gpio_lookup_flags lflags;
+ enum gpiod_flags dflags;
+ unsigned int i;
+- int ret;
++ int ret, hwgpio;
+
+ for_each_available_child_of_node(chip->of_node, np) {
+ if (!of_property_read_bool(np, "gpio-hog"))
+@@ -388,6 +391,10 @@ static int of_gpiochip_scan_gpios(struct
+ if (IS_ERR(desc))
+ break;
+
++ hwgpio = gpio_chip_hwgpio(desc);
++ if (hwgpio < start || hwgpio >= (start + num))
++ continue;
++
+ ret = gpiod_hog(desc, name, lflags, dflags);
+ if (ret < 0) {
+ of_node_put(np);
+@@ -646,12 +653,13 @@ int of_gpiochip_add(struct gpio_chip *ch
+
+ of_node_get(chip->of_node);
+
+- status = of_gpiochip_scan_gpios(chip);
+- if (status) {
+- of_node_put(chip->of_node);
+- gpiochip_remove_pin_ranges(chip);
++ if (!chip->request) {
++ status = of_gpiochip_scan_gpios(chip, 0, chip->ngpio);
++ if (status) {
++ of_node_put(chip->of_node);
++ gpiochip_remove_pin_ranges(chip);
++ }
+ }
+-
+ return status;
+ }
+
+--- a/drivers/gpio/gpiolib.c
++++ b/drivers/gpio/gpiolib.c
+@@ -2205,7 +2205,8 @@ int gpiochip_add_pingroup_range(struct g
+
+ list_add_tail(&pin_range->node, &gdev->pin_ranges);
+
+- return 0;
++ return of_gpiochip_scan_gpios(chip, gpio_offset,
++ pin_range->range.npins);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
+
+@@ -2262,7 +2263,7 @@ int gpiochip_add_pin_range(struct gpio_c
+
+ list_add_tail(&pin_range->node, &gdev->pin_ranges);
+
+- return 0;
++ return of_gpiochip_scan_gpios(chip, gpio_offset, npins);
+ }
+ EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
+
+--- a/drivers/gpio/gpiolib.h
++++ b/drivers/gpio/gpiolib.h
+@@ -103,6 +103,8 @@ struct gpio_desc *of_get_named_gpiod_fla
+ const char *list_name, int index, enum of_gpio_flags *flags);
+ int of_gpiochip_add(struct gpio_chip *gc);
+ void of_gpiochip_remove(struct gpio_chip *gc);
++int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
++ unsigned int num);
+ #else
+ static inline struct gpio_desc *of_find_gpio(struct device *dev,
+ const char *con_id,
+@@ -118,6 +120,12 @@ static inline struct gpio_desc *of_get_n
+ }
+ static inline int of_gpiochip_add(struct gpio_chip *gc) { return 0; }
+ static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
++static inline int of_gpiochip_scan_gpios(struct gpio_chip *chip,
++ unsigned int start,
++ unsigned int num)
++{
++ return 0;
++}
+ #endif /* CONFIG_OF_GPIO */
+
+ #ifdef CONFIG_ACPI
--- /dev/null
+From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 19 Jan 2014 12:18:03 +0100
+Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
+
+In the same way as the ohci platform driver allows limiting ports,
+enable the same for ehci. This prevents a mismatch in the available
+ports between ehci/ohci on USB 2.0 controllers.
+
+This is needed if the USB host controller always reports the maximum
+number of ports regardless of the number of available ports (because
+one might be set to be usb device).
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/usb/host/ehci-hcd.c | 4 ++++
+ drivers/usb/host/ehci-platform.c | 2 ++
+ drivers/usb/host/ehci.h | 1 +
+ include/linux/usb/ehci_pdriver.h | 1 +
+ 4 files changed, 8 insertions(+)
+
+--- a/drivers/usb/host/ehci-hcd.c
++++ b/drivers/usb/host/ehci-hcd.c
+@@ -665,6 +665,10 @@ int ehci_setup(struct usb_hcd *hcd)
+
+ /* cache this readonly data; minimize chip reads */
+ ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
++ if (ehci->num_ports) {
++ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
++ ehci->hcs_params |= ehci->num_ports;
++ }
+
+ ehci->sbrn = HCD_USB2;
+
+--- a/drivers/usb/host/ehci-platform.c
++++ b/drivers/usb/host/ehci-platform.c
+@@ -57,6 +57,9 @@ static int ehci_platform_reset(struct us
+
+ ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
+
++ if (pdata->num_ports && pdata->num_ports <= 15)
++ ehci->num_ports = pdata->num_ports;
++
+ if (pdata->pre_setup) {
+ retval = pdata->pre_setup(hcd);
+ if (retval < 0)
+--- a/drivers/usb/host/ehci.h
++++ b/drivers/usb/host/ehci.h
+@@ -203,6 +203,7 @@ struct ehci_hcd { /* one per controlle
+ u32 command;
+
+ /* SILICON QUIRKS */
++ unsigned int num_ports;
+ unsigned no_selective_suspend:1;
+ unsigned has_fsl_port_bug:1; /* FreeScale */
+ unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
+--- a/include/linux/usb/ehci_pdriver.h
++++ b/include/linux/usb/ehci_pdriver.h
+@@ -43,6 +43,7 @@ struct usb_hcd;
+ */
+ struct usb_ehci_pdata {
+ int caps_offset;
++ unsigned int num_ports;
+ unsigned has_tt:1;
+ unsigned has_synopsys_hc_bug:1;
+ unsigned big_endian_desc:1;
--- /dev/null
+From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 03:54:05 +0100
+Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
+ own file
+
+Move device registration code into its own file to allow sharing it
+between board implementations.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Makefile | 1 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
+ arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h | 8 ++
+ 4 files changed, 223 insertions(+), 183 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.c
+ create mode 100644 arch/mips/bcm63xx/boards/board_common.h
+
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1 +1,2 @@
++obj-y += board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -12,33 +12,21 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+-#include <linux/platform_device.h>
+-#include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_nvram.h>
+-#include <bcm63xx_dev_pci.h>
+-#include <bcm63xx_dev_enet.h>
+-#include <bcm63xx_dev_flash.h>
+-#include <bcm63xx_dev_hsspi.h>
+-#include <bcm63xx_dev_pcmcia.h>
+-#include <bcm63xx_dev_spi.h>
+-#include <bcm63xx_dev_usb_ehci.h>
+-#include <bcm63xx_dev_usb_ohci.h>
+-#include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+
++#include "board_common.h"
++
+ #include <uapi/linux/bcm933xx_hcs.h>
+
+
+ #define HCS_OFFSET_128K 0x20000
+
+-static struct board_info board;
+-
+ /*
+ * known 3368 boards
+ */
+@@ -695,52 +683,6 @@ static const struct board_info __initcon
+ };
+
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+- .revision = 0x02,
+- .board_rev = 0x17,
+- .country_code = 0x0,
+- .ant_available_bg = 0x3,
+- .pa0b0 = 0x15ae,
+- .pa0b1 = 0xfa85,
+- .pa0b2 = 0xfe8d,
+- .pa1b0 = 0xffff,
+- .pa1b1 = 0xffff,
+- .pa1b2 = 0xffff,
+- .gpio0 = 0xff,
+- .gpio1 = 0xff,
+- .gpio2 = 0xff,
+- .gpio3 = 0xff,
+- .maxpwr_bg = 0x004c,
+- .itssi_bg = 0x00,
+- .boardflags_lo = 0x2848,
+- .boardflags_hi = 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+- if (bus->bustype == SSB_BUSTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+- return 0;
+- } else {
+- pr_err("unable to fill SPROM for given bustype\n");
+- return -EINVAL;
+- }
+-}
+-#endif
+-
+-/*
+- * return board name for /proc/cpuinfo
+- */
+-const char *board_get_name(void)
+-{
+- return board.name;
+-}
+-
+-/*
+ * early init callback, read nvram data from flash and checksum it
+ */
+ void __init board_prom_init(void)
+@@ -785,137 +727,15 @@ void __init board_prom_init(void)
+ if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ continue;
+ /* copy, board desc array is marked initdata */
+- memcpy(&board, bcm963xx_boards[i], sizeof(board));
++ board_early_setup(bcm963xx_boards[i]);
+ break;
+ }
+
+- /* bail out if board is not found, will complain later */
+- if (!board.name[0]) {
++ /* warn if board is not found, will complain later */
++ if (i == ARRAY_SIZE(bcm963xx_boards)) {
+ char name[17];
+ memcpy(name, board_name, 16);
+ name[16] = 0;
+ pr_err("unknown bcm963xx board: %s\n", name);
+- return;
+- }
+-
+- /* setup pin multiplexing depending on board enabled device,
+- * this has to be done this early since PCI init is done
+- * inside arch_initcall */
+- val = 0;
+-
+-#ifdef CONFIG_PCI
+- if (board.has_pci) {
+- bcm63xx_pci_enabled = 1;
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G2_PCI;
+ }
+-#endif
+-
+- if (board.has_pccard) {
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G1_MII_PCCARD;
+- }
+-
+- if (board.has_enet0 && !board.enet0.use_internal_phy) {
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G3_EXT_MII |
+- GPIO_MODE_6348_G0_EXT_MII;
+- }
+-
+- if (board.has_enet1 && !board.enet1.use_internal_phy) {
+- if (BCMCPU_IS_6348())
+- val |= GPIO_MODE_6348_G3_EXT_MII |
+- GPIO_MODE_6348_G0_EXT_MII;
+- }
+-
+- bcm_gpio_writel(val, GPIO_MODE_REG);
+-}
+-
+-/*
+- * second stage init callback, good time to panic if we couldn't
+- * identify on which board we're running since early printk is working
+- */
+-void __init board_setup(void)
+-{
+- if (!board.name[0])
+- panic("unable to detect bcm963xx board");
+- pr_info("board name: %s\n", board.name);
+-
+- /* make sure we're running on expected cpu */
+- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+- panic("unexpected CPU for bcm963xx board");
+-}
+-
+-static struct gpio_led_platform_data bcm63xx_led_data;
+-
+-static struct platform_device bcm63xx_gpio_leds = {
+- .name = "leds-gpio",
+- .id = 0,
+- .dev.platform_data = &bcm63xx_led_data,
+-};
+-
+-/*
+- * third stage init callback, register all board devices.
+- */
+-int __init board_register_devices(void)
+-{
+- if (board.has_uart0)
+- bcm63xx_uart_register(0);
+-
+- if (board.has_uart1)
+- bcm63xx_uart_register(1);
+-
+- if (board.has_pccard)
+- bcm63xx_pcmcia_register();
+-
+- if (board.has_enet0 &&
+- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
+- bcm63xx_enet_register(0, &board.enet0);
+-
+- if (board.has_enet1 &&
+- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
+- bcm63xx_enet_register(1, &board.enet1);
+-
+- if (board.has_enetsw &&
+- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
+- bcm63xx_enetsw_register(&board.enetsw);
+-
+- if (board.has_usbd)
+- bcm63xx_usbd_register(&board.usbd);
+-
+- if (board.has_ehci0)
+- bcm63xx_ehci_register();
+-
+- if (board.has_ohci0)
+- bcm63xx_ohci_register();
+-
+- /* Generate MAC address for WLAN and register our SPROM,
+- * do this after registering enet devices
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
+- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- if (ssb_arch_register_fallback_sprom(
+- &bcm63xx_get_fallback_sprom) < 0)
+- pr_err("failed to register fallback SPROM\n");
+- }
+-#endif
+-
+- bcm63xx_spi_register();
+-
+- bcm63xx_hsspi_register();
+-
+- bcm63xx_flash_register();
+-
+- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+- bcm63xx_led_data.leds = board.leds;
+-
+- platform_device_register(&bcm63xx_gpio_leds);
+-
+- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+- gpio_request_one(board.ephy_reset_gpio,
+- board.ephy_reset_gpio_flags, "ephy-reset");
+-
+- return 0;
+ }
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -0,0 +1,214 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_dev_uart.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_gpio.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_enet.h>
++#include <bcm63xx_dev_flash.h>
++#include <bcm63xx_dev_hsspi.h>
++#include <bcm63xx_dev_pcmcia.h>
++#include <bcm63xx_dev_spi.h>
++#include <bcm63xx_dev_usb_ehci.h>
++#include <bcm63xx_dev_usb_ohci.h>
++#include <bcm63xx_dev_usb_usbd.h>
++#include <board_bcm963xx.h>
++
++#define PFX "board: "
++
++static struct board_info board;
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++ .revision = 0x02,
++ .board_rev = 0x17,
++ .country_code = 0x0,
++ .ant_available_bg = 0x3,
++ .pa0b0 = 0x15ae,
++ .pa0b1 = 0xfa85,
++ .pa0b2 = 0xfe8d,
++ .pa1b0 = 0xffff,
++ .pa1b1 = 0xffff,
++ .pa1b2 = 0xffff,
++ .gpio0 = 0xff,
++ .gpio1 = 0xff,
++ .gpio2 = 0xff,
++ .gpio3 = 0xff,
++ .maxpwr_bg = 0x004c,
++ .itssi_bg = 0x00,
++ .boardflags_lo = 0x2848,
++ .boardflags_hi = 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++ if (bus->bustype == SSB_BUSTYPE_PCI) {
++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ return 0;
++ } else {
++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++ return -EINVAL;
++ }
++}
++#endif
++
++/*
++ * return board name for /proc/cpuinfo
++ */
++const char *board_get_name(void)
++{
++ return board.name;
++}
++
++/*
++ * setup board for device registration
++ */
++void __init board_early_setup(const struct board_info *target)
++{
++ u32 val;
++
++ memcpy(&board, target, sizeof(board));
++
++ /* setup pin multiplexing depending on board enabled device,
++ * this has to be done this early since PCI init is done
++ * inside arch_initcall */
++ val = 0;
++
++#ifdef CONFIG_PCI
++ if (board.has_pci) {
++ bcm63xx_pci_enabled = 1;
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G2_PCI;
++ }
++#endif
++
++ if (board.has_pccard) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G1_MII_PCCARD;
++ }
++
++ if (board.has_enet0 && !board.enet0.use_internal_phy) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G3_EXT_MII |
++ GPIO_MODE_6348_G0_EXT_MII;
++ }
++
++ if (board.has_enet1 && !board.enet1.use_internal_phy) {
++ if (BCMCPU_IS_6348())
++ val |= GPIO_MODE_6348_G3_EXT_MII |
++ GPIO_MODE_6348_G0_EXT_MII;
++ }
++
++ bcm_gpio_writel(val, GPIO_MODE_REG);
++}
++
++
++/*
++ * second stage init callback, good time to panic if we couldn't
++ * identify on which board we're running since early printk is working
++ */
++void __init board_setup(void)
++{
++ if (!board.name[0])
++ panic("unable to detect bcm963xx board");
++ printk(KERN_INFO PFX "board name: %s\n", board.name);
++
++ /* make sure we're running on expected cpu */
++ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
++ panic("unexpected CPU for bcm963xx board");
++}
++
++static struct gpio_led_platform_data bcm63xx_led_data;
++
++static struct platform_device bcm63xx_gpio_leds = {
++ .name = "leds-gpio",
++ .id = 0,
++ .dev.platform_data = &bcm63xx_led_data,
++};
++
++/*
++ * third stage init callback, register all board devices.
++ */
++int __init board_register_devices(void)
++{
++ if (board.has_uart0)
++ bcm63xx_uart_register(0);
++
++ if (board.has_uart1)
++ bcm63xx_uart_register(1);
++
++ if (board.has_pccard)
++ bcm63xx_pcmcia_register();
++
++ if (board.has_enet0 &&
++ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++ bcm63xx_enet_register(0, &board.enet0);
++
++ if (board.has_enet1 &&
++ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++ bcm63xx_enet_register(1, &board.enet1);
++
++ if (board.has_enetsw &&
++ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++ bcm63xx_enetsw_register(&board.enetsw);
++
++ if (board.has_usbd)
++ bcm63xx_usbd_register(&board.usbd);
++
++ if (board.has_ehci0)
++ bcm63xx_ehci_register();
++
++ if (board.has_ohci0)
++ bcm63xx_ohci_register();
++
++ /* Generate MAC address for WLAN and register our SPROM,
++ * do this after registering enet devices
++ */
++#ifdef CONFIG_SSB_PCIHOST
++ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
++ if (ssb_arch_register_fallback_sprom(
++ &bcm63xx_get_fallback_sprom) < 0)
++ pr_err(PFX "failed to register fallback SPROM\n");
++ }
++#endif
++
++ bcm63xx_spi_register();
++
++ bcm63xx_hsspi_register();
++
++ bcm63xx_flash_register();
++
++ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
++ bcm63xx_led_data.leds = board.leds;
++
++ platform_device_register(&bcm63xx_gpio_leds);
++
++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
++ gpio_request_one(board.ephy_reset_gpio,
++ board.ephy_reset_gpio_flags, "ephy-reset");
++
++ return 0;
++}
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -0,0 +1,8 @@
++#ifndef __BOARD_COMMON_H
++#define __BOARD_COMMON_H
++
++#include <board_bcm963xx.h>
++
++void board_early_setup(const struct board_info *board);
++
++#endif /* __BOARD_COMMON_H */
--- /dev/null
+From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:08:06 +0100
+Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
+ setup
+
+Pass a mac address allocator to board setup code to allow board
+implementations to work with third party bootloaders not using nvram
+for configuration storage.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++-
+ arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------
+ arch/mips/bcm63xx/boards/board_common.h | 3 ++-
+ 3 files changed, 14 insertions(+), 8 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -727,7 +727,8 @@ void __init board_prom_init(void)
+ if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+ continue;
+ /* copy, board desc array is marked initdata */
+- board_early_setup(bcm963xx_boards[i]);
++ board_early_setup(bcm963xx_boards[i],
++ bcm63xx_nvram_get_mac_address);
+ break;
+ }
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -18,7 +18,6 @@
+ #include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+-#include <bcm63xx_nvram.h>
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_dev_pci.h>
+ #include <bcm63xx_dev_enet.h>
+@@ -81,15 +80,20 @@ const char *board_get_name(void)
+ return board.name;
+ }
+
++static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
++
+ /*
+ * setup board for device registration
+ */
+-void __init board_early_setup(const struct board_info *target)
++void __init board_early_setup(const struct board_info *target,
++ int (*get_mac_address)(u8 mac[ETH_ALEN]))
+ {
+ u32 val;
+
+ memcpy(&board, target, sizeof(board));
+
++ board_get_mac_address = get_mac_address;
++
+ /* setup pin multiplexing depending on board enabled device,
+ * this has to be done this early since PCI init is done
+ * inside arch_initcall */
+@@ -162,15 +166,15 @@ int __init board_register_devices(void)
+ bcm63xx_pcmcia_register();
+
+ if (board.has_enet0 &&
+- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
++ !board_get_mac_address(board.enet0.mac_addr))
+ bcm63xx_enet_register(0, &board.enet0);
+
+ if (board.has_enet1 &&
+- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
++ !board_get_mac_address(board.enet1.mac_addr))
+ bcm63xx_enet_register(1, &board.enet1);
+
+ if (board.has_enetsw &&
+- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
++ !board_get_mac_address(board.enetsw.mac_addr))
+ bcm63xx_enetsw_register(&board.enetsw);
+
+ if (board.has_usbd)
+@@ -186,7 +190,7 @@ int __init board_register_devices(void)
+ * do this after registering enet devices
+ */
+ #ifdef CONFIG_SSB_PCIHOST
+- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
++ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+ if (ssb_arch_register_fallback_sprom(
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -3,6 +3,7 @@
+
+ #include <board_bcm963xx.h>
+
+-void board_early_setup(const struct board_info *board);
++void board_early_setup(const struct board_info *board,
++ int (*get_mac_address)(u8 mac[ETH_ALEN]));
+
+ #endif /* __BOARD_COMMON_H */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -707,10 +707,20 @@ void __init board_prom_init(void)
+
+ /* dump cfe version */
+ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+- if (!memcmp(cfe, "cfe-v", 5))
+- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
+- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
+- else
++ if (strstarts(cfe, "cfe-")) {
++ if(cfe[4] == 'v') {
++ if(cfe[5] == 'd')
++ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
++ else if (cfe[10] > 0)
++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
++ else
++ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
++ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
++ } else {
++ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
++ }
++ } else
+ strcpy(cfe_version, "unknown");
+ pr_info("CFE version: %s\n", cfe_version);
+
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
+@@ -2,6 +2,8 @@
+ #ifndef BCM63XX_BOARD_H_
+ #define BCM63XX_BOARD_H_
+
++#include <asm/bootinfo.h>
++
+ const char *board_get_name(void);
+
+ void board_prom_init(void);
+@@ -10,4 +12,8 @@ void board_setup(void);
+
+ int board_register_devices(void);
+
++static inline bool bcm63xx_is_cfe_present(void) {
++ return fw_arg3 == 0x43464531;
++}
++
+ #endif /* ! BCM63XX_BOARD_H_ */
--- /dev/null
+--- a/drivers/mtd/bcm63xxpart.c
++++ b/drivers/mtd/bcm63xxpart.c
+@@ -35,6 +35,8 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/of.h>
++
++#include <asm/mach-bcm63xx/bcm63xx_board.h>
+
+ #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
+
+@@ -46,30 +48,6 @@
+ #define STR_NULL_TERMINATE(x) \
+ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
+
+-static int bcm63xx_detect_cfe(struct mtd_info *master)
+-{
+- char buf[9];
+- int ret;
+- size_t retlen;
+-
+- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
+- (void *)buf);
+- buf[retlen] = 0;
+-
+- if (ret)
+- return ret;
+-
+- if (strncmp("cfe-v", buf, 5) == 0)
+- return 0;
+-
+- /* very old CFE's do not have the cfe-v string, so check for magic */
+- ret = mtd_read(master, BCM963XX_CFE_MAGIC_OFFSET, 8, &retlen,
+- (void *)buf);
+- buf[retlen] = 0;
+-
+- return strncmp("CFE1CFE1", buf, 8);
+-}
+-
+ static int bcm63xx_read_nvram(struct mtd_info *master,
+ struct bcm963xx_nvram *nvram)
+ {
+@@ -152,7 +130,7 @@ static int bcm63xx_parse_cfe_partitions(
+ struct bcm963xx_nvram *nvram = NULL;
+ int ret;
+
+- if (bcm63xx_detect_cfe(master))
++ if (!bcm63xx_is_cfe_present())
+ return -EINVAL;
+
+ nvram = vzalloc(sizeof(*nvram));
--- /dev/null
+From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:53:12 +0100
+Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq
+ controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../brcm,bcm6345-periph-intc.txt | 50 +++
+ drivers/irqchip/Kconfig | 4 +
+ drivers/irqchip/Makefile | 1 +
+ drivers/irqchip/irq-bcm6345-periph.c | 339 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-periph.h | 16 +
+ 5 files changed, 410 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-periph.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
+@@ -0,0 +1,50 @@
++Broadcom BCM6345 Level 1 periphery interrupt controller
++
++This block is a interrupt controller that is typically connected directly
++to one of the HW INT lines on each CPU. Every BCM63XX xDSL chip since
++BCM6345 has contained this hardware.
++
++Key elements of the hardware design include:
++
++- 32, 64, or 128 incoming level IRQ lines
++
++- All onchip peripherals are wired directly to an L2 input
++
++- A separate instance of the register set for each CPU, allowing individual
++ peripheral IRQs to be routed to any CPU
++
++- No atomic mask/unmask operations
++
++- No polarity/level/edge settings
++
++- No FIFO or priority encoder logic; software is expected to read all
++ 1-4 status words to determine which IRQs are pending
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-periph-intc".
++- reg: Specifies the base physical address and size of the registers.
++ Multiple register addresses may be specified, and must match the amount of
++ parent interrupts.
++- interrupt-controller: Identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++ source, should be 1.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++ this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++ node, valid values depend on the type of parent interrupt controller.
++ Multiple lines are used to route interrupts to different cpus, with the first
++ assumed to be for the boot CPU.
++
++Example:
++
++periph_intc: interrupt-controller@f0406800 {
++ compatible = "brcm,bcm6345-periph-intc";
++ reg = <0x10000020 0x10>, <0x10000030 0x10>;
++
++ interrupt-controller;
++ #interrupt-cells = <1>;
++
++ interrupt-parent = <&cpu_intc>;
++ interrupts = <2>, <3>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -129,6 +129,10 @@ config BRCMSTB_L2_IRQ
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
++config BCM6345_PERIPH_IRQ
++ bool
++ select IRQ_DOMAIN
++
+ config DW_APB_ICTL
+ bool
+ select GENERIC_IRQ_CHIP
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
+ obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
+ obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
+ obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
+ obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
+ obj-$(CONFIG_OMPIC) += irq-ompic.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-periph.c
+@@ -0,0 +1,339 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE IRQ_INTERNAL_BASE
++#else
++#define VIRQ_BASE 0
++#endif
++
++#define MAX_WORDS 4
++#define MAX_PARENT_IRQS 2
++#define IRQS_PER_WORD 32
++
++struct intc_block {
++ int parent_irq;
++ void __iomem *base;
++ void __iomem *en_reg[MAX_WORDS];
++ void __iomem *status_reg[MAX_WORDS];
++ u32 mask_cache[MAX_WORDS];
++};
++
++struct intc_data {
++ struct irq_chip chip;
++ struct intc_block block[MAX_PARENT_IRQS];
++
++ int num_words;
++
++ struct irq_domain *domain;
++ raw_spinlock_t lock;
++};
++
++static void bcm6345_periph_irq_handle(struct irq_desc *desc)
++{
++ struct intc_data *data = irq_desc_get_handler_data(desc);
++ struct irq_chip *chip = irq_desc_get_chip(desc);
++ struct intc_block *block;
++ unsigned int irq = irq_desc_get_irq(desc);
++ unsigned int idx;
++
++ chained_irq_enter(chip, desc);
++
++ for (idx = 0; idx < MAX_PARENT_IRQS; idx++)
++ if (irq == data->block[idx].parent_irq)
++ block = &data->block[idx];
++
++ for (idx = 0; idx < data->num_words; idx++) {
++ int base = idx * IRQS_PER_WORD;
++ unsigned long pending;
++ int hw_irq;
++
++ raw_spin_lock(&data->lock);
++ pending = __raw_readl(block->en_reg[idx]) &
++ __raw_readl(block->status_reg[idx]);
++ raw_spin_unlock(&data->lock);
++
++ for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) {
++ int virq;
++
++ virq = irq_find_mapping(data->domain, base + hw_irq);
++ generic_handle_irq(virq);
++ }
++ }
++
++ chained_irq_exit(chip, desc);
++}
++
++static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit,
++ bool enable)
++{
++ u32 val;
++
++ val = __raw_readl(block->en_reg[reg]);
++ if (enable)
++ val |= BIT(bit);
++ else
++ val &= ~BIT(bit);
++ __raw_writel(val, block->en_reg[reg]);
++}
++
++static void bcm6345_periph_irq_mask(struct irq_data *data)
++{
++ unsigned int i, reg, bit;
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++
++ reg = hwirq / IRQS_PER_WORD;
++ bit = hwirq % IRQS_PER_WORD;
++
++ raw_spin_lock(&priv->lock);
++ for (i = 0; i < MAX_PARENT_IRQS; i++) {
++ struct intc_block *block = &priv->block[i];
++
++ if (!block->parent_irq)
++ break;
++
++ __bcm6345_periph_enable(block, reg, bit, false);
++ }
++ raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_periph_irq_unmask(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ unsigned int i, reg, bit;
++
++ reg = hwirq / IRQS_PER_WORD;
++ bit = hwirq % IRQS_PER_WORD;
++
++ raw_spin_lock(&priv->lock);
++ for (i = 0; i < MAX_PARENT_IRQS; i++) {
++ struct intc_block *block = &priv->block[i];
++
++ if (!block->parent_irq)
++ break;
++
++ if (block->mask_cache[reg] & BIT(bit))
++ __bcm6345_periph_enable(block, reg, bit, true);
++ else
++ __bcm6345_periph_enable(block, reg, bit, false);
++ }
++ raw_spin_unlock(&priv->lock);
++}
++
++#ifdef CONFIG_SMP
++static int bcm6345_periph_set_affinity(struct irq_data *data,
++ const struct cpumask *mask, bool force)
++{
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ struct intc_data *priv = data->domain->host_data;
++ unsigned int i, reg, bit;
++ unsigned long flags;
++ bool enabled;
++ int cpu;
++
++ reg = hwirq / IRQS_PER_WORD;
++ bit = hwirq % IRQS_PER_WORD;
++
++ /* we could route to more than one cpu, but performance
++ suffers, so fix it to one.
++ */
++ cpu = cpumask_any_and(mask, cpu_online_mask);
++ if (cpu >= nr_cpu_ids)
++ return -EINVAL;
++
++ if (cpu >= MAX_PARENT_IRQS)
++ return -EINVAL;
++
++ if (!priv->block[cpu].parent_irq)
++ return -EINVAL;
++
++ raw_spin_lock_irqsave(&priv->lock, flags);
++ enabled = !irqd_irq_masked(data);
++ for (i = 0; i < MAX_PARENT_IRQS; i++) {
++ struct intc_block *block = &priv->block[i];
++
++ if (!block->parent_irq)
++ break;
++
++ if (i == cpu) {
++ block->mask_cache[reg] |= BIT(bit);
++ __bcm6345_periph_enable(block, reg, bit, enabled);
++ } else {
++ block->mask_cache[reg] &= ~BIT(bit);
++ __bcm6345_periph_enable(block, reg, bit, false);
++ }
++ }
++ raw_spin_unlock_irqrestore(&priv->lock, flags);
++
++ return 0;
++}
++#endif
++
++static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq,
++ irq_hw_number_t hw)
++{
++ struct intc_data *priv = d->host_data;
++
++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++ return 0;
++}
++
++static const struct irq_domain_ops bcm6345_periph_domain_ops = {
++ .xlate = irq_domain_xlate_onecell,
++ .map = bcm6345_periph_map,
++};
++
++static int __init __bcm6345_periph_intc_init(struct device_node *node,
++ int num_blocks, int *irq,
++ void __iomem **base, int num_words)
++{
++ struct intc_data *data;
++ unsigned int i, w, status_offset;
++
++ data = kzalloc(sizeof(*data), GFP_KERNEL);
++ if (!data)
++ return -ENOMEM;
++
++ raw_spin_lock_init(&data->lock);
++
++ status_offset = num_words * sizeof(u32);
++
++ for (i = 0; i < num_blocks; i++) {
++ struct intc_block *block = &data->block[i];
++
++ block->parent_irq = irq[i];
++ block->base = base[i];
++
++ for (w = 0; w < num_words; w++) {
++ int word_offset = sizeof(u32) * ((num_words - w) - 1);
++
++ block->en_reg[w] = base[i] + word_offset;
++ block->status_reg[w] = base[i] + status_offset;
++ block->status_reg[w] += word_offset;
++
++ /* route all interrupts to line 0 by default */
++ if (i == 0)
++ block->mask_cache[w] = 0xffffffff;
++ }
++
++ irq_set_handler_data(block->parent_irq, data);
++ irq_set_chained_handler(block->parent_irq,
++ bcm6345_periph_irq_handle);
++ }
++
++ data->num_words = num_words;
++
++ data->chip.name = "bcm6345-periph-intc";
++ data->chip.irq_mask = bcm6345_periph_irq_mask;
++ data->chip.irq_unmask = bcm6345_periph_irq_unmask;
++
++#ifdef CONFIG_SMP
++ if (num_blocks > 1)
++ data->chip.irq_set_affinity = bcm6345_periph_set_affinity;
++#endif
++
++ data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words,
++ VIRQ_BASE,
++ &bcm6345_periph_domain_ops, data);
++ if (!data->domain) {
++ kfree(data);
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++void __init bcm6345_periph_intc_init(int num_blocks, int *irq,
++ void __iomem **base, int num_words)
++{
++ __bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_periph_of_init(struct device_node *node,
++ struct device_node *parent)
++{
++ struct resource res;
++ int num_irqs, ret = -EINVAL;
++ int irqs[MAX_PARENT_IRQS] = { 0 };
++ void __iomem *bases[MAX_PARENT_IRQS] = { NULL };
++ int words = 0;
++ int i;
++
++ num_irqs = of_irq_count(node);
++
++ if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS)
++ return -EINVAL;
++
++ for (i = 0; i < num_irqs; i++) {
++ resource_size_t size;
++
++ irqs[i] = irq_of_parse_and_map(node, i);
++ if (!irqs[i])
++ goto out_unmap;
++
++ if (of_address_to_resource(node, i, &res))
++ goto out_unmap;
++
++ size = resource_size(&res);
++ switch (size) {
++ case 8:
++ case 16:
++ case 32:
++ size = size / 8;
++ break;
++ default:
++ goto out_unmap;
++ }
++
++ if (words && words != size) {
++ ret = -EINVAL;
++ goto out_unmap;
++ }
++ words = size;
++
++ bases[i] = of_iomap(node, i);
++ if (!bases[i]) {
++ ret = -ENOMEM;
++ goto out_unmap;
++ }
++ }
++
++ ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words);
++ if (!ret)
++ return 0;
++
++out_unmap:
++ for (i = 0; i < num_irqs; i++) {
++ iounmap(bases[i]);
++ irq_dispose_mapping(irqs[i]);
++ }
++
++ return ret;
++}
++
++IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-l1-intc",
++ bcm6345_periph_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-periph.h
+@@ -0,0 +1,16 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
++
++void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base,
++ int num_words);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */
--- /dev/null
+From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:54:27 +0100
+Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
+ interrupt controller
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ .../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++
+ drivers/irqchip/Kconfig | 4 +
+ drivers/irqchip/Makefile | 1 +
+ drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++
+ include/linux/irqchip/irq-bcm6345-ext.h | 14 +
+ 5 files changed, 335 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+ create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
+ create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
+@@ -0,0 +1,29 @@
++Broadcom BCM6345-style external interrupt controller
++
++Required properties:
++
++- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc".
++- reg: Specifies the base physical addresses and size of the registers.
++- interrupt-controller: identifies the node as an interrupt controller.
++- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
++ source, Should be 2.
++- interrupt-parent: Specifies the phandle to the parent interrupt controller
++ this one is cascaded from.
++- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
++ node, valid values depend on the type of parent interrupt controller.
++
++Optional properties:
++
++- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
++ register. Defaults to 4.
++
++Example:
++
++ext_intc: interrupt-controller@10000018 {
++ compatible = "brcm,bcm6345-ext-intc";
++ interrupt-parent = <&periph_intc>;
++ #interrupt-cells = <2>;
++ reg = <0x10000018 0x4>;
++ interrupt-controller;
++ interrupts = <24>, <25>, <26>, <27>;
++};
+--- a/drivers/irqchip/Kconfig
++++ b/drivers/irqchip/Kconfig
+@@ -129,6 +129,10 @@ config BRCMSTB_L2_IRQ
+ select GENERIC_IRQ_CHIP
+ select IRQ_DOMAIN
+
++config BCM6345_EXT_IRQ
++ bool
++ select IRQ_DOMAIN
++
+ config BCM6345_PERIPH_IRQ
+ bool
+ select IRQ_DOMAIN
+--- a/drivers/irqchip/Makefile
++++ b/drivers/irqchip/Makefile
+@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
+ obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
+ obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
+ obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
++obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o
+ obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
+ obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
+ obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
+--- /dev/null
++++ b/drivers/irqchip/irq-bcm6345-ext.c
+@@ -0,0 +1,301 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#include <linux/ioport.h>
++#include <linux/irq.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/chained_irq.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/kernel.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_address.h>
++#include <linux/slab.h>
++#include <linux/spinlock.h>
++
++#ifdef CONFIG_BCM63XX
++#include <asm/mach-bcm63xx/bcm63xx_irq.h>
++
++#define VIRQ_BASE IRQ_EXTERNAL_BASE
++#else
++#define VIRQ_BASE 0
++#endif
++
++#define MAX_IRQS 4
++
++#define EXTIRQ_CFG_SENSE 0
++#define EXTIRQ_CFG_STAT 1
++#define EXTIRQ_CFG_CLEAR 2
++#define EXTIRQ_CFG_MASK 3
++#define EXTIRQ_CFG_BOTHEDGE 4
++#define EXTIRQ_CFG_LEVELSENSE 5
++
++struct intc_data {
++ struct irq_chip chip;
++ struct irq_domain *domain;
++ raw_spinlock_t lock;
++
++ int parent_irq[MAX_IRQS];
++ void __iomem *reg;
++ int shift;
++ unsigned int toggle_clear_on_ack:1;
++};
++
++static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
++{
++ struct intc_data *data = irq_desc_get_handler_data(desc);
++ struct irq_chip *chip = irq_desc_get_chip(desc);
++ unsigned int irq = irq_desc_get_irq(desc);
++ unsigned int idx;
++
++ chained_irq_enter(chip, desc);
++
++ for (idx = 0; idx < MAX_IRQS; idx++) {
++ if (data->parent_irq[idx] != irq)
++ continue;
++
++ generic_handle_irq(irq_find_mapping(data->domain, idx));
++ }
++
++ chained_irq_exit(chip, desc);
++}
++
++static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ u32 reg;
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
++ priv->reg);
++ if (priv->toggle_clear_on_ack)
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ u32 reg;
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++}
++
++static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ u32 reg;
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++}
++
++static int bcm6345_ext_intc_set_type(struct irq_data *data,
++ unsigned int flow_type)
++{
++ struct intc_data *priv = data->domain->host_data;
++ irq_hw_number_t hwirq = irqd_to_hwirq(data);
++ bool levelsense = 0, sense = 0, bothedge = 0;
++ u32 reg;
++
++ flow_type &= IRQ_TYPE_SENSE_MASK;
++
++ if (flow_type == IRQ_TYPE_NONE)
++ flow_type = IRQ_TYPE_LEVEL_LOW;
++
++ switch (flow_type) {
++ case IRQ_TYPE_EDGE_BOTH:
++ bothedge = 1;
++ break;
++
++ case IRQ_TYPE_EDGE_RISING:
++ sense = 1;
++ break;
++
++ case IRQ_TYPE_EDGE_FALLING:
++ break;
++
++ case IRQ_TYPE_LEVEL_HIGH:
++ levelsense = 1;
++ sense = 1;
++ break;
++
++ case IRQ_TYPE_LEVEL_LOW:
++ levelsense = 1;
++ break;
++
++ default:
++ pr_err("bogus flow type combination given!\n");
++ return -EINVAL;
++ }
++
++ raw_spin_lock(&priv->lock);
++ reg = __raw_readl(priv->reg);
++
++ if (levelsense)
++ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
++ else
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
++ if (sense)
++ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
++ else
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
++ if (bothedge)
++ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
++ else
++ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
++
++ __raw_writel(reg, priv->reg);
++ raw_spin_unlock(&priv->lock);
++
++ irqd_set_trigger_type(data, flow_type);
++ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
++ irq_set_handler_locked(data, handle_level_irq);
++ else
++ irq_set_handler_locked(data, handle_edge_irq);
++
++ return 0;
++}
++
++static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
++ irq_hw_number_t hw)
++{
++ struct intc_data *priv = d->host_data;
++
++ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
++
++ return 0;
++}
++
++static const struct irq_domain_ops bcm6345_ext_domain_ops = {
++ .xlate = irq_domain_xlate_twocell,
++ .map = bcm6345_ext_intc_map,
++};
++
++static int __init __bcm6345_ext_intc_init(struct device_node *node,
++ int num_irqs, int *irqs,
++ void __iomem *reg, int shift,
++ bool toggle_clear_on_ack)
++{
++ struct intc_data *data;
++ unsigned int i;
++ int start = VIRQ_BASE;
++
++ data = kzalloc(sizeof(*data), GFP_KERNEL);
++ if (!data)
++ return -ENOMEM;
++
++ raw_spin_lock_init(&data->lock);
++
++ for (i = 0; i < num_irqs; i++) {
++ data->parent_irq[i] = irqs[i];
++
++ irq_set_handler_data(irqs[i], data);
++ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
++ }
++
++ data->reg = reg;
++ data->shift = shift;
++ data->toggle_clear_on_ack = toggle_clear_on_ack;
++
++ data->chip.name = "bcm6345-ext-intc";
++ data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
++ data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
++ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
++ data->chip.irq_set_type = bcm6345_ext_intc_set_type;
++
++ /*
++ * If we have less than 4 irqs, this is the second controller on
++ * bcm63xx. So increase the VIRQ start to not overlap with the first
++ * one, but only do so if we actually use a non-zero start.
++ *
++ * This can be removed when bcm63xx has no legacy users anymore.
++ */
++ if (start && num_irqs < 4)
++ start += 4;
++
++ data->domain = irq_domain_add_simple(node, num_irqs, start,
++ &bcm6345_ext_domain_ops, data);
++ if (!data->domain) {
++ kfree(data);
++ return -ENOMEM;
++ }
++
++ return 0;
++}
++
++void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
++ int shift)
++{
++ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false);
++}
++
++#ifdef CONFIG_OF
++static int __init bcm6345_ext_intc_of_init(struct device_node *node,
++ struct device_node *parent)
++{
++ int num_irqs, ret = -EINVAL;
++ unsigned i;
++ void __iomem *base;
++ int irqs[MAX_IRQS] = { 0 };
++ u32 shift;
++ bool toggle_clear_on_ack = false;
++
++ num_irqs = of_irq_count(node);
++
++ if (!num_irqs || num_irqs > MAX_IRQS)
++ return -EINVAL;
++
++ if (of_property_read_u32(node, "brcm,field-width", &shift))
++ shift = 4;
++
++ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */
++ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
++ toggle_clear_on_ack = true;
++
++ for (i = 0; i < num_irqs; i++) {
++ irqs[i] = irq_of_parse_and_map(node, i);
++ if (!irqs[i]) {
++ ret = -ENOMEM;
++ goto out_unmap;
++ }
++ }
++
++ base = of_iomap(node, 0);
++ if (!base)
++ goto out_unmap;
++
++ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
++ toggle_clear_on_ack);
++ if (!ret)
++ return 0;
++out_unmap:
++ iounmap(base);
++
++ for (i = 0; i < num_irqs; i++)
++ irq_dispose_mapping(irqs[i]);
++
++ return ret;
++}
++
++IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
++ bcm6345_ext_intc_of_init);
++IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
++ bcm6345_ext_intc_of_init);
++#endif
+--- /dev/null
++++ b/include/linux/irqchip/irq-bcm6345-ext.h
+@@ -0,0 +1,14 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
++ */
++
++#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
++
++void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
++
++#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
--- /dev/null
+From d2d2489e0a4b740abd980e9d1cad952d15bc2d9e Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 14:55:02 +0100
+Subject: [PATCH] MIPS: BCM63XX: switch to IRQ_DOMAIN
+
+Now that we have working IRQ_DOMAIN drivers for both interrupt controllers,
+switch to using them.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/Kconfig | 3 +
+ arch/mips/bcm63xx/irq.c | 612 +++++++++---------------------------------------
+ 2 files changed, 108 insertions(+), 507 deletions(-)
+
+--- a/arch/mips/Kconfig
++++ b/arch/mips/Kconfig
+@@ -283,6 +283,9 @@ config BCM63XX
+ select SYNC_R4K
+ select DMA_NONCOHERENT
+ select IRQ_MIPS_CPU
++ select BCM6345_EXT_IRQ
++ select BCM6345_PERIPH_IRQ
++ select IRQ_DOMAIN
+ select SYS_SUPPORTS_32BIT_KERNEL
+ select SYS_SUPPORTS_BIG_ENDIAN
+ select SYS_HAS_EARLY_PRINTK
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -11,7 +11,9 @@
+ #include <linux/init.h>
+ #include <linux/interrupt.h>
+ #include <linux/irq.h>
+-#include <linux/spinlock.h>
++#include <linux/irqchip.h>
++#include <linux/irqchip/irq-bcm6345-ext.h>
++#include <linux/irqchip/irq-bcm6345-periph.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -19,544 +21,140 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+
+-
+-static DEFINE_SPINLOCK(ipic_lock);
+-static DEFINE_SPINLOCK(epic_lock);
+-
+-static u32 irq_stat_addr[2];
+-static u32 irq_mask_addr[2];
+-static void (*dispatch_internal)(int cpu);
+-static int is_ext_irq_cascaded;
+-static unsigned int ext_irq_count;
+-static unsigned int ext_irq_start, ext_irq_end;
+-static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
+-static void (*internal_irq_mask)(struct irq_data *d);
+-static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
+-
+-
+-static inline u32 get_ext_irq_perf_reg(int irq)
+-{
+- if (irq < 4)
+- return ext_irq_cfg_reg1;
+- return ext_irq_cfg_reg2;
+-}
+-
+-static inline void handle_internal(int intbit)
+-{
+- if (is_ext_irq_cascaded &&
+- intbit >= ext_irq_start && intbit <= ext_irq_end)
+- do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
+- else
+- do_IRQ(intbit + IRQ_INTERNAL_BASE);
+-}
+-
+-static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
+- const struct cpumask *m)
+-{
+- bool enable = cpu_online(cpu);
+-
+-#ifdef CONFIG_SMP
+- if (m)
+- enable &= cpumask_test_cpu(cpu, m);
+- else if (irqd_affinity_was_set(d))
+- enable &= cpumask_test_cpu(cpu, irq_data_get_affinity_mask(d));
+-#endif
+- return enable;
+-}
+-
+-/*
+- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
+- * prioritize any interrupt relatively to another. the static counter
+- * will resume the loop where it ended the last time we left this
+- * function.
+- */
+-
+-#define BUILD_IPIC_INTERNAL(width) \
+-void __dispatch_internal_##width(int cpu) \
+-{ \
+- u32 pending[width / 32]; \
+- unsigned int src, tgt; \
+- bool irqs_pending = false; \
+- static unsigned int i[2]; \
+- unsigned int *next = &i[cpu]; \
+- unsigned long flags; \
+- \
+- /* read registers in reverse order */ \
+- spin_lock_irqsave(&ipic_lock, flags); \
+- for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
+- u32 val; \
+- \
+- val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
+- val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
+- pending[--tgt] = val; \
+- \
+- if (val) \
+- irqs_pending = true; \
+- } \
+- spin_unlock_irqrestore(&ipic_lock, flags); \
+- \
+- if (!irqs_pending) \
+- return; \
+- \
+- while (1) { \
+- unsigned int to_call = *next; \
+- \
+- *next = (*next + 1) & (width - 1); \
+- if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
+- handle_internal(to_call); \
+- break; \
+- } \
+- } \
+-} \
+- \
+-static void __internal_irq_mask_##width(struct irq_data *d) \
+-{ \
+- u32 val; \
+- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
+- unsigned reg = (irq / 32) ^ (width/32 - 1); \
+- unsigned bit = irq & 0x1f; \
+- unsigned long flags; \
+- int cpu; \
+- \
+- spin_lock_irqsave(&ipic_lock, flags); \
+- for_each_present_cpu(cpu) { \
+- if (!irq_mask_addr[cpu]) \
+- break; \
+- \
+- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+- val &= ~(1 << bit); \
+- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+- } \
+- spin_unlock_irqrestore(&ipic_lock, flags); \
+-} \
+- \
+-static void __internal_irq_unmask_##width(struct irq_data *d, \
+- const struct cpumask *m) \
+-{ \
+- u32 val; \
+- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
+- unsigned reg = (irq / 32) ^ (width/32 - 1); \
+- unsigned bit = irq & 0x1f; \
+- unsigned long flags; \
+- int cpu; \
+- \
+- spin_lock_irqsave(&ipic_lock, flags); \
+- for_each_present_cpu(cpu) { \
+- if (!irq_mask_addr[cpu]) \
+- break; \
+- \
+- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
+- if (enable_irq_for_cpu(cpu, d, m)) \
+- val |= (1 << bit); \
+- else \
+- val &= ~(1 << bit); \
+- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
+- } \
+- spin_unlock_irqrestore(&ipic_lock, flags); \
+-}
+-
+-BUILD_IPIC_INTERNAL(32);
+-BUILD_IPIC_INTERNAL(64);
+-
+-asmlinkage void plat_irq_dispatch(void)
+-{
+- u32 cause;
+-
+- do {
+- cause = read_c0_cause() & read_c0_status() & ST0_IM;
+-
+- if (!cause)
+- break;
+-
+- if (cause & CAUSEF_IP7)
+- do_IRQ(7);
+- if (cause & CAUSEF_IP0)
+- do_IRQ(0);
+- if (cause & CAUSEF_IP1)
+- do_IRQ(1);
+- if (cause & CAUSEF_IP2)
+- dispatch_internal(0);
+- if (is_ext_irq_cascaded) {
+- if (cause & CAUSEF_IP3)
+- dispatch_internal(1);
+- } else {
+- if (cause & CAUSEF_IP3)
+- do_IRQ(IRQ_EXT_0);
+- if (cause & CAUSEF_IP4)
+- do_IRQ(IRQ_EXT_1);
+- if (cause & CAUSEF_IP5)
+- do_IRQ(IRQ_EXT_2);
+- if (cause & CAUSEF_IP6)
+- do_IRQ(IRQ_EXT_3);
+- }
+- } while (1);
+-}
+-
+-/*
+- * internal IRQs operations: only mask/unmask on PERF irq mask
+- * register.
+- */
+-static void bcm63xx_internal_irq_mask(struct irq_data *d)
+-{
+- internal_irq_mask(d);
+-}
+-
+-static void bcm63xx_internal_irq_unmask(struct irq_data *d)
+-{
+- internal_irq_unmask(d, NULL);
+-}
+-
+-/*
+- * external IRQs operations: mask/unmask and clear on PERF external
+- * irq control register.
+- */
+-static void bcm63xx_external_irq_mask(struct irq_data *d)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- unsigned long flags;
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+-
+- if (BCMCPU_IS_6348())
+- reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4);
+- else
+- reg &= ~EXTIRQ_CFG_MASK(irq % 4);
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-
+- if (is_ext_irq_cascaded)
+- internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
+-}
+-
+-static void bcm63xx_external_irq_unmask(struct irq_data *d)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- unsigned long flags;
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+-
+- if (BCMCPU_IS_6348())
+- reg |= EXTIRQ_CFG_MASK_6348(irq % 4);
+- else
+- reg |= EXTIRQ_CFG_MASK(irq % 4);
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-
+- if (is_ext_irq_cascaded)
+- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
+- NULL);
+-}
+-
+-static void bcm63xx_external_irq_clear(struct irq_data *d)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- unsigned long flags;
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+-
+- if (BCMCPU_IS_6348())
+- reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4);
+- else
+- reg |= EXTIRQ_CFG_CLEAR(irq % 4);
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-}
+-
+-static int bcm63xx_external_irq_set_type(struct irq_data *d,
+- unsigned int flow_type)
+-{
+- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
+- u32 reg, regaddr;
+- int levelsense, sense, bothedge;
+- unsigned long flags;
+-
+- flow_type &= IRQ_TYPE_SENSE_MASK;
+-
+- if (flow_type == IRQ_TYPE_NONE)
+- flow_type = IRQ_TYPE_LEVEL_LOW;
+-
+- levelsense = sense = bothedge = 0;
+- switch (flow_type) {
+- case IRQ_TYPE_EDGE_BOTH:
+- bothedge = 1;
+- break;
+-
+- case IRQ_TYPE_EDGE_RISING:
+- sense = 1;
+- break;
+-
+- case IRQ_TYPE_EDGE_FALLING:
+- break;
+-
+- case IRQ_TYPE_LEVEL_HIGH:
+- levelsense = 1;
+- sense = 1;
+- break;
+-
+- case IRQ_TYPE_LEVEL_LOW:
+- levelsense = 1;
+- break;
+-
+- default:
+- pr_err("bogus flow type combination given !\n");
+- return -EINVAL;
+- }
+-
+- regaddr = get_ext_irq_perf_reg(irq);
+- spin_lock_irqsave(&epic_lock, flags);
+- reg = bcm_perf_readl(regaddr);
+- irq %= 4;
+-
+- switch (bcm63xx_get_cpu_id()) {
+- case BCM6348_CPU_ID:
+- if (levelsense)
+- reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
+- else
+- reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq);
+- if (sense)
+- reg |= EXTIRQ_CFG_SENSE_6348(irq);
+- else
+- reg &= ~EXTIRQ_CFG_SENSE_6348(irq);
+- if (bothedge)
+- reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
+- else
+- reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
+- break;
+-
+- case BCM3368_CPU_ID:
+- case BCM6328_CPU_ID:
+- case BCM6338_CPU_ID:
+- case BCM6345_CPU_ID:
+- case BCM6358_CPU_ID:
+- case BCM6362_CPU_ID:
+- case BCM6368_CPU_ID:
+- if (levelsense)
+- reg |= EXTIRQ_CFG_LEVELSENSE(irq);
+- else
+- reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
+- if (sense)
+- reg |= EXTIRQ_CFG_SENSE(irq);
+- else
+- reg &= ~EXTIRQ_CFG_SENSE(irq);
+- if (bothedge)
+- reg |= EXTIRQ_CFG_BOTHEDGE(irq);
+- else
+- reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
+- break;
+- default:
+- BUG();
+- }
+-
+- bcm_perf_writel(reg, regaddr);
+- spin_unlock_irqrestore(&epic_lock, flags);
+-
+- irqd_set_trigger_type(d, flow_type);
+- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
+- irq_set_handler_locked(d, handle_level_irq);
+- else
+- irq_set_handler_locked(d, handle_edge_irq);
+-
+- return IRQ_SET_MASK_OK_NOCOPY;
+-}
+-
+-#ifdef CONFIG_SMP
+-static int bcm63xx_internal_set_affinity(struct irq_data *data,
+- const struct cpumask *dest,
+- bool force)
+-{
+- if (!irqd_irq_disabled(data))
+- internal_irq_unmask(data, dest);
+-
+- return 0;
+-}
+-#endif
+-
+-static struct irq_chip bcm63xx_internal_irq_chip = {
+- .name = "bcm63xx_ipic",
+- .irq_mask = bcm63xx_internal_irq_mask,
+- .irq_unmask = bcm63xx_internal_irq_unmask,
+-};
+-
+-static struct irq_chip bcm63xx_external_irq_chip = {
+- .name = "bcm63xx_epic",
+- .irq_ack = bcm63xx_external_irq_clear,
+-
+- .irq_mask = bcm63xx_external_irq_mask,
+- .irq_unmask = bcm63xx_external_irq_unmask,
+-
+- .irq_set_type = bcm63xx_external_irq_set_type,
+-};
+-
+-static struct irqaction cpu_ip2_cascade_action = {
+- .handler = no_action,
+- .name = "cascade_ip2",
+- .flags = IRQF_NO_THREAD,
+-};
+-
+-#ifdef CONFIG_SMP
+-static struct irqaction cpu_ip3_cascade_action = {
+- .handler = no_action,
+- .name = "cascade_ip3",
+- .flags = IRQF_NO_THREAD,
+-};
+-#endif
+-
+-static struct irqaction cpu_ext_cascade_action = {
+- .handler = no_action,
+- .name = "cascade_extirq",
+- .flags = IRQF_NO_THREAD,
+-};
+-
+-static void bcm63xx_init_irq(void)
++void __init arch_init_irq(void)
+ {
+- int irq_bits;
+-
+- irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
+- irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
+- irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
+- irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
++ void __iomem *periph_bases[2];
++ void __iomem *ext_intc_bases[2];
++ int periph_irq_count, periph_width, ext_irq_count, ext_shift;
++ int periph_irqs[2] = { 2, 3 };
++ int ext_irqs[6];
++
++ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
++ ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM3368_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
++ periph_bases[0] += PERF_IRQMASK_3368_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_3368_EXT_IRQ0;
++ ext_irqs[1] = BCM_3368_EXT_IRQ1;
++ ext_irqs[2] = BCM_3368_EXT_IRQ2;
++ ext_irqs[3] = BCM_3368_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6328_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
+- irq_bits = 64;
+- ext_irq_count = 4;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
++ periph_bases[0] += PERF_IRQMASK_6328_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6328_REG(1);
++ periph_irq_count = 2;
++ periph_width = 2;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6328_EXT_IRQ0;
++ ext_irqs[1] = BCM_6328_EXT_IRQ1;
++ ext_irqs[2] = BCM_6328_EXT_IRQ2;
++ ext_irqs[3] = BCM_6328_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6338_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
++ periph_bases[0] += PERF_IRQMASK_6338_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338;
++ ext_irq_count = 4;
++ ext_irqs[0] = 3;
++ ext_irqs[1] = 4;
++ ext_irqs[2] = 5;
++ ext_irqs[3] = 6;
++ ext_shift = 4;
+ break;
+ case BCM6345_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
++ periph_bases[0] += PERF_IRQMASK_6345_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345;
++ ext_irq_count = 4;
++ ext_irqs[0] = 3;
++ ext_irqs[1] = 4;
++ ext_irqs[2] = 5;
++ ext_irqs[3] = 6;
++ ext_shift = 4;
+ break;
+ case BCM6348_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
+- irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
+- irq_stat_addr[1] = 0;
+- irq_mask_addr[1] = 0;
+- irq_bits = 32;
+- ext_irq_count = 4;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
++ periph_bases[0] += PERF_IRQMASK_6348_REG;
++ periph_irq_count = 1;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348;
++ ext_irq_count = 4;
++ ext_irqs[0] = 3;
++ ext_irqs[1] = 4;
++ ext_irqs[2] = 5;
++ ext_irqs[3] = 6;
++ ext_shift = 5;
+ break;
+ case BCM6358_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
+- irq_bits = 32;
+- ext_irq_count = 4;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
++ periph_bases[0] += PERF_IRQMASK_6358_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6358_REG(1);
++ periph_irq_count = 2;
++ periph_width = 1;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6358_EXT_IRQ0;
++ ext_irqs[1] = BCM_6358_EXT_IRQ1;
++ ext_irqs[2] = BCM_6358_EXT_IRQ2;
++ ext_irqs[3] = BCM_6358_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6362_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
+- irq_bits = 64;
+- ext_irq_count = 4;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
++ periph_bases[0] += PERF_IRQMASK_6362_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6362_REG(1);
++ periph_irq_count = 2;
++ periph_width = 2;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6362_EXT_IRQ0;
++ ext_irqs[1] = BCM_6362_EXT_IRQ1;
++ ext_irqs[2] = BCM_6362_EXT_IRQ2;
++ ext_irqs[3] = BCM_6362_EXT_IRQ3;
++ ext_shift = 4;
+ break;
+ case BCM6368_CPU_ID:
+- irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
+- irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
+- irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
+- irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
+- irq_bits = 64;
++ periph_bases[0] += PERF_IRQMASK_6368_REG(0);
++ periph_bases[1] += PERF_IRQMASK_6368_REG(1);
++ periph_irq_count = 2;
++ periph_width = 2;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368;
++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368;
+ ext_irq_count = 6;
+- is_ext_irq_cascaded = 1;
+- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
+- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
+- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
+- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
++ ext_irqs[0] = BCM_6368_EXT_IRQ0;
++ ext_irqs[1] = BCM_6368_EXT_IRQ1;
++ ext_irqs[2] = BCM_6368_EXT_IRQ2;
++ ext_irqs[3] = BCM_6368_EXT_IRQ3;
++ ext_irqs[4] = BCM_6368_EXT_IRQ4;
++ ext_irqs[5] = BCM_6368_EXT_IRQ5;
++ ext_shift = 4;
+ break;
+ default:
+ BUG();
+ }
+
+- if (irq_bits == 32) {
+- dispatch_internal = __dispatch_internal_32;
+- internal_irq_mask = __internal_irq_mask_32;
+- internal_irq_unmask = __internal_irq_unmask_32;
+- } else {
+- dispatch_internal = __dispatch_internal_64;
+- internal_irq_mask = __internal_irq_mask_64;
+- internal_irq_unmask = __internal_irq_unmask_64;
+- }
+-}
+-
+-void __init arch_init_irq(void)
+-{
+- int i;
+-
+- bcm63xx_init_irq();
+ mips_cpu_irq_init();
+- for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
+- irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
+- handle_level_irq);
+-
+- for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i)
+- irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip,
+- handle_edge_irq);
+-
+- if (!is_ext_irq_cascaded) {
+- for (i = 3; i < 3 + ext_irq_count; ++i)
+- setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
+- }
+-
+- setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
+-#ifdef CONFIG_SMP
+- if (is_ext_irq_cascaded) {
+- setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
+- bcm63xx_internal_irq_chip.irq_set_affinity =
+- bcm63xx_internal_set_affinity;
+-
+- cpumask_clear(irq_default_affinity);
+- cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
+- }
+-#endif
++ bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases,
++ periph_width);
++ bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift);
++ if (ext_irq_count > 4)
++ bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1],
++ ext_shift);
+ }
--- /dev/null
+From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 30 Nov 2014 20:20:30 +0100
+Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
+ and 5
+
+Due to the external interrupts being non consecutive, the previous
+implementation did not support them. Now that we treat both registers
+as separate irq controllers, there is no such limitation anymore and
+we can expose them for drivers to use.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 5 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
+ 3 files changed, 7 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -108,11 +108,14 @@ void __init arch_init_irq(void)
+ periph_width = 1;
+
+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
+- ext_irq_count = 4;
++ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
++ ext_irq_count = 6;
+ ext_irqs[0] = BCM_6358_EXT_IRQ0;
+ ext_irqs[1] = BCM_6358_EXT_IRQ1;
+ ext_irqs[2] = BCM_6358_EXT_IRQ2;
+ ext_irqs[3] = BCM_6358_EXT_IRQ3;
++ ext_irqs[4] = BCM_6358_EXT_IRQ4;
++ ext_irqs[5] = BCM_6358_EXT_IRQ5;
+ ext_shift = 4;
+ break;
+ case BCM6362_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -896,6 +896,8 @@ enum bcm63xx_irq {
+ #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
+ #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
+ #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
++#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20)
++#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21)
+
+ /*
+ * 6362 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -244,6 +244,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6362 0x18
+ #define PERF_EXTIRQ_CFG_REG_6368 0x18
+
++#define PERF_EXTIRQ_CFG_REG2_6358 0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
+
+ /* for 6348 only */
--- /dev/null
+From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:08:36 +0100
+Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
+
+---
+ arch/mips/bcm63xx/cpu.c | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
+ 2 files changed, 28 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
+ u16 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+
++static u32 bcm63xx_cpu_variant __read_mostly;
++
+ static u8 bcm63xx_cpu_rev;
+ static unsigned int bcm63xx_cpu_freq;
+ static unsigned int bcm63xx_memory_size;
+@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
+
+ };
+
++u32 bcm63xx_get_cpu_variant(void)
++{
++ return bcm63xx_cpu_variant;
++}
++
++EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
++
+ u8 bcm63xx_get_cpu_rev(void)
+ {
+ return bcm63xx_cpu_rev;
+@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
+ /* read out CPU type */
+ tmp = bcm_readl(chipid_reg);
+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+
+ switch (bcm63xx_cpu_id) {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -20,6 +20,7 @@
+ #define BCM6368_CPU_ID 0x6368
+
+ void __init bcm63xx_cpu_init(void);
++u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+
+@@ -83,6 +84,23 @@ static inline u16 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
+
++#define BCMCPU_VARIANT_IS_3368() \
++ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6328() \
++ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_6338() \
++ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
++#define BCMCPU_VARIANT_IS_6345() \
++ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
++#define BCMCPU_VARIANT_IS_6348() \
++ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
++#define BCMCPU_VARIANT_IS_6358() \
++ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6362() \
++ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
++#define BCMCPU_VARIANT_IS_6368() \
++ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
+ * address of these sets do change.
--- /dev/null
+From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:22:41 +0100
+Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
+
+Some SoC have a variant id field in the chip id register.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
+ 1 file changed, 2 insertions(+)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -10,6 +10,8 @@
+ #define PERF_REV_REG 0x0
+ #define REV_CHIPID_SHIFT 16
+ #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
++#define REV_VARID_SHIFT 12
++#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT 0
+ #define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
+
--- /dev/null
+From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:30:59 +0100
+Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 10 ++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
+ 2 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void)
+ unsigned int tmp;
+ unsigned int cpu = smp_processor_id();
+ u32 chipid_reg;
++ u8 __maybe_unused varid = 0;
+
+ /* soc registers location depends on cpu type */
+ chipid_reg = 0;
+@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void)
+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
+
+ switch (bcm63xx_cpu_id) {
+ case BCM3368_CPU_ID:
+@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void)
+ case BCM6328_CPU_ID:
+ bcm63xx_regs_base = bcm6328_regs_base;
+ bcm63xx_irqs = bcm6328_irqs;
++
++ if (varid == 1)
++ bcm63xx_cpu_variant = BCM63281_CPU_ID;
++ else if (varid == 3)
++ bcm63xx_cpu_variant = BCM63283_CPU_ID;
++ else
++ pr_warn("unknown BCM6328 variant: %x\n", varid);
++
+ break;
+ case BCM6338_CPU_ID:
+ bcm63xx_regs_base = bcm6338_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -12,6 +12,8 @@
+ */
+ #define BCM3368_CPU_ID 0x3368
+ #define BCM6328_CPU_ID 0x6328
++#define BCM63281_CPU_ID 0x63281
++#define BCM63283_CPU_ID 0x63283
+ #define BCM6338_CPU_ID 0x6338
+ #define BCM6345_CPU_ID 0x6345
+ #define BCM6348_CPU_ID 0x6348
+@@ -86,8 +88,10 @@ static inline u16 __pure bcm63xx_get_cpu
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+-#define BCMCPU_VARIANT_IS_6328() \
+- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
++#define BCMCPU_VARIANT_IS_63281() \
++ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
++#define BCMCPU_VARIANT_IS_63283() \
++ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6338() \
+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6345() \
--- /dev/null
+From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:33:28 +0100
+Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
+
+---
+ arch/mips/bcm63xx/cpu.c | 8 ++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 11 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void)
+ case BCM6362_CPU_ID:
+ bcm63xx_regs_base = bcm6362_regs_base;
+ bcm63xx_irqs = bcm6362_irqs;
++
++ if (varid == 1)
++ bcm63xx_cpu_variant = BCM6362_CPU_ID;
++ else if (varid == 2)
++ bcm63xx_cpu_variant = BCM6361_CPU_ID;
++ else
++ pr_warn("unknown BCM6362 variant: %x\n", varid);
++
+ break;
+ case BCM6368_CPU_ID:
+ bcm63xx_regs_base = bcm6368_regs_base;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -18,6 +18,7 @@
+ #define BCM6345_CPU_ID 0x6345
+ #define BCM6348_CPU_ID 0x6348
+ #define BCM6358_CPU_ID 0x6358
++#define BCM6361_CPU_ID 0x6361
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
+
+@@ -100,6 +101,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6358() \
+ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
++#define BCMCPU_VARIANT_IS_6361() \
++ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6362() \
+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
--- /dev/null
+From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:36:56 +0100
+Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
+
+The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
+from missing DSL, there is no difference to BCM6368, so treat it such.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/cpu.c | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
+
+ break;
+ case BCM6368_CPU_ID:
++ case BCM6369_CPU_ID:
+ bcm63xx_regs_base = bcm6368_regs_base;
+ bcm63xx_irqs = bcm6368_irqs;
++
++ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
++ bcm63xx_cpu_id = BCM6368_CPU_ID;
+ break;
+ default:
+ panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -21,6 +21,7 @@
+ #define BCM6361_CPU_ID 0x6361
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
++#define BCM6369_CPU_ID 0x6369
+
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -107,6 +108,8 @@ static inline u16 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6368() \
+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6369() \
++ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
+
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
--- /dev/null
+From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:05:54 +0100
+Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -42,7 +42,7 @@
+ BCM_CB_MEM_SIZE - 1)
+
+ #define BCM_PCIE_MEM_BASE_PA 0x10f00000
+-#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024)
++#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
+ BCM_PCIE_MEM_SIZE - 1)
+
--- /dev/null
+From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:13:06 +0100
+Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
+
+Different SoCs use different memory windows (and sizes), so don't
+hardcode it.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++----
+ arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++-----
+ 2 files changed, 14 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -41,10 +41,10 @@
+ #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
+ BCM_CB_MEM_SIZE - 1)
+
+-#define BCM_PCIE_MEM_BASE_PA 0x10f00000
+-#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
+-#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
+- BCM_PCIE_MEM_SIZE - 1)
++#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
++#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
++ BCM_PCIE_MEM_SIZE_6328 - 1)
+
+ /*
+ * Internal registers are accessed through KSEG3
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
+
+ static struct resource bcm_pcie_mem_resource = {
+ .name = "bcm63xx PCIe memory space",
+- .start = BCM_PCIE_MEM_BASE_PA,
+- .end = BCM_PCIE_MEM_END_PA,
++ .start = 0,
++ .end = 0,
+ .flags = IORESOURCE_MEM,
+ };
+
+@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
+ bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+
+ /* set bar0 to little endian */
+- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
+- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+ val |= BASEMASK_REMAP_EN;
+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+
+- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+
+ register_pci_controller(&bcm63xx_pcie_controller);
+@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
+ if (!bcm63xx_pci_enabled)
+ return -ENODEV;
+
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++ }
++
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
--- /dev/null
+From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 14:54:51 +0100
+Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
+
+---
+ arch/mips/bcm63xx/cpu.c | 2 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
+ 2 files changed, 5 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
+ const int *bcm63xx_irqs;
+ EXPORT_SYMBOL(bcm63xx_irqs);
+
+-u16 bcm63xx_cpu_id __read_mostly;
++u32 bcm63xx_cpu_id __read_mostly;
+ EXPORT_SYMBOL(bcm63xx_cpu_id);
+
+ static u32 bcm63xx_cpu_variant __read_mostly;
+@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
+
+ static unsigned int detect_cpu_clock(void)
+ {
+- u16 cpu_id = bcm63xx_get_cpu_id();
++ u32 cpu_id = bcm63xx_get_cpu_id();
+
+ switch (cpu_id) {
+ case BCM3368_CPU_ID:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -28,7 +28,7 @@ u32 bcm63xx_get_cpu_variant(void);
+ u8 bcm63xx_get_cpu_rev(void);
+ unsigned int bcm63xx_get_cpu_freq(void);
+
+-static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
++static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
+ {
+ switch (cpu_id) {
+ #ifdef CONFIG_BCM63XX_CPU_3368
+@@ -70,11 +70,11 @@ static inline u16 __pure __bcm63xx_get_c
+ return cpu_id;
+ }
+
+-extern u16 bcm63xx_cpu_id;
++extern u32 bcm63xx_cpu_id;
+
+-static inline u16 __pure bcm63xx_get_cpu_id(void)
++static inline u32 __pure bcm63xx_get_cpu_id(void)
+ {
+- const u16 cpu_id = bcm63xx_cpu_id;
++ const u32 cpu_id = bcm63xx_cpu_id;
+
+ return __bcm63xx_get_cpu_id(cpu_id);
+ }
--- /dev/null
+From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:46:26 +0100
+Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
+
+Newer SoCs have 128 bit wide irq registers, thus 128 available internal
+interupts.
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
+ arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
+ 2 files changed, 4 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
+@@ -2,10 +2,12 @@
+ #ifndef BCM63XX_IRQ_H_
+ #define BCM63XX_IRQ_H_
+
++#include <irq.h>
+ #include <bcm63xx_cpu.h>
+
+ #define IRQ_INTERNAL_BASE 8
+-#define IRQ_EXTERNAL_BASE 100
++#define NR_INTERNAL_IRQS 128
++#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
+ #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
+ #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
+ #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
+--- a/arch/mips/include/asm/mach-bcm63xx/irq.h
++++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
+@@ -2,7 +2,7 @@
+ #ifndef __ASM_MACH_BCM63XX_IRQ_H
+ #define __ASM_MACH_BCM63XX_IRQ_H
+
+-#define NR_IRQS 128
++#define NR_IRQS 256
+ #define MIPS_CPU_IRQ_BASE 0
+
+ #endif
--- /dev/null
+From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 7 Dec 2013 17:14:17 +0100
+Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Kconfig | 5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/clk.c | 25 ++++-
+ arch/mips/bcm63xx/cpu.c | 59 +++++++++-
+ arch/mips/bcm63xx/dev-flash.c | 6 +
+ arch/mips/bcm63xx/dev-spi.c | 4 +-
+ arch/mips/bcm63xx/irq.c | 20 +++-
+ arch/mips/bcm63xx/reset.c | 21 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 130 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 +
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 79 +++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
+ 12 files changed, 342 insertions(+), 12 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -61,6 +61,11 @@ config BCM63XX_CPU_6368
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++
++config BCM63XX_CPU_63268
++ bool "support 63268 CPU"
++ select SYS_HAS_CPU_BMIPS4350
++ select HW_HAS_PCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -697,7 +697,7 @@ void __init board_prom_init(void)
+ /* read base address of boot chip select (0)
+ * 6328/6362 do not have MPI but boot from a fixed address
+ */
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ val = 0x18000000;
+ } else {
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -169,6 +169,8 @@ static void enetsw_set(struct clk *clk,
+ clk_disable_unlocked(&clk_swpkt_sar);
+ }
+ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
++ } else if (BCMCPU_IS_63268()) {
++ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
+ } else {
+ return;
+ }
+@@ -214,6 +216,8 @@ static void usbh_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
++ else if (BCMCPU_IS_63268())
++ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+ else
+ return;
+
+@@ -236,6 +240,8 @@ static void usbd_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
+ else if (BCMCPU_IS_6368())
+ bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
++ else if (BCMCPU_IS_63268())
++ bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
+ else
+ return;
+
+@@ -262,9 +268,13 @@ static void spi_set(struct clk *clk, int
+ mask = CKCTL_6358_SPI_EN;
+ else if (BCMCPU_IS_6362())
+ mask = CKCTL_6362_SPI_EN;
+- else
+- /* BCMCPU_IS_6368 */
++ else if (BCMCPU_IS_6368())
+ mask = CKCTL_6368_SPI_EN;
++ else if (BCMCPU_IS_63268())
++ mask = CKCTL_63268_SPI_EN;
++ else
++ return;
++
+ bcm_hwclock_set(mask, enable);
+ }
+
+@@ -283,6 +293,8 @@ static void hsspi_set(struct clk *clk, i
+ mask = CKCTL_6328_HSSPI_EN;
+ else if (BCMCPU_IS_6362())
+ mask = CKCTL_6362_HSSPI_EN;
++ else if (BCMCPU_IS_63268())
++ mask = CKCTL_63268_HSSPI_EN;
+ else
+ return;
+
+@@ -352,6 +364,8 @@ static void pcie_set(struct clk *clk, in
+ bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+ else if (BCMCPU_IS_6362())
+ bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
++ else if (BCMCPU_IS_63268())
++ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
+ }
+
+ static struct clk clk_pcie = {
+@@ -536,6 +550,21 @@ static struct clk_lookup bcm6368_clks[]
+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
+ };
+
++static struct clk_lookup bcm63268_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
++ CLKDEV_INIT(NULL, "spi", &clk_spi),
++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
++ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
++};
++
+ #define HSSPI_PLL_HZ_6328 133333333
+ #define HSSPI_PLL_HZ_6362 400000000
+
+@@ -568,6 +597,10 @@ static int __init bcm63xx_clk_init(void)
+ case BCM6368_CPU_ID:
+ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
+ break;
++ case BCM63268_CPU_ID:
++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
++ clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks));
++ break;
+ }
+
+ return 0;
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
+
+ };
+
++static const unsigned long bcm63268_regs_base[] = {
++ __GEN_CPU_REGS_TABLE(63268)
++};
++
++static const int bcm63268_irqs[] = {
++ __GEN_CPU_IRQ_TABLE(63268)
++
++};
++
+ u32 bcm63xx_get_cpu_variant(void)
+ {
+ return bcm63xx_cpu_variant;
+@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
+
+ return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
+ }
++ case BCM63268_CPU_ID:
++ {
++ unsigned int tmp, mips_pll_fcvo;
++
++ tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++ mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
++ STRAPBUS_63268_FCVO_SHIFT;
++ switch (mips_pll_fcvo) {
++ case 0x3:
++ case 0xe:
++ return 320000000;
++ case 0xa:
++ return 333000000;
++ case 0x2:
++ case 0xb:
++ case 0xf:
++ return 400000000;
++ default:
++ return 0;
++ }
++ }
+
+ default:
+ panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
+@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
+ unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ u32 val;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+
+ if (BCMCPU_IS_6345()) {
+@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void)
+ unsigned int tmp;
+ unsigned int cpu = smp_processor_id();
+ u32 chipid_reg;
++ bool long_chipid = false;
+ u8 __maybe_unused varid = 0;
+
+ /* soc registers location depends on cpu type */
+@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void)
+ case 0x10:
+ chipid_reg = BCM_6345_PERF_BASE;
+ break;
++ case 0x80:
++ long_chipid = true;
++ /* fall-through */
+ default:
+ chipid_reg = BCM_6368_PERF_BASE;
+ break;
+@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void)
+ break;
+ }
+
++
+ /*
+ * really early to panic, but delaying panic would not help since we
+ * will never get any working console
+@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void)
+
+ /* read out CPU type */
+ tmp = bcm_readl(chipid_reg);
+- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
+- bcm63xx_cpu_variant = bcm63xx_cpu_id;
++
++ if (long_chipid) {
++ bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
++ bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
++ } else {
++ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
++ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++ }
++
+ bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
+- varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
++ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+
+ switch (bcm63xx_cpu_id) {
+ case BCM3368_CPU_ID:
+@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
+ bcm63xx_cpu_id = BCM6368_CPU_ID;
+ break;
++ case BCM63168_CPU_ID:
++ case BCM63169_CPU_ID:
++ case BCM63268_CPU_ID:
++ case BCM63269_CPU_ID:
++ bcm63xx_regs_base = bcm63268_regs_base;
++ bcm63xx_irqs = bcm63268_irqs;
++
++ bcm63xx_cpu_id = BCM63268_CPU_ID;
++ break;
+ default:
+ panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
+ break;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
+ case STRAPBUS_6368_BOOT_SEL_PARALLEL:
+ return BCM63XX_FLASH_TYPE_PARALLEL;
+ }
++ case BCM63268_CPU_ID:
++ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
++ return BCM63XX_FLASH_TYPE_SERIAL;
++ else
++ return BCM63XX_FLASH_TYPE_NAND;
+ default:
+ return -EINVAL;
+ }
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -51,7 +51,7 @@ int __init bcm63xx_spi_register(void)
+ }
+
+ if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
+- BCMCPU_IS_6368()) {
++ BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
+ bcm63xx_spi_device.name = "bcm6358-spi",
+ spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
+ }
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -149,6 +149,20 @@ void __init arch_init_irq(void)
+ ext_irqs[5] = BCM_6368_EXT_IRQ5;
+ ext_shift = 4;
+ break;
++ case BCM63268_CPU_ID:
++ periph_bases[0] += PERF_IRQMASK_63268_REG(0);
++ periph_bases[1] += PERF_IRQMASK_63268_REG(1);
++ periph_irq_count = 2;
++ periph_width = 4;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_63268_EXT_IRQ0;
++ ext_irqs[1] = BCM_63268_EXT_IRQ1;
++ ext_irqs[2] = BCM_63268_EXT_IRQ2;
++ ext_irqs[3] = BCM_63268_EXT_IRQ3;
++ ext_shift = 4;
++ break;
+ default:
+ BUG();
+ }
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -126,6 +126,20 @@
+ #define BCM6368_RESET_PCIE 0
+ #define BCM6368_RESET_PCIE_EXT 0
+
++#define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
++#define BCM63268_RESET_ENET 0
++#define BCM63268_RESET_USBH SOFTRESET_63268_USBH_MASK
++#define BCM63268_RESET_USBD SOFTRESET_63268_USBS_MASK
++#define BCM63268_RESET_DSL 0
++#define BCM63268_RESET_SAR SOFTRESET_63268_SAR_MASK
++#define BCM63268_RESET_EPHY 0
++#define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
++#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
++#define BCM63268_RESET_MPI 0
++#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
++ SOFTRESET_63268_PCIE_CORE_MASK)
++#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
++
+ /*
+ * core reset bits
+ */
+@@ -157,6 +171,10 @@ static const u32 bcm6368_reset_bits[] =
+ __GEN_RESET_BITS_TABLE(6368)
+ };
+
++static const u32 bcm63268_reset_bits[] = {
++ __GEN_RESET_BITS_TABLE(63268)
++};
++
+ const u32 *bcm63xx_reset_bits;
+ static int reset_reg;
+
+@@ -183,6 +201,9 @@ static int __init bcm63xx_reset_bits_ini
+ } else if (BCMCPU_IS_6368()) {
+ reset_reg = PERF_SOFTRESET_6368_REG;
+ bcm63xx_reset_bits = bcm6368_reset_bits;
++ } else if (BCMCPU_IS_63268()) {
++ reset_reg = PERF_SOFTRESET_63268_REG;
++ bcm63xx_reset_bits = bcm63268_reset_bits;
+ }
+
+ return 0;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -22,6 +22,10 @@
+ #define BCM6362_CPU_ID 0x6362
+ #define BCM6368_CPU_ID 0x6368
+ #define BCM6369_CPU_ID 0x6369
++#define BCM63168_CPU_ID 0x63168
++#define BCM63169_CPU_ID 0x63169
++#define BCM63268_CPU_ID 0x63268
++#define BCM63269_CPU_ID 0x63269
+
+ void __init bcm63xx_cpu_init(void);
+ u32 bcm63xx_get_cpu_variant(void);
+@@ -62,6 +66,10 @@ static inline u32 __pure __bcm63xx_get_c
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ case BCM6368_CPU_ID:
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_63268
++ case BCM63268_CPU_ID:
++#endif
+ break;
+ default:
+ unreachable();
+@@ -87,6 +95,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ #define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
+ #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
+ #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
++#define BCMCPU_IS_63268() (bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
+@@ -110,6 +119,14 @@ static inline u32 __pure bcm63xx_get_cpu
+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
+ #define BCMCPU_VARIANT_IS_6369() \
+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
++#define BCMCPU_VARIANT_IS_63168() \
++ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
++#define BCMCPU_VARIANT_IS_63169() \
++ (bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
++#define BCMCPU_VARIANT_IS_63268() \
++ (bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
++#define BCMCPU_VARIANT_IS_63269() \
++ (bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
+
+ /*
+ * While registers sets are (mostly) the same across 63xx CPU, base
+@@ -574,6 +591,52 @@ enum bcm63xx_regs_set {
+ #define BCM_6368_RNG_BASE (0xb0004180)
+ #define BCM_6368_MISC_BASE (0xdeadbeef)
+
++/*
++ * 63268 register sets base address
++ */
++#define BCM_63268_DSL_LMEM_BASE (0xdeadbeef)
++#define BCM_63268_PERF_BASE (0xb0000000)
++#define BCM_63268_TIMER_BASE (0xb0000080)
++#define BCM_63268_WDT_BASE (0xb000009c)
++#define BCM_63268_UART0_BASE (0xb0000180)
++#define BCM_63268_UART1_BASE (0xb00001a0)
++#define BCM_63268_GPIO_BASE (0xb00000c0)
++#define BCM_63268_SPI_BASE (0xb0000800)
++#define BCM_63268_HSSPI_BASE (0xb0001000)
++#define BCM_63268_UDC0_BASE (0xdeadbeef)
++#define BCM_63268_USBDMA_BASE (0xb000c800)
++#define BCM_63268_OHCI0_BASE (0xb0002600)
++#define BCM_63268_OHCI_PRIV_BASE (0xdeadbeef)
++#define BCM_63268_USBH_PRIV_BASE (0xb0002700)
++#define BCM_63268_USBD_BASE (0xb0002400)
++#define BCM_63268_MPI_BASE (0xdeadbeef)
++#define BCM_63268_PCMCIA_BASE (0xdeadbeef)
++#define BCM_63268_PCIE_BASE (0xb06e0000)
++#define BCM_63268_SDRAM_REGS_BASE (0xdeadbeef)
++#define BCM_63268_DSL_BASE (0xdeadbeef)
++#define BCM_63268_UBUS_BASE (0xdeadbeef)
++#define BCM_63268_ENET0_BASE (0xdeadbeef)
++#define BCM_63268_ENET1_BASE (0xdeadbeef)
++#define BCM_63268_ENETDMA_BASE (0xb000d800)
++#define BCM_63268_ENETDMAC_BASE (0xb000da00)
++#define BCM_63268_ENETDMAS_BASE (0xb000dc00)
++#define BCM_63268_ENETSW_BASE (0xb0700000)
++#define BCM_63268_EHCI0_BASE (0xb0002500)
++#define BCM_63268_SDRAM_BASE (0xdeadbeef)
++#define BCM_63268_MEMC_BASE (0xdeadbeef)
++#define BCM_63268_DDR_BASE (0xb0003000)
++#define BCM_63268_M2M_BASE (0xdeadbeef)
++#define BCM_63268_ATM_BASE (0xdeadbeef)
++#define BCM_63268_XTM_BASE (0xb0007000)
++#define BCM_63268_XTMDMA_BASE (0xb000b800)
++#define BCM_63268_XTMDMAC_BASE (0xdeadbeef)
++#define BCM_63268_XTMDMAS_BASE (0xdeadbeef)
++#define BCM_63268_PCM_BASE (0xb000b000)
++#define BCM_63268_PCMDMA_BASE (0xb000b800)
++#define BCM_63268_PCMDMAC_BASE (0xdeadbeef)
++#define BCM_63268_PCMDMAS_BASE (0xdeadbeef)
++#define BCM_63268_RNG_BASE (0xdeadbeef)
++#define BCM_63268_MISC_BASE (0xb0001800)
+
+ extern const unsigned long *bcm63xx_regs_base;
+
+@@ -1042,6 +1105,73 @@ enum bcm63xx_irq {
+ #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
+ #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)
+
++/*
++ * 63268 irqs
++ */
++#define BCM_63268_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
++#define BCM_63268_VERY_HIGH_IRQ_BASE (BCM_63268_HIGH_IRQ_BASE + 32)
++
++#define BCM_63268_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
++#define BCM_63268_SPI_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 16)
++#define BCM_63268_UART0_IRQ (IRQ_INTERNAL_BASE + 5)
++#define BCM_63268_UART1_IRQ (BCM_63268_HIGH_IRQ_BASE + 2)
++#define BCM_63268_DSL_IRQ (IRQ_INTERNAL_BASE + 23)
++#define BCM_63268_UDC0_IRQ 0
++#define BCM_63268_ENET0_IRQ 0
++#define BCM_63268_ENET1_IRQ 0
++#define BCM_63268_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_HSSPI_IRQ (IRQ_INTERNAL_BASE + 6)
++#define BCM_63268_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
++#define BCM_63268_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
++#define BCM_63268_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
++#define BCM_63268_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_USBD_TXDMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 4)
++#define BCM_63268_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 20)
++#define BCM_63268_USBD_TXDMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 5)
++#define BCM_63268_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 21)
++#define BCM_63268_USBD_TXDMA2_IRQ (BCM_63268_HIGH_IRQ_BASE + 6)
++#define BCM_63268_PCMCIA_IRQ 0
++#define BCM_63268_ENET0_RXDMA_IRQ 0
++#define BCM_63268_ENET0_TXDMA_IRQ 0
++#define BCM_63268_ENET1_RXDMA_IRQ 0
++#define BCM_63268_ENET1_TXDMA_IRQ 0
++#define BCM_63268_PCI_IRQ (BCM_63268_HIGH_IRQ_BASE + 8)
++#define BCM_63268_ATM_IRQ 0
++#define BCM_63268_ENETSW_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 1)
++#define BCM_63268_ENETSW_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 2)
++#define BCM_63268_ENETSW_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 3)
++#define BCM_63268_ENETSW_RXDMA3_IRQ (IRQ_INTERNAL_BASE + 4)
++#define BCM_63268_ENETSW_TXDMA0_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 0)
++#define BCM_63268_ENETSW_TXDMA1_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 1)
++#define BCM_63268_ENETSW_TXDMA2_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 2)
++#define BCM_63268_ENETSW_TXDMA3_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 3)
++#define BCM_63268_XTM_IRQ (BCM_63268_HIGH_IRQ_BASE + 17)
++#define BCM_63268_XTM_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
++
++#define BCM_63268_RING_OSC_IRQ (BCM_63268_HIGH_IRQ_BASE + 20)
++#define BCM_63268_WLAN_GPIO_IRQ (BCM_63268_HIGH_IRQ_BASE + 3)
++#define BCM_63268_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
++#define BCM_63268_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
++#define BCM_63268_NAND_IRQ (BCM_63268_HIGH_IRQ_BASE + 18)
++#define BCM_63268_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
++#define BCM_63268_DG_IRQ (IRQ_INTERNAL_BASE + 15)
++#define BCM_63268_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
++#define BCM_63268_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
++#define BCM_63268_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
++#define BCM_63268_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
++#define BCM_63268_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 22)
++#define BCM_63268_IPSEC_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 7)
++#define BCM_63268_FAP0_IRQ (IRQ_INTERNAL_BASE + 24)
++#define BCM_63268_FAP1_IRQ (IRQ_INTERNAL_BASE + 25)
++#define BCM_63268_PCM_DMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 10)
++#define BCM_63268_PCM_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 11)
++#define BCM_63268_DECT0_IRQ (BCM_63268_HIGH_IRQ_BASE + 0)
++#define BCM_63268_DECT1_IRQ (BCM_63268_HIGH_IRQ_BASE + 1)
++#define BCM_63268_EXT_IRQ0 (BCM_63268_HIGH_IRQ_BASE + 12)
++#define BCM_63268_EXT_IRQ1 (BCM_63268_HIGH_IRQ_BASE + 13)
++#define BCM_63268_EXT_IRQ2 (BCM_63268_HIGH_IRQ_BASE + 14)
++#define BCM_63268_EXT_IRQ3 (BCM_63268_HIGH_IRQ_BASE + 15)
++
+ extern const int *bcm63xx_irqs;
+
+ #define __GEN_CPU_IRQ_TABLE(__cpu) \
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -23,6 +23,8 @@ static inline unsigned long bcm63xx_gpio
+ return 48;
+ case BCM6368_CPU_ID:
+ return 38;
++ case BCM63268_CPU_ID:
++ return 52;
+ case BCM6348_CPU_ID:
+ default:
+ return 37;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -10,6 +10,8 @@
+ #define PERF_REV_REG 0x0
+ #define REV_CHIPID_SHIFT 16
+ #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
++#define REV_LONG_CHIPID_SHIFT 12
++#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
+ #define REV_VARID_SHIFT 12
+ #define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
+ #define REV_REVID_SHIFT 0
+@@ -212,6 +214,52 @@
+ CKCTL_6368_NAND_EN | \
+ CKCTL_6368_IPSEC_EN)
+
++#define CKCTL_63268_DISABLE_GLESS (1 << 0)
++#define CKCTL_63268_VDSL_QPROC_EN (1 << 1)
++#define CKCTL_63268_VDSL_AFE_EN (1 << 2)
++#define CKCTL_63268_VDSL_EN (1 << 3)
++#define CKCTL_63268_MIPS_EN (1 << 4)
++#define CKCTL_63268_WLAN_OCP_EN (1 << 5)
++#define CKCTL_63268_DECT_EN (1 << 6)
++#define CKCTL_63268_FAP0_EN (1 << 7)
++#define CKCTL_63268_FAP1_EN (1 << 8)
++#define CKCTL_63268_SAR_EN (1 << 9)
++#define CKCTL_63268_ROBOSW_EN (1 << 10)
++#define CKCTL_63268_PCM_EN (1 << 11)
++#define CKCTL_63268_USBD_EN (1 << 12)
++#define CKCTL_63268_USBH_EN (1 << 13)
++#define CKCTL_63268_IPSEC_EN (1 << 14)
++#define CKCTL_63268_SPI_EN (1 << 15)
++#define CKCTL_63268_HSSPI_EN (1 << 16)
++#define CKCTL_63268_PCIE_EN (1 << 17)
++#define CKCTL_63268_PHYMIPS_EN (1 << 18)
++#define CKCTL_63268_GMAC_EN (1 << 19)
++#define CKCTL_63268_NAND_EN (1 << 20)
++#define CKCTL_63268_TBUS_EN (1 << 27)
++#define CKCTL_63268_ROBOSW250_EN (1 << 31)
++
++#define CKCTL_63268_ALL_SAFE_EN (CKCTL_63268_VDSL_QPROC_EN | \
++ CKCTL_63268_VDSL_AFE_EN | \
++ CKCTL_63268_VDSL_EN | \
++ CKCTL_63268_WLAN_OCP_EN | \
++ CKCTL_63268_DECT_EN | \
++ CKCTL_63268_FAP0_EN | \
++ CKCTL_63268_FAP1_EN | \
++ CKCTL_63268_SAR_EN | \
++ CKCTL_63268_ROBOSW_EN | \
++ CKCTL_63268_PCM_EN | \
++ CKCTL_63268_USBD_EN | \
++ CKCTL_63268_USBH_EN | \
++ CKCTL_63268_IPSEC_EN | \
++ CKCTL_63268_SPI_EN | \
++ CKCTL_63268_HSSPI_EN | \
++ CKCTL_63268_PCIE_EN | \
++ CKCTL_63268_PHYMIPS_EN | \
++ CKCTL_63268_GMAC_EN | \
++ CKCTL_63268_NAND_EN | \
++ CKCTL_63268_TBUS_EN | \
++ CKCTL_63268_ROBOSW250_EN)
++
+ /* System PLL Control register */
+ #define PERF_SYS_PLL_CTL_REG 0x8
+ #define SYS_PLL_SOFT_RESET 0x1
+@@ -225,6 +273,7 @@
+ #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c)
+ #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10)
++#define PERF_IRQMASK_63268_REG(x) (0x20 + (x) * 0x20)
+
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG 0x10
+@@ -235,6 +284,7 @@
+ #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c)
+ #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10)
++#define PERF_IRQSTAT_63268_REG(x) (0x30 + (x) * 0x20)
+
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368 0x14
+@@ -245,6 +295,7 @@
+ #define PERF_EXTIRQ_CFG_REG_6358 0x14
+ #define PERF_EXTIRQ_CFG_REG_6362 0x18
+ #define PERF_EXTIRQ_CFG_REG_6368 0x18
++#define PERF_EXTIRQ_CFG_REG_63268 0x18
+
+ #define PERF_EXTIRQ_CFG_REG2_6358 0x1c
+ #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
+@@ -275,6 +326,7 @@
+ #define PERF_SOFTRESET_6358_REG 0x34
+ #define PERF_SOFTRESET_6362_REG 0x10
+ #define PERF_SOFTRESET_6368_REG 0x10
++#define PERF_SOFTRESET_63268_REG 0x10
+
+ #define SOFTRESET_3368_SPI_MASK (1 << 0)
+ #define SOFTRESET_3368_ENET_MASK (1 << 2)
+@@ -368,6 +420,26 @@
+ #define SOFTRESET_6368_USBH_MASK (1 << 12)
+ #define SOFTRESET_6368_PCM_MASK (1 << 13)
+
++#define SOFTRESET_63268_SPI_MASK (1 << 0)
++#define SOFTRESET_63268_IPSEC_MASK (1 << 1)
++#define SOFTRESET_63268_EPHY_MASK (1 << 2)
++#define SOFTRESET_63268_SAR_MASK (1 << 3)
++#define SOFTRESET_63268_ENETSW_MASK (1 << 4)
++#define SOFTRESET_63268_USBS_MASK (1 << 5)
++#define SOFTRESET_63268_USBH_MASK (1 << 6)
++#define SOFTRESET_63268_PCM_MASK (1 << 7)
++#define SOFTRESET_63268_PCIE_CORE_MASK (1 << 8)
++#define SOFTRESET_63268_PCIE_MASK (1 << 9)
++#define SOFTRESET_63268_PCIE_EXT_MASK (1 << 10)
++#define SOFTRESET_63268_WLAN_SHIM_MASK (1 << 11)
++#define SOFTRESET_63268_DDR_PHY_MASK (1 << 12)
++#define SOFTRESET_63268_FAP0_MASK (1 << 13)
++#define SOFTRESET_63268_WLAN_UBUS_MASK (1 << 14)
++#define SOFTRESET_63268_DECT_MASK (1 << 15)
++#define SOFTRESET_63268_FAP1_MASK (1 << 16)
++#define SOFTRESET_63268_PCIE_HARD_MASK (1 << 17)
++#define SOFTRESET_63268_GPHY_MASK (1 << 18)
++
+ /* MIPS PLL control register */
+ #define PERF_MIPSPLLCTL_REG 0x34
+ #define MIPSPLLCTL_N1_SHIFT 20
+@@ -1367,6 +1439,13 @@
+ #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
+ #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)
+
++#define MISC_STRAPBUS_63268_REG 0x14
++#define STRAPBUS_63268_HSSPI_CLK_FAST (1 << 9)
++#define STRAPBUS_63268_BOOT_SEL_SERIAL (1 << 11)
++#define STRAPBUS_63268_BOOT_SEL_NAND (0 << 11)
++#define STRAPBUS_63268_FCVO_SHIFT 21
++#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
++
+ #define MISC_STRAPBUS_6328_REG 0x240
+ #define STRAPBUS_6328_FCVO_SHIFT 7
+ #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -26,6 +26,7 @@ static inline int is_bcm63xx_internal_re
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
+ case BCM6368_CPU_ID:
++ case BCM63268_CPU_ID:
+ if (offset >= 0xb0000000 && offset < 0xb1000000)
+ return 1;
+ break;
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
+
+ int __init bcm63xx_hsspi_register(void)
+ {
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -184,7 +184,8 @@ static int __init register_shared(void)
+ else
+ shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
++ BCMCPU_IS_63268())
+ chan_count = 32;
+ else if (BCMCPU_IS_6345())
+ chan_count = 8;
+@@ -292,7 +293,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ int ret;
+
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
++ !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ ret = register_shared();
+@@ -313,6 +315,8 @@ bcm63xx_enetsw_register(const struct bcm
+ enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ enetsw_pd.num_ports = ENETSW_PORTS_6368;
++ else if (BCMCPU_IS_63268())
++ enetsw_pd.num_ports = ENETSW_PORTS_63268;
+
+ enetsw_pd.dma_has_sram = true;
+ enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
+@@ -67,6 +67,7 @@ struct bcm63xx_enet_platform_data {
+ #define ENETSW_MAX_PORT 8
+ #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
+ #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
++#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
+
+ #define ENETSW_RGMII_PORT0 4
+
--- /dev/null
+From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 03:22:40 +0100
+Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
+
+---
+ arch/mips/bcm63xx/reset.c | 3 ++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
+ arch/mips/pci/pci-bcm63xx.c | 4 ++++
+ 3 files changed, 11 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -137,7 +137,8 @@
+ #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI 0
+ #define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
+- SOFTRESET_63268_PCIE_CORE_MASK)
++ SOFTRESET_63268_PCIE_CORE_MASK | \
++ SOFTRESET_63268_PCIE_HARD_MASK)
+ #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
+
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -46,6 +46,11 @@
+ #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
+ BCM_PCIE_MEM_SIZE_6328 - 1)
+
++#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000
++#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \
++ BCM_PCIE_MEM_SIZE_63268 - 1)
++
+ /*
+ * Internal registers are accessed through KSEG3
+ */
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
++ } else if (BCMCPU_IS_63268()) {
++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
+ }
+
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
++ case BCM63268_CPU_ID:
+ return bcm63xx_register_pcie();
+ case BCM3368_CPU_ID:
+ case BCM6348_CPU_ID:
--- /dev/null
+From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 01:24:09 +0100
+Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
+
+---
+ arch/mips/bcm63xx/Kconfig | 5 +
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/clk.c | 8 +-
+ arch/mips/bcm63xx/cpu.c | 53 +++++++++++
+ arch/mips/bcm63xx/dev-flash.c | 3 +
+ arch/mips/bcm63xx/dev-spi.c | 2 +-
+ arch/mips/bcm63xx/irq.c | 10 ++
+ arch/mips/bcm63xx/prom.c | 2 +-
+ arch/mips/bcm63xx/reset.c | 24 +++++
+ arch/mips/bcm63xx/setup.c | 5 +-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 107 ++++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 75 ++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
+ 13 files changed, 291 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -19,6 +19,11 @@ config BCM63XX_EHCI
+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
+
++config BCM63XX_CPU_6318
++ bool "support 6318 CPU"
++ select SYS_HAS_CPU_BMIPS32_3300
++ select HW_HAS_PCI
++
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -697,7 +697,7 @@ void __init board_prom_init(void)
+ /* read base address of boot chip select (0)
+ * 6328/6362 do not have MPI but boot from a fixed address
+ */
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
+ val = 0x18000000;
+ } else {
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -289,7 +289,9 @@ static void hsspi_set(struct clk *clk, i
+ {
+ u32 mask;
+
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318())
++ mask = CKCTL_6318_HSSPI_EN;
++ else if (BCMCPU_IS_6328())
+ mask = CKCTL_6328_HSSPI_EN;
+ else if (BCMCPU_IS_6362())
+ mask = CKCTL_6362_HSSPI_EN;
+@@ -444,6 +446,19 @@ static struct clk_lookup bcm3368_clks[]
+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
+ };
+
++static struct clk_lookup bcm6318_clks[] = {
++ /* fixed rate clocks */
++ CLKDEV_INIT(NULL, "periph", &clk_periph),
++ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ /* gated clocks */
++ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
++ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
++ CLKDEV_INIT(NULL, "usbd", &clk_usbh),
++ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
++ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
++};
++
+ static struct clk_lookup bcm6328_clks[] = {
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+@@ -565,6 +580,7 @@ static struct clk_lookup bcm63268_clks[]
+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
+ };
+
++#define HSSPI_PLL_HZ_6318 250000000
+ #define HSSPI_PLL_HZ_6328 133333333
+ #define HSSPI_PLL_HZ_6362 400000000
+
+@@ -574,6 +590,10 @@ static int __init bcm63xx_clk_init(void)
+ case BCM3368_CPU_ID:
+ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
+ break;
++ case BCM6318_CPU_ID:
++ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318;
++ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks));
++ break;
+ case BCM6328_CPU_ID:
+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
+ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
+--- a/arch/mips/bcm63xx/cpu.c
++++ b/arch/mips/bcm63xx/cpu.c
+@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {
+ __GEN_CPU_IRQ_TABLE(3368)
+ };
+
++static const unsigned long bcm6318_regs_base[] = {
++ __GEN_CPU_REGS_TABLE(6318)
++};
++
++static const int bcm6318_irqs[] = {
++ __GEN_CPU_IRQ_TABLE(6318)
++};
++
+ static const unsigned long bcm6328_regs_base[] = {
+ __GEN_CPU_REGS_TABLE(6328)
+ };
+@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
+ return bcm63xx_memory_size;
+ }
+
++#define STRAP_OVERRIDE_BUS_REG 0x0
++#define OVERRIDE_BUS_MIPS_FREQ_SHIFT 23
++#define OVERRIDE_BUS_MIPS_FREQ_MASK (0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT)
++
+ static unsigned int detect_cpu_clock(void)
+ {
+ u32 cpu_id = bcm63xx_get_cpu_id();
+@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
+ case BCM3368_CPU_ID:
+ return 300000000;
+
++ case BCM6318_CPU_ID:
++ {
++ unsigned int tmp, mips_pll_fcvo;
++
++ tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG);
++
++ pr_info("strap_override_bus = %08x\n", tmp);
++
++ mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK)
++ >> OVERRIDE_BUS_MIPS_FREQ_SHIFT;
++
++ switch (mips_pll_fcvo) {
++ case 0:
++ return 166000000;
++ case 1:
++ return 400000000;
++ case 2:
++ return 250000000;
++ case 3:
++ return 333000000;
++ };
++ }
+ case BCM6328_CPU_ID:
+ {
+ unsigned int tmp, mips_pll_fcvo;
+@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
+ unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
+ u32 val;
+
++ if (BCMCPU_IS_6318()) {
++ val = bcm_sdram_readl(SDRAM_CFG_REG);
++ val = val & SDRAM_CFG_6318_SPACE_MASK;
++ val >>= SDRAM_CFG_6318_SPACE_SHIFT;
++ return 1 << (val + 20);
++ }
++
+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
+ return bcm_ddr_readl(DDR_CSEND_REG) << 24;
+
+@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void)
+
+ switch (current_cpu_type()) {
+ case CPU_BMIPS3300:
++ if ((read_c0_prid() & 0xff) >= 0x33) {
++ /* BCM6318 */
++ chipid_reg = BCM_6368_PERF_BASE;
++ break;
++ }
++
+ if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
+ __cpu_name[cpu] = "Broadcom BCM6338";
+ /* fall-through */
+@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void)
+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
+
+ switch (bcm63xx_cpu_id) {
++ case BCM6318_CPU_ID:
++ bcm63xx_regs_base = bcm6318_regs_base;
++ bcm63xx_irqs = bcm6318_irqs;
++ break;
+ case BCM3368_CPU_ID:
+ bcm63xx_regs_base = bcm3368_regs_base;
+ bcm63xx_irqs = bcm3368_irqs;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t
+ u32 val;
+
+ switch (bcm63xx_get_cpu_id()) {
++ case BCM6318_CPU_ID:
++ /* only support serial flash */
++ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6328_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
+ if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ b/arch/mips/bcm63xx/dev-spi.c
+@@ -38,7 +38,7 @@ static struct platform_device bcm63xx_sp
+
+ int __init bcm63xx_spi_register(void)
+ {
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
+ return -ENODEV;
+
+ spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -48,6 +48,19 @@ void __init arch_init_irq(void)
+ ext_irqs[3] = BCM_3368_EXT_IRQ3;
+ ext_shift = 4;
+ break;
++ case BCM6318_CPU_ID:
++ periph_bases[0] += PERF_IRQMASK_6318_REG;
++ periph_irq_count = 1;
++ periph_width = 4;
++
++ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318;
++ ext_irq_count = 4;
++ ext_irqs[0] = BCM_6318_EXT_IRQ0;
++ ext_irqs[1] = BCM_6318_EXT_IRQ0;
++ ext_irqs[2] = BCM_6318_EXT_IRQ0;
++ ext_irqs[3] = BCM_6318_EXT_IRQ0;
++ ext_shift = 4;
++ break;
+ case BCM6328_CPU_ID:
+ periph_bases[0] += PERF_IRQMASK_6328_REG(0);
+ periph_bases[1] += PERF_IRQMASK_6328_REG(1);
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -68,7 +68,7 @@ void __init prom_init(void)
+
+ if (reg & OTP_6328_REG3_TP1_DISABLED)
+ bmips_smp_enabled = 0;
+- } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
++ } else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
+ bmips_smp_enabled = 0;
+ }
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -44,6 +44,23 @@
+ #define BCM3368_RESET_PCIE 0
+ #define BCM3368_RESET_PCIE_EXT 0
+
++
++#define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
++#define BCM6318_RESET_ENET 0
++#define BCM6318_RESET_USBH SOFTRESET_6318_USBH_MASK
++#define BCM6318_RESET_USBD SOFTRESET_6318_USBS_MASK
++#define BCM6318_RESET_DSL 0
++#define BCM6318_RESET_SAR SOFTRESET_6318_SAR_MASK
++#define BCM6318_RESET_EPHY SOFTRESET_6318_EPHY_MASK
++#define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
++#define BCM6318_RESET_PCM 0
++#define BCM6318_RESET_MPI 0
++#define BCM6318_RESET_PCIE \
++ (SOFTRESET_6318_PCIE_MASK | \
++ SOFTRESET_6318_PCIE_CORE_MASK | \
++ SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
++
+ #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET 0
+ #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK
+@@ -148,6 +165,10 @@ static const u32 bcm3368_reset_bits[] =
+ __GEN_RESET_BITS_TABLE(3368)
+ };
+
++static const u32 bcm6318_reset_bits[] = {
++ __GEN_RESET_BITS_TABLE(6318)
++};
++
+ static const u32 bcm6328_reset_bits[] = {
+ __GEN_RESET_BITS_TABLE(6328)
+ };
+@@ -184,6 +205,9 @@ static int __init bcm63xx_reset_bits_ini
+ if (BCMCPU_IS_3368()) {
+ reset_reg = PERF_SOFTRESET_6358_REG;
+ bcm63xx_reset_bits = bcm3368_reset_bits;
++ } else if (BCMCPU_IS_6318()) {
++ reset_reg = PERF_SOFTRESET_6318_REG;
++ bcm63xx_reset_bits = bcm6318_reset_bits;
+ } else if (BCMCPU_IS_6328()) {
+ reset_reg = PERF_SOFTRESET_6328_REG;
+ bcm63xx_reset_bits = bcm6328_reset_bits;
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void)
+ case BCM3368_CPU_ID:
+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
+ break;
++ case BCM6318_CPU_ID:
++ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318;
++ break;
+ case BCM6328_CPU_ID:
+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
+ break;
+@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void)
+ bcm6348_a1_reboot();
+
+ pr_info("triggering watchdog soft-reset...\n");
+- if (BCMCPU_IS_6328()) {
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) {
+ bcm_wdt_writel(1, WDT_SOFTRESET_REG);
+ } else {
+ reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
+@@ -11,6 +11,7 @@
+ * arm mach-types)
+ */
+ #define BCM3368_CPU_ID 0x3368
++#define BCM6318_CPU_ID 0x6318
+ #define BCM6328_CPU_ID 0x6328
+ #define BCM63281_CPU_ID 0x63281
+ #define BCM63283_CPU_ID 0x63283
+@@ -39,6 +40,10 @@ static inline u32 __pure __bcm63xx_get_c
+ case BCM3368_CPU_ID:
+ #endif
+
++#ifdef CONFIG_BCM63XX_CPU_6318
++ case BCM6318_CPU_ID:
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ case BCM6328_CPU_ID:
+ #endif
+@@ -88,6 +93,7 @@ static inline u32 __pure bcm63xx_get_cpu
+ }
+
+ #define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
++#define BCMCPU_IS_6318() (bcm63xx_get_cpu_id() == BCM6318_CPU_ID)
+ #define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
+ #define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
+ #define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
+@@ -99,6 +105,8 @@ static inline u32 __pure bcm63xx_get_cpu
+
+ #define BCMCPU_VARIANT_IS_3368() \
+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
++#define BCMCPU_VARIANT_IS_6318() \
++ (bcm63xx_get_cpu_variant() == BCM6318_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63281() \
+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
+ #define BCMCPU_VARIANT_IS_63283() \
+@@ -253,6 +261,56 @@ enum bcm63xx_regs_set {
+ #define BCM_3368_MISC_BASE (0xdeadbeef)
+
+ /*
++ * 6318 register sets base address
++ */
++#define BCM_6318_DSL_LMEM_BASE (0xdeadbeef)
++#define BCM_6318_PERF_BASE (0xb0000000)
++#define BCM_6318_TIMER_BASE (0xb0000040)
++#define BCM_6318_WDT_BASE (0xb0000068)
++#define BCM_6318_UART0_BASE (0xb0000100)
++#define BCM_6318_UART1_BASE (0xdeadbeef)
++#define BCM_6318_GPIO_BASE (0xb0000080)
++#define BCM_6318_SPI_BASE (0xdeadbeef)
++#define BCM_6318_HSSPI_BASE (0xb0003000)
++#define BCM_6318_UDC0_BASE (0xdeadbeef)
++#define BCM_6318_USBDMA_BASE (0xb0006800)
++#define BCM_6318_OHCI0_BASE (0xb0005100)
++#define BCM_6318_OHCI_PRIV_BASE (0xdeadbeef)
++#define BCM_6318_USBH_PRIV_BASE (0xb0005200)
++#define BCM_6318_USBD_BASE (0xb0006000)
++#define BCM_6318_MPI_BASE (0xdeadbeef)
++#define BCM_6318_PCMCIA_BASE (0xdeadbeef)
++#define BCM_6318_PCIE_BASE (0xb0010000)
++#define BCM_6318_SDRAM_REGS_BASE (0xdeadbeef)
++#define BCM_6318_DSL_BASE (0xdeadbeef)
++#define BCM_6318_UBUS_BASE (0xdeadbeef)
++#define BCM_6318_ENET0_BASE (0xdeadbeef)
++#define BCM_6318_ENET1_BASE (0xdeadbeef)
++#define BCM_6318_ENETDMA_BASE (0xb0088000)
++#define BCM_6318_ENETDMAC_BASE (0xb0088200)
++#define BCM_6318_ENETDMAS_BASE (0xb0088400)
++#define BCM_6318_ENETSW_BASE (0xb0080000)
++#define BCM_6318_EHCI0_BASE (0xb0005000)
++#define BCM_6318_SDRAM_BASE (0xb0004000)
++#define BCM_6318_MEMC_BASE (0xdeadbeef)
++#define BCM_6318_DDR_BASE (0xdeadbeef)
++#define BCM_6318_M2M_BASE (0xdeadbeef)
++#define BCM_6318_ATM_BASE (0xdeadbeef)
++#define BCM_6318_XTM_BASE (0xdeadbeef)
++#define BCM_6318_XTMDMA_BASE (0xb000c000)
++#define BCM_6318_XTMDMAC_BASE (0xdeadbeef)
++#define BCM_6318_XTMDMAS_BASE (0xdeadbeef)
++#define BCM_6318_PCM_BASE (0xdeadbeef)
++#define BCM_6318_PCMDMA_BASE (0xdeadbeef)
++#define BCM_6318_PCMDMAC_BASE (0xdeadbeef)
++#define BCM_6318_PCMDMAS_BASE (0xdeadbeef)
++#define BCM_6318_RNG_BASE (0xdeadbeef)
++#define BCM_6318_MISC_BASE (0xb0000280)
++#define BCM_6318_OTP_BASE (0xdeadbeef)
++
++#define BCM_6318_STRAP_BASE (0xb0000900)
++
++/*
+ * 6328 register sets base address
+ */
+ #define BCM_6328_DSL_LMEM_BASE (0xdeadbeef)
+@@ -775,6 +833,55 @@ enum bcm63xx_irq {
+ #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
+ #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
+
++/*
++ * 6318 irqs
++ */
++#define BCM_6318_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
++#define BCM_6318_VERY_HIGH_IRQ_BASE (BCM_6318_HIGH_IRQ_BASE + 32)
++
++#define BCM_6318_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
++#define BCM_6318_SPI_IRQ 0
++#define BCM_6318_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
++#define BCM_6318_UART1_IRQ 0
++#define BCM_6318_DSL_IRQ (IRQ_INTERNAL_BASE + 21)
++#define BCM_6318_UDC0_IRQ 0
++#define BCM_6318_ENET0_IRQ 0
++#define BCM_6318_ENET1_IRQ 0
++#define BCM_6318_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
++#define BCM_6318_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
++#define BCM_6318_OHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 9)
++#define BCM_6318_EHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 10)
++#define BCM_6318_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
++#define BCM_6318_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
++#define BCM_6318_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
++#define BCM_6318_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
++#define BCM_6318_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
++#define BCM_6318_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
++#define BCM_6318_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
++#define BCM_6318_PCMCIA_IRQ 0
++#define BCM_6318_ENET0_RXDMA_IRQ 0
++#define BCM_6318_ENET0_TXDMA_IRQ 0
++#define BCM_6318_ENET1_RXDMA_IRQ 0
++#define BCM_6318_ENET1_TXDMA_IRQ 0
++#define BCM_6318_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
++#define BCM_6318_ATM_IRQ 0
++#define BCM_6318_ENETSW_RXDMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 0)
++#define BCM_6318_ENETSW_RXDMA1_IRQ (BCM_6318_HIGH_IRQ_BASE + 1)
++#define BCM_6318_ENETSW_RXDMA2_IRQ (BCM_6318_HIGH_IRQ_BASE + 2)
++#define BCM_6318_ENETSW_RXDMA3_IRQ (BCM_6318_HIGH_IRQ_BASE + 3)
++#define BCM_6318_ENETSW_TXDMA0_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 10)
++#define BCM_6318_ENETSW_TXDMA1_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 11)
++#define BCM_6318_ENETSW_TXDMA2_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 12)
++#define BCM_6318_ENETSW_TXDMA3_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 13)
++#define BCM_6318_XTM_IRQ (BCM_6318_HIGH_IRQ_BASE + 31)
++#define BCM_6318_XTM_DMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 11)
++
++#define BCM_6318_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
++#define BCM_6318_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
++#define BCM_6318_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
++#define BCM_6318_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
++#define BCM_6318_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
++#define BCM_6318_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
+
+ /*
+ * 6328 irqs
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -53,6 +53,39 @@
+ CKCTL_3368_EMUSB_EN | \
+ CKCTL_3368_USBU_EN)
+
++#define CKCTL_6318_ADSL_ASB_EN (1 << 0)
++#define CKCTL_6318_USB_ASB_EN (1 << 1)
++#define CKCTL_6318_MIPS_ASB_EN (1 << 2)
++#define CKCTL_6318_PCIE_ASB_EN (1 << 3)
++#define CKCTL_6318_PHYMIPS_ASB_EN (1 << 4)
++#define CKCTL_6318_ROBOSW_ASB_EN (1 << 5)
++#define CKCTL_6318_SAR_ASB_EN (1 << 6)
++#define CKCTL_6318_SDR_ASB_EN (1 << 7)
++#define CKCTL_6318_SWREG_ASB_EN (1 << 8)
++#define CKCTL_6318_PERIPH_ASB_EN (1 << 9)
++#define CKCTL_6318_CPUBUS160_EN (1 << 10)
++#define CKCTL_6318_ADSL_EN (1 << 11)
++#define CKCTL_6318_SAR125_EN (1 << 12)
++#define CKCTL_6318_MIPS_EN (1 << 13)
++#define CKCTL_6318_PCIE_EN (1 << 14)
++#define CKCTL_6318_ROBOSW250_EN (1 << 16)
++#define CKCTL_6318_ROBOSW025_EN (1 << 17)
++#define CKCTL_6318_SDR_EN (1 << 19)
++#define CKCTL_6318_USB_EN (1 << 20) /* both device and host */
++#define CKCTL_6318_HSSPI_EN (1 << 25)
++#define CKCTL_6318_PCIE25_EN (1 << 27)
++#define CKCTL_6318_PHYMIPS_EN (1 << 28)
++#define CKCTL_6318_ADSL_AFE_EN (1 << 29)
++#define CKCTL_6318_ADSL_QPROC_EN (1 << 30)
++
++#define CKCTL_6318_ALL_SAFE_EN (CKCTL_6318_PHYMIPS_EN | \
++ CKCTL_6318_ADSL_QPROC_EN | \
++ CKCTL_6318_ADSL_AFE_EN | \
++ CKCTL_6318_ADSL_EN | \
++ CKCTL_6318_SAR_EN | \
++ CKCTL_6318_USB_EN | \
++ CKCTL_6318_PCIE_EN)
++
+ #define CKCTL_6328_PHYMIPS_EN (1 << 0)
+ #define CKCTL_6328_ADSL_QPROC_EN (1 << 1)
+ #define CKCTL_6328_ADSL_AFE_EN (1 << 2)
+@@ -260,12 +293,27 @@
+ CKCTL_63268_TBUS_EN | \
+ CKCTL_63268_ROBOSW250_EN)
+
++/* UBUS Clock Control register */
++#define PERF_UB_CKCTL_REG 0x10
++
++#define UB_CKCTL_6318_ADSL_EN (1 << 0)
++#define UB_CKCTL_6318_ARB_EN (1 << 1)
++#define UB_CKCTL_6318_MIPS_EN (1 << 2)
++#define UB_CKCTL_6318_PCIE_EN (1 << 3)
++#define UB_CKCTL_6318_PERIPH_EN (1 << 4)
++#define UB_CKCTL_6318_PHYMIPS_EN (1 << 5)
++#define UB_CKCTL_6318_ROBOSW_EN (1 << 6)
++#define UB_CKCTL_6318_SAR_EN (1 << 7)
++#define UB_CKCTL_6318_SDR_EN (1 << 8)
++#define UB_CKCTL_6318_USB_EN (1 << 9)
++
+ /* System PLL Control register */
+ #define PERF_SYS_PLL_CTL_REG 0x8
+ #define SYS_PLL_SOFT_RESET 0x1
+
+ /* Interrupt Mask register */
+ #define PERF_IRQMASK_3368_REG 0xc
++#define PERF_IRQMASK_6318_REG 0x20
+ #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10)
+ #define PERF_IRQMASK_6338_REG 0xc
+ #define PERF_IRQMASK_6345_REG 0xc
+@@ -277,6 +325,7 @@
+
+ /* Interrupt Status register */
+ #define PERF_IRQSTAT_3368_REG 0x10
++#define PERF_IRQSTAT_6318_REG 0x30
+ #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10)
+ #define PERF_IRQSTAT_6338_REG 0x10
+ #define PERF_IRQSTAT_6345_REG 0x10
+@@ -288,6 +337,7 @@
+
+ /* External Interrupt Configuration register */
+ #define PERF_EXTIRQ_CFG_REG_3368 0x14
++#define PERF_EXTIRQ_CFG_REG_6318 0x18
+ #define PERF_EXTIRQ_CFG_REG_6328 0x18
+ #define PERF_EXTIRQ_CFG_REG_6338 0x14
+ #define PERF_EXTIRQ_CFG_REG_6345 0x14
+@@ -322,6 +372,7 @@
+
+ /* Soft Reset register */
+ #define PERF_SOFTRESET_REG 0x28
++#define PERF_SOFTRESET_6318_REG 0x10
+ #define PERF_SOFTRESET_6328_REG 0x10
+ #define PERF_SOFTRESET_6358_REG 0x34
+ #define PERF_SOFTRESET_6362_REG 0x10
+@@ -335,6 +386,18 @@
+ #define SOFTRESET_3368_USBS_MASK (1 << 11)
+ #define SOFTRESET_3368_PCM_MASK (1 << 13)
+
++#define SOFTRESET_6318_SPI_MASK (1 << 0)
++#define SOFTRESET_6318_EPHY_MASK (1 << 1)
++#define SOFTRESET_6318_SAR_MASK (1 << 2)
++#define SOFTRESET_6318_ENETSW_MASK (1 << 3)
++#define SOFTRESET_6318_USBS_MASK (1 << 4)
++#define SOFTRESET_6318_USBH_MASK (1 << 5)
++#define SOFTRESET_6318_PCIE_CORE_MASK (1 << 6)
++#define SOFTRESET_6318_PCIE_MASK (1 << 7)
++#define SOFTRESET_6318_PCIE_EXT_MASK (1 << 8)
++#define SOFTRESET_6318_PCIE_HARD_MASK (1 << 9)
++#define SOFTRESET_6318_ADSL_MASK (1 << 10)
++
+ #define SOFTRESET_6328_SPI_MASK (1 << 0)
+ #define SOFTRESET_6328_EPHY_MASK (1 << 1)
+ #define SOFTRESET_6328_SAR_MASK (1 << 2)
+@@ -506,8 +569,17 @@
+ #define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9)
+ #define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10)
+
++#define TIMER_IRQMASK_6318_REG 0x0
++#define TIMER_IRQSTAT_6318_REG 0x4
++#define IRQSTATMASK_TIMER0 (1 << 0)
++#define IRQSTATMASK_TIMER1 (1 << 1)
++#define IRQSTATMASK_TIMER2 (1 << 2)
++#define IRQSTATMASK_TIMER3 (1 << 3)
++#define IRQSTATMASK_WDT (1 << 4)
++
+ /* Timer control register */
+ #define TIMER_CTLx_REG(x) (0x4 + (x * 4))
++#define TIMER_CTRx_6318_REG(x) (0x8 + (x * 4))
+ #define TIMER_CTL0_REG 0x4
+ #define TIMER_CTL1_REG 0x8
+ #define TIMER_CTL2_REG 0xC
+@@ -1254,6 +1326,8 @@
+ #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT)
+ #define SDRAM_CFG_BANK_SHIFT 13
+ #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
++#define SDRAM_CFG_6318_SPACE_SHIFT 4
++#define SDRAM_CFG_6318_SPACE_MASK (0xf << SDRAM_CFG_6318_SPACE_SHIFT)
+
+ #define SDRAM_MBASE_REG 0xc
+
+--- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
++++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
+@@ -23,6 +23,7 @@ static inline int is_bcm63xx_internal_re
+ if (offset >= 0xfff00000)
+ return 1;
+ break;
++ case BCM6318_CPU_ID:
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
+ case BCM6368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ b/arch/mips/bcm63xx/dev-hsspi.c
+@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs
+
+ int __init bcm63xx_hsspi_register(void)
+ {
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++ !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+--- a/arch/mips/bcm63xx/dev-usb-usbd.c
++++ b/arch/mips/bcm63xx/dev-usb-usbd.c
+@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s
+ IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
+ int i;
+
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368())
+ return 0;
+
+ usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
+--- a/arch/mips/bcm63xx/dev-enet.c
++++ b/arch/mips/bcm63xx/dev-enet.c
+@@ -184,8 +184,8 @@ static int __init register_shared(void)
+ else
+ shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
+- BCMCPU_IS_63268())
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++ BCMCPU_IS_6368() || BCMCPU_IS_63268())
+ chan_count = 32;
+ else if (BCMCPU_IS_6345())
+ chan_count = 8;
+@@ -293,8 +293,8 @@ bcm63xx_enetsw_register(const struct bcm
+ {
+ int ret;
+
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
+- !BCMCPU_IS_63268())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
++ !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ return -ENODEV;
+
+ ret = register_shared();
+@@ -311,7 +311,7 @@ bcm63xx_enetsw_register(const struct bcm
+
+ memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
+
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318() || BCMCPU_IS_6328())
+ enetsw_pd.num_ports = ENETSW_PORTS_6328;
+ else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
+ enetsw_pd.num_ports = ENETSW_PORTS_6368;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -10,6 +10,8 @@ int __init bcm63xx_gpio_init(void);
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+ switch (bcm63xx_get_cpu_id()) {
++ case BCM6318_CPU_ID:
++ return 50;
+ case BCM6328_CPU_ID:
+ return 32;
+ case BCM3368_CPU_ID:
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh
+
+ int __init bcm63xx_ehci_register(void)
+ {
+- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
+ return 0;
+
+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
--- /dev/null
+From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 8 Dec 2013 14:17:50 +0100
+Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals
+
+---
+ arch/mips/bcm63xx/reset.c | 39 ++++++++++++++--------
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++
+ arch/mips/pci/pci-bcm63xx.c | 7 ++++
+ 3 files changed, 34 insertions(+), 14 deletions(-)
+
+--- a/arch/mips/bcm63xx/reset.c
++++ b/arch/mips/bcm63xx/reset.c
+@@ -29,7 +29,9 @@
+ [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \
+ [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \
+ [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \
+- [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT,
++ [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \
++ [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \
++ [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD,
+
+ #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK
+ #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK
+@@ -43,6 +45,8 @@
+ #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK
+ #define BCM3368_RESET_PCIE 0
+ #define BCM3368_RESET_PCIE_EXT 0
++#define BCM3368_RESET_PCIE_CORE 0
++#define BCM3368_RESET_PCIE_HARD 0
+
+
+ #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
+@@ -55,11 +59,10 @@
+ #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
+ #define BCM6318_RESET_PCM 0
+ #define BCM6318_RESET_MPI 0
+-#define BCM6318_RESET_PCIE \
+- (SOFTRESET_6318_PCIE_MASK | \
+- SOFTRESET_6318_PCIE_CORE_MASK | \
+- SOFTRESET_6318_PCIE_HARD_MASK)
++#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK
+ #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
++#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK
++#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK
+
+ #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
+ #define BCM6328_RESET_ENET 0
+@@ -71,11 +74,10 @@
+ #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK
+ #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK
+ #define BCM6328_RESET_MPI 0
+-#define BCM6328_RESET_PCIE \
+- (SOFTRESET_6328_PCIE_MASK | \
+- SOFTRESET_6328_PCIE_CORE_MASK | \
+- SOFTRESET_6328_PCIE_HARD_MASK)
++#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK
+ #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK
++#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK
++#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK
+
+ #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK
+ #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK
+@@ -89,6 +91,8 @@
+ #define BCM6338_RESET_MPI 0
+ #define BCM6338_RESET_PCIE 0
+ #define BCM6338_RESET_PCIE_EXT 0
++#define BCM6338_RESET_PCIE_CORE 0
++#define BCM6338_RESET_PCIE_HARD 0
+
+ #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK
+ #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK
+@@ -102,6 +106,8 @@
+ #define BCM6348_RESET_MPI 0
+ #define BCM6348_RESET_PCIE 0
+ #define BCM6348_RESET_PCIE_EXT 0
++#define BCM6348_RESET_PCIE_CORE 0
++#define BCM6348_RESET_PCIE_HARD 0
+
+ #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK
+ #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK
+@@ -115,6 +121,8 @@
+ #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK
+ #define BCM6358_RESET_PCIE 0
+ #define BCM6358_RESET_PCIE_EXT 0
++#define BCM6358_RESET_PCIE_CORE 0
++#define BCM6358_RESET_PCIE_HARD 0
+
+ #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK
+ #define BCM6362_RESET_ENET 0
+@@ -126,9 +134,10 @@
+ #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK
+ #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK
+ #define BCM6362_RESET_MPI 0
+-#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \
+- SOFTRESET_6362_PCIE_CORE_MASK)
++#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK
+ #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK
++#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK
++#define BCM6362_RESET_PCIE_HARD 0
+
+ #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK
+ #define BCM6368_RESET_ENET 0
+@@ -142,6 +151,8 @@
+ #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK
+ #define BCM6368_RESET_PCIE 0
+ #define BCM6368_RESET_PCIE_EXT 0
++#define BCM6368_RESET_PCIE_CORE 0
++#define BCM6368_RESET_PCIE_HARD 0
+
+ #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
+ #define BCM63268_RESET_ENET 0
+@@ -153,10 +164,10 @@
+ #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
+ #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
+ #define BCM63268_RESET_MPI 0
+-#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
+- SOFTRESET_63268_PCIE_CORE_MASK | \
+- SOFTRESET_63268_PCIE_HARD_MASK)
++#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK
+ #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
++#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK
++#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK
+
+ /*
+ * core reset bits
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
+@@ -15,6 +15,8 @@ enum bcm63xx_core_reset {
+ BCM63XX_RESET_MPI,
+ BCM63XX_RESET_PCIE,
+ BCM63XX_RESET_PCIE_EXT,
++ BCM63XX_RESET_PCIE_CORE,
++ BCM63XX_RESET_PCIE_HARD,
+ };
+
+ void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo
+
+ /* reset the PCIe core */
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++ if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) {
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
++ }
+ mdelay(10);
+
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
+ mdelay(10);
+
--- /dev/null
+From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 15 Dec 2013 20:47:34 +0100
+Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
+
+---
+ arch/mips/bcm63xx/clk.c | 25 ++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 6 ++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 60 +++++++++++-
+ arch/mips/pci/ops-bcm63xx.c | 16 +++-
+ arch/mips/pci/pci-bcm63xx.c | 106 ++++++++++++++++++----
+ 5 files changed, 184 insertions(+), 29 deletions(-)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -52,6 +52,18 @@ static void bcm_hwclock_set(u32 mask, in
+ bcm_perf_writel(reg, PERF_CKCTL_REG);
+ }
+
++static void bcm_ub_hwclock_set(u32 mask, int enable)
++{
++ u32 reg;
++
++ reg = bcm_perf_readl(PERF_UB_CKCTL_REG);
++ if (enable)
++ reg |= mask;
++ else
++ reg &= ~mask;
++ bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
++}
++
+ /*
+ * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+ */
+@@ -362,12 +374,17 @@ static struct clk clk_ipsec = {
+
+ static void pcie_set(struct clk *clk, int enable)
+ {
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318()) {
++ bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable);
++ bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable);
++ bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable);
++ } else if (BCMCPU_IS_6328()) {
+ bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
+- else if (BCMCPU_IS_6362())
++ } else if (BCMCPU_IS_6362()) {
+ bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
+- else if (BCMCPU_IS_63268())
++ } else if (BCMCPU_IS_63268()) {
+ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
++ }
+ }
+
+ static struct clk clk_pcie = {
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
+@@ -41,6 +41,12 @@
+ #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
+ BCM_CB_MEM_SIZE - 1)
+
++#define BCM_PCIE_MEM_BASE_PA_6318 0x10200000
++#define BCM_PCIE_MEM_SIZE_6318 (1 * 1024 * 1024)
++#define BCM_PCIE_MEM_END_PA_6318 (BCM_PCIE_MEM_BASE_PA_6318 + \
++ BCM_PCIE_MEM_SIZE_6318 - 1)
++
++
+ #define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
+ #define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
+ #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1530,6 +1530,17 @@
+ * _REG relative to RSET_PCIE
+ *************************************************************************/
+
++#define PCIE_SPECIFIC_REG 0x188
++#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT 0
++#define SPECIFIC_ENDIAN_MODE_BAR1_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT 2
++#define SPECIFIC_ENDIAN_MODE_BAR2_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT 4
++#define SPECIFIC_ENDIAN_MODE_BAR3_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
++#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN 0
++#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1
++#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN 2
++
+ #define PCIE_CONFIG2_REG 0x408
+ #define CONFIG2_BAR1_SIZE_EN 1
+ #define CONFIG2_BAR1_SIZE_MASK 0xf
+@@ -1575,7 +1586,54 @@
+ #define PCIE_RC_INT_C (1 << 2)
+ #define PCIE_RC_INT_D (1 << 3)
+
+-#define PCIE_DEVICE_OFFSET 0x8000
++#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG 0x400c
++#define C2P_MEM_WIN_ENDIAN_MODE_MASK 0x3
++#define C2P_MEM_WIN_ENDIAN_NO_SWAP 0
++#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1
++#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2
++#define C2P_MEM_WIN_BASE_ADDR_SHIFT 20
++#define C2P_MEM_WIN_BASE_ADDR_MASK (0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT)
++
++#define PCIE_RC_BAR1_CONFIG_LO_REG 0x402c
++#define RC_BAR_CFG_LO_SIZE_256MB 0xd
++#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT 20
++#define RC_BAR_CFG_LO_MATCH_ADDR_MASK (0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT)
++
++#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070
++#define C2P_BASELIMIT_LIMIT_SHIFT 20
++#define C2P_BASELIMIT_LIMIT_MASK (0xfff << C2P_BASELIMIT_LIMIT_SHIFT)
++#define C2P_BASELIMIT_BASE_SHIFT 4
++#define C2P_BASELIMIT_BASE_MASK (0xfff << C2P_BASELIMIT_BASE_SHIFT)
++
++#define PCIE_UBUS_BAR1_CFG_REMAP_REG 0x4088
++#define BAR1_CFG_REMAP_OFFSET_SHIFT 20
++#define BAR1_CFG_REMAP_OFFSET_MASK (0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT)
++#define BAR1_CFG_REMAP_ACCESS_EN 1
++
++#define PCIE_HARD_DEBUG_REG 0x4204
++#define HARD_DEBUG_SERDES_IDDQ (1 << 23)
++
++#define PCIE_CPU_INT1_MASK_CLEAR_REG 0x830c
++#define CPU_INT_PCIE_ERR_ATTN_CPU (1 << 0)
++#define CPU_INT_PCIE_INTA (1 << 1)
++#define CPU_INT_PCIE_INTB (1 << 2)
++#define CPU_INT_PCIE_INTC (1 << 3)
++#define CPU_INT_PCIE_INTD (1 << 4)
++#define CPU_INT_PCIE_INTR (1 << 5)
++#define CPU_INT_PCIE_NMI (1 << 6)
++#define CPU_INT_PCIE_UBUS (1 << 7)
++#define CPU_INT_IPI (1 << 8)
++
++#define PCIE_EXT_CFG_INDEX_REG 0x8400
++#define EXT_CFG_FUNC_NUM_SHIFT 12
++#define EXT_CFG_FUNC_NUM_MASK (0x7 << EXT_CFG_FUNC_NUM_SHIFT)
++#define EXT_CFG_DEV_NUM_SHIFT 15
++#define EXT_CFG_DEV_NUM_MASK (0xf << EXT_CFG_DEV_NUM_SHIFT)
++#define EXT_CFG_BUS_NUM_SHIFT 20
++#define EXT_CFG_BUS_NUM_MASK (0xff << EXT_CFG_BUS_NUM_SHIFT)
++
++#define PCIE_DEVICE_OFFSET_6318 0x9000
++#define PCIE_DEVICE_OFFSET_6328 0x8000
+
+ /*************************************************************************
+ * _REG relative to RSET_OTP
+--- a/arch/mips/pci/ops-bcm63xx.c
++++ b/arch/mips/pci/ops-bcm63xx.c
+@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
+ if (!bcm63xx_pcie_can_access(bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+- if (bus->number == PCIE_BUS_DEVICE)
+- reg += PCIE_DEVICE_OFFSET;
++ if (bus->number == PCIE_BUS_DEVICE) {
++ if (BCMCPU_IS_6318())
++ reg += PCIE_DEVICE_OFFSET_6318;
++ else
++ reg += PCIE_DEVICE_OFFSET_6328;
++ }
+
+ data = bcm_pcie_readl(reg);
+
+@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
+ if (!bcm63xx_pcie_can_access(bus, devfn))
+ return PCIBIOS_DEVICE_NOT_FOUND;
+
+- if (bus->number == PCIE_BUS_DEVICE)
+- reg += PCIE_DEVICE_OFFSET;
++ if (bus->number == PCIE_BUS_DEVICE) {
++ if (BCMCPU_IS_6318())
++ reg += PCIE_DEVICE_OFFSET_6318;
++ else
++ reg += PCIE_DEVICE_OFFSET_6328;
++ }
+
+
+ data = bcm_pcie_readl(reg);
+--- a/arch/mips/pci/pci-bcm63xx.c
++++ b/arch/mips/pci/pci-bcm63xx.c
+@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v
+
+ void __iomem *pci_iospace_start;
+
+-static void __init bcm63xx_reset_pcie(void)
++static void __init bcm63xx_reset_pcie_gen1(void)
+ {
+ u32 val;
+ u32 reg;
+@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo
+ mdelay(200);
+ }
+
+-static struct clk *pcie_clk;
+-
+-static int __init bcm63xx_register_pcie(void)
++static void __init bcm63xx_reset_pcie_gen2(void)
+ {
+ u32 val;
+
+- /* enable clock */
+- pcie_clk = clk_get(NULL, "pcie");
+- if (IS_ERR_OR_NULL(pcie_clk))
+- return -ENODEV;
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
+
+- clk_prepare_enable(pcie_clk);
++ /* reset the PCIe core */
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
++ mdelay(10);
++ val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG);
++ val &= ~HARD_DEBUG_SERDES_IDDQ;
++ bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG);
++ mdelay(10);
++ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
++ mdelay(200);
++}
+
+- bcm63xx_reset_pcie();
++static void __init bcm63xx_init_pcie_gen1(void)
++{
++ u32 val;
+
+ /* configure the PCIe bridge */
+ val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);
+@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie(
+ val |= OPT2_CFG_TYPE1_BD_SEL;
+ bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);
+
++ /* set bar0 to little endian */
++ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
++ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
++ val |= BASEMASK_REMAP_EN;
++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
++
++ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
++ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
++}
++
++static void __init bcm63xx_init_pcie_gen2(void)
++{
++ u32 val;
++
++ bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB |
++ CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD,
++ PCIE_CPU_INT1_MASK_CLEAR_REG);
++
++ val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK;
++ val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) <<
++ C2P_BASELIMIT_BASE_SHIFT;
++
++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG);
++
++ /* set bar0 to little endian */
++ val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++ val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK;
++ val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP;
++ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
++
++ bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG);
++ bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG);
++ bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG);
++
++ bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT,
++ PCIE_EXT_CFG_INDEX_REG);
++}
++
++static struct clk *pcie_clk;
++
++static int __init bcm63xx_register_pcie(void)
++{
++ u32 val;
++
++ /* enable clock */
++ pcie_clk = clk_get(NULL, "pcie");
++ if (IS_ERR_OR_NULL(pcie_clk))
++ return -ENODEV;
++
++ clk_prepare_enable(pcie_clk);
++
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
++ bcm63xx_reset_pcie_gen1();
++ bcm63xx_init_pcie_gen1();
++ } else {
++ bcm63xx_reset_pcie_gen2();
++ bcm63xx_init_pcie_gen2();
++ }
++
+ /* setup class code as bridge */
+ val = bcm_pcie_readl(PCIE_IDVAL3_REG);
+ val &= ~IDVAL3_CLASS_CODE_MASK;
+@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie(
+ val &= ~CONFIG2_BAR1_SIZE_MASK;
+ bcm_pcie_writel(val, PCIE_CONFIG2_REG);
+
+- /* set bar0 to little endian */
+- val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
+- val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
+- val |= BASEMASK_REMAP_EN;
+- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
+-
+- val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
+- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
+-
+ register_pci_controller(&bcm63xx_pcie_controller);
+
+ return 0;
+@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void)
+ if (!bcm63xx_pci_enabled)
+ return -ENODEV;
+
+- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
++ if (BCMCPU_IS_6318()) {
++ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318;
++ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318;
++ } if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
+ } else if (BCMCPU_IS_63268()) {
+@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void)
+ }
+
+ switch (bcm63xx_get_cpu_id()) {
++ case BCM6318_CPU_ID:
+ case BCM6328_CPU_ID:
+ case BCM6362_CPU_ID:
+ case BCM63268_CPU_ID:
--- /dev/null
+From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 12:26:57 +0100
+Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
+ result
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 10 +++++++---
+ arch/mips/bcm63xx/prom.c | 4 ++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 3 files changed, 13 insertions(+), 3 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -22,6 +22,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+
++static int flash_type;
++
+ static struct mtd_partition mtd_partitions[] = {
+ {
+ .name = "cfe",
+@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
+ }
+ }
+
++void __init bcm63xx_flash_detect(void)
++{
++ flash_type = bcm63xx_detect_flash_type();
++}
++
+ int __init bcm63xx_flash_register(void)
+ {
+- int flash_type;
+ u32 val;
+
+- flash_type = bcm63xx_detect_flash_type();
+-
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
+ /* read base address of boot chip select (0) */
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -17,6 +17,7 @@
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
++#include <bcm63xx_dev_flash.h>
+
+ void __init prom_init(void)
+ {
+@@ -52,6 +53,9 @@ void __init prom_init(void)
+ reg &= ~mask;
+ bcm_perf_writel(reg, PERF_CKCTL_REG);
+
++ /* detect and setup flash access */
++ bcm63xx_flash_detect();
++
+ /* do low level board init */
+ board_prom_init();
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -8,6 +8,8 @@ enum {
+ BCM63XX_FLASH_TYPE_NAND,
+ };
+
++void bcm63xx_flash_detect(void);
++
+ int __init bcm63xx_flash_register(void);
+
+ #endif /* __BCM63XX_FLASH_H */
--- /dev/null
+From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Dec 2013 13:25:25 +0100
+Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
+
+Some bootloaders leave the flash access in an invalid state with dual
+read enabled; fix it by disabling it and falling back to simple fast
+reads.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 51 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -16,6 +16,7 @@
+ #include <linux/mtd/mtd.h>
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
++#include <linux/mtd/spi-nor.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
+ }
+ }
+
++#define HSSPI_FLASH_CTRL_REG 0x14
++#define FLASH_CTRL_READ_OPCODE_MASK 0xff
++#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8)
++#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8)
++#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8)
++#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8)
++#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10
++#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
++#define FLASH_CTRL_MB_EN (1 << 23)
++
+ void __init bcm63xx_flash_detect(void)
+ {
+ flash_type = bcm63xx_detect_flash_type();
++
++ /* ensure flash mapping has sane values */
++ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
++ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
++ BCMCPU_IS_63268())) {
++ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
++
++ if (val & FLASH_CTRL_MB_EN) {
++ /* cfe might configure non working dual-io mode */
++ val &= ~FLASH_CTRL_MB_EN;
++ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++
++ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
++ case FLASH_CTRL_ADDR_BYTES_3:
++ val |= SPINOR_OP_READ_FAST;
++ break;
++ case FLASH_CTRL_ADDR_BYTES_4:
++ val |= SPINOR_OP_READ_FAST_4B;
++ break;
++ case FLASH_CTRL_ADDR_BYTES_2:
++ default:
++ pr_warn("unsupported address byte mode (%x), not fixing up\n",
++ val & FLASH_CTRL_ADDR_BYTES_MASK);
++ return;
++ }
++ } else {
++ /* ensure dummy bytes is set to 1 for _FAST reads */
++ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
++
++ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ_FAST_4B)
++ return;
++
++ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
++ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
++ }
++
++ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
++ }
+ }
+
+ int __init bcm63xx_flash_register(void)
--- /dev/null
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -168,7 +168,11 @@ static struct clk clk_swpkt_usb = {
+ */
+ static void enetsw_set(struct clk *clk, int enable)
+ {
+- if (BCMCPU_IS_6328()) {
++ if (BCMCPU_IS_6318()) {
++ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
++ CKCTL_6318_ROBOSW025_EN, enable);
++ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
++ } else if (BCMCPU_IS_6328()) {
+ bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
+ } else if (BCMCPU_IS_6362()) {
+ bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
+@@ -220,18 +224,22 @@ static struct clk clk_pcm = {
+ */
+ static void usbh_set(struct clk *clk, int enable)
+ {
+- if (BCMCPU_IS_6328())
++ if (BCMCPU_IS_6318()) {
++ bcm_hwclock_set(CKCTL_6318_USB_EN, enable);
++ bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable);
++ } else if (BCMCPU_IS_6328()) {
+ bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
+- else if (BCMCPU_IS_6348())
++ } else if (BCMCPU_IS_6348()) {
+ bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
+- else if (BCMCPU_IS_6362())
++ } else if (BCMCPU_IS_6362()) {
+ bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
+- else if (BCMCPU_IS_6368())
++ } else if (BCMCPU_IS_6368()) {
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+- else if (BCMCPU_IS_63268())
++ } else if (BCMCPU_IS_63268()) {
+ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
+- else
++ } else {
+ return;
++ }
+
+ if (enable)
+ msleep(100);
--- /dev/null
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_6318()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ }
+
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_6318()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
++ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
++ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
+ }
+
+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -682,6 +682,12 @@
+ #define GPIO_MODE_6368_SPI_SSN4 (1 << 30)
+ #define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
+
++#define GPIO_PINMUX_SEL0_6318 0x1c
++#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26
++#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
++#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
+
+ #define GPIO_PINMUX_OTHR_REG 0x24
+ #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
+@@ -1000,6 +1006,7 @@
+
+ #define USBH_PRIV_SWAP_6358_REG 0x0
+ #define USBH_PRIV_SWAP_6368_REG 0x1c
++#define USBH_PRIV_SWAP_6318_REG 0x0c
+
+ #define USBH_PRIV_SWAP_USBD_SHIFT 6
+ #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
+@@ -1025,6 +1032,13 @@
+ #define USBH_PRIV_SETUP_IOC_SHIFT 4
+ #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
+
++#define USBH_PRIV_SETUP_6318_REG 0x00
++#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
++#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
++#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
++#define USBH_PRIV_SIM_CTRL_6318_REG 0x20
++#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
++
+
+ /*************************************************************************
+ * _REG relative to RSET_USBD
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -125,6 +125,15 @@ void __init board_early_setup(const stru
+ }
+
+ bcm_gpio_writel(val, GPIO_MODE_REG);
++
++#if IS_ENABLED(CONFIG_USB)
++ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
++ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
++ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
++ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
++ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
++ }
++#endif
+ }
+
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -23,6 +23,8 @@ config BCM63XX_CPU_6318
+ bool "support 6318 CPU"
+ select SYS_HAS_CPU_BMIPS32_3300
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -587,6 +587,9 @@
+ #define TIMER_CTL_MONOTONIC_MASK (1 << 30)
+ #define TIMER_CTL_ENABLE_MASK (1 << 31)
+
++/* Clock reset control (63268 only) */
++#define TIMER_CLK_RST_CTL_REG 0x2c
++#define CLK_RST_CTL_USB_REF_CLK_EN (1 << 18)
+
+ /*************************************************************************
+ * _REG relative to RSET_WDT
+@@ -1534,6 +1537,11 @@
+ #define STRAPBUS_63268_FCVO_SHIFT 21
+ #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
+
++#define MISC_IDDQ_CTRL_6328_REG 0x48
++#define MISC_IDDQ_CTRL_63268_REG 0x4c
++
++#define IDDQ_CTRL_63268_USBH (1 << 4)
++
+ #define MISC_STRAPBUS_6328_REG 0x240
+ #define STRAPBUS_6328_FCVO_SHIFT 7
+ #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -64,6 +64,26 @@ static void bcm_ub_hwclock_set(u32 mask,
+ bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
+ }
+
++static void bcm_misc_iddq_set(u32 mask, int enable)
++{
++ u32 offset;
++ u32 reg;
++
++ if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
++ offset = MISC_IDDQ_CTRL_6328_REG;
++ else if (BCMCPU_IS_63268())
++ offset = MISC_IDDQ_CTRL_63268_REG;
++ else
++ return;
++
++ reg = bcm_misc_readl(offset);
++ if (enable)
++ reg &= ~mask;
++ else
++ reg |= mask;
++ bcm_misc_writel(reg, offset);
++}
++
+ /*
+ * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
+ */
+@@ -236,7 +256,17 @@ static void usbh_set(struct clk *clk, in
+ } else if (BCMCPU_IS_6368()) {
+ bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
+ } else if (BCMCPU_IS_63268()) {
++ u32 reg;
++
+ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
++ bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
++ bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
++ reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
++ if (enable)
++ reg |= CLK_RST_CTL_USB_REF_CLK_EN;
++ else
++ reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
++ bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
+ } else {
+ return;
+ }
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -1034,11 +1034,18 @@
+ #define USBH_PRIV_SETUP_6368_REG 0x28
+ #define USBH_PRIV_SETUP_IOC_SHIFT 4
+ #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
++#define USBH_PRIV_SETUP_IPP_SHIFT 5
++#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT)
+
+ #define USBH_PRIV_SETUP_6318_REG 0x00
++#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18
+ #define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
+-#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
+-#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
++
++#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27)
++#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31)
++#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9)
++#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10)
++
+ #define USBH_PRIV_SIM_CTRL_6318_REG 0x20
+ #define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
+
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -73,6 +73,8 @@ config BCM63XX_CPU_63268
+ bool "support 63268 CPU"
+ select SYS_HAS_CPU_BMIPS4350
+ select HW_HAS_PCI
++ select BCM63XX_OHCI
++ select BCM63XX_EHCI
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
+ int __init bcm63xx_ehci_register(void)
+ {
+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+- !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
++ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ return 0;
+
+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+--- a/arch/mips/bcm63xx/usb-common.c
++++ b/arch/mips/bcm63xx/usb-common.c
+@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_63268()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ } else if (BCMCPU_IS_6318()) {
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
+@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
+ reg |= USBH_PRIV_SETUP_IOC_MASK;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++ } else if (BCMCPU_IS_63268()) {
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
++ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
++ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
++ reg |= USBH_PRIV_SETUP_IOC_MASK;
++ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
++
++ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
++ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
++ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
++ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
+ } else if (BCMCPU_IS_6318()) {
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
++ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
+@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
+- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
++ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
+
+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -40,6 +40,7 @@ struct board_info {
+
+ /* USB config */
+ struct bcm63xx_usbd_platform_data usbd;
++ unsigned int num_usbh_ports:2;
+
+ /* GPIO LEDs */
+ struct gpio_led leds[5];
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_EHCI_H_
+ #define BCM63XX_DEV_USB_EHCI_H_
+
+-int bcm63xx_ehci_register(void);
++int bcm63xx_ehci_register(unsigned int num_ports);
+
+ #endif /* BCM63XX_DEV_USB_EHCI_H_ */
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
+@@ -1,6 +1,6 @@
+ #ifndef BCM63XX_DEV_USB_OHCI_H_
+ #define BCM63XX_DEV_USB_OHCI_H_
+
+-int bcm63xx_ohci_register(void);
++int bcm63xx_ohci_register(unsigned int num_ports);
+
+ #endif /* BCM63XX_DEV_USB_OHCI_H_ */
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -165,6 +165,8 @@ static struct platform_device bcm63xx_gp
+ */
+ int __init board_register_devices(void)
+ {
++ int usbh_ports = 0;
++
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+
+@@ -186,14 +188,21 @@ int __init board_register_devices(void)
+ !board_get_mac_address(board.enetsw.mac_addr))
+ bcm63xx_enetsw_register(&board.enetsw);
+
++ if ((board.has_ohci0 || board.has_ehci0)) {
++ usbh_ports = board.num_usbh_ports;
++
++ if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd))
++ usbh_ports = 1;
++ }
++
+ if (board.has_usbd)
+ bcm63xx_usbd_register(&board.usbd);
+
+ if (board.has_ehci0)
+- bcm63xx_ehci_register();
++ bcm63xx_ehci_register(usbh_ports);
+
+ if (board.has_ohci0)
+- bcm63xx_ohci_register();
++ bcm63xx_ohci_register(usbh_ports);
+
+ /* Generate MAC address for WLAN and register our SPROM,
+ * do this after registering enet devices
+--- a/arch/mips/bcm63xx/dev-usb-ehci.c
++++ b/arch/mips/bcm63xx/dev-usb-ehci.c
+@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh
+ },
+ };
+
+-int __init bcm63xx_ehci_register(void)
++int __init bcm63xx_ehci_register(unsigned int num_ports)
+ {
+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
+ return 0;
+
++ bcm63xx_ehci_pdata.num_ports = num_ports;
++
+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+ ehci_resources[0].end = ehci_resources[0].start;
+ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
+--- a/arch/mips/bcm63xx/dev-usb-ohci.c
++++ b/arch/mips/bcm63xx/dev-usb-ohci.c
+@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc
+ .big_endian_desc = 1,
+ .big_endian_mmio = 1,
+ .no_big_frame_no = 1,
+- .num_ports = 1,
+ .power_on = bcm63xx_ohci_power_on,
+ .power_off = bcm63xx_ohci_power_off,
+ .power_suspend = bcm63xx_ohci_power_off,
+@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh
+ },
+ };
+
+-int __init bcm63xx_ohci_register(void)
++int __init bcm63xx_ohci_register(unsigned int num_ports)
+ {
+ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
+ return -ENODEV;
+
++ bcm63xx_ohci_pdata.num_ports = num_ports;
++
+ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
+ ohci_resources[0].end = ohci_resources[0].start;
+ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -576,6 +576,7 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
+
+ .leds = {
+ {
--- /dev/null
+From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Jun 2014 12:47:49 +0200
+Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one
+ board type
+
+Use the arguments passed to the kernel to detect being booted with
+CFE as the indicator for bcm963xx board support, allowing the
+non presence of CFE_EPTSEAL to assume a different board type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig | 7 +++----
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/boards/board_common.c | 13 +++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h | 6 ++++++
+ 4 files changed, 23 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -1,11 +1,10 @@
+ # SPDX-License-Identifier: GPL-2.0
+-choice
+- prompt "Board support"
++menu "Board support"
+ depends on BCM63XX
+- default BOARD_BCM963XX
+
+ config BOARD_BCM963XX
+ bool "Generic Broadcom 963xx boards"
+ select SSB
++ default y
+
+-endchoice
++endmenu
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -686,7 +686,7 @@ static const struct board_info __initcon
+ /*
+ * early init callback, read nvram data from flash and checksum it
+ */
+-void __init board_prom_init(void)
++void __init board_bcm963xx_init(void)
+ {
+ unsigned int i;
+ u8 *boot_addr, *cfe;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -13,6 +13,8 @@
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
++#include <asm/bootinfo.h>
++#include <asm/fw/cfe/cfe_api.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -30,6 +32,8 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+
++#include "board_common.h"
++
+ #define PFX "board: "
+
+ static struct board_info board;
+@@ -80,6 +84,15 @@ const char *board_get_name(void)
+ return board.name;
+ }
+
++void __init board_prom_init(void)
++{
++ /* detect bootloader */
++ if (fw_arg3 == CFE_EPTSEAL)
++ board_bcm963xx_init();
++ else
++ panic("unsupported bootloader detected");
++}
++
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+
+ /*
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -6,4 +6,10 @@
+ void board_early_setup(const struct board_info *board,
+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
+
++#if defined(CONFIG_BOARD_BCM963XX)
++void board_bcm963xx_init(void);
++#else
++static inline void board_bcm963xx_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
--- /dev/null
+From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:28:14 +0100
+Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
+ flash address
+
+Allow board implementations to force the physmap address.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++-----
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 2 files changed, 16 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
+ },
+ };
+
++void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
++{
++ mtd_resources[0].start = start;
++ mtd_resources[0].end = end;
++}
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ u32 val;
+@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void)
+
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
+- /* read base address of boot chip select (0) */
+- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+- val &= MPI_CSBASE_BASE_MASK;
+
+- mtd_resources[0].start = val;
+- mtd_resources[0].end = 0x1FFFFFFF;
++ if (!mtd_resources[0].start) {
++ /* read base address of boot chip select (0) */
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++
++ mtd_resources[0].start = val;
++ mtd_resources[0].end = 0x1FFFFFFF;
++ }
+
+ return platform_device_register(&mtd_dev);
+ case BCM63XX_FLASH_TYPE_SERIAL:
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -10,6 +10,8 @@ enum {
+
+ void bcm63xx_flash_detect(void);
+
++void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
++
+ int __init bcm63xx_flash_register(void);
+
+ #endif /* __BCM63XX_FLASH_H */
--- /dev/null
+From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:31:12 +0200
+Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own
+ unit
+
+In preparation for enhancing it, move it into its own file. Require a
+mac address to be passed as the argument to always "reserve" the mac
+regardless of the inclusion state of SSB.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/boards/board_common.c | 53 ++--------------
+ arch/mips/bcm63xx/sprom.c | 70 ++++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 ++
+ 4 files changed, 83 insertions(+), 48 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/sprom.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -2,7 +2,8 @@
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
+- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
++ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
++ sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -39,44 +39,6 @@
+ static struct board_info board;
+
+ /*
+- * Register a sane SPROMv2 to make the on-board
+- * bcm4318 WLAN work
+- */
+-#ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
+- .revision = 0x02,
+- .board_rev = 0x17,
+- .country_code = 0x0,
+- .ant_available_bg = 0x3,
+- .pa0b0 = 0x15ae,
+- .pa0b1 = 0xfa85,
+- .pa0b2 = 0xfe8d,
+- .pa1b0 = 0xffff,
+- .pa1b1 = 0xffff,
+- .pa1b2 = 0xffff,
+- .gpio0 = 0xff,
+- .gpio1 = 0xff,
+- .gpio2 = 0xff,
+- .gpio3 = 0xff,
+- .maxpwr_bg = 0x004c,
+- .itssi_bg = 0x00,
+- .boardflags_lo = 0x2848,
+- .boardflags_hi = 0x0000,
+-};
+-
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+-{
+- if (bus->bustype == SSB_BUSTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+- return 0;
+- } else {
+- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+- return -EINVAL;
+- }
+-}
+-#endif
+-
+-/*
+ * return board name for /proc/cpuinfo
+ */
+ const char *board_get_name(void)
+@@ -179,6 +141,7 @@ static struct platform_device bcm63xx_gp
+ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
++ u8 mac[ETH_ALEN];
+
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+@@ -220,15 +183,10 @@ int __init board_register_devices(void)
+ /* Generate MAC address for WLAN and register our SPROM,
+ * do this after registering enet devices
+ */
+-#ifdef CONFIG_SSB_PCIHOST
+- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
+- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
+- if (ssb_arch_register_fallback_sprom(
+- &bcm63xx_get_fallback_sprom) < 0)
+- pr_err(PFX "failed to register fallback SPROM\n");
+- }
+-#endif
++
++ if (board_get_mac_address(mac) ||
++ bcm63xx_register_fallback_sprom(mac))
++ pr_err(PFX "failed to register fallback SPROM\n");
+
+ bcm63xx_spi_register();
+
+--- /dev/null
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -0,0 +1,70 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/platform_device.h>
++#include <linux/ssb/ssb.h>
++#include <bcm63xx_fallback_sprom.h>
++#include <board_bcm963xx.h>
++
++#define PFX "sprom: "
++
++/*
++ * Register a sane SPROMv2 to make the on-board
++ * bcm4318 WLAN work
++ */
++#ifdef CONFIG_SSB_PCIHOST
++static struct ssb_sprom bcm63xx_sprom = {
++ .revision = 0x02,
++ .board_rev = 0x17,
++ .country_code = 0x0,
++ .ant_available_bg = 0x3,
++ .pa0b0 = 0x15ae,
++ .pa0b1 = 0xfa85,
++ .pa0b2 = 0xfe8d,
++ .pa1b0 = 0xffff,
++ .pa1b1 = 0xffff,
++ .pa1b2 = 0xffff,
++ .gpio0 = 0xff,
++ .gpio1 = 0xff,
++ .gpio2 = 0xff,
++ .gpio3 = 0xff,
++ .maxpwr_bg = 0x004c,
++ .itssi_bg = 0x00,
++ .boardflags_lo = 0x2848,
++ .boardflags_hi = 0x0000,
++};
++
++int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++{
++ if (bus->bustype == SSB_BUSTYPE_PCI) {
++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ return 0;
++ } else {
++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++ return -EINVAL;
++ }
++}
++#endif
++
++int __init bcm63xx_register_fallback_sprom(u8 *mac)
++{
++ int ret = 0;
++
++#ifdef CONFIG_SSB_PCIHOST
++ memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++
++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#endif
++ return ret;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -0,0 +1,6 @@
++#ifndef __BCM63XX_FALLBACK_SPROM
++#define __BCM63XX_FALLBACK_SPROM
++
++int bcm63xx_register_fallback_sprom(u8 *mac);
++
++#endif
--- /dev/null
+From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:43:49 +0200
+Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom
+
+Similar to ethernet setup, use a platform data struct for passing
+the mac. This eliminates the requirement to allocate an array on
+stack for the mac passed.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c | 6 ++----
+ arch/mips/bcm63xx/sprom.c | 8 ++++----
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 4 ++++
+ 4 files changed, 17 insertions(+), 9 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -141,7 +141,6 @@ static struct platform_device bcm63xx_gp
+ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
+- u8 mac[ETH_ALEN];
+
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+@@ -184,8 +183,8 @@ int __init board_register_devices(void)
+ * do this after registering enet devices
+ */
+
+- if (board_get_mac_address(mac) ||
+- bcm63xx_register_fallback_sprom(mac))
++ if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++ bcm63xx_register_fallback_sprom(&board.fallback_sprom))
+ pr_err(PFX "failed to register fallback SPROM\n");
+
+ bcm63xx_spi_register();
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss
+ }
+ #endif
+
+-int __init bcm63xx_register_fallback_sprom(u8 *mac)
++int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ int ret = 0;
+
+ #ifdef CONFIG_SSB_PCIHOST
+- memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
++ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
++ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+
+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -1,6 +1,12 @@
+ #ifndef __BCM63XX_FALLBACK_SPROM
+ #define __BCM63XX_FALLBACK_SPROM
+
+-int bcm63xx_register_fallback_sprom(u8 *mac);
++#include <linux/if_ether.h>
++
++struct fallback_sprom_data {
++ u8 mac_addr[ETH_ALEN];
++};
++
++int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+
+ #endif
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -7,6 +7,7 @@
+ #include <linux/leds.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
++#include <bcm63xx_fallback_sprom.h>
+
+ /*
+ * flash mapping
+@@ -50,6 +51,9 @@ struct board_info {
+
+ /* External PHY reset GPIO flags from gpio.h */
+ unsigned long ephy_reset_gpio_flags;
++
++ /* fallback sprom config */
++ struct fallback_sprom_data fallback_sprom;
+ };
+
+ #endif /* ! BOARD_BCM963XX_H_ */
--- /dev/null
+From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:52:56 +0200
+Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional
+
+Some devices do not provide enough mac addresses to populate wifi in
+addition to ethernet.
+
+Use having pci enabled as a rough heuristic which boards should have it
+enabled.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 12 ++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c | 5 +++--
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 1 +
+ 3 files changed, 16 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -70,6 +70,7 @@ static struct board_info __initdata boar
+ .has_uart0 = 1,
+ .has_pci = 1,
+ .has_usbd = 0,
++ .use_fallback_sprom = 1,
+
+ .usbd = {
+ .use_fullspeed = 0,
+@@ -219,6 +220,7 @@ static struct board_info __initdata boar
+ .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -264,6 +266,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -316,6 +319,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -370,6 +374,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -420,6 +425,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -443,6 +449,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -461,6 +468,7 @@ static struct board_info __initdata boar
+
+ .has_uart0 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+ .has_ohci0 = 1,
+
+ .has_enet0 = 1,
+@@ -483,6 +491,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -509,6 +518,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -561,6 +571,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+@@ -632,6 +643,7 @@ static struct board_info __initdata boar
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
++ .use_fallback_sprom = 1,
+
+ .enet0 = {
+ .has_phy = 1,
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -183,8 +183,9 @@ int __init board_register_devices(void)
+ * do this after registering enet devices
+ */
+
+- if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
+- bcm63xx_register_fallback_sprom(&board.fallback_sprom))
++ if (board.use_fallback_sprom &&
++ (board_get_mac_address(board.fallback_sprom.mac_addr) ||
++ bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
+ pr_err(PFX "failed to register fallback SPROM\n");
+
+ bcm63xx_spi_register();
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -33,6 +33,7 @@ struct board_info {
+ unsigned int has_usbd:1;
+ unsigned int has_uart0:1;
+ unsigned int has_uart1:1;
++ unsigned int use_fallback_sprom:1;
+
+ /* ethernet config */
+ struct bcm63xx_enet_platform_data enet0;
--- /dev/null
+From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 21:58:38 +0200
+Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom
+
+Different chips require different sprom contents, so prepare for
+supplying the appropriate sprom type.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 13 ++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 5 +++++
+ 2 files changed, 17 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -22,7 +22,7 @@
+ * bcm4318 WLAN work
+ */
+ #ifdef CONFIG_SSB_PCIHOST
+-static struct ssb_sprom bcm63xx_sprom = {
++static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ .revision = 0x02,
+ .board_rev = 0x17,
+ .country_code = 0x0,
+@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom =
+ .boardflags_hi = 0x0000,
+ };
+
++static struct ssb_sprom bcm63xx_sprom;
++
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
+@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr
+ int ret = 0;
+
+ #ifdef CONFIG_SSB_PCIHOST
++ switch (data->type) {
++ case SPROM_DEFAULT:
++ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
++ sizeof(bcm63xx_sprom));
++ break;
++ default:
++ return -EINVAL;
++ }
++
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -3,8 +3,13 @@
+
+ #include <linux/if_ether.h>
+
++enum sprom_type {
++ SPROM_DEFAULT, /* default fallback sprom */
++};
++
+ struct fallback_sprom_data {
+ u8 mac_addr[ETH_ALEN];
++ enum sprom_type type;
+ };
+
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
--- /dev/null
+From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:16:36 +0200
+Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
+
+Allow using raw sprom content as templates.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 482 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss
+ return -EINVAL;
+ }
+ }
++
++/* FIXME: use lib_sprom after submission upstream */
++
++/* Get the word-offset for a SSB_SPROM_XXX define. */
++#define SPOFF(offset) ((offset) / sizeof(u16))
++/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
++#define SPEX16(_outvar, _offset, _mask, _shift) \
++ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
++#define SPEX32(_outvar, _offset, _mask, _shift) \
++ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
++ in[SPOFF(_offset)]) & (_mask)) >> (_shift))
++#define SPEX(_outvar, _offset, _mask, _shift) \
++ SPEX16(_outvar, _offset, _mask, _shift)
++
++#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
++ do { \
++ SPEX(_field[0], _offset + 0, _mask, _shift); \
++ SPEX(_field[1], _offset + 2, _mask, _shift); \
++ SPEX(_field[2], _offset + 4, _mask, _shift); \
++ SPEX(_field[3], _offset + 6, _mask, _shift); \
++ SPEX(_field[4], _offset + 8, _mask, _shift); \
++ SPEX(_field[5], _offset + 10, _mask, _shift); \
++ SPEX(_field[6], _offset + 12, _mask, _shift); \
++ SPEX(_field[7], _offset + 14, _mask, _shift); \
++ } while (0)
++
++
++static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
++ u16 mask, u16 shift)
++{
++ u16 v;
++ u8 gain;
++
++ v = in[SPOFF(SSB_SPROM1_AGAIN)];
++ gain = (v & mask) >> shift;
++ if (gain == 0xFF)
++ gain = 2; /* If unset use 2dBm */
++ if (sprom_revision == 1) {
++ /* Convert to Q5.2 */
++ gain <<= 2;
++ } else {
++ /* Q5.2 Fractional part is stored in 0xC0 */
++ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
++ }
++
++ return (s8)gain;
++}
++
++static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
++{
++ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
++ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
++ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
++ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
++ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
++ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
++ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
++ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
++ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
++ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
++ SSB_SPROM2_MAXP_A_LO_SHIFT);
++}
++
++static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
++{
++ u16 loc[3];
++
++ if (out->revision == 3) /* rev 3 moved MAC */
++ loc[0] = SSB_SPROM3_IL0MAC;
++ else {
++ loc[0] = SSB_SPROM1_IL0MAC;
++ loc[1] = SSB_SPROM1_ET0MAC;
++ loc[2] = SSB_SPROM1_ET1MAC;
++ }
++
++ SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
++ SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
++ SSB_SPROM1_ETHPHY_ET1A_SHIFT);
++ SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
++ SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
++ SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++ if (out->revision == 1)
++ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
++ SSB_SPROM1_BINF_CCODE_SHIFT);
++ SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
++ SSB_SPROM1_BINF_ANTA_SHIFT);
++ SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
++ SSB_SPROM1_BINF_ANTBG_SHIFT);
++ SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
++ SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
++ SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
++ SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
++ SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
++ SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
++ SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
++ SSB_SPROM1_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
++ SSB_SPROM1_GPIOB_P3_SHIFT);
++ SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
++ SSB_SPROM1_MAXPWR_A_SHIFT);
++ SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
++ SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
++ SSB_SPROM1_ITSSI_A_SHIFT);
++ SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
++ SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
++
++ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
++
++ /* Extract the antenna gain values. */
++ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
++ SSB_SPROM1_AGAIN_BG,
++ SSB_SPROM1_AGAIN_BG_SHIFT);
++ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
++ SSB_SPROM1_AGAIN_A,
++ SSB_SPROM1_AGAIN_A_SHIFT);
++ if (out->revision >= 2)
++ sprom_extract_r23(out, in);
++}
++
++/* Revs 4 5 and 8 have partially shared layout */
++static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
++{
++ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
++ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
++ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
++ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
++ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
++ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
++ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
++ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
++
++ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
++ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
++ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
++ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
++ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
++ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
++ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
++ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
++
++ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
++ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
++ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
++ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
++ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
++ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
++ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
++ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
++
++ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
++ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
++ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
++ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
++ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
++ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
++ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
++ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
++}
++
++static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
++{
++ u16 il0mac_offset;
++
++ if (out->revision == 4)
++ il0mac_offset = SSB_SPROM4_IL0MAC;
++ else
++ il0mac_offset = SSB_SPROM5_IL0MAC;
++
++ SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
++ SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
++ SSB_SPROM4_ETHPHY_ET1A_SHIFT);
++ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++ if (out->revision == 4) {
++ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
++ SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
++ SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
++ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
++ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
++ } else {
++ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
++ SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
++ SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
++ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
++ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
++ }
++ SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
++ SSB_SPROM4_ANTAVAIL_A_SHIFT);
++ SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
++ SSB_SPROM4_ANTAVAIL_BG_SHIFT);
++ SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
++ SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
++ SSB_SPROM4_ITSSI_BG_SHIFT);
++ SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
++ SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
++ SSB_SPROM4_ITSSI_A_SHIFT);
++ if (out->revision == 4) {
++ SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
++ SSB_SPROM4_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
++ SSB_SPROM4_GPIOB_P3_SHIFT);
++ } else {
++ SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
++ SSB_SPROM5_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
++ SSB_SPROM5_GPIOB_P3_SHIFT);
++ }
++
++ /* Extract the antenna gain values. */
++ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
++ SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
++ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
++ SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
++ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
++ SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
++ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
++ SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
++
++ sprom_extract_r458(out, in);
++
++ /* TODO - get remaining rev 4 stuff needed */
++}
++
++static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
++{
++ int i;
++ u16 o;
++ u16 pwr_info_offset[] = {
++ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
++ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
++ };
++ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
++ ARRAY_SIZE(out->core_pwr_info));
++
++ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
++ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
++ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
++ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
++ SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
++ SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
++ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
++ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
++ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
++ SSB_SPROM8_ANTAVAIL_A_SHIFT);
++ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
++ SSB_SPROM8_ANTAVAIL_BG_SHIFT);
++ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
++ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
++ SSB_SPROM8_ITSSI_BG_SHIFT);
++ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
++ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
++ SSB_SPROM8_ITSSI_A_SHIFT);
++ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
++ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
++ SSB_SPROM8_MAXP_AL_SHIFT);
++ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
++ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
++ SSB_SPROM8_GPIOA_P1_SHIFT);
++ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
++ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
++ SSB_SPROM8_GPIOB_P3_SHIFT);
++ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
++ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
++ SSB_SPROM8_TRI5G_SHIFT);
++ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
++ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
++ SSB_SPROM8_TRI5GH_SHIFT);
++ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
++ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
++ SSB_SPROM8_RXPO5G_SHIFT);
++ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
++ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
++ SSB_SPROM8_RSSISMC2G_SHIFT);
++ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
++ SSB_SPROM8_RSSISAV2G_SHIFT);
++ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
++ SSB_SPROM8_BXA2G_SHIFT);
++ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
++ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
++ SSB_SPROM8_RSSISMC5G_SHIFT);
++ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
++ SSB_SPROM8_RSSISAV5G_SHIFT);
++ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
++ SSB_SPROM8_BXA5G_SHIFT);
++ SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
++ SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
++ SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
++ SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
++ SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
++ SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
++ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
++ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
++ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
++ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
++ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
++ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
++ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
++ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
++ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
++ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
++ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
++
++ /* Extract the antenna gain values. */
++ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
++ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
++ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
++ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
++ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
++ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
++ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
++ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
++
++ /* Extract cores power info info */
++ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
++ o = pwr_info_offset[i];
++ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
++ SSB_SPROM8_2G_MAXP, 0);
++
++ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
++
++ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
++ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
++ SSB_SPROM8_5G_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GH_MAXP, 0);
++ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
++ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
++
++ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
++ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
++ }
++
++ /* Extract FEM info */
++ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
++ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
++ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
++ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
++ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
++ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
++
++ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
++ SSB_SPROM8_LEDDC_ON_SHIFT);
++ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
++ SSB_SPROM8_LEDDC_OFF_SHIFT);
++
++ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
++ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
++ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
++ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
++ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
++ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
++
++ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
++
++ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
++ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
++ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
++ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
++
++ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
++ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
++ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
++ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
++ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
++ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
++ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
++ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
++ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
++ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
++ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
++ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
++ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
++ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
++ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
++ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
++
++ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
++ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
++ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
++ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
++
++ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
++ SSB_SPROM8_THERMAL_TRESH_SHIFT);
++ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
++ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
++ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
++ SSB_SPROM8_TEMPDELTA_PHYCAL,
++ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
++ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
++ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
++ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
++ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
++ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
++ sprom_extract_r458(out, in);
++
++ /* TODO - get remaining rev 8 stuff needed */
++}
++
++static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
++{
++ memset(out, 0, sizeof(*out));
++
++ out->revision = in[size - 1] & 0x00FF;
++ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
++ memset(out->et1mac, 0xFF, 6);
++
++ switch (out->revision) {
++ case 1:
++ case 2:
++ case 3:
++ sprom_extract_r123(out, in);
++ break;
++ case 4:
++ case 5:
++ sprom_extract_r45(out, in);
++ break;
++ case 8:
++ sprom_extract_r8(out, in);
++ break;
++ default:
++ pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
++ out->revision);
++ out->revision = 1;
++ sprom_extract_r123(out, in);
++ }
++
++ if (out->boardflags_lo == 0xFFFF)
++ out->boardflags_lo = 0; /* per specs */
++ if (out->boardflags_hi == 0xFFFF)
++ out->boardflags_hi = 0; /* per specs */
++
++ return 0;
++}
++
++static __initdata u16 template_sprom[220];
+ #endif
+
++
+ int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
+ {
+ int ret = 0;
+
+ #ifdef CONFIG_SSB_PCIHOST
++ u16 size = 0;
++
+ switch (data->type) {
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr
+ return -EINVAL;
+ }
+
++ if (size > 0)
++ sprom_extract(&bcm63xx_sprom, template_sprom, size);
++
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
--- /dev/null
+From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:33:38 +0200
+Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common
+ ssb cards
+
+Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 136 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 +
+ 2 files changed, 142 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6
+ .boardflags_hi = 0x0000,
+ };
+
++
++static __initconst u16 bcm4306_sprom[] = {
++ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4,
++ 0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff,
++ 0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4318_sprom[] = {
++ 0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000,
++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7,
++ 0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff,
++ 0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002,
++};
++
++static __initconst u16 bcm4321_sprom[] = {
++ 0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000,
++ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36,
++ 0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0004,
++};
++
++static __initconst u16 bcm4322_sprom[] = {
++ 0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000,
++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43222_sprom[] = {
++ 0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000,
++ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
+ static struct ssb_sprom bcm63xx_sprom;
+
+ int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr
+ u16 size = 0;
+
+ switch (data->type) {
++ case SPROM_BCM4306:
++ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
++ size = ARRAY_SIZE(bcm4306_sprom);
++ break;
++ case SPROM_BCM4318:
++ memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom));
++ size = ARRAY_SIZE(bcm4318_sprom);
++ break;
++ case SPROM_BCM4321:
++ memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom));
++ size = ARRAY_SIZE(bcm4321_sprom);
++ break;
++ case SPROM_BCM4322:
++ memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom));
++ size = ARRAY_SIZE(bcm4322_sprom);
++ break;
++ case SPROM_BCM43222:
++ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
++ size = ARRAY_SIZE(bcm43222_sprom);
++ break;
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -5,6 +5,12 @@
+
+ enum sprom_type {
+ SPROM_DEFAULT, /* default fallback sprom */
++ /* SSB based */
++ SPROM_BCM4306,
++ SPROM_BCM4318,
++ SPROM_BCM4321,
++ SPROM_BCM4322,
++ SPROM_BCM43222,
+ };
+
+ struct fallback_sprom_data {
--- /dev/null
+From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 29 Jul 2014 22:48:26 +0200
+Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma
+
+Similar to SSB, register a fallback sprom handler for BCMA.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig | 1 +
+ arch/mips/bcm63xx/sprom.c | 40 +++++++++++++++++++++++++++++++++++-----
+ 2 files changed, 36 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -5,6 +5,7 @@ menu "Board support"
+ config BOARD_BCM963XX
+ bool "Generic Broadcom 963xx boards"
+ select SSB
++ select BCMA
+ default y
+
+ endmenu
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -12,6 +12,7 @@
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
++#include <linux/bcma/bcma.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <board_bcm963xx.h>
+
+@@ -21,7 +22,7 @@
+ * Register a sane SPROMv2 to make the on-board
+ * bcm4318 WLAN work
+ */
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ static __initconst struct ssb_sprom bcm63xx_default_sprom = {
+ .revision = 0x02,
+ .board_rev = 0x17,
+@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6
+ .boardflags_hi = 0x0000,
+ };
+
+-
++#if defined (CONFIG_SSB_PCIHOST)
+ static __initconst u16 bcm4306_sprom[] = {
+ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
+@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[]
+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
+ 0xffff, 0xffff, 0xffff, 0x0008,
+ };
++#endif /* CONFIG_SSB_PCIHOST */
+
+ static struct ssb_sprom bcm63xx_sprom;
+
+-int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
++#if defined(CONFIG_SSB_PCIHOST)
++int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
+@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss
+ return -EINVAL;
+ }
+ }
++#endif
++
++#if defined(CONFIG_BCMA_HOST_PCI)
++int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
++{
++ if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
++ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ return 0;
++ } else {
++ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
++ return -EINVAL;
++ }
++}
++#endif
+
+ /* FIXME: use lib_sprom after submission upstream */
+
+@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr
+ {
+ int ret = 0;
+
+-#ifdef CONFIG_SSB_PCIHOST
++#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
+ u16 size = 0;
+
+ switch (data->type) {
++#if defined(CONFIG_SSB_PCIHOST)
+ case SPROM_BCM4306:
+ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
+ size = ARRAY_SIZE(bcm4306_sprom);
+@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr
+ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
+ size = ARRAY_SIZE(bcm43222_sprom);
+ break;
++#endif
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ sizeof(bcm63xx_sprom));
+@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
++
++#if defined(CONFIG_SSB_PCIHOST)
++ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom);
++ if (ret)
++ return ret;
++
++#endif
+
+- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
++#if defined(CONFIG_BCMA_HOST_PCI)
++ ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom);
++ if (ret)
++ return ret;
+ #endif
+ return ret;
+ }
--- /dev/null
+From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 30 Jul 2014 23:14:27 +0200
+Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates
+
+Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227,
+BCM43228, and BCM4331.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 256 +++++++++++++++++++++
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +
+ 2 files changed, 264 insertions(+)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[]
+ };
+ #endif /* CONFIG_SSB_PCIHOST */
+
++#if defined(CONFIG_BCMA_HOST_PCI)
++static __initconst u16 bcm4313_sprom[] = {
++ 0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++ 0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201,
++ 0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000,
++ 0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0008,
++};
++
++static __initconst u16 bcm43131_sprom[] = {
++ 0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202,
++ 0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43217_sprom[] = {
++ 0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x7a08,
++};
++
++static __initconst u16 bcm43225_sprom[] = {
++ 0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++ 0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555,
++ 0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43227_sprom[] = {
++ 0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
++ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
++ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0008,
++};
++
++static __initconst u16 bcm43228_sprom[] = {
++ 0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202,
++ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215,
++ 0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c,
++ 0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000,
++ 0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446,
++ 0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888,
++ 0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
++ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xf008,
++};
++
++static __initconst u16 bcm4331_sprom[] = {
++ 0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
++ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
++ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
++ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202,
++ 0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
++ 0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657,
++ 0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000,
++ 0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d,
++ 0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000,
++ 0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4,
++ 0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
++ 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
++ 0xffff, 0xffff, 0xffff, 0x0009,
++};
++
++#endif /* CONFIG_BCMA_HOST_PCI */
++
+ static struct ssb_sprom bcm63xx_sprom;
+
+ #if defined(CONFIG_SSB_PCIHOST)
+@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr
+ size = ARRAY_SIZE(bcm43222_sprom);
+ break;
+ #endif
++#if defined(CONFIG_BCMA_HOST_PCI)
++ case SPROM_BCM4313:
++ memcpy(&template_sprom, &bcm4313_sprom,
++ sizeof(bcm4313_sprom));
++ size = ARRAY_SIZE(bcm4313_sprom);
++ break;
++ case SPROM_BCM43131:
++ memcpy(&template_sprom, &bcm43131_sprom,
++ sizeof(bcm43131_sprom));
++ size = ARRAY_SIZE(bcm43131_sprom);
++ break;
++ case SPROM_BCM43217:
++ memcpy(&template_sprom, &bcm43217_sprom,
++ sizeof(bcm43217_sprom));
++ size = ARRAY_SIZE(bcm43217_sprom);
++ break;
++ case SPROM_BCM43225:
++ memcpy(&template_sprom, &bcm43225_sprom,
++ sizeof(bcm43225_sprom));
++ size = ARRAY_SIZE(bcm43225_sprom);
++ break;
++ case SPROM_BCM43227:
++ memcpy(&template_sprom, &bcm43227_sprom,
++ sizeof(bcm43227_sprom));
++ size = ARRAY_SIZE(bcm43227_sprom);
++ break;
++ case SPROM_BCM43228:
++ memcpy(&template_sprom, &bcm43228_sprom,
++ sizeof(bcm43228_sprom));
++ size = ARRAY_SIZE(bcm43228_sprom);
++ break;
++ case SPROM_BCM4331:
++ memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom));
++ size = ARRAY_SIZE(bcm4331_sprom);
++ break;
++#endif
+ case SPROM_DEFAULT:
+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+ sizeof(bcm63xx_sprom));
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -11,6 +11,14 @@ enum sprom_type {
+ SPROM_BCM4321,
+ SPROM_BCM4322,
+ SPROM_BCM43222,
++ /* BCMA based */
++ SPROM_BCM4313,
++ SPROM_BCM43131,
++ SPROM_BCM43217,
++ SPROM_BCM43225,
++ SPROM_BCM43227,
++ SPROM_BCM43228,
++ SPROM_BCM4331,
+ };
+
+ struct fallback_sprom_data {
--- /dev/null
+From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 19:12:33 +0200
+Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom
+ fixups
+
+Allow board_info files to supply fixups for the base sproms to adapt
+them to the actual used sprom contents in case they do not use the
+default ones.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 14 +++++++++++++-
+ .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 ++++++++
+ 2 files changed, 21 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro
+ return 0;
+ }
+
++void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n)
++{
++ unsigned int i;
++
++ for (i = 0; i < n; i++)
++ sprom[fixups[i].offset] = fixups[i].value;
++}
++
+ static __initdata u16 template_sprom[220];
+ #endif
+
+@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr
+ return -EINVAL;
+ }
+
+- if (size > 0)
++ if (size > 0) {
++ sprom_apply_fixups(template_sprom, data->board_fixups,
++ data->num_board_fixups);
++
+ sprom_extract(&bcm63xx_sprom, template_sprom, size);
++ }
+
+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -21,9 +21,17 @@ enum sprom_type {
+ SPROM_BCM4331,
+ };
+
++struct sprom_fixup {
++ u16 offset;
++ u16 value;
++};
++
+ struct fallback_sprom_data {
+ u8 mac_addr[ETH_ALEN];
+ enum sprom_type type;
++
++ struct sprom_fixup *board_fixups;
++ unsigned int num_board_fixups;
+ };
+
+ int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
--- /dev/null
+From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 31 Jul 2014 20:39:44 +0200
+Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for
+ fallback sprom
+
+Warn if the set pci bus/slot does not match the actual request.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/sprom.c | 31 ++++++++++++++++++----
+ .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 3 +++
+ 2 files changed, 29 insertions(+), 5 deletions(-)
+
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] =
+
+ #endif /* CONFIG_BCMA_HOST_PCI */
+
+-static struct ssb_sprom bcm63xx_sprom;
++struct fallback_sprom_match {
++ u8 pci_bus;
++ u8 pci_dev;
++ struct ssb_sprom sprom;
++};
++
++static struct fallback_sprom_match fallback_sprom;
+
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->bustype == SSB_BUSTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++ pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++ bus->host_pci->bus->number,
++ PCI_SLOT(bus->host_pci->devfn));
++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ return 0;
+ } else {
+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc
+ int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
+ {
+ if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
+- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
++ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
++ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
++ pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++ bus->host_pci->bus->number,
++ PCI_SLOT(bus->host_pci->devfn));
++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
+ return 0;
+ } else {
+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
+@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr
+ break;
+ #endif
+ case SPROM_DEFAULT:
+- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
+- sizeof(bcm63xx_sprom));
++ memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom,
++ sizeof(bcm63xx_default_sprom));
+ break;
+ default:
+ return -EINVAL;
+@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr
+ sprom_apply_fixups(template_sprom, data->board_fixups,
+ data->num_board_fixups);
+
+- sprom_extract(&bcm63xx_sprom, template_sprom, size);
++ sprom_extract(&fallback_sprom.sprom, template_sprom, size);
+ }
+
+- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
+- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
++ memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN);
++ memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN);
++ memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN);
++
++ fallback_sprom.pci_bus = data->pci_bus;
++ fallback_sprom.pci_dev = data->pci_dev;
+ #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
+
+ #if defined(CONFIG_SSB_PCIHOST)
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
+@@ -30,6 +30,9 @@ struct fallback_sprom_data {
+ u8 mac_addr[ETH_ALEN];
+ enum sprom_type type;
+
++ u8 pci_bus;
++ u8 pci_dev;
++
+ struct sprom_fixup *board_fixups;
+ unsigned int num_board_fixups;
+ };
--- /dev/null
+From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Tue, 24 Jun 2014 10:57:51 +0200
+Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/Kconfig | 4 ++++
+ arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++
+ arch/mips/bcm63xx/prom.c | 6 ++++++
+ 3 files changed, 44 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -2,6 +2,10 @@
+ menu "Board support"
+ depends on BCM63XX
+
++config BOARD_BCM63XX_DT
++ bool "Device Tree boards (experimential)"
++ select USE_OF
++
+ config BOARD_BCM963XX
+ bool "Generic Broadcom 963xx boards"
+ select SSB
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -10,11 +10,14 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/of_fdt.h>
++#include <linux/of_platform.h>
+ #include <linux/platform_device.h>
+ #include <linux/ssb/ssb.h>
+ #include <asm/addrspace.h>
+ #include <asm/bootinfo.h>
+ #include <asm/fw/cfe/cfe_api.h>
++#include <asm/prom.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_uart.h>
+@@ -125,8 +128,23 @@ void __init board_setup(void)
+ /* make sure we're running on expected cpu */
+ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
+ panic("unexpected CPU for bcm963xx board");
++
++#if CONFIG_OF
++ if (initial_boot_params)
++ __dt_setup_arch(initial_boot_params);
++#endif
+ }
+
++#if CONFIG_OF
++void __init device_tree_init(void)
++{
++ if (!initial_boot_params)
++ return;
++
++ unflatten_and_copy_device_tree();
++}
++#endif
++
+ static struct gpio_led_platform_data bcm63xx_led_data;
+
+ static struct platform_device bcm63xx_gpio_leds = {
+@@ -135,6 +153,13 @@ static struct platform_device bcm63xx_gp
+ .dev.platform_data = &bcm63xx_led_data,
+ };
+
++#if CONFIG_OF
++static struct of_device_id of_ids[] = {
++ { /* filled at runtime */ },
++ { .compatible = "simple-bus" },
++ { },
++};
++#endif
+ /*
+ * third stage init callback, register all board devices.
+ */
+@@ -142,6 +167,15 @@ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
+
++#if CONFIG_OF
++ if (of_have_populated_dt()) {
++ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
++ "brcm,bcm%x", bcm63xx_get_cpu_id());
++
++ of_platform_populate(NULL, of_ids, NULL, NULL);
++ }
++#endif
++
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+
+--- a/arch/mips/bcm63xx/prom.c
++++ b/arch/mips/bcm63xx/prom.c
+@@ -8,6 +8,7 @@
+
+ #include <linux/init.h>
+ #include <linux/bootmem.h>
++#include <linux/of_fdt.h>
+ #include <linux/smp.h>
+ #include <asm/bootinfo.h>
+ #include <asm/bmips.h>
+@@ -23,6 +24,11 @@ void __init prom_init(void)
+ {
+ u32 reg, mask;
+
++#if CONFIG_OF
++ if (fw_passed_dtb)
++ early_init_dt_verify((void *)fw_passed_dtb);
++#endif
++
+ bcm63xx_cpu_init();
+
+ /* stop any running watchdog */
--- /dev/null
+From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Thu, 26 Jun 2014 12:51:00 +0200
+Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info
+ by dtb
+
+Allow using the passed dtb's compatible property to match board_info
+structs instead of nvram's boardname field, which is not unique anyway.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 +++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.c | 18 ++++++++++++++++++
+ arch/mips/bcm63xx/boards/board_common.h | 3 +++
+ 3 files changed, 36 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -695,6 +695,10 @@ static const struct board_info __initcon
+ #endif
+ };
+
++static struct of_device_id const bcm963xx_boards_dt[] = {
++ { },
++};
++
+ /*
+ * early init callback, read nvram data from flash and checksum it
+ */
+@@ -706,6 +710,7 @@ void __init board_bcm963xx_init(void)
+ char *board_name = NULL;
+ u32 val;
+ struct bcm_hcs *hcs;
++ const struct of_device_id *board_match;
+
+ /* read base address of boot chip select (0)
+ * 6328/6362 do not have MPI but boot from a fixed address
+@@ -745,6 +750,16 @@ void __init board_bcm963xx_init(void)
+ } else {
+ board_name = bcm63xx_nvram_get_name();
+ }
++
++ /* find board by compat */
++ board_match = bcm63xx_match_board(bcm963xx_boards_dt);
++ if (board_match) {
++ board_early_setup(board_match->data,
++ bcm63xx_nvram_get_mac_address);
++
++ return;
++ }
++
+ /* find board by name */
+ for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
+ if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -239,3 +239,21 @@ int __init board_register_devices(void)
+
+ return 0;
+ }
++
++const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m)
++{
++ const struct of_device_id *match;
++ unsigned long dt_root;
++
++ if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params)
++ return NULL;
++
++ dt_root = of_get_flat_dt_root();
++
++ for (match = m; match->compatible[0]; match++) {
++ if (of_flat_dt_is_compatible(dt_root, match->compatible))
++ return match;
++ }
++
++ return NULL;
++}
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -1,11 +1,14 @@
+ #ifndef __BOARD_COMMON_H
+ #define __BOARD_COMMON_H
+
++#include <linux/of.h>
+ #include <board_bcm963xx.h>
+
+ void board_early_setup(const struct board_info *board,
+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
+
++const struct of_device_id *bcm63xx_match_board(const struct of_device_id *);
++
+ #if defined(CONFIG_BOARD_BCM963XX)
+ void board_bcm963xx_init(void);
+ #else
--- /dev/null
+From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 21 Nov 2014 16:54:06 +0100
+Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info
+ list
+
+Populate the compatible to board_info list to allow dtbs to be used
+for known boards.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 34 +++++++++++++++++++++++++++++
+ 1 file changed, 34 insertions(+)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -696,6 +696,48 @@ static const struct board_info __initcon
+ };
+
+ static struct of_device_id const bcm963xx_boards_dt[] = {
++#ifdef CONFIG_OF
++#ifdef CONFIG_BCM63XX_CPU_3368
++ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6338
++ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
++ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6345
++ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6348
++ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
++ { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
++ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
++ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
++ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
++ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
++ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
++ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
++ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
++ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6358
++ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
++ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
++ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
++ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
++ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
++ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++#endif
++#ifdef CONFIG_BCM63XX_CPU_6368
++#endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++#endif
++#endif /* CONFIG_OF */
+ { },
+ };
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -143,6 +143,18 @@ void __init device_tree_init(void)
+
+ unflatten_and_copy_device_tree();
+ }
++
++int board_of_device_present(const char *alias)
++{
++ bool present;
++ struct device_node *np;
++
++ np = of_find_node_by_path(alias);
++ present = of_device_is_available(np);
++ of_node_put(np);
++
++ return present;
++}
+ #endif
+
+ static struct gpio_led_platform_data bcm63xx_led_data;
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -15,4 +15,13 @@ void board_bcm963xx_init(void);
+ static inline void board_bcm963xx_init(void) { }
+ #endif
+
++#if defined(CONFIG_OF)
++int board_of_device_present(const char *alias);
++#else
++static inline void board_of_device_present(const char *alias)
++{
++ return 0;
++}
++#endif
++
+ #endif /* __BOARD_COMMON_H */
--- /dev/null
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -23,6 +23,8 @@
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+
++#include "boards/board_common.h"
++
+ static int flash_type;
+
+ static struct mtd_partition mtd_partitions[] = {
+@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void)
+
+ switch (flash_type) {
+ case BCM63XX_FLASH_TYPE_PARALLEL:
++ /* don't register when already registered through from dtb */
++ if (board_of_device_present("pflash"))
++ return 0;
+
+ if (!mtd_resources[0].start) {
+ /* read base address of boot chip select (0) */
--- /dev/null
+From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 1 Dec 2014 00:20:07 +0100
+Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/irq.c | 12 ++++++++++++
+ 1 file changed, 12 insertions(+)
+
+--- a/arch/mips/bcm63xx/irq.c
++++ b/arch/mips/bcm63xx/irq.c
+@@ -14,6 +14,8 @@
+ #include <linux/irqchip.h>
+ #include <linux/irqchip/irq-bcm6345-ext.h>
+ #include <linux/irqchip/irq-bcm6345-periph.h>
++#include <linux/of.h>
++#include <linux/of_fdt.h>
+ #include <asm/irq_cpu.h>
+ #include <asm/mipsregs.h>
+ #include <bcm63xx_cpu.h>
+@@ -21,6 +23,9 @@
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_irq.h>
+
++IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
++ mips_cpu_irq_of_init);
++
+ void __init arch_init_irq(void)
+ {
+ void __iomem *periph_bases[2];
+@@ -29,6 +34,13 @@ void __init arch_init_irq(void)
+ int periph_irqs[2] = { 2, 3 };
+ int ext_irqs[6];
+
++#ifdef CONFIG_OF
++ if (initial_boot_params) {
++ irqchip_init();
++ return;
++ }
++#endif
++
+ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
--- /dev/null
+From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 19:55:32 +0100
+Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/gpio/Kconfig | 8 +++
+ drivers/gpio/Makefile | 1 +
+ drivers/gpio/gpio-bcm63xx.c | 135 +++++++++++++++++++++++++++++++++++++++++++
+ 3 files changed, 131 insertions(+)
+ create mode 100644 drivers/gpio/gpio-bcm63xx.c
+
+--- a/drivers/gpio/Kconfig
++++ b/drivers/gpio/Kconfig
+@@ -151,6 +151,13 @@ config GPIO_BCM_KONA
+ help
+ Turn on GPIO support for Broadcom "Kona" chips.
+
++config GPIO_BCM63XX
++ bool "Broadcom BCM63XX GPIO"
++ depends on MIPS || COMPILE_TEST
++ select GPIO_GENERIC
++ help
++ Turn on GPIO support for Broadcom BCM63XX xDSL chips.
++
+ config GPIO_BRCMSTB
+ tristate "BRCMSTB GPIO support"
+ default y if (ARCH_BRCMSTB || BMIPS_GENERIC)
+--- a/drivers/gpio/Makefile
++++ b/drivers/gpio/Makefile
+@@ -34,6 +34,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
+ obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
+ obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
+ obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
++obj-$(CONFIG_GPIO_BCM63XX) += gpio-bcm63xx.o
+ obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
+ obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
+ obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
+--- /dev/null
++++ b/drivers/gpio/gpio-bcm63xx.c
+@@ -0,0 +1,135 @@
++/*
++ * Driver for BCM63XX memory-mapped GPIO controllers, based on
++ * Generic driver for memory-mapped GPIO controllers.
++ *
++ * Copyright 2008 MontaVista Software, Inc.
++ * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
++ * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License as published by the
++ * Free Software Foundation; either version 2 of the License, or (at your
++ * option) any later version.
++ */
++
++#include <linux/init.h>
++#include <linux/err.h>
++#include <linux/bug.h>
++#include <linux/kernel.h>
++#include <linux/module.h>
++#include <linux/spinlock.h>
++#include <linux/compiler.h>
++#include <linux/types.h>
++#include <linux/errno.h>
++#include <linux/log2.h>
++#include <linux/ioport.h>
++#include <linux/io.h>
++#include <linux/gpio.h>
++#include <linux/gpio/driver.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++#include <linux/mod_devicetable.h>
++#include <linux/of.h>
++#include <linux/of_irq.h>
++#include <linux/of_gpio.h>
++
++static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
++{
++ char irq_name[7]; /* "gpioXX" */
++
++ sprintf(irq_name, "gpio%d", gpio);
++ return of_irq_get_byname(chip->of_node, irq_name);
++}
++
++static int bcm63xx_gpio_probe(struct platform_device *pdev)
++{
++ struct device *dev = &pdev->dev;
++ struct resource *dat_r, *dirout_r;
++ void __iomem *dat;
++ void __iomem *dirout;
++ unsigned long sz;
++ int err;
++ struct gpio_chip *gc;
++ struct bgpio_pdata *pdata = dev_get_platdata(dev);
++
++ dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
++ dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
++ if (!dat_r || !dirout_r)
++ return -EINVAL;
++
++ if (resource_size(dat_r) != resource_size(dirout_r))
++ return -EINVAL;
++
++ sz = resource_size(dat_r);
++
++ dat = devm_ioremap_resource(dev, dat_r);
++ if (IS_ERR(dat))
++ return PTR_ERR(dat);
++
++ dirout = devm_ioremap_resource(dev, dirout_r);
++ if (IS_ERR(dirout))
++ return PTR_ERR(dirout);
++
++ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
++ if (!gc)
++ return -ENOMEM;
++
++ err = bgpio_init(gc, dev, sz, dat, NULL, NULL, dirout, NULL,
++ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
++ if (err)
++ return err;
++
++ platform_set_drvdata(pdev, gc);
++
++ if (dev->of_node) {
++ int id = of_alias_get_id(dev->of_node, "gpio");
++ u32 ngpios;
++
++ if (id >= 0)
++ gc->label = devm_kasprintf(dev, GFP_KERNEL,
++ "bcm63xx-gpio.%d", id);
++
++ if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios))
++ gc->ngpio = ngpios;
++
++ if (of_get_property(dev->of_node, "interrupt-names", NULL))
++ gc->to_irq = bcm63xx_gpio_to_irq;
++
++ } else if (pdata) {
++ gc->base = pdata->base;
++ if (pdata->ngpio > 0)
++ gc->ngpio = pdata->ngpio;
++ }
++
++ return gpiochip_add(gc);
++}
++
++static int bcm63xx_gpio_remove(struct platform_device *pdev)
++{
++ struct gpio_chip *gc = platform_get_drvdata(pdev);
++
++ gpiochip_remove(gc);
++ return 0;
++}
++
++#ifdef CONFIG_OF
++static struct of_device_id bcm63xx_gpio_of_match[] = {
++ { .compatible = "brcm,bcm6345-gpio" },
++ { },
++};
++#endif
++
++static struct platform_driver bcm63xx_gpio_driver = {
++ .probe = bcm63xx_gpio_probe,
++ .remove = bcm63xx_gpio_remove,
++ .driver = {
++ .name = "bcm63xx-gpio",
++ .of_match_table = of_match_ptr(bcm63xx_gpio_of_match),
++ },
++};
++
++module_platform_driver(bcm63xx_gpio_driver);
++
++MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers");
++MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
++MODULE_LICENSE("GPL");
--- /dev/null
+From 302f69453721e5ee19f583339a3a646821d4a173 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Fri, 20 Feb 2015 23:58:54 +0100
+Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_common.c | 2 +
+ arch/mips/bcm63xx/gpio.c | 145 ++++++++++------------------------------------
+ arch/mips/bcm63xx/setup.c | 3 -
+ 3 files changed, 32 insertions(+), 118 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -188,6 +188,8 @@ int __init board_register_devices(void)
+ }
+ #endif
+
++ bcm63xx_gpio_init();
++
+ if (board.has_uart0)
+ bcm63xx_uart_register(0);
+
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -5,147 +5,62 @@
+ *
+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+ * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
++ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+ */
+
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+-#include <linux/spinlock.h>
+ #include <linux/platform_device.h>
+ #include <linux/gpio/driver.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+-#include <bcm63xx_io.h>
+ #include <bcm63xx_regs.h>
+
+-static u32 gpio_out_low_reg;
+-
+-static void bcm63xx_gpio_out_low_reg_init(void)
++static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+- switch (bcm63xx_get_cpu_id()) {
+- case BCM6345_CPU_ID:
+- gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
+- break;
+- default:
+- gpio_out_low_reg = GPIO_DATA_LO_REG;
+- break;
+- }
+-}
+-
+-static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
+-static u32 gpio_out_low, gpio_out_high;
++ struct resource res[2];
++ struct bgpio_pdata pdata;
+
+-static void bcm63xx_gpio_set(struct gpio_chip *chip,
+- unsigned gpio, int val)
+-{
+- u32 reg;
+- u32 mask;
+- u32 *v;
+- unsigned long flags;
+-
+- if (gpio >= chip->ngpio)
+- BUG();
+-
+- if (gpio < 32) {
+- reg = gpio_out_low_reg;
+- mask = 1 << gpio;
+- v = &gpio_out_low;
+- } else {
+- reg = GPIO_DATA_HI_REG;
+- mask = 1 << (gpio - 32);
+- v = &gpio_out_high;
+- }
+-
+- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+- if (val)
+- *v |= mask;
+- else
+- *v &= ~mask;
+- bcm_gpio_writel(*v, reg);
+- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
+-}
++ memset(res, 0, sizeof(res));
++ memset(&pdata, 0, sizeof(pdata));
+
+-static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
+-{
+- u32 reg;
+- u32 mask;
++ res[0].flags = IORESOURCE_MEM;
++ res[0].start = bcm63xx_regset_address(RSET_GPIO);
++ res[0].start += dir;
+
+- if (gpio >= chip->ngpio)
+- BUG();
++ res[0].end = res[0].start + 3;
+
+- if (gpio < 32) {
+- reg = gpio_out_low_reg;
+- mask = 1 << gpio;
+- } else {
+- reg = GPIO_DATA_HI_REG;
+- mask = 1 << (gpio - 32);
+- }
++ res[1].flags = IORESOURCE_MEM;
++ res[1].start = bcm63xx_regset_address(RSET_GPIO);
++ res[1].start += data;
+
+- return !!(bcm_gpio_readl(reg) & mask);
+-}
++ res[1].end = res[1].start + 3;
+
+-static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
+- unsigned gpio, int dir)
+-{
+- u32 reg;
+- u32 mask;
+- u32 tmp;
+- unsigned long flags;
+-
+- if (gpio >= chip->ngpio)
+- BUG();
+-
+- if (gpio < 32) {
+- reg = GPIO_CTL_LO_REG;
+- mask = 1 << gpio;
+- } else {
+- reg = GPIO_CTL_HI_REG;
+- mask = 1 << (gpio - 32);
+- }
+-
+- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
+- tmp = bcm_gpio_readl(reg);
+- if (dir == BCM63XX_GPIO_DIR_IN)
+- tmp &= ~mask;
+- else
+- tmp |= mask;
+- bcm_gpio_writel(tmp, reg);
+- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
++ pdata.base = id * 32;
++ pdata.ngpio = ngpio;
+
+- return 0;
++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
++ &pdata, sizeof(pdata));
+ }
+
+-static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
++int __init bcm63xx_gpio_init(void)
+ {
+- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
+-}
++ int ngpio = bcm63xx_gpio_count();
++ int data_low_reg;
+
+-static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
+- unsigned gpio, int value)
+-{
+- bcm63xx_gpio_set(chip, gpio, value);
+- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
+-}
++ if (BCMCPU_IS_6345())
++ data_low_reg = GPIO_DATA_LO_REG_6345;
++ else
++ data_low_reg = GPIO_DATA_LO_REG;
+
++ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
+
+-static struct gpio_chip bcm63xx_gpio_chip = {
+- .label = "bcm63xx-gpio",
+- .direction_input = bcm63xx_gpio_direction_input,
+- .direction_output = bcm63xx_gpio_direction_output,
+- .get = bcm63xx_gpio_get,
+- .set = bcm63xx_gpio_set,
+- .base = 0,
+-};
++ if (ngpio <= 32)
++ return 0;
+
+-int __init bcm63xx_gpio_init(void)
+-{
+- bcm63xx_gpio_out_low_reg_init();
++ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
+
+- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
+- if (!BCMCPU_IS_6345())
+- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
+- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
+- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
++ return 0;
+
+- return gpiochip_add_data(&bcm63xx_gpio_chip, NULL);
+ }
+--- a/arch/mips/bcm63xx/setup.c
++++ b/arch/mips/bcm63xx/setup.c
+@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
+
+ int __init bcm63xx_register_devices(void)
+ {
+- /* register gpiochip */
+- bcm63xx_gpio_init();
+-
+ return board_register_devices();
+ }
+
--- /dev/null
+From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:21:59 +0100
+Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio
+
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
+ arch/mips/bcm63xx/boards/board_common.c | 7 +++--
+ arch/mips/bcm63xx/gpio.c | 32 ++++++++++++++++++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 ++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 5 +--
+ 5 files changed, 42 insertions(+), 6 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -55,7 +55,7 @@ static struct board_info __initdata boar
+ },
+
+ .ephy_reset_gpio = 36,
+- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+ };
+ #endif
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -247,9 +247,10 @@ int __init board_register_devices(void)
+
+ platform_device_register(&bcm63xx_gpio_leds);
+
+- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
+- gpio_request_one(board.ephy_reset_gpio,
+- board.ephy_reset_gpio_flags, "ephy-reset");
++ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) {
++ bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio,
++ board.ephy_reset_gpio_flags);
++ }
+
+ return 0;
+ }
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -8,15 +8,23 @@
+ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
+ */
+
++#include <asm/addrspace.h>
++
+ #include <linux/kernel.h>
+ #include <linux/init.h>
+ #include <linux/platform_device.h>
+ #include <linux/gpio/driver.h>
++#include <linux/gpio/machine.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+
++static const char * const gpio_chip_labels[] = {
++ "bcm63xx-gpio.0",
++ "bcm63xx-gpio.1",
++};
++
+ static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
+ {
+ struct resource res[2];
+@@ -64,3 +72,25 @@ int __init bcm63xx_gpio_init(void)
+ return 0;
+
+ }
++
++static struct gpiod_lookup_table ephy_reset = {
++ .dev_id = "bcm63xx_enet-0",
++ .table = {
++ { /* filled at runtime */ },
++ { },
++ },
++};
++
++
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags)
++{
++ if (ephy_reset.table[0].chip_label)
++ return;
++
++ ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32];
++ ephy_reset.table[0].chip_hwnum = hw_gpio % 32;
++ ephy_reset.table[0].con_id = "reset";
++ ephy_reset.table[0].flags = flags;
++
++ gpiod_add_lookup_table(&ephy_reset);
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
+@@ -3,9 +3,11 @@
+ #define BCM63XX_GPIO_H
+
+ #include <linux/init.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cpu.h>
+
+ int __init bcm63xx_gpio_init(void);
++void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags);
+
+ static inline unsigned long bcm63xx_gpio_count(void)
+ {
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -4,6 +4,7 @@
+
+ #include <linux/types.h>
+ #include <linux/gpio.h>
++#include <linux/gpio/machine.h>
+ #include <linux/leds.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+@@ -50,8 +51,8 @@ struct board_info {
+ /* External PHY reset GPIO */
+ unsigned int ephy_reset_gpio;
+
+- /* External PHY reset GPIO flags from gpio.h */
+- unsigned long ephy_reset_gpio_flags;
++ /* External PHY reset GPIO flags from gpio/machine.h */
++ enum gpio_lookup_flags ephy_reset_gpio_flags;
+
+ /* fallback sprom config */
+ struct fallback_sprom_data fallback_sprom;
--- /dev/null
+From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sat, 21 Feb 2015 17:26:50 +0100
+Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if
+present in dtb
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/gpio.c | 7 +++++--
+ 1 file changed, 5 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/gpio.c
++++ b/arch/mips/bcm63xx/gpio.c
+@@ -20,6 +20,8 @@
+ #include <bcm63xx_gpio.h>
+ #include <bcm63xx_regs.h>
+
++#include "boards/board_common.h"
++
+ static const char * const gpio_chip_labels[] = {
+ "bcm63xx-gpio.0",
+ "bcm63xx-gpio.1",
+@@ -48,8 +50,10 @@ static void __init bcm63xx_gpio_init_one
+ pdata.base = id * 32;
+ pdata.ngpio = ngpio;
+
+- platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
+- &pdata, sizeof(pdata));
++ if (!board_of_device_present("gpio0") &&
++ !board_of_device_present("pinctrl"))
++ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res,
++ 2, &pdata, sizeof(pdata));
+ }
+
+ int __init bcm63xx_gpio_init(void)
--- /dev/null
+From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:52:02 +0100
+Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia
+ ready gpio
+
+To prepare for a time when gpiobases don't need to be fixed anymore.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-pcmcia.c | 13 +++++++++++++
+ 1 file changed, 13 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-pcmcia.c
++++ b/arch/mips/bcm63xx/dev-pcmcia.c
+@@ -10,6 +10,7 @@
+ #include <linux/kernel.h>
+ #include <asm/bootinfo.h>
+ #include <linux/platform_device.h>
++#include <linux/gpio/machine.h>
+ #include <bcm63xx_cs.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_pcmcia.h>
+@@ -101,6 +102,14 @@ static const struct {
+ },
+ };
+
++static struct gpiod_lookup_table pcmcia_gpios_table = {
++ .dev_id = "bcm63xx_pcmcia.0",
++ .table = {
++ GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH),
++ { },
++ },
++};
++
+ int __init bcm63xx_pcmcia_register(void)
+ {
+ int ret, i;
+@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void)
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6348_CPU_ID:
+ pd.ready_gpio = 22;
++ pcmcia_gpios_table.table[0].chip_hwnum = 22;
+ break;
+
+ case BCM6358_CPU_ID:
+ pd.ready_gpio = 18;
++ pcmcia_gpios_table.table[0].chip_hwnum = 18;
+ break;
+
+ default:
+ return -ENODEV;
+ }
+
++ gpiod_add_lookup_table(&pcmcia_gpios_table);
++
+ pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
+ pcmcia_resources[0].end = pcmcia_resources[0].start +
+ RSET_PCMCIA_SIZE - 1;
--- /dev/null
+From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Wed, 25 Mar 2015 13:54:56 +0100
+Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio
+
+Use the new named gpio instead of relying on the hardware gpio numbers
+matching the virtual gpio numbers.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ drivers/pcmcia/bcm63xx_pcmcia.c | 9 ++++++++-
+ drivers/pcmcia/bcm63xx_pcmcia.h | 4 ++++
+ 2 files changed, 12 insertions(+), 1 deletion(-)
+
+--- a/drivers/pcmcia/bcm63xx_pcmcia.c
++++ b/drivers/pcmcia/bcm63xx_pcmcia.c
+@@ -237,7 +237,7 @@ static unsigned int __get_socket_status(
+ stat |= SS_XVCARD;
+ stat |= SS_POWERON;
+
+- if (gpio_get_value(skt->pd->ready_gpio))
++ if (gpiod_get_value(skt->ready_gpio))
+ stat |= SS_READY;
+
+ return stat;
+@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru
+ goto err;
+ }
+
++ /* get ready gpio */
++ skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN);
++ if (IS_ERR(skt->ready_gpio)) {
++ ret = PTR_ERR(skt->ready_gpio);
++ goto err;
++ }
++
+ /* resources are static */
+ sock->resource_ops = &pccard_static_ops;
+ sock->ops = &bcm63xx_pcmcia_operations;
+--- a/drivers/pcmcia/bcm63xx_pcmcia.h
++++ b/drivers/pcmcia/bcm63xx_pcmcia.h
+@@ -4,6 +4,7 @@
+
+ #include <linux/types.h>
+ #include <linux/timer.h>
++#include <linux/gpio/consumer.h>
+ #include <pcmcia/ss.h>
+ #include <bcm63xx_dev_pcmcia.h>
+
+@@ -56,6 +57,9 @@ struct bcm63xx_pcmcia_socket {
+
+ /* base address of io memory */
+ void __iomem *io_base;
++
++ /* ready gpio */
++ struct gpio_desc *ready_gpio;
+ };
+
+ #endif /* BCM63XX_PCMCIA_H_ */
--- /dev/null
+From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Wed, 27 Jul 2016 11:38:05 +0200
+Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding
+ documentation
+
+Add binding documentation for the pincontrol core found in BCM6318 SoCs.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt | 79 ++++++++++++++++++++++
+ 1 file changed, 79 insertions(+)
+ create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
+
+--- /dev/null
++++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
+@@ -0,0 +1,79 @@
++* Broadcom BCM6318 pin controller
++
++Required properties:
++- compatible: Must be "brcm,bcm6318-pinctrl".
++- regs: Register specifiers of dirout, dat, mode, mux, and pad registers.
++- reg-names: Must be "dirout", "dat", "mode", "mux", "pad".
++- gpio-controller: Identifies this node as a gpio controller.
++- #gpio-cells: Must be <2>.
++
++Example:
++
++pinctrl: pin-controller@10000080 {
++ compatible = "brcm,bcm6318-pinctrl";
++ reg = <0x10000080 0x08>,
++ <0x10000088 0x08>,
++ <0x10000098 0x04>,
++ <0x1000009c 0x0c>,
++ <0x100000d4 0x18>;
++ reg-names = "dirout", "dat", "mode", "mux", "pad";
++
++ gpio-controller;
++ #gpio-cells = <2>;
++};
++
++
++Available pins/groups and functions:
++
++name pins functions
++-----------------------------------------------------------
++gpio0 0 led, ephy0_spd_led
++gpio1 1 led, ephy1_spd_led
++gpio2 2 led, ephy2_spd_led
++gpio3 3 led, ephy3_spd_led
++gpio4 4 led, ephy0_act_led
++gpio5 5 led, ephy1_act_led
++gpio6 6 led, ephy2_act_led, serial_led_data
++gpio7 7 led, ephy3_act_led, serial_led_clk
++gpio8 8 led, inet_act_led
++gpio9 9 led, inet_fail_led
++gpio10 10 led, dsl_led
++gpio11 11 led, post_fail_led
++gpio12 12 led, wlan_wps_led
++gpio13 13 led, usb_pwron, usb_device_led
++gpio14 14 led
++gpio15 15 led
++gpio16 16 led
++gpio17 17 led
++gpio18 18 led
++gpio19 19 led
++gpio20 20 led
++gpio21 21 led
++gpio22 22 led
++gpio23 23 led
++gpio24 24 -
++gpio25 25 -
++gpio26 26 -
++gpio27 27 -
++gpio28 28 -
++gpio29 29 -
++gpio30 30 -
++gpio31 31 -
++gpio32 32 -
++gpio33 33 -
++gpio34 34 -
++gpio35 35 -
++gpio36 36 -
++gpio37 37 -
++gpio38 38 -
++gpio39 39 -
++gpio40 40 usb_active
++gpio41 41 -
++gpio42 42 -
++gpio43 43 -
++gpio44 44 -
++gpio45 45 -
++gpio46 46 -
++gpio47 47 -
++gpio48 48 -
++gpio49 49 -
--- /dev/null
+From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 24 Jun 2016 22:20:39 +0200
+Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
+
+Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
+to different functions. BCM6318 is similar to BCM6328 with the addition
+of a pad register, and the GPIO meaning of the mux register changes
+based on the GPIO number.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/pinctrl/bcm63xx/Kconfig | 7 +
+ drivers/pinctrl/bcm63xx/Makefile | 1 +
+ drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
+ 3 files changed, 572 insertions(+)
+ create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
+
+--- a/drivers/pinctrl/bcm63xx/Kconfig
++++ b/drivers/pinctrl/bcm63xx/Kconfig
+@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX
+ bool
+ select GPIO_GENERIC
+
++config PINCTRL_BCM6318
++ bool "BCM6318 pincontrol driver" if COMPILE_TEST
++ select PINMUX
++ select PINCONF
++ select PINCTRL_BCM63XX
++ select GENERIC_PINCONF
++
+ config PINCTRL_BCM6328
+ bool "BCM6328 pincontrol driver" if COMPILE_TEST
+ select PINMUX
+--- a/drivers/pinctrl/bcm63xx/Makefile
++++ b/drivers/pinctrl/bcm63xx/Makefile
+@@ -1,4 +1,5 @@
+ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
++obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o
+ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
+ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
+ obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
+--- /dev/null
++++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
+@@ -0,0 +1,564 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
++ */
++
++#include <linux/kernel.h>
++#include <linux/spinlock.h>
++#include <linux/bitops.h>
++#include <linux/gpio.h>
++#include <linux/gpio/driver.h>
++#include <linux/of.h>
++#include <linux/of_gpio.h>
++#include <linux/slab.h>
++#include <linux/platform_device.h>
++
++#include <linux/pinctrl/pinconf.h>
++#include <linux/pinctrl/pinconf-generic.h>
++#include <linux/pinctrl/pinmux.h>
++#include <linux/pinctrl/machine.h>
++
++#include "../core.h"
++#include "../pinctrl-utils.h"
++
++#include "pinctrl-bcm63xx.h"
++
++#define BCM6318_NGPIO 50
++
++struct bcm6318_pingroup {
++ const char *name;
++ const unsigned * const pins;
++ const unsigned num_pins;
++};
++
++struct bcm6318_function {
++ const char *name;
++ const char * const *groups;
++ const unsigned num_groups;
++
++ unsigned mode_val:1;
++ unsigned mux_val:2;
++};
++
++struct bcm6318_pinctrl {
++ struct pinctrl_dev *pctldev;
++ struct pinctrl_desc desc;
++
++ void __iomem *mode;
++ void __iomem *mux[3];
++ void __iomem *pad[6];
++
++ /* register access lock */
++ spinlock_t lock;
++
++ struct gpio_chip gpio[2];
++};
++
++static const struct pinctrl_pin_desc bcm6318_pins[] = {
++ PINCTRL_PIN(0, "gpio0"),
++ PINCTRL_PIN(1, "gpio1"),
++ PINCTRL_PIN(2, "gpio2"),
++ PINCTRL_PIN(3, "gpio3"),
++ PINCTRL_PIN(4, "gpio4"),
++ PINCTRL_PIN(5, "gpio5"),
++ PINCTRL_PIN(6, "gpio6"),
++ PINCTRL_PIN(7, "gpio7"),
++ PINCTRL_PIN(8, "gpio8"),
++ PINCTRL_PIN(9, "gpio9"),
++ PINCTRL_PIN(10, "gpio10"),
++ PINCTRL_PIN(11, "gpio11"),
++ PINCTRL_PIN(12, "gpio12"),
++ PINCTRL_PIN(13, "gpio13"),
++ PINCTRL_PIN(14, "gpio14"),
++ PINCTRL_PIN(15, "gpio15"),
++ PINCTRL_PIN(16, "gpio16"),
++ PINCTRL_PIN(17, "gpio17"),
++ PINCTRL_PIN(18, "gpio18"),
++ PINCTRL_PIN(19, "gpio19"),
++ PINCTRL_PIN(20, "gpio20"),
++ PINCTRL_PIN(21, "gpio21"),
++ PINCTRL_PIN(22, "gpio22"),
++ PINCTRL_PIN(23, "gpio23"),
++ PINCTRL_PIN(24, "gpio24"),
++ PINCTRL_PIN(25, "gpio25"),
++ PINCTRL_PIN(26, "gpio26"),
++ PINCTRL_PIN(27, "gpio27"),
++ PINCTRL_PIN(28, "gpio28"),
++ PINCTRL_PIN(29, "gpio29"),
++ PINCTRL_PIN(30, "gpio30"),
++ PINCTRL_PIN(31, "gpio31"),
++ PINCTRL_PIN(32, "gpio32"),
++ PINCTRL_PIN(33, "gpio33"),
++ PINCTRL_PIN(34, "gpio34"),
++ PINCTRL_PIN(35, "gpio35"),
++ PINCTRL_PIN(36, "gpio36"),
++ PINCTRL_PIN(37, "gpio37"),
++ PINCTRL_PIN(38, "gpio38"),
++ PINCTRL_PIN(39, "gpio39"),
++ PINCTRL_PIN(40, "gpio40"),
++ PINCTRL_PIN(41, "gpio41"),
++ PINCTRL_PIN(42, "gpio42"),
++ PINCTRL_PIN(43, "gpio43"),
++ PINCTRL_PIN(44, "gpio44"),
++ PINCTRL_PIN(45, "gpio45"),
++ PINCTRL_PIN(46, "gpio46"),
++ PINCTRL_PIN(47, "gpio47"),
++ PINCTRL_PIN(48, "gpio48"),
++ PINCTRL_PIN(49, "gpio49"),
++};
++
++static unsigned gpio0_pins[] = { 0 };
++static unsigned gpio1_pins[] = { 1 };
++static unsigned gpio2_pins[] = { 2 };
++static unsigned gpio3_pins[] = { 3 };
++static unsigned gpio4_pins[] = { 4 };
++static unsigned gpio5_pins[] = { 5 };
++static unsigned gpio6_pins[] = { 6 };
++static unsigned gpio7_pins[] = { 7 };
++static unsigned gpio8_pins[] = { 8 };
++static unsigned gpio9_pins[] = { 9 };
++static unsigned gpio10_pins[] = { 10 };
++static unsigned gpio11_pins[] = { 11 };
++static unsigned gpio12_pins[] = { 12 };
++static unsigned gpio13_pins[] = { 13 };
++static unsigned gpio14_pins[] = { 14 };
++static unsigned gpio15_pins[] = { 15 };
++static unsigned gpio16_pins[] = { 16 };
++static unsigned gpio17_pins[] = { 17 };
++static unsigned gpio18_pins[] = { 18 };
++static unsigned gpio19_pins[] = { 19 };
++static unsigned gpio20_pins[] = { 20 };
++static unsigned gpio21_pins[] = { 21 };
++static unsigned gpio22_pins[] = { 22 };
++static unsigned gpio23_pins[] = { 23 };
++static unsigned gpio24_pins[] = { 24 };
++static unsigned gpio25_pins[] = { 25 };
++static unsigned gpio26_pins[] = { 26 };
++static unsigned gpio27_pins[] = { 27 };
++static unsigned gpio28_pins[] = { 28 };
++static unsigned gpio29_pins[] = { 29 };
++static unsigned gpio30_pins[] = { 30 };
++static unsigned gpio31_pins[] = { 31 };
++static unsigned gpio32_pins[] = { 32 };
++static unsigned gpio33_pins[] = { 33 };
++static unsigned gpio34_pins[] = { 34 };
++static unsigned gpio35_pins[] = { 35 };
++static unsigned gpio36_pins[] = { 36 };
++static unsigned gpio37_pins[] = { 37 };
++static unsigned gpio38_pins[] = { 38 };
++static unsigned gpio39_pins[] = { 39 };
++static unsigned gpio40_pins[] = { 40 };
++static unsigned gpio41_pins[] = { 41 };
++static unsigned gpio42_pins[] = { 42 };
++static unsigned gpio43_pins[] = { 43 };
++static unsigned gpio44_pins[] = { 44 };
++static unsigned gpio45_pins[] = { 45 };
++static unsigned gpio46_pins[] = { 46 };
++static unsigned gpio47_pins[] = { 47 };
++static unsigned gpio48_pins[] = { 48 };
++static unsigned gpio49_pins[] = { 49 };
++
++#define BCM6318_GROUP(n) \
++ { \
++ .name = #n, \
++ .pins = n##_pins, \
++ .num_pins = ARRAY_SIZE(n##_pins), \
++ }
++
++static struct bcm6318_pingroup bcm6318_groups[] = {
++ BCM6318_GROUP(gpio0),
++ BCM6318_GROUP(gpio1),
++ BCM6318_GROUP(gpio2),
++ BCM6318_GROUP(gpio3),
++ BCM6318_GROUP(gpio4),
++ BCM6318_GROUP(gpio5),
++ BCM6318_GROUP(gpio6),
++ BCM6318_GROUP(gpio7),
++ BCM6318_GROUP(gpio8),
++ BCM6318_GROUP(gpio9),
++ BCM6318_GROUP(gpio10),
++ BCM6318_GROUP(gpio11),
++ BCM6318_GROUP(gpio12),
++ BCM6318_GROUP(gpio13),
++ BCM6318_GROUP(gpio14),
++ BCM6318_GROUP(gpio15),
++ BCM6318_GROUP(gpio16),
++ BCM6318_GROUP(gpio17),
++ BCM6318_GROUP(gpio18),
++ BCM6318_GROUP(gpio19),
++ BCM6318_GROUP(gpio20),
++ BCM6318_GROUP(gpio21),
++ BCM6318_GROUP(gpio22),
++ BCM6318_GROUP(gpio23),
++ BCM6318_GROUP(gpio24),
++ BCM6318_GROUP(gpio25),
++ BCM6318_GROUP(gpio26),
++ BCM6318_GROUP(gpio27),
++ BCM6318_GROUP(gpio28),
++ BCM6318_GROUP(gpio29),
++ BCM6318_GROUP(gpio30),
++ BCM6318_GROUP(gpio31),
++ BCM6318_GROUP(gpio32),
++ BCM6318_GROUP(gpio33),
++ BCM6318_GROUP(gpio34),
++ BCM6318_GROUP(gpio35),
++ BCM6318_GROUP(gpio36),
++ BCM6318_GROUP(gpio37),
++ BCM6318_GROUP(gpio38),
++ BCM6318_GROUP(gpio39),
++ BCM6318_GROUP(gpio40),
++ BCM6318_GROUP(gpio41),
++ BCM6318_GROUP(gpio42),
++ BCM6318_GROUP(gpio43),
++ BCM6318_GROUP(gpio44),
++ BCM6318_GROUP(gpio45),
++ BCM6318_GROUP(gpio46),
++ BCM6318_GROUP(gpio47),
++ BCM6318_GROUP(gpio48),
++ BCM6318_GROUP(gpio49),
++};
++
++/* GPIO_MODE */
++static const char * const led_groups[] = {
++ "gpio0",
++ "gpio1",
++ "gpio2",
++ "gpio3",
++ "gpio4",
++ "gpio5",
++ "gpio6",
++ "gpio7",
++ "gpio8",
++ "gpio9",
++ "gpio10",
++ "gpio11",
++ "gpio12",
++ "gpio13",
++ "gpio14",
++ "gpio15",
++ "gpio16",
++ "gpio17",
++ "gpio18",
++ "gpio19",
++ "gpio20",
++ "gpio21",
++ "gpio22",
++ "gpio23",
++};
++
++/* PINMUX_SEL */
++static const char * const ephy0_spd_led_groups[] = {
++ "gpio0",
++};
++
++static const char * const ephy1_spd_led_groups[] = {
++ "gpio1",
++};
++
++static const char * const ephy2_spd_led_groups[] = {
++ "gpio2",
++};
++
++static const char * const ephy3_spd_led_groups[] = {
++ "gpio3",
++};
++
++static const char * const ephy0_act_led_groups[] = {
++ "gpio4",
++};
++
++static const char * const ephy1_act_led_groups[] = {
++ "gpio5",
++};
++
++static const char * const ephy2_act_led_groups[] = {
++ "gpio6",
++};
++
++static const char * const ephy3_act_led_groups[] = {
++ "gpio7",
++};
++
++static const char * const serial_led_data_groups[] = {
++ "gpio6",
++};
++
++static const char * const serial_led_clk_groups[] = {
++ "gpio7",
++};
++
++static const char * const inet_act_led_groups[] = {
++ "gpio8",
++};
++
++static const char * const inet_fail_led_groups[] = {
++ "gpio9",
++};
++
++static const char * const dsl_led_groups[] = {
++ "gpio10",
++};
++
++static const char * const post_fail_led_groups[] = {
++ "gpio11",
++};
++
++static const char * const wlan_wps_led_groups[] = {
++ "gpio12",
++};
++
++static const char * const usb_pwron_groups[] = {
++ "gpio13",
++};
++
++static const char * const usb_device_led_groups[] = {
++ "gpio13",
++};
++
++static const char * const usb_active_groups[] = {
++ "gpio40",
++};
++
++#define BCM6318_MODE_FUN(n) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mode_val = 1, \
++ }
++
++#define BCM6318_MUX_FUN(n, mux) \
++ { \
++ .name = #n, \
++ .groups = n##_groups, \
++ .num_groups = ARRAY_SIZE(n##_groups), \
++ .mux_val = mux, \
++ }
++
++static const struct bcm6318_function bcm6318_funcs[] = {
++ BCM6318_MODE_FUN(led),
++ BCM6318_MUX_FUN(ephy0_spd_led, 1),
++ BCM6318_MUX_FUN(ephy1_spd_led, 1),
++ BCM6318_MUX_FUN(ephy2_spd_led, 1),
++ BCM6318_MUX_FUN(ephy3_spd_led, 1),
++ BCM6318_MUX_FUN(ephy0_act_led, 1),
++ BCM6318_MUX_FUN(ephy1_act_led, 1),
++ BCM6318_MUX_FUN(ephy2_act_led, 1),
++ BCM6318_MUX_FUN(ephy3_act_led, 1),
++ BCM6318_MUX_FUN(serial_led_data, 3),
++ BCM6318_MUX_FUN(serial_led_clk, 3),
++ BCM6318_MUX_FUN(inet_act_led, 1),
++ BCM6318_MUX_FUN(inet_fail_led, 1),
++ BCM6318_MUX_FUN(dsl_led, 1),
++ BCM6318_MUX_FUN(post_fail_led, 1),
++ BCM6318_MUX_FUN(wlan_wps_led, 1),
++ BCM6318_MUX_FUN(usb_pwron, 1),
++ BCM6318_MUX_FUN(usb_device_led, 2),
++ BCM6318_MUX_FUN(usb_active, 2),
++};
++
++static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6318_groups);
++}
++
++static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
++ unsigned group)
++{
++ return bcm6318_groups[group].name;
++}
++
++static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
++ unsigned group, const unsigned **pins,
++ unsigned *num_pins)
++{
++ *pins = bcm6318_groups[group].pins;
++ *num_pins = bcm6318_groups[group].num_pins;
++
++ return 0;
++}
++
++static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
++{
++ return ARRAY_SIZE(bcm6318_funcs);
++}
++
++static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
++ unsigned selector)
++{
++ return bcm6318_funcs[selector].name;
++}
++
++static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
++ unsigned selector,
++ const char * const **groups,
++ unsigned * const num_groups)
++{
++ *groups = bcm6318_funcs[selector].groups;
++ *num_groups = bcm6318_funcs[selector].num_groups;
++
++ return 0;
++}
++
++static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
++ u32 mode, u32 mux)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ if (pin < 32) {
++ reg = __raw_readl(pctl->mode);
++ reg &= ~BIT(pin);
++ if (mode)
++ reg |= BIT(pin);
++ __raw_writel(reg, pctl->mode);
++ }
++
++ if (pin < 48) {
++ reg = __raw_readl(pctl->mux[pin / 16]);
++ reg &= ~(3UL << ((pin % 16) * 2));
++ reg |= mux << ((pin % 16) * 2);
++ __raw_writel(reg, pctl->mux[pin / 16]);
++ }
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
++{
++ unsigned long flags;
++ u32 reg;
++
++ spin_lock_irqsave(&pctl->lock, flags);
++ reg = __raw_readl(pctl->pad[pin / 8]);
++ reg &= ~(0xfUL << ((pin % 8) * 4));
++ reg |= val << ((pin % 8) * 4);
++ __raw_writel(reg, pctl->pad[pin / 8]);
++ spin_unlock_irqrestore(&pctl->lock, flags);
++}
++
++static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
++ unsigned selector, unsigned group)
++{
++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++ const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
++ const struct bcm6318_function *f = &bcm6318_funcs[selector];
++
++ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
++
++ return 0;
++}
++
++static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
++ struct pinctrl_gpio_range *range,
++ unsigned offset)
++{
++ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
++
++ /* disable all functions using this pin */
++ if (offset < 13) {
++ /* GPIOs 0-12 use mux 0 as GPIO function */
++ bcm6318_rmw_mux(pctl, offset, 0, 0);
++ } else if (offset < 42) {
++ /* GPIOs 13-41 use mux 3 as GPIO function */
++ bcm6318_rmw_mux(pctl, offset, 0, 3);
++
++ /* FIXME: revert to old value for non gpio? */
++ bcm6318_set_pad(pctl, offset, 0);
++ } else {
++ /* no idea, really */
++ }
++
++ return 0;
++}
++
++static struct pinctrl_ops bcm6318_pctl_ops = {
++ .get_groups_count = bcm6318_pinctrl_get_group_count,
++ .get_group_name = bcm6318_pinctrl_get_group_name,
++ .get_group_pins = bcm6318_pinctrl_get_group_pins,
++#ifdef CONFIG_OF
++ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
++ .dt_free_map = pinctrl_utils_free_map,
++#endif
++};
++
++static struct pinmux_ops bcm6318_pmx_ops = {
++ .get_functions_count = bcm6318_pinctrl_get_func_count,
++ .get_function_name = bcm6318_pinctrl_get_func_name,
++ .get_function_groups = bcm6318_pinctrl_get_groups,
++ .set_mux = bcm6318_pinctrl_set_mux,
++ .gpio_request_enable = bcm6318_gpio_request_enable,
++ .strict = true,
++};
++
++static int bcm6318_pinctrl_probe(struct platform_device *pdev)
++{
++ struct bcm6318_pinctrl *pctl;
++ struct resource *res;
++ void __iomem *mode, *mux, *pad;
++ unsigned i;
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
++ mode = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mode))
++ return PTR_ERR(mode);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
++ mux = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(mux))
++ return PTR_ERR(mux);
++
++ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
++ pad = devm_ioremap_resource(&pdev->dev, res);
++ if (IS_ERR(pad))
++ return PTR_ERR(pad);
++
++ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
++ if (!pctl)
++ return -ENOMEM;
++
++ spin_lock_init(&pctl->lock);
++
++ pctl->mode = mode;
++
++ for (i = 0; i < 3; i++)
++ pctl->mux[i] = mux + (i * 4);
++
++ for (i = 0; i < 6; i++)
++ pctl->pad[i] = pad + (i * 4);
++
++ pctl->desc.name = dev_name(&pdev->dev);
++ pctl->desc.owner = THIS_MODULE;
++ pctl->desc.pctlops = &bcm6318_pctl_ops;
++ pctl->desc.pmxops = &bcm6318_pmx_ops;
++
++ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
++ pctl->desc.pins = bcm6318_pins;
++
++ platform_set_drvdata(pdev, pctl);
++
++ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
++ pctl->gpio, BCM6318_NGPIO);
++ if (IS_ERR(pctl->pctldev))
++ return PTR_ERR(pctl->pctldev);
++
++ return 0;
++}
++
++static const struct of_device_id bcm6318_pinctrl_match[] = {
++ { .compatible = "brcm,bcm6318-pinctrl", },
++ { },
++};
++
++static struct platform_driver bcm6318_pinctrl_driver = {
++ .probe = bcm6318_pinctrl_probe,
++ .driver = {
++ .name = "bcm6318-pinctrl",
++ .of_match_table = bcm6318_pinctrl_match,
++ },
++};
++
++builtin_platform_driver(bcm6318_pinctrl_driver);
--- /dev/null
+--- a/arch/mips/bcm63xx/Kconfig
++++ b/arch/mips/bcm63xx/Kconfig
+@@ -25,6 +25,8 @@ config BCM63XX_CPU_6318
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6318
+
+ config BCM63XX_CPU_6328
+ bool "support 6328 CPU"
+@@ -32,6 +34,8 @@ config BCM63XX_CPU_6328
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6328
+
+ config BCM63XX_CPU_6338
+ bool "support 6338 CPU"
+@@ -47,6 +51,8 @@ config BCM63XX_CPU_6348
+ select SYS_HAS_CPU_BMIPS32_3300
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
++ select PINCTRL
++ select PINCTRL_BCM6348
+
+ config BCM63XX_CPU_6358
+ bool "support 6358 CPU"
+@@ -54,6 +60,8 @@ config BCM63XX_CPU_6358
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6358
+
+ config BCM63XX_CPU_6362
+ bool "support 6362 CPU"
+@@ -61,6 +69,8 @@ config BCM63XX_CPU_6362
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6362
+
+ config BCM63XX_CPU_6368
+ bool "support 6368 CPU"
+@@ -68,6 +78,8 @@ config BCM63XX_CPU_6368
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM6368
+
+ config BCM63XX_CPU_63268
+ bool "support 63268 CPU"
+@@ -75,6 +87,8 @@ config BCM63XX_CPU_63268
+ select HW_HAS_PCI
+ select BCM63XX_OHCI
+ select BCM63XX_EHCI
++ select PINCTRL
++ select PINCTRL_BCM63268
+ endmenu
+
+ source "arch/mips/bcm63xx/boards/Kconfig"
--- /dev/null
+From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 31 Jul 2017 20:10:36 +0200
+Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
+
+---
+ arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
+ 1 file changed, 15 insertions(+)
+
+--- a/arch/mips/bcm63xx/clk.c
++++ b/arch/mips/bcm63xx/clk.c
+@@ -489,6 +489,8 @@ static struct clk_lookup bcm3368_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -505,7 +507,9 @@ static struct clk_lookup bcm6318_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -519,7 +523,10 @@ static struct clk_lookup bcm6328_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -532,6 +539,7 @@ static struct clk_lookup bcm6338_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -546,6 +554,7 @@ static struct clk_lookup bcm6345_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -560,6 +569,7 @@ static struct clk_lookup bcm6348_clks[]
+ /* fixed rate clocks */
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -576,6 +586,8 @@ static struct clk_lookup bcm6358_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
+@@ -595,7 +607,10 @@ static struct clk_lookup bcm6362_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -611,6 +626,8 @@ static struct clk_lookup bcm6368_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+@@ -625,7 +642,10 @@ static struct clk_lookup bcm63268_clks[]
+ CLKDEV_INIT(NULL, "periph", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
++ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
++ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
++ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
+ /* gated clocks */
+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
--- /dev/null
+From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sat, 4 Feb 2017 12:58:50 +0100
+Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers
+
+We now register them through DT, so no need to keep them here.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 -------
+ 1 file changed, 7 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -27,9 +27,7 @@
+ #include <bcm63xx_dev_pci.h>
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_flash.h>
+-#include <bcm63xx_dev_hsspi.h>
+ #include <bcm63xx_dev_pcmcia.h>
+-#include <bcm63xx_dev_spi.h>
+ #include <bcm63xx_dev_usb_ehci.h>
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+@@ -236,10 +234,6 @@ int __init board_register_devices(void)
+ bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
+ pr_err(PFX "failed to register fallback SPROM\n");
+
+- bcm63xx_spi_register();
+-
+- bcm63xx_hsspi_register();
+-
+ bcm63xx_flash_register();
+
+ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
++ dev-rng.o dev-uart.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+ sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+--- a/arch/mips/bcm63xx/dev-hsspi.c
++++ /dev/null
+@@ -1,48 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
+- */
+-
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/platform_device.h>
+-
+-#include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_hsspi.h>
+-#include <bcm63xx_regs.h>
+-
+-static struct resource spi_resources[] = {
+- {
+- .start = -1, /* filled at runtime */
+- .end = -1, /* filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- .start = -1, /* filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device bcm63xx_hsspi_device = {
+- .name = "bcm63xx-hsspi",
+- .id = 0,
+- .num_resources = ARRAY_SIZE(spi_resources),
+- .resource = spi_resources,
+-};
+-
+-int __init bcm63xx_hsspi_register(void)
+-{
+- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
+- !BCMCPU_IS_63268())
+- return -ENODEV;
+-
+- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
+- spi_resources[0].end = spi_resources[0].start;
+- spi_resources[0].end += RSET_HSSPI_SIZE - 1;
+- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
+-
+- return platform_device_register(&bcm63xx_hsspi_device);
+-}
+--- a/arch/mips/bcm63xx/dev-spi.c
++++ /dev/null
+@@ -1,60 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
+- * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
+- */
+-
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/export.h>
+-#include <linux/platform_device.h>
+-#include <linux/err.h>
+-#include <linux/clk.h>
+-
+-#include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_spi.h>
+-#include <bcm63xx_regs.h>
+-
+-static struct resource spi_resources[] = {
+- {
+- .start = -1, /* filled at runtime */
+- .end = -1, /* filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- .start = -1, /* filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device bcm63xx_spi_device = {
+- .id = -1,
+- .num_resources = ARRAY_SIZE(spi_resources),
+- .resource = spi_resources,
+-};
+-
+-int __init bcm63xx_spi_register(void)
+-{
+- if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
+- return -ENODEV;
+-
+- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
+- spi_resources[0].end = spi_resources[0].start;
+- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
+-
+- if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
+- bcm63xx_spi_device.name = "bcm6348-spi",
+- spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1;
+- }
+-
+- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
+- BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
+- bcm63xx_spi_device.name = "bcm6358-spi",
+- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
+- }
+-
+- return platform_device_register(&bcm63xx_spi_device);
+-}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
++++ /dev/null
+@@ -1,9 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0 */
+-#ifndef BCM63XX_DEV_HSSPI_H
+-#define BCM63XX_DEV_HSSPI_H
+-
+-#include <linux/types.h>
+-
+-int bcm63xx_hsspi_register(void);
+-
+-#endif /* BCM63XX_DEV_HSSPI_H */
--- /dev/null
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -1,7 +1,7 @@
+ # SPDX-License-Identifier: GPL-2.0
+ obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+- dev-rng.o dev-uart.o dev-wdt.o \
++ dev-rng.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+ sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+--- a/arch/mips/bcm63xx/dev-uart.c
++++ /dev/null
+@@ -1,76 +0,0 @@
+-/*
+- * This file is subject to the terms and conditions of the GNU General Public
+- * License. See the file "COPYING" in the main directory of this archive
+- * for more details.
+- *
+- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
+- */
+-
+-#include <linux/init.h>
+-#include <linux/kernel.h>
+-#include <linux/platform_device.h>
+-#include <bcm63xx_cpu.h>
+-
+-static struct resource uart0_resources[] = {
+- {
+- /* start & end filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- /* start filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct resource uart1_resources[] = {
+- {
+- /* start & end filled at runtime */
+- .flags = IORESOURCE_MEM,
+- },
+- {
+- /* start filled at runtime */
+- .flags = IORESOURCE_IRQ,
+- },
+-};
+-
+-static struct platform_device bcm63xx_uart_devices[] = {
+- {
+- .name = "bcm63xx_uart",
+- .id = 0,
+- .num_resources = ARRAY_SIZE(uart0_resources),
+- .resource = uart0_resources,
+- },
+-
+- {
+- .name = "bcm63xx_uart",
+- .id = 1,
+- .num_resources = ARRAY_SIZE(uart1_resources),
+- .resource = uart1_resources,
+- }
+-};
+-
+-int __init bcm63xx_uart_register(unsigned int id)
+-{
+- if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
+- return -ENODEV;
+-
+- if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() &&
+- !BCMCPU_IS_6368()))
+- return -ENODEV;
+-
+- if (id == 0) {
+- uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0);
+- uart0_resources[0].end = uart0_resources[0].start +
+- RSET_UART_SIZE - 1;
+- uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
+- }
+-
+- if (id == 1) {
+- uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1);
+- uart1_resources[0].end = uart1_resources[0].start +
+- RSET_UART_SIZE - 1;
+- uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1);
+- }
+-
+- return platform_device_register(&bcm63xx_uart_devices[id]);
+-}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
++++ /dev/null
+@@ -1,7 +0,0 @@
+-/* SPDX-License-Identifier: GPL-2.0 */
+-#ifndef BCM63XX_DEV_UART_H_
+-#define BCM63XX_DEV_UART_H_
+-
+-int bcm63xx_uart_register(unsigned int id);
+-
+-#endif /* BCM63XX_DEV_UART_H_ */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -32,8 +32,6 @@ struct board_info {
+ unsigned int has_ohci0:1;
+ unsigned int has_ehci0:1;
+ unsigned int has_usbd:1;
+- unsigned int has_uart0:1;
+- unsigned int has_uart1:1;
+ unsigned int use_fallback_sprom:1;
+
+ /* ethernet config */
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -20,7 +20,6 @@
+ #include <asm/prom.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+-#include <bcm63xx_dev_uart.h>
+ #include <bcm63xx_regs.h>
+ #include <bcm63xx_io.h>
+ #include <bcm63xx_gpio.h>
+@@ -188,12 +187,6 @@ int __init board_register_devices(void)
+
+ bcm63xx_gpio_init();
+
+- if (board.has_uart0)
+- bcm63xx_uart_register(0);
+-
+- if (board.has_uart1)
+- bcm63xx_uart_register(1);
+-
+ if (board.has_pccard)
+ bcm63xx_pcmcia_register();
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -35,9 +35,6 @@ static struct board_info __initdata boar
+ .name = "CVG834G_E15R3921",
+ .expected_cpu_id = 0x3368,
+
+- .has_uart0 = 1,
+- .has_uart1 = 1,
+-
+ .has_enet0 = 1,
+ .has_pci = 1,
+
+@@ -67,7 +64,6 @@ static struct board_info __initdata boar
+ .name = "96328avng",
+ .expected_cpu_id = 0x6328,
+
+- .has_uart0 = 1,
+ .has_pci = 1,
+ .has_usbd = 0,
+ .use_fallback_sprom = 1,
+@@ -116,7 +112,6 @@ static struct board_info __initdata boar
+ .name = "96338GW",
+ .expected_cpu_id = 0x6338,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .enet0 = {
+ .force_speed_100 = 1,
+@@ -159,7 +154,6 @@ static struct board_info __initdata boar
+ .name = "96338W",
+ .expected_cpu_id = 0x6338,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .enet0 = {
+ .force_speed_100 = 1,
+@@ -204,8 +198,6 @@ static struct board_info __initdata boar
+ static struct board_info __initdata board_96345gw2 = {
+ .name = "96345GW2",
+ .expected_cpu_id = 0x6345,
+-
+- .has_uart0 = 1,
+ };
+ #endif
+
+@@ -217,7 +209,6 @@ static struct board_info __initdata boar
+ .name = "96348R",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_pci = 1,
+ .use_fallback_sprom = 1,
+@@ -262,7 +253,6 @@ static struct board_info __initdata boar
+ .name = "96348GW-10",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -315,7 +305,6 @@ static struct board_info __initdata boar
+ .name = "96348GW-11",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -370,7 +359,6 @@ static struct board_info __initdata boar
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -421,7 +409,6 @@ static struct board_info __initdata boar
+ .name = "F@ST2404",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -466,7 +453,6 @@ static struct board_info __initdata boar
+ .name = "DV201AMR",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_pci = 1,
+ .use_fallback_sprom = 1,
+ .has_ohci0 = 1,
+@@ -487,7 +473,6 @@ static struct board_info __initdata boar
+ .name = "96348GW-A",
+ .expected_cpu_id = 0x6348,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -514,7 +499,6 @@ static struct board_info __initdata boar
+ .name = "96358VW",
+ .expected_cpu_id = 0x6358,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -567,7 +551,6 @@ static struct board_info __initdata boar
+ .name = "96358VW2",
+ .expected_cpu_id = 0x6358,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
+@@ -617,7 +600,6 @@ static struct board_info __initdata boar
+ .name = "AGPF-S0",
+ .expected_cpu_id = 0x6358,
+
+- .has_uart0 = 1,
+ .has_enet0 = 1,
+ .has_enet1 = 1,
+ .has_pci = 1,
--- /dev/null
+From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 22 Feb 2015 17:52:32 +0100
+Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 262 -----------------------------
+ 1 file changed, 262 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -43,14 +43,6 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+
+- .leds = {
+- {
+- .name = "CVG834G:green:power",
+- .gpio = 37,
+- .default_trigger= "default-on",
+- },
+- },
+-
+ .ephy_reset_gpio = 36,
+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+ };
+@@ -72,35 +64,6 @@ static struct board_info __initdata boar
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
+-
+- .leds = {
+- {
+- .name = "96328avng::ppp-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "96328avng::power",
+- .gpio = 4,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "96328avng::power-fail",
+- .gpio = 8,
+- .active_low = 1,
+- },
+- {
+- .name = "96328avng::wps",
+- .gpio = 9,
+- .active_low = 1,
+- },
+- {
+- .name = "96328avng::ppp",
+- .gpio = 11,
+- .active_low = 1,
+- },
+- },
+ };
+ #endif
+
+@@ -119,35 +82,6 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ses",
+- .gpio = 5,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- }
+- },
+ };
+
+ static struct board_info __initdata board_96338w = {
+@@ -159,35 +93,6 @@ static struct board_info __initdata boar
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+-
+- .leds = {
+- {
+- .name = "adsl",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ses",
+- .gpio = 5,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+ #endif
+
+@@ -217,36 +122,6 @@ static struct board_info __initdata boar
+ .has_phy = 1,
+ .use_internal_phy = 1,
+ },
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+-
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96348gw_10 = {
+@@ -270,35 +145,6 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96348gw_11 = {
+@@ -324,35 +170,6 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96348gw = {
+@@ -374,35 +191,6 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 2,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 3,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 0,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 1,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_FAST2404 = {
+@@ -518,33 +306,6 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+-
+- .leds = {
+- {
+- .name = "adsl-fail",
+- .gpio = 15,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp",
+- .gpio = 22,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 23,
+- .active_low = 1,
+- },
+- {
+- .name = "power",
+- .gpio = 4,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 5,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_96358vw2 = {
+@@ -571,29 +332,6 @@ static struct board_info __initdata boar
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+-
+- .leds = {
+- {
+- .name = "adsl",
+- .gpio = 22,
+- .active_low = 1,
+- },
+- {
+- .name = "ppp-fail",
+- .gpio = 23,
+- },
+- {
+- .name = "power",
+- .gpio = 5,
+- .active_low = 1,
+- .default_trigger = "default-on",
+- },
+- {
+- .name = "stop",
+- .gpio = 4,
+- .active_low = 1,
+- },
+- },
+ };
+
+ static struct board_info __initdata board_AGPFS0 = {
--- /dev/null
+From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
+From: Axel Gembe <ago@bastart.eu.org>
+Date: Mon, 12 May 2008 18:54:09 +0200
+Subject: [PATCH] bcm963xx: flashmap support
+
+Signed-off-by: Axel Gembe <ago@bastart.eu.org>
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +----------------
+ drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++----
+ drivers/mtd/redboot.c | 13 +++++++++--
+ 3 files changed, 38 insertions(+), 26 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio
+ }
+ };
+
+-static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
++static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
+
+ static struct physmap_flash_data flash_data = {
+ .width = 2,
+--- a/drivers/mtd/redboot.c
++++ b/drivers/mtd/redboot.c
+@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru
+ int nulllen = 0;
+ int numslots;
+ unsigned long offset;
++ unsigned long fis_origin = 0;
+ #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
+ static char nullstring[] = "unallocated";
+ #endif
+@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru
+ goto out;
+ }
+
++ if (data && data->origin) {
++ fis_origin = data->origin;
++ } else {
++ for (i = 0; i < numslots; i++) {
++ if (!strncmp(buf[i].name, "RedBoot", 8)) {
++ fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
++ }
++ }
++ }
++
+ for (i = 0; i < numslots; i++) {
+ struct fis_list *new_fl, **prev;
+
+@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru
+ goto out;
+ }
+ new_fl->img = &buf[i];
+- if (data && data->origin)
+- buf[i].flash_base -= data->origin;
+- else
+- buf[i].flash_base &= master->size-1;
++ if (fis_origin)
++ buf[i].flash_base -= fis_origin;
++
++ buf[i].flash_base &= (master->size << 1) - 1;
+
+ /* I'm sure the JFFS2 code has done me permanent damage.
+ * I now think the following is _normal_
--- /dev/null
+--- a/include/linux/bcm963xx_tag.h
++++ b/include/linux/bcm963xx_tag.h
+@@ -92,8 +92,10 @@ struct bcm_tag {
+ __u32 rootfs_crc;
+ /* 224-227: CRC32 of kernel partition */
+ __u32 kernel_crc;
+- /* 228-235: Unused at present */
+- char reserved1[8];
++ /* 228-231: Unused at present */
++ char reserved1[4];
++ /* 222-235: Openwrt: real rootfs length */
++ __u32 real_rootfs_length;
+ /* 236-239: CRC32 of header excluding last 20 bytes */
+ __u32 header_crc;
+ /* 240-255: Unused at present */
+--- a/drivers/mtd/parsers/parser_imagetag.c
++++ b/drivers/mtd/parsers/parser_imagetag.c
+@@ -137,7 +137,8 @@ static int bcm963xx_parse_imagetag_parti
+ } else {
+ /* OpenWrt layout */
+ rootfsaddr = kerneladdr + kernellen;
+- rootfslen = spareaddr - rootfsaddr;
++ rootfslen = buf->real_rootfs_length;
++ spareaddr = rootfsaddr + rootfslen;
+ }
+ } else {
+ goto out;
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -1634,7 +1634,7 @@ static int bcm_enet_change_mtu(struct ne
+ return -EBUSY;
+
+ /* add ethernet header + vlan tag size */
+- actual_mtu += VLAN_ETH_HLEN;
++ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
+
+ /*
+ * setup maximum size before we get overflow mark in
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -97,6 +97,8 @@ void __init board_early_setup(const stru
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G3_EXT_MII |
+ GPIO_MODE_6348_G0_EXT_MII;
++ else if (BCMCPU_IS_6358())
++ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
+ }
+
+ bcm_gpio_writel(val, GPIO_MODE_REG);
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -652,6 +652,8 @@
+ #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
+ #define GPIO_MODE_6358_SERIAL_LED (1 << 10)
+ #define GPIO_MODE_6358_UTOPIA (1 << 12)
++#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
++#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
+
+ #define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0)
+ #define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1)
--- /dev/null
+From 7fa63fdde703aaabaa7199ae879219737a98a3f3 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Fri, 6 Jan 2012 12:24:18 +0100
+Subject: [PATCH] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
+
+Only connect/disconnect the phy during probe and remove, not during any
+open/close. The phy seldom changes during the runtime, and disconnecting
+the phy during close will prevent it from keeping any configuration over
+a down/up cycle.
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 158 +++++++++++++--------------
+ 1 file changed, 78 insertions(+), 80 deletions(-)
+
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -867,10 +867,8 @@ static int bcm_enet_open(struct net_devi
+ struct bcm_enet_priv *priv;
+ struct sockaddr addr;
+ struct device *kdev;
+- struct phy_device *phydev;
+ int i, ret;
+ unsigned int size;
+- char phy_id[MII_BUS_ID_SIZE + 3];
+ void *p;
+ u32 val;
+
+@@ -878,40 +876,10 @@ static int bcm_enet_open(struct net_devi
+ kdev = &priv->pdev->dev;
+
+ if (priv->has_phy) {
+- /* connect to PHY */
+- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
+- priv->mii_bus->id, priv->phy_id);
+-
+- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
+- PHY_INTERFACE_MODE_MII);
+-
+- if (IS_ERR(phydev)) {
+- dev_err(kdev, "could not attach to PHY\n");
+- return PTR_ERR(phydev);
+- }
+-
+- /* mask with MAC supported features */
+- phydev->supported &= (SUPPORTED_10baseT_Half |
+- SUPPORTED_10baseT_Full |
+- SUPPORTED_100baseT_Half |
+- SUPPORTED_100baseT_Full |
+- SUPPORTED_Autoneg |
+- SUPPORTED_Pause |
+- SUPPORTED_MII);
+- phydev->advertising = phydev->supported;
+-
+- if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
+- phydev->advertising |= SUPPORTED_Pause;
+- else
+- phydev->advertising &= ~SUPPORTED_Pause;
+-
+- phy_attached_info(phydev);
+-
++ /* Reset state */
+ priv->old_link = 0;
+ priv->old_duplex = -1;
+ priv->old_pause = -1;
+- } else {
+- phydev = NULL;
+ }
+
+ /* mask all interrupts and request them */
+@@ -921,7 +889,7 @@ static int bcm_enet_open(struct net_devi
+
+ ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
+ if (ret)
+- goto out_phy_disconnect;
++ return ret;
+
+ ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0,
+ dev->name, dev);
+@@ -1083,8 +1051,8 @@ static int bcm_enet_open(struct net_devi
+ enet_dmac_writel(priv, priv->dma_chan_int_mask,
+ ENETDMAC_IRMASK, priv->tx_chan);
+
+- if (phydev)
+- phy_start(phydev);
++ if (priv->has_phy)
++ phy_start(dev->phydev);
+ else
+ bcm_enet_adjust_link(dev);
+
+@@ -1125,10 +1093,6 @@ out_freeirq_rx:
+ out_freeirq:
+ free_irq(dev->irq, dev);
+
+-out_phy_disconnect:
+- if (phydev)
+- phy_disconnect(phydev);
+-
+ return ret;
+ }
+
+@@ -1233,10 +1197,6 @@ static int bcm_enet_stop(struct net_devi
+ free_irq(priv->irq_rx, dev);
+ free_irq(dev->irq, dev);
+
+- /* release phy */
+- if (priv->has_phy)
+- phy_disconnect(dev->phydev);
+-
+ return 0;
+ }
+
+@@ -1802,14 +1762,47 @@ static int bcm_enet_probe(struct platfor
+
+ /* do minimal hardware init to be able to probe mii bus */
+ bcm_enet_hw_preinit(priv);
++ spin_lock_init(&priv->rx_lock);
++
++ /* init rx timeout (used for oom) */
++ timer_setup(&priv->rx_timeout, bcm_enet_refill_rx_timer, 0);
++
++ /* init the mib update lock&work */
++ mutex_init(&priv->mib_update_lock);
++ INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
++
++ /* zero mib counters */
++ for (i = 0; i < ENET_MIB_REG_COUNT; i++)
++ enet_writel(priv, 0, ENET_MIB_REG(i));
++
++ /* register netdevice */
++ dev->netdev_ops = &bcm_enet_ops;
++ netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
++
++ dev->ethtool_ops = &bcm_enet_ethtool_ops;
++ /* MTU range: 46 - 2028 */
++ dev->min_mtu = ETH_ZLEN - ETH_HLEN;
++ dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
++ SET_NETDEV_DEV(dev, &pdev->dev);
++
++ ret = register_netdev(dev);
++ if (ret)
++ goto out_uninit_hw;
++
++ netif_carrier_off(dev);
++ platform_set_drvdata(pdev, dev);
++ priv->pdev = pdev;
++ priv->net_dev = dev;
+
+ /* MII bus registration */
+ if (priv->has_phy) {
++ struct phy_device *phydev;
++ char phy_id[MII_BUS_ID_SIZE + 3];
+
+ priv->mii_bus = mdiobus_alloc();
+ if (!priv->mii_bus) {
+ ret = -ENOMEM;
+- goto out_uninit_hw;
++ goto out_unregister_netdev;
+ }
+
+ bus = priv->mii_bus;
+@@ -1833,6 +1826,35 @@ static int bcm_enet_probe(struct platfor
+ dev_err(&pdev->dev, "unable to register mdio bus\n");
+ goto out_free_mdio;
+ }
++
++ /* connect to PHY */
++ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
++ priv->mii_bus->id, priv->phy_id);
++
++ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
++ PHY_INTERFACE_MODE_MII);
++
++ if (IS_ERR(phydev)) {
++ dev_err(&pdev->dev, "could not attach to PHY\n");
++ goto out_unregister_mdio;
++ }
++
++ /* mask with MAC supported features */
++ phydev->supported &= (SUPPORTED_10baseT_Half |
++ SUPPORTED_10baseT_Full |
++ SUPPORTED_100baseT_Half |
++ SUPPORTED_100baseT_Full |
++ SUPPORTED_Autoneg |
++ SUPPORTED_Pause |
++ SUPPORTED_MII);
++ phydev->advertising = phydev->supported;
++
++ if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
++ phydev->advertising |= SUPPORTED_Pause;
++ else
++ phydev->advertising &= ~SUPPORTED_Pause;
++
++ phy_attached_info(phydev);
+ } else {
+
+ /* run platform code to initialize PHY device */
+@@ -1840,45 +1862,16 @@ static int bcm_enet_probe(struct platfor
+ pd->mii_config(dev, 1, bcm_enet_mdio_read_mii,
+ bcm_enet_mdio_write_mii)) {
+ dev_err(&pdev->dev, "unable to configure mdio bus\n");
+- goto out_uninit_hw;
++ goto out_unregister_netdev;
+ }
+ }
+
+- spin_lock_init(&priv->rx_lock);
+-
+- /* init rx timeout (used for oom) */
+- timer_setup(&priv->rx_timeout, bcm_enet_refill_rx_timer, 0);
+-
+- /* init the mib update lock&work */
+- mutex_init(&priv->mib_update_lock);
+- INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
+-
+- /* zero mib counters */
+- for (i = 0; i < ENET_MIB_REG_COUNT; i++)
+- enet_writel(priv, 0, ENET_MIB_REG(i));
+-
+- /* register netdevice */
+- dev->netdev_ops = &bcm_enet_ops;
+- netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
+-
+- dev->ethtool_ops = &bcm_enet_ethtool_ops;
+- /* MTU range: 46 - 2028 */
+- dev->min_mtu = ETH_ZLEN - ETH_HLEN;
+- dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
+- SET_NETDEV_DEV(dev, &pdev->dev);
+-
+- ret = register_netdev(dev);
+- if (ret)
+- goto out_unregister_mdio;
+-
+- netif_carrier_off(dev);
+- platform_set_drvdata(pdev, dev);
+- priv->pdev = pdev;
+- priv->net_dev = dev;
+-
+ return 0;
+
+ out_unregister_mdio:
++ if (dev->phydev)
++ phy_disconnect(dev->phydev);
++
+ if (priv->mii_bus)
+ mdiobus_unregister(priv->mii_bus);
+
+@@ -1886,6 +1879,9 @@ out_free_mdio:
+ if (priv->mii_bus)
+ mdiobus_free(priv->mii_bus);
+
++out_unregister_netdev:
++ unregister_netdev(dev);
++
+ out_uninit_hw:
+ /* turn off mdc clock */
+ enet_writel(priv, 0, ENET_MIISC_REG);
+@@ -1916,6 +1912,7 @@ static int bcm_enet_remove(struct platfo
+ enet_writel(priv, 0, ENET_MIISC_REG);
+
+ if (priv->has_phy) {
++ phy_disconnect(dev->phydev);
+ mdiobus_unregister(priv->mii_bus);
+ mdiobus_free(priv->mii_bus);
+ } else {
--- /dev/null
+From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 15 Jul 2012 20:08:57 +0200
+Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
+
+---
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++
+ drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++
+ 2 files changed, 25 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -968,6 +968,19 @@
+ #define ENETSW_PORTOV_FDX_MASK (1 << 1)
+ #define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
+
++/* Port RGMII control register */
++#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x))
++#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7)
++#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
++#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4)
++#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4)
++#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4)
++#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4)
++#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0)
++
++/* Port RGMII timing register */
++#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x))
++
+ /* MDIO control register */
+ #define ENETSW_MDIOC_REG (0xb0)
+ #define ENETSW_MDIOC_EXT_MASK (1 << 16)
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2185,6 +2185,18 @@ static int bcm_enetsw_open(struct net_de
+ priv->sw_port_link[i] = 0;
+ }
+
++ /* enable external ports */
++ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
++ u8 rgmii_ctrl;
++
++ if (!priv->used_ports[i].used)
++ continue;
++
++ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
++ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
++ }
++
+ /* reset mib */
+ val = enetsw_readb(priv, ENETSW_GMCR_REG);
+ val |= ENETSW_GMCR_RST_MIB_MASK;
--- /dev/null
+From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Sun, 3 Jul 2011 15:00:38 +0200
+Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
+
+Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
+---
+ arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++-
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +
+ 2 files changed, 33 insertions(+), 2 deletions(-)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -17,6 +17,9 @@
+ #include <linux/mtd/partitions.h>
+ #include <linux/mtd/physmap.h>
+ #include <linux/mtd/spi-nor.h>
++#include <linux/of.h>
++#include <linux/spi/spi.h>
++#include <linux/spi/flash.h>
+
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+@@ -66,6 +69,41 @@ void __init bcm63xx_flash_force_phys_bas
+ mtd_resources[0].end = end;
+ }
+
++static struct spi_board_info bcm63xx_spi_flash_info[] = {
++ {
++ .bus_num = 0,
++ .chip_select = 0,
++ .mode = 0,
++ .max_speed_hz = 781000,
++ .modalias = "m25p80",
++ },
++};
++
++static void bcm63xx_of_update_spi_flash_speed(struct device_node *np,
++ unsigned int new_hz)
++{
++ struct property *max_hz;
++ __be32 *hz;
++
++ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL);
++ if (!max_hz)
++ return;
++
++ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL);
++ if (!max_hz->name) {
++ kfree(max_hz);
++ return;
++ }
++
++ max_hz->value = max_hz + 1;
++ max_hz->length = sizeof(*hz);
++
++ hz = max_hz->value;
++ *hz = cpu_to_be32(new_hz);
++
++ of_update_property(np, max_hz);
++}
++
+ static int __init bcm63xx_detect_flash_type(void)
+ {
+ u32 val;
+@@ -73,9 +111,15 @@ static int __init bcm63xx_detect_flash_t
+ switch (bcm63xx_get_cpu_id()) {
+ case BCM6318_CPU_ID:
+ /* only support serial flash */
++ bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6328_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
++ if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
++
+ if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+@@ -94,12 +138,20 @@ static int __init bcm63xx_detect_flash_t
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ case BCM6362_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
++ if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+ return BCM63XX_FLASH_TYPE_NAND;
+ case BCM6368_CPU_ID:
+ val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
++ if (val & STRAPBUS_6368_SPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
+ case STRAPBUS_6368_BOOT_SEL_NAND:
+ return BCM63XX_FLASH_TYPE_NAND;
+@@ -110,6 +162,11 @@ static int __init bcm63xx_detect_flash_t
+ }
+ case BCM63268_CPU_ID:
+ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
++ if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
++ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
++ else
++ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
++
+ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
+ return BCM63XX_FLASH_TYPE_SERIAL;
+ else
+@@ -176,6 +233,7 @@ void __init bcm63xx_flash_detect(void)
+
+ int __init bcm63xx_flash_register(void)
+ {
++ struct device_node *np;
+ u32 val;
+
+ switch (flash_type) {
+@@ -195,8 +253,14 @@ int __init bcm63xx_flash_register(void)
+
+ return platform_device_register(&mtd_dev);
+ case BCM63XX_FLASH_TYPE_SERIAL:
+- pr_warn("unsupported serial flash detected\n");
+- return -ENODEV;
++ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor");
++ if (np) {
++ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz);
++ of_node_put(np);
++ return 0;
++ } else {
++ return -ENODEV;
++ }
+ case BCM63XX_FLASH_TYPE_NAND:
+ pr_warn("unsupported NAND flash detected\n");
+ return -ENODEV;
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
+@@ -709,6 +709,7 @@
+ #define GPIO_STRAPBUS_REG 0x40
+ #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
+ #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
++#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
+ #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
+ #define STRAPBUS_6368_BOOT_SEL_NAND 0
+ #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
+@@ -1565,6 +1566,7 @@
+ #define IDDQ_CTRL_63268_USBH (1 << 4)
+
+ #define MISC_STRAPBUS_6328_REG 0x240
++#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4)
+ #define STRAPBUS_6328_FCVO_SHIFT 7
+ #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
+ #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
--- /dev/null
+From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:40:03 +0200
+Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 9 ++++++++-
+ arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 10 ++++++++++
+ 2 files changed, 18 insertions(+), 1 deletion(-)
+
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -31,6 +31,7 @@
+ #include <bcm63xx_dev_usb_ohci.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
++#include <pci_ath9k_fixup.h>
+
+ #include "board_common.h"
+
+@@ -177,6 +178,7 @@ static struct of_device_id of_ids[] = {
+ int __init board_register_devices(void)
+ {
+ int usbh_ports = 0;
++ int i;
+
+ #if CONFIG_OF
+ if (of_have_populated_dt()) {
+@@ -241,6 +243,10 @@ int __init board_register_devices(void)
+ board.ephy_reset_gpio_flags);
+ }
+
++ /* register any fixups */
++ for (i = 0; i < board.has_caldata; i++)
++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++
+ return 0;
+ }
+
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -9,6 +9,7 @@
+ #include <bcm63xx_dev_enet.h>
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_fallback_sprom.h>
++#include <pci_ath9k_fixup.h>
+
+ /*
+ * flash mapping
+@@ -16,6 +17,11 @@
+ #define BCM963XX_CFE_VERSION_OFFSET 0x570
+ #define BCM963XX_NVRAM_OFFSET 0x580
+
++struct ath9k_caldata {
++ unsigned int slot;
++ u32 caldata_offset;
++};
++
+ /*
+ * board definition
+ */
+@@ -33,6 +39,10 @@ struct board_info {
+ unsigned int has_ehci0:1;
+ unsigned int has_usbd:1;
+ unsigned int use_fallback_sprom:1;
++ unsigned int has_caldata:2;
++
++ /* wifi calibration data config */
++ struct ath9k_caldata caldata[2];
+
+ /* ethernet config */
+ struct bcm63xx_enet_platform_data enet0;
--- /dev/null
+From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 13 Jan 2014 12:12:30 +0100
+Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ arch/mips/bcm63xx/dev-flash.c | 5 +++++
+ arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
+ 2 files changed, 7 insertions(+)
+
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -270,3 +270,8 @@ int __init bcm63xx_flash_register(void)
+ return -ENODEV;
+ }
+ }
++
++int bcm63xx_flash_get_type(void)
++{
++ return flash_type;
++}
+--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
++++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
+@@ -14,4 +14,6 @@ void bcm63xx_flash_force_phys_base_addre
+
+ int __init bcm63xx_flash_register(void);
+
++int bcm63xx_flash_get_type(void);
++
+ #endif /* __BCM63XX_FLASH_H */
--- /dev/null
+From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Thu, 3 May 2012 14:36:11 +0200
+Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
+
+---
+ arch/mips/bcm63xx/Makefile | 3 +-
+ arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 +
+ 3 files changed, 199 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+- sprom.o
++ pci-ath9k-fixup.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -0,0 +1,200 @@
++/*
++ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ * Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ * Based on
++ *
++ * Atheros AP94 reference board PCI initialization
++ *
++ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/if_ether.h>
++#include <linux/pci.h>
++#include <linux/delay.h>
++#include <linux/ath9k_platform.h>
++
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_nvram.h>
++#include <bcm63xx_dev_pci.h>
++#include <bcm63xx_dev_flash.h>
++#include <pci_ath9k_fixup.h>
++
++#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
++
++struct ath9k_fixup {
++ unsigned slot;
++ u8 mac[ETH_ALEN];
++ struct ath9k_platform_data pdata;
++};
++
++static int ath9k_num_fixups;
++static struct ath9k_fixup ath9k_fixups[2] = {
++ {
++ .slot = 255,
++ .pdata = {
++ .led_pin = -1,
++ },
++ },
++ {
++ .slot = 255,
++ .pdata = {
++ .led_pin = -1,
++ },
++ },
++};
++
++static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
++{
++ u32 addr;
++
++ if (BCMCPU_IS_6328()) {
++ addr = 0x18000000;
++ } else {
++ addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ addr &= MPI_CSBASE_BASE_MASK;
++ }
++
++ switch (bcm63xx_flash_get_type()) {
++ case BCM63XX_FLASH_TYPE_PARALLEL:
++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++ return eeprom;
++ case BCM63XX_FLASH_TYPE_SERIAL:
++ /* the first megabyte is memory mapped */
++ if (offset < 0x100000) {
++ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++ return eeprom;
++ }
++
++ if (BCMCPU_IS_6328()) {
++ /* we can change the memory mapped megabyte */
++ bcm_hsspi_writel(offset & 0xf00000, 0x18);
++ memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
++ bcm_hsspi_writel(0, 0x18);
++ return eeprom;
++ }
++ /* can't do anything here without talking to the SPI controller. */
++ case BCM63XX_FLASH_TYPE_NAND:
++ default:
++ return NULL;
++ }
++}
++
++static void ath9k_pci_fixup(struct pci_dev *dev)
++{
++ void __iomem *mem;
++ struct ath9k_platform_data *pdata = NULL;
++ struct pci_dev *bridge = pci_upstream_bridge(dev);
++ u16 *cal_data = NULL;
++ u16 cmd;
++ u32 bar0;
++ u32 val;
++ unsigned i;
++
++ for (i = 0; i < ath9k_num_fixups; i++) {
++ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
++ continue;
++
++ cal_data = ath9k_fixups[i].pdata.eeprom_data;
++ pdata = &ath9k_fixups[i].pdata;
++ break;
++ }
++
++ if (cal_data == NULL)
++ return;
++
++ if (*cal_data != 0xa55a) {
++ pr_err("pci %s: invalid calibration data\n", pci_name(dev));
++ return;
++ }
++
++ pr_info("pci %s: fixup device configuration\n", pci_name(dev));
++
++ switch (bcm63xx_get_cpu_id()) {
++ case BCM6328_CPU_ID:
++ val = BCM_PCIE_MEM_BASE_PA_6328;
++ break;
++ case BCM6348_CPU_ID:
++ case BCM6358_CPU_ID:
++ case BCM6368_CPU_ID:
++ val = BCM_PCI_MEM_BASE_PA;
++ break;
++ default:
++ BUG();
++ }
++
++ mem = ioremap(val, 0x10000);
++ if (!mem) {
++ pr_err("pci %s: ioremap error\n", pci_name(dev));
++ return;
++ }
++
++ if (bridge)
++ pci_enable_device(bridge);
++
++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
++
++ pci_read_config_word(dev, PCI_COMMAND, &cmd);
++ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
++ pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++ /* set offset to first reg address */
++ cal_data += 3;
++ while(*cal_data != 0xffff) {
++ u32 reg;
++ reg = *cal_data++;
++ val = *cal_data++;
++ val |= (*cal_data++) << 16;
++
++ writel(val, mem + reg);
++ udelay(100);
++ }
++
++ pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
++ dev->vendor = val & 0xffff;
++ dev->device = (val >> 16) & 0xffff;
++
++ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
++ dev->revision = val & 0xff;
++ dev->class = val >> 8; /* upper 3 bytes */
++
++ pci_read_config_word(dev, PCI_COMMAND, &cmd);
++ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
++ pci_write_config_word(dev, PCI_COMMAND, cmd);
++
++ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
++
++ if (bridge)
++ pci_disable_device(bridge);
++
++ iounmap(mem);
++
++ dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
++
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++{
++ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
++ return;
++
++ ath9k_fixups[ath9k_num_fixups].slot = slot;
++
++ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
++ return;
++
++ if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
++ return;
++
++ ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
++ ath9k_num_fixups++;
++}
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -0,0 +1,7 @@
++#ifndef _PCI_ATH9K_FIXUP
++#define _PCI_ATH9K_FIXUP
++
++
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++
++#endif /* _PCI_ATH9K_FIXUP */
--- /dev/null
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -2,6 +2,7 @@
+ #define _PCI_ATH9K_FIXUP
+
+
+-void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
++void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check) __init;
+
+ #endif /* _PCI_ATH9K_FIXUP */
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -20,6 +20,7 @@
+ struct ath9k_caldata {
+ unsigned int slot;
+ u32 caldata_offset;
++ unsigned int endian_check:1;
+ };
+
+ /*
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -182,12 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
+ }
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+
+-void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
++void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
++ unsigned endian_check)
+ {
+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ return;
+
+ ath9k_fixups[ath9k_num_fixups].slot = slot;
++ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
+
+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ return;
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -245,7 +245,8 @@ int __init board_register_devices(void)
+
+ /* register any fixups */
+ for (i = 0; i < board.has_caldata; i++)
+- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
++ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
++ board.caldata[i].endian_check);
+
+ return 0;
+ }
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -246,7 +246,7 @@ int __init board_register_devices(void)
+ /* register any fixups */
+ for (i = 0; i < board.has_caldata; i++)
+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+- board.caldata[i].endian_check);
++ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
+
+ return 0;
+ }
+--- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
++++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
+@@ -183,13 +183,15 @@ static void ath9k_pci_fixup(struct pci_d
+ DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
+
+ void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+- unsigned endian_check)
++ unsigned endian_check, int led_pin, bool led_active_high)
+ {
+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
+ return;
+
+ ath9k_fixups[ath9k_num_fixups].slot = slot;
+ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
++ ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin;
++ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high;
+
+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
+ return;
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -21,6 +21,8 @@ struct ath9k_caldata {
+ unsigned int slot;
+ u32 caldata_offset;
+ unsigned int endian_check:1;
++ int led_pin;
++ bool led_active_high;
+ };
+
+ /*
+--- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
+@@ -3,6 +3,6 @@
+
+
+ void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
+- unsigned endian_check) __init;
++ unsigned endian_check, int led_pin, bool led_active_high) __init;
+
+ #endif /* _PCI_ATH9K_FIXUP */
--- /dev/null
+From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Mon, 7 Jan 2013 17:45:39 +0100
+Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
+
+---
+ arch/mips/bcm63xx/Makefile | 2 +-
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++-
+ arch/mips/bcm63xx/dev-flash.c | 2 +-
+ arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++
+ .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +-
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++-
+ .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++
+ 7 files changed, 104 insertions(+), 8 deletions(-)
+ create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
+ create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+
+--- a/arch/mips/bcm63xx/Makefile
++++ b/arch/mips/bcm63xx/Makefile
+@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
+ setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
+ dev-rng.o dev-wdt.o \
+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
+- pci-ath9k-fixup.o sprom.o
++ pci-ath9k-fixup.o pci-rt2x00-fixup.o sprom.o
+ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
+
+ obj-y += boards/
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -32,6 +32,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <board_bcm963xx.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+
+ #include "board_common.h"
+
+@@ -244,9 +245,19 @@ int __init board_register_devices(void)
+ }
+
+ /* register any fixups */
+- for (i = 0; i < board.has_caldata; i++)
+- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
+- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
++ for (i = 0; i < board.has_caldata; i++) {
++ switch (board.caldata[i].vendor) {
++ case PCI_VENDOR_ID_ATHEROS:
++ pci_enable_ath9k_fixup(board.caldata[i].slot,
++ board.caldata[i].caldata_offset, board.caldata[i].endian_check,
++ board.caldata[i].led_pin, board.caldata[i].led_active_high);
++ break;
++ case PCI_VENDOR_ID_RALINK:
++ pci_enable_rt2x00_fixup(board.caldata[i].slot,
++ board.caldata[i].eeprom);
++ break;
++ }
++ }
+
+ return 0;
+ }
+--- /dev/null
++++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
+@@ -0,0 +1,72 @@
++/*
++ * Broadcom BCM63XX RT2x00 EEPROM fixup helper.
++ *
++ * Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
++ *
++ * Based on
++ *
++ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
++ *
++ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
++ *
++ * This program is free software; you can redistribute it and/or modify it
++ * under the terms of the GNU General Public License version 2 as published
++ * by the Free Software Foundation.
++ */
++
++#include <linux/if_ether.h>
++#include <linux/pci.h>
++#include <linux/platform_device.h>
++#include <linux/rt2x00_platform.h>
++
++#include <bcm63xx_nvram.h>
++#include <pci_rt2x00_fixup.h>
++
++struct rt2x00_fixup {
++ unsigned slot;
++ u8 mac[ETH_ALEN];
++ struct rt2x00_platform_data pdata;
++};
++
++static int rt2x00_num_fixups;
++static struct rt2x00_fixup rt2x00_fixups[2] = {
++ {
++ .slot = 255,
++ },
++ {
++ .slot = 255,
++ },
++};
++
++static void rt2x00_pci_fixup(struct pci_dev *dev)
++{
++ unsigned i;
++ struct rt2x00_platform_data *pdata = NULL;
++
++ for (i = 0; i < rt2x00_num_fixups; i++) {
++ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
++ continue;
++
++ pdata = &rt2x00_fixups[i].pdata;
++ break;
++ }
++
++ dev->dev.platform_data = pdata;
++}
++DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
++
++void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
++{
++ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
++ return;
++
++ rt2x00_fixups[rt2x00_num_fixups].slot = slot;
++ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
++
++ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
++ return;
++
++ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
++ rt2x00_num_fixups++;
++}
++
+--- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
++++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
+@@ -10,6 +10,7 @@
+ #include <bcm63xx_dev_usb_usbd.h>
+ #include <bcm63xx_fallback_sprom.h>
+ #include <pci_ath9k_fixup.h>
++#include <pci_rt2x00_fixup.h>
+
+ /*
+ * flash mapping
+@@ -17,12 +18,16 @@
+ #define BCM963XX_CFE_VERSION_OFFSET 0x570
+ #define BCM963XX_NVRAM_OFFSET 0x580
+
+-struct ath9k_caldata {
++struct bcm63xx_caldata {
++ unsigned int vendor;
+ unsigned int slot;
+ u32 caldata_offset;
++ /* Atheros */
+ unsigned int endian_check:1;
+ int led_pin;
+ bool led_active_high;
++ /* Ralink */
++ char* eeprom;
+ };
+
+ /*
+@@ -45,7 +50,7 @@ struct board_info {
+ unsigned int has_caldata:2;
+
+ /* wifi calibration data config */
+- struct ath9k_caldata caldata[2];
++ struct bcm63xx_caldata caldata[2];
+
+ /* ethernet config */
+ struct bcm63xx_enet_platform_data enet0;
+--- /dev/null
++++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
+@@ -0,0 +1,9 @@
++#ifndef _PCI_RT2X00_FIXUP
++#define _PCI_RT2X00_FIXUP
++
++#define PCI_VENDOR_ID_RALINK 0x1814
++
++void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
++
++#endif /* _PCI_RT2X00_FIXUP */
++
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
+@@ -332,6 +332,9 @@ struct bcm_enet_priv {
+ struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
+ int sw_port_link[ENETSW_MAX_PORT];
+
++ /* platform device for associated switch */
++ struct platform_device *b53_device;
++
+ /* used to poll switch port state */
+ struct timer_list swphy_poll;
+ spinlock_t enetsw_mdio_lock;
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -30,6 +30,7 @@
+ #include <linux/dma-mapping.h>
+ #include <linux/platform_device.h>
+ #include <linux/if_vlan.h>
++#include <linux/platform_data/b53.h>
+
+ #include <bcm63xx_dev_enet.h>
+ #include "bcm63xx_enet.h"
+@@ -1932,7 +1933,8 @@ static int bcm_enet_remove(struct platfo
+ return 0;
+ }
+
+-struct platform_driver bcm63xx_enet_driver = {
++
++static struct platform_driver bcm63xx_enet_driver = {
+ .probe = bcm_enet_probe,
+ .remove = bcm_enet_remove,
+ .driver = {
+@@ -1941,6 +1943,42 @@ struct platform_driver bcm63xx_enet_driv
+ },
+ };
+
++struct b53_platform_data bcm63xx_b53_pdata = {
++ .chip_id = 0x6300,
++ .big_endian = 1,
++};
++
++struct platform_device bcm63xx_b53_dev = {
++ .name = "b53-switch",
++ .id = -1,
++ .dev = {
++ .platform_data = &bcm63xx_b53_pdata,
++ },
++};
++
++static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask)
++{
++ int ret;
++
++ bcm63xx_b53_pdata.regs = priv->base;
++ bcm63xx_b53_pdata.enabled_ports = port_mask;
++ bcm63xx_b53_pdata.alias = priv->net_dev->name;
++
++ ret = platform_device_register(&bcm63xx_b53_dev);
++ if (!ret)
++ priv->b53_device = &bcm63xx_b53_dev;
++
++ return ret;
++}
++
++static void bcmenet_switch_unregister(struct bcm_enet_priv *priv)
++{
++ if (priv->b53_device)
++ platform_device_unregister(&bcm63xx_b53_dev);
++
++ priv->b53_device = NULL;
++}
++
+ /*
+ * switch mii access callbacks
+ */
+@@ -2197,29 +2235,6 @@ static int bcm_enetsw_open(struct net_de
+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ }
+
+- /* reset mib */
+- val = enetsw_readb(priv, ENETSW_GMCR_REG);
+- val |= ENETSW_GMCR_RST_MIB_MASK;
+- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+- mdelay(1);
+- val &= ~ENETSW_GMCR_RST_MIB_MASK;
+- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
+- mdelay(1);
+-
+- /* force CPU port state */
+- val = enetsw_readb(priv, ENETSW_IMPOV_REG);
+- val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
+- enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
+-
+- /* enable switch forward engine */
+- val = enetsw_readb(priv, ENETSW_SWMODE_REG);
+- val |= ENETSW_SWMODE_FWD_EN_MASK;
+- enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
+-
+- /* enable jumbo on all ports */
+- enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
+- enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
+-
+ /* initialize flow control buffer allocation */
+ enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
+ ENETDMA_BUFALLOC_REG(priv->rx_chan));
+@@ -2675,6 +2690,9 @@ static int bcm_enetsw_probe(struct platf
+ struct bcm63xx_enetsw_platform_data *pd;
+ struct resource *res_mem;
+ int ret, irq_rx, irq_tx;
++ unsigned i, num_ports = 0;
++ u16 port_mask = BIT(8);
++ u8 val;
+
+ if (!bcm_enet_shared_base[0])
+ return -EPROBE_DEFER;
+@@ -2755,6 +2773,43 @@ static int bcm_enetsw_probe(struct platf
+ priv->pdev = pdev;
+ priv->net_dev = dev;
+
++ /* reset mib */
++ val = enetsw_readb(priv, ENETSW_GMCR_REG);
++ val |= ENETSW_GMCR_RST_MIB_MASK;
++ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++ mdelay(1);
++ val &= ~ENETSW_GMCR_RST_MIB_MASK;
++ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
++ mdelay(1);
++
++ /* force CPU port state */
++ val = enetsw_readb(priv, ENETSW_IMPOV_REG);
++ val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
++ enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
++
++ /* enable switch forward engine */
++ val = enetsw_readb(priv, ENETSW_SWMODE_REG);
++ val |= ENETSW_SWMODE_FWD_EN_MASK;
++ enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
++
++ /* enable jumbo on all ports */
++ enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
++ enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
++
++ for (i = 0; i < priv->num_ports; i++) {
++ struct bcm63xx_enetsw_port *port = &priv->used_ports[i];
++
++ if (!port->used)
++ continue;
++
++ num_ports++;
++ port_mask |= BIT(i);
++ }
++
++ /* only register if there is more than one external port */
++ if (num_ports > 1)
++ bcmenet_switch_register(priv, port_mask);
++
+ return 0;
+
+ out_disable_clk:
+@@ -2776,6 +2831,9 @@ static int bcm_enetsw_remove(struct plat
+ priv = netdev_priv(dev);
+ unregister_netdev(dev);
+
++ /* remove switch */
++ bcmenet_switch_unregister(priv);
++
+ clk_disable_unprepare(priv->mac_clk);
+
+ free_netdev(dev);
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2734,9 +2734,9 @@ static int bcm_enetsw_probe(struct platf
+ if (ret)
+ goto out;
+
+- priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
+- if (IS_ERR(priv->base)) {
+- ret = PTR_ERR(priv->base);
++ priv->base = devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem));
++ if (priv->base == NULL) {
++ ret = -ENOMEM;
+ goto out;
+ }
+
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -77,6 +77,8 @@ static struct board_info __initdata boar
+
+ .has_enet0 = 1,
+ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -90,6 +92,8 @@ static struct board_info __initdata boar
+
+ .has_enet0 = 1,
+ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -138,6 +142,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -162,6 +168,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -186,6 +194,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -208,6 +218,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -231,6 +243,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -252,6 +266,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -271,6 +287,8 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -298,6 +316,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -323,6 +343,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -348,6 +370,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
+@@ -371,6 +395,8 @@ static struct board_info __initdata boar
+ },
+
+ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
+ .force_speed_100 = 1,
+ .force_duplex_full = 1,
+ },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -46,7 +46,7 @@ static struct board_info __initdata boar
+ .ephy_reset_gpio = 36,
+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_3368 */
+
+ /*
+ * known 6328 boards
+@@ -65,7 +65,7 @@ static struct board_info __initdata boar
+ .port_no = 0,
+ },
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+ * known 6338 boards
+@@ -98,7 +98,7 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6338 */
+
+ /*
+ * known 6345 boards
+@@ -108,7 +108,7 @@ static struct board_info __initdata boar
+ .name = "96345GW2",
+ .expected_cpu_id = 0x6345,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6345 */
+
+ /*
+ * known 6348 boards
+@@ -295,7 +295,7 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+ * known 6358 boards
+@@ -403,7 +403,7 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
+-#endif
++#endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+ * all boards
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -295,6 +295,21 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
++
++static struct board_info __initdata board_96348_D4PW = {
++ .name = "D-4P-W",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -431,6 +446,7 @@ static const struct board_info __initcon
+ &board_DV201AMR,
+ &board_96348gw_a,
+ &board_rta1025w_16,
++ &board_96348_D4PW,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -462,6 +478,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -418,6 +418,60 @@ static struct board_info __initdata boar
+
+ .has_ohci0 = 1,
+ };
++
++static struct board_info __initdata board_nb4_ser_r0 = {
++ .name = "NB4-SER-r0",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++};
++
++static struct board_info __initdata board_nb4_fxc_r1 = {
++ .name = "NB4-FXC-r1",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -454,6 +508,8 @@ static const struct board_info __initcon
+ &board_96358vw2,
+ &board_AGPFS0,
+ &board_DWVS0,
++ &board_nb4_ser_r0,
++ &board_nb4_fxc_r1,
+ #endif
+ };
+
+@@ -495,6 +551,8 @@ static struct of_device_id const bcm963x
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
++ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
++ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -98,6 +98,20 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++static struct board_info __initdata board_96338w2_e7t = {
++ .name = "96338W2_E7T",
++ .expected_cpu_id = 0x6338,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+
+ /*
+@@ -487,6 +501,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+ &board_96338w,
++ &board_96338w2_e7t,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
+@@ -524,6 +539,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -385,6 +385,25 @@ static struct board_info __initdata boar
+ .num_usbh_ports = 2,
+ };
+
++static struct board_info __initdata board_CPVA642 = {
++ .name = "CPVA642",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++};
++
++
+ static struct board_info __initdata board_AGPFS0 = {
+ .name = "AGPF-S0",
+ .expected_cpu_id = 0x6358,
+@@ -522,6 +541,7 @@ static const struct board_info __initcon
+ &board_96358vw,
+ &board_96358vw2,
+ &board_AGPFS0,
++ &board_CPVA642,
+ &board_DWVS0,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+@@ -569,6 +589,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
++ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -452,6 +452,22 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ };
+
++/* D-Link DSL-274xB revison C2/C3 */
++static struct board_info __initdata board_dsl_274xb_rev_c = {
++ .name = "AW4139",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+ static struct board_info __initdata board_nb4_ser_r0 = {
+ .name = "NB4-SER-r0",
+ .expected_cpu_id = 0x6358,
+@@ -543,6 +559,7 @@ static const struct board_info __initcon
+ &board_AGPFS0,
+ &board_CPVA642,
+ &board_DWVS0,
++ &board_dsl_274xb_rev_c,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ #endif
+@@ -582,6 +599,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -324,6 +324,36 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++static struct sprom_fixup __initdata spw500v_fixups[] = {
++ { .offset = 46, .value = 0x3046 },
++ { .offset = 47, .value = 0x15a7 },
++ { .offset = 48, .value = 0xfa89 },
++ { .offset = 49, .value = 0xfe79 },
++ { .offset = 57, .value = 0x6a49 },
++};
++
++static struct board_info __initdata board_spw500v = {
++ .name = "SPW500V",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = spw500v_fixups,
++ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -551,6 +581,7 @@ static const struct board_info __initcon
+ &board_96348gw_a,
+ &board_rta1025w_16,
+ &board_96348_D4PW,
++ &board_spw500v,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -592,6 +623,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
++ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -217,6 +217,48 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ };
+
++static struct board_info __initdata board_gw6200 = {
++ .name = "GW6200",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++};
++
++static struct board_info __initdata board_gw6000 = {
++ .name = "GW6000",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++};
++
++
++
+ static struct board_info __initdata board_FAST2404 = {
+ .name = "F@ST2404",
+ .expected_cpu_id = 0x6348,
+@@ -574,6 +616,8 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ &board_96348r,
+ &board_96348gw,
++ &board_gw6000,
++ &board_gw6200,
+ &board_96348gw_10,
+ &board_96348gw_11,
+ &board_FAST2404,
+@@ -624,6 +668,8 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
++ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
++ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -396,6 +396,31 @@ static struct board_info __initdata boar
+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
+ },
+ };
++
++static struct board_info __initdata board_96348sv = {
++ .name = "MAGIC",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ /* it has BP_ENET_EXTERNAL_PHY */
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -626,6 +651,7 @@ static const struct board_info __initcon
+ &board_rta1025w_16,
+ &board_96348_D4PW,
+ &board_spw500v,
++ &board_96348sv,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -670,6 +696,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
++ { .compatible = "telsey,magic", .data = &board_96348sv, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -618,6 +618,32 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ .num_usbh_ports = 2,
+ };
++
++static struct board_info __initdata board_HW553 = {
++ .name = "HW553",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -663,6 +689,7 @@ static const struct board_info __initcon
+ &board_dsl_274xb_rev_c,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
++ &board_HW553,
+ #endif
+ };
+
+@@ -706,6 +733,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -112,6 +112,20 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++static struct board_info __initdata board_rta1320_16m = {
++ .name = "RTA1320_16M",
++ .expected_cpu_id = 0x6338,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6338 */
+
+ /*
+@@ -660,6 +674,7 @@ static const struct board_info __initcon
+ &board_96338gw,
+ &board_96338w,
+ &board_96338w2_e7t,
++ &board_rta1320_16m,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
+@@ -704,6 +719,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
++ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
+ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -658,6 +658,20 @@ static struct board_info __initdata boar
+ .pci_dev = 1,
+ },
+ };
++
++ /* T-Home Speedport W 303V Typ B */
++static struct board_info __initdata board_spw303v = {
++ .name = "96358-502V",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -705,6 +719,7 @@ static const struct board_info __initcon
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ &board_HW553,
++ &board_spw303v,
+ #endif
+ };
+
+@@ -756,6 +771,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
++ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -435,6 +435,26 @@ static struct board_info __initdata boar
+ .has_pccard = 1,
+ .has_ehci0 = 1,
+ };
++
++static struct board_info __initdata board_V2500V_BB = {
++ .name = "V2500V_BB",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6348 */
+
+ /*
+@@ -707,6 +727,7 @@ static const struct board_info __initcon
+ &board_96348_D4PW,
+ &board_spw500v,
+ &board_96348sv,
++ &board_V2500V_BB,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -746,6 +767,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+@@ -805,6 +827,22 @@ void __init board_bcm963xx_init(void)
+ val &= MPI_CSBASE_BASE_MASK;
+ }
+ boot_addr = (u8 *)KSEG1ADDR(val);
++ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
++
++ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
++ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
++ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
++ /* Do an early check of CFE and then select bank 0 */
++
++ if (boot_addr == (u8 *)0xbf800000) {
++ u8 *tmp_boot_addr = (u8*)0xbfc00000;
++
++ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
++ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
++ pr_info("V2500V: nvram bank 0\n");
++ boot_addr = tmp_boot_addr;
++ }
++ }
+
+ /* dump cfe version */
+ cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
+--- a/arch/mips/bcm63xx/dev-flash.c
++++ b/arch/mips/bcm63xx/dev-flash.c
+@@ -21,6 +21,7 @@
+ #include <linux/spi/spi.h>
+ #include <linux/spi/flash.h>
+
++#include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+ #include <bcm63xx_dev_flash.h>
+ #include <bcm63xx_regs.h>
+@@ -247,6 +248,13 @@ int __init bcm63xx_flash_register(void)
+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
+ val &= MPI_CSBASE_BASE_MASK;
+
++ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
++ /* Loading from CFE always uses Bank 0 */
++ if (!strcmp(board_get_name(), "V2500V_BB")) {
++ pr_info("V2500V: Start in Bank 0\n");
++ val = val + 0x400000; // Select Bank 0 start address
++ }
++
+ mtd_resources[0].start = val;
+ mtd_resources[0].end = 0x1FFFFFFF;
+ }
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -208,6 +208,24 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++
++/* BT Voyager 2110 */
++static struct board_info __initdata board_V2110 = {
++ .name = "V2110",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -728,6 +746,7 @@ static const struct board_info __initcon
+ &board_spw500v,
+ &board_96348sv,
+ &board_V2500V_BB,
++ &board_V2110,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -767,6 +786,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
++ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
--- /dev/null
+From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 9 Mar 2014 04:55:52 +0100
+Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
+
+---
+ arch/mips/bcm63xx/boards/Kconfig | 6 +
+ arch/mips/bcm63xx/boards/Makefile | 1 +
+ arch/mips/bcm63xx/boards/board_common.c | 2 +-
+ arch/mips/bcm63xx/boards/board_common.h | 6 +
+ arch/mips/bcm63xx/boards/board_livebox.c | 215 ++++++++++++++++++++++++++++++
+ 5 files changed, 229 insertions(+), 1 deletion(-)
+ create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c
+
+--- a/arch/mips/bcm63xx/boards/Kconfig
++++ b/arch/mips/bcm63xx/boards/Kconfig
+@@ -12,4 +12,10 @@ config BOARD_BCM963XX
+ select BCMA
+ default y
+
++config BOARD_LIVEBOX
++ bool "Inventel Livebox(es) boards"
++ select SSB
++ help
++ Inventel Livebox boards using the RedBoot bootloader.
++
+ endmenu
+--- a/arch/mips/bcm63xx/boards/Makefile
++++ b/arch/mips/bcm63xx/boards/Makefile
+@@ -1,2 +1,3 @@
+ obj-y += board_common.o
+ obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
++obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -54,7 +54,7 @@ void __init board_prom_init(void)
+ if (fw_arg3 == CFE_EPTSEAL)
+ board_bcm963xx_init();
+ else
+- panic("unsupported bootloader detected");
++ board_livebox_init();
+ }
+
+ static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
+--- a/arch/mips/bcm63xx/boards/board_common.h
++++ b/arch/mips/bcm63xx/boards/board_common.h
+@@ -24,4 +24,10 @@ static inline void board_of_device_prese
+ }
+ #endif
+
++#if defined(CONFIG_BOARD_LIVEBOX)
++void board_livebox_init(void);
++#else
++static inline void board_livebox_init(void) { }
++#endif
++
+ #endif /* __BOARD_COMMON_H */
+--- /dev/null
++++ b/arch/mips/bcm63xx/boards/board_livebox.c
+@@ -0,0 +1,155 @@
++/*
++ * This file is subject to the terms and conditions of the GNU General Public
++ * License. See the file "COPYING" in the main directory of this archive
++ * for more details.
++ *
++ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
++ */
++
++#include <linux/init.h>
++#include <linux/kernel.h>
++#include <linux/string.h>
++#include <linux/input.h>
++#include <asm/addrspace.h>
++#include <bcm63xx_board.h>
++#include <bcm63xx_cpu.h>
++#include <bcm63xx_regs.h>
++#include <bcm63xx_io.h>
++#include <bcm63xx_dev_flash.h>
++#include <board_bcm963xx.h>
++
++#include "board_common.h"
++
++#define PFX "board_livebox: "
++
++static unsigned int mac_addr_used = 0;
++
++/*
++ * known 6348 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6348
++static struct board_info __initdata board_livebox_blue5g = {
++ .name = "Livebox-blue-5g",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 31,
++ },
++
++ .ephy_reset_gpio = 6,
++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++};
++#endif
++
++/*
++ * all boards
++ */
++static const struct board_info __initdata *bcm963xx_boards[] = {
++#ifdef CONFIG_BCM63XX_CPU_6348
++ &board_livebox_blue5g
++#endif
++};
++
++static struct of_device_id const livebox_boards_dt[] = {
++ { .compatible = "inventel,livebox-1", .data = &board_livebox_blue5g, },
++ { }
++};
++
++/*
++ * register & return a new board mac address
++ */
++static int livebox_get_mac_address(u8 *mac)
++{
++ u8 *p;
++ int count;
++
++ memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN);
++
++ p = mac + ETH_ALEN - 1;
++ count = mac_addr_used;
++
++ while (count--) {
++ do {
++ (*p)++;
++ if (*p != 0)
++ break;
++ p--;
++ } while (p != mac);
++ }
++
++ if (p == mac) {
++ printk(KERN_ERR PFX "unable to fetch mac address\n");
++ return -ENODEV;
++ }
++ mac_addr_used++;
++
++ return 0;
++}
++
++/*
++ * early init callback
++ */
++#define LIVEBOX_GPIO_DETECT_MASK 0x000000ff
++#define LIVEBOX_BOOT_ADDR 0x1e400000
++
++#define LIVEBOX_HW_BLUE5G_9 0x90
++
++void __init board_livebox_init(void)
++{
++ u32 val;
++ u8 hw_version;
++ const struct board_info *board;
++ const struct of_device_id *board_match;
++
++ /* find board by compat */
++ board_match = bcm63xx_match_board(livebox_boards_dt);
++ if (board_match) {
++ board = board_match->data;
++ } else {
++ /* Get hardware version */
++ val = bcm_gpio_readl(GPIO_CTL_LO_REG);
++ val &= ~LIVEBOX_GPIO_DETECT_MASK;
++ bcm_gpio_writel(val, GPIO_CTL_LO_REG);
++
++ hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG);
++ hw_version &= LIVEBOX_GPIO_DETECT_MASK;
++
++ switch (hw_version) {
++ case LIVEBOX_HW_BLUE5G_9:
++ printk(KERN_INFO PFX "Livebox BLUE5G.9\n");
++ board = bcm963xx_boards[0];
++ break;
++ default:
++ printk(KERN_INFO PFX "Unknown livebox version: %02x\n",
++ hw_version);
++ /* use default livebox configuration */
++ board = bcm963xx_boards[0];
++ break;
++ }
++ }
++
++ /* use default livebox configuration */
++ board_early_setup(board, livebox_get_mac_address);
++
++ /* read base address of boot chip select (0) */
++ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
++ val &= MPI_CSBASE_BASE_MASK;
++ if (val != LIVEBOX_BOOT_ADDR) {
++ printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n",
++ val, LIVEBOX_BOOT_ADDR);
++ bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff);
++ }
++}
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -226,6 +226,33 @@ static struct board_info __initdata boar
+ };
+
+
++static struct board_info __initdata board_ct536_ct5621 = {
++ .name = "CT536_CT5621",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 0,
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -747,6 +774,7 @@ static const struct board_info __initcon
+ &board_96348sv,
+ &board_V2500V_BB,
+ &board_V2110,
++ &board_ct536_ct5621,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -788,6 +816,8 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
++ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
++ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -626,6 +626,7 @@ static struct board_info __initdata boar
+ },
+
+ .has_ohci0 = 1,
++ .has_ehci0 = 1,
+ };
+
+ /* D-Link DSL-274xB revison C2/C3 */
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -253,6 +253,30 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_96348A_122 = {
++ .name = "96348A-122",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_96348gw = {
+ .name = "96348GW",
+ .expected_cpu_id = 0x6348,
+@@ -776,6 +800,7 @@ static const struct board_info __initcon
+ &board_V2500V_BB,
+ &board_V2110,
+ &board_ct536_ct5621,
++ &board_96348A_122,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -818,6 +843,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
+ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
++ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -225,6 +225,33 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_CPVA502plus = {
++ .name = "CPVA502+",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ },
++
++ .ephy_reset_gpio = 4,
++ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
+
+ static struct board_info __initdata board_ct536_ct5621 = {
+ .name = "CT536_CT5621",
+@@ -801,6 +828,7 @@ static const struct board_info __initcon
+ &board_V2110,
+ &board_ct536_ct5621,
+ &board_96348A_122,
++ &board_CPVA502plus,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -853,6 +881,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
++ { .compatible = "telsey,cpva502plus", .data = &board_CPVA502plus, },
+ { .compatible = "telsey,magic", .data = &board_96348sv, },
+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
--- /dev/null
+From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Wed, 20 Jan 2010 16:21:30 +0100
+Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
+ .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
+ 2 files changed, 97 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -792,6 +792,58 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
++ * known 6368 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_96368mvwg = {
++ .name = "96368MVWG",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port1",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port2",
++ },
++
++ [4] = {
++ .used = 1,
++ .phy_id = 0x12,
++ .name = "port0",
++ },
++
++ [5] = {
++ .used = 1,
++ .phy_id = 0x11,
++ .name = "port3",
++ },
++ },
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++};
++#endif /* CONFIG_BCM63XX_CPU_6368 */
++
++/*
+ * all boards
+ */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -843,6 +895,10 @@ static const struct board_info __initcon
+ &board_HW553,
+ &board_spw303v,
+ #endif
++
++#ifdef CONFIG_BCM63XX_CPU_6368
++ &board_96368mvwg,
++#endif
+ };
+
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -903,6 +959,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ #endif
+--- a/arch/mips/bcm63xx/boards/board_common.c
++++ b/arch/mips/bcm63xx/boards/board_common.c
+@@ -81,12 +81,25 @@ void __init board_early_setup(const stru
+ bcm63xx_pci_enabled = 1;
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G2_PCI;
++
++ if (BCMCPU_IS_6368())
++ val |= GPIO_MODE_6368_PCI_REQ1 |
++ GPIO_MODE_6368_PCI_GNT1 |
++ GPIO_MODE_6368_PCI_INTB |
++ GPIO_MODE_6368_PCI_REQ0 |
++ GPIO_MODE_6368_PCI_GNT0;
+ }
+ #endif
+
+ if (board.has_pccard) {
+ if (BCMCPU_IS_6348())
+ val |= GPIO_MODE_6348_G1_MII_PCCARD;
++
++ if (BCMCPU_IS_6368())
++ val |= GPIO_MODE_6368_PCMCIA_CD1 |
++ GPIO_MODE_6368_PCMCIA_CD2 |
++ GPIO_MODE_6368_PCMCIA_VS1 |
++ GPIO_MODE_6368_PCMCIA_VS2;
+ }
+
+ if (board.has_enet0 && !board.enet0.use_internal_phy) {
--- /dev/null
+From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
+From: Maxime Bizon <mbizon@freebox.fr>
+Date: Fri, 4 Nov 2011 12:33:48 +0100
+Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++
+ 1 files changed, 67 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -841,6 +841,45 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ };
++
++static struct board_info __initdata board_96368mvngr = {
++ .name = "96368MVNgr",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+
+ /*
+@@ -898,6 +937,7 @@ static const struct board_info __initcon
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
++ &board_96368mvngr,
+ #endif
+ };
+
+@@ -959,6 +999,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 10:52:25 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++
+ 1 files changed, 77 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -64,6 +64,33 @@ static struct board_info __initdata boar
+ .use_fullspeed = 0,
+ .port_no = 0,
+ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
--- /dev/null
+From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Tue, 29 May 2012 11:01:12 +0200
+Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++
+ 1 files changed, 71 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -92,6 +92,40 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_963281TAN = {
++ .name = "963281TAN",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -918,6 +952,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_963281TAN,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -974,6 +1009,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
--- /dev/null
+From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jonas.gorski@gmail.com>
+Date: Mon, 30 Apr 2012 09:10:51 +0200
+Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
+ DSL-274xB rev F1
+
+---
+ arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++
+ 1 files changed, 104 insertions(+), 0 deletions(-)
+
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -126,6 +126,51 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_dsl_274xb_f1 = {
++ .name = "AW4339U",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_ATHEROS,
++ .caldata_offset = 0x7d1000,
++ .slot = 0,
++ .led_pin = -1,
++ .led_active_high = 1,
++ },
++ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 4",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 1",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -953,6 +998,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+ &board_963281TAN,
++ &board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -1011,6 +1057,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -568,6 +568,24 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ };
+
++/* NetGear DG834G v4 */
++static struct board_info __initdata board_96348W3 = {
++ .name = "96348W3",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .has_ohci0 = 1,
++};
++
+ static struct board_info __initdata board_96348_D4PW = {
+ .name = "D-4P-W",
+ .expected_cpu_id = 0x6348,
+@@ -1028,6 +1046,7 @@ static const struct board_info __initcon
+ &board_ct536_ct5621,
+ &board_96348A_122,
+ &board_CPVA502plus,
++ &board_96348W3,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1083,6 +1102,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
++ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -874,6 +874,30 @@ static struct board_info __initdata boar
+ .num_usbh_ports = 2,
+ };
+
++static struct board_info __initdata board_ct6373_1 = {
++ .name = "CT6373-1",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_HW553 = {
+ .name = "HW553",
+ .expected_cpu_id = 0x6358,
+@@ -1058,6 +1082,7 @@ static const struct board_info __initcon
+ &board_dsl_274xb_rev_c,
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
++ &board_ct6373_1,
+ &board_HW553,
+ &board_spw303v,
+ #endif
+@@ -1116,6 +1141,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
+ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
++ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -937,6 +937,33 @@ static struct board_info __initdata boar
+ .use_internal_phy = 1,
+ },
+ };
++
++/* D-Link DVA-G3810BN/TL */
++static struct board_info __initdata board_DVAG3810BN = {
++ .name = "DVAG3810BN",
++ .expected_cpu_id = 0x6358,
++
++ .has_enet0 = 1,
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++
++ .has_ohci0 = 1,
++ .has_pccard = 1,
++ .has_ehci0 = 1,
++};
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
+ /*
+@@ -1085,6 +1112,7 @@ static const struct board_info __initcon
+ &board_ct6373_1,
+ &board_HW553,
+ &board_spw303v,
++ &board_DVAG3810BN,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1144,6 +1172,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
++ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -966,6 +966,32 @@ static struct board_info __initdata boar
+ };
+ #endif /* CONFIG_BCM63XX_CPU_6358 */
+
++#ifdef CONFIG_BCM63XX_CPU_6362
++static struct board_info __initdata board_nb6 = {
++ .name = "NB6",
++ .expected_cpu_id = 0x6362,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [4] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++};
++#endif /* CONFIG_BCM63XX_CPU_6362 */
++
+ /*
+ * known 6368 boards
+ */
+@@ -1115,6 +1141,10 @@ static const struct board_info __initcon
+ &board_DVAG3810BN,
+ #endif
+
++#ifdef CONFIG_BCM63XX_CPU_6362
++ &board_nb6,
++#endif
++
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
+@@ -1183,6 +1213,9 @@ static struct of_device_id const bcm963x
+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6362
++ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -501,6 +501,22 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct board_info __initdata board_FAST2604 = {
++ .name = "F@ST2604",
++ .expected_cpu_id = 0x6348,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+ static struct board_info __initdata board_rta1025w_16 = {
+ .name = "RTA1025W_16",
+ .expected_cpu_id = 0x6348,
+@@ -1112,6 +1128,7 @@ static const struct board_info __initcon
+ &board_96348gw_10,
+ &board_96348gw_11,
+ &board_FAST2404,
++ &board_FAST2604,
+ &board_DV201AMR,
+ &board_96348gw_a,
+ &board_rta1025w_16,
+@@ -1187,6 +1204,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
++ { .compatible = "sagem,fast-2604", .data = &board_FAST2604, },
+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -127,6 +127,49 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_A4001N1 = {
++ .name = "963281T_TEF",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ },
++};
++
+ static struct board_info __initdata board_dsl_274xb_f1 = {
+ .name = "AW4339U",
+ .expected_cpu_id = 0x6328,
+@@ -1109,6 +1152,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+ &board_963281TAN,
++ &board_A4001N1,
+ &board_dsl_274xb_f1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+@@ -1174,6 +1218,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -93,6 +93,78 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ar5387un_fixups[] = {
++ { .offset = 2, .value = 0x05bb },
++ { .offset = 65, .value = 0x1204 },
++ { .offset = 78, .value = 0x0303 },
++ { .offset = 79, .value = 0x0202 },
++ { .offset = 80, .value = 0xff02 },
++ { .offset = 87, .value = 0x0315 },
++ { .offset = 88, .value = 0x0315 },
++ { .offset = 96, .value = 0x2048 },
++ { .offset = 97, .value = 0xff11 },
++ { .offset = 98, .value = 0x1567 },
++ { .offset = 99, .value = 0xfb24 },
++ { .offset = 100, .value = 0x3e3c },
++ { .offset = 101, .value = 0x4038 },
++ { .offset = 102, .value = 0xfe7f },
++ { .offset = 103, .value = 0x1279 },
++ { .offset = 112, .value = 0x2048 },
++ { .offset = 113, .value = 0xff03 },
++ { .offset = 114, .value = 0x154c },
++ { .offset = 115, .value = 0xfb27 },
++ { .offset = 116, .value = 0x3e3c },
++ { .offset = 117, .value = 0x4038 },
++ { .offset = 118, .value = 0xfe87 },
++ { .offset = 119, .value = 0x1233 },
++ { .offset = 203, .value = 0x2226 },
++};
++
++static struct board_info __initdata board_AR5387un = {
++ .name = "96328A-1441N1",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ar5387un_fixups,
++ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
++ },
++};
++
+ static struct board_info __initdata board_963281TAN = {
+ .name = "963281TAN",
+ .expected_cpu_id = 0x6328,
+@@ -1151,6 +1223,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_AR5387un,
+ &board_963281TAN,
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
+@@ -1221,6 +1294,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -93,6 +93,60 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ar5381u_fixups[] = {
++ { .offset = 97, .value = 0xfee5 },
++ { .offset = 98, .value = 0x157c },
++ { .offset = 99, .value = 0xfae7 },
++ { .offset = 113, .value = 0xfefa },
++ { .offset = 114, .value = 0x15d6 },
++ { .offset = 115, .value = 0xfaf8 },
++};
++
++static struct board_info __initdata board_AR5381u = {
++ .name = "96328A-1241N",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ar5381u_fixups,
++ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata ar5387un_fixups[] = {
+ { .offset = 2, .value = 0x05bb },
+ { .offset = 65, .value = 0x1204 },
+@@ -1223,6 +1277,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_AR5381u,
+ &board_AR5387un,
+ &board_963281TAN,
+ &board_A4001N1,
+@@ -1294,6 +1349,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
++ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -411,6 +411,20 @@ static struct board_info __initdata boar
+ .name = "96345GW2",
+ .expected_cpu_id = 0x6345,
+ };
++
++static struct board_info __initdata board_rta770bw = {
++ .name = "RTA770BW",
++ .expected_cpu_id = 0x6345,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+
+ /*
+@@ -1291,6 +1305,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
++ &board_rta770bw,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ &board_96348r,
+@@ -1361,6 +1376,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
++ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -12,6 +12,7 @@
+ #include <linux/init.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
++#include <linux/pci_ids.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -1123,6 +1124,92 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HW556_C = {
++ .name = "HW556_C",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_RALINK,
++ .caldata_offset = 0xeffe00,
++ .slot = 1,
++ .eeprom = "rt2x00.eeprom",
++ },
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++static struct board_info __initdata board_HW556_A = {
++ .name = "HW556_A",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_ATHEROS,
++ .caldata_offset = 0xf7e000,
++ .slot = 1,
++ .endian_check = 1,
++ .led_pin = 2,
++ .led_active_high = 1,
++ },
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++static struct board_info __initdata board_HW556_B = {
++ .name = "HW556_B",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_ATHEROS,
++ .caldata_offset = 0xefe000,
++ .slot = 1,
++ .endian_check = 1,
++ .led_pin = 2,
++ .led_active_high = 1,
++ },
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+ /* T-Home Speedport W 303V Typ B */
+ static struct board_info __initdata board_spw303v = {
+ .name = "96358-502V",
+@@ -1341,6 +1428,9 @@ static const struct board_info __initcon
+ &board_nb4_fxc_r1,
+ &board_ct6373_1,
+ &board_HW553,
++ &board_HW556_A,
++ &board_HW556_B,
++ &board_HW556_C,
+ &board_spw303v,
+ &board_DVAG3810BN,
+ #endif
+@@ -1413,6 +1503,9 @@ static struct of_device_id const bcm963x
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
++ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
++ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
++ { .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, },
+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -426,6 +426,25 @@ static struct board_info __initdata boar
+ .force_duplex_full = 1,
+ },
+ };
++
++// Actually this board is the very same as the rta770bw,
++// where the additional 'b' within the name just
++// just indicates 'Annex B'. The ADSL Modem itself is able
++// to handle both Annex A as well as Annex B -
++// the loaded firmware makes the only difference
++static struct board_info __initdata board_rta770w = {
++ .name = "RTA770W",
++ .expected_cpu_id = 0x6345,
++
++ .has_enet0 = 1,
++
++ .enet0 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6345 */
+
+ /*
+@@ -1393,6 +1412,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ &board_96345gw2,
+ &board_rta770bw,
++ &board_rta770w,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ &board_96348r,
+@@ -1467,6 +1487,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6345
+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
+ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
++ { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
--- /dev/null
+From: Marcin Jurkowski <marcin1j@gmail.com>
+Date: Thu, 31 Oct 2013 22:33:10 +0000
+Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
+ router
+
+This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
+router.
+It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
+modem equipped with 64 MiB RAM and 8 MiB flash.
+
+Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -341,6 +341,43 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_FAST2704V2 = {
++ .name = "F@ST2704V2",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .has_usbd = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -1402,6 +1439,7 @@ static const struct board_info __initcon
+ &board_963281TAN,
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
++ &board_FAST2704V2,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -1477,6 +1515,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
++ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
--- /dev/null
+From: Max Staudt <openwrt.max@enpas.org>
+Date: Wed, 15 Jan 2014 18:51:13 +0000
+Subject: [PATCH] bcm63xx: F@ST2504n board support (Linux-3.10.26)
+
+Signed-off-by: Max Staudt <openwrt.max@enpas.org>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1332,6 +1332,41 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_fast2504n = {
++ .name = "F@ST2504n",
++ .expected_cpu_id = 0x6362,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6362 */
+
+ /*
+@@ -1495,6 +1530,7 @@ static const struct board_info __initcon
+
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ &board_nb6,
++ &board_fast2504n,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
+@@ -1576,6 +1612,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
++ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -50,6 +50,55 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_3368 */
+
+ /*
++ * known 6318 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_6318
++static struct board_info __initdata board_96318ref = {
++ .name = "96318REF",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
++#endif /* CONFIG_BCM63XX_CPU_6318 */
++
++/*
+ * known 6328 boards
+ */
+ #ifdef CONFIG_BCM63XX_CPU_6328
+@@ -1467,6 +1516,9 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ &board_cvg834g,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++ &board_96318ref,
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+ &board_AR5381u,
+@@ -1544,6 +1596,9 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_3368
+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_6318
++ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++#endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -96,6 +96,50 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_96318ref_p300 = {
++ .name = "96318REF_P300",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+
+ /*
+@@ -1518,6 +1562,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
++ &board_96318ref_p300,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+@@ -1598,6 +1643,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
++ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1554,6 +1554,50 @@ static struct board_info __initdata boar
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+
+ /*
++ * known 63268/63269 boards
++ */
++#ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963269bhr = {
++ .name = "963269BHR",
++ .expected_cpu_id = 0x63268,
++
++ .has_pci = 1,
++
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++};
++#endif /* CONFIG_BCM63XX_CPU_63268 */
++
++/*
+ * all boards
+ */
+ static const struct board_info __initconst *bcm963xx_boards[] = {
+@@ -1634,6 +1678,9 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ #endif
++#ifdef CONFIG_BCM63XX_CPU_63268
++ &board_963269bhr,
++#endif
+ };
+
+ static struct of_device_id const bcm963xx_boards_dt[] = {
+@@ -1721,6 +1768,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ #endif
+ #endif /* CONFIG_OF */
+ { },
--- /dev/null
+From: "mexit@o2.pl" <mexit@o2.pl>
+Date: Sun, 24 Nov 2013 21:33:38 +0000
+Subject: [PATCH 4/5] bcm63xx: add support for Asmax AR 1004g router
+
+Support for Asmax AR 1004g router
+
+Signed-off-by: Adrian Feliks <mexit@o2.pl>
+---
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -647,6 +647,21 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct board_info __initdata board_96348gw_10_AR1004G = {
++ .name = "AR1004G",
++ .expected_cpu_id = 0x6348,
++
++ .has_enet1 = 1,
++ .has_pci = 1,
++
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++};
++
+
+ /* BT Voyager 2110 */
+ static struct board_info __initdata board_V2110 = {
+@@ -1649,6 +1664,7 @@ static const struct board_info __initcon
+ &board_96348A_122,
+ &board_CPVA502plus,
+ &board_96348W3,
++ &board_96348gw_10_AR1004G,
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6358
+@@ -1713,6 +1729,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6348
++ { .compatible = "asmax,ar-1004g", .data = &board_96348gw_10_AR1004G, },
+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+ { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1610,6 +1610,51 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_vw6339gu = {
++ .name = "VW6339GU",
++ .expected_cpu_id = 0x63268,
++
++ .has_ehci0 = 1,
++ .has_ohci0 = 1,
++ .num_usbh_ports = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "LAN2",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN4",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++
++ [4] = {
++ .used = 1,
++ .phy_id = 7,
++ .name = "WAN",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_63268 */
+
+ /*
+@@ -1696,6 +1741,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ &board_963269bhr,
++ &board_vw6339gu,
+ #endif
+ };
+
+@@ -1786,6 +1832,7 @@ static struct of_device_id const bcm963x
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
++ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
+ #endif /* CONFIG_OF */
+ { },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1572,6 +1572,64 @@ static struct board_info __initdata boar
+ * known 63268/63269 boards
+ */
+ #ifdef CONFIG_BCM63XX_CPU_63268
++static struct board_info __initdata board_963268bu_p300 = {
++ .name = "963268BU_P300",
++ .expected_cpu_id = 0x63268,
++
++ .has_ehci0 = 1,
++ .has_ohci0 = 1,
++ .num_usbh_ports = 1,
++
++ .has_usbd = 1,
++
++ .usbd = {
++ .use_fullspeed = 0,
++ .port_no = 0,
++ },
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 17,
++ .name = "FE1",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "GbE2",
++ },
++
++ [4] = {
++ .used = 1,
++ .phy_id = 0,
++ .name = "GbE3",
++ },
++
++ [5] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "GbE1",
++ },
++
++ [6] = {
++ .used = 1,
++ .phy_id = 24,
++ .name = "GbE4",
++ },
++
++ [7] = {
++ .used = 1,
++ .phy_id = 25,
++ .name = "GbE5",
++ },
++ },
++ },
++};
++
+ static struct board_info __initdata board_963269bhr = {
+ .name = "963269BHR",
+ .expected_cpu_id = 0x63268,
+@@ -1740,6 +1798,7 @@ static const struct board_info __initcon
+ &board_96368mvngr,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++ &board_963268bu_p300,
+ &board_963269bhr,
+ &board_vw6339gu,
+ #endif
+@@ -1831,6 +1890,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
++ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -13,6 +13,8 @@
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+ #include <linux/pci_ids.h>
++#include <linux/platform_data/b53.h>
++#include <linux/spi/spi.h>
+ #include <asm/addrspace.h>
+ #include <bcm63xx_board.h>
+ #include <bcm63xx_cpu.h>
+@@ -1566,6 +1568,47 @@ static struct board_info __initdata boar
+ .has_ohci0 = 1,
+ .has_ehci0 = 1,
+ };
++
++static struct sprom_fixup __initdata wap5813n_fixups[] = {
++ { .offset = 97, .value = 0xfeed },
++ { .offset = 98, .value = 0x15d1 },
++ { .offset = 99, .value = 0xfb0d },
++ { .offset = 113, .value = 0xfef7 },
++ { .offset = 114, .value = 0x15f7 },
++ { .offset = 115, .value = 0xfb1a },
++};
++
++static struct board_info __initdata board_WAP5813n = {
++ .name = "96369R-1231N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [4] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = wap5813n_fixups,
++ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6368 */
+
+ /*
+@@ -1796,6 +1839,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ &board_963268bu_p300,
+@@ -1888,6 +1932,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1569,6 +1569,59 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct sprom_fixup __initdata vr3025u_fixups[] = {
++ { .offset = 97, .value = 0xfeb3 },
++ { .offset = 98, .value = 0x1618 },
++ { .offset = 99, .value = 0xfab0 },
++ { .offset = 113, .value = 0xfed1 },
++ { .offset = 114, .value = 0x1609 },
++ { .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025u = {
++ .name = "96368M-1541N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vr3025u_fixups,
++ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -1839,6 +1892,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_VR3025u,
+ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -1932,6 +1986,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
++ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1622,6 +1622,59 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata vr3025un_fixups[] = {
++ { .offset = 97, .value = 0xfeb3 },
++ { .offset = 98, .value = 0x1618 },
++ { .offset = 99, .value = 0xfab0 },
++ { .offset = 113, .value = 0xfed1 },
++ { .offset = 114, .value = 0x1609 },
++ { .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3025un = {
++ .name = "96368M-1341N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vr3025un_fixups,
++ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -1893,6 +1946,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_VR3025u,
++ &board_VR3025un,
+ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -1987,6 +2041,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
++ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1578,6 +1578,48 @@ static struct sprom_fixup __initdata vr3
+ { .offset = 115, .value = 0xfad9 },
+ };
+
++static struct board_info __initdata board_P870HW51A_V2 = {
++ .name = "P870HW-51a_v2",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_VR3025u = {
+ .name = "96368M-1541N",
+ .expected_cpu_id = 0x6368,
+@@ -1945,6 +1987,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
+ &board_WAP5813n,
+@@ -2043,6 +2086,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1264,6 +1264,36 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HW520 = {
++ .name = "HW6358GW_B",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enet0 = 1,
++ .enet0 = {
++ .has_phy = 1,
++ .use_internal_phy = 1,
++ },
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4318,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_HW553 = {
+ .name = "HW553",
+ .expected_cpu_id = 0x6358,
+@@ -1971,6 +2001,7 @@ static const struct board_info __initcon
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ &board_ct6373_1,
++ &board_HW520,
+ &board_HW553,
+ &board_HW556_A,
+ &board_HW556_B,
+@@ -2063,6 +2094,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
++ { .compatible = "huawei,echolife-hg520v", .data = &board_HW520, },
+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
+ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -349,6 +349,49 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_A4001N = {
++ .name = "96328dg2x2",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43225,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ },
++};
++
+ static struct board_info __initdata board_A4001N1 = {
+ .name = "963281T_TEF",
+ .expected_cpu_id = 0x6328,
+@@ -1952,6 +1995,7 @@ static const struct board_info __initcon
+ &board_AR5381u,
+ &board_AR5387un,
+ &board_963281TAN,
++ &board_A4001N,
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
+ &board_FAST2704V2,
+@@ -2040,6 +2084,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
++ { .compatible = "adb,a4001n", .data = &board_A4001N, },
+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -142,6 +142,74 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
++ { .offset = 96, .value = 0x2046 },
++ { .offset = 97, .value = 0xfe9d },
++ { .offset = 98, .value = 0x1854 },
++ { .offset = 99, .value = 0xfa59 },
++ { .offset = 112, .value = 0x2046 },
++ { .offset = 113, .value = 0xfe79 },
++ { .offset = 114, .value = 0x17f5 },
++ { .offset = 115, .value = 0xfa47 },
++ { .offset = 161, .value = 0x2222 },
++ { .offset = 162, .value = 0x2222 },
++ { .offset = 169, .value = 0x2222 },
++ { .offset = 170, .value = 0x2222 },
++ { .offset = 171, .value = 0x5555 },
++ { .offset = 172, .value = 0x5555 },
++ { .offset = 173, .value = 0x4444 },
++ { .offset = 174, .value = 0x4444 },
++ { .offset = 175, .value = 0x5555 },
++ { .offset = 176, .value = 0x5555 },
++};
++
++static struct board_info __initdata board_dsl_2751b_d1 = {
++ .name = "AW5200B",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_enetsw = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = dsl2751b_e1_fixups,
++ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+
+ /*
+@@ -1989,6 +2057,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
+ &board_96318ref_p300,
++ &board_dsl_2751b_d1,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+@@ -2082,6 +2151,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
++ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1710,6 +1710,30 @@ static struct board_info __initdata boar
+ .has_ehci0 = 1,
+ };
+
++static struct board_info __initdata board_DGND3700v1_3800B = {
++ .name = "DGND3700v1_3800B",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [5] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+@@ -2131,6 +2155,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6368
+ &board_96368mvwg,
+ &board_96368mvngr,
++ &board_DGND3700v1_3800B,
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
+@@ -2233,6 +2258,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1375,6 +1375,31 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_homehub2a = {
++ .name = "HOMEHUB2A",
++ .expected_cpu_id = 0x6358,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enet1 = 1,
++ .enet1 = {
++ .has_phy = 1,
++ .phy_id = 0,
++ .force_speed_100 = 1,
++ .force_duplex_full = 1,
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM4322,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++};
++
+ static struct board_info __initdata board_HW520 = {
+ .name = "HW6358GW_B",
+ .expected_cpu_id = 0x6358,
+@@ -2138,6 +2163,7 @@ static const struct board_info __initcon
+ &board_nb4_ser_r0,
+ &board_nb4_fxc_r1,
+ &board_ct6373_1,
++ &board_homehub2a,
+ &board_HW520,
+ &board_HW553,
+ &board_HW556_A,
+@@ -2247,6 +2273,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
++ { .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6362
+ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1759,6 +1759,52 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HG655b = {
++ .name = "HW65x",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_RALINK,
++ .caldata_offset = 0x7c0000,
++ .slot = 1,
++ .eeprom = "rt2x00.eeprom",
++ },
++ },
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+@@ -2182,6 +2228,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
++ &board_HG655b,
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
+@@ -2285,6 +2332,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -210,6 +210,45 @@ static struct board_info __initdata boar
+ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
+ },
+ };
++
++static struct board_info __initdata board_FAST2704N = {
++ .name = "F@ST2704N",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_enetsw = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_6318 */
+
+ /*
+@@ -2153,6 +2192,7 @@ static const struct board_info __initcon
+ &board_96318ref,
+ &board_96318ref_p300,
+ &board_dsl_2751b_d1,
++ &board_FAST2704N,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
+@@ -2250,6 +2290,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
++ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1992,6 +1992,59 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata vr3026e_fixups[] = {
++ { .offset = 97, .value = 0xfeb3 },
++ { .offset = 98, .value = 0x1618 },
++ { .offset = 99, .value = 0xfab0 },
++ { .offset = 113, .value = 0xfed1 },
++ { .offset = 114, .value = 0x1609 },
++ { .offset = 115, .value = 0xfad9 },
++};
++
++static struct board_info __initdata board_VR3026e = {
++ .name = "96368MT-1341N1",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vr3026e_fixups,
++ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -2272,6 +2325,7 @@ static const struct board_info __initcon
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+ &board_VR3025un,
++ &board_VR3026e,
+ &board_WAP5813n,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
+@@ -2372,6 +2426,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
++ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -623,6 +623,50 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_R5010UNV2 = {
++ .name = "96328ang",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ },
++};
++
+ #endif /* CONFIG_BCM63XX_CPU_6328 */
+
+ /*
+@@ -2256,6 +2300,7 @@ static const struct board_info __initcon
+ &board_A4001N1,
+ &board_dsl_274xb_f1,
+ &board_FAST2704V2,
++ &board_R5010UNV2,
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ &board_96338gw,
+@@ -2354,6 +2399,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
++ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1888,6 +1888,52 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_HG622 = {
++ .name = "96368MVWG_hg622",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_caldata = 1,
++ .caldata = {
++ {
++ .vendor = PCI_VENDOR_ID_RALINK,
++ .caldata_offset = 0xfa0000,
++ .slot = 1,
++ .eeprom = "rt2x00.eeprom",
++ },
++ },
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++};
++
+ static struct sprom_fixup __initdata vr3025u_fixups[] = {
+ { .offset = 97, .value = 0xfeb3 },
+ { .offset = 98, .value = 0x1618 },
+@@ -2366,6 +2412,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
++ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
+ &board_VR3025u,
+@@ -2474,6 +2521,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
+ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
++ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1842,6 +1842,42 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata EVG2000_fixups[] = {
++ { .offset = 219, .value = 0xec08 },
++};
++
++static struct board_info __initdata board_EVG2000 = {
++ .name = "96369PVG",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [5] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++ .use_fallback_sprom = 1,
++ .fallback_sprom = {
++ .type = SPROM_BCM4322,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = EVG2000_fixups,
++ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
++ },
++};
++
+ static struct board_info __initdata board_HG655b = {
+ .name = "HW65x",
+ .expected_cpu_id = 0x6368,
+@@ -2412,6 +2448,7 @@ static const struct board_info __initcon
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
++ &board_EVG2000,
+ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
+@@ -2524,6 +2561,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
++ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -1732,6 +1732,51 @@ static struct board_info __initdata boar
+ * known 6368 boards
+ */
+ #ifdef CONFIG_BCM63XX_CPU_6368
++static struct board_info __initdata board_AV4202N = {
++ .name = "96368_Swiss_S1",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "port1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "port2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "port3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "port4",
++ },
++ },
++ },
++ .use_fallback_sprom = 1,
++ .fallback_sprom = {
++ .pci_bus = 0,
++ .pci_dev = 1,
++ },
++
++};
++
+ static struct board_info __initdata board_96368mvwg = {
+ .name = "96368MVWG",
+ .expected_cpu_id = 0x6368,
+@@ -2445,6 +2490,7 @@ static const struct board_info __initcon
+ #endif
+
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ &board_AV4202N,
+ &board_96368mvwg,
+ &board_96368mvngr,
+ &board_DGND3700v1_3800B,
+@@ -2552,6 +2598,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2216,6 +2216,106 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata vh4032n_fixups[] = {
++ { .offset = 2, .value = 0x04d2 },
++ { .offset = 4, .value = 0x4350 },
++ { .offset = 65, .value = 0x1300 },
++ { .offset = 68, .value = 0x0402 },
++ { .offset = 70, .value = 0x0090 },
++ { .offset = 71, .value = 0x4c19 },
++ { .offset = 72, .value = 0x2345 },
++ { .offset = 87, .value = 0x0315 },
++ { .offset = 88, .value = 0x0315 },
++ { .offset = 96, .value = 0x2048 },
++ { .offset = 97, .value = 0xfed7 },
++ { .offset = 98, .value = 0x15a6 },
++ { .offset = 99, .value = 0xfaee },
++ { .offset = 100, .value = 0x3e3a },
++ { .offset = 101, .value = 0x3a36 },
++ { .offset = 102, .value = 0xff7f },
++ { .offset = 103, .value = 0x11b9 },
++ { .offset = 104, .value = 0xfc53 },
++ { .offset = 105, .value = 0xffe6 },
++ { .offset = 106, .value = 0xfdd2 },
++ { .offset = 107, .value = 0xfe49 },
++ { .offset = 108, .value = 0xff6a },
++ { .offset = 109, .value = 0x136e },
++ { .offset = 110, .value = 0xfbed },
++ { .offset = 111, .value = 0x0000 },
++ { .offset = 112, .value = 0x2048 },
++ { .offset = 113, .value = 0xfee2 },
++ { .offset = 114, .value = 0x15e5 },
++ { .offset = 115, .value = 0xfaed },
++ { .offset = 116, .value = 0x3e3a },
++ { .offset = 117, .value = 0x3a36 },
++ { .offset = 118, .value = 0xffc8 },
++ { .offset = 119, .value = 0x12b8 },
++ { .offset = 120, .value = 0xfca1 },
++ { .offset = 121, .value = 0xff9b },
++ { .offset = 122, .value = 0x122a },
++ { .offset = 123, .value = 0xfcc8 },
++ { .offset = 124, .value = 0xff95 },
++ { .offset = 125, .value = 0x146b },
++ { .offset = 126, .value = 0xfbba },
++ { .offset = 127, .value = 0x0000 },
++ { .offset = 161, .value = 0x0000 },
++ { .offset = 162, .value = 0x0000 },
++ { .offset = 169, .value = 0x0000 },
++ { .offset = 170, .value = 0x0000 },
++ { .offset = 171, .value = 0x0000 },
++ { .offset = 172, .value = 0x0000 },
++ { .offset = 173, .value = 0x0000 },
++ { .offset = 174, .value = 0x0000 },
++ { .offset = 175, .value = 0x0000 },
++ { .offset = 176, .value = 0x0000 },
++ { .offset = 219, .value = 0x1108 },
++};
++
++static struct board_info __initdata board_VH4032N = {
++ .name = "VH4032N",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "LAN4",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43222,
++ .pci_bus = 0,
++ .pci_dev = 1,
++ .board_fixups = vh4032n_fixups,
++ .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata wap5813n_fixups[] = {
+ { .offset = 97, .value = 0xfeed },
+ { .offset = 98, .value = 0x15d1 },
+@@ -2498,6 +2598,7 @@ static const struct board_info __initcon
+ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
++ &board_VH4032N,
+ &board_VR3025u,
+ &board_VR3025un,
+ &board_VR3026e,
+@@ -2609,6 +2710,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
++ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_63268
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2066,6 +2066,29 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct board_info __initdata board_R1000H = {
++ .name = "R1000H",
++ .expected_cpu_id = 0x6368,
++
++ .has_pci = 1,
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++
++ .has_enetsw = 1,
++ .enetsw = {
++ .used_ports = {
++ [5] = {
++ .used = 1,
++ .phy_id = 0xff,
++ .bypass_link = 1,
++ .force_speed = 1000,
++ .force_duplex_full = 1,
++ .name = "RGMII",
++ },
++ },
++ },
++};
++
+ static struct board_info __initdata board_VR3025u = {
+ .name = "96368M-1541N",
+ .expected_cpu_id = 0x6368,
+@@ -2598,6 +2621,7 @@ static const struct board_info __initcon
+ &board_HG622,
+ &board_HG655b,
+ &board_P870HW51A_V2,
++ &board_R1000H,
+ &board_VH4032N,
+ &board_VR3025u,
+ &board_VR3025un,
+@@ -2699,6 +2723,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6368
++ { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
+ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -143,6 +143,67 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ar5315u_fixups[] = {
++ { .offset = 6, .value = 0x1c00 },
++ { .offset = 65, .value = 0x1255 },
++ { .offset = 97, .value = 0xfe55 },
++ { .offset = 98, .value = 0x171d },
++ { .offset = 99, .value = 0xfa42 },
++ { .offset = 113, .value = 0xfeb7 },
++ { .offset = 114, .value = 0x18cd },
++ { .offset = 115, .value = 0xfa4f },
++ { .offset = 162, .value = 0x6444 },
++ { .offset = 170, .value = 0x6444 },
++ { .offset = 172, .value = 0x6444 },
++};
++
++static struct board_info __initdata board_AR5315u = {
++ .name = "96318A-1441N1",
++ .expected_cpu_id = 0x6318,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_enetsw = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "LAN4",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ar5315u_fixups,
++ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
+ { .offset = 96, .value = 0x2046 },
+ { .offset = 97, .value = 0xfe9d },
+@@ -2538,6 +2599,7 @@ static const struct board_info __initcon
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ &board_96318ref,
+ &board_96318ref_p300,
++ &board_AR5315u,
+ &board_dsl_2751b_d1,
+ &board_FAST2704N,
+ #endif
+@@ -2643,6 +2705,7 @@ static struct of_device_id const bcm963x
+ #ifdef CONFIG_BCM63XX_CPU_6318
+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
++ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, },
+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
+ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
+ #endif
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -357,6 +357,73 @@ static struct board_info __initdata boar
+ },
+ };
+
++static struct sprom_fixup __initdata ad1018_fixups[] = {
++ { .offset = 6, .value = 0x1c00 },
++ { .offset = 65, .value = 0x1256 },
++ { .offset = 96, .value = 0x2046 },
++ { .offset = 97, .value = 0xfe69 },
++ { .offset = 98, .value = 0x1726 },
++ { .offset = 99, .value = 0xfa5c },
++ { .offset = 112, .value = 0x2046 },
++ { .offset = 113, .value = 0xfea8 },
++ { .offset = 114, .value = 0x1978 },
++ { .offset = 115, .value = 0xfa26 },
++ { .offset = 161, .value = 0x2222 },
++ { .offset = 169, .value = 0x2222 },
++ { .offset = 171, .value = 0x2222 },
++ { .offset = 173, .value = 0x2222 },
++ { .offset = 174, .value = 0x4444 },
++ { .offset = 175, .value = 0x2222 },
++ { .offset = 176, .value = 0x4444 },
++};
++
++static struct board_info __initdata board_AD1018 = {
++ .name = "96328avngr",
++ .expected_cpu_id = 0x6328,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 1,
++
++ .has_ohci0 = 1,
++ .has_ehci0 = 1,
++ .num_usbh_ports = 1,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "FIBRE",
++ },
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "LAN3",
++ },
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "LAN2",
++ },
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "LAN1",
++ },
++ },
++ },
++
++ .fallback_sprom = {
++ .type = SPROM_BCM43217,
++ .pci_bus = 1,
++ .pci_dev = 0,
++ .board_fixups = ad1018_fixups,
++ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
++ },
++};
++
+ static struct sprom_fixup __initdata ar5381u_fixups[] = {
+ { .offset = 97, .value = 0xfee5 },
+ { .offset = 98, .value = 0x157c },
+@@ -2605,6 +2672,7 @@ static const struct board_info __initcon
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6328
+ &board_96328avng,
++ &board_AD1018,
+ &board_AR5381u,
+ &board_AR5387un,
+ &board_963281TAN,
+@@ -2719,6 +2787,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
++ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
+ #endif
+ #ifdef CONFIG_BCM63XX_CPU_6338
+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
--- /dev/null
+--- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
++++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
+@@ -2654,6 +2654,49 @@ static struct board_info __initdata boar
+ },
+ },
+ };
++
++static struct board_info __initdata board_BSKYB_63168 = {
++ .name = "BSKYB_63168",
++ .expected_cpu_id = 0x63268,
++
++ .has_pci = 1,
++ .use_fallback_sprom = 0,
++
++ .has_ehci0 = 1,
++ .has_ohci0 = 1,
++ .num_usbh_ports = 2,
++
++ .has_enetsw = 1,
++
++ .enetsw = {
++ .used_ports = {
++ [0] = {
++ .used = 1,
++ .phy_id = 1,
++ .name = "Port 1",
++ },
++
++ [1] = {
++ .used = 1,
++ .phy_id = 2,
++ .name = "Port 2",
++ },
++
++ [2] = {
++ .used = 1,
++ .phy_id = 3,
++ .name = "Port 3",
++ },
++
++ [3] = {
++ .used = 1,
++ .phy_id = 4,
++ .name = "Port 4",
++ },
++
++ },
++ },
++};
+ #endif /* CONFIG_BCM63XX_CPU_63268 */
+
+ /*
+@@ -2762,6 +2805,7 @@ static const struct board_info __initcon
+ &board_963268bu_p300,
+ &board_963269bhr,
+ &board_vw6339gu,
++ &board_BSKYB_63168,
+ #endif
+ };
+
+@@ -2874,6 +2918,7 @@ static struct of_device_id const bcm963x
+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
++ { .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
+ #endif
+ #endif /* CONFIG_OF */
+ { },
--- /dev/null
+--- a/arch/mips/bcm63xx/nvram.c
++++ b/arch/mips/bcm63xx/nvram.c
+@@ -24,6 +24,12 @@
+ static struct bcm963xx_nvram nvram;
+ static int mac_addr_used;
+
++/*
++ * Required export for WL
++ */
++u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 };
++EXPORT_SYMBOL(nvram_buf);
++
+ void __init bcm63xx_nvram_init(void *addr)
+ {
+ u32 crc, expected_crc;
+--- a/arch/mips/mm/cache.c
++++ b/arch/mips/mm/cache.c
+@@ -64,6 +64,7 @@ void (*_dma_cache_wback)(unsigned long s
+ void (*_dma_cache_inv)(unsigned long start, unsigned long size);
+
+ EXPORT_SYMBOL(_dma_cache_wback_inv);
++EXPORT_SYMBOL(_dma_cache_inv);
+
+ #endif /* CONFIG_DMA_NONCOHERENT */
+
--- /dev/null
+--- a/arch/mips/bcm63xx/sprom.c
++++ b/arch/mips/bcm63xx/sprom.c
+@@ -8,6 +8,7 @@
+ */
+
+ #include <linux/init.h>
++#include <linux/export.h>
+ #include <linux/kernel.h>
+ #include <linux/string.h>
+ #include <linux/platform_device.h>
+@@ -387,7 +388,19 @@ struct fallback_sprom_match {
+ struct ssb_sprom sprom;
+ };
+
+-static struct fallback_sprom_match fallback_sprom;
++struct fallback_sprom_match fallback_sprom;
++
++int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out)
++{
++ if (pci_bus != fallback_sprom.pci_bus ||
++ pci_slot != fallback_sprom.pci_dev)
++ pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
++ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
++ pci_bus, pci_slot);
++ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
++ return 0;
++}
++EXPORT_SYMBOL(bcm63xx_get_fallback_sprom);
+
+ #if defined(CONFIG_SSB_PCIHOST)
+ int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--- /dev/null
+From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001
+From: Miguel GAIO <miguel.gaio@efixo.com>
+Date: Fri, 6 Jul 2012 14:12:33 +0200
+Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support
+
+---
+ drivers/net/phy/rtl8367.c | 5 +++++
+ 1 files changed, 5 insertions(+), 0 deletions(-)
+
+--- a/drivers/net/phy/rtl8367.c
++++ b/drivers/net/phy/rtl8367.c
+@@ -146,6 +146,10 @@
+ #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1
+ #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7
+
++#define RTL8367_PHY_AD_REG 0x130f
++#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5
++#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0
++
+ #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x))
+ #define RTL8367_DI_FORCE_MODE BIT(12)
+ #define RTL8367_DI_FORCE_NWAY BIT(7)
+@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct
+ case RTL8367_EXTIF_MODE_RGMII_33V:
+ REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
+ REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
++ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0);
+ break;
+
+ case RTL8367_EXTIF_MODE_TMII_MAC:
--- /dev/null
+From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001
+From: Jonas Gorski <jogo@openwrt.org>
+Date: Sun, 6 Apr 2014 22:33:16 +0200
+Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp
+
+Unligned memcpy_fromio randomly fails with an unaligned dst. Work around
+it by ensuring we are always doing aligned copies.
+
+Should fix filename corruption in jffs2 with SMP.
+
+Signed-off-by: Jonas Gorski <jogo@openwrt.org>
+---
+ fs/jffs2/nodelist.h | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+--- a/fs/jffs2/nodelist.h
++++ b/fs/jffs2/nodelist.h
+@@ -259,7 +259,7 @@ struct jffs2_full_dirent
+ uint32_t ino; /* == zero for unlink */
+ unsigned int nhash;
+ unsigned char type;
+- unsigned char name[0];
++ unsigned char name[0] __attribute__((aligned((sizeof(long)))));
+ };
+
+ /*
--- /dev/null
+--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
++++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+@@ -2232,6 +2232,10 @@ static int bcm_enetsw_open(struct net_de
+
+ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
+ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
++ if (BCMCPU_IS_63268()) {
++ rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN;
++ rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN;
++ }
+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
+ }
+
--- /dev/null
+#
+# Copyright (C) 2016 LEDE project
+#
+# This is free software, licensed under the GNU General Public License v2.
+# See /LICENSE for more information.
+#
+
+define Profile/Default
+ NAME:=Default Profile
+ PACKAGES:=kmod-b43 wpad-basic
+ PRIORITY:=1
+endef
+
+define Profile/Default/description
+ Package set compatible with most boards.
+endef
+
+$(eval $(call Profile,Default))
--- /dev/null
+CONFIG_CPU_RMAP=y
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_NET_FLOW_LIMIT=y
+CONFIG_NR_CPUS=2
+CONFIG_PADATA=y
+CONFIG_RCU_STALL_COMMON=y
+CONFIG_RFS_ACCEL=y
+CONFIG_RPS=y
+CONFIG_SMP=y
+CONFIG_SMP_UP=y
+CONFIG_TREE_RCU=y
+CONFIG_XPS=y
--- /dev/null
+BOARDNAME:=smp
+
+define Target/Description
+ Build firmware images for BCM63XX boards with SMP support.
+ Currently only BCM6362 and BCM6368 supported.
+endef
+
+
+++ /dev/null
-#
-# Copyright (C) 2006-2019 OpenWrt.org
-# Copyright (C) 2016 LEDE project
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-
-ARCH:=mips
-BOARD:=brcm63xx
-BOARDNAME:=Broadcom BCM63xx
-SUBTARGETS:=generic smp
-FEATURES:=squashfs usb atm pci pcmcia usbgadget
-KERNEL_PATCHVER:=4.14
-KERNEL_TESTING_PATCHVER:=4.19
-MAINTAINER:=Jonas Gorski <jogo@openwrt.org>
-
-define Target/Description
- Build firmware images for Broadcom based xDSL/routers
- currently supports BCM6338, BCM6348 and BCM6358 based devices.
- (e.g. Inventel Livebox, Siemens SE515, Neufbox 4)
-endef
-
-include $(INCLUDE_DIR)/target.mk
-
-DEFAULT_PACKAGES += swconfig kmod-gpio-button-hotplug
-
-$(eval $(call BuildTarget))
+++ /dev/null
-#!/bin/sh
-#
-# Copyright (C) 2013-2015 OpenWrt.org
-#
-
-. /lib/functions/uci-defaults.sh
-
-board_config_update
-
-case "$(board_name)" in
-actiontec,r1000h)
- ucidef_set_led_usbport "usb" "USB" "R1000H:green:usb" "usb1-port1" "usb2-port1"
- ;;
-adb,a4001n)
- ucidef_set_led_usbdev "usb" "USB" "A4001N:green:usb" "1-1"
- ;;
-adb,a4001n1)
- ucidef_set_led_netdev "lan" "LAN" "A4001N1:green:eth" "eth0"
- ucidef_set_led_usbdev "usb" "USB" "A4001N1:green:3g" "1-1"
- ;;
-adb,av4202n)
- ucidef_set_led_netdev "wlan0" "WLAN" "AV4202N:blue:wifi" "wlan0"
- ;;
-bt,home-hub-2-a)
- ucidef_set_led_netdev "lan" "LAN" "HOMEHUB2A:blue:broadband" "eth0.1"
- ucidef_set_led_netdev "wlan0" "WIFI" "HOMEHUB2A:green:wireless" "wlan0"
- ucidef_set_led_usbdev "usb1" "USB1" "HOMEHUB2A:blue:phone" "1-1"
- ucidef_set_led_usbdev "usb2" "USB2" "HOMEHUB2A:green:phone" "2-1"
- ;;
-comtrend,ar-5315u)
- ucidef_set_led_usbdev "usb" "USB" "AR-5315u:green:usb" "1-1"
- ;;
-huawei,echolife-hg553)
- ucidef_set_led_netdev "lan" "LAN" "HW553:blue:lan" "eth0"
- ucidef_set_led_usbdev "usb1" "USB1" "HW553:red:hspa" "1-1"
- ucidef_set_led_usbdev "usb2" "USB2" "HW553:blue:hspa" "1-2"
- ;;
-huawei,echolife-hg556a-a|\
-huawei,echolife-hg556a-b|\
-huawei,echolife-hg556a-c)
- ucidef_set_led_netdev "lan" "LAN" "HW556:red:dsl" "eth0"
- ucidef_set_led_usbdev "usb" "USB" "HW556:red:hspa" "1-2"
- ;;
-huawei,echolife-hg622)
- ucidef_set_led_usbdev "usb" "USB" "HG622:green:usb" "1-2"
- ;;
-huawei,echolife-hg655b)
- ucidef_set_led_usbdev "usb" "USB" "HW65x:green:usb" "1-2"
- ;;
-inventel,livebox-1)
- ucidef_set_led_netdev "lan" "LAN" "Livebox1:red:traffic" "eth0"
- ucidef_set_led_netdev "wan" "WAN" "Livebox1:red:adsl" "eth1"
- ucidef_set_led_netdev "wlan0" "WIFI" "Livebox1:red:wifi" "wlan0"
- ;;
-netgear,dgnd3700-v1)
- ucidef_set_led_netdev "lan" "LAN" "DGND3700v1_3800B:green:lan" "eth0.1"
- ucidef_set_led_netdev "wan" "WAN" "DGND3700v1_3800B:green:inet" "eth0.2"
- ucidef_set_led_netdev "wlan0" "WIFI2G" "DGND3700v1_3800B:green:wifi2g" "wlan0"
- ucidef_set_led_netdev "wlan1" "WIFI5G" "DGND3700v1_3800B:blue:wifi5g" "wlan1"
- ucidef_set_led_usbdev "usb1" "USB1" "DGND3700v1_3800B:green:usb-back" "1-1"
- ucidef_set_led_usbdev "usb2" "USB2" "DGND3700v1_3800B:green:usb-front" "1-2"
- ;;
-netgear,evg2000)
- ucidef_set_led_netdev "lan" "LAN" "EVG2000:green:lan" "eth0"
- ucidef_set_led_netdev "wan" "WAN" "EVG2000:green:wan" "eth1"
- ucidef_set_led_netdev "wlan0" "WIFI" "EVG2000:green:wireless" "wlan0"
- ucidef_set_led_usbdev "usb1" "USB1" "EVG2000:green:voip1" "1-1"
- ucidef_set_led_usbdev "usb2" "USB2" "EVG2000:green:voip2" "1-2"
- ;;
-nucom,r5010un-v2)
- ucidef_set_led_usbdev "usb" "USB" "R5010UNv2:green:usb" "1-1"
- ;;
-sagem,fast-2704n)
- ucidef_set_led_netdev "wan" "WAN" "F@ST2704N:green:inet" "eth0.2"
- ;;
-sagem,fast-2704-v2)
- ucidef_set_led_usbdev "usb" "USB" "F@ST2704V2:green:usb" "1-1"
- ;;
-sercomm,ad1018-nor)
- ucidef_set_led_netdev "wlan0" "WLAN" "AD1018:green:wifi" "wlan0"
- ;;
-telsey,cpva502plus)
- ucidef_set_led_netdev "lan" "LAN" "CPVA502+:amber:link" "eth0"
- ;;
-esac
-
-board_config_flush
-
-exit 0
+++ /dev/null
-#!/bin/sh
-#
-# Copyright (C) 2012-2015 OpenWrt.org
-#
-
-. /lib/functions/uci-defaults.sh
-
-board_config_update
-
-case "$(board_name)" in
-actiontec,r1000h|\
-dynalink,rta770bw|\
-dynalink,rta770w|\
-netgear,cvg834g|\
-netgear,evg2000|\
-t-com,speedport-w-303v|\
-t-com,speedport-w-500v)
- ucidef_set_interface_lan "eth0"
- ;;
-adb,a4001n1|\
-adb,a4001n|\
-adb,av4202n|\
-brcm,bcm963281tan|\
-brcm,bcm96328avng|\
-brcm,bcm96368mvngr|\
-comtrend,ar-5381u|\
-comtrend,ar-5387un|\
-comtrend,vr-3025u|\
-comtrend,vr-3025un|\
-comtrend,vr-3026e|\
-d-link,dsl-274xb-f1|\
-d-link,dsl-275xb-d1|\
-huawei,echolife-hg622|\
-huawei,echolife-hg655b|\
-nucom,r5010un-v2|\
-sagem,fast-2504n|\
-sagem,fast-2704-v2|\
-zyxel,p870hw-51a-v2)
- ucidef_add_switch "switch0" \
- "0:lan:1" "1:lan:2" "2:lan:3" "3:lan:4" "8t@eth0"
- ;;
-alcatel,rg100a|\
-belkin,f5d7633|\
-brcm,bcm96348gw|\
-brcm,bcm96348gw-10|\
-brcm,bcm96348gw-11|\
-brcm,bcm96358vw|\
-brcm,bcm96358vw2|\
-bt,voyager-2500v-bb|\
-davolink,dv-201amr|\
-d-link,dsl-2650u|\
-dynalink,rta1025w|\
-netgear,dg834gt-pn|\
-pirelli,agpf-s0|\
-sagem,fast-2404|\
-telsey,magic|\
-tp-link,td-w8900gb|\
-usrobotics,usr9108)
- ucidef_set_interfaces_lan_wan "eth1" "eth0"
- ucidef_add_switch "switch0" \
- "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "5u@eth1"
- ;;
-asmax,ar-1004g|\
-brcm,bcm96338gw|\
-brcm,bcm96338w|\
-bt,voyager-2110|\
-comtrend,ct-5365|\
-comtrend,ct-536plus|\
-comtrend,ct-6373|\
-d-link,dsl-2640b-b|\
-d-link,dsl-2640u|\
-dynalink,rta1320|\
-netgear,dg834g-v4|\
-sagem,fast-2604|\
-telsey,cpva642)
- ucidef_add_switch "switch0" \
- "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "5u@eth0"
- ;;
-brcm,bcm963268bu-p300)
- ucidef_add_switch "switch0" \
- "0:lan" "3:lan" "4:lan" "5:lan" "6:lan" "7:lan" "8t@eth0"
- ;;
-brcm,bcm96368mvwg)
- ucidef_add_switch "switch0" \
- "1:lan" "2:lan" "4:lan" "5:lan" "8t@eth0"
- ;;
-bt,home-hub-2-a|\
-d-link,dsl-274xb-c2|\
-huawei,echolife-hg553|\
-huawei,echolife-hg556a-a|\
-huawei,echolife-hg556a-b|\
-huawei,echolife-hg556a-c)
- ucidef_add_switch "switch0" \
- "0:lan:1" "1:lan:2" "2:lan:3" "3:lan:4" "5t@eth0"
- ;;
-comtrend,ar-5315u|\
-observa,vh4032n|\
-sagem,fast-2704n)
- ucidef_add_switch "switch0" \
- "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "8t@eth0"
- ;;
-comtrend,wap-5813n)
- ucidef_add_switch "switch0" \
- "0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "5t@eth0"
- ;;
-d-link,dva-g3810bn-tl|\
-huawei,echolife-hg520v|\
-sfr,neufbox-4-foxconn-r1|\
-sfr,neufbox-4-sercomm-r0)
- ucidef_set_interfaces_lan_wan "eth1.1" "eth0"
- ucidef_add_switch "switch0" \
- "0:lan:4" "1:lan:3" "2:lan:2" "3:lan:1" "5t@eth1"
- ;;
-inteno,vg50)
- ucidef_add_switch "switch0" \
- "0:lan" "1:lan" "2:lan" "3:lan" "4:wan" "8t@eth0"
- ;;
-inventel,livebox-1|\
-telsey,cpva502plus)
- ucidef_set_interfaces_lan_wan "eth0" "eth1"
- ;;
-netgear,dgnd3700-v1)
- ucidef_add_switch "switch0" \
- "1:lan:4" "2:lan:3" "3:lan:2" "4:lan:1" "0:wan" "8t@eth0"
- ;;
-sercomm,ad1018-nor)
- ucidef_add_switch "switch0" \
- "1:lan:3" "2:lan:2" "3:lan:1" "0:wan" "8t@eth0"
- ;;
-sfr,neufbox-6-sercomm-r0)
- ucidef_add_switch "switch0" \
- "1:lan" "2:lan" "3:lan" "4:lan" "0:wan" "9t@eth0"
- ;;
-sky,sr102)
- ucidef_set_interfaces_lan_wan "eth0.1" "eth0.2"
- ucidef_add_switch "switch0" \
- "0:lan" "1:lan" "2:lan" "3:wan" "8t@eth0"
- ;;
-*)
- ucidef_set_interfaces_lan_wan "eth1" "eth0"
- ;;
-esac
-
-board_config_flush
-
-exit 0
+++ /dev/null
-#!/bin/sh
-# Copyright (C) 2007-2013 OpenWrt.org
-
-. /lib/functions.sh
-. /lib/functions/leds.sh
-
-set_state() {
- case "$(board_name)" in
- actiontec,r1000h)
- status_led="R1000H:green:power"
- ;;
- adb,a4001n)
- status_led="A4001N:green:power"
- ;;
- adb,a4001n1)
- status_led="A4001N1:green:power"
- ;;
- adb,av4202n)
- status_led="AV4202N:white:power"
- ;;
- asmax,ar-1004g)
- status_led="AR1004G:green:power"
- ;;
- brcm,bcm963281tan)
- status_led="963281TAN::power"
- ;;
- brcm,bcm96328avng)
- status_led="96328avng::power"
- ;;
- brcm,bcm96348gw)
- status_led="96348GW:green:power"
- ;;
- brcm,bcm96348gw-11)
- status_led="96348GW-11:green:power"
- ;;
- bt,home-hub-2-a)
- status_led="HOMEHUB2A:green:upgrading"
- status_led2="HOMEHUB2A:blue:upgrading"
- ;;
- bt,voyager-2110)
- status_led="V2110:power:green"
- ;;
- comtrend,ar-5315u)
- status_led="AR-5315u:green:power"
- ;;
- comtrend,ar-5381u)
- status_led="AR-5381u:green:power"
- ;;
- comtrend,ar-5387un)
- status_led="AR-5387un:green:power"
- ;;
- comtrend,ct-536plus)
- status_led="CT536_CT5621:green:power"
- ;;
- comtrend,vr-3025u)
- status_led="VR-3025u:green:power"
- ;;
- comtrend,vr-3025un)
- status_led="VR-3025un:green:power"
- ;;
- comtrend,vr-3026e)
- status_led="VR-3026e:green:power"
- ;;
- comtrend,wap-5813n)
- status_led="WAP-5813n:green:power"
- ;;
- d-link,dsl-2640b-b)
- status_led="D-4P-W:green:power"
- ;;
- d-link,dsl-274xb-c2|\
- d-link,dsl-274xb-f1)
- status_led="dsl-274xb:green:power"
- ;;
- d-link,dsl-275xb-d1)
- status_led="dsl-275xb:green:power"
- ;;
- dynalink,rta770bw)
- status_led="RTA770BW:green:diag"
- ;;
- dynalink,rta770w)
- status_led="RTA770W:green:diag"
- ;;
- huawei,echolife-hg520v)
- status_led="HW520:green:net"
- ;;
- huawei,echolife-hg553)
- status_led="HW553:blue:power"
- ;;
- huawei,echolife-hg556a-a|\
- huawei,echolife-hg556a-b|\
- huawei,echolife-hg556a-c)
- status_led="HW556:red:power"
- ;;
- huawei,echolife-hg655b)
- status_led="HW65x:green:power"
- ;;
- inventel,livebox-1)
- status_led="Livebox1:red:adsl-fail-power"
- ;;
- netgear,cvg834g)
- status_led="CVG834G:green:power"
- ;;
- netgear,dgnd3700-v1)
- status_led="DGND3700v1_3800B:green:power"
- ;;
- netgear,evg2000)
- status_led="EVG2000:green:power"
- ;;
- nucom,r5010un-v2)
- status_led="R5010UNv2:green:power"
- ;;
- observa,vh4032n)
- status_led="VH4032N:blue:power"
- ;;
- sagem,fast-2504n)
- status_led="fast2504n:green:ok"
- ;;
- sagem,fast-2704n)
- status_led2="F@ST2704N:red:power"
- ;;
- sagem,fast-2704-v2)
- status_led="F@ST2704V2:green:power"
- ;;
- sercomm,ad1018-nor)
- status_led="AD1018:green:power"
- ;;
- sky,sr102)
- status_led="SR102:white:power"
- status_led2="SR102:red:power"
- ;;
- t-com,speedport-w-303v)
- status_led="spw303v:green:power+adsl"
- ;;
- t-com,speedport-w-500v)
- status_led="SPW500V:green:power"
- ;;
- tecom,gw6200)
- status_led="GW6200:green:line1"
- status_led2="GW6200:green:tel"
- ;;
- telsey,cpva642)
- status_led="CPVA642:green:power:"
- ;;
- zyxel,p870hw-51a-v2)
- status_led="P870HW-51a:green:power"
- ;;
- esac
-
- case "$1" in
- preinit)
- status_led_blink_preinit
- ;;
- failsafe)
- status_led_blink_failsafe
- ;;
- preinit_regular)
- status_led_blink_preinit_regular
- ;;
- done)
- if [ "${status_led/power}" != "$status_led" ]; then
- status_led_on
- else
- status_led_off
- fi
- ;;
- esac
-}
+++ /dev/null
-#!/bin/sh
-# Based on gabors ralink wisoc implementation.
-
-[ -e /lib/firmware/$FIRMWARE ] && exit 0
-
-. /lib/functions/caldata.sh
-
-board=$(board_name)
-
-case "$FIRMWARE" in
-"rt2x00.eeprom" )
- case $board in
- huawei,echolife-hg556a-c)
- caldata_extract "cal_data" 0x1fe00 0x200
- ;;
- huawei,echolife-hg622|\
- huawei,echolife-hg655b)
- caldata_extract "cal_data" 0x0 0x200
- ;;
- *)
- caldata_die "board $board is not supported yet"
- ;;
- esac
- ;;
-esac
+++ /dev/null
-#!/bin/sh
-#
-# Copyright (C) 2007 OpenWrt.org
-#
-#
-
-. /lib/functions.sh
-
-do_fixcrc() {
- mtd fixtrx linux
-}
-
-case "$(board_name)" in
- actiontec,r1000h|\
- adb,a4001n|\
- adb,a4001n1|\
- brcm,bcm96328avng|\
- brcm,bcm963281tan|\
- bt,voyager-2110|\
- bt,voyager-2500v-bb|\
- comtrend,ar-5315u|\
- comtrend,ar-5381u|\
- comtrend,ar-5387un|\
- comtrend,vr-3025u|\
- comtrend,vr-3025un|\
- comtrend,vr-3026e|\
- comtrend,wap-5813n|\
- comtrend,ct-6373|\
- d-link,dsl-274xb-f1|\
- dynalink,rta770bw|\
- dynalink,rta770w|\
- huawei,echolife-hg622|\
- netgear,evg2000|\
- nucom,r5010un-v2|\
- observa,vh4032n|\
- t-com,speedport-w-303v|\
- telsey,cpva502plus|\
- telsey,cpva642|\
- telsey,magic|\
- zyxel,p870hw-51a-v2)
- do_fixcrc
- ;;
-esac
+++ /dev/null
-PART_NAME=linux
-platform_check_image() {
- [ "$#" -gt 1 ] && return 1
- case "$(get_magic_word "$1")" in
- 3600|3700|3800)
- # 6348GW-11 boards use openwrt-96348GW-11-squashfs-cfe.bin files
- return 0
- ;;
- *)
- echo "Invalid image type. Please use only .bin files"
- return 1
- ;;
- esac
-}
-
-# use default for platform_do_upgrade()
+++ /dev/null
-CONFIG_ARCH_BINFMT_ELF_STATE=y
-CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
-CONFIG_ARCH_MMAP_RND_BITS_MAX=15
-CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
-CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_BCM6345_EXT_IRQ=y
-CONFIG_BCM6345_PERIPH_IRQ=y
-CONFIG_BCM63XX=y
-CONFIG_BCM63XX_CPU_3368=y
-CONFIG_BCM63XX_CPU_6318=y
-CONFIG_BCM63XX_CPU_63268=y
-CONFIG_BCM63XX_CPU_6328=y
-CONFIG_BCM63XX_CPU_6338=y
-CONFIG_BCM63XX_CPU_6345=y
-CONFIG_BCM63XX_CPU_6348=y
-CONFIG_BCM63XX_CPU_6358=y
-CONFIG_BCM63XX_CPU_6362=y
-CONFIG_BCM63XX_CPU_6368=y
-CONFIG_BCM63XX_EHCI=y
-CONFIG_BCM63XX_ENET=y
-CONFIG_BCM63XX_OHCI=y
-CONFIG_BCM63XX_PHY=y
-CONFIG_BCM63XX_WDT=y
-CONFIG_BCMA=y
-CONFIG_BCMA_BLOCKIO=y
-# CONFIG_BCMA_DEBUG is not set
-# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
-# CONFIG_BCMA_DRIVER_MIPS is not set
-CONFIG_BCMA_DRIVER_PCI=y
-# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set
-CONFIG_BCMA_HOST_PCI=y
-CONFIG_BCMA_HOST_PCI_POSSIBLE=y
-# CONFIG_BCMA_HOST_SOC is not set
-CONFIG_BCM_NET_PHYLIB=y
-CONFIG_BLK_MQ_PCI=y
-CONFIG_BOARD_BCM63XX_DT=y
-CONFIG_BOARD_BCM963XX=y
-CONFIG_BOARD_LIVEBOX=y
-CONFIG_CEVT_R4K=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_BMIPS=y
-CONFIG_CPU_BMIPS32_3300=y
-CONFIG_CPU_BMIPS4350=y
-CONFIG_CPU_GENERIC_DUMP_TLB=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
-CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_CPUFREQ=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_CSRC_R4K=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DTC=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_FIRMWARE_IN_KERNEL=y
-CONFIG_FIXED_PHY=y
-CONFIG_GENERIC_ATOMIC64=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_PINCTRL_GROUPS=y
-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_BCM63XX=y
-CONFIG_GPIO_GENERIC=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_COPY_THREAD_TLS=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_BCM63XX=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-CONFIG_HZ_PERIODIC=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_MIPS_CPU=y
-CONFIG_IRQ_WORK=y
-CONFIG_KEXEC=y
-CONFIG_KEXEC_CORE=y
-CONFIG_LEDS_BCM6328=y
-CONFIG_LEDS_BCM6358=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LIBFDT=y
-CONFIG_MDIO_BUS=y
-CONFIG_MDIO_DEVICE=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MIPS=y
-CONFIG_MIPS_ASID_BITS=8
-CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CLOCK_VSYSCALL=y
-# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
-# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
-CONFIG_MIPS_CMDLINE_FROM_DTB=y
-# CONFIG_MIPS_ELF_APPENDED_DTB is not set
-CONFIG_MIPS_EXTERNAL_TIMER=y
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=4
-CONFIG_MIPS_L1_CACHE_SHIFT_4=y
-# CONFIG_MIPS_MACHINE is not set
-# CONFIG_MIPS_NO_APPENDED_DTB is not set
-CONFIG_MIPS_RAW_APPENDED_DTB=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MTD_BCM63XX_PARTS=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-CONFIG_MTD_CFI_STAA=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_PARSER_IMAGETAG=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_PCI=y
-# CONFIG_PCIEAER is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DRIVERS_LEGACY=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_BCM6318=y
-CONFIG_PINCTRL_BCM63268=y
-CONFIG_PINCTRL_BCM6328=y
-CONFIG_PINCTRL_BCM6348=y
-CONFIG_PINCTRL_BCM6358=y
-CONFIG_PINCTRL_BCM6362=y
-CONFIG_PINCTRL_BCM6368=y
-CONFIG_PINCTRL_BCM63XX=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
-# CONFIG_RCU_NEED_SEGCBLIST is not set
-# CONFIG_RCU_STALL_COMMON is not set
-CONFIG_REGMAP=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_RELAY=y
-CONFIG_RTL8366_SMI=y
-CONFIG_RTL8367_PHY=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_BCM63XX=y
-CONFIG_SERIAL_BCM63XX_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_SPI_BCM63XX=y
-CONFIG_SPI_BCM63XX_HSSPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_SRCU=y
-CONFIG_SSB=y
-CONFIG_SSB_B43_PCI_BRIDGE=y
-CONFIG_SSB_BLOCKIO=y
-# CONFIG_SSB_DRIVER_MIPS is not set
-CONFIG_SSB_DRIVER_PCICORE=y
-CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
-CONFIG_SSB_PCIHOST=y
-CONFIG_SSB_PCIHOST_POSSIBLE=y
-CONFIG_SSB_SPROM=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_B53=y
-CONFIG_SWCONFIG_B53_MMAP_DRIVER=y
-CONFIG_SWCONFIG_B53_PHY_DRIVER=y
-CONFIG_SWCONFIG_B53_PHY_FIXUP=y
-CONFIG_SWCONFIG_B53_SPI_DRIVER=y
-# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
-CONFIG_SWPHY=y
-CONFIG_SYNC_R4K=y
-CONFIG_SYSCTL_EXCEPTION_TRACE=y
-CONFIG_SYS_HAS_CPU_BMIPS=y
-CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
-CONFIG_SYS_HAS_CPU_BMIPS4350=y
-CONFIG_SYS_HAS_EARLY_PRINTK=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
-CONFIG_SYS_SUPPORTS_SMP=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TINY_SRCU=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USE_OF=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WEAK_ORDERING=y
+++ /dev/null
-CONFIG_ARCH_BINFMT_ELF_STATE=y
-CONFIG_ARCH_CLOCKSOURCE_DATA=y
-CONFIG_ARCH_DISCARD_MEMBLOCK=y
-CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
-# CONFIG_ARCH_HAS_GCOV_PROFILE_ALL is not set
-# CONFIG_ARCH_HAS_SG_CHAIN is not set
-# CONFIG_ARCH_HAS_STRICT_KERNEL_RWX is not set
-# CONFIG_ARCH_HAS_STRICT_MODULE_RWX is not set
-CONFIG_ARCH_HIBERNATION_POSSIBLE=y
-CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
-CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
-CONFIG_ARCH_MMAP_RND_BITS_MAX=15
-CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=15
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX is not set
-# CONFIG_ARCH_OPTIONAL_KERNEL_RWX_DEFAULT is not set
-CONFIG_ARCH_SUPPORTS_UPROBES=y
-CONFIG_ARCH_SUSPEND_POSSIBLE=y
-CONFIG_ARCH_USE_BUILTIN_BSWAP=y
-CONFIG_ARCH_USE_QUEUED_RWLOCKS=y
-CONFIG_ARCH_USE_QUEUED_SPINLOCKS=y
-CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
-CONFIG_BCM6345_EXT_IRQ=y
-CONFIG_BCM6345_PERIPH_IRQ=y
-CONFIG_BCM63XX=y
-CONFIG_BCM63XX_CPU_3368=y
-CONFIG_BCM63XX_CPU_6318=y
-CONFIG_BCM63XX_CPU_63268=y
-CONFIG_BCM63XX_CPU_6328=y
-CONFIG_BCM63XX_CPU_6338=y
-CONFIG_BCM63XX_CPU_6345=y
-CONFIG_BCM63XX_CPU_6348=y
-CONFIG_BCM63XX_CPU_6358=y
-CONFIG_BCM63XX_CPU_6362=y
-CONFIG_BCM63XX_CPU_6368=y
-CONFIG_BCM63XX_EHCI=y
-CONFIG_BCM63XX_ENET=y
-CONFIG_BCM63XX_OHCI=y
-CONFIG_BCM63XX_PHY=y
-CONFIG_BCM63XX_WDT=y
-CONFIG_BCMA=y
-CONFIG_BCMA_BLOCKIO=y
-# CONFIG_BCMA_DEBUG is not set
-# CONFIG_BCMA_DRIVER_GMAC_CMN is not set
-# CONFIG_BCMA_DRIVER_MIPS is not set
-CONFIG_BCMA_DRIVER_PCI=y
-# CONFIG_BCMA_DRIVER_PCI_HOSTMODE is not set
-CONFIG_BCMA_HOST_PCI=y
-CONFIG_BCMA_HOST_PCI_POSSIBLE=y
-# CONFIG_BCMA_HOST_SOC is not set
-CONFIG_BCM_NET_PHYLIB=y
-CONFIG_BLK_MQ_PCI=y
-CONFIG_BOARD_BCM63XX_DT=y
-CONFIG_BOARD_BCM963XX=y
-CONFIG_BOARD_LIVEBOX=y
-CONFIG_CEVT_R4K=y
-CONFIG_CLKDEV_LOOKUP=y
-CONFIG_CLONE_BACKWARDS=y
-CONFIG_CPU_BIG_ENDIAN=y
-CONFIG_CPU_BMIPS=y
-CONFIG_CPU_BMIPS32_3300=y
-CONFIG_CPU_BMIPS4350=y
-CONFIG_CPU_GENERIC_DUMP_TLB=y
-CONFIG_CPU_HAS_PREFETCH=y
-CONFIG_CPU_HAS_SYNC=y
-CONFIG_CPU_MIPS32=y
-CONFIG_CPU_NEEDS_NO_SMARTMIPS_OR_MICROMIPS=y
-CONFIG_CPU_R4K_CACHE_TLB=y
-CONFIG_CPU_R4K_FPU=y
-CONFIG_CPU_SUPPORTS_32BIT_KERNEL=y
-CONFIG_CPU_SUPPORTS_CPUFREQ=y
-CONFIG_CPU_SUPPORTS_HIGHMEM=y
-CONFIG_CRASH_CORE=y
-CONFIG_CRYPTO_RNG2=y
-CONFIG_CRYPTO_WORKQUEUE=y
-CONFIG_CSRC_R4K=y
-CONFIG_DMA_NONCOHERENT=y
-CONFIG_DTC=y
-CONFIG_EARLY_PRINTK=y
-CONFIG_FIRMWARE_IN_KERNEL=y
-CONFIG_FIXED_PHY=y
-CONFIG_GENERIC_ATOMIC64=y
-CONFIG_GENERIC_CLOCKEVENTS=y
-CONFIG_GENERIC_CMOS_UPDATE=y
-CONFIG_GENERIC_CPU_AUTOPROBE=y
-CONFIG_GENERIC_IO=y
-CONFIG_GENERIC_IRQ_CHIP=y
-CONFIG_GENERIC_IRQ_EFFECTIVE_AFF_MASK=y
-CONFIG_GENERIC_IRQ_SHOW=y
-CONFIG_GENERIC_PCI_IOMAP=y
-CONFIG_GENERIC_PINCONF=y
-CONFIG_GENERIC_PINCTRL_GROUPS=y
-CONFIG_GENERIC_PINMUX_FUNCTIONS=y
-CONFIG_GENERIC_SCHED_CLOCK=y
-CONFIG_GENERIC_SMP_IDLE_THREAD=y
-CONFIG_GENERIC_TIME_VSYSCALL=y
-CONFIG_GPIOLIB=y
-CONFIG_GPIO_BCM63XX=y
-CONFIG_GPIO_GENERIC=y
-CONFIG_GPIO_SYSFS=y
-# CONFIG_GRO_CELLS is not set
-CONFIG_HANDLE_DOMAIN_IRQ=y
-CONFIG_HAS_DMA=y
-CONFIG_HAS_IOMEM=y
-CONFIG_HAS_IOPORT_MAP=y
-# CONFIG_HAVE_64BIT_ALIGNED_ACCESS is not set
-# CONFIG_HAVE_ARCH_BITREVERSE is not set
-CONFIG_HAVE_ARCH_JUMP_LABEL=y
-CONFIG_HAVE_ARCH_KGDB=y
-CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
-CONFIG_HAVE_ARCH_TRACEHOOK=y
-# CONFIG_HAVE_BOOTMEM_INFO_NODE is not set
-CONFIG_HAVE_CBPF_JIT=y
-CONFIG_HAVE_CC_STACKPROTECTOR=y
-CONFIG_HAVE_CLK=y
-CONFIG_HAVE_CONTEXT_TRACKING=y
-CONFIG_HAVE_COPY_THREAD_TLS=y
-CONFIG_HAVE_C_RECORDMCOUNT=y
-CONFIG_HAVE_DEBUG_KMEMLEAK=y
-CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
-CONFIG_HAVE_DMA_API_DEBUG=y
-CONFIG_HAVE_DMA_CONTIGUOUS=y
-CONFIG_HAVE_DYNAMIC_FTRACE=y
-CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
-CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
-CONFIG_HAVE_FUNCTION_TRACER=y
-CONFIG_HAVE_GENERIC_DMA_COHERENT=y
-CONFIG_HAVE_IDE=y
-CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
-CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
-CONFIG_HAVE_LATENCYTOP_SUPPORT=y
-CONFIG_HAVE_MEMBLOCK=y
-CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
-CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
-CONFIG_HAVE_NET_DSA=y
-CONFIG_HAVE_OPROFILE=y
-CONFIG_HAVE_PERF_EVENTS=y
-CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
-CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
-CONFIG_HAVE_VIRT_CPU_ACCOUNTING_GEN=y
-CONFIG_HW_HAS_PCI=y
-CONFIG_HW_RANDOM=y
-CONFIG_HW_RANDOM_BCM63XX=y
-CONFIG_HZ=250
-# CONFIG_HZ_100 is not set
-CONFIG_HZ_250=y
-CONFIG_HZ_PERIODIC=y
-CONFIG_INITRAMFS_SOURCE=""
-CONFIG_IRQCHIP=y
-CONFIG_IRQ_DOMAIN=y
-CONFIG_IRQ_FORCED_THREADING=y
-CONFIG_IRQ_MIPS_CPU=y
-CONFIG_IRQ_WORK=y
-CONFIG_KEXEC=y
-CONFIG_KEXEC_CORE=y
-CONFIG_LEDS_BCM6328=y
-CONFIG_LEDS_BCM6358=y
-CONFIG_LEDS_GPIO=y
-CONFIG_LIBFDT=y
-CONFIG_MDIO_BUS=y
-CONFIG_MDIO_DEVICE=y
-CONFIG_MFD_SYSCON=y
-CONFIG_MIPS=y
-CONFIG_MIPS_ASID_BITS=8
-CONFIG_MIPS_ASID_SHIFT=0
-CONFIG_MIPS_CLOCK_VSYSCALL=y
-# CONFIG_MIPS_CMDLINE_DTB_EXTEND is not set
-# CONFIG_MIPS_CMDLINE_FROM_BOOTLOADER is not set
-CONFIG_MIPS_CMDLINE_FROM_DTB=y
-# CONFIG_MIPS_ELF_APPENDED_DTB is not set
-CONFIG_MIPS_EXTERNAL_TIMER=y
-# CONFIG_MIPS_HUGE_TLB_SUPPORT is not set
-CONFIG_MIPS_L1_CACHE_SHIFT=4
-CONFIG_MIPS_L1_CACHE_SHIFT_4=y
-# CONFIG_MIPS_MACHINE is not set
-# CONFIG_MIPS_NO_APPENDED_DTB is not set
-CONFIG_MIPS_RAW_APPENDED_DTB=y
-CONFIG_MODULES_USE_ELF_REL=y
-CONFIG_MODULE_FORCE_LOAD=y
-CONFIG_MODULE_FORCE_UNLOAD=y
-CONFIG_MTD_BCM63XX_PARTS=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_BE_BYTE_SWAP=y
-# CONFIG_MTD_CFI_GEOMETRY is not set
-# CONFIG_MTD_CFI_NOSWAP is not set
-CONFIG_MTD_CFI_STAA=y
-# CONFIG_MTD_COMPLEX_MAPPINGS is not set
-CONFIG_MTD_JEDECPROBE=y
-CONFIG_MTD_M25P80=y
-CONFIG_MTD_PARSER_IMAGETAG=y
-CONFIG_MTD_PHYSMAP=y
-CONFIG_MTD_REDBOOT_PARTS=y
-CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
-CONFIG_MTD_SPI_NOR=y
-CONFIG_NEED_DMA_MAP_STATE=y
-CONFIG_NEED_PER_CPU_KM=y
-CONFIG_NO_GENERIC_PCI_IOPORT_MAP=y
-# CONFIG_NO_IOPORT_MAP is not set
-CONFIG_OF=y
-CONFIG_OF_ADDRESS=y
-CONFIG_OF_ADDRESS_PCI=y
-CONFIG_OF_EARLY_FLATTREE=y
-CONFIG_OF_FLATTREE=y
-CONFIG_OF_GPIO=y
-CONFIG_OF_IRQ=y
-CONFIG_OF_MDIO=y
-CONFIG_OF_NET=y
-CONFIG_OF_PCI=y
-CONFIG_OF_PCI_IRQ=y
-CONFIG_PCI=y
-# CONFIG_PCIEAER is not set
-CONFIG_PCIEPORTBUS=y
-CONFIG_PCI_DOMAINS=y
-CONFIG_PCI_DRIVERS_LEGACY=y
-CONFIG_PERF_USE_VMALLOC=y
-CONFIG_PGTABLE_LEVELS=2
-CONFIG_PHYLIB=y
-CONFIG_PINCTRL=y
-CONFIG_PINCTRL_BCM6318=y
-CONFIG_PINCTRL_BCM63268=y
-CONFIG_PINCTRL_BCM6328=y
-CONFIG_PINCTRL_BCM6348=y
-CONFIG_PINCTRL_BCM6358=y
-CONFIG_PINCTRL_BCM6362=y
-CONFIG_PINCTRL_BCM6368=y
-CONFIG_PINCTRL_BCM63XX=y
-CONFIG_POSIX_MQUEUE=y
-CONFIG_POSIX_MQUEUE_SYSCTL=y
-# CONFIG_RCU_NEED_SEGCBLIST is not set
-# CONFIG_RCU_STALL_COMMON is not set
-CONFIG_REGMAP=y
-CONFIG_REGMAP_MMIO=y
-CONFIG_RELAY=y
-CONFIG_RTL8366_SMI=y
-CONFIG_RTL8367_PHY=y
-# CONFIG_SCHED_INFO is not set
-# CONFIG_SCSI_DMA is not set
-# CONFIG_SERIAL_8250 is not set
-CONFIG_SERIAL_BCM63XX=y
-CONFIG_SERIAL_BCM63XX_CONSOLE=y
-CONFIG_SPI=y
-CONFIG_SPI_BCM63XX=y
-CONFIG_SPI_BCM63XX_HSSPI=y
-CONFIG_SPI_MASTER=y
-CONFIG_SQUASHFS_EMBEDDED=y
-CONFIG_SRCU=y
-CONFIG_SSB=y
-CONFIG_SSB_B43_PCI_BRIDGE=y
-CONFIG_SSB_BLOCKIO=y
-# CONFIG_SSB_DRIVER_MIPS is not set
-CONFIG_SSB_DRIVER_PCICORE=y
-CONFIG_SSB_DRIVER_PCICORE_POSSIBLE=y
-CONFIG_SSB_PCIHOST=y
-CONFIG_SSB_PCIHOST_POSSIBLE=y
-CONFIG_SSB_SPROM=y
-CONFIG_SWAP_IO_SPACE=y
-CONFIG_SWCONFIG=y
-CONFIG_SWCONFIG_B53=y
-CONFIG_SWCONFIG_B53_MMAP_DRIVER=y
-CONFIG_SWCONFIG_B53_PHY_DRIVER=y
-CONFIG_SWCONFIG_B53_PHY_FIXUP=y
-CONFIG_SWCONFIG_B53_SPI_DRIVER=y
-# CONFIG_SWCONFIG_B53_SRAB_DRIVER is not set
-CONFIG_SWPHY=y
-CONFIG_SYNC_R4K=y
-CONFIG_SYSCTL_EXCEPTION_TRACE=y
-CONFIG_SYS_HAS_CPU_BMIPS=y
-CONFIG_SYS_HAS_CPU_BMIPS32_3300=y
-CONFIG_SYS_HAS_CPU_BMIPS4350=y
-CONFIG_SYS_HAS_EARLY_PRINTK=y
-CONFIG_SYS_SUPPORTS_32BIT_KERNEL=y
-CONFIG_SYS_SUPPORTS_ARBIT_HZ=y
-CONFIG_SYS_SUPPORTS_BIG_ENDIAN=y
-CONFIG_SYS_SUPPORTS_HOTPLUG_CPU=y
-CONFIG_SYS_SUPPORTS_SMP=y
-CONFIG_TICK_CPU_ACCOUNTING=y
-CONFIG_TINY_SRCU=y
-CONFIG_USB_SUPPORT=y
-CONFIG_USE_OF=y
-CONFIG_VM_EVENT_COUNTERS=y
-CONFIG_WATCHDOG_NOWAYOUT=y
-CONFIG_WEAK_ORDERING=y
+++ /dev/null
-/dts-v1/;
-
-#include "bcm3368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Netgear CVG834G";
- compatible = "netgear,cvg834g", "brcm,bcm3368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "CVG834G:green:power";
- gpios = <&gpio1 5 0>;
- default-state = "on";
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
-
-&uart1 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm3368";
-
- aliases {
- pflash = &pflash;
- gpio0 = &gpio0;
- gpio1 = &gpio1;
- serial0 = &uart0;
- serial1 = &uart1;
- spi0 = &lsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <1>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- pflash: nor@1e000000 {
- compatible = "cfi-flash";
- reg = <0x1e000000 0x2000000>;
- bank-width = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- status = "disabled";
- };
-
- ubus@fff00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- periph_intc: interrupt-controller@fff8c00c {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0xfff8c00c 0x8>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>;
- };
-
- ext_intc0: interrupt-controller@fff8c014 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0xfff8c014 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <25>, <26>, <27>, <28>;
- };
-
- gpio1: gpio-controller@fff8c080 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xfff8c080 4>, <0xfff8c088 4>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- ngpios = <8>;
- };
-
- gpio0: gpio-controller@fff8c084 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xfff8c084 4>, <0xfff8c08c 4>;
-
- gpio-controller;
- #gpio-cells = <2>;
- };
-
- uart0: serial@fff8c100 {
- compatible = "brcm,bcm6345-uart";
- reg = <0xfff8c100 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- uart1: serial@fff8c120 {
- compatible = "brcm,bcm6345-uart";
- reg = <0xfff8c120 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <3>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- lsspi: spi@fff8c800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6358-spi";
- reg = <0xfff8c800 0x70c>;
- interrupts = <1>;
- /* clocks = <&clkctl 9>; */
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm63268.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "SKY SR102";
- compatible = "sky,sr102", "brcm,bcm63168", "brcm,bcm63268";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 33 0>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- lan1_green {
- label = "SR102:green:lan1";
- gpios = <&pinctrl 1 1>;
- };
- power_red {
- label = "SR102:red:power";
- gpios = <&pinctrl 2 1>;
- };
- wifi_red {
- label = "SR102:red:wifi";
- gpios = <&pinctrl 3 1>;
- };
- inet_red {
- label = "SR102:red:inet";
- gpios = <&pinctrl 4 1>;
- };
- inet_white {
- label = "SR102:white:inet";
- gpios = <&pinctrl 5 0>;
- };
- power_white {
- label = "SR102:white:power";
- gpios = <&pinctrl 6 0>;
- default-state = "on";
- };
- wifi_white {
- label = "SR102:white:wifi";
- gpios = <&pinctrl 8 0>;
- };
- lan2_red {
- label = "SR102:red:lan2";
- gpios = <&pinctrl 9 1>;
- };
- lan3_red {
- label = "SR102:red:lan3";
- gpios = <&pinctrl 10 1>;
- };
- lan4_red {
- label = "SR102:red:lan4";
- gpios = <&pinctrl 11 1>;
- };
- lan1_red {
- label = "SR102:red:lan1";
- gpios = <&pinctrl 12 1>;
- };
- lan2_green {
- label = "SR102:green:lan2";
- gpios = <&pinctrl 13 0>;
- };
- lan3_green {
- label = "SR102:green:lan3";
- gpios = <&pinctrl 14 1>;
- };
- lan4_green {
- label = "SR102:green:lan4";
- gpios = <&pinctrl 15 1>;
- };
- hd_white {
- label = "SR102:white:hd";
- gpios = <&pinctrl 18 0>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6318.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96318REF_P300 reference board";
- compatible = "brcm,bcm96318ref-p300", "brcm,bcm6318";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet {
- label = "96318REF_P300:green:inet";
- gpios = <&pinctrl 8 1>;
- };
-
- inet_fail {
- label = "96318REF_P300:red:inet-fail";
- gpios = <&pinctrl 9 1>;
- };
-
- post_failed {
- label = "96318REF_P300:red:post-failed";
- gpios = <&pinctrl 11 1>;
- };
-
- usb_pwron {
- label = "96318REF_P300::usb-pwron";
- gpios = <&pinctrl 13 1>;
- default-state = "on";
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <62500000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb_pwron>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6318.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96318REF reference board";
- compatible = "brcm,bcm96318ref", "brcm,bcm6318";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet {
- label = "96318REF:green:inet";
- gpios = <&pinctrl 8 1>;
- };
-
- inet_fail {
- label = "96318REF:red:inet-fail";
- gpios = <&pinctrl 9 1>;
- };
-
- post_failed {
- label = "96318REF:red:post-failed";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <62500000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb_pwron>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6318.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend AR-5315u";
- compatible = "comtrend,ar-5315u", "brcm,bcm6318";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 3 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- wps_green {
- label = "AR-5315u:green:wps";
- gpios = <&pinctrl 0 1>;
- };
- power_green {
- label = "AR-5315u:green:power";
- gpios = <&pinctrl 1 1>;
- default-state = "on";
- };
- usb_green {
- label = "AR-5315u:green:usb";
- gpios = <&pinctrl 2 1>;
- };
- inet_green {
- label = "AR-5315u:green:inet";
- gpios = <&pinctrl 8 1>;
- };
- inet_red {
- label = "AR-5315u:red:inet";
- gpios = <&pinctrl 9 1>;
- };
- dsl_green {
- label = "AR-5315u:green:dsl";
- gpios = <&pinctrl 10 1>;
- };
- power_red {
- label = "AR-5315u:red:power";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <62500000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0xfe0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@ff0000 {
- reg = <0xff0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ephy0_act_led &pinctrl_ephy1_act_led
- &pinctrl_ephy2_act_led &pinctrl_ephy3_act_led>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6318.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "D-Link DSL-2750B/DSL-2751 rev D1";
- compatible = "d-link,dsl-275xb-d1", "brcm,bcm6318";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wifi {
- label = "wifi";
- gpios = <&pinctrl 2 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "dsl-275xb:green:power";
- gpios = <&pinctrl 3 1>;
- default-state = "on";
- };
-
- inet_green {
- label = "dsl-275xb:green:inet";
- gpios = <&pinctrl 8 1>;
- };
-
- inet_red {
- label = "dsl-275xb:red:inet-fail";
- gpios = <&pinctrl 9 1>;
- };
-
- power_red {
- label = "dsl-275xb:red:post-failed";
- gpios = <&pinctrl 11 1>;
- };
-
- wps_blue {
- label = "dsl-275xb:blue:wps";
- gpios = <&pinctrl 16 1>;
- };
-
- dsl_green {
- label = "dsl-275xb:green:dsl";
- gpios = <&pinctrl 17 1>;
- };
-
- usb_green {
- /* not user controllable? */
- label = "dsl-275xb:green:usb";
- gpios = <&pinctrl 49 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <62500000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0x7e0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- reg = <0x7f0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
-
- pinctrl-0 = <&pinctrl_ephy0_act_led &pinctrl_ephy1_act_led
- &pinctrl_ephy2_act_led &pinctrl_ephy3_act_led>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6318.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Sagem F@st 2704N";
- compatible = "sagem,fast-2704n", "brcm,bcm6318";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 1 0>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- wps_green {
- label = "F@ST2704N:green:wps";
- gpios = <&pinctrl 2 1>;
- };
- lan1_green {
- label = "F@ST2704N:green:lan1";
- gpios = <&pinctrl 4 1>;
- };
- lan2_green {
- label = "F@ST2704N:green:lan2";
- gpios = <&pinctrl 5 1>;
- };
- lan3_green {
- label = "F@ST2704N:green:lan3";
- gpios = <&pinctrl 6 1>;
- };
- lan4_green {
- label = "F@ST2704N:green:lan4";
- gpios = <&pinctrl 7 1>;
- };
- inet_green {
- label = "F@ST2704N:green:inet";
- gpios = <&pinctrl 8 1>;
- };
- inet_red {
- label = "F@ST2704N:red:inet";
- gpios = <&pinctrl 9 1>;
- };
- dsl_green {
- label = "F@ST2704N:green:dsl";
- gpios = <&pinctrl 10 1>;
- };
- power_red {
- label = "F@ST2704N:red:power";
- gpios = <&pinctrl 11 1>;
- };
- power_green {
- label = "F@ST2704N:green:power";
- gpios = <&pinctrl 47 1>;
- default-state = "on";
- };
- usb_green {
- label = "F@ST2704N:green:usb";
- gpios = <&pinctrl 49 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <62500000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0x7e0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- reg = <0x7f0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6318";
-
- aliases {
- pinctrl = &pinctrl;
- serial0 = &uart0;
- spi1 = &hsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips3300", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- ubus@10000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- ext_intc: interrupt-controller@10000018 {
- compatible = "brcm,bcm6318-ext-intc";
- reg = <0x10000018 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <24>, <25>, <26>, <27>;
- };
-
- periph_intc: interrupt-controller@10000020 {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0x10000020 0x20>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>;
- };
-
- pinctrl: pin-controller@10000080 {
- compatible = "brcm,bcm6318-pinctrl";
- reg = <0x10000080 0x08>,
- <0x10000088 0x08>,
- <0x10000098 0x04>,
- <0x1000009c 0x0c>,
- <0x100000d4 0x18>;
- reg-names = "dirout", "dat", "mode", "mux", "pad";
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-parent = <&ext_intc>;
- interrupts = <0 0>, <1 0>;
- interrupt-names = "gpio33", "gpio34";
-
- pinctrl_ephy0_spd_led: ephy0_spd_led {
- function = "ephy0_spd_led";
- pins = "gpio0";
- };
-
- pinctrl_ephy1_spd_led: ephy1_spd_led {
- function = "ephy1_spd_led";
- pins = "gpio1";
- };
-
- pinctrl_ephy2_spd_led: ephy2_spd_led {
- function = "ephy2_spd_led";
- pins = "gpio2";
- };
-
- pinctrl_ephy3_spd_led: ephy3_spd_led {
- function = "ephy3_spd_led";
- pins = "gpio3";
- };
-
- pinctrl_ephy0_act_led: ephy0_act_led {
- function = "ephy0_act_led";
- pins = "gpio4";
- };
-
- pinctrl_ephy1_act_led: ephy1_act_led {
- function = "ephy1_act_led";
- pins = "gpio5";
- };
-
- pinctrl_ephy2_act_led: ephy2_act_led {
- function = "ephy2_act_led";
- pins = "gpio6";
- };
-
- pinctrl_ephy3_act_led: ephy3_act_led {
- function = "ephy3_act_led";
- pins = "gpio7";
- };
-
- pinctrl_serial_led: serial_led {
- pinctrl_serial_led_data: serial_led_data {
- function = "serial_led_data";
- pins = "gpio6";
- };
-
- pinctrl_serial_led_clk: serial_led_clk {
- function = "serial_led_clk";
- pins = "gpio7";
- };
- };
-
- pinctrl_inet_act_led: inet_act_led {
- function = "inet_act_led";
- pins = "gpio8";
- };
-
- pinctrl_inet_fail_led: inet_fail_led {
- function = "inet_fail_led";
- pins = "gpio9";
- };
-
- pinctrl_dsl_led: dsl_led {
- function = "dsl_led";
- pins = "gpio10";
- };
-
- pinctrl_post_fail_led: post_fail_led {
- function = "post_fail_led";
- pins = "gpio11";
- };
-
- pinctrl_wlan_wps_led: wlan_wps_led {
- function = "wlan_wps_led";
- pins = "gpio12";
- };
-
- pinctrl_usb_pwron: usb_pwron {
- function = "usb_pwron";
- pins = "gpio13";
- };
-
- pinctrl_usb_device_led: usb_device_led {
- function = "usb_device_led";
- pins = "gpio13";
- };
-
- pinctrl_usb_active: usb_active {
- function = "usb_active";
- pins = "gpio40";
- };
- };
-
- uart0: serial@10000100 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000100 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <28>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- leds: led-controller@10000200 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-leds";
- reg = <0x10000200 0x24>;
- status = "disabled";
- };
-
- hsspi: spi@10003000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-hsspi";
- reg = <0x10003000 0x600>;
- interrupts = <29>;
- /* clocks = <&clkctl 25>; */
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm63268.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM963268BU_P300 reference board";
- compatible = "brcm,bcm963268bu-p300", "brcm,bcm63268";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 32 0>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 33 0>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm63268.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Inteno VG50";
- compatible = "inteno,vg50", "brcm,bcm63268";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 32 0>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 34 0>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm63268";
-
- aliases {
- pinctrl = &pinctrl;
- serial0 = &uart0;
- serial1 = &uart1;
- spi0 = &lsspi;
- spi1 = &hsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <1>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- ubus@10000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- ext_intc: interrupt-controller@10000018 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0x10000018 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <44>, <45>, <46>, <47>;
- };
-
- periph_intc: interrupt-controller@10000020 {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0x10000020 0x20>,
- <0x10000040 0x20>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>, <3>;
- };
-
- pinctrl: pin-controller@100000c0 {
- compatible = "brcm,bcm63268-pinctrl";
- reg = <0x100000c0 0x8>,
- <0x100000c8 0x8>,
- <0x100000d0 0x4>,
- <0x100000d8 0x4>,
- <0x100000dc 0x4>,
- <0x100000f8 0x4>;
- reg-names = "dirout", "dat", "led", "mode",
- "ctrl", "basemode";
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
- interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
-
- pinctrl_serial_led: serial_led {
- pinctrl_serial_led_clk: serial_led_clk {
- function = "serial_led_clk";
- pins = "gpio0";
- };
-
- pinctrl_serial_led_data: serial_led_data {
- function = "serial_led_data";
- pins = "gpio1";
- };
- };
-
- pinctrl_hsspi_cs4: hsspi_cs4 {
- function = "hsspi_cs4";
- pins = "gpio16";
- };
-
- pinctrl_hsspi_cs5: hsspi_cs5 {
- function = "hsspi_cs5";
- pins = "gpio17";
- };
-
- pinctrl_hsspi_cs6: hsspi_cs6 {
- function = "hsspi_cs6";
- pins = "gpio8";
- };
-
- pinctrl_hsspi_cs7: hsspi_cs7 {
- function = "hsspi_cs7";
- pins = "gpio9";
- };
-
- pinctrl_adsl_spi: adsl_spi {
- pinctrl_adsl_spi_miso: adsl_spi_miso {
- function = "adsl_spi_miso";
- pins = "gpio18";
- };
-
- pinctrl_adsl_spi_mosi: adsl_spi_mosi {
- function = "adsl_spi_mosi";
- pins = "gpio19";
- };
- };
-
- pinctrl_vreq_clk: vreq_clk {
- function = "vreq_clk";
- pins = "gpio22";
- };
-
- pinctrl_pcie_clkreq_b: pcie_clkreq_b {
- function = "pcie_clkreq_b";
- pins = "gpio23";
- };
-
- pinctrl_robosw_led_clk: robosw_led_clk {
- function = "robosw_led_clk";
- pins = "gpio30";
- };
-
- pinctrl_robosw_led_data: robosw_led_data {
- function = "robosw_led_data";
- pins = "gpio31";
- };
-
- pinctrl_nand: nand {
- function = "nand";
- group = "nand_grp";
- };
-
- pinctrl_gpio35_alt: gpio35_alt {
- function = "gpio35_alt";
- pin = "gpio35";
- };
-
- pinctrl_dectpd: dectpd {
- function = "dectpd";
- group = "dectpd_grp";
- };
-
- pinctrl_vdsl_phy_override_0: vdsl_phy_override_0 {
- function = "vdsl_phy_override_0";
- group = "vdsl_phy_override_0_grp";
- };
-
- pinctrl_vdsl_phy_override_1: vdsl_phy_override_1 {
- function = "vdsl_phy_override_1";
- group = "vdsl_phy_override_1_grp";
- };
-
- pinctrl_vdsl_phy_override_2: vdsl_phy_override_2 {
- function = "vdsl_phy_override_2";
- group = "vdsl_phy_override_2_grp";
- };
-
- pinctrl_vdsl_phy_override_3: vdsl_phy_override_3 {
- function = "vdsl_phy_override_3";
- group = "vdsl_phy_override_3_grp";
- };
-
- pinctrl_dsl_gpio8: dsl_gpio8 {
- function = "dsl_gpio8";
- group = "dsl_gpio8";
- };
-
- pinctrl_dsl_gpio9: dsl_gpio9 {
- function = "dsl_gpio9";
- group = "dsl_gpio9";
- };
- };
-
- uart0: serial@10000180 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000180 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <5>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- uart1: serial@100001a0 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x100001a0 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <34>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- lsspi: spi@10000800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6358-spi";
- reg = <0x10000800 0x70c>;
- interrupts = <80>;
- /* clocks = <&clkctl 15>; */
- };
-
- hsspi: spi@10001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-hsspi";
- reg = <0x10001000 0x600>;
- interrupts = <6>;
- /* clocks = <&clkctl 16>; */
- };
-
- leds: led-controller@10001900 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-leds";
- reg = <0x10001900 0x24>;
- status = "disabled";
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm63268.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM963269BHR reference board";
- compatible = "brcm,bcm963269bhr", "brcm,bcm63269", "brcm,bcm63268";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 32 0>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- usb1 {
- label = "963269BHR:green:usb1";
- gpios = <&pinctrl 9 1>;
- };
-
- usb2 {
- label = "963269BHR:green:usb2";
- gpios = <&pinctrl 10 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "ADB P.DG A4001N";
- compatible = "adb,a4001n", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_red {
- label = "A4001N:red:inet";
- gpios = <&pinctrl 1 0>;
- };
- power_red {
- label = "A4001N:red:power";
- gpios = <&pinctrl 4 0>;
- };
- power_green {
- label = "A4001N:green:power";
- gpios = <&pinctrl 8 0>;
- default-state = "on";
- };
- usb_green {
- label = "A4001N:green:usb";
- gpios = <&pinctrl 10 1>;
- };
- dsl_green {
- label = "A4001N:green:dsl";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0x7e0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- reg = <0x7f0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "ADB P.DG A4001N1";
- compatible = "adb,a4001n1", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wlan";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_red {
- label = "A4001N1:red:inet";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "A4001N1:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "A4001N1:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- ppp_red {
- label = "A4001N1:red:ppp";
- gpios = <&pinctrl 5 1>;
- };
- usb_green {
- label = "A4001N1:green:3g";
- gpios = <&pinctrl 6 1>;
- };
- usb_red {
- label = "A4001N1:red:3g";
- gpios = <&pinctrl 7 1>;
- };
- power_red {
- label = "A4001N1:red:power";
- gpios = <&pinctrl 8 1>;
- };
- wlan_green {
- label = "A4001N1:green:wlan";
- gpios = <&pinctrl 9 1>;
- };
- wlan_red {
- label = "A4001N1:red:wlan";
- gpios = <&pinctrl 10 1>;
- };
- inet_green {
- label = "A4001N1:green:inet";
- gpios = <&pinctrl 11 1>;
- };
- eth_red {
- label = "A4001N1:red:eth";
- gpios = <&pinctrl 20 1>;
- };
- eth_green {
- label = "A4001N1:green:eth";
- gpios = <&pinctrl 31 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0xfe0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@ff0000 {
- reg = <0xff0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom bcm963281TAN reference board";
- compatible = "brcm,bcm963281tan", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet {
- label = "963281TAN::internet";
- gpios = <&pinctrl 1 1>;
- };
- power {
- label = "963281TAN::power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- inet_fail {
- label = "963281TAN::internet-fail";
- gpios = <&pinctrl 7 1>;
- };
- power_fail {
- label = "963281TAN::power-fail";
- gpios = <&pinctrl 8 1>;
- };
- wps {
- label = "963281TAN::wps";
- gpios = <&pinctrl 9 1>;
- };
- dsl {
- label = "963281TAN::dsl";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96328avng reference board";
- compatible = "brcm,bcm96328avng", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_fail {
- label = "96328avng::internet-fail";
- gpios = <&pinctrl 2 1>;
- };
- dsl {
- label = "96328avng::dsl";
- gpios = <&pinctrl 3 1>;
- };
- power {
- label = "96328avng::power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_fail {
- label = "96328avng::power-fail";
- gpios = <&pinctrl 8 1>;
- };
- wps {
- label = "96328avng::wps";
- gpios = <&pinctrl 9 1>;
- };
- inet {
- label = "96328avng::internet";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_usb_port1_device>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend AR-5381u";
- compatible = "comtrend,ar-5381u", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- alarm_red {
- label = "AR-5381u:red:alarm";
- gpios = <&pinctrl 2 1>;
- };
- inet_green {
- label = "AR-5381u:green:inet";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "AR-5381u:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0xfe0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@ff0000 {
- reg = <0xff0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend AR-5387un";
- compatible = "comtrend,ar-5387un", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_red {
- label = "AR-5387un:red:inet";
- gpios = <&pinctrl 1 0>;
- };
- power_red {
- label = "AR-5387un:red:power";
- gpios = <&pinctrl 4 0>;
- };
- inet_green {
- label = "AR-5387un:green:inet";
- gpios = <&pinctrl 7 0>;
- };
- power_green {
- label = "AR-5387un:green:power";
- gpios = <&pinctrl 8 0>;
- default-state = "on";
- };
- dsl_green {
- label = "AR-5387un:green:dsl";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0xfe0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@ff0000 {
- reg = <0xff0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "D-Link DSL-2740B/DSL-2741B rev F1";
- compatible = "d-link,dsl-274xb-f1", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wifi {
- label = "wifi";
- gpios = <&pinctrl 10 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_red {
- label = "dsl-274xb:red:internet";
- gpios = <&pinctrl 2 1>;
- };
- dsl_green {
- label = "dsl-274xb:green:dsl";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "dsl-274xb:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_red {
- label = "dsl-274xb:red:power";
- gpios = <&pinctrl 8 1>;
- };
- wps_blue {
- label = "dsl-274xb:blue:wps";
- gpios = <&pinctrl 9 1>;
- };
- inet_green {
- label = "dsl-274xb:green:internet";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0x7c0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- cal_data@7d0000 {
- reg = <0x7d0000 0x010000>;
- label = "cal_data";
- read-only;
- };
-
- nvram@7e0000 {
- reg = <0x7e0000 0x020000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "NuCom R5010UN v2";
- compatible = "nucom,r5010un-v2", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_green {
- label = "R5010UNv2:green:inet";
- gpios = <&pinctrl 1 1>;
- };
- inet_fail_red {
- label = "R5010UNv2:red:inet-fail";
- gpios = <&pinctrl 2 1>;
- };
- dsl_red {
- label = "R5010UNv2:green:dsl";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "R5010UNv2:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_fail_red {
- label = "R5010UNv2:red:power-fail";
- gpios = <&pinctrl 5 1>;
- };
- wps_green {
- label = "R5010UNv2:green:wps";
- gpios = <&pinctrl 10 1>;
- };
- usb_green {
- label = "R5010UNv2:green:usb";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0x7e0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- reg = <0x7f0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Sagem F@st 2704 V2";
- compatible = "sagem,fast-2704-v2", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- rfkill {
- label = "rfkill";
- gpios = <&pinctrl 15 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- usb_green {
- label = "F@ST2704V2:green:usb";
- gpios = <&pinctrl 1 1>;
- };
- inet_red {
- label = "F@ST2704V2:red:inet";
- gpios = <&pinctrl 2 1>;
- };
- dsl_green {
- label = "F@ST2704V2:green:dsl";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "F@ST2704V2:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_red {
- label = "F@ST2704V2:red:power";
- gpios = <&pinctrl 5 1>;
- };
- wps_green {
- label = "F@ST2704V2:green:wps";
- gpios = <&pinctrl 10 1>;
- };
- inet_green {
- label = "F@ST2704V2:green:inet";
- gpios = <&pinctrl 11 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0x7e0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- reg = <0x7f0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6328.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Sercomm AD1018 (SPI flash mod)";
- compatible = "sercomm,ad1018-nor", "brcm,bcm6328";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- wifi {
- label = "wifi";
- gpios = <&pinctrl 25 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 31 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-};
-
-&pinctrl {
- pinctrl_leds: leds {
- function = "led";
- pins = "gpio0", "gpio1";
- };
-};
-
-&leds {
- status = "ok";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_leds &pinctrl_serial_led
- &pinctrl_ephy0_spd_led &pinctrl_ephy1_act_led
- &pinctrl_ephy2_act_led &pinctrl_ephy3_act_led>;
-
- brcm,serial-leds;
- brcm,serial-shift-inv;
- brcm,serial-dat-low;
-
- inet_red@0 {
- reg = <0>;
- active-low;
- label = "AD1018:red:internet";
- };
-
- inet_green@1 {
- reg = <1>;
- active-low;
- label = "AD1018:green:internet";
- };
-
- power_green@8 {
- reg = <8>;
- active-low;
- label = "AD1018:green:power";
- default-state = "on";
- };
-
- adsl_green@10 {
- reg = <10>;
- active-low;
- label = "AD1018:green:adsl";
- };
-
- adsl_red@11 {
- reg = <11>;
- active-low;
- label = "AD1018:red:adsl";
- };
-
- phone_green@12 {
- reg = <12>;
- active-low;
- label = "AD1018:green:phone";
- };
-
- wps_green@13 {
- reg = <13>;
- active-low;
- label = "AD1018:green:wps";
- };
-
- wifi_green@14 {
- reg = <14>;
- active-low;
- label = "AD1018:green:wifi";
- };
-
- usb_green@15 {
- reg = <15>;
- active-low;
- label = "AD1018:green:usb";
- };
-
- ephy0_spd@17 {
- reg = <17>;
- brcm,hardware-controlled;
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <16666667>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6328";
-
- aliases {
- pinctrl = &pinctrl;
- serial0 = &uart0;
- serial1 = &uart1;
- spi1 = &hsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- ubus@10000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- ext_intc: interrupt-controller@10000018 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0x10000018 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <24>, <25>, <26>, <27>;
- };
-
- periph_intc: interrupt-controller@10000020 {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0x10000020 0x10>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>;
- };
-
- pinctrl: pin-controller@10000080 {
- compatible = "brcm,bcm6328-pinctrl";
- reg = <0x10000080 0x8>,
- <0x10000088 0x8>,
- <0x10000098 0x4>,
- <0x1000009c 0xc>;
- reg-names = "dirout", "dat", "mode", "mux";
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-parent = <&ext_intc>;
- interrupts = <3 0>, <2 0>, <0 0>, <1 0>;
- interrupt-names = "gpio12", "gpio15",
- "gpio23", "gpio24";
-
- pinctrl_serial_led: serial_led {
- pinctrl_serial_led_data: serial_led_data {
- function = "serial_led_data";
- pins = "gpio6";
- };
-
- pinctrl_serial_led_clk: serial_led_clk {
- function = "serial_led_clk";
- pins = "gpio7";
- };
- };
-
- pinctrl_inet_act_led: inet_act_led {
- function = "inet_act_led";
- pins = "gpio11";
- };
-
- pinctrl_pcie_clkreq: pcie_clkreq {
- function = "pcie_clkreq";
- pins = "gpio16";
- };
-
- pinctrl_ephy0_spd_led: ephy0_spd_led {
- function = "led";
- pins = "gpio17";
- };
-
- pinctrl_ephy1_spd_led: ephy1_spd_led {
- function = "led";
- pins = "gpio18";
- };
-
- pinctrl_ephy2_spd_led: ephy2_spd_led {
- function = "led";
- pins = "gpio19";
- };
-
- pinctrl_ephy3_spd_led: ephy3_spd_led {
- function = "led";
- pins = "gpio20";
- };
-
- pinctrl_ephy0_act_led: ephy0_act_led {
- function = "ephy0_act_led";
- pins = "gpio25";
- };
-
- pinctrl_ephy1_act_led: ephy1_act_led {
- function = "ephy1_act_led";
- pins = "gpio26";
- };
-
- pinctrl_ephy2_act_led: ephy2_act_led {
- function = "ephy2_act_led";
- pins = "gpio27";
- };
-
- pinctrl_ephy3_act_led: ephy3_act_led {
- function = "ephy3_act_led";
- pins = "gpio28";
- };
-
- pinctrl_hsspi_cs1: hsspi_cs1 {
- function = "hsspi_cs1";
- pins = "hsspi_cs1";
- };
-
- pinctrl_usb_port1_device: usb_port1_device {
- function = "usb_device_port";
- pins = "usb_port1";
- };
-
- pinctrl_usb_port1_host: usb_port1_host {
- function = "usb_host_port";
- pins = "usb_port1";
- };
- };
-
- uart0: serial@10000100 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000100 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <28>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- uart1: serial@10000120 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000120 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <39>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- leds: led-controller@10000800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-leds";
- reg = <0x10000800 0x24>;
- status = "disabled";
- };
-
- hsspi: spi@10001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-hsspi";
- reg = <0x10001000 0x600>;
- interrupts = <29>;
- /* clocks = <&clkctl 9>; */
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6338.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96338GW reference board";
- compatible = "brcm,bcm96338gw", "brcm,bcm6338";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96338GW:green:power";
- gpios = <&gpio0 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96338GW:green:stop";
- gpios = <&gpio0 1 1>;
- };
- dsl_green {
- label = "96338GW:green:adsl";
- gpios = <&gpio0 3 1>;
- };
- ppp_fail_green {
- label = "96338GW:green:ppp-fail";
- gpios = <&gpio0 4 1>;
- };
- ses_green {
- label = "96338GW:green:ses";
- gpios = <&gpio0 5 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6338.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96338W reference board";
- compatible = "brcm,bcm96338w", "brcm,bcm6338";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96338W:green:power";
- gpios = <&gpio0 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96338W:green:stop";
- gpios = <&gpio0 1 1>;
- };
- dsl_green {
- label = "96338W:green:adsl";
- gpios = <&gpio0 3 1>;
- };
- ppp_fail_green {
- label = "96338W:green:ppp-fail";
- gpios = <&gpio0 4 1>;
- };
- ses_green {
- label = "96338W:green:ses";
- gpios = <&gpio0 5 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6338.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "D-Link DSL-2640U/BRU/C";
- compatible = "d-link,dsl-2640u", "brcm,bcm6338";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- green_power {
- label = "96338W2_E7T:green:power";
- gpios = <&gpio0 0 1>;
- default-state = "on";
- };
-
- green_stop {
- label = "96338W2_E7T:green:ppp";
- gpios = <&gpio0 4 1>;
- };
-
- green_adsl {
- label = "96338W2_E7T:green:ppp-fail";
- gpios = <&gpio0 5 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6338.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Dynalink RTA1320";
- compatible = "dynalink,rta1320", "brcm,bcm6338";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- green_power {
- label = "RTA1320_16M:green:power";
- gpios = <&gpio0 0 1>;
- default-state = "on";
- };
- green_stop {
- label = "RTA1320_16M:green:stop";
- gpios = <&gpio0 1 1>;
- };
- green_adsl {
- label = "RTA1320_16M:green:adsl";
- gpios = <&gpio0 3 1>;
- };
- green_ppp {
- label = "RTA1320_16M:green:ppp";
- gpios = <&gpio0 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6338";
-
- aliases {
- pflash = &pflash;
- gpio0 = &gpio0;
- serial0 = &uart0;
- spi0 = &lsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips3300", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- pflash: nor@1fc00000 {
- compatible = "cfi-flash";
- reg = <0x1fc00000 0x400000>;
- bank-width = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- status = "disabled";
- };
-
- ubus@fff00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- periph_intc: interrupt-controller@fffe000c {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0xfffe000c 0x8>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>;
- };
-
- ext_intc: interrupt-controller@fffe0014 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0xfffe0014 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <3>, <4>, <5>, <6>;
- };
-
- gpio0: gpio-controller@fffe0404 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xfffe0404 4>, <0xfffe040c 4>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- ngpios = <8>;
- };
-
- uart0: serial@fffe0300 {
- compatible = "brcm,bcm6345-uart";
- reg = <0xfffe0300 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- lsspi: spi@fffe0c00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6348-spi";
- reg = <0xfffe0c00 0x40>;
- interrupts = <1>;
- /* clocks = <&clkctl 9>; */
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6345.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96345GW2 reference board";
- compatible = "brcm,bcm96345gw2", "brcm,bcm6345";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6345.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Siemens Gigaset SE515";
- compatible = "dynalink,rta770bw", "brcm,bcm6345";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&gpio0 13 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- usb {
- label = "RTA770BW:green:usb";
- gpios = <&gpio0 7 1>;
- };
-
- adsl {
- label = "RTA770BW:green:adsl";
- gpios = <&gpio0 8 0>;
- };
-
- diag {
- label = "RTA770BW:green:diag";
- gpios = <&gpio0 10 1>;
- };
-
- wlan {
- label = "RTA770BW:green:wlan";
- gpios = <&gpio0 11 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6345.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Dynalink RTA770W";
- compatible = "dynalink,rta770w", "brcm,bcm6345";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&gpio0 13 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- usb {
- label = "RTA770W:green:usb";
- gpios = <&gpio0 7 1>;
- };
-
- adsl {
- label = "RTA770W:green:adsl";
- gpios = <&gpio0 8 0>;
- };
-
- diag {
- label = "RTA770W:green:diag";
- gpios = <&gpio0 10 1>;
- };
-
- wlan {
- label = "RTA770W:green:wlan";
- gpios = <&gpio0 11 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6345";
-
- aliases {
- pflash = &pflash;
- serial0 = &uart0;
- gpio0 = &gpio0;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips32", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- pflash: nor@1fc00000 {
- compatible = "cfi-flash";
- reg = <0x1fc00000 0x400000>;
- bank-width = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- status = "disabled";
- };
-
- ubus@fff00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
-
- periph_intc: interrupt-controller@fffe000c {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0xfffe000c 0x9>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>;
- };
-
- ext_intc: interrupt-controller@fffe0014 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0xfffe0014 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <3>, <4>, <5>, <6>;
- };
-
- uart0: serial@fffe0300 {
- compatible = "brcm,bcm6345-uart";
- reg = <0xfffe0300 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- gpio0: gpio-controller@fffe0404 {
- compatible = "brcm,bcm6345-gpio";
- reg = <0xfffe0404 4>, <0xfffe0408 4>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- ngpios = <16>;
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "ASMAX AR 1004g";
- compatible = "asmax,ar-1004g", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "AR1004G:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- inet_green {
- label = "AR1004G:green:inet";
- gpios = <&pinctrl 3 1>;
- };
- power_red {
- label = "AR1004G:red:power";
- gpios = <&pinctrl 6 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_ext_mii &pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Belkin F5D7633";
- compatible = "belkin,f5d7633", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 6 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348GW-10:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96348GW-10:green:stop";
- gpios = <&pinctrl 1 1>;
- };
- adsl_fail_green {
- label = "96348GW-10:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96348GW-10:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- ppp_fail_green {
- label = "96348GW-10:green:ppp-fail";
- gpios = <&pinctrl 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0x3c0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3e0000 {
- label = "nvram";
- reg = <0x3e0000 0x020000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96348GW-10 reference board";
- compatible = "brcm,bcm96348gw-10", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 6 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348GW-10:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96348GW-10:green:stop";
- gpios = <&pinctrl 1 1>;
- };
- adsl_fail_green {
- label = "96348GW-10:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96348GW-10:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- ppp_fail_green {
- label = "96348GW-10:green:ppp-fail";
- gpios = <&pinctrl 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96348GW-11 reference board";
- compatible = "brcm,bcm96348gw-11", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348GW-11:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96348GW-11:green:stop";
- gpios = <&pinctrl 1 1>;
- };
- adsl_fail_green {
- label = "96348GW-11:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96348GW-11:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- ppp_fail_green {
- label = "96348GW-11:green:ppp-fail";
- gpios = <&pinctrl 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96348GW reference board";
- compatible = "brcm,bcm96348gw", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348GW:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96348GW:green:stop";
- gpios = <&pinctrl 1 1>;
- };
- adsl_fail_green {
- label = "96348GW:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96348GW:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- ppp_fail_green {
- label = "96348GW:green:ppp-fail";
- gpios = <&pinctrl 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom 96348R reference board";
- compatible = "brcm,bcm96348r", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348R:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96348R:green:stop";
- gpios = <&pinctrl 1 1>;
- };
- adsl_fail_green {
- label = "96348R:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96348R:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- ppp_fail_green {
- label = "96348R:green:ppp-fail";
- gpios = <&pinctrl 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "BT Voyager 2110";
- compatible = "bt,voyager-2110", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "V2110:green:power";
- gpios = <&pinctrl 0 1>;
- };
- power_red {
- label = "V2110:red:power";
- gpios = <&pinctrl 1 1>;
- };
- adsl_green {
- label = "V2110:green:adsl";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "V2110:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- wireless_green {
- label = "V2110:green:wireless";
- gpios = <&pinctrl 6 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "BT Voyager 2500V";
- compatible = "bt,voyager-2500v-bb", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 31 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "V2500V_BB:green:power";
- gpios = <&pinctrl 0 1>;
- };
- power_red {
- label = "V2500V_BB:red:power";
- gpios = <&pinctrl 1 1>;
- };
- adsl_green {
- label = "V2500V_BB:green:adsl";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "V2500V_BB:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- wireless_green {
- label = "V2500V_BB:green:wireless";
- gpios = <&pinctrl 6 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend CT-5365";
- compatible = "comtrend,ct-5365", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 35 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348A-122:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- alarm_red {
- label = "96348A-122:red:alarm";
- gpios = <&pinctrl 2 1>;
- };
- wps_green {
- label = "96348A-122:green:wps";
- gpios = <&pinctrl 6 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend CT-536+/CT-5621T";
- compatible = "comtrend,ct-536plus", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "CT536_CT5621:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- adsl_fail_green {
- label = "CT536_CT5621:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "D-Link DSL-2640B rev B2";
- compatible = "d-link,dsl-2640b-b", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 7 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "D-4P-W:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- status {
- label = "D-4P-W::status";
- gpios = <&pinctrl 3 1>;
- };
- inet_green {
- label = "D-4P-W:green:internet";
- gpios = <&pinctrl 4 1>;
- };
- inet_red {
- label = "D-4P-W:red:internet";
- gpios = <&pinctrl 5 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Davolink DV-201AMR";
- compatible = "davolink,dv-201amr", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- backup@0 {
- label = "backup";
- reg = <0x000000 0x400000>;
- };
-
- cfe@400000 {
- label = "cfe";
- reg = <0x400000 0x010000>;
- read-only;
- };
-
- linux@410000 {
- label = "linux";
- reg = <0x410000 0x3f0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Dynalink RTA1025W";
- compatible = "dynalink,rta1025w", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Inventel Livebox 1";
- compatible = "inventel,livebox-1", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- button1 {
- label = "1";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- button2 {
- label = "2";
- gpios = <&pinctrl 7 1>;
- linux,code = <BTN_2>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- red_adsl_fail {
- label = "Livebox1:red:adsl-fail-power";
- gpios = <&pinctrl 0 0>;
- default-state = "on";
- };
-
- red_adsl {
- label = "Livebox1:red:adsl";
- gpios = <&pinctrl 1 0>;
- };
-
- red_traffic {
- label = "Livebox1:red:traffic";
- gpios = <&pinctrl 2 0>;
- };
-
- red_phone {
- label = "Livebox1:red:phone";
- gpios = <&pinctrl 3 0>;
- };
-
- red_wifi {
- label = "Livebox1:red:wifi";
- gpios = <&pinctrl 4 0>;
- };
- };
-};
-
-&pflash {
- reg = <0x1e400000 0x800000>;
- status = "ok";
-
- partitions {
- compatible = "ecoscentric,redboot-fis-partitions";
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Netgear DG834G v4";
- compatible = "netgear,dg834g-v4", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 6 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348W3:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- status {
- label = "96348W3:red:power";
- gpios = <&pinctrl 1 1>;
- };
- inet_green {
- label = "96348W3::adsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_red {
- label = "96348W3::internet";
- gpios = <&pinctrl 3 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Netgear DG834GT/PN";
- compatible = "netgear,dg834gt-pn", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 6 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348GW-10:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96348GW-10:green:stop";
- gpios = <&pinctrl 1 1>;
- };
- adsl_fail_green {
- label = "96348GW-10:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96348GW-10:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- ppp_fail_green {
- label = "96348GW-10:green:ppp-fail";
- gpios = <&pinctrl 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Sagem F@st 2404";
- compatible = "sagem,fast-2404", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Sagem F@st 2604";
- compatible = "sagem,fast-2604", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "F@ST2604:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- power_red {
- label = "F@ST2604:red:power";
- gpios = <&pinctrl 1 1>;
- };
- inet_red {
- label = "F@ST2604:red:inet";
- gpios = <&pinctrl 4 1>;
- };
- wps_green {
- label = "F@ST2604:green:wps";
- gpios = <&pinctrl 5 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "T-Com Speedport W 500V";
- compatible = "t-com,speedport-w-500v", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "SPW500V:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- power_red {
- label = "SPW500V:red:power";
- gpios = <&pinctrl 1 1>;
- };
- ppp_green {
- label = "SPW500V:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- pstn_green {
- label = "SPW500V:green:pstn";
- gpios = <&pinctrl 28 1>;
- };
- voip_green {
- label = "SPW500V:green:voip";
- gpios = <&pinctrl 32 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "TECOM GW6000";
- compatible = "tecom,gw6000", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "TECOM GW6200";
- compatible = "tecom,gw6200", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- line1_green {
- label = "GW6200:green:line1";
- gpios = <&pinctrl 4 1>;
- };
- line2_green {
- label = "GW6200:green:line2";
- gpios = <&pinctrl 5 1>;
- };
- line3_green {
- label = "GW6200:green:line3";
- gpios = <&pinctrl 6 1>;
- };
- tel_green {
- label = "GW6200:green:tel";
- gpios = <&pinctrl 7 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Telsey CPVA502+";
- compatible = "telsey,cpva502plus", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- phone_green {
- label = "CPVA502+:green:phone";
- gpios = <&pinctrl 0 1>;
- };
-
- link_amber {
- label = "CPVA502+:amber:link";
- gpios = <&pinctrl 5 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Alice W-Gate";
- compatible = "telsey,magic", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- power {
- label = "MAGIC:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
-
- stop {
- label = "MAGIC:green:stop";
- gpios = <&pinctrl 1 1>;
- };
-
- hpna {
- label = "MAGIC:green:hpna";
- gpios = <&pinctrl 4 1>;
- };
-
- status {
- label = "MAGIC:green:adsl";
- gpios = <&pinctrl 5 1>;
- };
-
- voip {
- label = "MAGIC:green:voip";
- gpios = <&pinctrl 22 1>;
- };
-
- wifi {
- label = "MAGIC:green:wifi";
- gpios = <&pinctrl 28 0>;
- };
-
- usb {
- label = "MAGIC:green:usb";
- gpios = <&pinctrl 35 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "TP-Link TD-W8900GB";
- compatible = "tp-link,td-w8900gb", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 33 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96348GW-11:green:power";
- gpios = <&pinctrl 0 1>;
- default-state = "on";
- };
- stop_green {
- label = "96348GW-11:green:stop";
- gpios = <&pinctrl 1 1>;
- };
- adsl_fail_green {
- label = "96348GW-11:green:adsl-fail";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96348GW-11:green:ppp";
- gpios = <&pinctrl 3 1>;
- };
- ppp_fail_green {
- label = "96348GW-11:green:ppp-fail";
- gpios = <&pinctrl 4 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0x3d0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3e0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii &pinctrl_mii_pccard>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6348.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "USRobotics USR9108";
- compatible = "usrobotics,usr9108", "brcm,bcm6348";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- usb {
- label = "96348GW-A::usb";
- gpios = <&pinctrl 0 1>;
- };
- dsl {
- label = "96348GW-A::adsl";
- gpios = <&pinctrl 3 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ext_mii>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6348";
-
- aliases {
- pflash = &pflash;
- pinctrl = &pinctrl;
- serial0 = &uart0;
- spi0 = &lsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips3300", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- pflash: nor@1fc00000 {
- compatible = "cfi-flash";
- reg = <0x1fc00000 0x400000>;
- bank-width = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- status = "disabled";
- };
-
- ubus@fff00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- periph_intc: interrupt-controller@fffe000c {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0xfffe000c 0x8>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>;
- };
-
- ext_intc: interrupt-controller@fffe0014 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0xfffe0014 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <3>, <4>, <5>, <6>;
-
- brcm,field-width = <5>;
- };
-
- pinctrl: pin-controller@fffe0400 {
- compatible = "brcm,bcm6348-pinctrl";
- reg = <0xfffe0400 0x8>,
- <0xfffe0408 0x8>,
- <0xfffe0418 0x4>;
- reg-names = "dirout", "dat", "mode";
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-parent = <&ext_intc>;
- interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
- interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35";
-
- pinctrl_ext_ephy: ext_ephy {
- function = "ext_ephy";
- groups = "group1", "group4";
- };
-
- pinctrl_mii_snoop: mii_snoop {
- function = "ext_ephy";
- groups = "group1", "group4";
- };
-
- pinctrl_legacy_led: legacy_led {
- function = "legacy_led";
- groups = "group4";
- };
-
- pinctrl_mii_pccard: mii_pccard {
- function = "mii_pccard";
- groups = "group1";
- };
-
- pinctrl_pci: pci {
- function = "pci";
- groups = "group2";
- };
-
- pinctrl_spi_master_uart: spi_master_uart {
- function = "spi_master_uart";
- groups = "group1";
- };
-
- pinctrl_ext_mii: ext_mii {
- function = "ext_mii";
- groups = "group0", "group3";
- };
-
- pinctrl_utopia: utopia {
- function = "utopia";
- groups = "group0", "group1", "group3";
- };
- };
-
- uart0: serial@fffe0300 {
- compatible = "brcm,bcm6345-uart";
- reg = <0xfffe0300 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- lsspi: spi@fffe0c00 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6348-spi";
- reg = <0xfffe0c00 0x40>;
- interrupts = <1>;
- /* clocks = <&clkctl 9>; */
-
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Alcatel RG100A";
- compatible = "alcatel,rg100a", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- stop_green {
- label = "96358VW2:green:stop";
- gpios = <&pinctrl 4 1>;
- };
- power_green {
- label = "96358VW2:green:power";
- gpios = <&pinctrl 5 1>;
- default-state = "on";
- };
- adsl_green {
- label = "96358VW2:green:adsl";
- gpios = <&pinctrl 22 1>;
- };
- ppp_fail_green {
- label = "96358VW2:green:ppp-fail";
- gpios = <&pinctrl 23 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xfc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96358VW reference board";
- compatible = "brcm,bcm96358vw", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "96358VW:green:power";
- gpios = <&pinctrl 4 0>;
- default-state = "on";
- };
- stop_green {
- label = "96358VW:green:stop";
- gpios = <&pinctrl 5 0>;
- };
- adsl_fail_green {
- label = "96358VW:green:adsl-fail";
- gpios = <&pinctrl 15 1>;
- };
- ppp_green {
- label = "96358VW:green:ppp";
- gpios = <&pinctrl 22 1>;
- };
- ppp_fail_green {
- label = "96358VW:green:ppp-fail";
- gpios = <&pinctrl 23 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96358VW2 reference board";
- compatible = "brcm,bcm96358vw2", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- stop_green {
- label = "96358VW2:green:stop";
- gpios = <&pinctrl 4 1>;
- };
- power_green {
- label = "96358VW2:green:power";
- gpios = <&pinctrl 5 1>;
- default-state = "on";
- };
- adsl_green {
- label = "96358VW2:green:adsl";
- gpios = <&pinctrl 22 1>;
- };
- ppp_fail_green {
- label = "96358VW2:green:ppp-fail";
- gpios = <&pinctrl 23 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "BT Home Hub 2.0 Type A";
- compatible = "bt,home-hub-2-a", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- phone {
- label = "phone";
- gpios = <&pinctrl 1 1>;
- linux,code = <KEY_PHONE>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 9 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 11 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-};
-
-&leds {
- status = "ok";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_serial_led>;
-
- led@0 {
- reg = <0>;
- active-low;
- label = "HOMEHUB2A:red:power";
- };
-
- led@1 {
- reg = <0>;
- active-low;
- label = "HOMEHUB2A:green:power";
- default-state = "on";
- };
-
- led@2 {
- reg = <2>;
- active-low;
- label = "HOMEHUB2A:blue:power";
- };
-
- led@3 {
- reg = <3>;
- active-low;
- label = "HOMEHUB2A:red:broadband";
- };
-
- led@4 {
- reg = <4>;
- active-low;
- label = "HOMEHUB2A:green:broadband";
- };
-
- led@5 {
- reg = <5>;
- active-low;
- label = "HOMEHUB2A:blue:broadband";
- };
-
- led@6 {
- reg = <6>;
- active-low;
- label = "HOMEHUB2A:red:wireless";
- };
-
- led@7 {
- reg = <7>;
- active-low;
- label = "HOMEHUB2A:green:wireless";
- };
-
- led@8 {
- reg = <8>;
- active-low;
- label = "HOMEHUB2A:blue:wireless";
- };
-
- led@9 {
- reg = <9>;
- active-low;
- label = "HOMEHUB2A:red:phone";
- };
-
- led@10 {
- reg = <10>;
- active-low;
- label = "HOMEHUB2A:green:phone";
- };
-
- led@11 {
- reg = <11>;
- active-low;
- label = "HOMEHUB2A:blue:phone";
- };
-
- led@12 {
- reg = <12>;
- active-low;
- label = "HOMEHUB2A:red:upgrading";
- };
-
- led@13 {
- reg = <13>;
- active-low;
- label = "HOMEHUB2A:green:upgrading";
- };
-
- led@14 {
- reg = <14>;
- active-low;
- label = "HOMEHUB2A:blue:upgrading";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xfc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend CT-6373";
- compatible = "comtrend,ct-6373", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 35 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "CT6373-1:green:power";
- gpios = <&pinctrl 0 0>;
- default-state = "on";
- };
- usb_green {
- label = "CT6373-1:green:usb";
- gpios = <&pinctrl 3 1>;
- };
- wlan_green {
- label = "CT6373-1:green:wlan";
- gpios = <&pinctrl 9 1>;
- };
- };
-};
-
-&leds {
- status = "ok";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_serial_led>;
-
- led@0 {
- reg = <0>;
- active-low;
- label = "CT6373-1:green:adsl";
- };
-
- led@1 {
- reg = <1>;
- active-low;
- label = "CT6373-1:green:line";
- };
-
- led@2 {
- reg = <2>;
- active-low;
- label = "CT6373-1:green:fxs1";
- };
-
- led@3 {
- reg = <3>;
- active-low;
- label = "CT6373-1:green:fxs2";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "D-Link DSL-2650U";
- compatible = "d-link,dsl-2650u", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- stop_green {
- label = "96358VW2:green:stop";
- gpios = <&pinctrl 4 1>;
- };
- power_green {
- label = "96358VW2:green:power";
- gpios = <&pinctrl 5 1>;
- default-state = "on";
- };
- adsl_green {
- label = "96358VW2:green:adsl";
- gpios = <&pinctrl 22 1>;
- };
- ppp_fail_green {
- label = "96358VW2:green:ppp-fail";
- gpios = <&pinctrl 23 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "D-Link DSL-2740B/DSL-2741B rev C2/3";
- compatible = "d-link,dsl-274xb-c2", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_green {
- label = "dsl-274xb:green:internet";
- gpios = <&pinctrl 2 0>;
- };
- power_red {
- label = "dsl-274xb:red:power";
- gpios = <&pinctrl 4 1>;
- };
- power_green {
- label = "dsl-274xb:green:power";
- gpios = <&pinctrl 5 1>;
- default-state = "on";
- };
- dsl_green {
- label = "dsl-274xb:green:adsl";
- gpios = <&pinctrl 9 1>;
- };
- inet_red {
- label = "dsl-274xb:red:internet";
- gpios = <&pinctrl 10 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "D-Link DVA-G3810BN/TL";
- compatible = "d-link,dva-g3810bn-tl", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- voip {
- label = "DVAG3810BN::voip";
- gpios = <&pinctrl 1 0>;
- };
- power {
- label = "DVAG3810BN::power";
- gpios = <&pinctrl 4 0>;
- default-state = "on";
- };
- stop {
- label = "DVAG3810BN::stop";
- gpios = <&pinctrl 5 0>;
- };
- dsl {
- label = "DVAG3810BN::dsl";
- gpios = <&pinctrl 22 1>;
- };
- inet {
- label = "DVAG3810BN::internet";
- gpios = <&pinctrl 23 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Huawei EchoLife HG553";
- compatible = "huawei,echolife-hg553", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- rfkill {
- label = "rfkill";
- gpios = <&pinctrl 9 1>;
- linux,code = <KEY_RFKILL>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "HW553:blue:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_red {
- label = "HW553:red:power";
- gpios = <&pinctrl 5 1>;
- };
- hspa_red {
- label = "HW553:red:hspa";
- gpios = <&pinctrl 12 1>;
- };
- hspa_blue {
- label = "HW553:blue:hspa";
- gpios = <&pinctrl 13 1>;
- };
- lan_red {
- label = "HW553:red:lan";
- gpios = <&pinctrl 22 1>;
- };
- lan_blue {
- label = "HW553:blue:lan";
- gpios = <&pinctrl 23 1>;
- };
- wifi_red {
- label = "HW553:red:wifi";
- gpios = <&pinctrl 25 1>;
- };
- dsl_red {
- label = "HW553:red:adsl";
- gpios = <&pinctrl 34 1>;
- };
- dsl_blue {
- label = "HW553:blue:adsl";
- gpios = <&pinctrl 35 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xfc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Huawei EchoLife HG556a (version A)";
- compatible = "huawei,echolife-hg556a-a", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- help {
- label = "help";
- gpios = <&pinctrl 8 1>;
- linux,code = <KEY_HELP>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 9 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- restart {
- label = "restart";
- gpios = <&pinctrl 10 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 11 1>;
- linux,code = <KEY_CONFIG>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- message_red {
- label = "HW556:red:message";
- gpios = <&pinctrl 0 1>;
- };
- hspa_red {
- label = "HW556:red:hspa";
- gpios = <&pinctrl 1 1>;
- };
- dsl_red {
- label = "HW556:red:dsl";
- gpios = <&pinctrl 2 1>;
- };
- power_red {
- label = "HW556:red:power";
- gpios = <&pinctrl 3 1>;
- default-state = "on";
- };
- all_red {
- label = "HW556:red:all";
- gpios = <&pinctrl 6 1>;
- default-state = "on";
- };
- lan1_green {
- label = "HW556:green:lan1";
- gpios = <&pinctrl 12 1>;
- };
- lan1_red {
- label = "HW556:red:lan1";
- gpios = <&pinctrl 13 1>;
- };
- lan2_green {
- label = "HW556:green:lan2";
- gpios = <&pinctrl 15 1>;
- };
- lan2_red {
- label = "HW556:red:lan2";
- gpios = <&pinctrl 22 1>;
- };
- lan3_green {
- label = "HW556:green:lan3";
- gpios = <&pinctrl 23 1>;
- };
- lan3_red {
- label = "HW556:red:lan3";
- gpios = <&pinctrl 26 1>;
- };
- lan4_green {
- label = "HW556:green:lan4";
- gpios = <&pinctrl 27 1>;
- };
- lan4_red {
- label = "HW556:red:lan4";
- gpios = <&pinctrl 28 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xec0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- cal_data@ee0000 {
- label = "cal_data";
- reg = <0xee0000 0x100000>;
- read-only;
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Huawei EchoLife HG556a (version B)";
- compatible = "huawei,echolife-hg556a-b", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- help {
- label = "help";
- gpios = <&pinctrl 8 1>;
- linux,code = <KEY_HELP>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 9 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- restart {
- label = "restart";
- gpios = <&pinctrl 10 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 11 1>;
- linux,code = <KEY_CONFIG>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- message_red {
- label = "HW556:red:message";
- gpios = <&pinctrl 0 1>;
- };
- hspa_red {
- label = "HW556:red:hspa";
- gpios = <&pinctrl 1 1>;
- };
- dsl_red {
- label = "HW556:red:dsl";
- gpios = <&pinctrl 2 1>;
- };
- power_red {
- label = "HW556:red:power";
- gpios = <&pinctrl 3 1>;
- default-state = "on";
- };
- all_red {
- label = "HW556:red:all";
- gpios = <&pinctrl 6 1>;
- default-state = "on";
- };
- lan1_green {
- label = "HW556:green:lan1";
- gpios = <&pinctrl 12 1>;
- };
- lan1_red {
- label = "HW556:red:lan1";
- gpios = <&pinctrl 13 1>;
- };
- lan2_green {
- label = "HW556:green:lan2";
- gpios = <&pinctrl 15 1>;
- };
- lan2_red {
- label = "HW556:red:lan2";
- gpios = <&pinctrl 22 1>;
- };
- lan3_green {
- label = "HW556:green:lan3";
- gpios = <&pinctrl 23 1>;
- };
- lan3_red {
- label = "HW556:red:lan3";
- gpios = <&pinctrl 26 1>;
- };
- lan4_green {
- label = "HW556:green:lan4";
- gpios = <&pinctrl 27 1>;
- };
- lan4_red {
- label = "HW556:red:lan4";
- gpios = <&pinctrl 28 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xec0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- cal_data@ee0000 {
- label = "cal_data";
- reg = <0xee0000 0x100000>;
- read-only;
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Huawei EchoLife HG556a (version C)";
- compatible = "huawei,echolife-hg556a-c", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- help {
- label = "help";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_HELP>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 9 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- restart {
- label = "restart";
- gpios = <&pinctrl 10 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 11 1>;
- linux,code = <KEY_CONFIG>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- lan1_green {
- label = "HW556:green:lan1";
- gpios = <&pinctrl 0 1>;
- };
- lan2_green {
- label = "HW556:green:lan2";
- gpios = <&pinctrl 1 1>;
- };
- dsl_red {
- label = "HW556:red:dsl";
- gpios = <&pinctrl 2 1>;
- };
- power_red {
- label = "HW556:red:power";
- gpios = <&pinctrl 3 1>;
- default-state = "on";
- };
- message_red {
- label = "HW556:red:message";
- gpios = <&pinctrl 12 1>;
- };
- lan1_red {
- label = "HW556:red:lan1";
- gpios = <&pinctrl 13 1>;
- };
- hspa_red {
- label = "HW556:red:hspa";
- gpios = <&pinctrl 15 1>;
- };
- lan2_red {
- label = "HW556:red:lan2";
- gpios = <&pinctrl 22 1>;
- };
- lan3_green {
- label = "HW556:green:lan3";
- gpios = <&pinctrl 23 1>;
- };
- lan3_red {
- label = "HW556:red:lan3";
- gpios = <&pinctrl 26 1>;
- };
- lan4_green {
- label = "HW556:green:lan4";
- gpios = <&pinctrl 27 1>;
- };
- lan4_red {
- label = "HW556:red:lan4";
- gpios = <&pinctrl 28 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xec0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- cal_data@ee0000 {
- label = "cal_data";
- reg = <0xee0000 0x100000>;
- read-only;
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Pirelli A226G";
- compatible = "pirelli,a226g", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- voip_red {
- label = "DWV-S0:red:VoIP";
- gpios = <&pinctrl 0 1>;
- };
- eth_red {
- label = "DWV-S0:red:ethernet";
- gpios = <&pinctrl 1 1>;
- };
- dsl_green {
- label = "DWV-S0:green:ADSL";
- gpios = <&pinctrl 2 1>;
- };
- usb_green {
- label = "DWV-S0:green:USB";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "DWV-S0:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_red {
- label = "DWV-S0:red:power";
- gpios = <&pinctrl 5 1>;
- };
- inet_red {
- label = "DWV-S0:red:internet";
- gpios = <&pinctrl 6 1>;
- };
- inet_green {
- label = "DWV-S0:green:internet";
- gpios = <&pinctrl 7 1>;
- };
- eth_green {
- label = "DWV-S0:green:ethernet";
- gpios = <&pinctrl 8 1>;
- };
- voip_green {
- label = "DWV-S0:green:VoIP";
- gpios = <&pinctrl 9 1>;
- };
- wifi_red {
- label = "DWV-S0:red:wifi";
- gpios = <&pinctrl 10 1>;
- };
- usb_red {
- label = "DWV-S0:red:USB";
- gpios = <&pinctrl 11 1>;
- };
- dsl_red {
- label = "DWV-S0:red:ADSL";
- gpios = <&pinctrl 12 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Pirelli A226M-FWB";
- compatible = "pirelli,a226m-fwb", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- voip_red {
- label = "DWV-S0:red:VoIP";
- gpios = <&pinctrl 0 1>;
- };
- eth_red {
- label = "DWV-S0:red:ethernet";
- gpios = <&pinctrl 1 1>;
- };
- dsl_green {
- label = "DWV-S0:green:ADSL";
- gpios = <&pinctrl 2 1>;
- };
- usb_green {
- label = "DWV-S0:green:USB";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "DWV-S0:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_red {
- label = "DWV-S0:red:power";
- gpios = <&pinctrl 5 1>;
- };
- inet_red {
- label = "DWV-S0:red:internet";
- gpios = <&pinctrl 6 1>;
- };
- inet_green {
- label = "DWV-S0:green:internet";
- gpios = <&pinctrl 7 1>;
- };
- eth_green {
- label = "DWV-S0:green:ethernet";
- gpios = <&pinctrl 8 1>;
- };
- voip_green {
- label = "DWV-S0:green:VoIP";
- gpios = <&pinctrl 9 1>;
- };
- wifi_red {
- label = "DWV-S0:red:wifi";
- gpios = <&pinctrl 10 1>;
- };
- usb_red {
- label = "DWV-S0:red:USB";
- gpios = <&pinctrl 11 1>;
- };
- dsl_red {
- label = "DWV-S0:red:ADSL";
- gpios = <&pinctrl 12 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0xfc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Pirelli A226M";
- compatible = "pirelli,a226m", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- voip_red {
- label = "DWV-S0:red:VoIP";
- gpios = <&pinctrl 0 1>;
- };
- eth_red {
- label = "DWV-S0:red:ethernet";
- gpios = <&pinctrl 1 1>;
- };
- dsl_green {
- label = "DWV-S0:green:ADSL";
- gpios = <&pinctrl 2 1>;
- };
- usb_green {
- label = "DWV-S0:green:USB";
- gpios = <&pinctrl 3 1>;
- };
- power_green {
- label = "DWV-S0:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_red {
- label = "DWV-S0:red:power";
- gpios = <&pinctrl 5 1>;
- };
- inet_red {
- label = "DWV-S0:red:internet";
- gpios = <&pinctrl 6 1>;
- };
- inet_green {
- label = "DWV-S0:green:internet";
- gpios = <&pinctrl 7 1>;
- };
- eth_green {
- label = "DWV-S0:green:ethernet";
- gpios = <&pinctrl 8 1>;
- };
- voip_green {
- label = "DWV-S0:green:VoIP";
- gpios = <&pinctrl 9 1>;
- };
- wifi_red {
- label = "DWV-S0:red:wifi";
- gpios = <&pinctrl 10 1>;
- };
- usb_red {
- label = "DWV-S0:red:USB";
- gpios = <&pinctrl 11 1>;
- };
- dsl_red {
- label = "DWV-S0:red:ADSL";
- gpios = <&pinctrl 12 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Pirelli Alice Gate AGPF-S0";
- compatible = "pirelli,agpf-s0", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "AGPF-S0:green:power";
- gpios = <&pinctrl 4 1>;
- default-state = "on";
- };
- power_red {
- label = "AGPF-S0:red:power";
- gpios = <&pinctrl 5 1>;
- };
- service_green {
- label = "AGPF-S0:green:service";
- gpios = <&pinctrl 6 1>;
- };
- service_red {
- label = "AGPF-S0:red:service";
- gpios = <&pinctrl 7 1>;
- };
- dsl_green {
- label = "AGPF-S0:green:adsl";
- gpios = <&pinctrl 9 1>;
- };
- dsl_red {
- label = "AGPF-S0:red:adsl";
- gpios = <&pinctrl 10 1>;
- };
- wifi_green {
- label = "AGPF-S0:green:wifi";
- gpios = <&pinctrl 22 1>;
- };
- wifi_red {
- label = "AGPF-S0:red:wifi";
- gpios = <&pinctrl 23 1>;
- };
- inet_red {
- label = "AGPF-S0:red:internet";
- gpios = <&pinctrl 24 1>;
- };
- inet_green {
- label = "AGPF-S0:green:internet";
- gpios = <&pinctrl 25 1>;
- };
- usr1_green {
- label = "AGPF-S0:green:usr1";
- gpios = <&pinctrl 26 1>;
- };
- usr1_red {
- label = "AGPF-S0:red:usr1";
- gpios = <&pinctrl 27 1>;
- };
- usr2_green {
- label = "AGPF-S0:green:usr2";
- gpios = <&pinctrl 29 1>;
- };
- usr2_red {
- label = "AGPF-S0:red:usr2";
- gpios = <&pinctrl 30 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xfc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "SFR Neufbox 4 (Foxconn)";
- compatible = "sfr,neufbox-4-foxconn-r1", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- service {
- label = "service";
- gpios = <&pinctrl 27 1>;
- linux,code = <BTN_0>;
- debounce-interval = <60>;
- };
-
- clip {
- label = "clip";
- gpios = <&pinctrl 31 1>;
- linux,code = <BTN_1>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- traffic_white {
- label = "NB4-FXC-r1:white:traffic";
- gpios = <&pinctrl 2 0>;
- };
- service_blue {
- label = "NB4-FXC-r1:blue:service";
- gpios = <&pinctrl 4 0>;
- };
- wifi_white {
- label = "NB4-FXC-r1:white:wifi";
- gpios = <&pinctrl 15 0>;
- };
- service_red {
- label = "NB4-FXC-r1:red:service";
- gpios = <&pinctrl 29 0>;
- };
- service_green {
- label = "NB4-FXC-r1:green:service";
- gpios = <&pinctrl 30 0>;
- };
- };
-};
-
-&leds {
- status = "ok";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_serial_led>;
-
- led@0 {
- reg = <0>;
- active-low;
- label = "NB4-FXC-r1:white:alarm";
- };
-
- led@2 {
- reg = <2>;
- active-low;
- label = "NB4-FXC-r1:white:tv";
- };
-
- led@3 {
- reg = <3>;
- active-low;
- label = "NB4-FXC-r1:white:tel";
- };
-
- led@4 {
- reg = <4>;
- active-low;
- label = "NB4-FXC-r1:white:adsl";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "SFR Neufbox 4 (Sercomm)";
- compatible = "sfr,neufbox-4-sercomm-r0", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- service {
- label = "service";
- gpios = <&pinctrl 27 1>;
- linux,code = <BTN_0>;
- debounce-interval = <60>;
- };
-
- clip {
- label = "clip";
- gpios = <&pinctrl 31 1>;
- linux,code = <BTN_1>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- traffic_white {
- label = "NB4-SER-r0:white:traffic";
- gpios = <&pinctrl 2 1>;
- };
- service_blue {
- label = "NB4-SER-r0:blue:service";
- gpios = <&pinctrl 4 1>;
- };
- wifi_white {
- label = "NB4-SER-r0:white:wifi";
- gpios = <&pinctrl 15 1>;
- };
- service_red {
- label = "NB4-SER-r0:red:service";
- gpios = <&pinctrl 29 1>;
- };
- service_green {
- label = "NB4-SER-r0:green:service";
- gpios = <&pinctrl 30 1>;
- };
- };
-};
-
-&leds {
- status = "ok";
-
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_serial_led>;
-
- led@0 {
- reg = <0>;
- active-low;
- label = "NB4-SER-r0:white:alarm";
- };
-
- led@2 {
- reg = <2>;
- active-low;
- label = "NB4-SER-r0:white:tv";
- };
-
- led@3 {
- reg = <3>;
- active-low;
- label = "NB4-SER-r0:white:tel";
- };
-
- led@4 {
- reg = <4>;
- active-low;
- label = "NB4-SER-r0:white:adsl";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "T-Com Speedport W 303V";
- compatible = "t-com,speedport-w-303v", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 11 0>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- ses {
- label = "ses";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- ses_green {
- label = "spw303v:green:ses";
- gpios = <&pinctrl 0 1>;
- };
- power_adsl_red {
- label = "spw303v:red:power+adsl";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "spw303v:green:ppp";
- gpios = <&pinctrl 5 1>;
- };
- power_adsl_green {
- label = "spw303v:green:power+adsl";
- gpios = <&pinctrl 22 1>;
- default-state = "on";
- };
- voip_green {
- label = "spw303v:green:voip";
- gpios = <&pinctrl 27 1>;
- };
- pots_green {
- label = "spw303v:green:pots";
- gpios = <&pinctrl 31 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Telsey CPVA642-type (CPA-ZNTE60T)";
- compatible = "telsey,cpva642", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 37 0>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- eth_green {
- label = "CPVA642:green:ether";
- gpios = <&pinctrl 1 1>;
- };
- phone2_green {
- label = "CPVA642:green:phone2";
- gpios = <&pinctrl 2 1>;
- };
- usb_green {
- label = "CPVA642:green:usb";
- gpios = <&pinctrl 3 1>;
- };
- phone1_green {
- label = "CPVA642:green:phone1";
- gpios = <&pinctrl 4 1>;
- };
- wifi_red {
- label = "CPVA642:red:wifi";
- gpios = <&pinctrl 6 1>;
- };
- link_red {
- label = "CPVA642:red:link";
- gpios = <&pinctrl 9 1>;
- };
- link_green {
- label = "CPVA642:green:link";
- gpios = <&pinctrl 10 1>;
- };
- power_green {
- label = "CPVA642:green:power";
- gpios = <&pinctrl 11 1>;
- default-state = "on";
- };
- power_red {
- label = "CPVA642:red:power";
- gpios = <&pinctrl 14 1>;
- };
- wifi_green {
- label = "CPVA642:green:wifi";
- gpios = <&pinctrl 28 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6358";
-
- aliases {
- pflash = &pflash;
- pinctrl = &pinctrl;
- serial0 = &uart0;
- serial1 = &uart1;
- spi0 = &lsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <1>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- pflash: nor@1e000000 {
- compatible = "cfi-flash";
- reg = <0x1e000000 0x2000000>;
- bank-width = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
-
- status = "disabled";
- };
-
- ubus@fff00000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- periph_intc: interrupt-controller@fffe000c {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0xfffe000c 0x8>,
- <0xfffe0038 0x8>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>, <3>;
- };
-
- ext_intc0: interrupt-controller@fffe0014 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0xfffe0014 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <25>, <26>, <27>, <28>;
- };
-
- ext_intc1: interrupt-controller@fffe001c {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0xfffe001c 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <20>, <21>;
- };
-
- pinctrl: pin-controller@fffe0080 {
- compatible = "brcm,bcm6358-pinctrl";
- reg = <0xfffe0080 0x8>,
- <0xfffe0088 0x8>;
- reg-names = "dirout", "dat", "mode";
- brcm,gpiomode = <&gpiomode>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupts-extended = <&ext_intc1 0 0>,
- <&ext_intc1 1 0>,
- <&ext_intc0 0 0>,
- <&ext_intc0 1 0>,
- <&ext_intc0 2 0>,
- <&ext_intc0 3 0>;
- interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
- "gpio36", "gpio37";
-
- pinctrl_ebi_cs: ebi_cs {
- function = "ebi_cs";
- groups = "ebi_cs_grp";
- };
-
- pinctrl_uart1: uart1 {
- function = "uart1";
- groups = "uart1_grp";
- };
-
- pinctrl_serial_led: serial_led {
- function = "serial_led";
- groups = "serial_led_grp";
- };
-
- pinctrl_legacy_led: legacy_led {
- function = "legacy_led";
- groups = "legacy_led_grp";
- };
-
- pinctrl_led: led {
- function = "led";
- groups = "led_grp";
- };
-
- pinctrl_spi_cs_23: spi_cs {
- function = "spi_cs";
- groups = "spi_cs_grp";
- };
-
- pinctrl_utopia: utopia {
- function = "utopia";
- groups = "utopia_grp";
- };
-
- pinctrl_pwm_syn_clk: pwm_syn_clk {
- function = "pwm_syn_clk";
- groups = "pwm_syn_clk_grp";
- };
-
- pinctrl_sys_irq: sys_irq {
- function = "sys_irq";
- groups = "sys_irq_grp";
- };
- };
-
- gpiomode: gpiomode@fffe0098 {
- compatible = "brcm,bcm6358-gpiomode", "syscon";
- reg = <0xfffe0098 0x4>;
- };
-
- leds: led-controller@fffe00d0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6358-leds";
- reg = <0xfffe00d0 0x8>;
- status = "disabled";
- };
-
- uart0: serial@fffe0100 {
- compatible = "brcm,bcm6345-uart";
- reg = <0xfffe0100 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- uart1: serial@fffe0120 {
- compatible = "brcm,bcm6345-uart";
- reg = <0xfffe0120 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <3>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- lsspi: spi@fffe0800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6358-spi";
- reg = <0xfffe0800 0x70c>;
- interrupts = <1>;
- /* clocks = <&clkctl 9>; */
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6358.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Huawei EchoLife HG520v";
- compatible = "huawei,echolife-hg520v", "brcm,bcm6359", "brcm,bcm6358";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 37 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_green {
- label = "HW520:green:net";
- gpios = <&pinctrl 32 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6362.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "SFR Neufbox 6 (Sercomm)";
- compatible = "sfr,neufbox-6-sercomm-r0", "brcm,bcm6361", "brcm,bcm6362";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- service {
- label = "service";
- gpios = <&pinctrl 10 1>;
- linux,code = <BTN_0>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 12 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 25 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- switch {
- compatible = "realtek,rtl8367";
- gpio-sda = <&pinctrl 18 0>;
- gpio-sck = <&pinctrl 20 0>;
-
- realtek,extif0 = <1 5 1 1 1 1 1 1 2>;
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0xfe0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@ff0000 {
- reg = <0xff0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6362.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Sagem F@st 2504N";
- compatible = "sagem,fast-2504n", "brcm,bcm6362";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 24 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 25 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_orange {
- label = "fast2504n:orange:power";
- gpios = <&pinctrl 2 1>;
- };
- power_green {
- label = "fast2504n:green:power";
- gpios = <&pinctrl 10 1>;
- default-state = "on";
- };
- inet_red {
- label = "fast2504n:red:internet";
- gpios = <&pinctrl 26 1>;
- };
- ok_green {
- label = "fast2504n:green:ok";
- gpios = <&pinctrl 28 1>;
- };
- ok_orange {
- label = "fast2504n:orange:ok";
- gpios = <&pinctrl 29 1>;
- };
- wlan_orangee {
- label = "fast2504n:orange:wlan";
- gpios = <&pinctrl 30 1>;
- };
- };
-};
-
-&hsspi {
- status = "ok";
-
- flash@0 {
- compatible = "jedec,spi-nor";
- spi-max-frequency = <20000000>;
- spi-tx-bus-width = <2>;
- spi-rx-bus-width = <2>;
- reg = <0>;
-
- #address-cells = <1>;
- #size-cells = <1>;
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- reg = <0x000000 0x010000>;
- label = "cfe";
- read-only;
- };
-
- linux@10000 {
- reg = <0x010000 0x7e0000>;
- label = "linux";
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- reg = <0x7f0000 0x010000>;
- label = "nvram";
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6362";
-
- aliases {
- pinctrl = &pinctrl;
- serial0 = &uart0;
- serial1 = &uart1;
- spi0 = &lsspi;
- spi1 = &hsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <1>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- ubus@10000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- ext_intc: interrupt-controller@10000018 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0x10000018 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <40>, <41>, <42>, <43>;
- };
-
- periph_intc: interrupt-controller@10000020 {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0x10000020 0x10>,
- <0x10000030 0x10>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>, <3>;
- };
-
- pinctrl: pin-controller@10000080 {
- compatible = "brcm,bcm6362-pinctrl";
- reg = <0x10000080 0x8>,
- <0x10000088 0x8>,
- <0x10000090 0x4>,
- <0x10000098 0x4>,
- <0x1000009c 0x4>,
- <0x100000b8 0x4>;
- reg-names = "dirout", "dat", "led",
- "mode", "ctrl", "basemode";
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupt-parent = <&ext_intc>;
- interrupts = <0 0>, <1 0>, <2 0>, <3 0>;
- interrupt-names = "gpio24", "gpio25",
- "gpio26", "gpio27";
-
- pinctrl_usb_device_led: usb_device_led {
- function = "usb_device_led";
- pins = "gpio0";
- };
-
- pinctrl_sys_irq: sys_irq {
- function = "sys_irq";
- pins = "gpio1";
- };
-
- pinctrl_serial_led: serial_led {
- pinctrl_serial_led_clk: serial_led_clk {
- function = "serial_led_clk";
- pins = "gpio2";
- };
-
- pinctrl_serial_led_data: serial_led_data {
- function = "serial_led_data";
- pins = "gpio3";
- };
- };
-
- pinctrl_robosw_led_data: robosw_led_data {
- function = "robosw_led_data";
- pins = "gpio4";
- };
-
- pinctrl_robosw_led_clk: robosw_led_clk {
- function = "robosw_led_clk";
- pins = "gpio5";
- };
-
- pinctrl_robosw_led0: robosw_led0 {
- function = "robosw_led0";
- pins = "gpio6";
- };
-
- pinctrl_robosw_led1: robosw_led1 {
- function = "robosw_led1";
- pins = "gpio7";
- };
-
- pinctrl_inet_led: inet_led {
- function = "inet_led";
- pins = "gpio8";
- };
-
- pinctrl_spi_cs2: spi_cs2 {
- function = "spi_cs2";
- pins = "gpio9";
- };
-
- pinctrl_spi_cs3: spi_cs3 {
- function = "spi_cs3";
- pins = "gpio10";
- };
-
- pinctrl_ntr_pulse: ntr_pulse {
- function = "ntr_pulse";
- pins = "gpio11";
- };
-
- pinctrl_uart1_scts: uart1_scts {
- function = "uart1_scts";
- pins = "gpio12";
- };
-
- pinctrl_uart1_srts: uart1_srts {
- function = "uart1_srts";
- pins = "gpio13";
- };
-
-
- pinctrl_uart1: uart1 {
- pinctrl_uart1_sdin: uart1_sdin {
- function = "uart1_sdin";
- pins = "gpio14";
- };
-
- pinctrl_uart1_sdout: uart1_sdout {
- function = "uart1_sdout";
- pins = "gpio15";
- };
- };
-
- pinctrl_adsl_spi: adsl_spi {
- pinctrl_adsl_spi_miso: adsl_spi_miso {
- function = "adsl_spi_miso";
- pins = "gpio16";
- };
-
- pinctrl_adsl_spi_mosi: adsl_spi_mosi {
- function = "adsl_spi_mosi";
- pins = "gpio17";
- };
-
- pinctrl_adsl_spi_clk: adsl_spi_clk {
- function = "adsl_spi_clk";
- pins = "gpio18";
- };
-
- pinctrl_adsl_spi_cs: adsl_spi_cs {
- function = "adsl_spi_cs";
- pins = "gpio19";
- };
- };
-
- pinctrl_ephy0_led: ephy0_led {
- function = "ephy0_led";
- pins = "gpio20";
- };
-
- pinctrl_ephy1_led: ephy1_led {
- function = "ephy1_led";
- pins = "gpio21";
- };
-
- pinctrl_ephy2_led: ephy2_led {
- function = "ephy2_led";
- pins = "gpio22";
- };
-
- pinctrl_ephy3_led: ephy3_led {
- function = "ephy3_led";
- pins = "gpio23";
- };
-
- pinctrl_ext_irq0: ext_irq0 {
- function = "ext_irq0";
- pins = "gpio24";
- };
-
- pinctrl_ext_irq1: ext_irq1 {
- function = "ext_irq1";
- pins = "gpio25";
- };
-
- pinctrl_ext_irq2: ext_irq2 {
- function = "ext_irq2";
- pins = "gpio26";
- };
-
- pinctrl_ext_irq3: ext_irq3 {
- function = "ext_irq3";
- pins = "gpio27";
- };
-
- pinctrl_nand: nand {
- function = "nand";
- group = "nand_grp";
- };
- };
-
- uart0: serial@10000100 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000100 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <3>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- uart1: serial@10000120 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000120 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <4>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- lsspi: spi@10000800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6358-spi";
- reg = <0x10000800 0x70c>;
- interrupts = <2>;
- /* clocks = <&clkctl 15>; */
- };
-
- hsspi: spi@10001000 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-hsspi";
- reg = <0x10001000 0x600>;
- interrupts = <5>;
- /* clocks = <&clkctl 16>; */
- };
-
- leds: led-controller@10001900 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6328-leds";
- reg = <0x10001900 0x24>;
- status = "disabled";
- };
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Actiontec R1000H";
- compatible = "actiontec,r1000h", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 35 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_green {
- label = "R1000H:green:inet";
- gpios = <&pinctrl 5 0>;
- };
-
- usb_green {
- label = "R1000H:green:usb";
- gpios = <&pinctrl 21 1>;
- };
-
- power_green {
- label = "R1000H:green:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
-
- wps_green {
- label = "R1000H:green:wps";
- gpios = <&pinctrl 23 1>;
- };
-
- power_red {
- label = "R1000H:red:power";
- gpios = <&pinctrl 24 0>;
- };
-
- wps_red {
- label = "R1000H:red:wps";
- gpios = <&pinctrl 30 1>;
- };
-
- inet_red {
- label = "R1000H:red:inet";
- gpios = <&pinctrl 31 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- CFE@0 {
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- reg = <0x020000 0x1fc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@1fe0000 {
- reg = <0x1fe0000 0x20000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
-
-&uart1 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/gpio/gpio.h>
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "ADB P.DG AV4202N";
- compatible = "adb,av4202n", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 37 GPIO_ACTIVE_LOW>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_white {
- label = "AV4202N:white:power";
- gpios = <&pinctrl 10 GPIO_ACTIVE_LOW>;
- default-state = "on";
- };
- power_red {
- label = "AV4202N:red:power";
- gpios = <&pinctrl 11 GPIO_ACTIVE_LOW>;
- };
- wan_white {
- label = "AV4202N:white:wan";
- gpios = <&pinctrl 26 GPIO_ACTIVE_LOW>;
- };
- wan_red {
- label = "AV4202N:red:wan";
- gpios = <&pinctrl 27 GPIO_ACTIVE_LOW>;
- };
- phone_white {
- label = "AV4202N:white:phone";
- gpios = <&pinctrl 24 GPIO_ACTIVE_LOW>;
- };
- phone_red {
- label = "AV4202N:red:phone";
- gpios = <&pinctrl 25 GPIO_ACTIVE_LOW>;
- };
- wifi {
- label = "AV4202N:blue:wifi";
- gpios = <&pinctrl 22 GPIO_ACTIVE_LOW>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xfc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96368MVNgr reference board";
- compatible = "brcm,bcm96368mvngr", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "96368MVNgr:green:adsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_fail_green {
- label = "96368MVNgr:green:inet-fail";
- gpios = <&pinctrl 3 0>;
- };
- inet_green {
- label = "96368MVNgr:green:inet";
- gpios = <&pinctrl 5 0>;
- };
- power_green {
- label = "96368MVNgr:green:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
- wps_green {
- label = "96368MVNgr:green:wps";
- gpios = <&pinctrl 23 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Broadcom BCM96368MVWG reference board";
- compatible = "brcm,bcm96368mvwg", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "96368MVWG:green:adsl";
- gpios = <&pinctrl 2 1>;
- };
- ppp_green {
- label = "96368MVWG:green:ppp";
- gpios = <&pinctrl 5 0>;
- };
- power_green {
- label = "96368MVWG:green:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
- wps_green {
- label = "96368MVWG:green:wps";
- gpios = <&pinctrl 23 1>;
- };
- ppp_fail_red {
- label = "96368MVWG:red:ppp-fail";
- gpios = <&pinctrl 31 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "brcm,bcm963xx-cfe-nor-partitions";
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend VR-3025u";
- compatible = "comtrend,vr-3025u", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "VR-3025u:green:dsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_green {
- label = "VR-3025u:green:inet";
- gpios = <&pinctrl 5 0>;
- };
- power_green {
- label = "VR-3025u:green:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
- power_red {
- label = "VR-3025u:red:power";
- gpios = <&pinctrl 24 0>;
- };
- inet_red {
- label = "VR-3025u:red:inet";
- gpios = <&pinctrl 31 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x0000000 0x0020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x0020000 0x1fc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@1fe0000 {
- label = "nvram";
- reg = <0x1fe0000 0x020000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
- &pinctrl_ephy2_led &pinctrl_ephy3_led>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend VR-3025un";
- compatible = "comtrend,vr-3025un", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "VR-3025un:green:dsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_green {
- label = "VR-3025un:green:inet";
- gpios = <&pinctrl 5 0>;
- };
- power_green {
- label = "VR-3025un:green:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
- power_red {
- label = "VR-3025un:red:power";
- gpios = <&pinctrl 24 0>;
- };
- inet_red {
- label = "VR-3025un:red:inet";
- gpios = <&pinctrl 31 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
- &pinctrl_ephy2_led &pinctrl_ephy3_led>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend VR-3026e";
- compatible = "comtrend,vr-3026e", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "VR-3026e:green:dsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_green {
- label = "VR-3026e:green:inet";
- gpios = <&pinctrl 5 0>;
- };
- power_green {
- label = "VR-3026e:green:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
- power_red {
- label = "VR-3026e:red:power";
- gpios = <&pinctrl 24 0>;
- };
- inet_red {
- label = "VR-3026e:red:inet";
- gpios = <&pinctrl 31 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
- &pinctrl_ephy2_led &pinctrl_ephy3_led>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Huawei EchoLife HG622";
- compatible = "huawei,echolife-hg622", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "HG622:green:dsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_green {
- label = "HG622:green:inet";
- gpios = <&pinctrl 5 1>;
- };
- usb_green {
- label = "HG622:green:usb";
- gpios = <&pinctrl 11 1>;
- };
- power_green {
- label = "HG622:green:power";
- gpios = <&pinctrl 22 1>;
- default-state = "on";
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0xf80000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- cal_data@fa0000 {
- label = "cal_data";
- reg = <0xfa0000 0x020000>;
- read-only;
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0xfe0000 0x020000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci_gnt0 &pinctrl_pci_req0
- &pinctrl_pci_intb &pinctrl_pci_gnt1
- &pinctrl_pci_req1>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Huawei EchoLife HG655b";
- compatible = "huawei,echolife-hg655b", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wps {
- label = "wps";
- gpios = <&pinctrl 12 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 23 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "HW65x:green:dsl";
- gpios = <&pinctrl 2 1>;
- };
- internet_green {
- label = "HW65x:green:internet";
- gpios = <&pinctrl 5 1>;
- };
-
- usb_green {
- label = "HW65x:green:usb";
- gpios = <&pinctrl 14 1>;
- };
- power_green {
- label = "HW65x:green:power";
- gpios = <&pinctrl 22 1>;
- default-state = "on";
- };
- voip_green {
- label = "HW65x:green:voip";
- gpios = <&pinctrl 25 1>;
- };
- wps_green {
- label = "HW65x:green:wps";
- gpios = <&pinctrl 27 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0x770000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- board_data@790000 {
- label = "board_data";
- reg = <0x790000 0x030000>;
- };
-
- cal_data@7c0000 {
- label = "cal_data";
- reg = <0x7c0000 0x020000>;
- read-only;
- };
-
- nvram@7d0000 {
- label = "nvram";
- reg = <0x7e0000 0x020000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
- &pinctrl_ephy2_led &pinctrl_ephy3_led>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Netgear DGND3700v1/DGND3800B";
- compatible = "netgear,dgnd3700-v1", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 10 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 12 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 35 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_green {
- label = "DGND3700v1_3800B:green:dsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_red {
- label = "DGND3700v1_3800B:red:inet";
- gpios = <&pinctrl 4 1>;
- };
- inet_green {
- label = "DGND3700v1_3800B:green:inet";
- gpios = <&pinctrl 5 1>;
- };
- wps_green {
- label = "DGND3700v1_3800B:green:wps";
- gpios = <&pinctrl 11 1>;
- };
- usbfront_green {
- label = "DGND3700v1_3800B:green:usb-front";
- gpios = <&pinctrl 13 1>;
- };
- usbback_green {
- label = "DGND3700v1_3800B:green:usb-back";
- gpios = <&pinctrl 14 1>;
- };
- power_red {
- label = "DGND3700v1_3800B:red:power";
- gpios = <&pinctrl 22 1>;
- };
- lan_green {
- label = "DGND3700v1_3800B:green:lan";
- gpios = <&pinctrl 23 1>;
- };
- power_green {
- label = "DGND3700v1_3800B:green:power";
- gpios = <&pinctrl 24 1>;
- default-state = "on";
- };
- wifi2g_green {
- label = "DGND3700v1_3800B:green:wifi2g";
- gpios = <&pinctrl 26 1>;
- };
- wifi5g_blue {
- label = "DGND3700v1_3800B:blue:wifi5g";
- gpios = <&pinctrl 27 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x020000 0x1e20000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- board_data@1e40000 {
- label = "board_data";
- reg = <0x1e40000 0x1a0000>;
- read-only;
- };
-
- nvram@1fe0000 {
- label = "nvram";
- reg = <0x1fe0000 0x20000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&lsspi {
- switch@1 {
- compatible = "brcm,bcm53115";
- reg = <1>;
- spi-max-frequency = <781000>;
-
- lede,alias = "eth0";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- wan@0 {
- reg = <0>;
- label = "wan";
- };
-
- lan@1 {
- reg = <1>;
- label = "lan1";
- };
-
- lan@2 {
- reg = <2>;
- label = "lan2";
- };
-
- lan@3 {
- reg = <3>;
- label = "lan3";
- };
-
- lan@4 {
- reg = <4>;
- label = "lan4";
- };
-
- cpu@8 {
- reg = <8>;
- label = "cpu";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- };
- };
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Observa VH4032N";
- compatible = "observa,vh4032n", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 35 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- dsl_blue {
- label = "VH4032N:blue:dsl";
- gpios = <&pinctrl 2 1>;
- };
- dsl_red {
- label = "VH4032N:red:dsl";
- gpios = <&pinctrl 5 1>;
- };
- hspa_blue {
- label = "VH4032N:blue:hspa";
- gpios = <&pinctrl 11 1>;
- };
- hspa_red {
- label = "VH4032N:red:hspa";
- gpios = <&pinctrl 12 1>;
- };
- power_blue {
- label = "VH4032N:blue:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
- power_red {
- label = "VH4032N:red:power";
- gpios = <&pinctrl 24 0>;
- };
- voice_blue {
- label = "VH4032N:blue:voice";
- gpios = <&pinctrl 25 1>;
- };
- voice_red {
- label = "VH4032N:red:voice";
- gpios = <&pinctrl 26 1>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci &pinctrl_ephy0_led &pinctrl_ephy1_led
- &pinctrl_ephy2_led &pinctrl_ephy3_led>;
-
- usb_hub_reset {
- gpio-hog;
- gpios = <27 0>;
- output-high;
- line-name = "usb-hub-reset-gpio";
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x0000000 0x0020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x0020000 0x1fc0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@1fe0000 {
- label = "nvram";
- reg = <0x1fe0000 0x020000>;
- };
- };
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Zyxel P870HW-51a v2";
- compatible = "zyxel,p870hw-51a-v2", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 35 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 36 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- power_green {
- label = "P870HW-51a:green:power";
- gpios = <&pinctrl 0 0>;
- default-state = "on";
- };
- dsl_green {
- label = "P870HW-51a:green:dsl";
- gpios = <&pinctrl 2 1>;
- };
- inet_green {
- label = "P870HW-51a:green:inet";
- gpios = <&pinctrl 22 1>;
- };
- wps_orange {
- label = "P870HW-51a:orange:wps";
- gpios = <&pinctrl 24 1>;
- };
- inet_red {
- label = "P870HW-51a:red:inet";
- gpios = <&pinctrl 33 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x3e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@3f0000 {
- label = "nvram";
- reg = <0x3f0000 0x010000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/ {
- #address-cells = <1>;
- #size-cells = <1>;
- compatible = "brcm,bcm6368";
-
- aliases {
- pflash = &pflash;
- pinctrl = &pinctrl;
- serial0 = &uart0;
- serial1 = &uart1;
- spi0 = &lsspi;
- };
-
- cpus {
- #address-cells = <1>;
- #size-cells = <0>;
-
- cpu@0 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <0>;
- };
-
- cpu@1 {
- compatible = "brcm,bmips4350", "mips,mips4Kc";
- device_type = "cpu";
- reg = <1>;
- };
- };
-
- cpu_intc: interrupt-controller {
- #address-cells = <0>;
- compatible = "mti,cpu-interrupt-controller";
-
- interrupt-controller;
- #interrupt-cells = <1>;
- };
-
- memory { device_type = "memory"; reg = <0 0>; };
-
- ubus@10000000 {
- #address-cells = <1>;
- #size-cells = <1>;
- ranges;
- compatible = "simple-bus";
- interrupt-parent = <&periph_intc>;
-
- ext_intc0: interrupt-controller@10000018 {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0x10000018 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <20>, <21>, <22>, <23>;
- };
-
- ext_intc1: interrupt-controller@1000001c {
- compatible = "brcm,bcm6345-ext-intc";
- reg = <0x1000001c 0x4>;
-
- interrupt-controller;
- #interrupt-cells = <2>;
-
- interrupts = <24>, <25>;
- };
-
- periph_intc: interrupt-controller@10000020 {
- compatible = "brcm,bcm6345-l1-intc";
- reg = <0x10000020 0x10>,
- <0x10000030 0x10>;
-
- interrupt-controller;
- #interrupt-cells = <1>;
-
- interrupt-parent = <&cpu_intc>;
- interrupts = <2>, <3>;
- };
-
- pinctrl: pin-controller@10000080 {
- compatible = "brcm,bcm6368-pinctrl";
- reg = <0x10000080 0x8>,
- <0x10000088 0x8>,
- <0x10000098 0x4>;
- reg-names = "dirout", "dat", "mode";
- brcm,gpiobasemode = <&gpiobasemode>;
-
- gpio-controller;
- #gpio-cells = <2>;
-
- interrupts-extended = <&ext_intc1 0 0>,
- <&ext_intc1 1 0>,
- <&ext_intc0 0 0>,
- <&ext_intc0 1 0>,
- <&ext_intc0 2 0>,
- <&ext_intc0 3 0>;
- interrupt-names = "gpio32", "gpio33", "gpio34", "gpio35",
- "gpio36", "gpio37";
-
- pinctrl_analog_afe_0: analog_afe_0 {
- function = "analog_afe_0";
- pins = "gpio0";
- };
-
- pinctrl_analog_afe_1: analog_afe_1 {
- function = "analog_afe_1";
- pins = "gpio1";
- };
-
- pinctrl_sys_irq: sys_irq {
- function = "sys_irq";
- pins = "gpio2";
- };
-
- pinctrl_serial_led: serial_led {
- pinctrl_serial_led_data: serial_led_data {
- function = "serial_led_data";
- pins = "gpio3";
- };
-
- pinctrl_serial_led_clk: serial_led_clk {
- function = "serial_led_clk";
- pins = "gpio4";
- };
- };
-
- pinctrl_inet_led: inet_led {
- function = "inet_led";
- pins = "gpio5";
- };
-
- pinctrl_ephy0_led: ephy0_led {
- function = "ephy0_led";
- pins = "gpio6";
- };
-
- pinctrl_ephy1_led: ephy1_led {
- function = "ephy1_led";
- pins = "gpio7";
- };
-
- pinctrl_ephy2_led: ephy2_led {
- function = "ephy2_led";
- pins = "gpio8";
- };
-
- pinctrl_ephy3_led: ephy3_led {
- function = "ephy3_led";
- pins = "gpio9";
- };
-
- pinctrl_robosw_led_data: robosw_led_data {
- function = "robosw_led_data";
- pins = "gpio10";
- };
-
- pinctrl_robosw_led_clk: robosw_led_clk {
- function = "robosw_led_clk";
- pins = "gpio11";
- };
-
- pinctrl_robosw_led0: robosw_led0 {
- function = "robosw_led0";
- pins = "gpio12";
- };
-
- pinctrl_robosw_led1: robosw_led1 {
- function = "robosw_led1";
- pins = "gpio13";
- };
-
- pinctrl_usb_device_led: usb_device_led {
- function = "usb_device_led";
- pins = "gpio14";
- };
-
- pinctrl_pci: pci {
- pinctrl_pci_req1: pci_req1 {
- function = "pci_req1";
- pins = "gpio16";
- };
-
- pinctrl_pci_gnt1: pci_gnt1 {
- function = "pci_gnt1";
- pins = "gpio17";
- };
-
- pinctrl_pci_intb: pci_intb {
- function = "pci_intb";
- pins = "gpio18";
- };
-
- pinctrl_pci_req0: pci_req0 {
- function = "pci_req0";
- pins = "gpio19";
- };
-
- pinctrl_pci_gnt0: pci_gnt0 {
- function = "pci_gnt0";
- pins = "gpio20";
- };
- };
-
- pinctrl_pcmcia: pcmcia {
- pinctrl_pcmcia_cd1: pcmcia_cd1 {
- function = "pcmcia_cd1";
- pins = "gpio22";
- };
-
- pinctrl_pcmcia_cd2: pcmcia_cd2 {
- function = "pcmcia_cd2";
- pins = "gpio23";
- };
-
- pinctrl_pcmcia_vs1: pcmcia_vs1 {
- function = "pcmcia_vs1";
- pins = "gpio24";
- };
-
- pinctrl_pcmcia_vs2: pcmcia_vs2 {
- function = "pcmcia_vs2";
- pins = "gpio25";
- };
- };
-
- pinctrl_ebi_cs2: ebi_cs2 {
- function = "ebi_cs2";
- pins = "gpio26";
- };
-
- pinctrl_ebi_cs3: ebi_cs3 {
- function = "ebi_cs2";
- pins = "gpio27";
- };
-
- pinctrl_spi_cs2: spi_cs2 {
- function = "spi_cs2";
- pins = "gpio28";
- };
-
- pinctrl_spi_cs3: spi_cs3 {
- function = "spi_cs3";
- pins = "gpio29";
- };
-
- pinctrl_spi_cs4: spi_cs4 {
- function = "spi_cs4";
- pins = "gpio30";
- };
-
- pinctrl_spi_cs5: spi_cs5 {
- function = "spi_cs5";
- pins = "gpio31";
- };
-
- pinctrl_uart1: uart1 {
- function = "uart1";
- group = "uart1_grp";
- };
- };
-
- gpiobasemode: gpiobasemode@100000b8 {
- compatible = "brcm,bcm6368-gpiobasemode", "syscon";
- reg = <0x100000b8 0x4>;
- };
-
- leds: led-controller@100000d0 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6358-leds";
- reg = <0x100000d0 0x8>;
- status = "disabled";
- };
-
- uart0: serial@10000100 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000100 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- uart1: serial@10000120 {
- compatible = "brcm,bcm6345-uart";
- reg = <0x10000120 0x18>;
-
- interrupt-parent = <&periph_intc>;
- interrupts = <3>;
-
- /* clocks = <&periph_clk>; */
- /* clock-names = "refclk"; */
-
- status = "disabled";
- };
-
- lsspi: spi@10000800 {
- #address-cells = <1>;
- #size-cells = <0>;
- compatible = "brcm,bcm6358-spi";
- reg = <0x10000800 0x70c>;
- interrupts = <1>;
- /* clocks = <&clkctl 9>; */
- };
- };
-
- pflash: nor@18000000 {
- compatible = "cfi-flash";
- reg = <0x18000000 0x2000000>;
- bank-width = <2>;
- #address-cells = <1>;
- #size-cells = <1>;
- status = "disabled";
- };
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Comtrend WAP-5813n";
- compatible = "comtrend,wap-5813n", "brcm,bcm6369", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- wlan {
- label = "wlan";
- gpios = <&pinctrl 32 1>;
- linux,code = <KEY_WLAN>;
- debounce-interval = <60>;
- };
-
- reset {
- label = "reset";
- gpios = <&pinctrl 34 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 35 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- inet_green {
- label = "WAP-5813n:green:inet";
- gpios = <&pinctrl 5 0>;
- };
- power_green {
- label = "WAP-5813n:green:power";
- gpios = <&pinctrl 22 0>;
- default-state = "on";
- };
- wps_green {
- label = "WAP-5813n:green:wps";
- gpios = <&pinctrl 23 1>;
- };
- power_red {
- label = "WAP-5813n:red:power";
- gpios = <&pinctrl 24 0>;
- };
- inet_red {
- label = "WAP-5813n:red:inet";
- gpios = <&pinctrl 31 0>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x000000 0x010000>;
- read-only;
- };
-
- linux@10000 {
- label = "linux";
- reg = <0x010000 0x7e0000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- nvram@7f0000 {
- label = "nvram";
- reg = <0x7f0000 0x010000>;
- };
- };
-};
-
-&lsspi {
- switch@0 {
- compatible = "brcm,bcm53115";
- reg = <0>;
- spi-max-frequency = <781000>;
-
- lede,alias = "eth0";
-
- ports {
- #address-cells = <1>;
- #size-cells = <0>;
-
- lan@0 {
- reg = <0>;
- label = "lan4";
- };
-
- lan@1 {
- reg = <1>;
- label = "lan3";
- };
-
- lan@2 {
- reg = <2>;
- label = "lan2";
- };
-
- lan@3 {
- reg = <3>;
- label = "lan1";
- };
-
- wan@4 {
- reg = <4>;
- label = "wan";
- };
-
- cpu@5 {
- reg = <5>;
- label = "cpu";
-
- fixed-link {
- speed = <1000>;
- full-duplex;
- asym-pause;
- pause;
- };
- };
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-/dts-v1/;
-
-#include "bcm6368.dtsi"
-
-#include <dt-bindings/input/input.h>
-
-/ {
- model = "Netgear EVG2000";
- compatible = "netgear,evg2000", "brcm,bcm6369", "brcm,bcm6368";
-
- chosen {
- bootargs = "rootfstype=squashfs,jffs2 noinitrd console=ttyS0,115200";
- stdout-path = "serial0:115200n8";
- };
-
- keys {
- compatible = "gpio-keys-polled";
- #address-cells = <1>;
- #size-cells = <0>;
- poll-interval = <20>;
-
- reset {
- label = "reset";
- gpios = <&pinctrl 25 1>;
- linux,code = <KEY_RESTART>;
- debounce-interval = <60>;
- };
-
- wps {
- label = "wps";
- gpios = <&pinctrl 26 1>;
- linux,code = <KEY_WPS_BUTTON>;
- debounce-interval = <60>;
- };
- };
-
- leds {
- compatible = "gpio-leds";
-
- voip1_green {
- label = "EVG2000:green:voip1";
- gpios = <&pinctrl 14 1>;
- };
- voip2_green {
- label = "EVG2000:green:voip2";
- gpios = <&pinctrl 2 1>;
- };
- inet_red {
- label = "EVG2000:red:inet";
- gpios = <&pinctrl 4 1>;
- };
- inet_green {
- label = "EVG2000:green:inet";
- gpios = <&pinctrl 5 1>;
- };
- usb_green {
- label = "EVG2000:green:usb";
- gpios = <&pinctrl 15 1>;
- };
- power_green {
- label = "EVG2000:green:power";
- gpios = <&pinctrl 22 1>;
- default-state = "on";
- };
- power_red {
- label = "EVG2000:red:power";
- gpios = <&pinctrl 23 1>;
- };
- lan_green {
- label = "EVG2000:green:lan";
- gpios = <&pinctrl 24 1>;
- };
- wireless_green {
- label = "EVG2000:green:wireless";
- gpios = <&pinctrl 26 1>;
- };
- wan_green {
- label = "EVG2000:green:wan";
- gpios = <&pinctrl 27 1>;
- };
- };
-};
-
-&pflash {
- status = "ok";
-
- partitions {
- compatible = "fixed-partitions";
- #address-cells = <1>;
- #size-cells = <1>;
-
- cfe@0 {
- label = "CFE";
- reg = <0x00000000 0x00020000>;
- read-only;
- };
-
- linux@20000 {
- label = "linux";
- reg = <0x00020000 0x00f40000>;
- compatible = "brcm,bcm963xx-imagetag";
- };
-
- board_data@f60000 {
- label = "board_data";
- reg = <0x00f60000 0x00080000>;
- read-only;
- };
-
- nvram@fe0000 {
- label = "nvram";
- reg = <0x00fe0000 0x00020000>;
- };
- };
-};
-
-&pinctrl {
- pinctrl-names = "default";
- pinctrl-0 = <&pinctrl_pci>;
-};
-
-&uart0 {
- status = "ok";
-};
+++ /dev/null
-BOARDNAME:=generic
-
-define Target/Description
- Build firmware images for BCM63XX boards without SMP support.
-endef
-
-
+++ /dev/null
-#
-# Copyright (C) 2006-2015 OpenWrt.org
-# Copyright (C) 2016 LEDE project
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-include $(TOPDIR)/rules.mk
-include $(INCLUDE_DIR)/image.mk
-
-LOADADDR = 0x80010000 # RAM start + 64K
-KERNEL_ENTRY = $(LOADADDR) # Newer kernels add a jmp to the kernel_entry at the start of the binary
-LOADER_ENTRY = 0x80a00000 # RAM start + 10M, for relocate
-RAMSIZE = 0x02000000 # 32MB
-LZMA_TEXT_START = 0x81800000 # 32MB - 8MB
-
-LOADER_MAKEOPTS= \
- KDIR=$(KDIR) \
- LOADADDR=$(LOADADDR) \
- KERNEL_ENTRY=$(KERNEL_ENTRY) \
- RAMSIZE=$(RAMSIZE) \
- LZMA_TEXT_START=$(LZMA_TEXT_START) \
-
-RELOCATE_MAKEOPTS= \
- CACHELINE_SIZE=16 \
- KERNEL_ADDR=$(KERNEL_ENTRY) \
- CROSS_COMPILE=$(TARGET_CROSS) \
- LZMA_TEXT_START=$(LOADER_ENTRY)
-
-define Build/Compile
- rm -rf $(KDIR)/relocate
- $(CP) ../../generic/image/relocate $(KDIR)
- $(MAKE) -C $(KDIR)/relocate $(RELOCATE_MAKEOPTS)
-endef
-
-### Kernel scripts ###
-define Build/hcs-initramfs
- $(STAGING_DIR_HOST)/bin/hcsmakeimage --magic_bytes=$(HCS_MAGIC_BYTES) \
- --rev_maj=$(HCS_REV_MAJ) --rev_min=$(HCS_REV_MIN) --input_file=$@ \
- --output_file=$@.hcs --ldaddress=$(LOADADDR)
- mv $@.hcs $@
-endef
-
-define Build/loader-lzma
- rm -rf $@.src
- $(MAKE) -C lzma-loader \
- $(LOADER_MAKEOPTS) \
- PKG_BUILD_DIR="$@.src" \
- TARGET_DIR="$(dir $@)" \
- LOADER_DATA="$@" \
- LOADER_NAME="$(notdir $@)" \
- compile loader.$(1)
- mv "$@.$(1)" "$@"
- rm -rf $@.src
-endef
-
-define Build/lzma
- # CFE is a LZMA nazi! It took me hours to find out the parameters!
- # Also I think lzma has a bug cause it generates different output depending on
- # if you use stdin / stdout or not. Use files instead of stdio here, cause
- # otherwise CFE will complain and not boot the image.
- $(STAGING_DIR_HOST)/bin/lzma e $@ -d22 -fb64 -a1 $@.lzma
- mv $@.lzma $@
-endef
-
-define Build/lzma-cfe
- # Strip out the length, CFE doesn't like this
- dd if=$@ of=$@.lzma.cfe bs=5 count=1
- dd if=$@ of=$@.lzma.cfe ibs=13 obs=5 skip=1 seek=1 conv=notrunc
- mv $@.lzma.cfe $@
-endef
-
-define Build/relocate-kernel
- # CFE only allows ~4 MiB for the uncompressed kernels, but uncompressed
- # kernel might get larger than that, so let CFE unpack and load at a
- # higher address and make the kernel relocate itself to the expected
- # location.
- ( \
- dd if=$(KDIR)/relocate/loader.bin bs=32 conv=sync && \
- perl -e '@s = stat("$@"); print pack("N", @s[7])' && \
- cat $@ \
- ) > $@.relocate
- mv $@.relocate $@
-endef
-
-### Image scripts ###
-define rootfspad/jffs2-128k
---align-rootfs
-endef
-define rootfspad/jffs2-64k
---align-rootfs
-endef
-define rootfspad/squashfs
-endef
-
-define Image/LimitName16
-$(shell expr substr "$(1)" 1 16)
-endef
-
-define Image/FileSystemStrip
-$(firstword $(subst +,$(space),$(subst root.,,$(notdir $(1)))))
-endef
-
-define Build/cfe-bin
- $(STAGING_DIR_HOST)/bin/imagetag -i $(IMAGE_KERNEL) -f $(IMAGE_ROOTFS) \
- --output $@ --boardid $(CFE_BOARD_ID) --chipid $(CFE_CHIP_ID) \
- --entry $(LOADER_ENTRY) --load-addr $(LOADER_ENTRY) \
- --info1 "$(call Image/LimitName16,$(DEVICE_NAME))" \
- --info2 "$(call Image/FileSystemStrip,$(IMAGE_ROOTFS))" \
- $(call rootfspad/$(call Image/FileSystemStrip,$(IMAGE_ROOTFS))) \
- $(CFE_EXTRAS) $(1)
-endef
-
-define Build/cfe-old-bin
- $(TOPDIR)/scripts/brcmImage.pl -t -p \
- -o $@ -b $(CFE_BOARD_ID) -c $(CFE_CHIP_ID) \
- -e $(LOADER_ENTRY) -a $(LOADER_ENTRY) \
- -k $(IMAGE_KERNEL) -r $(IMAGE_ROOTFS) \
- $(CFE_EXTRAS)
-endef
-
-define Build/cfe-spw303v-bin
- $(STAGING_DIR_HOST)/bin/imagetag -i $(IMAGE_KERNEL) -f $(IMAGE_ROOTFS) \
- --output $@ --boardid $(CFE_BOARD_ID) --chipid $(CFE_CHIP_ID) \
- --entry $(LOADER_ENTRY) --load-addr $(LOADER_ENTRY) \
- $(call rootfspad/$(call Image/FileSystemStrip,$(IMAGE_ROOTFS))) \
- $(CFE_EXTRAS) $(1)
-endef
-
-define Build/spw303v-bin
- $(STAGING_DIR_HOST)/bin/spw303v -i $@ -o $@.spw303v
- mv $@.spw303v $@
-endef
-
-define Build/zyxel-bin
- $(STAGING_DIR_HOST)/bin/zyxbcm -i $@ -o $@.zyxel
- mv $@.zyxel $@
-endef
-
-define Build/redboot-bin
- # Prepare kernel and rootfs
- dd if=$(IMAGE_KERNEL) of=$(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz bs=65536 conv=sync
- dd if=$(IMAGE_ROOTFS) of=$(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS)) bs=64k conv=sync
- echo -ne \\xDE\\xAD\\xC0\\xDE >> $(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS))
- # Generate the scripted image
- $(TOPDIR)/scripts/redboot-script.pl \
- -k $(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz \
- -r $(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS)) \
- -a $(strip $(LOADER_ENTRY)) -f 0xbe430000 -l 0x7c0000 \
- -s 0x1000 -t 20 -o $@.redbootscript
- dd if="$@.redbootscript" of="$@.redbootscript.padded" bs=4096 conv=sync
- cat \
- "$@.redbootscript.padded" \
- "$(BIN_DIR)/$(REDBOOT_PREFIX)-vmlinux.gz" \
- "$(BIN_DIR)/$(REDBOOT_PREFIX)-$(notdir $(IMAGE_ROOTFS))" \
- > "$@"
-endef
-
-define Device/Default
- PROFILES = Default $$(DEVICE_NAME)
- KERNEL_DEPENDS = $$(wildcard ../dts/$$(DEVICE_DTS).dts)
- KERNEL_INITRAMFS_SUFFIX := .elf
- DEVICE_DTS_DIR := ../dts
- SOC = bcm$$(CFE_CHIP_ID)
- DEVICE_DTS = $$(SOC)-$(subst _,-,$(1))
-endef
-
-ATH5K_PACKAGES := kmod-ath5k wpad-basic
-ATH9K_PACKAGES := kmod-ath9k wpad-basic
-B43_PACKAGES := kmod-b43 wpad-basic
-BRCMWL_PACKAGES := kmod-brcm-wl nas wlc
-RT28_PACKAGES := kmod-rt2800-pci wpad-basic
-RT61_PACKAGES := kmod-rt61-pci wpad-basic
-USB1_PACKAGES := kmod-usb-ohci kmod-usb-ledtrig-usbport
-USB2_PACKAGES := kmod-usb2 kmod-usb-ohci kmod-usb-ledtrig-usbport
-
-include bcm63xx.mk
-
-$(eval $(call BuildImage))
+++ /dev/null
-The image neede to flash onto a Broadcom 63xx-series board depends on the
-board, method you are using to flash, and, for web-based flash, on the version
-of the Broadcom code your router uses.
-
-There are two major revisions of the Broadcom code as far as imagetags are
-concerned, before 3.08 and after 3.08, however there are some variations
-within in that, either due to vendor differences or due to changes at
-Broadcom (it's not clear yet which is the case). In addtion Pirelli modified
-the Broadcom code, so Alice Gate models use a different imagetag than any
-other vendor.
-
-The imagetag format for flashing via CFE is the same for almost all the
-boards, and is the same for all images generated by the imagetag utility.
-Images flashable using cfe are labelled openwrt-<board>-<filesystem>-cfe.bin
-
-The imagetags for tftp/ftp flashing is based on Broadcom 3.00-3.04 imagetags
-and is known to be correct as the source code GPL and is available for reading.
-
-Broadcom code 2.21 is based on the BT Voyager firmware image I looked at. It
-may in fact be BT Voyager-specific. 2.21 is actually more difficult to deal
-with the imagetag from 3.00 as it has three different CRC calculations in
-addtition to the header CRC.
-
-Broadcom 3.00-3.02 flashing has been tested on Comtrend CT-5261, CT-536 and
-Tecom GW6000, and is the version of the flashing that was present before the
-imagetags were split by broadcom code version (early June 2009)
-
-3.04 is guessed to be the same as 3.00-3.02 based on available information
-
-Broadom 3.06 is thought to be the same as 3.00-3.02, however the only 3.06
-this author (Daniel Dickinson) has seen is the Alice Gate (Pirelli) firmware
-which is known to be different due to vendor (Pirelli) modifications to the
-Broadcom code.
-
-Broadcom 3.10 uses an imagetag that is believed to apply to all 3.10 and 3.12
-versions, and has been tested on the Tecom GW6200. This version introdec changes to
-the imagetag to deal with TR69 (a remote rouer management system developed by the
-DSL forum). There is a field for vendor-specific information, that at least in some
-cases is not optional. It is based on the hexedit of a neufbox4 firmware image, the
-information in https://dev.openwrt.org/ticket/4987, and the hexedit of a Tecom
-GW6200 image.
-
-Some boards share the same tag format, but require vendor-specific fields in
-the board. In that case the tagid is shared, but the filename of the generated
-image reflects the router for which the image was created.
-
-router |method | codever |filename
-+-------------+-------------+---------+---------------------------------------
-|any |cfe+most web | any |openwrt-<board>-<fs>-cfe.bin
-|AGVoIP2+WiFi |cfe |alice3.06|openwrt-AGV2+W-cfe-<fs>-cfe.bin
-|AGVoIP2+WiFi |web |alice3.06|openwrt-AGV2+W-cfe-<fs>-cfe.bin
-|CT536 |web |3.02 |openwrt-CT536_CT5621-<fs>-cfe.bin
-|CT5621 |web |3.02 |openwrt-CT536_CT5621-<fs>-cfe.bin
-|DG834GT |web |3.02 |openwrt-DG834GT_DG834PN-<fs>-cfe.bin
-|DG834PN |web |3.02 |openwrt-DG834GT_DG834PN-<fs>-cfe.bin
-|DSL-2640B |web |3.10 |openwrt-DSL2640B-<fs>-cfe.bin
-|DSL-2740B |web |3.10 |openwrt-DSL2670B-<fs>-cfe.bin
-|F5D7633 |web |3.10 |openwrt-F5D7633-<fs>-cfe.bin
-|F@ST2404 |web |3.0X? |openwrt-F@ST2404-cfe-<fs>-cfe.bin
-|F@ST2404 |web |3.1X? |openwrt-F@ST2404-<fs>-cfe.bin
-|GW6000 |web |3.00 |openwrt-GW6000-<fs>-cfe.bin
-|GW6200 |web |3.10 |openwrt-GW6200-<fs>-cfe.bin
-|Neufbox4 |web |3.12 |openwrt-NEUFBOX4-<fs>-cfe.bin
-|TD8810A |web |3.06 |openwrt-TD8810-<fs>-cfe.bin
-|TD8810B |web |3.06 |openwrt-TD8810-<fs>-cfe.bin
-|TD8811A |web |3.06 |openwrt-TD8811-<fs>-cfe.bin
-|TD8811B |web |3.06 |openwrt-TD881-<fs>-cfe.bin
-|TD8900GB |web |3.06 |openwrt-TD8900DB<fs>-cfe.bin
-|USR9108 |web |3.0X? |openwrt-USR9108-<fs>-cfe.bin
-|V2091_BTR |web |2.21 |openwrt-V2091_BTR-<fs>-cfe.bin
-|V2091_ROI |web |2.21 |openwrt-V2091-<fs>-cfe.bin
-|V2091_WB |web |2.21 |openwrt-V2091-<fs>-cfe.bin
-|V210_BTR |web |2.21 |openwrt-V210_BTR-<fs>-cfe.bin
-|V210_ROI |web |2.21 |openwrt-V210-ROI_WB<fs>-cfe.bin
-|V210_WB |web |2.21 |openwrt-V210-ROI_WB<fs>-cfe.bin
-|V2110 |web |2.21 |openwrt-V2110-<fs>-cfe.bin
-|V2110_AA |web |2.21 |openwrt-V2110-<fs>-cfe.bin
-|V2110_ROI |web |2.21 |openwrt-V2110-<fs>-cfe.bin
-|V2500V |web |2.21 |openwrt-V2500V<fs>-cfe.bin
-|V2500V_AA |web |2.21 |openwrt-V2500V-<fs>-cfe.bin
-|V2500V_SIP_CLUB |web |2.21 |openwrt-V2500V-<fs>-cfe.bin
-
-Old imagetag routers
---------------------
-Davolink DV201AMR
-
-Redboot routers
----------------
-Inventel Livebox
-
-Known router->code versions
----------------------------
-
-Vendor |Model |Code Ver
----------------------------+------------------------------------------+--------
-Belkin |F5D7633 |3.10
-British Telecom (BT) |Voyager V2091_BTR |2.21
-British Telecom (BT) |Voyager V2091_ROI |2.21
-British Telecom (BT) |Voyager V2091_WB |2.21
-British Telecom (BT) |Voyager V210_BTR |2.21
-British Telecom (BT) |Voyager V210_ROI |2.21
-British Telecom (BT) |Voyager V210_WB |2.21
-British Telecom (BT) |Voyager V2110 |2.21
-British Telecom (BT) |Voyager V2110_AA |2.21
-British Telecom (BT) |Voyager V2110_ROI |2.21
-British Telecom (BT) |Voyager V220V |2.21
-British Telecom (BT) |Voyager V2500V |2.21
-British Telecom (BT) |Voyager V2500V_AA |2.21
-British Telecom (BT) |Voyager V2500V_SIP_CLUB |2.21
-Comtrend |CT-5261 |3.02
-Comtrend |CT-536 |3.02
-D-Link |DSL-2640B |3.10
-D-Link |DSL-2670B |3.10
-NetGear |DG834GT |3.02
-NetGear |DG834PN |3.02
-Neuf Cegetel |Neufbox 4 |3.12
-Pirelli |Alice Gate Wi-Fi (+VoIP models?) |ag 3.06
-Sagem |F@ST2404 |?
-TP-Link |TD-8810A |3.06
-TP-Link |TD-8810B |3.06
-TP-Link |TD-8811A |3.06
-TP-Link |TD-8811B |3.06
-TP-Link |TD-W8900GB |3.06
-Tecom |GW6000 |3.00
-Tecom |GW6200 |3.10
-USR |9108 |?
-
+++ /dev/null
-
-#
-# BCM33XX/BCM63XX Profiles
-#
-
-define Device/bcm33xx
- KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma bin | hcs-initramfs
- IMAGES :=
- HCS_MAGIC_BYTES :=
- HCS_REV_MIN :=
- HCS_REV_MAJ :=
-endef
-DEVICE_VARS += HCS_MAGIC_BYTES HCS_REV_MIN HCS_REV_MAJ
-
-define Device/bcm63xx
- FILESYSTEMS := squashfs jffs2-64k jffs2-128k
- KERNEL := kernel-bin | append-dtb | relocate-kernel | lzma | lzma-cfe
- KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma elf
- IMAGES := cfe.bin
- IMAGE/cfe.bin := cfe-bin --pad $$$$(shell expr $$$$(FLASH_MB) / 2)
- IMAGE/cfe-4M.bin := cfe-bin --pad 2
- IMAGE/cfe-8M.bin := cfe-bin --pad 4
- IMAGE/cfe-16M.bin := cfe-bin --pad 8
- IMAGE/cfe-bc221.bin := cfe-bin --layoutver 5
- IMAGE/cfe-old.bin := cfe-old-bin
- IMAGE/sysupgrade.bin := cfe-bin
- BLOCK_SIZE := 0x10000
- IMAGE_OFFSET :=
- FLASH_MB := 4
- CFE_BOARD_ID :=
- CFE_CHIP_ID :=
- CFE_EXTRAS = --block-size $$(BLOCK_SIZE) --image-offset $$(if $$(IMAGE_OFFSET),$$(IMAGE_OFFSET),$$(BLOCK_SIZE))
-endef
-DEVICE_VARS += BLOCK_SIZE FLASH_MB IMAGE_OFFSET
-DEVICE_VARS += CFE_BOARD_ID CFE_CHIP_ID CFE_EXTRAS
-
-define Device/bcm63xx_netgear
- $(Device/bcm63xx)
- DEVICE_VENDOR := NETGEAR
- IMAGES := factory.chk sysupgrade.bin
- IMAGE/factory.chk := cfe-bin | netgear-chk
- NETGEAR_BOARD_ID :=
- NETGEAR_REGION :=
-endef
-DEVICE_VARS += NETGEAR_BOARD_ID NETGEAR_REGION
-
-define Device/bcm63xx_redboot
- FILESYSTEMS := squashfs
- KERNEL := kernel-bin | append-dtb | relocate-kernel | gzip
- KERNEL_INITRAMFS := kernel-bin | append-dtb | lzma | loader-lzma elf
- IMAGES := redboot.bin
- IMAGE/redboot.bin := redboot-bin
- REDBOOT_PREFIX := $$(IMAGE_PREFIX)
-endef
-DEVICE_VARS += REDBOOT_PREFIX
-
-### Generic ###
-define Device/brcm_bcm963281tan
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 963281TAN
- IMAGES := cfe-4M.bin cfe-8M.bin cfe-16M.bin
- CFE_BOARD_ID := 963281TAN
- CFE_CHIP_ID := 6328
-endef
-TARGET_DEVICES += brcm_bcm963281tan
-
-define Device/brcm_bcm96328avng
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96328avng
- IMAGES := cfe-4M.bin cfe-8M.bin cfe-16M.bin
- CFE_BOARD_ID := 96328avng
- CFE_CHIP_ID := 6328
-endef
-TARGET_DEVICES += brcm_bcm96328avng
-
-define Device/brcm_bcm96338gw
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96338GW
- CFE_BOARD_ID := 6338GW
- CFE_CHIP_ID := 6338
-endef
-TARGET_DEVICES += brcm_bcm96338gw
-
-define Device/brcm_bcm96338w
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96338W
- CFE_BOARD_ID := 6338W
- CFE_CHIP_ID := 6338
-endef
-TARGET_DEVICES += brcm_bcm96338w
-
-define Device/brcm_bcm96345gw2
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96345GW2
- IMAGES += cfe-bc221.bin
- CFE_BOARD_ID := 96345GW2
- CFE_CHIP_ID := 6345
- DEFAULT := n
-endef
-TARGET_DEVICES += brcm_bcm96345gw2
-
-define Device/brcm_bcm96348gw
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96348GW
- IMAGES += cfe-bc221.bin
- CFE_BOARD_ID := 96348GW
- CFE_CHIP_ID := 6348
-endef
-TARGET_DEVICES += brcm_bcm96348gw
-
-define Device/brcm_bcm96348gw-10
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96348GW-10
- CFE_BOARD_ID := 96348GW-10
- CFE_CHIP_ID := 6348
-endef
-TARGET_DEVICES += brcm_bcm96348gw-10
-
-define Device/brcm_bcm96348gw-11
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96348GW-11
- CFE_BOARD_ID := 96348GW-11
- CFE_CHIP_ID := 6348
-endef
-TARGET_DEVICES += brcm_bcm96348gw-11
-
-define Device/brcm_bcm96348r
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96348R
- CFE_BOARD_ID := 96348R
- CFE_CHIP_ID := 6348
-endef
-TARGET_DEVICES += brcm_bcm96348r
-
-define Device/brcm_bcm96358vw
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96358VW
- CFE_BOARD_ID := 96358VW
- CFE_CHIP_ID := 6358
-endef
-TARGET_DEVICES += brcm_bcm96358vw
-
-define Device/brcm_bcm96358vw2
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96358VW2
- CFE_BOARD_ID := 96358VW2
- CFE_CHIP_ID := 6358
-endef
-TARGET_DEVICES += brcm_bcm96358vw2
-
-define Device/brcm_bcm96368mvngr
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96368MVNgr
- CFE_BOARD_ID := 96368MVNgr
- CFE_CHIP_ID := 6368
-endef
-TARGET_DEVICES += brcm_bcm96368mvngr
-
-define Device/brcm_bcm96368mvwg
- $(Device/bcm63xx)
- DEVICE_VENDOR := Generic
- DEVICE_MODEL := 96368MVWG
- CFE_BOARD_ID := 96368MVWG
- CFE_CHIP_ID := 6368
-endef
-TARGET_DEVICES += brcm_bcm96368mvwg
-
-### Actiontec ###
-define Device/actiontec_r1000h
- $(Device/bcm63xx)
- DEVICE_VENDOR := Actiontec
- DEVICE_MODEL := R1000H
- FILESYSTEMS := squashfs
- CFE_BOARD_ID := 96368MVWG
- CFE_CHIP_ID := 6368
- FLASH_MB := 32
- IMAGE_OFFSET := 0x20000
- DEVICE_PACKAGES := $(USB2_PACKAGES) $(BRCMWL_PACKAGES)
-endef
-TARGET_DEVICES += actiontec_r1000h
-
-### ADB ###
-define Device/adb_a4001n
- $(Device/bcm63xx)
- DEVICE_VENDOR := ADB
- DEVICE_MODEL := P.DG A4001N
- CFE_BOARD_ID := 96328dg2x2
- CFE_CHIP_ID := 6328
- FLASH_MB := 8
- DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
-endef
-TARGET_DEVICES += adb_a4001n
-
-define Device/adb_a4001n1
- $(Device/bcm63xx)
- DEVICE_VENDOR := ADB
- DEVICE_MODEL := P.DG A4001N1
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 963281T_TEF
- CFE_CHIP_ID := 6328
- FLASH_MB := 16
- DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
-endef
-TARGET_DEVICES += adb_a4001n1
-
-define Device/adb_av4202n
- $(Device/bcm63xx)
- DEVICE_VENDOR := ADB
- DEVICE_MODEL := P.DG AV4202N
- IMAGE_OFFSET := 0x20000
- CFE_BOARD_ID := 96368_Swiss_S1
- CFE_CHIP_ID := 6368
- DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
-endef
-TARGET_DEVICES += adb_av4202n
-
-### Alcatel ###
-define Device/alcatel_rg100a
- $(Device/bcm63xx)
- DEVICE_VENDOR := Alcatel
- DEVICE_MODEL := RG100A
- CFE_BOARD_ID := 96358VW2
- CFE_CHIP_ID := 6358
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(USB2_PACKAGES) $(B43_PACKAGES)
-endef
-TARGET_DEVICES += alcatel_rg100a
-
-### Asmax ###
-define Device/asmax_ar-1004g
- $(Device/bcm63xx)
- DEVICE_VENDOR := Asmax
- DEVICE_MODEL := AR 1004g
- CFE_BOARD_ID := 96348GW-10
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += asmax_ar-1004g
-
-### Belkin ###
-define Device/belkin_f5d7633
- $(Device/bcm63xx)
- DEVICE_VENDOR := Belkin
- DEVICE_MODEL := F5D7633
- CFE_BOARD_ID := 96348GW-10
- CFE_CHIP_ID := 6348
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += belkin_f5d7633
-
-### Broadcom ###
-define Device/brcm_bcm96318ref
- $(Device/bcm63xx)
- DEVICE_VENDOR := Broadcom
- DEVICE_MODEL := BCM96318REF reference board
- IMAGES :=
- CFE_BOARD_ID := 96318REF
- CFE_CHIP_ID := 6318
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES) kmod-bcm63xx-udc
-endef
-TARGET_DEVICES += brcm_bcm96318ref
-
-define Device/brcm_bcm96318ref-p300
- $(Device/bcm63xx)
- DEVICE_VENDOR := Broadcom
- DEVICE_MODEL := BCM96318REF_P300 reference board
- IMAGES :=
- CFE_BOARD_ID := 96318REF_P300
- CFE_CHIP_ID := 6318
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES) kmod-bcm63xx-udc
-endef
-TARGET_DEVICES += brcm_bcm96318ref-p300
-
-define Device/brcm_bcm963268bu-p300
- $(Device/bcm63xx)
- DEVICE_VENDOR := Broadcom
- DEVICE_MODEL := BCM963268BU_P300 reference board
- IMAGES :=
- CFE_BOARD_ID := 963268BU_P300
- CFE_CHIP_ID := 63268
- DEVICE_PACKAGES := $(USB2_PACKAGES) kmod-bcm63xx-udc
-endef
-TARGET_DEVICES += brcm_bcm963268bu-p300
-
-define Device/brcm_bcm963269bhr
- $(Device/bcm63xx)
- DEVICE_VENDOR := Broadcom
- DEVICE_MODEL := BCM963269BHR reference board
- IMAGES :=
- CFE_BOARD_ID := 963269BHR
- CFE_CHIP_ID := 63268
- SOC := bcm63269
- DEVICE_PACKAGES := $(USB2_PACKAGES) kmod-bcm63xx-udc
-endef
-TARGET_DEVICES += brcm_bcm963269bhr
-
-### BT ###
-define Device/bt_home-hub-2-a
- $(Device/bcm63xx)
- DEVICE_VENDOR := BT
- DEVICE_MODEL := Home Hub 2.0
- DEVICE_VARIANT := A
- CFE_BOARD_ID := HOMEHUB2A
- CFE_CHIP_ID := 6358
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += bt_home-hub-2-a
-
-define Device/bt_voyager-2110
- $(Device/bcm63xx)
- DEVICE_VENDOR := BT
- DEVICE_MODEL := Voyager 2110
- CFE_BOARD_ID := V2110
- CFE_CHIP_ID := 6348
- CFE_EXTRAS += --layoutver 5
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += bt_voyager-2110
-
-define Device/bt_voyager-2500v-bb
- $(Device/bcm63xx)
- DEVICE_VENDOR := BT
- DEVICE_MODEL := Voyager 2500V
- CFE_BOARD_ID := V2500V_BB
- CFE_CHIP_ID := 6348
- CFE_EXTRAS += --layoutver 5
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += bt_voyager-2500v-bb
-
-### Comtrend ###
-define Device/comtrend_ar-5315u
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := AR-5315u
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 96318A-1441N1
- CFE_CHIP_ID := 6318
- FLASH_MB := 16
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_ar-5315u
-
-define Device/comtrend_ar-5381u
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := AR-5381u
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 96328A-1241N
- CFE_CHIP_ID := 6328
- FLASH_MB := 16
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_ar-5381u
-
-define Device/comtrend_ar-5387un
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := AR-5387un
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 96328A-1441N1
- CFE_CHIP_ID := 6328
- FLASH_MB := 16
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_ar-5387un
-
-define Device/comtrend_ct-536plus
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := CT-536+
- DEVICE_ALT0_VENDOR := Comtrend
- DEVICE_ALT0_MODEL := CT-5621
- CFE_BOARD_ID := 96348GW-11
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += comtrend_ct-536plus
-
-define Device/comtrend_ct-5365
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := CT-5365
- CFE_BOARD_ID := 96348A-122
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += comtrend_ct-5365
-
-define Device/comtrend_ct-6373
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := CT-6373
- CFE_BOARD_ID := CT6373-1
- CFE_CHIP_ID := 6358
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_ct-6373
-
-define Device/comtrend_vr-3025u
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := VR-3025u
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 96368M-1541N
- CFE_CHIP_ID := 6368
- BLOCK_SIZE := 0x20000
- FLASH_MB := 32
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_vr-3025u
-
-define Device/comtrend_vr-3025un
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := VR-3025un
- CFE_BOARD_ID := 96368M-1341N
- CFE_CHIP_ID := 6368
- FLASH_MB := 8
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_vr-3025un
-
-define Device/comtrend_vr-3026e
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := VR-3026e
- CFE_BOARD_ID := 96368MT-1341N1
- CFE_CHIP_ID := 6368
- FLASH_MB := 8
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_vr-3026e
-
-define Device/comtrend_wap-5813n
- $(Device/bcm63xx)
- DEVICE_VENDOR := Comtrend
- DEVICE_MODEL := WAP-5813n
- CFE_BOARD_ID := 96369R-1231N
- CFE_CHIP_ID := 6368
- FLASH_MB := 8
- SOC := bcm6369
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += comtrend_wap-5813n
-
-### D-Link ###
-define Device/d-link_dsl-2640b-b
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DSL-2640B
- DEVICE_VARIANT := B2
- CFE_BOARD_ID := D-4P-W
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += d-link_dsl-2640b-b
-
-define Device/d-link_dsl-2640u
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DSL-2640U
- DEVICE_VARIANT := C1
- DEVICE_ALT0_VENDOR := D-Link
- DEVICE_ALT0_MODEL := DSL-2640U/BRU/C
- CFE_BOARD_ID := 96338W2_E7T
- CFE_CHIP_ID := 6338
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += d-link_dsl-2640u
-
-define Device/d-link_dsl-2650u
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DSL-2650U
- CFE_BOARD_ID := 96358VW2
- CFE_CHIP_ID := 6358
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += d-link_dsl-2650u
-
-define Device/d-link_dsl-274xb-c2
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DSL-2740B
- DEVICE_VARIANT := C2
- DEVICE_ALT0_VENDOR := D-Link
- DEVICE_ALT0_MODEL := DSL-2741B
- DEVICE_ALT0_VARIANT := C2
- CFE_BOARD_ID := 96358GW
- CFE_CHIP_ID := 6358
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += d-link_dsl-274xb-c2
-
-define Device/d-link_dsl-274xb-c3
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DSL-2740B
- DEVICE_VARIANT := C3
- DEVICE_ALT0_VENDOR := D-Link
- DEVICE_ALT0_MODEL := DSL-2741B
- DEVICE_ALT0_VARIANT := C3
- DEVICE_DTS := bcm6358-d-link-dsl-274xb-c2
- CFE_BOARD_ID := AW4139
- CFE_CHIP_ID := 6358
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += d-link_dsl-274xb-c3
-
-define Device/d-link_dsl-274xb-f1
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DSL-2740B
- DEVICE_VARIANT := F1
- DEVICE_ALT0_VENDOR := D-Link
- DEVICE_ALT0_MODEL := DSL-2741B
- DEVICE_ALT0_VARIANT := F1
- CFE_BOARD_ID := AW4339U
- CFE_CHIP_ID := 6328
- IMAGES := cfe-EU.bin cfe-AU.bin
- IMAGE/cfe-AU.bin := cfe-bin --signature2 "4.06.01.AUF1" --pad 4
- IMAGE/cfe-EU.bin := cfe-bin --signature2 "4.06.01.EUF1" --pad 4
- DEVICE_PACKAGES := $(ATH9K_PACKAGES)
-endef
-TARGET_DEVICES += d-link_dsl-274xb-f1
-
-define Device/d-link_dsl-275xb-d1
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DSL-2750B
- DEVICE_VARIANT := D1
- DEVICE_ALT0_VENDOR := D-Link
- DEVICE_ALT0_MODEL := DSL-2751
- DEVICE_ALT0_VARIANT := D1
- CFE_BOARD_ID := AW5200B
- CFE_CHIP_ID := 6318
- FLASH_MB := 8
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += d-link_dsl-275xb-d1
-
-define Device/d-link_dva-g3810bn-tl
- $(Device/bcm63xx)
- DEVICE_VENDOR := D-Link
- DEVICE_MODEL := DVA-G3810BN/TL
- CFE_BOARD_ID := 96358VW
- CFE_CHIP_ID := 6358
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += d-link_dva-g3810bn-tl
-
-### Davolink ###
-define Device/davolink_dv-201amr
- $(Device/bcm63xx)
- DEVICE_VENDOR := Davolink
- DEVICE_MODEL := DV-201AMR
- IMAGES := cfe-old.bin
- CFE_BOARD_ID := DV201AMR
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += davolink_dv-201amr
-
-### Dynalink ###
-define Device/dynalink_rta770bw
- $(Device/bcm63xx)
- DEVICE_VENDOR := Dynalink
- DEVICE_MODEL := RTA770BW
- DEVICE_ALT0_VENDOR := Siemens
- DEVICE_ALT0_MODEL := SE515
- IMAGES =
- CFE_BOARD_ID := RTA770BW
- CFE_CHIP_ID := 6345
- CFE_EXTRAS += --layoutver 5
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += dynalink_rta770bw
-
-define Device/dynalink_rta770w
- $(Device/bcm63xx)
- DEVICE_VENDOR := Dynalink
- DEVICE_MODEL := RTA770W
- IMAGES =
- CFE_BOARD_ID := RTA770W
- CFE_CHIP_ID := 6345
- CFE_EXTRAS += --layoutver 5
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += dynalink_rta770w
-
-define Device/dynalink_rta1025w
- $(Device/bcm63xx)
- DEVICE_VENDOR := Dynalink
- DEVICE_MODEL := RTA1025W
- CFE_BOARD_ID := RTA1025W_16
- CFE_CHIP_ID := 6348
- CFE_EXTRAS += --layoutver 5
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += dynalink_rta1025w
-
-define Device/dynalink_rta1320
- $(Device/bcm63xx)
- DEVICE_VENDOR := Dynalink
- DEVICE_MODEL := RTA1320
- CFE_BOARD_ID := RTA1320_16M
- CFE_CHIP_ID := 6338
- CFE_EXTRAS += --layoutver 5
- DEFAULT := n
-endef
-TARGET_DEVICES += dynalink_rta1320
-
-### Huawei ###
-define Device/huawei_echolife-hg520v
- $(Device/bcm63xx)
- DEVICE_VENDOR := Huawei
- DEVICE_MODEL := EchoLife HG520v
- CFE_BOARD_ID := HW6358GW_B
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --rsa-signature "EchoLife_HG520v"
- SOC := bcm6359
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += huawei_echolife-hg520v
-
-define Device/huawei_echolife-hg553
- $(Device/bcm63xx)
- DEVICE_VENDOR := Huawei
- DEVICE_MODEL := EchoLife HG553
- CFE_BOARD_ID := HW553
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --rsa-signature "EchoLife_HG553" --tag-version 7
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += huawei_echolife-hg553
-
-define Device/huawei_echolife-hg556a-a
- $(Device/bcm63xx)
- DEVICE_VENDOR := Huawei
- DEVICE_MODEL := EchoLife HG556a
- DEVICE_VARIANT := A
- DEVICE_DESCRIPTION = Build firmware images for Huawei HG556a version A (Atheros)
- CFE_BOARD_ID := HW556
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --rsa-signature "EchoLife_HG556a" --tag-version 8
- IMAGE_OFFSET := 0x20000
- DEVICE_PACKAGES := $(ATH9K_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += huawei_echolife-hg556a-a
-
-define Device/huawei_echolife-hg556a-b
- $(Device/bcm63xx)
- DEVICE_VENDOR := Huawei
- DEVICE_MODEL := EchoLife HG556a
- DEVICE_VARIANT := B
- DEVICE_DESCRIPTION = Build firmware images for Huawei HG556a version B (Atheros)
- CFE_BOARD_ID := HW556
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --rsa-signature "EchoLife_HG556a" --tag-version 8
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(ATH9K_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += huawei_echolife-hg556a-b
-
-define Device/huawei_echolife-hg556a-c
- $(Device/bcm63xx)
- DEVICE_VENDOR := Huawei
- DEVICE_MODEL := EchoLife HG556a
- DEVICE_VARIANT := C
- DEVICE_DESCRIPTION = Build firmware images for Huawei HG556a version C (Ralink)
- CFE_BOARD_ID := HW556
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --rsa-signature "EchoLife_HG556a" --tag-version 8
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(RT28_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += huawei_echolife-hg556a-c
-
-define Device/huawei_echolife-hg622
- $(Device/bcm63xx)
- DEVICE_VENDOR := Huawei
- DEVICE_MODEL := EchoLife HG622
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 96368MVWG_hg622
- CFE_CHIP_ID := 6368
- CFE_EXTRAS += --tag-version 7
- BLOCK_SIZE := 0x20000
- FLASH_MB := 16
- DEVICE_PACKAGES := $(RT28_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += huawei_echolife-hg622
-
-define Device/huawei_echolife-hg655b
- $(Device/bcm63xx)
- DEVICE_VENDOR := Huawei
- DEVICE_MODEL := EchoLife HG655b
- CFE_BOARD_ID := HW65x
- CFE_CHIP_ID := 6368
- CFE_EXTRAS += --tag-version 7
- IMAGE_OFFSET := 0x20000
- FLASH_MB := 8
- DEVICE_PACKAGES := $(RT28_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += huawei_echolife-hg655b
-
-### Inteno ###
-define Device/inteno_vg50
- $(Device/bcm63xx)
- DEVICE_VENDOR := Inteno
- DEVICE_MODEL := VG50 Multi-WAN CPE
- IMAGES :=
- CFE_BOARD_ID := VW6339GU
- CFE_CHIP_ID := 63268
- DEVICE_PACKAGES := $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += inteno_vg50
-
-### Inventel ###
-define Device/inventel_livebox-1
- $(Device/bcm63xx_redboot)
- DEVICE_VENDOR := Inventel
- DEVICE_MODEL := Livebox 1
- SOC := bcm6348
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB1_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += inventel_livebox-1
-
-### Netgear ###
-define Device/netgear_cvg834g
- $(Device/bcm33xx)
- DEVICE_VENDOR := NETGEAR
- DEVICE_MODEL := CVG834G
- SOC := bcm3368
- HCS_MAGIC_BYTES := 0xa020
- HCS_REV_MIN := 0001
- HCS_REV_MAJ := 0022
-endef
-TARGET_DEVICES += netgear_cvg834g
-
-define Device/netgear_dg834gt-pn
- $(Device/bcm63xx)
- DEVICE_VENDOR := NETGEAR
- DEVICE_MODEL := DG834GT
- DEVICE_ALT0_VENDOR := NETGEAR
- DEVICE_ALT0_MODEL := DG834PN
- CFE_BOARD_ID := 96348GW-10
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(ATH5K_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += netgear_dg834gt-pn
-
-define Device/netgear_dg834g-v4
- $(Device/bcm63xx)
- DEVICE_VENDOR := NETGEAR
- DEVICE_MODEL := DG834G
- DEVICE_VARIANT := v4
- IMAGES :=
- CFE_BOARD_ID := 96348W3
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += netgear_dg834g-v4
-
-define Device/netgear_dgnd3700-v1
- $(Device/bcm63xx_netgear)
- DEVICE_MODEL := DGND3700
- DEVICE_VARIANT := v1
- CFE_BOARD_ID := 96368MVWG
- CFE_CHIP_ID := 6368
- BLOCK_SIZE := 0x20000
- NETGEAR_BOARD_ID := U12L144T01_NETGEAR_NEWLED
- NETGEAR_REGION := 1
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += netgear_dgnd3700-v1
-
-define Device/netgear_dgnd3800b
- $(Device/bcm63xx_netgear)
- DEVICE_MODEL := DGND3800B
- DEVICE_DTS := bcm6368-netgear-dgnd3700-v1
- CFE_BOARD_ID := 96368MVWG
- CFE_CHIP_ID := 6368
- BLOCK_SIZE := 0x20000
- NETGEAR_BOARD_ID := U12L144T11_NETGEAR_NEWLED
- NETGEAR_REGION := 1
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += netgear_dgnd3800b
-
-define Device/netgear_evg2000
- $(Device/bcm63xx_netgear)
- DEVICE_MODEL := EVG2000
- CFE_BOARD_ID := 96369PVG
- CFE_CHIP_ID := 6368
- BLOCK_SIZE := 0x20000
- NETGEAR_BOARD_ID := U12H154T90_NETGEAR
- NETGEAR_REGION := 1
- SOC := bcm6369
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += netgear_evg2000
-
-### NuCom ###
-define Device/nucom_r5010un-v2
- $(Device/bcm63xx)
- DEVICE_VENDOR := NuCom
- DEVICE_MODEL := R5010UN
- DEVICE_VARIANT := v2
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 96328ang
- CFE_CHIP_ID := 6328
- FLASH_MB := 16
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += nucom_r5010un-v2
-
-### Observa ###
-define Device/observa_vh4032n
- $(Device/bcm63xx)
- DEVICE_VENDOR := Observa
- DEVICE_MODEL := VH4032N
- IMAGES += sysupgrade.bin
- CFE_BOARD_ID := 96368VVW
- CFE_CHIP_ID := 6368
- BLOCK_SIZE := 0x20000
- FLASH_MB := 32
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += observa_vh4032n
-
-### Pirelli ###
-define Device/pirelli_a226g
- $(Device/bcm63xx)
- DEVICE_VENDOR := Pirelli
- DEVICE_MODEL := A226G
- CFE_BOARD_ID := DWV-S0
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --signature2 IMAGE --tag-version 8
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += pirelli_a226g
-
-define Device/pirelli_a226m
- $(Device/bcm63xx)
- DEVICE_VENDOR := Pirelli
- DEVICE_MODEL := A226M
- CFE_BOARD_ID := DWV-S0
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --signature2 IMAGE --tag-version 8
- DEVICE_PACKAGES := $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += pirelli_a226m
-
-define Device/pirelli_a226m-fwb
- $(Device/bcm63xx)
- DEVICE_VENDOR := Pirelli
- DEVICE_MODEL := A226M-FWB
- CFE_BOARD_ID := DWV-S0
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --signature2 IMAGE --tag-version 8
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += pirelli_a226m-fwb
-
-define Device/pirelli_agpf-s0
- $(Device/bcm63xx)
- DEVICE_VENDOR := Pirelli
- DEVICE_MODEL := Alice Gate VoIP 2 Plus Wi-Fi AGPF-S0
- CFE_BOARD_ID := AGPF-S0
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --signature2 IMAGE --tag-version 8
- BLOCK_SIZE := 0x20000
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += pirelli_agpf-s0
-
-### Sagem ###
-define Device/sagem_fast-2404
- $(Device/bcm63xx)
- DEVICE_VENDOR := Sagemcom
- DEVICE_MODEL := F@st 2404
- CFE_BOARD_ID := F@ST2404
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += sagem_fast-2404
-
-define Device/sagem_fast-2504n
- $(Device/bcm63xx)
- DEVICE_VENDOR := Sagemcom
- DEVICE_MODEL := F@st 2504N
- CFE_BOARD_ID := F@ST2504n
- CFE_CHIP_ID := 6362
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += sagem_fast-2504n
-
-define Device/sagem_fast-2604
- $(Device/bcm63xx)
- DEVICE_VENDOR := Sagemcom
- DEVICE_MODEL := F@st 2604
- CFE_BOARD_ID := F@ST2604
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += sagem_fast-2604
-
-define Device/sagem_fast-2704n
- $(Device/bcm63xx)
- DEVICE_VENDOR := Sagemcom
- DEVICE_MODEL := F@st 2704N
- CFE_BOARD_ID := F@ST2704N
- CFE_CHIP_ID := 6318
- FLASH_MB := 8
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += sagem_fast-2704n
-
-define Device/sagem_fast-2704-v2
- $(Device/bcm63xx)
- DEVICE_VENDOR := Sagemcom
- DEVICE_MODEL := F@st 2704
- DEVICE_VARIANT := V2
- CFE_BOARD_ID := F@ST2704V2
- CFE_CHIP_ID := 6328
- FLASH_MB := 8
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += sagem_fast-2704-v2
-
-### Sercomm ###
-define Device/sercomm_ad1018-nor
- $(Device/bcm63xx)
- DEVICE_VENDOR := Sercomm
- DEVICE_MODEL := AD1018
- DEVICE_VARIANT := SPI flash mod
- CFE_BOARD_ID := 96328avngr
- CFE_CHIP_ID := 6328
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += sercomm_ad1018-nor
-
-### SFR ###
-define Device/sfr_neufbox-4-sercomm-r0
- $(Device/bcm63xx)
- DEVICE_VENDOR := SFR
- DEVICE_MODEL := Neufbox 4
- DEVICE_VARIANT := Sercomm
- CFE_BOARD_ID := 96358VW
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += sfr_neufbox-4-sercomm-r0
-
-define Device/sfr_neufbox-4-foxconn-r1
- $(Device/bcm63xx)
- DEVICE_VENDOR := SFR
- DEVICE_MODEL := Neufbox 4
- DEVICE_VARIANT := Foxconn
- CFE_BOARD_ID := 96358VW
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += sfr_neufbox-4-foxconn-r1
-
-define Device/sfr_neufbox-6-sercomm-r0
- $(Device/bcm63xx)
- DEVICE_VENDOR := SFR
- DEVICE_MODEL := Neufbox 6
- CFE_BOARD_ID := NB6-SER-r0
- CFE_CHIP_ID := 6362
- CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
- SOC := bcm6361
- DEVICE_PACKAGES := $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += sfr_neufbox-6-sercomm-r0
-
-define Device/sky_sr102
- $(Device/bcm63xx)
- DEVICE_VENDOR := SKY
- DEVICE_MODEL := SR102
- CFE_BOARD_ID := BSKYB_63168
- CFE_CHIP_ID := 63268
- CFE_EXTRAS += --rsa-signature "$(VERSION_DIST)-$(firstword $(subst -,$(space),$(REVISION)))"
- SOC := bcm63168
- DEVICE_PACKAGES := $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += sky_sr102
-
-### T-Com ###
-define Device/t-com_speedport-w-303v
- $(Device/bcm63xx)
- DEVICE_VENDOR := T-Com
- DEVICE_MODEL := Speedport W 303V
- IMAGES := factory.bin sysupgrade.bin
- IMAGE/factory.bin := cfe-spw303v-bin --pad 4 | spw303v-bin | xor-image
- IMAGE/sysupgrade.bin := cfe-spw303v-bin | spw303v-bin
- CFE_BOARD_ID := 96358-502V
- CFE_CHIP_ID := 6358
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += t-com_speedport-w-303v
-
-define Device/t-com_speedport-w-500v
- $(Device/bcm63xx)
- DEVICE_VENDOR := T-Com
- DEVICE_MODEL := Speedport W 500V
- CFE_BOARD_ID := 96348GW
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += t-com_speedport-w-500v
-
-### Tecom ###
-define Device/tecom_gw6000
- $(Device/bcm63xx)
- DEVICE_VENDOR := Tecom
- DEVICE_MODEL := GW6000
- CFE_BOARD_ID := 96348GW
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(BRCMWL_PACKAGES) $(USB1_PACKAGES)
-endef
-TARGET_DEVICES += tecom_gw6000
-
-define Device/tecom_gw6200
- $(Device/bcm63xx)
- DEVICE_VENDOR := Tecom
- DEVICE_MODEL := GW6200
- CFE_BOARD_ID := 96348GW
- CFE_CHIP_ID := 6348
- CFE_EXTRAS += --rsa-signature "$(shell printf '\x99')"
- DEVICE_PACKAGES := $(BRCMWL_PACKAGES) $(USB1_PACKAGES)
-endef
-TARGET_DEVICES += tecom_gw6200
-
-### Telsey ###
-define Device/telsey_cpva502plus
- $(Device/bcm63xx)
- DEVICE_VENDOR := Telsey
- DEVICE_MODEL := CPVA502+
- CFE_BOARD_ID := CPVA502+
- CFE_CHIP_ID := 6348
- CFE_EXTRAS += --signature "Telsey Tlc" --signature2 "99.99.999"
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += telsey_cpva502plus
-
-define Device/telsey_cpva642
- $(Device/bcm63xx)
- DEVICE_VENDOR := Telsey
- DEVICE_MODEL := CPVA642-type (CPA-ZNTE60T)
- CFE_BOARD_ID := CPVA642
- CFE_CHIP_ID := 6358
- CFE_EXTRAS += --signature "Telsey Tlc" --signature2 "99.99.999" --second-image-flag "0"
- FLASH_MB := 8
- DEVICE_PACKAGES := $(RT63_PACKAGES) $(USB2_PACKAGES)
-endef
-TARGET_DEVICES += telsey_cpva642
-
-define Device/telsey_magic
- $(Device/bcm63xx)
- DEVICE_VENDOR := Alice
- DEVICE_MODEL := W-Gate
- DEVICE_ALT0_VENDOR := Telsey
- DEVICE_ALT0_MODEL := MAGIC
- IMAGES :=
- CFE_BOARD_ID := MAGIC
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(RT63_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += telsey_magic
-
-### TP-Link ###
-define Device/tp-link_td-w8900gb
- $(Device/bcm63xx)
- DEVICE_VENDOR := TP-Link
- DEVICE_MODEL := TD-W8900GB
- CFE_BOARD_ID := 96348GW-11
- CFE_CHIP_ID := 6348
- CFE_EXTRAS += --rsa-signature "$(shell printf 'PRID\x89\x10\x00\x02')"
- IMAGE_OFFSET := 0x20000
- DEVICE_PACKAGES := $(B43_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += tp-link_td-w8900gb
-
-### USRobotics ###
-define Device/usrobotics_usr9108
- $(Device/bcm63xx)
- DEVICE_VENDOR := USRobotics
- DEVICE_MODEL := USR9108
- CFE_BOARD_ID := 96348GW-A
- CFE_CHIP_ID := 6348
- DEVICE_PACKAGES := $(B43_PACKAGES) $(USB1_PACKAGES)
- DEFAULT := n
-endef
-TARGET_DEVICES += usrobotics_usr9108
-
-### ZyXEL ###
-define Device/zyxel_p870hw-51a-v2
- $(Device/bcm63xx)
- DEVICE_VENDOR := ZyXEL
- DEVICE_MODEL := P870HW-51a
- DEVICE_VARIANT := v2
- IMAGES := factory.bin
- IMAGE/factory.bin := cfe-bin | zyxel-bin
- CFE_BOARD_ID := 96368VVW
- CFE_CHIP_ID := 6368
- CFE_EXTRAS += --rsa-signature "ZyXEL" --signature "ZyXEL_0001"
- DEVICE_PACKAGES := $(B43_PACKAGES)
-endef
-TARGET_DEVICES += zyxel_p870hw-51a-v2
+++ /dev/null
-#
-# Copyright (C) 2011 OpenWrt.org
-# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-include $(TOPDIR)/rules.mk
-
-LZMA_TEXT_START := 0x80a00000
-LOADER := loader.bin
-LOADER_NAME := $(basename $(notdir $(LOADER)))
-LOADER_DATA :=
-TARGET_DIR :=
-FLASH_OFFS :=
-FLASH_MAX :=
-
-ifeq ($(TARGET_DIR),)
-TARGET_DIR := $(KDIR)
-endif
-
-LOADER_BIN := $(TARGET_DIR)/$(LOADER_NAME).bin
-LOADER_GZ := $(TARGET_DIR)/$(LOADER_NAME).gz
-LOADER_ELF := $(TARGET_DIR)/$(LOADER_NAME).elf
-
-PKG_NAME := lzma-loader
-PKG_BUILD_DIR := $(KDIR)/$(PKG_NAME)
-
-.PHONY : loader-compile loader.bin loader.elf loader.gz
-
-$(PKG_BUILD_DIR)/.prepared:
- mkdir $(PKG_BUILD_DIR)
- $(CP) ./src/* $(PKG_BUILD_DIR)/
- touch $@
-
-loader-compile: $(PKG_BUILD_DIR)/.prepared
- $(MAKE) -C $(PKG_BUILD_DIR) CROSS_COMPILE="$(TARGET_CROSS)" \
- LZMA_TEXT_START=$(LZMA_TEXT_START) \
- LOADER_DATA=$(LOADER_DATA) \
- FLASH_OFFS=$(FLASH_OFFS) \
- FLASH_MAX=$(FLASH_MAX) \
- clean all
-
-loader.gz: $(PKG_BUILD_DIR)/loader.bin
- gzip -nc9 $< > $(LOADER_GZ)
-
-loader.elf: $(PKG_BUILD_DIR)/loader.elf
- $(CP) $< $(LOADER_ELF)
-
-loader.bin: $(PKG_BUILD_DIR)/loader.bin
- $(CP) $< $(LOADER_BIN)
-
-download:
-prepare: $(PKG_BUILD_DIR)/.prepared
-compile: loader-compile
-
-install:
-
-clean:
- rm -rf $(PKG_BUILD_DIR)
-
+++ /dev/null
-/*
- LzmaDecode.c
- LZMA Decoder (optimized for Speed version)
-
- LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this Code, expressly permits you to
- statically or dynamically link your Code (or bind by name) to the
- interfaces of this file without subjecting your linked Code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#include "LzmaDecode.h"
-
-#define kNumTopBits 24
-#define kTopValue ((UInt32)1 << kNumTopBits)
-
-#define kNumBitModelTotalBits 11
-#define kBitModelTotal (1 << kNumBitModelTotalBits)
-#define kNumMoveBits 5
-
-#define RC_READ_BYTE (*Buffer++)
-
-#define RC_INIT2 Code = 0; Range = 0xFFFFFFFF; \
- { int i; for(i = 0; i < 5; i++) { RC_TEST; Code = (Code << 8) | RC_READ_BYTE; }}
-
-#ifdef _LZMA_IN_CB
-
-#define RC_TEST { if (Buffer == BufferLim) \
- { SizeT size; int result = InCallback->Read(InCallback, &Buffer, &size); if (result != LZMA_RESULT_OK) return result; \
- BufferLim = Buffer + size; if (size == 0) return LZMA_RESULT_DATA_ERROR; }}
-
-#define RC_INIT Buffer = BufferLim = 0; RC_INIT2
-
-#else
-
-#define RC_TEST { if (Buffer == BufferLim) return LZMA_RESULT_DATA_ERROR; }
-
-#define RC_INIT(buffer, bufferSize) Buffer = buffer; BufferLim = buffer + bufferSize; RC_INIT2
-
-#endif
-
-#define RC_NORMALIZE if (Range < kTopValue) { RC_TEST; Range <<= 8; Code = (Code << 8) | RC_READ_BYTE; }
-
-#define IfBit0(p) RC_NORMALIZE; bound = (Range >> kNumBitModelTotalBits) * *(p); if (Code < bound)
-#define UpdateBit0(p) Range = bound; *(p) += (kBitModelTotal - *(p)) >> kNumMoveBits;
-#define UpdateBit1(p) Range -= bound; Code -= bound; *(p) -= (*(p)) >> kNumMoveBits;
-
-#define RC_GET_BIT2(p, mi, A0, A1) IfBit0(p) \
- { UpdateBit0(p); mi <<= 1; A0; } else \
- { UpdateBit1(p); mi = (mi + mi) + 1; A1; }
-
-#define RC_GET_BIT(p, mi) RC_GET_BIT2(p, mi, ; , ;)
-
-#define RangeDecoderBitTreeDecode(probs, numLevels, res) \
- { int i = numLevels; res = 1; \
- do { CProb *p = probs + res; RC_GET_BIT(p, res) } while(--i != 0); \
- res -= (1 << numLevels); }
-
-
-#define kNumPosBitsMax 4
-#define kNumPosStatesMax (1 << kNumPosBitsMax)
-
-#define kLenNumLowBits 3
-#define kLenNumLowSymbols (1 << kLenNumLowBits)
-#define kLenNumMidBits 3
-#define kLenNumMidSymbols (1 << kLenNumMidBits)
-#define kLenNumHighBits 8
-#define kLenNumHighSymbols (1 << kLenNumHighBits)
-
-#define LenChoice 0
-#define LenChoice2 (LenChoice + 1)
-#define LenLow (LenChoice2 + 1)
-#define LenMid (LenLow + (kNumPosStatesMax << kLenNumLowBits))
-#define LenHigh (LenMid + (kNumPosStatesMax << kLenNumMidBits))
-#define kNumLenProbs (LenHigh + kLenNumHighSymbols)
-
-
-#define kNumStates 12
-#define kNumLitStates 7
-
-#define kStartPosModelIndex 4
-#define kEndPosModelIndex 14
-#define kNumFullDistances (1 << (kEndPosModelIndex >> 1))
-
-#define kNumPosSlotBits 6
-#define kNumLenToPosStates 4
-
-#define kNumAlignBits 4
-#define kAlignTableSize (1 << kNumAlignBits)
-
-#define kMatchMinLen 2
-
-#define IsMatch 0
-#define IsRep (IsMatch + (kNumStates << kNumPosBitsMax))
-#define IsRepG0 (IsRep + kNumStates)
-#define IsRepG1 (IsRepG0 + kNumStates)
-#define IsRepG2 (IsRepG1 + kNumStates)
-#define IsRep0Long (IsRepG2 + kNumStates)
-#define PosSlot (IsRep0Long + (kNumStates << kNumPosBitsMax))
-#define SpecPos (PosSlot + (kNumLenToPosStates << kNumPosSlotBits))
-#define Align (SpecPos + kNumFullDistances - kEndPosModelIndex)
-#define LenCoder (Align + kAlignTableSize)
-#define RepLenCoder (LenCoder + kNumLenProbs)
-#define Literal (RepLenCoder + kNumLenProbs)
-
-#if Literal != LZMA_BASE_SIZE
-StopCompilingDueBUG
-#endif
-
-int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size)
-{
- unsigned char prop0;
- if (size < LZMA_PROPERTIES_SIZE)
- return LZMA_RESULT_DATA_ERROR;
- prop0 = propsData[0];
- if (prop0 >= (9 * 5 * 5))
- return LZMA_RESULT_DATA_ERROR;
- {
- for (propsRes->pb = 0; prop0 >= (9 * 5); propsRes->pb++, prop0 -= (9 * 5));
- for (propsRes->lp = 0; prop0 >= 9; propsRes->lp++, prop0 -= 9);
- propsRes->lc = prop0;
- /*
- unsigned char remainder = (unsigned char)(prop0 / 9);
- propsRes->lc = prop0 % 9;
- propsRes->pb = remainder / 5;
- propsRes->lp = remainder % 5;
- */
- }
-
- #ifdef _LZMA_OUT_READ
- {
- int i;
- propsRes->DictionarySize = 0;
- for (i = 0; i < 4; i++)
- propsRes->DictionarySize += (UInt32)(propsData[1 + i]) << (i * 8);
- if (propsRes->DictionarySize == 0)
- propsRes->DictionarySize = 1;
- }
- #endif
- return LZMA_RESULT_OK;
-}
-
-#define kLzmaStreamWasFinishedId (-1)
-
-int LzmaDecode(CLzmaDecoderState *vs,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *InCallback,
- #else
- const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
- #endif
- unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed)
-{
- CProb *p = vs->Probs;
- SizeT nowPos = 0;
- Byte previousByte = 0;
- UInt32 posStateMask = (1 << (vs->Properties.pb)) - 1;
- UInt32 literalPosMask = (1 << (vs->Properties.lp)) - 1;
- int lc = vs->Properties.lc;
-
- #ifdef _LZMA_OUT_READ
-
- UInt32 Range = vs->Range;
- UInt32 Code = vs->Code;
- #ifdef _LZMA_IN_CB
- const Byte *Buffer = vs->Buffer;
- const Byte *BufferLim = vs->BufferLim;
- #else
- const Byte *Buffer = inStream;
- const Byte *BufferLim = inStream + inSize;
- #endif
- int state = vs->State;
- UInt32 rep0 = vs->Reps[0], rep1 = vs->Reps[1], rep2 = vs->Reps[2], rep3 = vs->Reps[3];
- int len = vs->RemainLen;
- UInt32 globalPos = vs->GlobalPos;
- UInt32 distanceLimit = vs->DistanceLimit;
-
- Byte *dictionary = vs->Dictionary;
- UInt32 dictionarySize = vs->Properties.DictionarySize;
- UInt32 dictionaryPos = vs->DictionaryPos;
-
- Byte tempDictionary[4];
-
- #ifndef _LZMA_IN_CB
- *inSizeProcessed = 0;
- #endif
- *outSizeProcessed = 0;
- if (len == kLzmaStreamWasFinishedId)
- return LZMA_RESULT_OK;
-
- if (dictionarySize == 0)
- {
- dictionary = tempDictionary;
- dictionarySize = 1;
- tempDictionary[0] = vs->TempDictionary[0];
- }
-
- if (len == kLzmaNeedInitId)
- {
- {
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
- UInt32 i;
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- rep0 = rep1 = rep2 = rep3 = 1;
- state = 0;
- globalPos = 0;
- distanceLimit = 0;
- dictionaryPos = 0;
- dictionary[dictionarySize - 1] = 0;
- #ifdef _LZMA_IN_CB
- RC_INIT;
- #else
- RC_INIT(inStream, inSize);
- #endif
- }
- len = 0;
- }
- while(len != 0 && nowPos < outSize)
- {
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- outStream[nowPos++] = dictionary[dictionaryPos] = dictionary[pos];
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- len--;
- }
- if (dictionaryPos == 0)
- previousByte = dictionary[dictionarySize - 1];
- else
- previousByte = dictionary[dictionaryPos - 1];
-
- #else /* if !_LZMA_OUT_READ */
-
- int state = 0;
- UInt32 rep0 = 1, rep1 = 1, rep2 = 1, rep3 = 1;
- int len = 0;
- const Byte *Buffer;
- const Byte *BufferLim;
- UInt32 Range;
- UInt32 Code;
-
- #ifndef _LZMA_IN_CB
- *inSizeProcessed = 0;
- #endif
- *outSizeProcessed = 0;
-
- {
- UInt32 i;
- UInt32 numProbs = Literal + ((UInt32)LZMA_LIT_SIZE << (lc + vs->Properties.lp));
- for (i = 0; i < numProbs; i++)
- p[i] = kBitModelTotal >> 1;
- }
-
- #ifdef _LZMA_IN_CB
- RC_INIT;
- #else
- RC_INIT(inStream, inSize);
- #endif
-
- #endif /* _LZMA_OUT_READ */
-
- while(nowPos < outSize)
- {
- CProb *prob;
- UInt32 bound;
- int posState = (int)(
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & posStateMask);
-
- prob = p + IsMatch + (state << kNumPosBitsMax) + posState;
- IfBit0(prob)
- {
- int symbol = 1;
- UpdateBit0(prob)
- prob = p + Literal + (LZMA_LIT_SIZE *
- (((
- (nowPos
- #ifdef _LZMA_OUT_READ
- + globalPos
- #endif
- )
- & literalPosMask) << lc) + (previousByte >> (8 - lc))));
-
- if (state >= kNumLitStates)
- {
- int matchByte;
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- matchByte = dictionary[pos];
- #else
- matchByte = outStream[nowPos - rep0];
- #endif
- do
- {
- int bit;
- CProb *probLit;
- matchByte <<= 1;
- bit = (matchByte & 0x100);
- probLit = prob + 0x100 + bit + symbol;
- RC_GET_BIT2(probLit, symbol, if (bit != 0) break, if (bit == 0) break)
- }
- while (symbol < 0x100);
- }
- while (symbol < 0x100)
- {
- CProb *probLit = prob + symbol;
- RC_GET_BIT(probLit, symbol)
- }
- previousByte = (Byte)symbol;
-
- outStream[nowPos++] = previousByte;
- #ifdef _LZMA_OUT_READ
- if (distanceLimit < dictionarySize)
- distanceLimit++;
-
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #endif
- if (state < 4) state = 0;
- else if (state < 10) state -= 3;
- else state -= 6;
- }
- else
- {
- UpdateBit1(prob);
- prob = p + IsRep + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- rep3 = rep2;
- rep2 = rep1;
- rep1 = rep0;
- state = state < kNumLitStates ? 0 : 3;
- prob = p + LenCoder;
- }
- else
- {
- UpdateBit1(prob);
- prob = p + IsRepG0 + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- prob = p + IsRep0Long + (state << kNumPosBitsMax) + posState;
- IfBit0(prob)
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos;
- #endif
- UpdateBit0(prob);
-
- #ifdef _LZMA_OUT_READ
- if (distanceLimit == 0)
- #else
- if (nowPos == 0)
- #endif
- return LZMA_RESULT_DATA_ERROR;
-
- state = state < kNumLitStates ? 9 : 11;
- #ifdef _LZMA_OUT_READ
- pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- outStream[nowPos++] = previousByte;
- #ifdef _LZMA_OUT_READ
- if (distanceLimit < dictionarySize)
- distanceLimit++;
- #endif
-
- continue;
- }
- else
- {
- UpdateBit1(prob);
- }
- }
- else
- {
- UInt32 distance;
- UpdateBit1(prob);
- prob = p + IsRepG1 + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- distance = rep1;
- }
- else
- {
- UpdateBit1(prob);
- prob = p + IsRepG2 + state;
- IfBit0(prob)
- {
- UpdateBit0(prob);
- distance = rep2;
- }
- else
- {
- UpdateBit1(prob);
- distance = rep3;
- rep3 = rep2;
- }
- rep2 = rep1;
- }
- rep1 = rep0;
- rep0 = distance;
- }
- state = state < kNumLitStates ? 8 : 11;
- prob = p + RepLenCoder;
- }
- {
- int numBits, offset;
- CProb *probLen = prob + LenChoice;
- IfBit0(probLen)
- {
- UpdateBit0(probLen);
- probLen = prob + LenLow + (posState << kLenNumLowBits);
- offset = 0;
- numBits = kLenNumLowBits;
- }
- else
- {
- UpdateBit1(probLen);
- probLen = prob + LenChoice2;
- IfBit0(probLen)
- {
- UpdateBit0(probLen);
- probLen = prob + LenMid + (posState << kLenNumMidBits);
- offset = kLenNumLowSymbols;
- numBits = kLenNumMidBits;
- }
- else
- {
- UpdateBit1(probLen);
- probLen = prob + LenHigh;
- offset = kLenNumLowSymbols + kLenNumMidSymbols;
- numBits = kLenNumHighBits;
- }
- }
- RangeDecoderBitTreeDecode(probLen, numBits, len);
- len += offset;
- }
-
- if (state < 4)
- {
- int posSlot;
- state += kNumLitStates;
- prob = p + PosSlot +
- ((len < kNumLenToPosStates ? len : kNumLenToPosStates - 1) <<
- kNumPosSlotBits);
- RangeDecoderBitTreeDecode(prob, kNumPosSlotBits, posSlot);
- if (posSlot >= kStartPosModelIndex)
- {
- int numDirectBits = ((posSlot >> 1) - 1);
- rep0 = (2 | ((UInt32)posSlot & 1));
- if (posSlot < kEndPosModelIndex)
- {
- rep0 <<= numDirectBits;
- prob = p + SpecPos + rep0 - posSlot - 1;
- }
- else
- {
- numDirectBits -= kNumAlignBits;
- do
- {
- RC_NORMALIZE
- Range >>= 1;
- rep0 <<= 1;
- if (Code >= Range)
- {
- Code -= Range;
- rep0 |= 1;
- }
- }
- while (--numDirectBits != 0);
- prob = p + Align;
- rep0 <<= kNumAlignBits;
- numDirectBits = kNumAlignBits;
- }
- {
- int i = 1;
- int mi = 1;
- do
- {
- CProb *prob3 = prob + mi;
- RC_GET_BIT2(prob3, mi, ; , rep0 |= i);
- i <<= 1;
- }
- while(--numDirectBits != 0);
- }
- }
- else
- rep0 = posSlot;
- if (++rep0 == (UInt32)(0))
- {
- /* it's for stream version */
- len = kLzmaStreamWasFinishedId;
- break;
- }
- }
-
- len += kMatchMinLen;
- #ifdef _LZMA_OUT_READ
- if (rep0 > distanceLimit)
- #else
- if (rep0 > nowPos)
- #endif
- return LZMA_RESULT_DATA_ERROR;
-
- #ifdef _LZMA_OUT_READ
- if (dictionarySize - distanceLimit > (UInt32)len)
- distanceLimit += len;
- else
- distanceLimit = dictionarySize;
- #endif
-
- do
- {
- #ifdef _LZMA_OUT_READ
- UInt32 pos = dictionaryPos - rep0;
- if (pos >= dictionarySize)
- pos += dictionarySize;
- previousByte = dictionary[pos];
- dictionary[dictionaryPos] = previousByte;
- if (++dictionaryPos == dictionarySize)
- dictionaryPos = 0;
- #else
- previousByte = outStream[nowPos - rep0];
- #endif
- len--;
- outStream[nowPos++] = previousByte;
- }
- while(len != 0 && nowPos < outSize);
- }
- }
- RC_NORMALIZE;
-
- #ifdef _LZMA_OUT_READ
- vs->Range = Range;
- vs->Code = Code;
- vs->DictionaryPos = dictionaryPos;
- vs->GlobalPos = globalPos + (UInt32)nowPos;
- vs->DistanceLimit = distanceLimit;
- vs->Reps[0] = rep0;
- vs->Reps[1] = rep1;
- vs->Reps[2] = rep2;
- vs->Reps[3] = rep3;
- vs->State = state;
- vs->RemainLen = len;
- vs->TempDictionary[0] = tempDictionary[0];
- #endif
-
- #ifdef _LZMA_IN_CB
- vs->Buffer = Buffer;
- vs->BufferLim = BufferLim;
- #else
- *inSizeProcessed = (SizeT)(Buffer - inStream);
- #endif
- *outSizeProcessed = nowPos;
- return LZMA_RESULT_OK;
-}
+++ /dev/null
-/*
- LzmaDecode.h
- LZMA Decoder interface
-
- LZMA SDK 4.40 Copyright (c) 1999-2006 Igor Pavlov (2006-05-01)
- http://www.7-zip.org/
-
- LZMA SDK is licensed under two licenses:
- 1) GNU Lesser General Public License (GNU LGPL)
- 2) Common Public License (CPL)
- It means that you can select one of these two licenses and
- follow rules of that license.
-
- SPECIAL EXCEPTION:
- Igor Pavlov, as the author of this code, expressly permits you to
- statically or dynamically link your code (or bind by name) to the
- interfaces of this file without subjecting your linked code to the
- terms of the CPL or GNU LGPL. Any modifications or additions
- to this file, however, are subject to the LGPL or CPL terms.
-*/
-
-#ifndef __LZMADECODE_H
-#define __LZMADECODE_H
-
-#include "LzmaTypes.h"
-
-/* #define _LZMA_IN_CB */
-/* Use callback for input data */
-
-/* #define _LZMA_OUT_READ */
-/* Use read function for output data */
-
-/* #define _LZMA_PROB32 */
-/* It can increase speed on some 32-bit CPUs,
- but memory usage will be doubled in that case */
-
-/* #define _LZMA_LOC_OPT */
-/* Enable local speed optimizations inside code */
-
-#ifdef _LZMA_PROB32
-#define CProb UInt32
-#else
-#define CProb UInt16
-#endif
-
-#define LZMA_RESULT_OK 0
-#define LZMA_RESULT_DATA_ERROR 1
-
-#ifdef _LZMA_IN_CB
-typedef struct _ILzmaInCallback
-{
- int (*Read)(void *object, const unsigned char **buffer, SizeT *bufferSize);
-} ILzmaInCallback;
-#endif
-
-#define LZMA_BASE_SIZE 1846
-#define LZMA_LIT_SIZE 768
-
-#define LZMA_PROPERTIES_SIZE 5
-
-typedef struct _CLzmaProperties
-{
- int lc;
- int lp;
- int pb;
- #ifdef _LZMA_OUT_READ
- UInt32 DictionarySize;
- #endif
-}CLzmaProperties;
-
-int LzmaDecodeProperties(CLzmaProperties *propsRes, const unsigned char *propsData, int size);
-
-#define LzmaGetNumProbs(Properties) (LZMA_BASE_SIZE + (LZMA_LIT_SIZE << ((Properties)->lc + (Properties)->lp)))
-
-#define kLzmaNeedInitId (-2)
-
-typedef struct _CLzmaDecoderState
-{
- CLzmaProperties Properties;
- CProb *Probs;
-
- #ifdef _LZMA_IN_CB
- const unsigned char *Buffer;
- const unsigned char *BufferLim;
- #endif
-
- #ifdef _LZMA_OUT_READ
- unsigned char *Dictionary;
- UInt32 Range;
- UInt32 Code;
- UInt32 DictionaryPos;
- UInt32 GlobalPos;
- UInt32 DistanceLimit;
- UInt32 Reps[4];
- int State;
- int RemainLen;
- unsigned char TempDictionary[4];
- #endif
-} CLzmaDecoderState;
-
-#ifdef _LZMA_OUT_READ
-#define LzmaDecoderInit(vs) { (vs)->RemainLen = kLzmaNeedInitId; }
-#endif
-
-int LzmaDecode(CLzmaDecoderState *vs,
- #ifdef _LZMA_IN_CB
- ILzmaInCallback *inCallback,
- #else
- const unsigned char *inStream, SizeT inSize, SizeT *inSizeProcessed,
- #endif
- unsigned char *outStream, SizeT outSize, SizeT *outSizeProcessed);
-
-#endif
+++ /dev/null
-/*
-LzmaTypes.h
-
-Types for LZMA Decoder
-
-This file written and distributed to public domain by Igor Pavlov.
-This file is part of LZMA SDK 4.40 (2006-05-01)
-*/
-
-#ifndef __LZMATYPES_H
-#define __LZMATYPES_H
-
-#ifndef _7ZIP_BYTE_DEFINED
-#define _7ZIP_BYTE_DEFINED
-typedef unsigned char Byte;
-#endif
-
-#ifndef _7ZIP_UINT16_DEFINED
-#define _7ZIP_UINT16_DEFINED
-typedef unsigned short UInt16;
-#endif
-
-#ifndef _7ZIP_UINT32_DEFINED
-#define _7ZIP_UINT32_DEFINED
-#ifdef _LZMA_UINT32_IS_ULONG
-typedef unsigned long UInt32;
-#else
-typedef unsigned int UInt32;
-#endif
-#endif
-
-/* #define _LZMA_NO_SYSTEM_SIZE_T */
-/* You can use it, if you don't want <stddef.h> */
-
-#ifndef _7ZIP_SIZET_DEFINED
-#define _7ZIP_SIZET_DEFINED
-#ifdef _LZMA_NO_SYSTEM_SIZE_T
-typedef UInt32 SizeT;
-#else
-#include <stddef.h>
-typedef size_t SizeT;
-#endif
-#endif
-
-#endif
+++ /dev/null
-#
-# Makefile for the LZMA compressed kernel loader for
-# Atheros AR7XXX/AR9XXX based boards
-#
-# Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
-#
-# Some parts of this file was based on the OpenWrt specific lzma-loader
-# for the BCM47xx and ADM5120 based boards:
-# Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
-# Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
-# Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
-#
-# This program is free software; you can redistribute it and/or modify it
-# under the terms of the GNU General Public License version 2 as published
-# by the Free Software Foundation.
-#
-
-LOADADDR :=
-LZMA_TEXT_START := 0x80a00000
-LOADER_DATA :=
-
-CC := $(CROSS_COMPILE)gcc
-LD := $(CROSS_COMPILE)ld
-OBJCOPY := $(CROSS_COMPILE)objcopy
-OBJDUMP := $(CROSS_COMPILE)objdump
-
-BIN_FLAGS := -O binary -R .reginfo -R .note -R .comment -R .mdebug \
- -R .MIPS.abiflags -S
-
-CFLAGS = -D__KERNEL__ -Wall -Wstrict-prototypes -Wno-trigraphs -Os \
- -fno-strict-aliasing -fno-common -fomit-frame-pointer -G 0 \
- -mno-abicalls -fno-pic -ffunction-sections -pipe \
- -ffreestanding -fhonour-copts \
- -mabi=32 -march=mips32 \
- -Wa,-32 -Wa,-march=mips32 -Wa,-mips32 -Wa,--trap
-CFLAGS += -D_LZMA_PROB32
-
-ASFLAGS = $(CFLAGS) -D__ASSEMBLY__
-
-LDFLAGS = -static --gc-sections -no-warn-mismatch
-LDFLAGS += -e startup -T loader.lds -Ttext $(LZMA_TEXT_START)
-
-O_FORMAT = $(shell $(OBJDUMP) -i | head -2 | grep elf32)
-
-OBJECTS := head.o loader.o cache.o board.o printf.o LzmaDecode.o
-
-ifneq ($(strip $(LOADER_DATA)),)
-OBJECTS += data.o
-CFLAGS += -DLZMA_WRAPPER=1 -DLOADADDR=$(LOADADDR)
-endif
-
-
-all: loader.elf
-
-# Don't build dependencies, this may die if $(CC) isn't gcc
-dep:
-
-install:
-
-%.o : %.c
- $(CC) $(CFLAGS) -c -o $@ $<
-
-%.o : %.S
- $(CC) $(ASFLAGS) -c -o $@ $<
-
-data.o: $(LOADER_DATA)
- $(LD) -r -b binary --oformat $(O_FORMAT) -T lzma-data.lds -o $@ $<
-
-loader: $(OBJECTS)
- $(LD) $(LDFLAGS) -o $@ $(OBJECTS)
-
-loader.bin: loader
- $(OBJCOPY) $(BIN_FLAGS) $< $@
-
-loader2.o: loader.bin
- $(LD) -r -b binary --oformat $(O_FORMAT) -o $@ $<
-
-loader.elf: loader2.o
- $(LD) -e startup -T loader2.lds -Ttext $(LOADADDR) -o $@ $<
-
-mrproper: clean
-
-clean:
- rm -f loader *.elf *.bin *.o
-
-
-
+++ /dev/null
-/*
- * BCM63XX specific implementation parts
- *
- * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include "config.h"
-#include "cp0regdef.h"
-
-#define READREG(r) *(volatile unsigned int *)(r)
-#define WRITEREG(r,v) *(volatile unsigned int *)(r) = v
-
-#define UART_IR_REG 0x10
-#define UART_FIFO_REG 0x14
-
-unsigned long uart_base;
-
-static void wait_xfered(void)
-{
- unsigned int val;
-
- do {
- val = READREG(uart_base + UART_IR_REG);
- if (val & (1 << 5))
- break;
- } while (1);
-}
-
-void board_putc(int ch)
-{
- if (!uart_base)
- return;
-
- wait_xfered();
- WRITEREG(uart_base + UART_FIFO_REG, ch);
- wait_xfered();
-}
-
-#define PRID_IMP_BMIPS32_REV4 0x4000
-#define PRID_IMP_BMIPS32_REV8 0x8000
-#define PRID_IMP_BMIPS3300 0x9000
-#define PRID_IMP_BMIPS3300_ALT 0x9100
-#define PRID_IMP_BMIPS3300_BUG 0x0000
-#define PRID_IMP_BMIPS43XX 0xa000
-
-void board_init(void)
-{
- unsigned long prid, chipid, chipid_reg;
-
- prid = read_32bit_c0_register($15, 0);
-
- switch (prid & 0xff00) {
- case PRID_IMP_BMIPS32_REV4:
- case PRID_IMP_BMIPS32_REV8:
- case PRID_IMP_BMIPS3300_ALT:
- case PRID_IMP_BMIPS3300_BUG:
- chipid_reg = 0xfffe0000;
- break;
- case PRID_IMP_BMIPS3300:
- if ((prid & 0xff) >= 0x33)
- chipid_reg = 0xb0000000;
- else
- chipid_reg = 0xfffe0000;
- break;
- case PRID_IMP_BMIPS43XX:
- if ((prid & 0xff) == 0x04)
- chipid_reg = 0xfff8c000;
- else if ((prid & 0xff) == 0x70)
- return; /* FIXME: 0002a070 can be 6362 and 3380 */
- else if ((prid & 0xff) >= 0x30)
- chipid_reg = 0xb0000000;
- else
- chipid_reg = 0xfffe0000;
- break;
- default:
- return;
- }
-
- chipid = READREG(chipid_reg);
-
- switch (chipid >> 16) {
- case 0x3368:
- case 0x6318:
- case 0x6328:
- case 0x6358:
- case 0x6362:
- case 0x6368:
- case 0x6369:
- uart_base = chipid_reg + 0x100;
- break;
- case 0x6316:
- case 0x6326:
- uart_base = chipid_reg + 0x180;
- break;
- case 0x3380:
- uart_base = chipid_reg + 0x200;
- break;
- case 0x6338:
- case 0x6345:
- case 0x6348:
- uart_base = chipid_reg + 0x300;
- break;
- default:
- return;
- }
-}
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * The cache manipulation routine has been taken from the U-Boot project.
- * (C) Copyright 2003
- * Wolfgang Denk, DENX Software Engineering, <wd@denx.de>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-
-#include "cache.h"
-#include "cacheops.h"
-#include "config.h"
-#include "printf.h"
-
-#define cache_op(op,addr) \
- __asm__ __volatile__( \
- " .set push \n" \
- " .set noreorder \n" \
- " .set mips3\n\t \n" \
- " cache %0, %1 \n" \
- " .set pop \n" \
- : \
- : "i" (op), "R" (*(unsigned char *)(addr)))
-
-void flush_cache(unsigned long start_addr, unsigned long size)
-{
- unsigned long lsize = CONFIG_CACHELINE_SIZE;
- unsigned long addr = start_addr & ~(lsize - 1);
- unsigned long aend = (start_addr + size + (lsize - 1)) & ~(lsize - 1);
-
- printf("blasting from 0x%08x to 0x%08x (0x%08x - 0x%08x)\n", start_addr, size, addr, aend);
-
- while (1) {
- cache_op(Hit_Writeback_Inv_D, addr);
- cache_op(Hit_Invalidate_I, addr);
- if (addr == aend)
- break;
- addr += lsize;
- }
-}
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-
-#ifndef __CACHE_H
-#define __CACHE_H
-
-void flush_cache(unsigned long start_addr, unsigned long size);
-
-#endif /* __CACHE_H */
+++ /dev/null
-/*
- * Cache operations for the cache instruction.
- *
- * This file is subject to the terms and conditions of the GNU General Public
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
- * (C) Copyright 1996, 97, 99, 2002, 03 Ralf Baechle
- * (C) Copyright 1999 Silicon Graphics, Inc.
- */
-#ifndef __ASM_CACHEOPS_H
-#define __ASM_CACHEOPS_H
-
-/*
- * Cache Operations available on all MIPS processors with R4000-style caches
- */
-#define Index_Invalidate_I 0x00
-#define Index_Writeback_Inv_D 0x01
-#define Index_Load_Tag_I 0x04
-#define Index_Load_Tag_D 0x05
-#define Index_Store_Tag_I 0x08
-#define Index_Store_Tag_D 0x09
-#if defined(CONFIG_CPU_LOONGSON2)
-#define Hit_Invalidate_I 0x00
-#else
-#define Hit_Invalidate_I 0x10
-#endif
-#define Hit_Invalidate_D 0x11
-#define Hit_Writeback_Inv_D 0x15
-
-/*
- * R4000-specific cacheops
- */
-#define Create_Dirty_Excl_D 0x0d
-#define Fill 0x14
-#define Hit_Writeback_I 0x18
-#define Hit_Writeback_D 0x19
-
-/*
- * R4000SC and R4400SC-specific cacheops
- */
-#define Index_Invalidate_SI 0x02
-#define Index_Writeback_Inv_SD 0x03
-#define Index_Load_Tag_SI 0x06
-#define Index_Load_Tag_SD 0x07
-#define Index_Store_Tag_SI 0x0A
-#define Index_Store_Tag_SD 0x0B
-#define Create_Dirty_Excl_SD 0x0f
-#define Hit_Invalidate_SI 0x12
-#define Hit_Invalidate_SD 0x13
-#define Hit_Writeback_Inv_SD 0x17
-#define Hit_Writeback_SD 0x1b
-#define Hit_Set_Virtual_SI 0x1e
-#define Hit_Set_Virtual_SD 0x1f
-
-/*
- * R5000-specific cacheops
- */
-#define R5K_Page_Invalidate_S 0x17
-
-/*
- * RM7000-specific cacheops
- */
-#define Page_Invalidate_T 0x16
-
-/*
- * R10000-specific cacheops
- *
- * Cacheops 0x02, 0x06, 0x0a, 0x0c-0x0e, 0x16, 0x1a and 0x1e are unused.
- * Most of the _S cacheops are identical to the R4000SC _SD cacheops.
- */
-#define Index_Writeback_Inv_S 0x03
-#define Index_Load_Tag_S 0x07
-#define Index_Store_Tag_S 0x0B
-#define Hit_Invalidate_S 0x13
-#define Cache_Barrier 0x14
-#define Hit_Writeback_Inv_S 0x17
-#define Index_Load_Data_I 0x18
-#define Index_Load_Data_D 0x19
-#define Index_Load_Data_S 0x1b
-#define Index_Store_Data_I 0x1c
-#define Index_Store_Data_D 0x1d
-#define Index_Store_Data_S 0x1f
-
-#endif /* __ASM_CACHEOPS_H */
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- *
- */
-
-#ifndef _CONFIG_H_
-#define _CONFIG_H_
-
-#define CONFIG_ICACHE_SIZE (32 * 1024)
-#define CONFIG_DCACHE_SIZE (32 * 1024)
-#define CONFIG_CACHELINE_SIZE 16
-
-#ifndef CONFIG_FLASH_OFFS
-#define CONFIG_FLASH_OFFS 0
-#endif
-
-#ifndef CONFIG_FLASH_MAX
-#define CONFIG_FLASH_MAX 0
-#endif
-
-#ifndef CONFIG_FLASH_STEP
-#define CONFIG_FLASH_STEP 0x1000
-#endif
-
-#endif /* _CONFIG_H_ */
+++ /dev/null
-/*
- * Copyright (C) 1994, 1995, 1996, 1997, 2000, 2001 by Ralf Baechle
- *
- * Copyright (C) 2001, Monta Vista Software
- * Author: jsun@mvista.com or jsun@junsun.net
- */
-#ifndef _cp0regdef_h_
-#define _cp0regdef_h_
-
-#define CP0_INDEX $0
-#define CP0_RANDOM $1
-#define CP0_ENTRYLO0 $2
-#define CP0_ENTRYLO1 $3
-#define CP0_CONTEXT $4
-#define CP0_PAGEMASK $5
-#define CP0_WIRED $6
-#define CP0_BADVADDR $8
-#define CP0_COUNT $9
-#define CP0_ENTRYHI $10
-#define CP0_COMPARE $11
-#define CP0_STATUS $12
-#define CP0_CAUSE $13
-#define CP0_EPC $14
-#define CP0_PRID $15
-#define CP0_CONFIG $16
-#define CP0_LLADDR $17
-#define CP0_WATCHLO $18
-#define CP0_WATCHHI $19
-#define CP0_XCONTEXT $20
-#define CP0_FRAMEMASK $21
-#define CP0_DIAGNOSTIC $22
-#define CP0_PERFORMANCE $25
-#define CP0_ECC $26
-#define CP0_CACHEERR $27
-#define CP0_TAGLO $28
-#define CP0_TAGHI $29
-#define CP0_ERROREPC $30
-
-#define read_32bit_c0_register(reg,sel) \
-({ int __res; \
- if (sel == 0) \
- __asm__ __volatile__( \
- "mfc0\t%0, " #reg "\n\t" \
- : "=r" (__res)); \
- else \
- __asm__ __volatile__( \
- ".set\tmips32\n\t" \
- "mfc0\t%0, " #reg ", " #sel "\n\t" \
- ".set mips0\n\t" \
- : "=r" (__res)); \
- __res; \
-})
-
-#endif
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * Some parts of this code was based on the OpenWrt specific lzma-loader
- * for the BCM47xx and ADM5120 based boards:
- * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <asm/asm.h>
-#include <asm/regdef.h>
-#include "cp0regdef.h"
-#include "cacheops.h"
-#include "config.h"
-
-#define KSEG0 0x80000000
-
- .macro ehb
- sll zero, 3
- .endm
-
- .text
-
-LEAF(startup)
- .set noreorder
- .set mips32
-
- mtc0 zero, CP0_WATCHLO # clear watch registers
- mtc0 zero, CP0_WATCHHI
- mtc0 zero, CP0_CAUSE # clear before writing status register
-
- mfc0 t0, CP0_STATUS
- li t1, 0x1000001f
- or t0, t1
- xori t0, 0x1f
- mtc0 t0, CP0_STATUS
- ehb
-
- mtc0 zero, CP0_COUNT
- mtc0 zero, CP0_COMPARE
- ehb
-
- la t0, __reloc_label # get linked address of label
- bal __reloc_label # branch and link to label to
- nop # get actual address
-__reloc_label:
- subu t0, ra, t0 # get reloc_delta
-
- beqz t0, __reloc_done # if delta is 0 we are in the right place
- nop
-
- /* Copy our code to the right place */
- la t1, _code_start # get linked address of _code_start
- la t2, _code_end # get linked address of _code_end
- addu t0, t0, t1 # calculate actual address of _code_start
-
-__reloc_copy:
- lw t3, 0(t0)
- sw t3, 0(t1)
- add t1, 4
- blt t1, t2, __reloc_copy
- add t0, 4
-
- /* flush cache */
- la t0, _code_start
- la t1, _code_end
-
- li t2, ~(CONFIG_CACHELINE_SIZE - 1)
- and t0, t2
- and t1, t2
- li t2, CONFIG_CACHELINE_SIZE
-
- b __flush_check
- nop
-
-__flush_line:
- cache Hit_Writeback_Inv_D, 0(t0)
- cache Hit_Invalidate_I, 0(t0)
- add t0, t2
-
-__flush_check:
- bne t0, t1, __flush_line
- nop
-
- sync
-
-__reloc_done:
-
- /* clear bss */
- la t0, _bss_start
- la t1, _bss_end
- b __bss_check
- nop
-
-__bss_fill:
- sw zero, 0(t0)
- addi t0, 4
-
-__bss_check:
- bne t0, t1, __bss_fill
- nop
-
- /* Setup new "C" stack */
- la sp, _stack
-
- /* reserve stack space for a0-a3 registers */
- subu sp, 16
-
- /* jump to the decompressor routine */
- la t0, loader_main
- jr t0
- nop
-
- .set reorder
-END(startup)
+++ /dev/null
-/*
- * LZMA compressed kernel loader for Atheros AR7XXX/AR9XXX based boards
- *
- * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
- *
- * Some parts of this code was based on the OpenWrt specific lzma-loader
- * for the BCM47xx and ADM5120 based boards:
- * Copyright (C) 2004 Manuel Novoa III (mjn3@codepoet.org)
- * Copyright (C) 2005 Mineharu Takahara <mtakahar@yahoo.com>
- * Copyright (C) 2005 by Oleg I. Vdovikin <oleg@cs.msu.su>
- *
- * The image_header structure has been taken from the U-Boot project.
- * (C) Copyright 2008 Semihalf
- * (C) Copyright 2000-2005
- * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License version 2 as published
- * by the Free Software Foundation.
- */
-
-#include <stddef.h>
-#include <stdint.h>
-
-#include "config.h"
-#include "cache.h"
-#include "printf.h"
-#include "LzmaDecode.h"
-
-#define KSEG0 0x80000000
-#define KSEG1 0xa0000000
-
-#define KSEG1ADDR(a) ((((unsigned)(a)) & 0x1fffffffU) | KSEG1)
-
-#undef LZMA_DEBUG
-
-#ifdef LZMA_DEBUG
-# define DBG(f, a...) printf(f, ## a)
-#else
-# define DBG(f, a...) do {} while (0)
-#endif
-
-/* beyond the image end, size not known in advance */
-extern unsigned char workspace[];
-
-
-extern void board_init(void);
-
-static CLzmaDecoderState lzma_state;
-static unsigned char *lzma_data;
-static unsigned long lzma_datasize;
-static unsigned long lzma_outsize;
-static unsigned long kernel_la;
-
-static void halt(void)
-{
- printf("\nSystem halted!\n");
- for(;;);
-}
-
-static __inline__ unsigned char lzma_get_byte(void)
-{
- unsigned char c;
-
- lzma_datasize--;
- c = *lzma_data++;
-
- return c;
-}
-
-static int lzma_init_props(void)
-{
- unsigned char props[LZMA_PROPERTIES_SIZE];
- int res;
- int i;
-
- /* read lzma properties */
- for (i = 0; i < LZMA_PROPERTIES_SIZE; i++)
- props[i] = lzma_get_byte();
-
- /* read the lower half of uncompressed size in the header */
- lzma_outsize = ((SizeT) lzma_get_byte()) +
- ((SizeT) lzma_get_byte() << 8) +
- ((SizeT) lzma_get_byte() << 16) +
- ((SizeT) lzma_get_byte() << 24);
-
- /* skip rest of the header (upper half of uncompressed size) */
- for (i = 0; i < 4; i++)
- lzma_get_byte();
-
- res = LzmaDecodeProperties(&lzma_state.Properties, props,
- LZMA_PROPERTIES_SIZE);
- return res;
-}
-
-static int lzma_decompress(unsigned char *outStream)
-{
- SizeT ip, op;
- int ret;
-
- lzma_state.Probs = (CProb *) workspace;
-
- ret = LzmaDecode(&lzma_state, lzma_data, lzma_datasize, &ip, outStream,
- lzma_outsize, &op);
-
- if (ret != LZMA_RESULT_OK) {
- int i;
-
- DBG("LzmaDecode error %d at %08x, osize:%d ip:%d op:%d\n",
- ret, lzma_data + ip, lzma_outsize, ip, op);
-
- for (i = 0; i < 16; i++)
- DBG("%02x ", lzma_data[ip + i]);
-
- DBG("\n");
- }
-
- return ret;
-}
-
-static void lzma_init_data(void)
-{
- extern unsigned char _lzma_data_start[];
- extern unsigned char _lzma_data_end[];
-
- kernel_la = LOADADDR;
- lzma_data = _lzma_data_start;
- lzma_datasize = _lzma_data_end - _lzma_data_start;
-}
-
-void loader_main(unsigned long reg_a0, unsigned long reg_a1,
- unsigned long reg_a2, unsigned long reg_a3)
-{
- void (*kernel_entry) (unsigned long, unsigned long, unsigned long,
- unsigned long);
- int res;
-
- board_init();
-
- printf("\n\nOpenWrt kernel loader for BCM63XX\n");
- printf("Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>\n");
- printf("Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>\n");
-
- lzma_init_data();
-
- res = lzma_init_props();
- if (res != LZMA_RESULT_OK) {
- printf("Incorrect LZMA stream properties!\n");
- halt();
- }
-
- printf("Decompressing kernel... ");
-
- res = lzma_decompress((unsigned char *) kernel_la);
- if (res != LZMA_RESULT_OK) {
- printf("failed, ");
- switch (res) {
- case LZMA_RESULT_DATA_ERROR:
- printf("data error!\n");
- break;
- default:
- printf("unknown error %d!\n", res);
- }
- halt();
- } else {
- printf("done!\n");
- }
-
- flush_cache(kernel_la, lzma_outsize);
-
- printf("Starting kernel at %08x...\n\n", kernel_la);
-
- kernel_entry = (void *) kernel_la;
- kernel_entry(reg_a0, reg_a1, reg_a2, reg_a3);
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .text : {
- _code_start = .;
- *(.text)
- *(.text.*)
- *(.rodata)
- *(.rodata.*)
- *(.data.lzma)
- }
-
- . = ALIGN(32);
- .data : {
- *(.data)
- *(.data.*)
- }
-
- . = ALIGN(32);
- _code_end = .;
-
- _bss_start = .;
- .bss : {
- *(.bss)
- *(.bss.*)
- }
-
- . = ALIGN(32);
- _bss_end = .;
-
- . = . + 8192;
- _stack = .;
-
- workspace = .;
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .text : {
- startup = .;
- *(.text)
- *(.text.*)
- *(.data)
- *(.data.*)
- }
-}
+++ /dev/null
-OUTPUT_ARCH(mips)
-SECTIONS {
- .data.lzma : {
- _lzma_data_start = .;
- *(.data)
- _lzma_data_end = .;
- }
-}
+++ /dev/null
-/*
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#include "printf.h"
-
-extern void board_putc(int ch);
-
-/* this is the maximum width for a variable */
-#define LP_MAX_BUF 256
-
-/* macros */
-#define IsDigit(x) ( ((x) >= '0') && ((x) <= '9') )
-#define Ctod(x) ( (x) - '0')
-
-/* forward declaration */
-static int PrintChar(char *, char, int, int);
-static int PrintString(char *, char *, int, int);
-static int PrintNum(char *, unsigned long, int, int, int, int, char, int);
-
-/* private variable */
-static const char theFatalMsg[] = "fatal error in lp_Print!";
-
-/* -*-
- * A low level printf() function.
- */
-static void
-lp_Print(void (*output)(void *, char *, int),
- void * arg,
- char *fmt,
- va_list ap)
-{
-
-#define OUTPUT(arg, s, l) \
- { if (((l) < 0) || ((l) > LP_MAX_BUF)) { \
- (*output)(arg, (char*)theFatalMsg, sizeof(theFatalMsg)-1); for(;;); \
- } else { \
- (*output)(arg, s, l); \
- } \
- }
-
- char buf[LP_MAX_BUF];
-
- char c;
- char *s;
- long int num;
-
- int longFlag;
- int negFlag;
- int width;
- int prec;
- int ladjust;
- char padc;
-
- int length;
-
- for(;;) {
- {
- /* scan for the next '%' */
- char *fmtStart = fmt;
- while ( (*fmt != '\0') && (*fmt != '%')) {
- fmt ++;
- }
-
- /* flush the string found so far */
- OUTPUT(arg, fmtStart, fmt-fmtStart);
-
- /* are we hitting the end? */
- if (*fmt == '\0') break;
- }
-
- /* we found a '%' */
- fmt ++;
-
- /* check for long */
- if (*fmt == 'l') {
- longFlag = 1;
- fmt ++;
- } else {
- longFlag = 0;
- }
-
- /* check for other prefixes */
- width = 0;
- prec = -1;
- ladjust = 0;
- padc = ' ';
-
- if (*fmt == '-') {
- ladjust = 1;
- fmt ++;
- }
-
- if (*fmt == '0') {
- padc = '0';
- fmt++;
- }
-
- if (IsDigit(*fmt)) {
- while (IsDigit(*fmt)) {
- width = 10 * width + Ctod(*fmt++);
- }
- }
-
- if (*fmt == '.') {
- fmt ++;
- if (IsDigit(*fmt)) {
- prec = 0;
- while (IsDigit(*fmt)) {
- prec = prec*10 + Ctod(*fmt++);
- }
- }
- }
-
-
- /* check format flag */
- negFlag = 0;
- switch (*fmt) {
- case 'b':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 2, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'd':
- case 'D':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- if (num < 0) {
- num = - num;
- negFlag = 1;
- }
- length = PrintNum(buf, num, 10, negFlag, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'o':
- case 'O':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 8, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'u':
- case 'U':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 10, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'x':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 0);
- OUTPUT(arg, buf, length);
- break;
-
- case 'X':
- if (longFlag) {
- num = va_arg(ap, long int);
- } else {
- num = va_arg(ap, int);
- }
- length = PrintNum(buf, num, 16, 0, width, ladjust, padc, 1);
- OUTPUT(arg, buf, length);
- break;
-
- case 'c':
- c = (char)va_arg(ap, int);
- length = PrintChar(buf, c, width, ladjust);
- OUTPUT(arg, buf, length);
- break;
-
- case 's':
- s = (char*)va_arg(ap, char *);
- length = PrintString(buf, s, width, ladjust);
- OUTPUT(arg, buf, length);
- break;
-
- case '\0':
- fmt --;
- break;
-
- default:
- /* output this char as it is */
- OUTPUT(arg, fmt, 1);
- } /* switch (*fmt) */
-
- fmt ++;
- } /* for(;;) */
-
- /* special termination call */
- OUTPUT(arg, "\0", 1);
-}
-
-
-/* --------------- local help functions --------------------- */
-static int
-PrintChar(char * buf, char c, int length, int ladjust)
-{
- int i;
-
- if (length < 1) length = 1;
- if (ladjust) {
- *buf = c;
- for (i=1; i< length; i++) buf[i] = ' ';
- } else {
- for (i=0; i< length-1; i++) buf[i] = ' ';
- buf[length - 1] = c;
- }
- return length;
-}
-
-static int
-PrintString(char * buf, char* s, int length, int ladjust)
-{
- int i;
- int len=0;
- char* s1 = s;
- while (*s1++) len++;
- if (length < len) length = len;
-
- if (ladjust) {
- for (i=0; i< len; i++) buf[i] = s[i];
- for (i=len; i< length; i++) buf[i] = ' ';
- } else {
- for (i=0; i< length-len; i++) buf[i] = ' ';
- for (i=length-len; i < length; i++) buf[i] = s[i-length+len];
- }
- return length;
-}
-
-static int
-PrintNum(char * buf, unsigned long u, int base, int negFlag,
- int length, int ladjust, char padc, int upcase)
-{
- /* algorithm :
- * 1. prints the number from left to right in reverse form.
- * 2. fill the remaining spaces with padc if length is longer than
- * the actual length
- * TRICKY : if left adjusted, no "0" padding.
- * if negtive, insert "0" padding between "0" and number.
- * 3. if (!ladjust) we reverse the whole string including paddings
- * 4. otherwise we only reverse the actual string representing the num.
- */
-
- int actualLength =0;
- char *p = buf;
- int i;
-
- do {
- int tmp = u %base;
- if (tmp <= 9) {
- *p++ = '0' + tmp;
- } else if (upcase) {
- *p++ = 'A' + tmp - 10;
- } else {
- *p++ = 'a' + tmp - 10;
- }
- u /= base;
- } while (u != 0);
-
- if (negFlag) {
- *p++ = '-';
- }
-
- /* figure out actual length and adjust the maximum length */
- actualLength = p - buf;
- if (length < actualLength) length = actualLength;
-
- /* add padding */
- if (ladjust) {
- padc = ' ';
- }
- if (negFlag && !ladjust && (padc == '0')) {
- for (i = actualLength-1; i< length-1; i++) buf[i] = padc;
- buf[length -1] = '-';
- } else {
- for (i = actualLength; i< length; i++) buf[i] = padc;
- }
-
-
- /* prepare to reverse the string */
- {
- int begin = 0;
- int end;
- if (ladjust) {
- end = actualLength - 1;
- } else {
- end = length -1;
- }
-
- while (end > begin) {
- char tmp = buf[begin];
- buf[begin] = buf[end];
- buf[end] = tmp;
- begin ++;
- end --;
- }
- }
-
- /* adjust the string pointer */
- return length;
-}
-
-static void printf_output(void *arg, char *s, int l)
-{
- int i;
-
- // special termination call
- if ((l==1) && (s[0] == '\0')) return;
-
- for (i=0; i< l; i++) {
- board_putc(s[i]);
- if (s[i] == '\n') board_putc('\r');
- }
-}
-
-void printf(char *fmt, ...)
-{
- va_list ap;
- va_start(ap, fmt);
- lp_Print(printf_output, 0, fmt, ap);
- va_end(ap);
-}
+++ /dev/null
-/*
- * Copyright (C) 2001 MontaVista Software Inc.
- * Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
- *
- * This program is free software; you can redistribute it and/or modify it
- * under the terms of the GNU General Public License as published by the
- * Free Software Foundation; either version 2 of the License, or (at your
- * option) any later version.
- *
- */
-
-#ifndef _printf_h_
-#define _printf_h_
-
-#include <stdarg.h>
-void printf(char *fmt, ...);
-
-#endif /* _printf_h_ */
+++ /dev/null
-#
-# Copyright (C) 2010 OpenWrt.org
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define KernelPackage/pcmcia-bcm63xx
- SUBMENU:=$(PCMCIA_MENU)
- TITLE:=Broadcom BCM63xx PCMCIA support
- DEPENDS:=@TARGET_brcm63xx +kmod-pcmcia-rsrc
- KCONFIG:=CONFIG_PCMCIA_BCM63XX
- FILES:=$(LINUX_DIR)/drivers/pcmcia/bcm63xx_pcmcia.ko
- AUTOLOAD:=$(call AutoLoad,41,bcm63xx_pcmcia)
-endef
-
-define KernelPackage/pcmcia-bcm63xx/description
- Kernel support for PCMCIA/CardBus controller on the BCM63xx SoC
-endef
-
-$(eval $(call KernelPackage,pcmcia-bcm63xx))
-
-define KernelPackage/bcm63xx-udc
- SUBMENU:=$(USB_MENU)
- TITLE:=Broadcom BCM63xx UDC support
- DEPENDS:=@TARGET_brcm63xx +kmod-usb-gadget
- KCONFIG:=CONFIG_USB_BCM63XX_UDC
- FILES:= \
- $(LINUX_DIR)/drivers/usb/gadget/udc/bcm63xx_udc.ko
- AUTOLOAD:=$(call AutoLoad,51,bcm63xx_udc)
- $(call AddDepends/usb)
-endef
-
-define KernelPackage/bcm63xx-udc/description
- Kernel support for the USB gadget (device) controller on the BCM63xx SoC
-endef
-
-$(eval $(call KernelPackage,bcm63xx-udc))
+++ /dev/null
-From e74caf41aec5338b8cbbd0a1483650848f16f532 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:23:47 +0200
-Subject: [PATCH V2 1/8] MIPS: BCM63XX: add clkdev lookup support
-
-Enable clkdev lookup support to allow us providing clocks under
-different names to devices more easily, so we don't need to care
-about clock name clashes anymore.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/Kconfig | 1 +
- arch/mips/bcm63xx/clk.c | 150 +++++++++++++++++++++++++++++++++++++-----------
- 2 files changed, 116 insertions(+), 35 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -279,6 +279,7 @@ config BCM63XX
- select GPIOLIB
- select HAVE_CLK
- select MIPS_L1_CACHE_SHIFT_4
-+ select CLKDEV_LOOKUP
- help
- Support for BCM63XX based boards
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -11,6 +11,7 @@
- #include <linux/mutex.h>
- #include <linux/err.h>
- #include <linux/clk.h>
-+#include <linux/clkdev.h>
- #include <linux/delay.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_io.h>
-@@ -359,44 +360,103 @@ long clk_round_rate(struct clk *clk, uns
- }
- EXPORT_SYMBOL_GPL(clk_round_rate);
-
--struct clk *clk_get(struct device *dev, const char *id)
--{
-- if (!strcmp(id, "enet0"))
-- return &clk_enet0;
-- if (!strcmp(id, "enet1"))
-- return &clk_enet1;
-- if (!strcmp(id, "enetsw"))
-- return &clk_enetsw;
-- if (!strcmp(id, "ephy"))
-- return &clk_ephy;
-- if (!strcmp(id, "usbh"))
-- return &clk_usbh;
-- if (!strcmp(id, "usbd"))
-- return &clk_usbd;
-- if (!strcmp(id, "spi"))
-- return &clk_spi;
-- if (!strcmp(id, "hsspi"))
-- return &clk_hsspi;
-- if (!strcmp(id, "xtm"))
-- return &clk_xtm;
-- if (!strcmp(id, "periph"))
-- return &clk_periph;
-- if ((BCMCPU_IS_3368() || BCMCPU_IS_6358()) && !strcmp(id, "pcm"))
-- return &clk_pcm;
-- if ((BCMCPU_IS_6362() || BCMCPU_IS_6368()) && !strcmp(id, "ipsec"))
-- return &clk_ipsec;
-- if ((BCMCPU_IS_6328() || BCMCPU_IS_6362()) && !strcmp(id, "pcie"))
-- return &clk_pcie;
-- return ERR_PTR(-ENOENT);
--}
--
--EXPORT_SYMBOL(clk_get);
--
--void clk_put(struct clk *clk)
--{
--}
--
--EXPORT_SYMBOL(clk_put);
-+static struct clk_lookup bcm3368_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+};
-+
-+static struct clk_lookup bcm6328_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
-+static struct clk_lookup bcm6338_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+};
-+
-+static struct clk_lookup bcm6345_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+};
-+
-+static struct clk_lookup bcm6348_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+};
-+
-+static struct clk_lookup bcm6358_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enet0", &clk_enet0),
-+ CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-+ CLKDEV_INIT(NULL, "ephy", &clk_ephy),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+};
-+
-+static struct clk_lookup bcm6362_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
-+};
-+
-+static struct clk_lookup bcm6368_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "xtm", &clk_xtm),
-+ CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
-+};
-
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-@@ -404,11 +464,31 @@ EXPORT_SYMBOL(clk_put);
- static int __init bcm63xx_clk_init(void)
- {
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM3368_CPU_ID:
-+ clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
-+ break;
- case BCM6328_CPU_ID:
- clk_hsspi.rate = HSSPI_PLL_HZ_6328;
-+ clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
-+ break;
-+ case BCM6338_CPU_ID:
-+ clkdev_add_table(bcm6338_clks, ARRAY_SIZE(bcm6338_clks));
-+ break;
-+ case BCM6345_CPU_ID:
-+ clkdev_add_table(bcm6345_clks, ARRAY_SIZE(bcm6345_clks));
-+ break;
-+ case BCM6348_CPU_ID:
-+ clkdev_add_table(bcm6348_clks, ARRAY_SIZE(bcm6348_clks));
-+ break;
-+ case BCM6358_CPU_ID:
-+ clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
- break;
- case BCM6362_CPU_ID:
- clk_hsspi.rate = HSSPI_PLL_HZ_6362;
-+ clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
-+ break;
-+ case BCM6368_CPU_ID:
-+ clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
- break;
- }
-
+++ /dev/null
-From d0322bf7bebe87012b4f95c85be6b5ba0cb6f344 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:31:44 +0200
-Subject: [PATCH V2 2/8] MIPS: BCM63XX: provide periph clock as refclk for uart
-
-Add a lookup as "refclk" to describe its function for the uarts.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -363,6 +363,8 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
- static struct clk_lookup bcm3368_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -376,6 +378,8 @@ static struct clk_lookup bcm3368_clks[]
- static struct clk_lookup bcm6328_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -387,6 +391,7 @@ static struct clk_lookup bcm6328_clks[]
- static struct clk_lookup bcm6338_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -399,6 +404,7 @@ static struct clk_lookup bcm6338_clks[]
- static struct clk_lookup bcm6345_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -411,6 +417,7 @@ static struct clk_lookup bcm6345_clks[]
- static struct clk_lookup bcm6348_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -423,6 +430,8 @@ static struct clk_lookup bcm6348_clks[]
- static struct clk_lookup bcm6358_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -436,6 +445,8 @@ static struct clk_lookup bcm6358_clks[]
- static struct clk_lookup bcm6362_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -449,6 +460,8 @@ static struct clk_lookup bcm6362_clks[]
- static struct clk_lookup bcm6368_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+++ /dev/null
-From 8124706e6040b1cf0d2dd3a05759df6cec4bddfb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:32:37 +0200
-Subject: [PATCH V2 3/8] tty/bcm63xx_uart: use refclk for the expected clock
- name
-
-We now have the clock available under refclk, so use that.
-
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/tty/serial/bcm63xx_uart.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/tty/serial/bcm63xx_uart.c
-+++ b/drivers/tty/serial/bcm63xx_uart.c
-@@ -847,7 +847,7 @@ static int bcm_uart_probe(struct platfor
- return -ENODEV;
-
- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
-- clk_get(&pdev->dev, "periph");
-+ clk_get(&pdev->dev, "refclk");
- if (IS_ERR(clk))
- return -ENODEV;
-
+++ /dev/null
-From 317f8659bba01b307cbe4e9902d4e3d333fd7164 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:39:17 +0200
-Subject: [PATCH V2 4/8] tty/bcm63xx_uart: allow naming clock in device tree
-
-Codify using a named clock for the refclk of the uart. This makes it
-easier if we might need to add a gating clock (like present on the
-BCM6345).
-
-Acked-by: Rob Herring <robh@kernel.org>
-Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt | 6 ++++++
- drivers/tty/serial/bcm63xx_uart.c | 6 ++++--
- 2 files changed, 10 insertions(+), 2 deletions(-)
-
---- a/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
-+++ b/Documentation/devicetree/bindings/serial/brcm,bcm6345-uart.txt
-@@ -11,6 +11,11 @@ Required properties:
- - clocks: Clock driving the hardware; used to figure out the baud rate
- divisor.
-
-+
-+Optional properties:
-+
-+- clock-names: Should be "refclk".
-+
- Example:
-
- uart0: serial@14e00520 {
-@@ -19,6 +24,7 @@ Example:
- interrupt-parent = <&periph_intc>;
- interrupts = <2>;
- clocks = <&periph_clk>;
-+ clock-names = "refclk";
- };
-
- clocks {
---- a/drivers/tty/serial/bcm63xx_uart.c
-+++ b/drivers/tty/serial/bcm63xx_uart.c
-@@ -846,8 +846,10 @@ static int bcm_uart_probe(struct platfor
- if (!res_irq)
- return -ENODEV;
-
-- clk = pdev->dev.of_node ? of_clk_get(pdev->dev.of_node, 0) :
-- clk_get(&pdev->dev, "refclk");
-+ clk = clk_get(&pdev->dev, "refclk");
-+ if (IS_ERR(clk) && pdev->dev.of_node)
-+ clk = of_clk_get(pdev->dev.of_node, 0);
-+
- if (IS_ERR(clk))
- return -ENODEV;
-
+++ /dev/null
-From cb86630379c8f3432c916d62045b5176f17f4123 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:57:21 +0200
-Subject: [PATCH V2 6/8] MIPS: BCM63XX: move the HSSPI PLL HZ into its own
- clock
-
-Split up the HSSPL clock into rate and a gate clock, to more closely
-match the actual hardware.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 10 ++++++++--
- 1 file changed, 8 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -248,6 +248,10 @@ static struct clk clk_hsspi = {
- .set = hsspi_set,
- };
-
-+/*
-+ * HSSPI PLL
-+ */
-+static struct clk clk_hsspi_pll;
-
- /*
- * XTM clock
-@@ -380,6 +384,7 @@ static struct clk_lookup bcm6328_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -447,6 +452,7 @@ static struct clk_lookup bcm6362_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -481,7 +487,7 @@ static int __init bcm63xx_clk_init(void)
- clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
- break;
- case BCM6328_CPU_ID:
-- clk_hsspi.rate = HSSPI_PLL_HZ_6328;
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
- clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
- break;
- case BCM6338_CPU_ID:
-@@ -497,7 +503,7 @@ static int __init bcm63xx_clk_init(void)
- clkdev_add_table(bcm6358_clks, ARRAY_SIZE(bcm6358_clks));
- break;
- case BCM6362_CPU_ID:
-- clk_hsspi.rate = HSSPI_PLL_HZ_6362;
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
- clkdev_add_table(bcm6362_clks, ARRAY_SIZE(bcm6362_clks));
- break;
- case BCM6368_CPU_ID:
+++ /dev/null
-From 6d43970a2eb1c7ee88caf7328d201f9c001262e9 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:48:41 +0200
-Subject: [PATCH V2 7/8] MIPS: BCM63XX: provide enet clocks as "enet" to the
- ethernet devices
-
-Add lookups to provide the appropriate enetX clocks as just "enet" to
-the ethernet devices.
-
-Reviewed-by: Florian Fainelli <f.fainelli@gmail.com>
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -377,6 +377,8 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
- CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
-+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
-
- static struct clk_lookup bcm6328_clks[] = {
-@@ -404,6 +406,7 @@ static struct clk_lookup bcm6338_clks[]
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
- };
-
- static struct clk_lookup bcm6345_clks[] = {
-@@ -417,6 +420,7 @@ static struct clk_lookup bcm6345_clks[]
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
- };
-
- static struct clk_lookup bcm6348_clks[] = {
-@@ -430,6 +434,8 @@ static struct clk_lookup bcm6348_clks[]
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet_misc),
-+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet_misc),
- };
-
- static struct clk_lookup bcm6358_clks[] = {
-@@ -445,6 +451,8 @@ static struct clk_lookup bcm6358_clks[]
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
- CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+ CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
-+ CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
-
- static struct clk_lookup bcm6362_clks[] = {
+++ /dev/null
-From b98027285bd1fa95da0645a4234a5fc1f1a83f92 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 26 Feb 2017 11:59:52 +0100
-Subject: [PATCH V2 8/8] MIPS: BCM63XX: split out swpkt_sar/usb clocks
-
-Make the secondary switch clocks their own clocks. This allows proper
-enable reference counting between SAR/XTM and the main switch clocks,
-and controlling them individually from drivers.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/clk.c | 61 +++++++++++++++++++++++++++++++++++++++++--------
- 1 file changed, 51 insertions(+), 10 deletions(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -122,21 +122,56 @@ static struct clk clk_ephy = {
- };
-
- /*
-+ * Ethernet switch SAR clock
-+ */
-+static void swpkt_sar_set(struct clk *clk, int enable)
-+{
-+ if (BCMCPU_IS_6368())
-+ bcm_hwclock_set(CKCTL_6368_SWPKT_SAR_EN, enable);
-+ else
-+ return;
-+}
-+
-+static struct clk clk_swpkt_sar = {
-+ .set = swpkt_sar_set,
-+};
-+
-+/*
-+ * Ethernet switch USB clock
-+ */
-+static void swpkt_usb_set(struct clk *clk, int enable)
-+{
-+ if (BCMCPU_IS_6368())
-+ bcm_hwclock_set(CKCTL_6368_SWPKT_USB_EN, enable);
-+ else
-+ return;
-+}
-+
-+static struct clk clk_swpkt_usb = {
-+ .set = swpkt_usb_set,
-+};
-+
-+/*
- * Ethernet switch clock
- */
- static void enetsw_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
-- else if (BCMCPU_IS_6368())
-- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN |
-- CKCTL_6368_SWPKT_USB_EN |
-- CKCTL_6368_SWPKT_SAR_EN,
-- enable);
-- else
-+ } else if (BCMCPU_IS_6368()) {
-+ if (enable) {
-+ clk_enable_unlocked(&clk_swpkt_sar);
-+ clk_enable_unlocked(&clk_swpkt_usb);
-+ } else {
-+ clk_disable_unlocked(&clk_swpkt_usb);
-+ clk_disable_unlocked(&clk_swpkt_sar);
-+ }
-+ bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
-+ } else {
- return;
-+ }
-
- if (enable) {
- /* reset switch core afer clock change */
-@@ -261,8 +296,12 @@ static void xtm_set(struct clk *clk, int
- if (!BCMCPU_IS_6368())
- return;
-
-- bcm_hwclock_set(CKCTL_6368_SAR_EN |
-- CKCTL_6368_SWPKT_SAR_EN, enable);
-+ if (enable)
-+ clk_enable_unlocked(&clk_swpkt_sar);
-+ else
-+ clk_disable_unlocked(&clk_swpkt_sar);
-+
-+ bcm_hwclock_set(CKCTL_6368_SAR_EN, enable);
-
- if (enable) {
- /* reset sar core afer clock change */
-@@ -451,6 +490,8 @@ static struct clk_lookup bcm6358_clks[]
- CLKDEV_INIT(NULL, "usbd", &clk_usbd),
- CLKDEV_INIT(NULL, "spi", &clk_spi),
- CLKDEV_INIT(NULL, "pcm", &clk_pcm),
-+ CLKDEV_INIT(NULL, "swpkt_sar", &clk_swpkt_sar),
-+ CLKDEV_INIT(NULL, "swpkt_usb", &clk_swpkt_usb),
- CLKDEV_INIT("bcm63xx_enet.0", "enet", &clk_enet0),
- CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
+++ /dev/null
-From 71710bb6cbc82f411a4e5faafa0c3178e48e7137 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 30 May 2017 13:31:45 +0200
-Subject: [PATCH 3/6] bcm63xx_enet: do not rely on probe order
-
-Do not rely on the shared device being probed before the enet(sw)
-devices. This makes it easier to eventually move out the shared
-device as a dma controller driver (what it should be).
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 9 ++-------
- 1 file changed, 2 insertions(+), 7 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1723,10 +1723,8 @@ static int bcm_enet_probe(struct platfor
- const char *clk_name;
- int i, ret;
-
-- /* stop if shared driver failed, assume driver->probe will be
-- * called in the same order we register devices (correct ?) */
- if (!bcm_enet_shared_base[0])
-- return -ENODEV;
-+ return -EPROBE_DEFER;
-
- res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
- res_irq_rx = platform_get_resource(pdev, IORESOURCE_IRQ, 1);
-@@ -2701,11 +2699,8 @@ static int bcm_enetsw_probe(struct platf
- struct resource *res_mem;
- int ret, irq_rx, irq_tx;
-
-- /* stop if shared driver failed, assume driver->probe will be
-- * called in the same order we register devices (correct ?)
-- */
- if (!bcm_enet_shared_base[0])
-- return -ENODEV;
-+ return -EPROBE_DEFER;
-
- res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- irq_rx = platform_get_irq(pdev, 0);
+++ /dev/null
-From 179a445ae4ef36ec44f4aea18e5f42d21334d186 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 25 Feb 2017 12:39:25 +0100
-Subject: [PATCH 4/6] bcm63xx_enet: use managed functions for clock/ioremap
-
-Use managed functions where possible to reduce the amount of resource
-handling on error and remove paths.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 54 +++++++---------------------
- 1 file changed, 12 insertions(+), 42 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1768,14 +1768,14 @@ static int bcm_enet_probe(struct platfor
- clk_name = "enet1";
- }
-
-- priv->mac_clk = clk_get(&pdev->dev, clk_name);
-+ priv->mac_clk = devm_clk_get(&pdev->dev, clk_name);
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
- goto out;
- }
- ret = clk_prepare_enable(priv->mac_clk);
- if (ret)
-- goto out_put_clk_mac;
-+ goto out;
-
- /* initialize default and fetch platform data */
- priv->rx_ring_size = BCMENET_DEF_RX_DESC;
-@@ -1803,7 +1803,7 @@ static int bcm_enet_probe(struct platfor
-
- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
- /* using internal PHY, enable clock */
-- priv->phy_clk = clk_get(&pdev->dev, "ephy");
-+ priv->phy_clk = devm_clk_get(&pdev->dev, "ephy");
- if (IS_ERR(priv->phy_clk)) {
- ret = PTR_ERR(priv->phy_clk);
- priv->phy_clk = NULL;
-@@ -1811,7 +1811,7 @@ static int bcm_enet_probe(struct platfor
- }
- ret = clk_prepare_enable(priv->phy_clk);
- if (ret)
-- goto out_put_clk_phy;
-+ goto out_disable_clk_mac;
- }
-
- /* do minimal hardware init to be able to probe mii bus */
-@@ -1908,14 +1908,8 @@ out_uninit_hw:
- if (priv->phy_clk)
- clk_disable_unprepare(priv->phy_clk);
-
--out_put_clk_phy:
-- if (priv->phy_clk)
-- clk_put(priv->phy_clk);
--
- out_disable_clk_mac:
- clk_disable_unprepare(priv->mac_clk);
--out_put_clk_mac:
-- clk_put(priv->mac_clk);
- out:
- free_netdev(dev);
- return ret;
-@@ -1951,12 +1945,10 @@ static int bcm_enet_remove(struct platfo
- }
-
- /* disable hw block clocks */
-- if (priv->phy_clk) {
-+ if (priv->phy_clk)
- clk_disable_unprepare(priv->phy_clk);
-- clk_put(priv->phy_clk);
-- }
-+
- clk_disable_unprepare(priv->mac_clk);
-- clk_put(priv->mac_clk);
-
- free_netdev(dev);
- return 0;
-@@ -2739,26 +2731,20 @@ static int bcm_enetsw_probe(struct platf
- if (ret)
- goto out;
-
-- if (!request_mem_region(res_mem->start, resource_size(res_mem),
-- "bcm63xx_enetsw")) {
-- ret = -EBUSY;
-+ priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
-+ if (IS_ERR(priv->base)) {
-+ ret = PTR_ERR(priv->base);
- goto out;
- }
-
-- priv->base = ioremap(res_mem->start, resource_size(res_mem));
-- if (priv->base == NULL) {
-- ret = -ENOMEM;
-- goto out_release_mem;
-- }
--
-- priv->mac_clk = clk_get(&pdev->dev, "enetsw");
-+ priv->mac_clk = devm_clk_get(&pdev->dev, "enetsw");
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
-- goto out_unmap;
-+ goto out;
- }
- ret = clk_prepare_enable(priv->mac_clk);
- if (ret)
-- goto out_put_clk;
-+ goto out;
-
- priv->rx_chan = 0;
- priv->tx_chan = 1;
-@@ -2790,15 +2776,6 @@ static int bcm_enetsw_probe(struct platf
-
- out_disable_clk:
- clk_disable_unprepare(priv->mac_clk);
--
--out_put_clk:
-- clk_put(priv->mac_clk);
--
--out_unmap:
-- iounmap(priv->base);
--
--out_release_mem:
-- release_mem_region(res_mem->start, resource_size(res_mem));
- out:
- free_netdev(dev);
- return ret;
-@@ -2810,20 +2787,13 @@ static int bcm_enetsw_remove(struct plat
- {
- struct bcm_enet_priv *priv;
- struct net_device *dev;
-- struct resource *res;
-
- /* stop netdevice */
- dev = platform_get_drvdata(pdev);
- priv = netdev_priv(dev);
- unregister_netdev(dev);
-
-- /* release device resources */
-- iounmap(priv->base);
-- res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-- release_mem_region(res->start, resource_size(res));
--
- clk_disable_unprepare(priv->mac_clk);
-- clk_put(priv->mac_clk);
-
- free_netdev(dev);
- return 0;
+++ /dev/null
-From 555baec974ede81e616ca88ac6d3fca09239368f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 18 Jul 2017 13:18:01 +0200
-Subject: [PATCH 5/6] bcm63xx_enet: drop unneeded NULL phy_clk check
-
-clk_disable and clk_unprepare are NULL-safe, so need to duplicate the
-NULL check of the functions.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 7 ++-----
- 1 file changed, 2 insertions(+), 5 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1905,8 +1905,7 @@ out_free_mdio:
- out_uninit_hw:
- /* turn off mdc clock */
- enet_writel(priv, 0, ENET_MIISC_REG);
-- if (priv->phy_clk)
-- clk_disable_unprepare(priv->phy_clk);
-+ clk_disable_unprepare(priv->phy_clk);
-
- out_disable_clk_mac:
- clk_disable_unprepare(priv->mac_clk);
-@@ -1945,9 +1944,7 @@ static int bcm_enet_remove(struct platfo
- }
-
- /* disable hw block clocks */
-- if (priv->phy_clk)
-- clk_disable_unprepare(priv->phy_clk);
--
-+ clk_disable_unprepare(priv->phy_clk);
- clk_disable_unprepare(priv->mac_clk);
-
- free_netdev(dev);
+++ /dev/null
-From 77364ce98037972fb1c57d0ee0418eb1c2b26521 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 29 May 2017 13:11:14 +0200
-Subject: [PATCH 6/6] bcm63xx_enet: remove unneeded include
-
-We don't use anyhing from that file, so drop it.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.h | 1 -
- 1 file changed, 1 deletion(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -9,7 +9,6 @@
- #include <linux/platform_device.h>
-
- #include <bcm63xx_regs.h>
--#include <bcm63xx_irq.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_iudma.h>
-
+++ /dev/null
-From 943b0832e0cf3afe5bd40ffb1885d06106122c5d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 16 Jul 2017 12:49:49 +0200
-Subject: [PATCH 1/4] bcm63xx_enet: just use "enet" as the clock name
-
-Now that we have the individual clocks available as "enet" we
-don't need to rely on the device id for them anymore.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 5 +----
- 1 file changed, 1 insertion(+), 4 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1720,7 +1720,6 @@ static int bcm_enet_probe(struct platfor
- struct bcm63xx_enet_platform_data *pd;
- struct resource *res_mem, *res_irq, *res_irq_rx, *res_irq_tx;
- struct mii_bus *bus;
-- const char *clk_name;
- int i, ret;
-
- if (!bcm_enet_shared_base[0])
-@@ -1761,14 +1760,12 @@ static int bcm_enet_probe(struct platfor
- if (priv->mac_id == 0) {
- priv->rx_chan = 0;
- priv->tx_chan = 1;
-- clk_name = "enet0";
- } else {
- priv->rx_chan = 2;
- priv->tx_chan = 3;
-- clk_name = "enet1";
- }
-
-- priv->mac_clk = devm_clk_get(&pdev->dev, clk_name);
-+ priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
- goto out;
+++ /dev/null
-From b7d1d1f345bb3b25c360c1df812d98866e2ee7fb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 30 Sep 2017 13:50:03 +0200
-Subject: [PATCH 2/4] bcm63xx_enet: use platform data for dma channel numbers
-
-To reduce the reliance on device ids, pass the dma channel numbers to
-the enet devices as platform data.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/dev-enet.c | 8 ++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h | 4 ++++
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 11 ++---------
- 3 files changed, 14 insertions(+), 9 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -265,6 +265,14 @@ int __init bcm63xx_enet_register(int uni
- dpd->dma_chan_width = ENETDMA_CHAN_WIDTH;
- }
-
-+ if (unit == 0) {
-+ dpd->rx_chan = 0;
-+ dpd->tx_chan = 1;
-+ } else {
-+ dpd->rx_chan = 2;
-+ dpd->tx_chan = 3;
-+ }
-+
- ret = platform_device_register(pdev);
- if (ret)
- return ret;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -55,6 +55,10 @@ struct bcm63xx_enet_platform_data {
-
- /* DMA descriptor shift */
- unsigned int dma_desc_shift;
-+
-+ /* dma channel ids */
-+ int rx_chan;
-+ int tx_chan;
- };
-
- /*
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1756,15 +1756,6 @@ static int bcm_enet_probe(struct platfor
- priv->irq_tx = res_irq_tx->start;
- priv->mac_id = pdev->id;
-
-- /* get rx & tx dma channel id for this mac */
-- if (priv->mac_id == 0) {
-- priv->rx_chan = 0;
-- priv->tx_chan = 1;
-- } else {
-- priv->rx_chan = 2;
-- priv->tx_chan = 3;
-- }
--
- priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
- if (IS_ERR(priv->mac_clk)) {
- ret = PTR_ERR(priv->mac_clk);
-@@ -1796,6 +1787,8 @@ static int bcm_enet_probe(struct platfor
- priv->dma_chan_width = pd->dma_chan_width;
- priv->dma_has_sram = pd->dma_has_sram;
- priv->dma_desc_shift = pd->dma_desc_shift;
-+ priv->rx_chan = pd->rx_chan;
-+ priv->tx_chan = pd->tx_chan;
- }
-
- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
+++ /dev/null
-From 8c61608e5dd2e15575c171ee9cd558ddc3b94962 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 17 Dec 2017 12:54:30 +0100
-Subject: [PATCH 3/4] bcm63xx_enet: remove pointless mac_id check
-
-Enabling the ephy clock for mac 1 is harmless, and the actual usage of
-the ephy is not restricted to mac 0, so we might as well remove the
-check.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1791,7 +1791,7 @@ static int bcm_enet_probe(struct platfor
- priv->tx_chan = pd->tx_chan;
- }
-
-- if (priv->mac_id == 0 && priv->has_phy && !priv->use_external_mii) {
-+ if (priv->has_phy && !priv->use_external_mii) {
- /* using internal PHY, enable clock */
- priv->phy_clk = devm_clk_get(&pdev->dev, "ephy");
- if (IS_ERR(priv->phy_clk)) {
+++ /dev/null
-From faea89cd893a1a7af81185f026a64dad603ef72f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 17 Dec 2017 12:58:12 +0100
-Subject: [PATCH 4/4] bcm63xx_enet: use platform device id directly for miibus
- name
-
-Directly use the platform device for generating the miibus name. This removes
-the last user of bcm_enet_priv::mac_id and we can remove the field.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 3 +--
- drivers/net/ethernet/broadcom/bcm63xx_enet.h | 3 ---
- 2 files changed, 1 insertion(+), 5 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1754,7 +1754,6 @@ static int bcm_enet_probe(struct platfor
- dev->irq = priv->irq = res_irq->start;
- priv->irq_rx = res_irq_rx->start;
- priv->irq_tx = res_irq_tx->start;
-- priv->mac_id = pdev->id;
-
- priv->mac_clk = devm_clk_get(&pdev->dev, "enet");
- if (IS_ERR(priv->mac_clk)) {
-@@ -1822,7 +1821,7 @@ static int bcm_enet_probe(struct platfor
- bus->priv = priv;
- bus->read = bcm_enet_mdio_read_phylib;
- bus->write = bcm_enet_mdio_write_phylib;
-- sprintf(bus->id, "%s-%d", pdev->name, priv->mac_id);
-+ sprintf(bus->id, "%s-%d", pdev->name, pdev->id);
-
- /* only probe bus where we think the PHY is, because
- * the mdio read operation return 0 instead of 0xffff
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -193,9 +193,6 @@ struct bcm_enet_mib_counters {
-
- struct bcm_enet_priv {
-
-- /* mac id (from platform device id) */
-- int mac_id;
--
- /* base remapped address of device */
- void __iomem *base;
-
+++ /dev/null
-From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:19 +0100
-Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
-
-Knowledge of the clock setup delay should remain at the clock level (so
-it can be clock specific and CPU specific). Add the 100 milliseconds
-required clock delay for the USB host clock when it gets enabled.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -214,6 +214,11 @@ static void usbh_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+ else
-+ return;
-+
-+ if (enable)
-+ msleep(100);
- }
-
- static struct clk clk_usbh = {
+++ /dev/null
-From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:20 +0100
-Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
- clock code
-
-This patch adds the required 10 micro seconds delay to the USB device
-clock enable operation. Put this where the correct clock knowledege is,
-which is in the clock code, and remove this delay from the bcm63xx_udc
-gadget driver where it was before.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 5 +++++
- drivers/usb/gadget/bcm63xx_udc.c | 1 -
- 2 files changed, 5 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -236,6 +236,11 @@ static void usbd_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+ else
-+ return;
-+
-+ if (enable)
-+ udelay(10);
- }
-
- static struct clk clk_usbd = {
---- a/drivers/usb/gadget/udc/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
-@@ -410,7 +410,6 @@ static inline void set_clocks(struct bcm
- if (is_enabled) {
- clk_enable(udc->usbh_clk);
- clk_enable(udc->usbd_clk);
-- udelay(10);
- } else {
- clk_disable(udc->usbd_clk);
- clk_disable(udc->usbh_clk);
+++ /dev/null
-From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:21 +0100
-Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
- register
-
-This patch moves the code touching the USB private register in the
-bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
-preparation for adding support for OHCI and EHCI host controllers which
-will also touch the USB private register.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++
- drivers/usb/gadget/bcm63xx_udc.c | 27 ++--------
- 4 files changed, 67 insertions(+), 24 deletions(-)
- create mode 100644 arch/mips/bcm63xx/usb-common.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-usbd.o
-+ dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -0,0 +1,53 @@
-+/*
-+ * Broadcom BCM63xx common USB device configuration code
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
-+ * Copyright (C) 2012 Broadcom Corporation
-+ *
-+ */
-+#include <linux/export.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
-+{
-+ u32 val;
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+ if (is_device) {
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ } else {
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ }
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ if (is_device)
-+ val |= USBH_PRIV_SWAP_USBD_MASK;
-+ else
-+ val &= ~USBH_PRIV_SWAP_USBD_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
-+
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
-+{
-+ u32 val;
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+ if (is_on)
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ else
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -0,0 +1,9 @@
-+#ifndef BCM63XX_USB_PRIV_H_
-+#define BCM63XX_USB_PRIV_H_
-+
-+#include <linux/types.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+
-+#endif /* BCM63XX_USB_PRIV_H_ */
---- a/drivers/usb/gadget/udc/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
-@@ -39,6 +39,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-+#include <bcm63xx_usb_priv.h>
-
- #define DRV_MODULE_NAME "bcm63xx_udc"
-
-@@ -887,22 +888,7 @@ static void bcm63xx_select_phy_mode(stru
- bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
- }
-
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-- if (is_device) {
-- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- } else {
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- }
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
--
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-- if (is_device)
-- val |= USBH_PRIV_SWAP_USBD_MASK;
-- else
-- val &= ~USBH_PRIV_SWAP_USBD_MASK;
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+ bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
- }
-
- /**
-@@ -916,14 +902,9 @@ static void bcm63xx_select_phy_mode(stru
- */
- static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
- {
-- u32 val, portmask = BIT(udc->pd->port_no);
-+ u32 portmask = BIT(udc->pd->port_no);
-
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-- if (is_on)
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- else
-- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+ bcm63xx_usb_priv_select_pullup(portmask, is_on);
- }
-
- /**
+++ /dev/null
-From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:22 +0100
-Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
- common USB code
-
-This patch updates the common USB code touching the USB private
-registers with the specific bits to properly enable OHCI and EHCI
-controllers on BCM63xx SoCs. As a result we now need to protect access
-to Read Modify Write sequences using a spinlock because we cannot
-guarantee that any of the exposed helper will not be called
-concurrently.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 +
- 2 files changed, 99 insertions(+)
-
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -5,10 +5,12 @@
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
- * Copyright (C) 2012 Broadcom Corporation
- *
- */
-+#include <linux/spinlock.h>
- #include <linux/export.h>
-
- #include <bcm63xx_cpu.h>
-@@ -16,9 +18,14 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_usb_priv.h>
-
-+static DEFINE_SPINLOCK(usb_priv_reg_lock);
-+
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
- {
- u32 val;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- if (is_device) {
-@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
- else
- val &= ~USBH_PRIV_SWAP_USBD_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
-
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
- {
- u32 val;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- if (is_on)
-@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
- else
- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
-+
-+/* The following array represents the meaning of the DESC/DATA
-+ * endian swapping with respect to the CPU configured endianness
-+ *
-+ * DATA ENDN mmio descriptor
-+ * 0 0 BE invalid
-+ * 0 1 BE LE
-+ * 1 0 BE BE
-+ * 1 1 BE invalid
-+ *
-+ * Since BCM63XX SoCs are configured to be in big-endian mode
-+ * we want configuration at line 3.
-+ */
-+void bcm63xx_usb_priv_ohci_cfg_set(void)
-+{
-+ u32 reg;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+ if (BCMCPU_IS_6348())
-+ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
-+ else if (BCMCPU_IS_6358()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+ /*
-+ * The magic value comes for the original vendor BSP
-+ * and is needed for USB to work. Datasheet does not
-+ * help, so the magic value is used as-is.
-+ */
-+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+ USBH_PRIV_TEST_6358_REG);
-+
-+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ }
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
-+
-+void bcm63xx_usb_priv_ehci_cfg_set(void)
-+{
-+ u32 reg;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+ if (BCMCPU_IS_6358()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+
-+ /*
-+ * The magic value comes for the original vendor BSP
-+ * and is needed for USB to work. Datasheet does not
-+ * help, so the magic value is used as-is.
-+ */
-+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+ USBH_PRIV_TEST_6358_REG);
-+
-+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ }
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -5,5 +5,7 @@
-
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+void bcm63xx_usb_priv_ohci_cfg_set(void);
-+void bcm63xx_usb_priv_ehci_cfg_set(void);
-
- #endif /* BCM63XX_USB_PRIV_H_ */
+++ /dev/null
-From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:23 +0100
-Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-OHCI controller, and ensures that all relevant OHCI-related
-configuration options are correctly selected. So far, OHCI support is
-available for the 6328, 6348, 6358 and 6358 SoCs.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -7,10 +7,17 @@ config BCM63XX_CPU_3368
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-
-+config BCM63XX_OHCI
-+ bool
-+ select USB_ARCH_HAS_OHCI
-+ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
-+ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -25,21 +32,25 @@ config BCM63XX_CPU_6348
- bool "support 6348 CPU"
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6358
- bool "support 6358 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:24 +0100
-Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
-driven by the ohci-platform generic driver by using specific power
-on/off/suspend callback to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++
- 3 files changed, 101 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-usbd.o usb-common.o
-+ dev-usb-ohci.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -0,0 +1,94 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/usb/ohci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+
-+static struct resource ohci_resources[] = {
-+ {
-+ .start = -1, /* filled at runtime */
-+ .end = -1, /* filled at runtime */
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = -1, /* filled at runtime */
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 ohci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ohci_power_on(struct platform_device *pdev)
-+{
-+ usb_host_clock = clk_get(&pdev->dev, "usbh");
-+ if (IS_ERR_OR_NULL(usb_host_clock))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(usb_host_clock);
-+
-+ bcm63xx_usb_priv_ohci_cfg_set();
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_ohci_power_off(struct platform_device *pdev)
-+{
-+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+ clk_disable_unprepare(usb_host_clock);
-+ clk_put(usb_host_clock);
-+ }
-+}
-+
-+static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
-+ .big_endian_desc = 1,
-+ .big_endian_mmio = 1,
-+ .no_big_frame_no = 1,
-+ .num_ports = 1,
-+ .power_on = bcm63xx_ohci_power_on,
-+ .power_off = bcm63xx_ohci_power_off,
-+ .power_suspend = bcm63xx_ohci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ohci_device = {
-+ .name = "ohci-platform",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(ohci_resources),
-+ .resource = ohci_resources,
-+ .dev = {
-+ .platform_data = &bcm63xx_ohci_pdata,
-+ .dma_mask = &ohci_dmamask,
-+ .coherent_dma_mask = DMA_BIT_MASK(32),
-+ },
-+};
-+
-+int __init bcm63xx_ohci_register(void)
-+{
-+ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
-+ return -ENODEV;
-+
-+ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
-+ ohci_resources[0].end = ohci_resources[0].start;
-+ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
-+ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
-+
-+ return platform_device_register(&bcm63xx_ohci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_OHCI_H_
-+#define BCM63XX_DEV_USB_OHCI_H_
-+
-+int bcm63xx_ohci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_OHCI_H_ */
+++ /dev/null
-From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:25 +0100
-Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
- enables it
-
-BCM63XX-based boards can control the registration of the OHCI controller
-by setting their has_ohci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to
-register the OHCI controller.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -27,6 +27,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-@@ -881,6 +882,9 @@ int __init board_register_devices(void)
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
-+ if (board.has_ohci0)
-+ bcm63xx_ohci_register();
-+
- /* Generate MAC address for WLAN and register our SPROM,
- * do this after registering enet devices
- */
+++ /dev/null
-From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:26 +0100
-Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-EHCI controller, and ensures that all relevant EHCI-related
-configuration options are selected. So far BCM6328, BCM6358 and BCM6368
-have an EHCI controller and do select this symbol. Update
-drivers/usb/host/Kconfig with BCM63XX to update direct unmet
-dependencies.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 9 +++++++++
- drivers/usb/host/Kconfig | 5 +++--
- 2 files changed, 12 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -13,11 +13,18 @@ config BCM63XX_OHCI
- select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
- select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
-
-+config BCM63XX_EHCI
-+ bool
-+ select USB_ARCH_HAS_EHCI
-+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
-+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -39,18 +46,21 @@ config BCM63XX_CPU_6358
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:27 +0100
-Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
-driven by the generic ehci-platform driver by using specific power
-on/off/suspend callbacks to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++
- 3 files changed, 99 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-ohci.o dev-usb-usbd.o usb-common.o
-+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -0,0 +1,92 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/usb/ehci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+
-+static struct resource ehci_resources[] = {
-+ {
-+ .start = -1, /* filled at runtime */
-+ .end = -1, /* filled at runtime */
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = -1, /* filled at runtime */
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 ehci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ehci_power_on(struct platform_device *pdev)
-+{
-+ usb_host_clock = clk_get(&pdev->dev, "usbh");
-+ if (IS_ERR_OR_NULL(usb_host_clock))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(usb_host_clock);
-+
-+ bcm63xx_usb_priv_ehci_cfg_set();
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_ehci_power_off(struct platform_device *pdev)
-+{
-+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+ clk_disable_unprepare(usb_host_clock);
-+ clk_put(usb_host_clock);
-+ }
-+}
-+
-+static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
-+ .big_endian_desc = 1,
-+ .big_endian_mmio = 1,
-+ .power_on = bcm63xx_ehci_power_on,
-+ .power_off = bcm63xx_ehci_power_off,
-+ .power_suspend = bcm63xx_ehci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ehci_device = {
-+ .name = "ehci-platform",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(ehci_resources),
-+ .resource = ehci_resources,
-+ .dev = {
-+ .platform_data = &bcm63xx_ehci_pdata,
-+ .dma_mask = &ehci_dmamask,
-+ .coherent_dma_mask = DMA_BIT_MASK(32),
-+ },
-+};
-+
-+int __init bcm63xx_ehci_register(void)
-+{
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ return 0;
-+
-+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
-+ ehci_resources[0].end = ehci_resources[0].start;
-+ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
-+ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
-+
-+ return platform_device_register(&bcm63xx_ehci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_EHCI_H_
-+#define BCM63XX_DEV_USB_EHCI_H_
-+
-+int bcm63xx_ehci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_EHCI_H_ */
+++ /dev/null
-From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:28 +0100
-Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
- enables it
-
-BCM63XX-based board can control the registration of the EHCI controller
-by setting their has_ehci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to register
-the EHCI controller.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -27,6 +27,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-@@ -882,6 +883,9 @@ int __init board_register_devices(void)
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
-+ if (board.has_ehci0)
-+ bcm63xx_ehci_register();
-+
- if (board.has_ohci0)
- bcm63xx_ohci_register();
-
+++ /dev/null
-From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:30 +0100
-Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
- overcurrent
-
-This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
-does not support proper overcurrent reporting.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/dev-usb-ehci.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
- static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
- .big_endian_desc = 1,
- .big_endian_mmio = 1,
-+ .ignore_oc = 1,
- .power_on = bcm63xx_ehci_power_on,
- .power_off = bcm63xx_ehci_power_off,
- .power_suspend = bcm63xx_ehci_power_off,
+++ /dev/null
-From a2b8c7f648e168573905818dbb4cb90ca3957c65 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 28 Jun 2017 18:29:43 +0200
-Subject: [PATCH] mtd: bcm63xxpart: move imagetag parsing to its own parser
-
-Move the bcm963xx Image Tag parsing into its own partition parser. This
-Allows reusing the parser with different full flash parsers.
-
-While moving it, rename it to bcm963* to better reflect it isn't chip
-but board specific.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
-I tried to keep the code as-is, to keep the changes as small as
-possible.
-
-One side effect is that the partitions get renumbered, which means any
-root=/dev/mtdblock* will now point to the wrong mtd device. But since
-bcm963xx boards will require these hardcoded in the kernel commandline
-anyway this should b a non issue, as it can be easily updated.
-
-There is no such thing in the mips/bcm63xx defconfig, so nothing to update
-there.
-
- drivers/mtd/Kconfig | 1 +
- drivers/mtd/bcm63xxpart.c | 155 ++----------------------
- drivers/mtd/parsers/Kconfig | 11 ++
- drivers/mtd/parsers/Makefile | 1 +
- drivers/mtd/parsers/parser_imagetag.c | 214 ++++++++++++++++++++++++++++++++++
- 5 files changed, 235 insertions(+), 147 deletions(-)
- create mode 100644 drivers/mtd/parsers/parser_imagetag.c
-
---- a/drivers/mtd/Kconfig
-+++ b/drivers/mtd/Kconfig
-@@ -163,6 +163,7 @@ config MTD_BCM63XX_PARTS
- tristate "BCM63XX CFE partitioning support"
- depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
- select CRC32
-+ select MTD_PARSER_IMAGETAG
- help
- This provides partions parsing for BCM63xx devices with CFE
- bootloaders.
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -93,51 +93,19 @@ static int bcm63xx_read_nvram(struct mtd
- return 0;
- }
-
--static int bcm63xx_read_image_tag(struct mtd_info *master, const char *name,
-- loff_t tag_offset, struct bcm_tag *buf)
--{
-- int ret;
-- size_t retlen;
-- u32 computed_crc;
--
-- ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
-- if (ret)
-- return ret;
--
-- if (retlen != sizeof(*buf))
-- return -EIO;
--
-- computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
-- offsetof(struct bcm_tag, header_crc));
-- if (computed_crc == buf->header_crc) {
-- STR_NULL_TERMINATE(buf->board_id);
-- STR_NULL_TERMINATE(buf->tag_version);
--
-- pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
-- name, tag_offset, buf->tag_version, buf->board_id);
--
-- return 0;
-- }
--
-- pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
-- name, tag_offset, buf->header_crc, computed_crc);
-- return 1;
--}
-+static const char * const bcm63xx_cfe_part_types[] = {
-+ "bcm963xx-imagetag",
-+ NULL,
-+};
-
- static int bcm63xx_parse_cfe_nor_partitions(struct mtd_info *master,
- const struct mtd_partition **pparts, struct bcm963xx_nvram *nvram)
- {
-- /* CFE, NVRAM and global Linux are always present */
-- int nrparts = 3, curpart = 0;
-- struct bcm_tag *buf = NULL;
- struct mtd_partition *parts;
-- int ret;
-- unsigned int rootfsaddr, kerneladdr, spareaddr;
-- unsigned int rootfslen, kernellen, sparelen, totallen;
-+ int nrparts = 3, curpart = 0;
- unsigned int cfelen, nvramlen;
- unsigned int cfe_erasesize;
- int i;
-- bool rootfs_first = false;
-
- cfe_erasesize = max_t(uint32_t, master->erasesize,
- BCM963XX_CFE_BLOCK_SIZE);
-@@ -146,83 +114,9 @@ static int bcm63xx_parse_cfe_nor_partiti
- nvramlen = nvram->psi_size * SZ_1K;
- nvramlen = roundup(nvramlen, cfe_erasesize);
-
-- buf = vmalloc(sizeof(struct bcm_tag));
-- if (!buf)
-- return -ENOMEM;
--
-- /* Get the tag */
-- ret = bcm63xx_read_image_tag(master, "rootfs", cfelen, buf);
-- if (!ret) {
-- STR_NULL_TERMINATE(buf->flash_image_start);
-- if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
-- rootfsaddr < BCM963XX_EXTENDED_SIZE) {
-- pr_err("invalid rootfs address: %*ph\n",
-- (int)sizeof(buf->flash_image_start),
-- buf->flash_image_start);
-- goto invalid_tag;
-- }
--
-- STR_NULL_TERMINATE(buf->kernel_address);
-- if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
-- kerneladdr < BCM963XX_EXTENDED_SIZE) {
-- pr_err("invalid kernel address: %*ph\n",
-- (int)sizeof(buf->kernel_address),
-- buf->kernel_address);
-- goto invalid_tag;
-- }
--
-- STR_NULL_TERMINATE(buf->kernel_length);
-- if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
-- pr_err("invalid kernel length: %*ph\n",
-- (int)sizeof(buf->kernel_length),
-- buf->kernel_length);
-- goto invalid_tag;
-- }
--
-- STR_NULL_TERMINATE(buf->total_length);
-- if (kstrtouint(buf->total_length, 10, &totallen)) {
-- pr_err("invalid total length: %*ph\n",
-- (int)sizeof(buf->total_length),
-- buf->total_length);
-- goto invalid_tag;
-- }
--
-- kerneladdr = kerneladdr - BCM963XX_EXTENDED_SIZE;
-- rootfsaddr = rootfsaddr - BCM963XX_EXTENDED_SIZE;
-- spareaddr = roundup(totallen, master->erasesize) + cfelen;
--
-- if (rootfsaddr < kerneladdr) {
-- /* default Broadcom layout */
-- rootfslen = kerneladdr - rootfsaddr;
-- rootfs_first = true;
-- } else {
-- /* OpenWrt layout */
-- rootfsaddr = kerneladdr + kernellen;
-- rootfslen = spareaddr - rootfsaddr;
-- }
-- } else if (ret > 0) {
--invalid_tag:
-- kernellen = 0;
-- rootfslen = 0;
-- rootfsaddr = 0;
-- spareaddr = cfelen;
-- } else {
-- goto out;
-- }
-- sparelen = master->size - spareaddr - nvramlen;
--
-- /* Determine number of partitions */
-- if (rootfslen > 0)
-- nrparts++;
--
-- if (kernellen > 0)
-- nrparts++;
--
- parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
-- if (!parts) {
-- ret = -ENOMEM;
-- goto out;
-- }
-+ if (!parts)
-+ return -ENOMEM;
-
- /* Start building partition list */
- parts[curpart].name = "CFE";
-@@ -230,30 +124,6 @@ invalid_tag:
- parts[curpart].size = cfelen;
- curpart++;
-
-- if (kernellen > 0) {
-- int kernelpart = curpart;
--
-- if (rootfslen > 0 && rootfs_first)
-- kernelpart++;
-- parts[kernelpart].name = "kernel";
-- parts[kernelpart].offset = kerneladdr;
-- parts[kernelpart].size = kernellen;
-- curpart++;
-- }
--
-- if (rootfslen > 0) {
-- int rootfspart = curpart;
--
-- if (kernellen > 0 && rootfs_first)
-- rootfspart--;
-- parts[rootfspart].name = "rootfs";
-- parts[rootfspart].offset = rootfsaddr;
-- parts[rootfspart].size = rootfslen;
-- if (sparelen > 0 && !rootfs_first)
-- parts[rootfspart].size += sparelen;
-- curpart++;
-- }
--
- parts[curpart].name = "nvram";
- parts[curpart].offset = master->size - nvramlen;
- parts[curpart].size = nvramlen;
-@@ -263,22 +133,13 @@ invalid_tag:
- parts[curpart].name = "linux";
- parts[curpart].offset = cfelen;
- parts[curpart].size = master->size - cfelen - nvramlen;
-+ parts[curpart].types = bcm63xx_cfe_part_types;
-
- for (i = 0; i < nrparts; i++)
- pr_info("Partition %d is %s offset %llx and length %llx\n", i,
- parts[i].name, parts[i].offset, parts[i].size);
-
-- pr_info("Spare partition is offset %x and length %x\n", spareaddr,
-- sparelen);
--
- *pparts = parts;
-- ret = 0;
--
--out:
-- vfree(buf);
--
-- if (ret)
-- return ret;
-
- return nrparts;
- }
---- a/drivers/mtd/parsers/Kconfig
-+++ b/drivers/mtd/parsers/Kconfig
-@@ -1,3 +1,14 @@
-+config MTD_PARSER_IMAGETAG
-+ tristate "Parser for BCM963XX Image Tag format partitions"
-+ depends on BCM63XX || BMIPS || COMPILE_TEST
-+ select CRC32
-+ help
-+ Image Tag is the firmware header used by broadcom on their xDSL line
-+ of devices. It is used to describe the offsets and lengths of kernel
-+ and rootfs partitions.
-+ This driver adds support for parsing a partition with an Image Tag
-+ header and creates up to two partitions, kernel and rootfs.
-+
- config MTD_PARSER_TRX
- tristate "Parser for TRX format partitions"
- depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST)
---- a/drivers/mtd/parsers/Makefile
-+++ b/drivers/mtd/parsers/Makefile
-@@ -1 +1,2 @@
-+obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o
- obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o
---- /dev/null
-+++ b/drivers/mtd/parsers/parser_imagetag.c
-@@ -0,0 +1,214 @@
-+/*
-+ * BCM63XX CFE image tag parser
-+ *
-+ * Copyright © 2006-2008 Florian Fainelli <florian@openwrt.org>
-+ * Mike Albon <malbon@openwrt.org>
-+ * Copyright © 2009-2010 Daniel Dickinson <openwrt@cshore.neomailbox.net>
-+ * Copyright © 2011-2013 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ */
-+
-+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-+
-+#include <linux/bcm963xx_tag.h>
-+#include <linux/crc32.h>
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/sizes.h>
-+#include <linux/slab.h>
-+#include <linux/vmalloc.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+
-+/* Ensure strings read from flash structs are null terminated */
-+#define STR_NULL_TERMINATE(x) \
-+ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
-+
-+static int bcm963xx_read_imagetag(struct mtd_info *master, const char *name,
-+ loff_t tag_offset, struct bcm_tag *buf)
-+{
-+ int ret;
-+ size_t retlen;
-+ u32 computed_crc;
-+
-+ ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
-+ if (ret)
-+ return ret;
-+
-+ if (retlen != sizeof(*buf))
-+ return -EIO;
-+
-+ computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
-+ offsetof(struct bcm_tag, header_crc));
-+ if (computed_crc == buf->header_crc) {
-+ STR_NULL_TERMINATE(buf->board_id);
-+ STR_NULL_TERMINATE(buf->tag_version);
-+
-+ pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
-+ name, tag_offset, buf->tag_version, buf->board_id);
-+
-+ return 0;
-+ }
-+
-+ pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
-+ name, tag_offset, buf->header_crc, computed_crc);
-+ return -EINVAL;
-+}
-+
-+static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master,
-+ const struct mtd_partition **pparts,
-+ struct mtd_part_parser_data *data)
-+{
-+ /* CFE, NVRAM and global Linux are always present */
-+ int nrparts = 0, curpart = 0;
-+ struct bcm_tag *buf = NULL;
-+ struct mtd_partition *parts;
-+ int ret;
-+ unsigned int rootfsaddr, kerneladdr, spareaddr, offset;
-+ unsigned int rootfslen, kernellen, sparelen, totallen;
-+ int i;
-+ bool rootfs_first = false;
-+
-+ buf = vmalloc(sizeof(struct bcm_tag));
-+ if (!buf)
-+ return -ENOMEM;
-+
-+ /* Get the tag */
-+ ret = bcm963xx_read_imagetag(master, "rootfs", 0, buf);
-+ if (!ret) {
-+ STR_NULL_TERMINATE(buf->flash_image_start);
-+ if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
-+ rootfsaddr < BCM963XX_EXTENDED_SIZE) {
-+ pr_err("invalid rootfs address: %*ph\n",
-+ (int)sizeof(buf->flash_image_start),
-+ buf->flash_image_start);
-+ goto out;
-+ }
-+
-+ STR_NULL_TERMINATE(buf->kernel_address);
-+ if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
-+ kerneladdr < BCM963XX_EXTENDED_SIZE) {
-+ pr_err("invalid kernel address: %*ph\n",
-+ (int)sizeof(buf->kernel_address),
-+ buf->kernel_address);
-+ goto out;
-+ }
-+
-+ STR_NULL_TERMINATE(buf->kernel_length);
-+ if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
-+ pr_err("invalid kernel length: %*ph\n",
-+ (int)sizeof(buf->kernel_length),
-+ buf->kernel_length);
-+ goto out;
-+ }
-+
-+ STR_NULL_TERMINATE(buf->total_length);
-+ if (kstrtouint(buf->total_length, 10, &totallen)) {
-+ pr_err("invalid total length: %*ph\n",
-+ (int)sizeof(buf->total_length),
-+ buf->total_length);
-+ goto out;
-+ }
-+
-+ /*
-+ * Addresses are flash absolute, so convert to partition
-+ * relative addresses. Assume either kernel or rootfs will
-+ * directly follow the image tag.
-+ */
-+ if (rootfsaddr < kerneladdr)
-+ offset = rootfsaddr - sizeof(struct bcm_tag);
-+ else
-+ offset = kerneladdr - sizeof(struct bcm_tag);
-+
-+ kerneladdr = kerneladdr - offset;
-+ rootfsaddr = rootfsaddr - offset;
-+ spareaddr = roundup(totallen, master->erasesize);
-+
-+ if (rootfsaddr < kerneladdr) {
-+ /* default Broadcom layout */
-+ rootfslen = kerneladdr - rootfsaddr;
-+ rootfs_first = true;
-+ } else {
-+ /* OpenWrt layout */
-+ rootfsaddr = kerneladdr + kernellen;
-+ rootfslen = spareaddr - rootfsaddr;
-+ }
-+ } else {
-+ goto out;
-+ }
-+ sparelen = master->size - spareaddr;
-+
-+ /* Determine number of partitions */
-+ if (rootfslen > 0)
-+ nrparts++;
-+
-+ if (kernellen > 0)
-+ nrparts++;
-+
-+ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
-+ if (!parts) {
-+ ret = -ENOMEM;
-+ goto out;
-+ }
-+
-+ /* Start building partition list */
-+ if (kernellen > 0) {
-+ int kernelpart = curpart;
-+
-+ if (rootfslen > 0 && rootfs_first)
-+ kernelpart++;
-+ parts[kernelpart].name = "kernel";
-+ parts[kernelpart].offset = kerneladdr;
-+ parts[kernelpart].size = kernellen;
-+ curpart++;
-+ }
-+
-+ if (rootfslen > 0) {
-+ int rootfspart = curpart;
-+
-+ if (kernellen > 0 && rootfs_first)
-+ rootfspart--;
-+ parts[rootfspart].name = "rootfs";
-+ parts[rootfspart].offset = rootfsaddr;
-+ parts[rootfspart].size = rootfslen;
-+ if (sparelen > 0 && !rootfs_first)
-+ parts[rootfspart].size += sparelen;
-+ curpart++;
-+ }
-+
-+ for (i = 0; i < nrparts; i++)
-+ pr_info("Partition %d is %s offset %llx and length %llx\n", i,
-+ parts[i].name, parts[i].offset, parts[i].size);
-+
-+ pr_info("Spare partition is offset %x and length %x\n", spareaddr,
-+ sparelen);
-+
-+ *pparts = parts;
-+ ret = 0;
-+
-+out:
-+ vfree(buf);
-+
-+ if (ret)
-+ return ret;
-+
-+ return nrparts;
-+}
-+
-+static struct mtd_part_parser bcm963xx_imagetag_parser = {
-+ .parse_fn = bcm963xx_parse_imagetag_partitions,
-+ .name = "bcm963xx-imagetag",
-+};
-+module_mtd_part_parser(bcm963xx_imagetag_parser);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Daniel Dickinson <openwrt@cshore.neomailbox.net>");
-+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
-+MODULE_AUTHOR("Mike Albon <malbon@openwrt.org>");
-+MODULE_AUTHOR("Jonas Gorski <jonas.gorski@gmail.com");
-+MODULE_DESCRIPTION("MTD parser for BCM963XX CFE Image Tag partitions");
+++ /dev/null
-From 89cd5efa4a0d342b860a726bb1d382e4db4b96a4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 28 Jun 2017 18:34:42 +0200
-Subject: [PATCH 1/2] mtd: bcm63xxpart: add of_match_table
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/mtd/bcm63xxpart.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -34,6 +34,7 @@
- #include <linux/vmalloc.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
-+#include <linux/of.h>
-
- #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
-
-@@ -172,9 +173,16 @@ out:
- return ret;
- };
-
-+static const struct of_device_id parse_bcm63xx_cfe_match_table[] = {
-+ { .compatible = "brcm,bcm963xx-cfe-nor-partitions" },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, parse_bcm63xx_cfe_match_table);
-+
- static struct mtd_part_parser bcm63xx_cfe_parser = {
- .parse_fn = bcm63xx_parse_cfe_partitions,
- .name = "bcm63xxpart",
-+ .of_match_table = parse_bcm63xx_cfe_match_table,
- };
- module_mtd_part_parser(bcm63xx_cfe_parser);
-
+++ /dev/null
-From 3303dd9f5b197cc2efd9cbd7b9b45fc1e510a393 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 28 Jun 2017 18:37:12 +0200
-Subject: [PATCH 2/2] mtd: parser_bcm63xx_imagetag: add of_match_table support
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/mtd/parsers/parser_imagetag.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/mtd/parsers/parser_imagetag.c
-+++ b/drivers/mtd/parsers/parser_imagetag.c
-@@ -24,6 +24,7 @@
- #include <linux/vmalloc.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
-+#include <linux/of.h>
-
- /* Ensure strings read from flash structs are null terminated */
- #define STR_NULL_TERMINATE(x) \
-@@ -200,9 +201,16 @@ out:
- return nrparts;
- }
-
-+static const struct of_device_id parse_bcm963xx_imagetag_match_table[] = {
-+ { .compatible = "brcm,bcm963xx-imagetag" },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, parse_bcm963xx_imagetag_match_table);
-+
- static struct mtd_part_parser bcm963xx_imagetag_parser = {
- .parse_fn = bcm963xx_parse_imagetag_partitions,
- .name = "bcm963xx-imagetag",
-+ .of_match_table = parse_bcm963xx_imagetag_match_table,
- };
- module_mtd_part_parser(bcm963xx_imagetag_parser);
-
+++ /dev/null
-From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:07:42 +0200
-Subject: [PATCH 01/13] pinctrl: add bcm63xx base code
-
-Setup directory and add a helper for bcm63xx pinctrl support.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/Kconfig | 1 +
- drivers/pinctrl/Makefile | 1 +
- drivers/pinctrl/bcm63xx/Kconfig | 3 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++
- 7 files changed, 163 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/Kconfig
- create mode 100644 drivers/pinctrl/bcm63xx/Makefile
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -351,6 +351,7 @@ config PINCTRL_RK805
-
- source "drivers/pinctrl/aspeed/Kconfig"
- source "drivers/pinctrl/bcm/Kconfig"
-+source "drivers/pinctrl/bcm63xx/Kconfig"
- source "drivers/pinctrl/berlin/Kconfig"
- source "drivers/pinctrl/freescale/Kconfig"
- source "drivers/pinctrl/intel/Kconfig"
---- a/drivers/pinctrl/Makefile
-+++ b/drivers/pinctrl/Makefile
-@@ -48,6 +48,7 @@ obj-$(CONFIG_PINCTRL_RK805) += pinctrl-r
-
- obj-$(CONFIG_ARCH_ASPEED) += aspeed/
- obj-y += bcm/
-+obj-y += bcm63xx/
- obj-$(CONFIG_PINCTRL_BERLIN) += berlin/
- obj-y += freescale/
- obj-$(CONFIG_X86) += intel/
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -0,0 +1,3 @@
-+config PINCTRL_BCM63XX
-+ bool
-+ select GPIO_GENERIC
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -0,0 +1 @@
-+obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
-@@ -0,0 +1,155 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/device.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/of_irq.h>
-+
-+#include "pinctrl-bcm63xx.h"
-+#include "../core.h"
-+
-+#define BANK_SIZE sizeof(u32)
-+#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE)
-+
-+#ifdef CONFIG_OF
-+static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc,
-+ const struct of_phandle_args *gpiospec,
-+ u32 *flags)
-+{
-+ struct gpio_chip *base = gpiochip_get_data(gc);
-+ int pin = gpiospec->args[0];
-+
-+ if (gc != &base[pin / PINS_PER_BANK])
-+ return -EINVAL;
-+
-+ pin = pin % PINS_PER_BANK;
-+
-+ if (pin >= gc->ngpio)
-+ return -EINVAL;
-+
-+ if (flags)
-+ *flags = gpiospec->args[1];
-+
-+ return pin;
-+}
-+#endif
-+
-+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
-+{
-+ struct gpio_chip *base = gpiochip_get_data(chip);
-+ char irq_name[7]; /* "gpioXX" */
-+
-+ /* FIXME: this is ugly */
-+ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base));
-+ return of_irq_get_byname(chip->of_node, irq_name);
-+}
-+
-+static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc,
-+ void __iomem *dirout, void __iomem *data,
-+ size_t sz, int ngpio)
-+
-+{
-+ int banks, chips, i, ret = -EINVAL;
-+
-+ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+ banks = sz / BANK_SIZE;
-+
-+ for (i = 0; i < chips; i++) {
-+ int offset, pins;
-+ int reg_offset;
-+ char *label;
-+
-+ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i);
-+ if (!label)
-+ return -ENOMEM;
-+
-+ offset = i * PINS_PER_BANK;
-+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+ /* the registers are treated like a huge big endian register */
-+ reg_offset = (banks - i - 1) * BANK_SIZE;
-+
-+ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset,
-+ NULL, NULL, dirout + reg_offset, NULL,
-+ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-+ if (ret)
-+ return ret;
-+
-+ gc[i].request = gpiochip_generic_request;
-+ gc[i].free = gpiochip_generic_free;
-+
-+ if (of_get_property(dev->of_node, "interrupt-names", NULL))
-+ gc[i].to_irq = bcm63xx_gpio_to_irq;
-+
-+#ifdef CONFIG_OF
-+ gc[i].of_gpio_n_cells = 2;
-+ gc[i].of_xlate = bcm63xx_gpio_of_xlate;
-+#endif
-+
-+ gc[i].label = label;
-+ gc[i].ngpio = pins;
-+
-+ devm_gpiochip_add_data(dev, &gc[i], gc);
-+ }
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name,
-+ int ngpio)
-+{
-+ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+
-+ for (i = 0; i < chips; i++) {
-+ int offset, pins;
-+
-+ offset = i * PINS_PER_BANK;
-+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins);
-+ }
-+}
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+ struct pinctrl_desc *desc,
-+ void *priv, struct gpio_chip *gc,
-+ int ngpio)
-+{
-+ struct pinctrl_dev *pctldev;
-+ struct resource *res;
-+ void __iomem *dirout, *data;
-+ size_t sz;
-+ int ret;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout");
-+ dirout = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(dirout))
-+ return ERR_CAST(dirout);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
-+ data = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(data))
-+ return ERR_CAST(data);
-+
-+ sz = resource_size(res);
-+
-+ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio);
-+ if (ret)
-+ return ERR_PTR(ret);
-+
-+ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv);
-+ if (IS_ERR(pctldev))
-+ return pctldev;
-+
-+ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio);
-+
-+ dev_info(&pdev->dev, "registered at mmio %p\n", dirout);
-+
-+ return pctldev;
-+}
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-@@ -0,0 +1,14 @@
-+#ifndef __PINCTRL_BCM63XX
-+#define __PINCTRL_BCM63XX
-+
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/pinctrl/pinctrl.h>
-+#include <linux/platform_device.h>
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+ struct pinctrl_desc *desc,
-+ void *priv, struct gpio_chip *gc,
-+ int ngpio);
-+
-+#endif
+++ /dev/null
-From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:33:56 +0200
-Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6328 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt | 61 ++++++++++++++++++++++
- 1 file changed, 61 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-@@ -0,0 +1,61 @@
-+* Broadcom BCM6328 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6328-pinctrl".
-+- reg: Register specifies of dirout, dat, mode, mux registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6328-pinctrl";
-+ reg = <0x10000080 0x8>,
-+ <0x10000088 0x8>,
-+ <0x10000098 0x4>,
-+ <0x1000009c 0xc>;
-+ reg-names = "dirout", "dat", "mode", "mux";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led
-+gpio1 1 led
-+gpio2 2 led
-+gpio3 3 led
-+gpio4 4 led
-+gpio5 5 led
-+gpio6 6 led, serial_led_data
-+gpio7 7 led, serial_led_clk
-+gpio8 8 led
-+gpio9 9 led
-+gpio10 10 led
-+gpio11 11 led
-+gpio12 12 led
-+gpio13 13 led
-+gpio14 14 led
-+gpio15 15 led
-+gpio16 16 led, pcie_clkreq
-+gpio17 17 led
-+gpio18 18 led
-+gpio19 19 led
-+gpio20 20 led
-+gpio21 21 led
-+gpio22 22 led
-+gpio23 23 led
-+gpio24 24 -
-+gpio25 25 ephy0_act_led
-+gpio26 26 ephy1_act_led
-+gpio27 27 ephy2_act_led
-+gpio28 28 ephy3_act_led
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+hsspi_cs1 - hsspi_cs1
-+usb_port1 - usb_host_port, usb_device_port
+++ /dev/null
-From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:12:50 +0200
-Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328
-
-Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
-GPIOs, as LEDs for the integrated LED controller, or various other
-functions. Its pincontrol mux registers also control other aspects, like
-switching the second USB port between host and device mode.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++
- 3 files changed, 464 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -1,3 +1,10 @@
- config PINCTRL_BCM63XX
- bool
- select GPIO_GENERIC
-+
-+config PINCTRL_BCM6328
-+ bool "BCM6328 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
-@@ -0,0 +1,456 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/machine.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6328_MUX_LO_REG 0x4
-+#define BCM6328_MUX_HI_REG 0x0
-+#define BCM6328_MUX_OTHER_REG 0x8
-+
-+#define BCM6328_NGPIO 32
-+
-+struct bcm6328_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6328_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned mode_val:1;
-+ unsigned mux_val:2;
-+};
-+
-+struct bcm6328_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ void __iomem *mux[3];
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio;
-+};
-+
-+static const struct pinctrl_pin_desc bcm6328_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+
-+ /*
-+ * No idea where they really are; so let's put them according
-+ * to their mux offsets.
-+ */
-+ PINCTRL_PIN(36, "hsspi_cs1"),
-+ PINCTRL_PIN(38, "usb_p2"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+
-+static unsigned hsspi_cs1_pins[] = { 36 };
-+static unsigned usb_port1_pins[] = { 38 };
-+
-+#define BCM6328_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6328_pingroup bcm6328_groups[] = {
-+ BCM6328_GROUP(gpio0),
-+ BCM6328_GROUP(gpio1),
-+ BCM6328_GROUP(gpio2),
-+ BCM6328_GROUP(gpio3),
-+ BCM6328_GROUP(gpio4),
-+ BCM6328_GROUP(gpio5),
-+ BCM6328_GROUP(gpio6),
-+ BCM6328_GROUP(gpio7),
-+ BCM6328_GROUP(gpio8),
-+ BCM6328_GROUP(gpio9),
-+ BCM6328_GROUP(gpio10),
-+ BCM6328_GROUP(gpio11),
-+ BCM6328_GROUP(gpio12),
-+ BCM6328_GROUP(gpio13),
-+ BCM6328_GROUP(gpio14),
-+ BCM6328_GROUP(gpio15),
-+ BCM6328_GROUP(gpio16),
-+ BCM6328_GROUP(gpio17),
-+ BCM6328_GROUP(gpio18),
-+ BCM6328_GROUP(gpio19),
-+ BCM6328_GROUP(gpio20),
-+ BCM6328_GROUP(gpio21),
-+ BCM6328_GROUP(gpio22),
-+ BCM6328_GROUP(gpio23),
-+ BCM6328_GROUP(gpio24),
-+ BCM6328_GROUP(gpio25),
-+ BCM6328_GROUP(gpio26),
-+ BCM6328_GROUP(gpio27),
-+ BCM6328_GROUP(gpio28),
-+ BCM6328_GROUP(gpio29),
-+ BCM6328_GROUP(gpio30),
-+ BCM6328_GROUP(gpio31),
-+
-+ BCM6328_GROUP(hsspi_cs1),
-+ BCM6328_GROUP(usb_port1),
-+};
-+
-+/* GPIO_MODE */
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+/* PINMUX_SEL */
-+static const char * const serial_led_data_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_act_led_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const pcie_clkreq_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const ephy0_act_led_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ephy1_act_led_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ephy2_act_led_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const ephy3_act_led_groups[] = {
-+ "gpio28",
-+};
-+
-+static const char * const hsspi_cs1_groups[] = {
-+ "hsspi_cs1"
-+};
-+
-+static const char * const usb_host_port_groups[] = {
-+ "usb_port1",
-+};
-+
-+static const char * const usb_device_port_groups[] = {
-+ "usb_port1",
-+};
-+
-+#define BCM6328_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mode_val = 1, \
-+ }
-+
-+#define BCM6328_MUX_FUN(n, mux) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mux_val = mux, \
-+ }
-+
-+static const struct bcm6328_function bcm6328_funcs[] = {
-+ BCM6328_MODE_FUN(led),
-+ BCM6328_MUX_FUN(serial_led_data, 2),
-+ BCM6328_MUX_FUN(serial_led_clk, 2),
-+ BCM6328_MUX_FUN(inet_act_led, 1),
-+ BCM6328_MUX_FUN(pcie_clkreq, 2),
-+ BCM6328_MUX_FUN(ephy0_act_led, 1),
-+ BCM6328_MUX_FUN(ephy1_act_led, 1),
-+ BCM6328_MUX_FUN(ephy2_act_led, 1),
-+ BCM6328_MUX_FUN(ephy3_act_led, 1),
-+ BCM6328_MUX_FUN(hsspi_cs1, 2),
-+ BCM6328_MUX_FUN(usb_host_port, 1),
-+ BCM6328_MUX_FUN(usb_device_port, 2),
-+};
-+
-+static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6328_groups);
-+}
-+
-+static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6328_groups[group].name;
-+}
-+
-+static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6328_groups[group].pins;
-+ *num_pins = bcm6328_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6328_funcs);
-+}
-+
-+static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6328_funcs[selector].name;
-+}
-+
-+static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6328_funcs[selector].groups;
-+ *num_groups = bcm6328_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
-+ u32 mode, u32 mux)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (pin < 32) {
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~BIT(pin);
-+ if (mode)
-+ reg |= BIT(pin);
-+ __raw_writel(reg, pctl->mode);
-+ }
-+
-+ reg = __raw_readl(pctl->mux[pin / 16]);
-+ reg &= ~(3UL << ((pin % 16) * 2));
-+ reg |= mux << ((pin % 16) * 2);
-+ __raw_writel(reg, pctl->mux[pin / 16]);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
-+ const struct bcm6328_function *f = &bcm6328_funcs[selector];
-+
-+ bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
-+
-+ return 0;
-+}
-+
-+static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm6328_rmw_mux(pctl, offset, 0, 0);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6328_pctl_ops = {
-+ .get_groups_count = bcm6328_pinctrl_get_group_count,
-+ .get_group_name = bcm6328_pinctrl_get_group_name,
-+ .get_group_pins = bcm6328_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6328_pmx_ops = {
-+ .get_functions_count = bcm6328_pinctrl_get_func_count,
-+ .get_function_name = bcm6328_pinctrl_get_func_name,
-+ .get_function_groups = bcm6328_pinctrl_get_groups,
-+ .set_mux = bcm6328_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6328_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6328_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6328_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode, *mux;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+ mux = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mux))
-+ return PTR_ERR(mux);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+ pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
-+ pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
-+ pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6328_pctl_ops;
-+ pctl->desc.pmxops = &bcm6328_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
-+ pctl->desc.pins = bcm6328_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ &pctl->gpio, BCM6328_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6328_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6328-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6328_pinctrl_driver = {
-+ .probe = bcm6328_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6328-pinctrl",
-+ .of_match_table = bcm6328_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6328_pinctrl_driver);
+++ /dev/null
-From 962c46bf7f43df730e2d3698930e77958cc6b191 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:35:45 +0200
-Subject: [PATCH 04/16] Documentation: add BCM6348 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6348 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt | 32 ++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
-@@ -0,0 +1,32 @@
-+* Broadcom BCM6348 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6348-pinctrl".
-+- reg: register Specifiers of dirout, dat, mode registers.
-+- reg-names: Must be "dirout", "dat", "mode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@fffe0080 {
-+ compatible = "brcm,bcm6348-pinctrl";
-+ reg = <0xfffe0080 0x8>,
-+ <0xfffe0088 0x8>,
-+ <0xfffe0098 0x4>;
-+ reg-names = "dirout", "dat", "mode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+group0 32-36 ext_mii, utopia, diag
-+group1 22-31 ext_ephy, mii_snoop, mii_pccard,
-+ spi_master_uart, utopia, diag
-+group2 16-21 pci, diag
-+group3 8-15 ext_mii, utopia
-+group4 0-7 ext_ephy, mii_snoop, legacy_led, diag
+++ /dev/null
-From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:14:13 +0200
-Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348
-
-Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of
-up to ten gpios into fourteen potential functions. It does not allow
-muxing individual pins. Some functions require more than one group to be
-muxed to the same function.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 391 ++++++++++++++++++++++++++++++
- 3 files changed, 399 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -8,3 +8,10 @@ config PINCTRL_BCM6328
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6348
-+ bool "BCM6348 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,2 +1,3 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
-+obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
-@@ -0,0 +1,391 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/machine.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6348_NGPIO 37
-+
-+#define MAX_GROUP 4
-+#define PINS_PER_GROUP 8
-+#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP))
-+#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4)
-+#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin))
-+
-+struct bcm6348_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6348_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+ unsigned int value;
-+};
-+
-+struct bcm6348_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6348_PIN(a, b, group) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(group), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6348_pins[] = {
-+ BCM6348_PIN(0, "gpio0", 4),
-+ BCM6348_PIN(1, "gpio1", 4),
-+ BCM6348_PIN(2, "gpio2", 4),
-+ BCM6348_PIN(3, "gpio3", 4),
-+ BCM6348_PIN(4, "gpio4", 4),
-+ BCM6348_PIN(5, "gpio5", 4),
-+ BCM6348_PIN(6, "gpio6", 4),
-+ BCM6348_PIN(7, "gpio7", 4),
-+ BCM6348_PIN(8, "gpio8", 3),
-+ BCM6348_PIN(9, "gpio9", 3),
-+ BCM6348_PIN(10, "gpio10", 3),
-+ BCM6348_PIN(11, "gpio11", 3),
-+ BCM6348_PIN(12, "gpio12", 3),
-+ BCM6348_PIN(13, "gpio13", 3),
-+ BCM6348_PIN(14, "gpio14", 3),
-+ BCM6348_PIN(15, "gpio15", 3),
-+ BCM6348_PIN(16, "gpio16", 2),
-+ BCM6348_PIN(17, "gpio17", 2),
-+ BCM6348_PIN(18, "gpio18", 2),
-+ BCM6348_PIN(19, "gpio19", 2),
-+ BCM6348_PIN(20, "gpio20", 2),
-+ BCM6348_PIN(21, "gpio21", 2),
-+ BCM6348_PIN(22, "gpio22", 1),
-+ BCM6348_PIN(23, "gpio23", 1),
-+ BCM6348_PIN(24, "gpio24", 1),
-+ BCM6348_PIN(25, "gpio25", 1),
-+ BCM6348_PIN(26, "gpio26", 1),
-+ BCM6348_PIN(27, "gpio27", 1),
-+ BCM6348_PIN(28, "gpio28", 1),
-+ BCM6348_PIN(29, "gpio29", 1),
-+ BCM6348_PIN(30, "gpio30", 1),
-+ BCM6348_PIN(31, "gpio31", 1),
-+ BCM6348_PIN(32, "gpio32", 0),
-+ BCM6348_PIN(33, "gpio33", 0),
-+ BCM6348_PIN(34, "gpio34", 0),
-+ BCM6348_PIN(35, "gpio35", 0),
-+ BCM6348_PIN(36, "gpio36", 0),
-+};
-+
-+enum bcm6348_muxes {
-+ BCM6348_MUX_GPIO = 0,
-+ BCM6348_MUX_EXT_EPHY,
-+ BCM6348_MUX_MII_SNOOP,
-+ BCM6348_MUX_LEGACY_LED,
-+ BCM6348_MUX_MII_PCCARD,
-+ BCM6348_MUX_PCI,
-+ BCM6348_MUX_SPI_MASTER_UART,
-+ BCM6348_MUX_EXT_MII,
-+ BCM6348_MUX_UTOPIA,
-+ BCM6348_MUX_DIAG,
-+};
-+
-+static unsigned group0_pins[] = {
-+ 32, 33, 34, 35, 36,
-+};
-+
-+static unsigned group1_pins[] = {
-+ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned group2_pins[] = {
-+ 16, 17, 18, 19, 20, 21,
-+};
-+
-+static unsigned group3_pins[] = {
-+ 8, 9, 10, 11, 12, 13, 14, 15,
-+};
-+
-+static unsigned group4_pins[] = {
-+ 0, 1, 2, 3, 4, 5, 6, 7,
-+};
-+
-+#define BCM6348_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ } \
-+
-+static struct bcm6348_pingroup bcm6348_groups[] = {
-+ BCM6348_GROUP(group0),
-+ BCM6348_GROUP(group1),
-+ BCM6348_GROUP(group2),
-+ BCM6348_GROUP(group3),
-+ BCM6348_GROUP(group4),
-+};
-+
-+static const char * const ext_mii_groups[] = {
-+ "group0",
-+ "group3",
-+};
-+
-+static const char * const ext_ephy_groups[] = {
-+ "group1",
-+ "group4"
-+};
-+
-+static const char * const mii_snoop_groups[] = {
-+ "group1",
-+ "group4",
-+};
-+
-+static const char * const legacy_led_groups[] = {
-+ "group4",
-+};
-+
-+static const char * const mii_pccard_groups[] = {
-+ "group1",
-+};
-+
-+static const char * const pci_groups[] = {
-+ "group2",
-+};
-+
-+static const char * const spi_master_uart_groups[] = {
-+ "group1",
-+};
-+
-+static const char * const utopia_groups[] = {
-+ "group0",
-+ "group1",
-+ "group3",
-+};
-+
-+static const char * const diag_groups[] = {
-+ "group0",
-+ "group1",
-+ "group2",
-+ "group4",
-+};
-+
-+#define BCM6348_FUN(n, f) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .value = BCM6348_MUX_##f, \
-+ }
-+
-+static const struct bcm6348_function bcm6348_funcs[] = {
-+ BCM6348_FUN(ext_mii, EXT_MII),
-+ BCM6348_FUN(ext_ephy, EXT_EPHY),
-+ BCM6348_FUN(mii_snoop, MII_SNOOP),
-+ BCM6348_FUN(legacy_led, LEGACY_LED),
-+ BCM6348_FUN(mii_pccard, MII_PCCARD),
-+ BCM6348_FUN(pci, PCI),
-+ BCM6348_FUN(spi_master_uart, SPI_MASTER_UART),
-+ BCM6348_FUN(utopia, UTOPIA),
-+ BCM6348_FUN(diag, DIAG),
-+};
-+
-+static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6348_groups);
-+}
-+
-+static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6348_groups[group].name;
-+}
-+
-+static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6348_groups[group].pins;
-+ *num_pins = bcm6348_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6348_funcs);
-+}
-+
-+static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6348_funcs[selector].name;
-+}
-+
-+static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6348_funcs[selector].groups;
-+ *num_groups = bcm6348_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~mask;
-+ reg |= val & mask;
-+ __raw_writel(reg, pctl->mode);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6348_pingroup *grp = &bcm6348_groups[group];
-+ const struct bcm6348_function *f = &bcm6348_funcs[selector];
-+ u32 mask, val;
-+
-+ /*
-+ * pins n..(n+7) share the same group, so we only need to look at
-+ * the first pin.
-+ */
-+ mask = GROUP_MASK(grp->pins[0]);
-+ val = f->value << GROUP_SHIFT(grp->pins[0]);
-+
-+ bcm6348_rmw_mux(pctl, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ struct pin_desc *desc;
-+ u32 mask;
-+
-+ /* don't reconfigure if already muxed */
-+ desc = pin_desc_get(pctldev, offset);
-+ if (desc->mux_usecount)
-+ return 0;
-+
-+ mask = GROUP_MASK(offset);
-+
-+ /* disable all functions using this pin */
-+ bcm6348_rmw_mux(pctl, mask, 0);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6348_pctl_ops = {
-+ .get_groups_count = bcm6348_pinctrl_get_group_count,
-+ .get_group_name = bcm6348_pinctrl_get_group_name,
-+ .get_group_pins = bcm6348_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6348_pmx_ops = {
-+ .get_functions_count = bcm6348_pinctrl_get_func_count,
-+ .get_function_name = bcm6348_pinctrl_get_func_name,
-+ .get_function_groups = bcm6348_pinctrl_get_groups,
-+ .set_mux = bcm6348_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6348_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6348_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6348_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ /* disable all muxes by default */
-+ __raw_writel(0, pctl->mode);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6348_pctl_ops;
-+ pctl->desc.pmxops = &bcm6348_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6348_pins);
-+ pctl->desc.pins = bcm6348_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6348_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6348_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6348-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6348_pinctrl_driver = {
-+ .probe = bcm6348_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6348-pinctrl",
-+ .of_match_table = bcm6348_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6348_pinctrl_driver);
+++ /dev/null
-From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:00 +0200
-Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6358 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-@@ -0,0 +1,44 @@
-+* Broadcom BCM6358 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6358-pinctrl".
-+- reg: Register specifiers of dirout, dat registers.
-+- reg-names: Must be "dirout", "dat".
-+- brcm,gpiomode: Phandle to the shared gpiomode register.
-+- gpio-controller: Identifies this node as a gpio-controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@fffe0080 {
-+ compatible = "brcm,bcm6358-pinctrl";
-+ reg = <0xfffe0080 0x8>,
-+ <0xfffe0088 0x8>,
-+ <0xfffe0098 0x4>;
-+ reg-names = "dirout", "dat";
-+ brcm,gpiomode = <&gpiomode>;
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+gpiomode: syscon@fffe0098 {
-+ compatible = "brcm,bcm6358-gpiomode", "syscon";
-+ reg = <0xfffe0098 0x4>;
-+ native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+ebi_cs_grp 30-31 ebi_cs
-+uart1_grp 28-31 uart1
-+spi_cs_grp 32-33 spi_cs
-+async_modem_grp 12-15 async_modem
-+legacy_led_grp 9-15 legacy_led
-+serial_led_grp 6-7 serial_led
-+led_grp 0-3 led
-+utopia_grp 12-15, 22-31 utopia
-+pwm_syn_clk_grp 8 pwm_syn_clk
-+sys_irq_grp 5 sys_irq
+++ /dev/null
-From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:16:01 +0200
-Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
-
-Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
-functions onto the GPIO pins. It does not support configuring individual
-pins but only whole groups. These groups may overlap, and still require
-the directions to be set correctly in the GPIO register. In addition the
-functions register controls other, not directly mux related functions.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 8 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
- 3 files changed, 402 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -15,3 +15,11 @@ config PINCTRL_BCM6348
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6358
-+ bool "BCM6358 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+ select MFD_SYSCON
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,3 +1,4 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
-+obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
-@@ -0,0 +1,393 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/regmap.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+/* GPIO_MODE register */
-+#define BCM6358_MODE_MUX_NONE 0
-+
-+/* overlays on gpio pins */
-+#define BCM6358_MODE_MUX_EBI_CS BIT(5)
-+#define BCM6358_MODE_MUX_UART1 BIT(6)
-+#define BCM6358_MODE_MUX_SPI_CS BIT(7)
-+#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
-+#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
-+#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
-+#define BCM6358_MODE_MUX_LED BIT(11)
-+#define BCM6358_MODE_MUX_UTOPIA BIT(12)
-+#define BCM6358_MODE_MUX_CLKRST BIT(13)
-+#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
-+#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
-+
-+#define BCM6358_NGPIO 40
-+
-+struct bcm6358_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+
-+ const u16 mode_val;
-+
-+ /* non-GPIO function muxes require the gpio direction to be set */
-+ const u16 direction;
-+};
-+
-+struct bcm6358_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+};
-+
-+struct bcm6358_pinctrl {
-+ struct device *dev;
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ struct regmap_field *overlays;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
-+ BCM6358_MODE_MUX_##bit2 | \
-+ BCM6358_MODE_MUX_##bit3), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6358_pins[] = {
-+ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
-+ PINCTRL_PIN(4, "gpio4"),
-+ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
-+ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
-+ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
-+ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
-+ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
-+ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
-+ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
-+ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+};
-+
-+static unsigned ebi_cs_grp_pins[] = { 30, 31 };
-+
-+static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
-+
-+static unsigned spi_cs_grp_pins[] = { 32, 33 };
-+
-+static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
-+
-+static unsigned serial_led_grp_pins[] = { 6, 7 };
-+
-+static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
-+
-+static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
-+
-+static unsigned utopia_grp_pins[] = {
-+ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned pwm_syn_clk_grp_pins[] = { 8 };
-+
-+static unsigned sys_irq_grp_pins[] = { 5 };
-+
-+#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ .mode_val = BCM6358_MODE_MUX_##bit, \
-+ .direction = dir, \
-+ }
-+
-+static const struct bcm6358_pingroup bcm6358_groups[] = {
-+ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
-+ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
-+ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
-+ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
-+ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
-+ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
-+ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
-+ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
-+ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
-+ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
-+};
-+
-+static const char * const ebi_cs_groups[] = {
-+ "ebi_cs_grp"
-+};
-+
-+static const char * const uart1_groups[] = {
-+ "uart1_grp"
-+};
-+
-+static const char * const spi_cs_2_3_groups[] = {
-+ "spi_cs_2_3_grp"
-+};
-+
-+static const char * const async_modem_groups[] = {
-+ "async_modem_grp"
-+};
-+
-+static const char * const legacy_led_groups[] = {
-+ "legacy_led_grp",
-+};
-+
-+static const char * const serial_led_groups[] = {
-+ "serial_led_grp",
-+};
-+
-+static const char * const led_groups[] = {
-+ "led_grp",
-+};
-+
-+static const char * const clkrst_groups[] = {
-+ "clkrst_grp",
-+};
-+
-+static const char * const pwm_syn_clk_groups[] = {
-+ "pwm_syn_clk_grp",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "sys_irq_grp",
-+};
-+
-+#define BCM6358_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ }
-+
-+static const struct bcm6358_function bcm6358_funcs[] = {
-+ BCM6358_FUN(ebi_cs),
-+ BCM6358_FUN(uart1),
-+ BCM6358_FUN(spi_cs_2_3),
-+ BCM6358_FUN(async_modem),
-+ BCM6358_FUN(legacy_led),
-+ BCM6358_FUN(serial_led),
-+ BCM6358_FUN(led),
-+ BCM6358_FUN(clkrst),
-+ BCM6358_FUN(pwm_syn_clk),
-+ BCM6358_FUN(sys_irq),
-+};
-+
-+static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6358_groups);
-+}
-+
-+static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6358_groups[group].name;
-+}
-+
-+static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6358_groups[group].pins;
-+ *num_pins = bcm6358_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6358_funcs);
-+}
-+
-+static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6358_funcs[selector].name;
-+}
-+
-+static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6358_funcs[selector].groups;
-+ *num_groups = bcm6358_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
-+ u32 val = grp->mode_val;
-+ u32 mask = val;
-+ unsigned pin;
-+
-+ for (pin = 0; pin < grp->num_pins; pin++)
-+ mask |= (unsigned long)bcm6358_pins[pin].drv_data;
-+
-+ regmap_field_update_bits(pctl->overlays, mask, val);
-+
-+ for (pin = 0; pin < grp->num_pins; pin++) {
-+ int hw_gpio = bcm6358_pins[pin].number;
-+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
-+
-+ if (grp->direction & BIT(pin))
-+ gc->direction_output(gc, hw_gpio % 32, 0);
-+ else
-+ gc->direction_input(gc, hw_gpio % 32);
-+ }
-+
-+ return 0;
-+}
-+
-+static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ u32 mask;
-+
-+ mask = (unsigned long)bcm6358_pins[offset].drv_data;
-+ if (!mask)
-+ return 0;
-+
-+ /* disable all functions using this pin */
-+ return regmap_field_update_bits(pctl->overlays, mask, 0);
-+}
-+
-+static struct pinctrl_ops bcm6358_pctl_ops = {
-+ .get_groups_count = bcm6358_pinctrl_get_group_count,
-+ .get_group_name = bcm6358_pinctrl_get_group_name,
-+ .get_group_pins = bcm6358_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6358_pmx_ops = {
-+ .get_functions_count = bcm6358_pinctrl_get_func_count,
-+ .get_function_name = bcm6358_pinctrl_get_func_name,
-+ .get_function_groups = bcm6358_pinctrl_get_groups,
-+ .set_mux = bcm6358_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6358_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6358_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6358_pinctrl *pctl;
-+ struct regmap *mode;
-+ struct reg_field overlays = REG_FIELD(0, 0, 15);
-+
-+ if (pdev->dev.of_node)
-+ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+ "brcm,gpiomode");
-+ else
-+ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098");
-+
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
-+ if (IS_ERR(pctl->overlays))
-+ return PTR_ERR(pctl->overlays);
-+
-+ /* disable all muxes by default */
-+ regmap_field_write(pctl->overlays, 0);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6358_pctl_ops;
-+ pctl->desc.pmxops = &bcm6358_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
-+ pctl->desc.pins = bcm6358_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6358_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6358_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6358-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6358_pinctrl_driver = {
-+ .probe = bcm6358_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6358-pinctrl",
-+ .of_match_table = bcm6358_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6358_pinctrl_driver);
+++ /dev/null
-From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:18 +0200
-Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6362 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6362 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl"
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6362-pinctrl";
-+ reg = <0x10000080 0x8>,
-+ <0x10000088 0x8>,
-+ <0x10000090 0x4>,
-+ <0x10000098 0x4>,
-+ <0x1000009c 0x4>,
-+ <0x100000b8 0x4>;
-+ reg-names = "dirout", "dat", "led",
-+ "mode", "ctrl", "basemode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, usb_device_led
-+gpio1 1 led, sys_irq
-+gpio2 2 led, serial_led_clk
-+gpio3 3 led, serial_led_data
-+gpio4 4 led, robosw_led_data
-+gpio5 5 led, robosw_led_clk
-+gpio6 6 led, robosw_led0
-+gpio7 7 led, robosw_led1
-+gpio8 8 led, inet_led
-+gpio9 9 led, spi_cs2
-+gpio10 10 led, spi_cs3
-+gpio11 11 led, ntr_pulse
-+gpio12 12 led, uart1_scts
-+gpio13 13 led, uart1_srts
-+gpio14 14 led, uart1_sdin
-+gpio15 15 led, uart1_sdout
-+gpio16 16 led, adsl_spi_miso
-+gpio17 17 led, adsl_spi_mosi
-+gpio18 18 led, adsl_spi_clk
-+gpio19 19 led, adsl_spi_cs
-+gpio20 20 led, ephy0_led
-+gpio21 21 led, ephy1_led
-+gpio22 22 led, ephy2_led
-+gpio23 23 led, ephy3_led
-+gpio24 24 ext_irq0
-+gpio25 25 ext_irq1
-+gpio26 26 ext_irq2
-+gpio27 27 ext_irq3
-+gpio28 28 -
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+gpio32 32 wifi
-+gpio33 33 wifi
-+gpio34 34 wifi
-+gpio35 35 wifi
-+gpio36 36 wifi
-+gpio37 37 wifi
-+gpio38 38 wifi
-+gpio39 39 wifi
-+gpio40 40 wifi
-+gpio41 41 wifi
-+gpio42 42 wifi
-+gpio43 43 wifi
-+gpio44 44 wifi
-+gpio45 45 wifi
-+gpio46 46 wifi
-+gpio47 47 wifi
-+nand_grp 8, 12-23, 27 nand
+++ /dev/null
-From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:17:20 +0200
-Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362
-
-Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
-GPIO pins to the LED controller, to be available by the integrated
-wifi, or other functions. It also supports overlay groups, of which
-only NAND is documented.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++
- 3 files changed, 700 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -23,3 +23,10 @@ config PINCTRL_BCM6358
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
- select MFD_SYSCON
-+
-+config PINCTRL_BCM6362
-+ bool "BCM6362 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
-+obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
-@@ -0,0 +1,692 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6362_NGPIO 48
-+
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND BIT(2)
-+
-+enum bcm6362_pinctrl_reg {
-+ BCM6362_LEDCTRL,
-+ BCM6362_MODE,
-+ BCM6362_CTRL,
-+ BCM6362_BASEMODE,
-+};
-+
-+struct bcm6362_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6362_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ enum bcm6362_pinctrl_reg reg;
-+ u32 basemode_mask;
-+};
-+
-+struct bcm6362_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *led;
-+ void __iomem *mode;
-+ void __iomem *ctrl;
-+ void __iomem *basemode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6362_PIN(a, b, mask) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(mask), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6362_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ BCM6362_PIN(8, "gpio8", BASEMODE_NAND),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ BCM6362_PIN(12, "gpio12", BASEMODE_NAND),
-+ BCM6362_PIN(13, "gpio13", BASEMODE_NAND),
-+ BCM6362_PIN(14, "gpio14", BASEMODE_NAND),
-+ BCM6362_PIN(15, "gpio15", BASEMODE_NAND),
-+ BCM6362_PIN(16, "gpio16", BASEMODE_NAND),
-+ BCM6362_PIN(17, "gpio17", BASEMODE_NAND),
-+ BCM6362_PIN(18, "gpio18", BASEMODE_NAND),
-+ BCM6362_PIN(19, "gpio19", BASEMODE_NAND),
-+ BCM6362_PIN(20, "gpio20", BASEMODE_NAND),
-+ BCM6362_PIN(21, "gpio21", BASEMODE_NAND),
-+ BCM6362_PIN(22, "gpio22", BASEMODE_NAND),
-+ BCM6362_PIN(23, "gpio23", BASEMODE_NAND),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ BCM6362_PIN(27, "gpio27", BASEMODE_NAND),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+
-+static unsigned nand_grp_pins[] = {
-+ 8, 12, 13, 14, 15, 16, 17,
-+ 18, 19, 20, 21, 22, 23, 27,
-+};
-+
-+#define BCM6362_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6362_pingroup bcm6362_groups[] = {
-+ BCM6362_GROUP(gpio0),
-+ BCM6362_GROUP(gpio1),
-+ BCM6362_GROUP(gpio2),
-+ BCM6362_GROUP(gpio3),
-+ BCM6362_GROUP(gpio4),
-+ BCM6362_GROUP(gpio5),
-+ BCM6362_GROUP(gpio6),
-+ BCM6362_GROUP(gpio7),
-+ BCM6362_GROUP(gpio8),
-+ BCM6362_GROUP(gpio9),
-+ BCM6362_GROUP(gpio10),
-+ BCM6362_GROUP(gpio11),
-+ BCM6362_GROUP(gpio12),
-+ BCM6362_GROUP(gpio13),
-+ BCM6362_GROUP(gpio14),
-+ BCM6362_GROUP(gpio15),
-+ BCM6362_GROUP(gpio16),
-+ BCM6362_GROUP(gpio17),
-+ BCM6362_GROUP(gpio18),
-+ BCM6362_GROUP(gpio19),
-+ BCM6362_GROUP(gpio20),
-+ BCM6362_GROUP(gpio21),
-+ BCM6362_GROUP(gpio22),
-+ BCM6362_GROUP(gpio23),
-+ BCM6362_GROUP(gpio24),
-+ BCM6362_GROUP(gpio25),
-+ BCM6362_GROUP(gpio26),
-+ BCM6362_GROUP(gpio27),
-+ BCM6362_GROUP(gpio28),
-+ BCM6362_GROUP(gpio29),
-+ BCM6362_GROUP(gpio30),
-+ BCM6362_GROUP(gpio31),
-+ BCM6362_GROUP(gpio32),
-+ BCM6362_GROUP(gpio33),
-+ BCM6362_GROUP(gpio34),
-+ BCM6362_GROUP(gpio35),
-+ BCM6362_GROUP(gpio36),
-+ BCM6362_GROUP(gpio37),
-+ BCM6362_GROUP(gpio38),
-+ BCM6362_GROUP(gpio39),
-+ BCM6362_GROUP(gpio40),
-+ BCM6362_GROUP(gpio41),
-+ BCM6362_GROUP(gpio42),
-+ BCM6362_GROUP(gpio43),
-+ BCM6362_GROUP(gpio44),
-+ BCM6362_GROUP(gpio45),
-+ BCM6362_GROUP(gpio46),
-+ BCM6362_GROUP(gpio47),
-+ BCM6362_GROUP(nand_grp),
-+};
-+
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const robosw_led_data_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const robosw_led_clk_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const robosw_led0_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const robosw_led1_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const spi_cs2_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const spi_cs3_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const ntr_pulse_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const uart1_scts_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const uart1_srts_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const uart1_sdin_groups[] = {
-+ "gpio14",
-+};
-+
-+static const char * const uart1_sdout_groups[] = {
-+ "gpio15",
-+};
-+
-+static const char * const adsl_spi_miso_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const adsl_spi_mosi_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const adsl_spi_clk_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const adsl_spi_cs_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const ephy0_led_groups[] = {
-+ "gpio20",
-+};
-+
-+static const char * const ephy1_led_groups[] = {
-+ "gpio21",
-+};
-+
-+static const char * const ephy2_led_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const ephy3_led_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const ext_irq0_groups[] = {
-+ "gpio24",
-+};
-+
-+static const char * const ext_irq1_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ext_irq2_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ext_irq3_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const wifi_groups[] = {
-+ "gpio32",
-+ "gpio33",
-+ "gpio34",
-+ "gpio35",
-+ "gpio36",
-+ "gpio37",
-+ "gpio38",
-+ "gpio39",
-+ "gpio40",
-+ "gpio41",
-+ "gpio42",
-+ "gpio43",
-+ "gpio44",
-+ "gpio45",
-+ "gpio46",
-+ "gpio47",
-+};
-+
-+static const char * const nand_groups[] = {
-+ "nand_grp",
-+};
-+
-+#define BCM6362_LED_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_LEDCTRL, \
-+ }
-+
-+#define BCM6362_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_MODE, \
-+ }
-+
-+#define BCM6362_CTRL_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_CTRL, \
-+ }
-+
-+#define BCM6362_BASEMODE_FUN(n, mask) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_BASEMODE, \
-+ .basemode_mask = (mask), \
-+ }
-+
-+static const struct bcm6362_function bcm6362_funcs[] = {
-+ BCM6362_LED_FUN(led),
-+ BCM6362_MODE_FUN(usb_device_led),
-+ BCM6362_MODE_FUN(sys_irq),
-+ BCM6362_MODE_FUN(serial_led_clk),
-+ BCM6362_MODE_FUN(serial_led_data),
-+ BCM6362_MODE_FUN(robosw_led_data),
-+ BCM6362_MODE_FUN(robosw_led_clk),
-+ BCM6362_MODE_FUN(robosw_led0),
-+ BCM6362_MODE_FUN(robosw_led1),
-+ BCM6362_MODE_FUN(inet_led),
-+ BCM6362_MODE_FUN(spi_cs2),
-+ BCM6362_MODE_FUN(spi_cs3),
-+ BCM6362_MODE_FUN(ntr_pulse),
-+ BCM6362_MODE_FUN(uart1_scts),
-+ BCM6362_MODE_FUN(uart1_srts),
-+ BCM6362_MODE_FUN(uart1_sdin),
-+ BCM6362_MODE_FUN(uart1_sdout),
-+ BCM6362_MODE_FUN(adsl_spi_miso),
-+ BCM6362_MODE_FUN(adsl_spi_mosi),
-+ BCM6362_MODE_FUN(adsl_spi_clk),
-+ BCM6362_MODE_FUN(adsl_spi_cs),
-+ BCM6362_MODE_FUN(ephy0_led),
-+ BCM6362_MODE_FUN(ephy1_led),
-+ BCM6362_MODE_FUN(ephy2_led),
-+ BCM6362_MODE_FUN(ephy3_led),
-+ BCM6362_MODE_FUN(ext_irq0),
-+ BCM6362_MODE_FUN(ext_irq1),
-+ BCM6362_MODE_FUN(ext_irq2),
-+ BCM6362_MODE_FUN(ext_irq3),
-+ BCM6362_CTRL_FUN(wifi),
-+ BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
-+};
-+
-+static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6362_groups);
-+}
-+
-+static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6362_groups[group].name;
-+}
-+
-+static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6362_groups[group].pins;
-+ *num_pins = bcm6362_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6362_funcs);
-+}
-+
-+static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6362_funcs[selector].name;
-+}
-+
-+static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6362_funcs[selector].groups;
-+ *num_groups = bcm6362_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 tmp;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= val & mask;
-+ __raw_writel(tmp, reg);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin)
-+{
-+ const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
-+ u32 mask = BIT(pin % 32);
-+
-+ if (desc->drv_data)
-+ bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0);
-+
-+ if (pin < 32) {
-+ /* base mode 0 => gpio 1 => mux function */
-+ bcm6362_rmw_mux(pctl, pctl->mode, mask, 0);
-+
-+ /* pins 0-23 might be muxed to led */
-+ if (pin < 24)
-+ bcm6362_rmw_mux(pctl, pctl->led, mask, 0);
-+ } else {
-+ /* ctrl reg 0 => wifi function 1 => gpio */
-+ bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask);
-+ }
-+}
-+
-+static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6362_pingroup *grp = &bcm6362_groups[group];
-+ const struct bcm6362_function *f = &bcm6362_funcs[selector];
-+ unsigned i;
-+ void __iomem *reg;
-+ u32 val, mask;
-+
-+ for (i = 0; i < grp->num_pins; i++)
-+ bcm6362_set_gpio(pctl, grp->pins[i]);
-+
-+ switch (f->reg) {
-+ case BCM6362_LEDCTRL:
-+ reg = pctl->led;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM6362_MODE:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM6362_CTRL:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = 0;
-+ break;
-+ case BCM6362_BASEMODE:
-+ reg = pctl->basemode;
-+ mask = f->basemode_mask;
-+ val = f->basemode_mask;
-+ break;
-+ default:
-+ WARN_ON(1);
-+ return -EINVAL;
-+ }
-+
-+ bcm6362_rmw_mux(pctl, reg, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm6362_set_gpio(pctl, offset);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6362_pctl_ops = {
-+ .get_groups_count = bcm6362_pinctrl_get_group_count,
-+ .get_group_name = bcm6362_pinctrl_get_group_name,
-+ .get_group_pins = bcm6362_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6362_pmx_ops = {
-+ .get_functions_count = bcm6362_pinctrl_get_func_count,
-+ .get_function_name = bcm6362_pinctrl_get_func_name,
-+ .get_function_groups = bcm6362_pinctrl_get_groups,
-+ .set_mux = bcm6362_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6362_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6362_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6362_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *led, *mode, *ctrl, *basemode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+ led = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(led))
-+ return PTR_ERR(led);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+ ctrl = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(ctrl))
-+ return PTR_ERR(ctrl);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+ basemode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->led = led;
-+ pctl->mode = mode;
-+ pctl->ctrl = ctrl;
-+ pctl->basemode = basemode;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6362_pctl_ops;
-+ pctl->desc.pmxops = &bcm6362_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6362_pins);
-+ pctl->desc.pins = bcm6362_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6362_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6362_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6362-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6362_pinctrl_driver = {
-+ .probe = bcm6362_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6362-pinctrl",
-+ .of_match_table = bcm6362_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6362_pinctrl_driver);
+++ /dev/null
-From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:51 +0200
-Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6368 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++
- 1 file changed, 67 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-@@ -0,0 +1,67 @@
-+* Broadcom BCM6368 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6368-pinctrl".
-+- reg: Register specifiers of dirout, dat, mode registers.
-+- reg-names: Must be "dirout", "dat", "mode".
-+- brcm,gpiobasemode: Phandle to the gpio basemode register.
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6368-pinctrl";
-+ reg = <0x10000080 0x08>,
-+ <0x10000088 0x08>,
-+ <0x10000098 0x04>;
-+ reg-names = "dirout", "dat", "mode";
-+ brcm,gpiobasemode = <&gpiobasemode>;
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+gpiobasemode: syscon@100000b8 {
-+ compatible = "brcm,bcm6368-gpiobasemode", "syscon";
-+ reg = <0x100000b8 4>;
-+ native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 analog_afe0
-+gpio1 1 analog_afe1
-+gpio2 2 sys_irq
-+gpio3 3 serial_led_data
-+gpio4 4 serial_led_clk
-+gpio5 5 inet_led
-+gpio6 6 ephy0_led
-+gpio7 7 ephy1_led
-+gpio8 8 ephy2_led
-+gpio9 9 ephy3_led
-+gpio10 10 robosw_led_data
-+gpio11 11 robosw_led_clk
-+gpio12 12 robosw_led0
-+gpio13 13 robosw_led1
-+gpio14 14 usb_device_led
-+gpio15 15 -
-+gpio16 16 pci_req1
-+gpio17 17 pci_gnt1
-+gpio18 18 pci_intb
-+gpio19 19 pci_req0
-+gpio20 20 pci_gnt0
-+gpio21 21 -
-+gpio22 22 pcmcia_cd1
-+gpio23 23 pcmcia_cd2
-+gpio24 24 pcmcia_vs1
-+gpio25 25 pcmcia_vs2
-+gpio26 26 ebi_cs2
-+gpio27 27 ebi_cs3
-+gpio28 28 spi_cs2
-+gpio29 29 spi_cs3
-+gpio30 30 spi_cs4
-+gpio31 31 spi_cs5
-+uart1_grp 30-33 uart1
+++ /dev/null
-From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:18:25 +0200
-Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368
-
-Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
-GPIOs onto alternative functions. Not all are documented.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 15 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++
- 3 files changed, 589 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -30,3 +30,18 @@ config PINCTRL_BCM6362
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6368
-+ bool "BCM6368 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+ select MFD_SYSCON
-+
-+config PINCTRL_BCM63268
-+ bool "BCM63268 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
-+obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
-@@ -0,0 +1,573 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/of_gpio.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6368_NGPIO 38
-+
-+#define BCM6368_BASEMODE_MASK 0x7
-+#define BCM6368_BASEMODE_GPIO 0x0
-+#define BCM6368_BASEMODE_UART1 0x1
-+
-+struct bcm6368_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6368_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned dir_out:16;
-+ unsigned basemode:3;
-+};
-+
-+struct bcm6368_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ struct regmap_field *overlay;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6368_BASEMODE_PIN(a, b) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)true \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6368_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ BCM6368_BASEMODE_PIN(30, "gpio30"),
-+ BCM6368_BASEMODE_PIN(31, "gpio31"),
-+ BCM6368_BASEMODE_PIN(32, "gpio32"),
-+ BCM6368_BASEMODE_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
-+
-+#define BCM6368_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6368_pingroup bcm6368_groups[] = {
-+ BCM6368_GROUP(gpio0),
-+ BCM6368_GROUP(gpio1),
-+ BCM6368_GROUP(gpio2),
-+ BCM6368_GROUP(gpio3),
-+ BCM6368_GROUP(gpio4),
-+ BCM6368_GROUP(gpio5),
-+ BCM6368_GROUP(gpio6),
-+ BCM6368_GROUP(gpio7),
-+ BCM6368_GROUP(gpio8),
-+ BCM6368_GROUP(gpio9),
-+ BCM6368_GROUP(gpio10),
-+ BCM6368_GROUP(gpio11),
-+ BCM6368_GROUP(gpio12),
-+ BCM6368_GROUP(gpio13),
-+ BCM6368_GROUP(gpio14),
-+ BCM6368_GROUP(gpio15),
-+ BCM6368_GROUP(gpio16),
-+ BCM6368_GROUP(gpio17),
-+ BCM6368_GROUP(gpio18),
-+ BCM6368_GROUP(gpio19),
-+ BCM6368_GROUP(gpio20),
-+ BCM6368_GROUP(gpio21),
-+ BCM6368_GROUP(gpio22),
-+ BCM6368_GROUP(gpio23),
-+ BCM6368_GROUP(gpio24),
-+ BCM6368_GROUP(gpio25),
-+ BCM6368_GROUP(gpio26),
-+ BCM6368_GROUP(gpio27),
-+ BCM6368_GROUP(gpio28),
-+ BCM6368_GROUP(gpio29),
-+ BCM6368_GROUP(gpio30),
-+ BCM6368_GROUP(gpio31),
-+ BCM6368_GROUP(uart1_grp),
-+};
-+
-+static const char * const analog_afe_0_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const analog_afe_1_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const inet_led_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const ephy0_led_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const ephy1_led_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const ephy2_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const ephy3_led_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const robosw_led_data_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const robosw_led_clk_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const robosw_led0_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const robosw_led1_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio14",
-+};
-+
-+static const char * const pci_req1_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const pci_gnt1_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const pci_intb_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const pci_req0_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const pci_gnt0_groups[] = {
-+ "gpio20",
-+};
-+
-+static const char * const pcmcia_cd1_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const pcmcia_cd2_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const pcmcia_vs1_groups[] = {
-+ "gpio24",
-+};
-+
-+static const char * const pcmcia_vs2_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ebi_cs2_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ebi_cs3_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const spi_cs2_groups[] = {
-+ "gpio28",
-+};
-+
-+static const char * const spi_cs3_groups[] = {
-+ "gpio29",
-+};
-+
-+static const char * const spi_cs4_groups[] = {
-+ "gpio30",
-+};
-+
-+static const char * const spi_cs5_groups[] = {
-+ "gpio31",
-+};
-+
-+static const char * const uart1_groups[] = {
-+ "uart1_grp",
-+};
-+
-+#define BCM6368_FUN(n, out) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .dir_out = out, \
-+ }
-+
-+#define BCM6368_BASEMODE_FUN(n, val, out) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .basemode = BCM6368_BASEMODE_##val, \
-+ .dir_out = out, \
-+ }
-+
-+static const struct bcm6368_function bcm6368_funcs[] = {
-+ BCM6368_FUN(analog_afe_0, 1),
-+ BCM6368_FUN(analog_afe_1, 1),
-+ BCM6368_FUN(sys_irq, 1),
-+ BCM6368_FUN(serial_led_data, 1),
-+ BCM6368_FUN(serial_led_clk, 1),
-+ BCM6368_FUN(inet_led, 1),
-+ BCM6368_FUN(ephy0_led, 1),
-+ BCM6368_FUN(ephy1_led, 1),
-+ BCM6368_FUN(ephy2_led, 1),
-+ BCM6368_FUN(ephy3_led, 1),
-+ BCM6368_FUN(robosw_led_data, 1),
-+ BCM6368_FUN(robosw_led_clk, 1),
-+ BCM6368_FUN(robosw_led0, 1),
-+ BCM6368_FUN(robosw_led1, 1),
-+ BCM6368_FUN(usb_device_led, 1),
-+ BCM6368_FUN(pci_req1, 0),
-+ BCM6368_FUN(pci_gnt1, 0),
-+ BCM6368_FUN(pci_intb, 0),
-+ BCM6368_FUN(pci_req0, 0),
-+ BCM6368_FUN(pci_gnt0, 0),
-+ BCM6368_FUN(pcmcia_cd1, 0),
-+ BCM6368_FUN(pcmcia_cd2, 0),
-+ BCM6368_FUN(pcmcia_vs1, 0),
-+ BCM6368_FUN(pcmcia_vs2, 0),
-+ BCM6368_FUN(ebi_cs2, 1),
-+ BCM6368_FUN(ebi_cs3, 1),
-+ BCM6368_FUN(spi_cs2, 1),
-+ BCM6368_FUN(spi_cs3, 1),
-+ BCM6368_FUN(spi_cs4, 1),
-+ BCM6368_FUN(spi_cs5, 1),
-+ BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
-+};
-+
-+static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6368_groups);
-+}
-+
-+static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6368_groups[group].name;
-+}
-+
-+static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6368_groups[group].pins;
-+ *num_pins = bcm6368_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6368_funcs);
-+}
-+
-+static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6368_funcs[selector].name;
-+}
-+
-+static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6368_funcs[selector].groups;
-+ *num_groups = bcm6368_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ u32 tmp;
-+
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= (val & mask);
-+ __raw_writel(tmp, reg);
-+}
-+
-+static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6368_pingroup *grp = &bcm6368_groups[group];
-+ const struct bcm6368_function *fun = &bcm6368_funcs[selector];
-+ unsigned long flags;
-+ int i, pin;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (fun->basemode) {
-+ u32 mask = 0;
-+
-+ for (i = 0; i < grp->num_pins; i++) {
-+ pin = grp->pins[i];
-+ if (pin < 32)
-+ mask |= BIT(pin);
-+ }
-+
-+ bcm6368_rmw_mux(pctl, pctl->mode, mask, 0);
-+ regmap_field_write(pctl->overlay, fun->basemode);
-+ } else {
-+ pin = grp->pins[0];
-+
-+ if (bcm6368_pins[pin].drv_data)
-+ regmap_field_write(pctl->overlay,
-+ BCM6368_BASEMODE_GPIO);
-+
-+ bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin));
-+ }
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+
-+ for (pin = 0; pin < grp->num_pins; pin++) {
-+ int hw_gpio = bcm6368_pins[pin].number;
-+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
-+
-+ if (fun->dir_out & BIT(pin))
-+ gc->direction_output(gc, hw_gpio % 32, 0);
-+ else
-+ gc->direction_input(gc, hw_gpio % 32);
-+ }
-+
-+ return 0;
-+}
-+
-+static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ unsigned long flags;
-+
-+ if (offset >= 32 && !bcm6368_pins[offset].drv_data)
-+ return 0;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ /* disable all functions using this pin */
-+ if (offset < 32)
-+ bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0);
-+
-+ if (bcm6368_pins[offset].drv_data)
-+ regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6368_pctl_ops = {
-+ .get_groups_count = bcm6368_pinctrl_get_group_count,
-+ .get_group_name = bcm6368_pinctrl_get_group_name,
-+ .get_group_pins = bcm6368_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6368_pmx_ops = {
-+ .get_functions_count = bcm6368_pinctrl_get_func_count,
-+ .get_function_name = bcm6368_pinctrl_get_func_name,
-+ .get_function_groups = bcm6368_pinctrl_get_groups,
-+ .set_mux = bcm6368_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6368_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6368_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6368_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode;
-+ struct regmap *basemode;
-+ struct reg_field overlay = REG_FIELD(0, 0, 3);
-+
-+ if (pdev->dev.of_node)
-+ basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+ "brcm,gpiobasemode");
-+ else
-+ basemode = syscon_regmap_lookup_by_pdevname("syscon.b00000b8");
-+
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay);
-+ if (IS_ERR(pctl->overlay))
-+ return PTR_ERR(pctl->overlay);
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ /* disable all muxes by default */
-+ __raw_writel(0, pctl->mode);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6368_pctl_ops;
-+ pctl->desc.pmxops = &bcm6368_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6368_pins);
-+ pctl->desc.pins = bcm6368_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6368_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6368_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6368-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6368_pinctrl_driver = {
-+ .probe = bcm6368_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6368-pinctrl",
-+ .of_match_table = bcm6368_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6368_pinctrl_driver);
+++ /dev/null
-From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:37:08 +0200
-Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in the BCM63268
-family SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++
- 1 file changed, 88 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-@@ -0,0 +1,88 @@
-+* Broadcom BCM63268 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl".
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@100000c0 {
-+ compatible = "brcm,bcm63268-pinctrl";
-+ reg = <0x100000c0 0x8>,
-+ <0x100000c8 0x8>,
-+ <0x100000d0 0x4>,
-+ <0x100000d8 0x4>,
-+ <0x100000dc 0x4>,
-+ <0x100000f8 0x4>;
-+ reg-names = "dirout", "dat", "led", "mode",
-+ "ctrl", "basemode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, serial_led_clk
-+gpio1 1 led, serial_led_data
-+gpio2 2 led,
-+gpio3 3 led,
-+gpio4 4 led,
-+gpio5 5 led,
-+gpio6 6 led,
-+gpio7 7 led,
-+gpio8 8 led, hsspi_cs6
-+gpio9 9 led, hsspi_cs7
-+gpio10 10 led, uart1_scts
-+gpio11 11 led, uart1_srts
-+gpio12 12 led, uart1_sdin
-+gpio13 13 led, uart1_sdout
-+gpio14 14 led, ntr_pulse_in
-+gpio15 15 led, dsl_ntr_pulse_out
-+gpio16 16 led, hsspi_cs4
-+gpio17 17 led, hsspi_cs5
-+gpio18 18 led, adsl_spi_miso
-+gpio19 19 led, adsl_spi_mosi
-+gpio20 20 led,
-+gpio21 21 led,
-+gpio22 22 led, vreg_clk
-+gpio23 23 led, pcie_clkreq_b
-+gpio24 24 uart1_scts
-+gpio25 25 uart1_srts
-+gpio26 26 uart1_sdin
-+gpio27 27 uart1_sdout
-+gpio28 28 ntr_pulse_in
-+gpio29 29 dsl_ntr_pulse_out
-+gpio30 30 switch_led_clk
-+gpio31 31 switch_led_data
-+gpio32 32 wifi
-+gpio33 33 wifi
-+gpio34 34 wifi
-+gpio35 35 wifi
-+gpio36 36 wifi
-+gpio37 37 wifi
-+gpio38 38 wifi
-+gpio39 39 wifi
-+gpio40 40 wifi
-+gpio41 41 wifi
-+gpio42 42 wifi
-+gpio43 43 wifi
-+gpio44 44 wifi
-+gpio45 45 wifi
-+gpio46 46 wifi
-+gpio47 47 wifi
-+gpio48 48 wifi
-+gpio49 49 wifi
-+gpio50 50 wifi
-+gpio51 51 wifi
-+nand_grp 2-7,24-31 nand
-+dect_pd_grp 8-9 dect_pd
-+vdsl_phy0_grp 10-11 vdsl_phy0
-+vdsl_phy1_grp 12-13 vdsl_phy1
-+vdsl_phy2_grp 24-25 vdsl_phy2
-+vdsl_phy3_grp 26-27 vdsl_phy3
+++ /dev/null
-From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:19:12 +0200
-Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268
-
-Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs
-to different functions. Depending on the mux, these are either single
-pin configurations or whole pin groups.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++
- 2 files changed, 711 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
-
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
- obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
-+obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
-@@ -0,0 +1,710 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM63268_NGPIO 52
-+
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */
-+#define BASEMODE_GPIO35 BIT(4) /* GPIO 35 */
-+#define BASEMODE_DECTPD BIT(5) /* GPIOs 8/9 */
-+#define BASEMODE_VDSL_PHY_0 BIT(6) /* GPIOs 10/11 */
-+#define BASEMODE_VDSL_PHY_1 BIT(7) /* GPIOs 12/13 */
-+#define BASEMODE_VDSL_PHY_2 BIT(8) /* GPIOs 24/25 */
-+#define BASEMODE_VDSL_PHY_3 BIT(9) /* GPIOs 26/27 */
-+
-+enum bcm63268_pinctrl_reg {
-+ BCM63268_LEDCTRL,
-+ BCM63268_MODE,
-+ BCM63268_CTRL,
-+ BCM63268_BASEMODE,
-+};
-+
-+struct bcm63268_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm63268_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ enum bcm63268_pinctrl_reg reg;
-+ u32 mask;
-+};
-+
-+struct bcm63268_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *led;
-+ void __iomem *mode;
-+ void __iomem *ctrl;
-+ void __iomem *basemode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM63268_PIN(a, b, basemode) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(basemode) \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm63268_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ BCM63268_PIN(2, "gpio2", BASEMODE_NAND),
-+ BCM63268_PIN(3, "gpio3", BASEMODE_NAND),
-+ BCM63268_PIN(4, "gpio4", BASEMODE_NAND),
-+ BCM63268_PIN(5, "gpio5", BASEMODE_NAND),
-+ BCM63268_PIN(6, "gpio6", BASEMODE_NAND),
-+ BCM63268_PIN(7, "gpio7", BASEMODE_NAND),
-+ BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD),
-+ BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD),
-+ BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0),
-+ BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0),
-+ BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1),
-+ BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+ BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+ BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+ BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+ BCM63268_PIN(28, "gpio28", BASEMODE_NAND),
-+ BCM63268_PIN(29, "gpio29", BASEMODE_NAND),
-+ BCM63268_PIN(30, "gpio30", BASEMODE_NAND),
-+ BCM63268_PIN(31, "gpio31", BASEMODE_NAND),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+ PINCTRL_PIN(48, "gpio48"),
-+ PINCTRL_PIN(49, "gpio49"),
-+ PINCTRL_PIN(50, "gpio50"),
-+ PINCTRL_PIN(51, "gpio51"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+static unsigned gpio48_pins[] = { 48 };
-+static unsigned gpio49_pins[] = { 49 };
-+static unsigned gpio50_pins[] = { 50 };
-+static unsigned gpio51_pins[] = { 51 };
-+
-+static unsigned nand_grp_pins[] = {
-+ 2, 3, 4, 5, 6, 7, 24,
-+ 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned dectpd_grp_pins[] = { 8, 9 };
-+static unsigned vdsl_phy0_grp_pins[] = { 10, 11 };
-+static unsigned vdsl_phy1_grp_pins[] = { 12, 13 };
-+static unsigned vdsl_phy2_grp_pins[] = { 24, 25 };
-+static unsigned vdsl_phy3_grp_pins[] = { 26, 27 };
-+
-+#define BCM63268_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm63268_pingroup bcm63268_groups[] = {
-+ BCM63268_GROUP(gpio0),
-+ BCM63268_GROUP(gpio1),
-+ BCM63268_GROUP(gpio2),
-+ BCM63268_GROUP(gpio3),
-+ BCM63268_GROUP(gpio4),
-+ BCM63268_GROUP(gpio5),
-+ BCM63268_GROUP(gpio6),
-+ BCM63268_GROUP(gpio7),
-+ BCM63268_GROUP(gpio8),
-+ BCM63268_GROUP(gpio9),
-+ BCM63268_GROUP(gpio10),
-+ BCM63268_GROUP(gpio11),
-+ BCM63268_GROUP(gpio12),
-+ BCM63268_GROUP(gpio13),
-+ BCM63268_GROUP(gpio14),
-+ BCM63268_GROUP(gpio15),
-+ BCM63268_GROUP(gpio16),
-+ BCM63268_GROUP(gpio17),
-+ BCM63268_GROUP(gpio18),
-+ BCM63268_GROUP(gpio19),
-+ BCM63268_GROUP(gpio20),
-+ BCM63268_GROUP(gpio21),
-+ BCM63268_GROUP(gpio22),
-+ BCM63268_GROUP(gpio23),
-+ BCM63268_GROUP(gpio24),
-+ BCM63268_GROUP(gpio25),
-+ BCM63268_GROUP(gpio26),
-+ BCM63268_GROUP(gpio27),
-+ BCM63268_GROUP(gpio28),
-+ BCM63268_GROUP(gpio29),
-+ BCM63268_GROUP(gpio30),
-+ BCM63268_GROUP(gpio31),
-+ BCM63268_GROUP(gpio32),
-+ BCM63268_GROUP(gpio33),
-+ BCM63268_GROUP(gpio34),
-+ BCM63268_GROUP(gpio35),
-+ BCM63268_GROUP(gpio36),
-+ BCM63268_GROUP(gpio37),
-+ BCM63268_GROUP(gpio38),
-+ BCM63268_GROUP(gpio39),
-+ BCM63268_GROUP(gpio40),
-+ BCM63268_GROUP(gpio41),
-+ BCM63268_GROUP(gpio42),
-+ BCM63268_GROUP(gpio43),
-+ BCM63268_GROUP(gpio44),
-+ BCM63268_GROUP(gpio45),
-+ BCM63268_GROUP(gpio46),
-+ BCM63268_GROUP(gpio47),
-+ BCM63268_GROUP(gpio48),
-+ BCM63268_GROUP(gpio49),
-+ BCM63268_GROUP(gpio50),
-+ BCM63268_GROUP(gpio51),
-+
-+ /* multi pin groups */
-+ BCM63268_GROUP(nand_grp),
-+ BCM63268_GROUP(dectpd_grp),
-+ BCM63268_GROUP(vdsl_phy0_grp),
-+ BCM63268_GROUP(vdsl_phy1_grp),
-+ BCM63268_GROUP(vdsl_phy2_grp),
-+ BCM63268_GROUP(vdsl_phy3_grp),
-+};
-+
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const hsspi_cs4_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const hsspi_cs5_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const hsspi_cs6_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const hsspi_cs7_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const uart1_scts_groups[] = {
-+ "gpio10",
-+ "gpio24",
-+};
-+
-+static const char * const uart1_srts_groups[] = {
-+ "gpio11",
-+ "gpio25",
-+};
-+
-+static const char * const uart1_sdin_groups[] = {
-+ "gpio12",
-+ "gpio26",
-+};
-+
-+static const char * const uart1_sdout_groups[] = {
-+ "gpio13",
-+ "gpio27",
-+};
-+
-+static const char * const ntr_pulse_in_groups[] = {
-+ "gpio14",
-+ "gpio28",
-+};
-+
-+static const char * const dsl_ntr_pulse_out_groups[] = {
-+ "gpio15",
-+ "gpio29",
-+};
-+
-+static const char * const adsl_spi_miso_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const adsl_spi_mosi_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const vreg_clk_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const pcie_clkreq_b_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const switch_led_clk_groups[] = {
-+ "gpio30",
-+};
-+
-+static const char * const switch_led_data_groups[] = {
-+ "gpio31",
-+};
-+
-+static const char * const wifi_groups[] = {
-+ "gpio32",
-+ "gpio33",
-+ "gpio34",
-+ "gpio35",
-+ "gpio36",
-+ "gpio37",
-+ "gpio38",
-+ "gpio39",
-+ "gpio40",
-+ "gpio41",
-+ "gpio42",
-+ "gpio43",
-+ "gpio44",
-+ "gpio45",
-+ "gpio46",
-+ "gpio47",
-+ "gpio48",
-+ "gpio49",
-+ "gpio50",
-+ "gpio51",
-+};
-+
-+static const char * const nand_groups[] = {
-+ "nand_grp",
-+};
-+
-+static const char * const dectpd_groups[] = {
-+ "dectpd_grp",
-+};
-+
-+static const char * const vdsl_phy_override_0_groups[] = {
-+ "vdsl_phy_override_0_grp",
-+};
-+
-+static const char * const vdsl_phy_override_1_groups[] = {
-+ "vdsl_phy_override_1_grp",
-+};
-+
-+static const char * const vdsl_phy_override_2_groups[] = {
-+ "vdsl_phy_override_2_grp",
-+};
-+
-+static const char * const vdsl_phy_override_3_groups[] = {
-+ "vdsl_phy_override_3_grp",
-+};
-+
-+#define BCM63268_LED_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_LEDCTRL, \
-+ }
-+
-+#define BCM63268_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_MODE, \
-+ }
-+
-+#define BCM63268_CTRL_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_CTRL, \
-+ }
-+
-+#define BCM63268_BASEMODE_FUN(n, val) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_BASEMODE, \
-+ .mask = val, \
-+ }
-+
-+static const struct bcm63268_function bcm63268_funcs[] = {
-+ BCM63268_LED_FUN(led),
-+ BCM63268_MODE_FUN(serial_led_clk),
-+ BCM63268_MODE_FUN(serial_led_data),
-+ BCM63268_MODE_FUN(hsspi_cs6),
-+ BCM63268_MODE_FUN(hsspi_cs7),
-+ BCM63268_MODE_FUN(uart1_scts),
-+ BCM63268_MODE_FUN(uart1_srts),
-+ BCM63268_MODE_FUN(uart1_sdin),
-+ BCM63268_MODE_FUN(uart1_sdout),
-+ BCM63268_MODE_FUN(ntr_pulse_in),
-+ BCM63268_MODE_FUN(dsl_ntr_pulse_out),
-+ BCM63268_MODE_FUN(hsspi_cs4),
-+ BCM63268_MODE_FUN(hsspi_cs5),
-+ BCM63268_MODE_FUN(adsl_spi_miso),
-+ BCM63268_MODE_FUN(adsl_spi_mosi),
-+ BCM63268_MODE_FUN(vreg_clk),
-+ BCM63268_MODE_FUN(pcie_clkreq_b),
-+ BCM63268_MODE_FUN(switch_led_clk),
-+ BCM63268_MODE_FUN(switch_led_data),
-+ BCM63268_CTRL_FUN(wifi),
-+ BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND),
-+ BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3),
-+};
-+
-+static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm63268_groups);
-+}
-+
-+static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm63268_groups[group].name;
-+}
-+
-+static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group,
-+ const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm63268_groups[group].pins;
-+ *num_pins = bcm63268_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm63268_funcs);
-+}
-+
-+static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm63268_funcs[selector].name;
-+}
-+
-+static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm63268_funcs[selector].groups;
-+ *num_groups = bcm63268_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 tmp;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= val;
-+ __raw_writel(tmp, reg);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin)
-+{
-+ const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin];
-+ u32 basemode = (unsigned long)desc->drv_data;
-+ u32 mask = BIT(pin % 32);
-+
-+ if (basemode)
-+ bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0);
-+
-+ if (pin < 32) {
-+ /* base mode: 0 => gpio, 1 => mux function */
-+ bcm63268_rmw_mux(pctl, pctl->mode, mask, 0);
-+
-+ /* pins 0-23 might be muxed to led */
-+ if (pin < 24)
-+ bcm63268_rmw_mux(pctl, pctl->led, mask, 0);
-+ } else if (pin < 52) {
-+ /* ctrl reg: 0 => wifi function, 1 => gpio */
-+ bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask);
-+ }
-+}
-+
-+static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm63268_pingroup *grp = &bcm63268_groups[group];
-+ const struct bcm63268_function *f = &bcm63268_funcs[selector];
-+ unsigned i;
-+ void __iomem *reg;
-+ u32 val, mask;
-+
-+ for (i = 0; i < grp->num_pins; i++)
-+ bcm63268_set_gpio(pctl, grp->pins[i]);
-+
-+ switch (f->reg) {
-+ case BCM63268_LEDCTRL:
-+ reg = pctl->led;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM63268_MODE:
-+ reg = pctl->mode;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM63268_CTRL:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = 0;
-+ break;
-+ case BCM63268_BASEMODE:
-+ reg = pctl->basemode;
-+ mask = f->mask;
-+ val = f->mask;
-+ break;
-+ default:
-+ WARN_ON(1);
-+ return -EINVAL;
-+ }
-+
-+ bcm63268_rmw_mux(pctl, reg, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm63268_set_gpio(pctl, offset);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm63268_pctl_ops = {
-+ .get_groups_count = bcm63268_pinctrl_get_group_count,
-+ .get_group_name = bcm63268_pinctrl_get_group_name,
-+ .get_group_pins = bcm63268_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm63268_pmx_ops = {
-+ .get_functions_count = bcm63268_pinctrl_get_func_count,
-+ .get_function_name = bcm63268_pinctrl_get_func_name,
-+ .get_function_groups = bcm63268_pinctrl_get_groups,
-+ .set_mux = bcm63268_pinctrl_set_mux,
-+ .gpio_request_enable = bcm63268_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm63268_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm63268_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *led, *mode, *ctrl, *basemode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+ led = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(led))
-+ return PTR_ERR(led);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+ ctrl = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(ctrl))
-+ return PTR_ERR(ctrl);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+ basemode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->led = led;
-+ pctl->mode = mode;
-+ pctl->ctrl = ctrl;
-+ pctl->basemode = basemode;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm63268_pctl_ops;
-+ pctl->desc.pmxops = &bcm63268_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm63268_pins);
-+ pctl->desc.pins = bcm63268_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM63268_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm63268_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm63268-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm63268_pinctrl_driver = {
-+ .probe = bcm63268_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm63268-pinctrl",
-+ .of_match_table = bcm63268_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm63268_pinctrl_driver);
+++ /dev/null
-From e058fa1969019c2f6705c53c4130e364a877d4e6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 26 Nov 2017 12:07:31 +0100
-Subject: [PATCH] gpio: fix device tree gpio hogs on dual role gpio/pincontrol
- controllers
-
-For dual role gpio and pincontrol controller, the device registration
-path is often:
-
- pinctrl_register(...);
- gpiochip_add_data(...);
- gpiochip_add_pin_range(...);
-
-If the device tree node has any gpio-hogs, the code will try to apply them
-in the gpiochip_add_data step, but fail as they cannot be requested, as the
-ranges are missing. But we also cannot first add the pinranges, as the
-appropriate data structures are only initialized in gpiochip_add_data.
-
-To fix this, defer gpio-hogs to the time pin ranges get added instead of
-directly at chip request time, if the gpio-chip has a request method.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
-
- drivers/gpio/gpiolib-of.c | 20 +++++++++++++++-----
- drivers/gpio/gpiolib.c | 5 +++--
- drivers/gpio/gpiolib.h | 8 ++++++++
- 3 files changed, 26 insertions(+), 7 deletions(-)
-
---- a/drivers/gpio/gpiolib-of.c
-+++ b/drivers/gpio/gpiolib-of.c
-@@ -237,12 +237,15 @@ static struct gpio_desc *of_parse_own_gp
- /**
- * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
- * @chip: gpio chip to act on
-+ * @start: first gpio to check
-+ * @num: number of gpios to check
- *
-- * This is only used by of_gpiochip_add to request/set GPIO initial
-- * configuration.
-+ * This is used by of_gpiochip_add, gpiochip_add_pingroup_range and
-+ * gpiochip_add_pin_range to request/set GPIO initial configuration.
- * It returns error if it fails otherwise 0 on success.
- */
--static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
-+int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
-+ unsigned int num)
- {
- struct gpio_desc *desc = NULL;
- struct device_node *np;
-@@ -250,7 +253,7 @@ static int of_gpiochip_scan_gpios(struct
- enum gpio_lookup_flags lflags;
- enum gpiod_flags dflags;
- unsigned int i;
-- int ret;
-+ int ret, hwgpio;
-
- for_each_available_child_of_node(chip->of_node, np) {
- if (!of_property_read_bool(np, "gpio-hog"))
-@@ -262,6 +265,10 @@ static int of_gpiochip_scan_gpios(struct
- if (IS_ERR(desc))
- break;
-
-+ hwgpio = gpio_chip_hwgpio(desc);
-+ if (hwgpio < start || hwgpio >= (start + num))
-+ continue;
-+
- ret = gpiod_hog(desc, name, lflags, dflags);
- if (ret < 0) {
- of_node_put(np);
-@@ -499,12 +506,13 @@ int of_gpiochip_add(struct gpio_chip *ch
-
- of_node_get(chip->of_node);
-
-- status = of_gpiochip_scan_gpios(chip);
-- if (status) {
-- of_node_put(chip->of_node);
-- gpiochip_remove_pin_ranges(chip);
-+ if (!chip->request) {
-+ status = of_gpiochip_scan_gpios(chip, 0, chip->ngpio);
-+ if (status) {
-+ of_node_put(chip->of_node);
-+ gpiochip_remove_pin_ranges(chip);
-+ }
- }
--
- return status;
- }
-
---- a/drivers/gpio/gpiolib.c
-+++ b/drivers/gpio/gpiolib.c
-@@ -1958,7 +1958,8 @@ int gpiochip_add_pingroup_range(struct g
-
- list_add_tail(&pin_range->node, &gdev->pin_ranges);
-
-- return 0;
-+ return of_gpiochip_scan_gpios(chip, gpio_offset,
-+ pin_range->range.npins);
- }
- EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
-
-@@ -2010,7 +2011,7 @@ int gpiochip_add_pin_range(struct gpio_c
-
- list_add_tail(&pin_range->node, &gdev->pin_ranges);
-
-- return 0;
-+ return of_gpiochip_scan_gpios(chip, gpio_offset, npins);
- }
- EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
-
---- a/drivers/gpio/gpiolib.h
-+++ b/drivers/gpio/gpiolib.h
-@@ -99,6 +99,8 @@ struct gpio_desc *of_get_named_gpiod_fla
- const char *list_name, int index, enum of_gpio_flags *flags);
- int of_gpiochip_add(struct gpio_chip *gc);
- void of_gpiochip_remove(struct gpio_chip *gc);
-+int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
-+ unsigned int num);
- #else
- static inline struct gpio_desc *of_find_gpio(struct device *dev,
- const char *con_id,
-@@ -114,6 +116,12 @@ static inline struct gpio_desc *of_get_n
- }
- static inline int of_gpiochip_add(struct gpio_chip *gc) { return 0; }
- static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
-+static inline int of_gpiochip_scan_gpios(struct gpio_chip *chip,
-+ unsigned int start,
-+ unsigned int num)
-+{
-+ return 0;
-+}
- #endif /* CONFIG_OF_GPIO */
-
- #ifdef CONFIG_ACPI
+++ /dev/null
-From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 19 Jan 2014 12:18:03 +0100
-Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
-
-In the same way as the ohci platform driver allows limiting ports,
-enable the same for ehci. This prevents a mismatch in the available
-ports between ehci/ohci on USB 2.0 controllers.
-
-This is needed if the USB host controller always reports the maximum
-number of ports regardless of the number of available ports (because
-one might be set to be usb device).
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/usb/host/ehci-hcd.c | 4 ++++
- drivers/usb/host/ehci-platform.c | 2 ++
- drivers/usb/host/ehci.h | 1 +
- include/linux/usb/ehci_pdriver.h | 1 +
- 4 files changed, 8 insertions(+)
-
---- a/drivers/usb/host/ehci-hcd.c
-+++ b/drivers/usb/host/ehci-hcd.c
-@@ -678,6 +678,10 @@ int ehci_setup(struct usb_hcd *hcd)
-
- /* cache this readonly data; minimize chip reads */
- ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
-+ if (ehci->num_ports) {
-+ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
-+ ehci->hcs_params |= ehci->num_ports;
-+ }
-
- ehci->sbrn = HCD_USB2;
-
---- a/drivers/usb/host/ehci-platform.c
-+++ b/drivers/usb/host/ehci-platform.c
-@@ -62,6 +62,9 @@ static int ehci_platform_reset(struct us
-
- ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
-
-+ if (pdata->num_ports && pdata->num_ports <= 15)
-+ ehci->num_ports = pdata->num_ports;
-+
- if (pdata->pre_setup) {
- retval = pdata->pre_setup(hcd);
- if (retval < 0)
---- a/drivers/usb/host/ehci.h
-+++ b/drivers/usb/host/ehci.h
-@@ -216,6 +216,7 @@ struct ehci_hcd { /* one per controlle
- u32 command;
-
- /* SILICON QUIRKS */
-+ unsigned int num_ports;
- unsigned no_selective_suspend:1;
- unsigned has_fsl_port_bug:1; /* FreeScale */
- unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
---- a/include/linux/usb/ehci_pdriver.h
-+++ b/include/linux/usb/ehci_pdriver.h
-@@ -42,6 +42,7 @@ struct usb_hcd;
- */
- struct usb_ehci_pdata {
- int caps_offset;
-+ unsigned int num_ports;
- unsigned has_tt:1;
- unsigned has_synopsys_hc_bug:1;
- unsigned big_endian_desc:1;
+++ /dev/null
-From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 03:54:05 +0100
-Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
- own file
-
-Move device registration code into its own file to allow sharing it
-between board implementations.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Makefile | 1 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
- arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 8 ++
- 4 files changed, 223 insertions(+), 183 deletions(-)
- create mode 100644 arch/mips/bcm63xx/boards/board_common.c
- create mode 100644 arch/mips/bcm63xx/boards/board_common.h
-
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1 +1,2 @@
-+obj-y += board_common.o
- obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -12,33 +12,21 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
--#include <linux/platform_device.h>
--#include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_nvram.h>
--#include <bcm63xx_dev_pci.h>
--#include <bcm63xx_dev_enet.h>
--#include <bcm63xx_dev_flash.h>
--#include <bcm63xx_dev_hsspi.h>
--#include <bcm63xx_dev_pcmcia.h>
--#include <bcm63xx_dev_spi.h>
--#include <bcm63xx_dev_usb_ehci.h>
--#include <bcm63xx_dev_usb_ohci.h>
--#include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-+#include "board_common.h"
-+
- #include <uapi/linux/bcm933xx_hcs.h>
-
-
- #define HCS_OFFSET_128K 0x20000
-
--static struct board_info board;
--
- /*
- * known 3368 boards
- */
-@@ -695,52 +683,6 @@ static const struct board_info __initcon
- };
-
- /*
-- * Register a sane SPROMv2 to make the on-board
-- * bcm4318 WLAN work
-- */
--#ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-- .revision = 0x02,
-- .board_rev = 0x17,
-- .country_code = 0x0,
-- .ant_available_bg = 0x3,
-- .pa0b0 = 0x15ae,
-- .pa0b1 = 0xfa85,
-- .pa0b2 = 0xfe8d,
-- .pa1b0 = 0xffff,
-- .pa1b1 = 0xffff,
-- .pa1b2 = 0xffff,
-- .gpio0 = 0xff,
-- .gpio1 = 0xff,
-- .gpio2 = 0xff,
-- .gpio3 = 0xff,
-- .maxpwr_bg = 0x004c,
-- .itssi_bg = 0x00,
-- .boardflags_lo = 0x2848,
-- .boardflags_hi = 0x0000,
--};
--
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--{
-- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-- return 0;
-- } else {
-- pr_err("unable to fill SPROM for given bustype\n");
-- return -EINVAL;
-- }
--}
--#endif
--
--/*
-- * return board name for /proc/cpuinfo
-- */
--const char *board_get_name(void)
--{
-- return board.name;
--}
--
--/*
- * early init callback, read nvram data from flash and checksum it
- */
- void __init board_prom_init(void)
-@@ -785,137 +727,15 @@ void __init board_prom_init(void)
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- continue;
- /* copy, board desc array is marked initdata */
-- memcpy(&board, bcm963xx_boards[i], sizeof(board));
-+ board_early_setup(bcm963xx_boards[i]);
- break;
- }
-
-- /* bail out if board is not found, will complain later */
-- if (!board.name[0]) {
-+ /* warn if board is not found, will complain later */
-+ if (i == ARRAY_SIZE(bcm963xx_boards)) {
- char name[17];
- memcpy(name, board_name, 16);
- name[16] = 0;
- pr_err("unknown bcm963xx board: %s\n", name);
-- return;
-- }
--
-- /* setup pin multiplexing depending on board enabled device,
-- * this has to be done this early since PCI init is done
-- * inside arch_initcall */
-- val = 0;
--
--#ifdef CONFIG_PCI
-- if (board.has_pci) {
-- bcm63xx_pci_enabled = 1;
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G2_PCI;
- }
--#endif
--
-- if (board.has_pccard) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G1_MII_PCCARD;
-- }
--
-- if (board.has_enet0 && !board.enet0.use_internal_phy) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G3_EXT_MII |
-- GPIO_MODE_6348_G0_EXT_MII;
-- }
--
-- if (board.has_enet1 && !board.enet1.use_internal_phy) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G3_EXT_MII |
-- GPIO_MODE_6348_G0_EXT_MII;
-- }
--
-- bcm_gpio_writel(val, GPIO_MODE_REG);
--}
--
--/*
-- * second stage init callback, good time to panic if we couldn't
-- * identify on which board we're running since early printk is working
-- */
--void __init board_setup(void)
--{
-- if (!board.name[0])
-- panic("unable to detect bcm963xx board");
-- pr_info("board name: %s\n", board.name);
--
-- /* make sure we're running on expected cpu */
-- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-- panic("unexpected CPU for bcm963xx board");
--}
--
--static struct gpio_led_platform_data bcm63xx_led_data;
--
--static struct platform_device bcm63xx_gpio_leds = {
-- .name = "leds-gpio",
-- .id = 0,
-- .dev.platform_data = &bcm63xx_led_data,
--};
--
--/*
-- * third stage init callback, register all board devices.
-- */
--int __init board_register_devices(void)
--{
-- if (board.has_uart0)
-- bcm63xx_uart_register(0);
--
-- if (board.has_uart1)
-- bcm63xx_uart_register(1);
--
-- if (board.has_pccard)
-- bcm63xx_pcmcia_register();
--
-- if (board.has_enet0 &&
-- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-- bcm63xx_enet_register(0, &board.enet0);
--
-- if (board.has_enet1 &&
-- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-- bcm63xx_enet_register(1, &board.enet1);
--
-- if (board.has_enetsw &&
-- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-- bcm63xx_enetsw_register(&board.enetsw);
--
-- if (board.has_usbd)
-- bcm63xx_usbd_register(&board.usbd);
--
-- if (board.has_ehci0)
-- bcm63xx_ehci_register();
--
-- if (board.has_ohci0)
-- bcm63xx_ohci_register();
--
-- /* Generate MAC address for WLAN and register our SPROM,
-- * do this after registering enet devices
-- */
--#ifdef CONFIG_SSB_PCIHOST
-- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- if (ssb_arch_register_fallback_sprom(
-- &bcm63xx_get_fallback_sprom) < 0)
-- pr_err("failed to register fallback SPROM\n");
-- }
--#endif
--
-- bcm63xx_spi_register();
--
-- bcm63xx_hsspi_register();
--
-- bcm63xx_flash_register();
--
-- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
-- bcm63xx_led_data.leds = board.leds;
--
-- platform_device_register(&bcm63xx_gpio_leds);
--
-- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-- gpio_request_one(board.ephy_reset_gpio,
-- board.ephy_reset_gpio_flags, "ephy-reset");
--
-- return 0;
- }
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -0,0 +1,214 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/ssb/ssb.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_uart.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_nvram.h>
-+#include <bcm63xx_gpio.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_enet.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <bcm63xx_dev_hsspi.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+#include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+#include <bcm63xx_dev_usb_usbd.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX "board: "
-+
-+static struct board_info board;
-+
-+/*
-+ * Register a sane SPROMv2 to make the on-board
-+ * bcm4318 WLAN work
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+static struct ssb_sprom bcm63xx_sprom = {
-+ .revision = 0x02,
-+ .board_rev = 0x17,
-+ .country_code = 0x0,
-+ .ant_available_bg = 0x3,
-+ .pa0b0 = 0x15ae,
-+ .pa0b1 = 0xfa85,
-+ .pa0b2 = 0xfe8d,
-+ .pa1b0 = 0xffff,
-+ .pa1b1 = 0xffff,
-+ .pa1b2 = 0xffff,
-+ .gpio0 = 0xff,
-+ .gpio1 = 0xff,
-+ .gpio2 = 0xff,
-+ .gpio3 = 0xff,
-+ .maxpwr_bg = 0x004c,
-+ .itssi_bg = 0x00,
-+ .boardflags_lo = 0x2848,
-+ .boardflags_hi = 0x0000,
-+};
-+
-+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->bustype == SSB_BUSTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-+
-+/*
-+ * return board name for /proc/cpuinfo
-+ */
-+const char *board_get_name(void)
-+{
-+ return board.name;
-+}
-+
-+/*
-+ * setup board for device registration
-+ */
-+void __init board_early_setup(const struct board_info *target)
-+{
-+ u32 val;
-+
-+ memcpy(&board, target, sizeof(board));
-+
-+ /* setup pin multiplexing depending on board enabled device,
-+ * this has to be done this early since PCI init is done
-+ * inside arch_initcall */
-+ val = 0;
-+
-+#ifdef CONFIG_PCI
-+ if (board.has_pci) {
-+ bcm63xx_pci_enabled = 1;
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G2_PCI;
-+ }
-+#endif
-+
-+ if (board.has_pccard) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+ }
-+
-+ if (board.has_enet0 && !board.enet0.use_internal_phy) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G3_EXT_MII |
-+ GPIO_MODE_6348_G0_EXT_MII;
-+ }
-+
-+ if (board.has_enet1 && !board.enet1.use_internal_phy) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G3_EXT_MII |
-+ GPIO_MODE_6348_G0_EXT_MII;
-+ }
-+
-+ bcm_gpio_writel(val, GPIO_MODE_REG);
-+}
-+
-+
-+/*
-+ * second stage init callback, good time to panic if we couldn't
-+ * identify on which board we're running since early printk is working
-+ */
-+void __init board_setup(void)
-+{
-+ if (!board.name[0])
-+ panic("unable to detect bcm963xx board");
-+ printk(KERN_INFO PFX "board name: %s\n", board.name);
-+
-+ /* make sure we're running on expected cpu */
-+ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-+ panic("unexpected CPU for bcm963xx board");
-+}
-+
-+static struct gpio_led_platform_data bcm63xx_led_data;
-+
-+static struct platform_device bcm63xx_gpio_leds = {
-+ .name = "leds-gpio",
-+ .id = 0,
-+ .dev.platform_data = &bcm63xx_led_data,
-+};
-+
-+/*
-+ * third stage init callback, register all board devices.
-+ */
-+int __init board_register_devices(void)
-+{
-+ if (board.has_uart0)
-+ bcm63xx_uart_register(0);
-+
-+ if (board.has_uart1)
-+ bcm63xx_uart_register(1);
-+
-+ if (board.has_pccard)
-+ bcm63xx_pcmcia_register();
-+
-+ if (board.has_enet0 &&
-+ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+ bcm63xx_enet_register(0, &board.enet0);
-+
-+ if (board.has_enet1 &&
-+ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+ bcm63xx_enet_register(1, &board.enet1);
-+
-+ if (board.has_enetsw &&
-+ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+ bcm63xx_enetsw_register(&board.enetsw);
-+
-+ if (board.has_usbd)
-+ bcm63xx_usbd_register(&board.usbd);
-+
-+ if (board.has_ehci0)
-+ bcm63xx_ehci_register();
-+
-+ if (board.has_ohci0)
-+ bcm63xx_ohci_register();
-+
-+ /* Generate MAC address for WLAN and register our SPROM,
-+ * do this after registering enet devices
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+ if (ssb_arch_register_fallback_sprom(
-+ &bcm63xx_get_fallback_sprom) < 0)
-+ pr_err(PFX "failed to register fallback SPROM\n");
-+ }
-+#endif
-+
-+ bcm63xx_spi_register();
-+
-+ bcm63xx_hsspi_register();
-+
-+ bcm63xx_flash_register();
-+
-+ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
-+ bcm63xx_led_data.leds = board.leds;
-+
-+ platform_device_register(&bcm63xx_gpio_leds);
-+
-+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-+ gpio_request_one(board.ephy_reset_gpio,
-+ board.ephy_reset_gpio_flags, "ephy-reset");
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -0,0 +1,8 @@
-+#ifndef __BOARD_COMMON_H
-+#define __BOARD_COMMON_H
-+
-+#include <board_bcm963xx.h>
-+
-+void board_early_setup(const struct board_info *board);
-+
-+#endif /* __BOARD_COMMON_H */
+++ /dev/null
-From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:08:06 +0100
-Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
- setup
-
-Pass a mac address allocator to board setup code to allow board
-implementations to work with third party bootloaders not using nvram
-for configuration storage.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++-
- arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------
- arch/mips/bcm63xx/boards/board_common.h | 3 ++-
- 3 files changed, 14 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -727,7 +727,8 @@ void __init board_prom_init(void)
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- continue;
- /* copy, board desc array is marked initdata */
-- board_early_setup(bcm963xx_boards[i]);
-+ board_early_setup(bcm963xx_boards[i],
-+ bcm63xx_nvram_get_mac_address);
- break;
- }
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -18,7 +18,6 @@
- #include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
--#include <bcm63xx_nvram.h>
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_dev_pci.h>
- #include <bcm63xx_dev_enet.h>
-@@ -81,15 +80,20 @@ const char *board_get_name(void)
- return board.name;
- }
-
-+static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
-+
- /*
- * setup board for device registration
- */
--void __init board_early_setup(const struct board_info *target)
-+void __init board_early_setup(const struct board_info *target,
-+ int (*get_mac_address)(u8 mac[ETH_ALEN]))
- {
- u32 val;
-
- memcpy(&board, target, sizeof(board));
-
-+ board_get_mac_address = get_mac_address;
-+
- /* setup pin multiplexing depending on board enabled device,
- * this has to be done this early since PCI init is done
- * inside arch_initcall */
-@@ -162,15 +166,15 @@ int __init board_register_devices(void)
- bcm63xx_pcmcia_register();
-
- if (board.has_enet0 &&
-- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+ !board_get_mac_address(board.enet0.mac_addr))
- bcm63xx_enet_register(0, &board.enet0);
-
- if (board.has_enet1 &&
-- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+ !board_get_mac_address(board.enet1.mac_addr))
- bcm63xx_enet_register(1, &board.enet1);
-
- if (board.has_enetsw &&
-- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+ !board_get_mac_address(board.enetsw.mac_addr))
- bcm63xx_enetsw_register(&board.enetsw);
-
- if (board.has_usbd)
-@@ -186,7 +190,7 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
- #ifdef CONFIG_SSB_PCIHOST
-- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- if (ssb_arch_register_fallback_sprom(
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -3,6 +3,7 @@
-
- #include <board_bcm963xx.h>
-
--void board_early_setup(const struct board_info *board);
-+void board_early_setup(const struct board_info *board,
-+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -707,10 +707,20 @@ void __init board_prom_init(void)
-
- /* dump cfe version */
- cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
-- if (!memcmp(cfe, "cfe-v", 5))
-- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-- else
-+ if (strstarts(cfe, "cfe-")) {
-+ if(cfe[4] == 'v') {
-+ if(cfe[5] == 'd')
-+ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
-+ else if (cfe[10] > 0)
-+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
-+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
-+ else
-+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-+ } else {
-+ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
-+ }
-+ } else
- strcpy(cfe_version, "unknown");
- pr_info("CFE version: %s\n", cfe_version);
-
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-@@ -2,6 +2,8 @@
- #ifndef BCM63XX_BOARD_H_
- #define BCM63XX_BOARD_H_
-
-+#include <asm/bootinfo.h>
-+
- const char *board_get_name(void);
-
- void board_prom_init(void);
-@@ -10,4 +12,8 @@ void board_setup(void);
-
- int board_register_devices(void);
-
-+static inline bool bcm63xx_is_cfe_present(void) {
-+ return fw_arg3 == 0x43464531;
-+}
-+
- #endif /* ! BCM63XX_BOARD_H_ */
+++ /dev/null
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -35,6 +35,8 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/of.h>
-+
-+#include <asm/mach-bcm63xx/bcm63xx_board.h>
-
- #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
-
-@@ -46,30 +48,6 @@
- #define STR_NULL_TERMINATE(x) \
- do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
-
--static int bcm63xx_detect_cfe(struct mtd_info *master)
--{
-- char buf[9];
-- int ret;
-- size_t retlen;
--
-- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
-- (void *)buf);
-- buf[retlen] = 0;
--
-- if (ret)
-- return ret;
--
-- if (strncmp("cfe-v", buf, 5) == 0)
-- return 0;
--
-- /* very old CFE's do not have the cfe-v string, so check for magic */
-- ret = mtd_read(master, BCM963XX_CFE_MAGIC_OFFSET, 8, &retlen,
-- (void *)buf);
-- buf[retlen] = 0;
--
-- return strncmp("CFE1CFE1", buf, 8);
--}
--
- static int bcm63xx_read_nvram(struct mtd_info *master,
- struct bcm963xx_nvram *nvram)
- {
-@@ -152,7 +130,7 @@ static int bcm63xx_parse_cfe_partitions(
- struct bcm963xx_nvram *nvram = NULL;
- int ret;
-
-- if (bcm63xx_detect_cfe(master))
-+ if (!bcm63xx_is_cfe_present())
- return -EINVAL;
-
- nvram = vzalloc(sizeof(*nvram));
+++ /dev/null
-From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:53:12 +0100
-Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq
- controller
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- .../brcm,bcm6345-periph-intc.txt | 50 +++
- drivers/irqchip/Kconfig | 4 +
- drivers/irqchip/Makefile | 1 +
- drivers/irqchip/irq-bcm6345-periph.c | 339 ++++++++++++++++++++
- include/linux/irqchip/irq-bcm6345-periph.h | 16 +
- 5 files changed, 410 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
- create mode 100644 drivers/irqchip/irq-bcm6345-periph.c
- create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
-@@ -0,0 +1,50 @@
-+Broadcom BCM6345 Level 1 periphery interrupt controller
-+
-+This block is a interrupt controller that is typically connected directly
-+to one of the HW INT lines on each CPU. Every BCM63XX xDSL chip since
-+BCM6345 has contained this hardware.
-+
-+Key elements of the hardware design include:
-+
-+- 32, 64, or 128 incoming level IRQ lines
-+
-+- All onchip peripherals are wired directly to an L2 input
-+
-+- A separate instance of the register set for each CPU, allowing individual
-+ peripheral IRQs to be routed to any CPU
-+
-+- No atomic mask/unmask operations
-+
-+- No polarity/level/edge settings
-+
-+- No FIFO or priority encoder logic; software is expected to read all
-+ 1-4 status words to determine which IRQs are pending
-+
-+Required properties:
-+
-+- compatible: Should be "brcm,bcm6345-periph-intc".
-+- reg: Specifies the base physical address and size of the registers.
-+ Multiple register addresses may be specified, and must match the amount of
-+ parent interrupts.
-+- interrupt-controller: Identifies the node as an interrupt controller.
-+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
-+ source, should be 1.
-+- interrupt-parent: Specifies the phandle to the parent interrupt controller
-+ this one is cascaded from.
-+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
-+ node, valid values depend on the type of parent interrupt controller.
-+ Multiple lines are used to route interrupts to different cpus, with the first
-+ assumed to be for the boot CPU.
-+
-+Example:
-+
-+periph_intc: interrupt-controller@f0406800 {
-+ compatible = "brcm,bcm6345-periph-intc";
-+ reg = <0x10000020 0x10>, <0x10000030 0x10>;
-+
-+ interrupt-controller;
-+ #interrupt-cells = <1>;
-+
-+ interrupt-parent = <&cpu_intc>;
-+ interrupts = <2>, <3>;
-+};
---- a/drivers/irqchip/Kconfig
-+++ b/drivers/irqchip/Kconfig
-@@ -114,6 +114,10 @@ config BRCMSTB_L2_IRQ
- select GENERIC_IRQ_CHIP
- select IRQ_DOMAIN
-
-+config BCM6345_PERIPH_IRQ
-+ bool
-+ select IRQ_DOMAIN
-+
- config DW_APB_ICTL
- bool
- select GENERIC_IRQ_CHIP
---- a/drivers/irqchip/Makefile
-+++ b/drivers/irqchip/Makefile
-@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
- obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
- obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
- obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
-+obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
- obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
- obj-$(CONFIG_METAG) += irq-metag-ext.o
- obj-$(CONFIG_METAG_PERFCOUNTER_IRQS) += irq-metag.o
---- /dev/null
-+++ b/drivers/irqchip/irq-bcm6345-periph.c
-@@ -0,0 +1,339 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#include <linux/ioport.h>
-+#include <linux/irq.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqchip/irq-bcm6345-periph.h>
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#ifdef CONFIG_BCM63XX
-+#include <asm/mach-bcm63xx/bcm63xx_irq.h>
-+
-+#define VIRQ_BASE IRQ_INTERNAL_BASE
-+#else
-+#define VIRQ_BASE 0
-+#endif
-+
-+#define MAX_WORDS 4
-+#define MAX_PARENT_IRQS 2
-+#define IRQS_PER_WORD 32
-+
-+struct intc_block {
-+ int parent_irq;
-+ void __iomem *base;
-+ void __iomem *en_reg[MAX_WORDS];
-+ void __iomem *status_reg[MAX_WORDS];
-+ u32 mask_cache[MAX_WORDS];
-+};
-+
-+struct intc_data {
-+ struct irq_chip chip;
-+ struct intc_block block[MAX_PARENT_IRQS];
-+
-+ int num_words;
-+
-+ struct irq_domain *domain;
-+ raw_spinlock_t lock;
-+};
-+
-+static void bcm6345_periph_irq_handle(struct irq_desc *desc)
-+{
-+ struct intc_data *data = irq_desc_get_handler_data(desc);
-+ struct irq_chip *chip = irq_desc_get_chip(desc);
-+ struct intc_block *block;
-+ unsigned int irq = irq_desc_get_irq(desc);
-+ unsigned int idx;
-+
-+ chained_irq_enter(chip, desc);
-+
-+ for (idx = 0; idx < MAX_PARENT_IRQS; idx++)
-+ if (irq == data->block[idx].parent_irq)
-+ block = &data->block[idx];
-+
-+ for (idx = 0; idx < data->num_words; idx++) {
-+ int base = idx * IRQS_PER_WORD;
-+ unsigned long pending;
-+ int hw_irq;
-+
-+ raw_spin_lock(&data->lock);
-+ pending = __raw_readl(block->en_reg[idx]) &
-+ __raw_readl(block->status_reg[idx]);
-+ raw_spin_unlock(&data->lock);
-+
-+ for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) {
-+ int virq;
-+
-+ virq = irq_find_mapping(data->domain, base + hw_irq);
-+ generic_handle_irq(virq);
-+ }
-+ }
-+
-+ chained_irq_exit(chip, desc);
-+}
-+
-+static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit,
-+ bool enable)
-+{
-+ u32 val;
-+
-+ val = __raw_readl(block->en_reg[reg]);
-+ if (enable)
-+ val |= BIT(bit);
-+ else
-+ val &= ~BIT(bit);
-+ __raw_writel(val, block->en_reg[reg]);
-+}
-+
-+static void bcm6345_periph_irq_mask(struct irq_data *data)
-+{
-+ unsigned int i, reg, bit;
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ raw_spin_lock(&priv->lock);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_periph_irq_unmask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ unsigned int i, reg, bit;
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ raw_spin_lock(&priv->lock);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ if (block->mask_cache[reg] & BIT(bit))
-+ __bcm6345_periph_enable(block, reg, bit, true);
-+ else
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+#ifdef CONFIG_SMP
-+static int bcm6345_periph_set_affinity(struct irq_data *data,
-+ const struct cpumask *mask, bool force)
-+{
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ struct intc_data *priv = data->domain->host_data;
-+ unsigned int i, reg, bit;
-+ unsigned long flags;
-+ bool enabled;
-+ int cpu;
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ /* we could route to more than one cpu, but performance
-+ suffers, so fix it to one.
-+ */
-+ cpu = cpumask_any_and(mask, cpu_online_mask);
-+ if (cpu >= nr_cpu_ids)
-+ return -EINVAL;
-+
-+ if (cpu >= MAX_PARENT_IRQS)
-+ return -EINVAL;
-+
-+ if (!priv->block[cpu].parent_irq)
-+ return -EINVAL;
-+
-+ raw_spin_lock_irqsave(&priv->lock, flags);
-+ enabled = !irqd_irq_masked(data);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ if (i == cpu) {
-+ block->mask_cache[reg] |= BIT(bit);
-+ __bcm6345_periph_enable(block, reg, bit, enabled);
-+ } else {
-+ block->mask_cache[reg] &= ~BIT(bit);
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ }
-+ raw_spin_unlock_irqrestore(&priv->lock, flags);
-+
-+ return 0;
-+}
-+#endif
-+
-+static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq,
-+ irq_hw_number_t hw)
-+{
-+ struct intc_data *priv = d->host_data;
-+
-+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
-+
-+ return 0;
-+}
-+
-+static const struct irq_domain_ops bcm6345_periph_domain_ops = {
-+ .xlate = irq_domain_xlate_onecell,
-+ .map = bcm6345_periph_map,
-+};
-+
-+static int __init __bcm6345_periph_intc_init(struct device_node *node,
-+ int num_blocks, int *irq,
-+ void __iomem **base, int num_words)
-+{
-+ struct intc_data *data;
-+ unsigned int i, w, status_offset;
-+
-+ data = kzalloc(sizeof(*data), GFP_KERNEL);
-+ if (!data)
-+ return -ENOMEM;
-+
-+ raw_spin_lock_init(&data->lock);
-+
-+ status_offset = num_words * sizeof(u32);
-+
-+ for (i = 0; i < num_blocks; i++) {
-+ struct intc_block *block = &data->block[i];
-+
-+ block->parent_irq = irq[i];
-+ block->base = base[i];
-+
-+ for (w = 0; w < num_words; w++) {
-+ int word_offset = sizeof(u32) * ((num_words - w) - 1);
-+
-+ block->en_reg[w] = base[i] + word_offset;
-+ block->status_reg[w] = base[i] + status_offset;
-+ block->status_reg[w] += word_offset;
-+
-+ /* route all interrupts to line 0 by default */
-+ if (i == 0)
-+ block->mask_cache[w] = 0xffffffff;
-+ }
-+
-+ irq_set_handler_data(block->parent_irq, data);
-+ irq_set_chained_handler(block->parent_irq,
-+ bcm6345_periph_irq_handle);
-+ }
-+
-+ data->num_words = num_words;
-+
-+ data->chip.name = "bcm6345-periph-intc";
-+ data->chip.irq_mask = bcm6345_periph_irq_mask;
-+ data->chip.irq_unmask = bcm6345_periph_irq_unmask;
-+
-+#ifdef CONFIG_SMP
-+ if (num_blocks > 1)
-+ data->chip.irq_set_affinity = bcm6345_periph_set_affinity;
-+#endif
-+
-+ data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words,
-+ VIRQ_BASE,
-+ &bcm6345_periph_domain_ops, data);
-+ if (!data->domain) {
-+ kfree(data);
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+void __init bcm6345_periph_intc_init(int num_blocks, int *irq,
-+ void __iomem **base, int num_words)
-+{
-+ __bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words);
-+}
-+
-+#ifdef CONFIG_OF
-+static int __init bcm6345_periph_of_init(struct device_node *node,
-+ struct device_node *parent)
-+{
-+ struct resource res;
-+ int num_irqs, ret = -EINVAL;
-+ int irqs[MAX_PARENT_IRQS] = { 0 };
-+ void __iomem *bases[MAX_PARENT_IRQS] = { NULL };
-+ int words = 0;
-+ int i;
-+
-+ num_irqs = of_irq_count(node);
-+
-+ if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS)
-+ return -EINVAL;
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ resource_size_t size;
-+
-+ irqs[i] = irq_of_parse_and_map(node, i);
-+ if (!irqs[i])
-+ goto out_unmap;
-+
-+ if (of_address_to_resource(node, i, &res))
-+ goto out_unmap;
-+
-+ size = resource_size(&res);
-+ switch (size) {
-+ case 8:
-+ case 16:
-+ case 32:
-+ size = size / 8;
-+ break;
-+ default:
-+ goto out_unmap;
-+ }
-+
-+ if (words && words != size) {
-+ ret = -EINVAL;
-+ goto out_unmap;
-+ }
-+ words = size;
-+
-+ bases[i] = of_iomap(node, i);
-+ if (!bases[i]) {
-+ ret = -ENOMEM;
-+ goto out_unmap;
-+ }
-+ }
-+
-+ ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words);
-+ if (!ret)
-+ return 0;
-+
-+out_unmap:
-+ for (i = 0; i < num_irqs; i++) {
-+ iounmap(bases[i]);
-+ irq_dispose_mapping(irqs[i]);
-+ }
-+
-+ return ret;
-+}
-+
-+IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-l1-intc",
-+ bcm6345_periph_of_init);
-+#endif
---- /dev/null
-+++ b/include/linux/irqchip/irq-bcm6345-periph.h
-@@ -0,0 +1,16 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
-+ */
-+
-+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
-+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
-+
-+void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base,
-+ int num_words);
-+
-+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */
+++ /dev/null
-From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:54:27 +0100
-Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
- interrupt controller
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- .../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++
- drivers/irqchip/Kconfig | 4 +
- drivers/irqchip/Makefile | 1 +
- drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++
- include/linux/irqchip/irq-bcm6345-ext.h | 14 +
- 5 files changed, 335 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
- create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
- create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
-@@ -0,0 +1,29 @@
-+Broadcom BCM6345-style external interrupt controller
-+
-+Required properties:
-+
-+- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc".
-+- reg: Specifies the base physical addresses and size of the registers.
-+- interrupt-controller: identifies the node as an interrupt controller.
-+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
-+ source, Should be 2.
-+- interrupt-parent: Specifies the phandle to the parent interrupt controller
-+ this one is cascaded from.
-+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
-+ node, valid values depend on the type of parent interrupt controller.
-+
-+Optional properties:
-+
-+- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
-+ register. Defaults to 4.
-+
-+Example:
-+
-+ext_intc: interrupt-controller@10000018 {
-+ compatible = "brcm,bcm6345-ext-intc";
-+ interrupt-parent = <&periph_intc>;
-+ #interrupt-cells = <2>;
-+ reg = <0x10000018 0x4>;
-+ interrupt-controller;
-+ interrupts = <24>, <25>, <26>, <27>;
-+};
---- a/drivers/irqchip/Kconfig
-+++ b/drivers/irqchip/Kconfig
-@@ -114,6 +114,10 @@ config BRCMSTB_L2_IRQ
- select GENERIC_IRQ_CHIP
- select IRQ_DOMAIN
-
-+config BCM6345_EXT_IRQ
-+ bool
-+ select IRQ_DOMAIN
-+
- config BCM6345_PERIPH_IRQ
- bool
- select IRQ_DOMAIN
---- a/drivers/irqchip/Makefile
-+++ b/drivers/irqchip/Makefile
-@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
- obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
- obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
- obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
-+obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o
- obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
- obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
- obj-$(CONFIG_METAG) += irq-metag-ext.o
---- /dev/null
-+++ b/drivers/irqchip/irq-bcm6345-ext.c
-@@ -0,0 +1,301 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#include <linux/ioport.h>
-+#include <linux/irq.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqchip/irq-bcm6345-ext.h>
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#ifdef CONFIG_BCM63XX
-+#include <asm/mach-bcm63xx/bcm63xx_irq.h>
-+
-+#define VIRQ_BASE IRQ_EXTERNAL_BASE
-+#else
-+#define VIRQ_BASE 0
-+#endif
-+
-+#define MAX_IRQS 4
-+
-+#define EXTIRQ_CFG_SENSE 0
-+#define EXTIRQ_CFG_STAT 1
-+#define EXTIRQ_CFG_CLEAR 2
-+#define EXTIRQ_CFG_MASK 3
-+#define EXTIRQ_CFG_BOTHEDGE 4
-+#define EXTIRQ_CFG_LEVELSENSE 5
-+
-+struct intc_data {
-+ struct irq_chip chip;
-+ struct irq_domain *domain;
-+ raw_spinlock_t lock;
-+
-+ int parent_irq[MAX_IRQS];
-+ void __iomem *reg;
-+ int shift;
-+ unsigned int toggle_clear_on_ack:1;
-+};
-+
-+static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
-+{
-+ struct intc_data *data = irq_desc_get_handler_data(desc);
-+ struct irq_chip *chip = irq_desc_get_chip(desc);
-+ unsigned int irq = irq_desc_get_irq(desc);
-+ unsigned int idx;
-+
-+ chained_irq_enter(chip, desc);
-+
-+ for (idx = 0; idx < MAX_IRQS; idx++) {
-+ if (data->parent_irq[idx] != irq)
-+ continue;
-+
-+ generic_handle_irq(irq_find_mapping(data->domain, idx));
-+ }
-+
-+ chained_irq_exit(chip, desc);
-+}
-+
-+static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
-+ priv->reg);
-+ if (priv->toggle_clear_on_ack)
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static int bcm6345_ext_intc_set_type(struct irq_data *data,
-+ unsigned int flow_type)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ bool levelsense = 0, sense = 0, bothedge = 0;
-+ u32 reg;
-+
-+ flow_type &= IRQ_TYPE_SENSE_MASK;
-+
-+ if (flow_type == IRQ_TYPE_NONE)
-+ flow_type = IRQ_TYPE_LEVEL_LOW;
-+
-+ switch (flow_type) {
-+ case IRQ_TYPE_EDGE_BOTH:
-+ bothedge = 1;
-+ break;
-+
-+ case IRQ_TYPE_EDGE_RISING:
-+ sense = 1;
-+ break;
-+
-+ case IRQ_TYPE_EDGE_FALLING:
-+ break;
-+
-+ case IRQ_TYPE_LEVEL_HIGH:
-+ levelsense = 1;
-+ sense = 1;
-+ break;
-+
-+ case IRQ_TYPE_LEVEL_LOW:
-+ levelsense = 1;
-+ break;
-+
-+ default:
-+ pr_err("bogus flow type combination given!\n");
-+ return -EINVAL;
-+ }
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+
-+ if (levelsense)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
-+ if (sense)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
-+ if (bothedge)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
-+
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+
-+ irqd_set_trigger_type(data, flow_type);
-+ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-+ irq_set_handler_locked(data, handle_level_irq);
-+ else
-+ irq_set_handler_locked(data, handle_edge_irq);
-+
-+ return 0;
-+}
-+
-+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
-+ irq_hw_number_t hw)
-+{
-+ struct intc_data *priv = d->host_data;
-+
-+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
-+
-+ return 0;
-+}
-+
-+static const struct irq_domain_ops bcm6345_ext_domain_ops = {
-+ .xlate = irq_domain_xlate_twocell,
-+ .map = bcm6345_ext_intc_map,
-+};
-+
-+static int __init __bcm6345_ext_intc_init(struct device_node *node,
-+ int num_irqs, int *irqs,
-+ void __iomem *reg, int shift,
-+ bool toggle_clear_on_ack)
-+{
-+ struct intc_data *data;
-+ unsigned int i;
-+ int start = VIRQ_BASE;
-+
-+ data = kzalloc(sizeof(*data), GFP_KERNEL);
-+ if (!data)
-+ return -ENOMEM;
-+
-+ raw_spin_lock_init(&data->lock);
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ data->parent_irq[i] = irqs[i];
-+
-+ irq_set_handler_data(irqs[i], data);
-+ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
-+ }
-+
-+ data->reg = reg;
-+ data->shift = shift;
-+ data->toggle_clear_on_ack = toggle_clear_on_ack;
-+
-+ data->chip.name = "bcm6345-ext-intc";
-+ data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
-+ data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
-+ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
-+ data->chip.irq_set_type = bcm6345_ext_intc_set_type;
-+
-+ /*
-+ * If we have less than 4 irqs, this is the second controller on
-+ * bcm63xx. So increase the VIRQ start to not overlap with the first
-+ * one, but only do so if we actually use a non-zero start.
-+ *
-+ * This can be removed when bcm63xx has no legacy users anymore.
-+ */
-+ if (start && num_irqs < 4)
-+ start += 4;
-+
-+ data->domain = irq_domain_add_simple(node, num_irqs, start,
-+ &bcm6345_ext_domain_ops, data);
-+ if (!data->domain) {
-+ kfree(data);
-+ return -ENOMEM;
-+ }
-+
-+ return 0;
-+}
-+
-+void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
-+ int shift)
-+{
-+ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false);
-+}
-+
-+#ifdef CONFIG_OF
-+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
-+ struct device_node *parent)
-+{
-+ int num_irqs, ret = -EINVAL;
-+ unsigned i;
-+ void __iomem *base;
-+ int irqs[MAX_IRQS] = { 0 };
-+ u32 shift;
-+ bool toggle_clear_on_ack = false;
-+
-+ num_irqs = of_irq_count(node);
-+
-+ if (!num_irqs || num_irqs > MAX_IRQS)
-+ return -EINVAL;
-+
-+ if (of_property_read_u32(node, "brcm,field-width", &shift))
-+ shift = 4;
-+
-+ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */
-+ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
-+ toggle_clear_on_ack = true;
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ irqs[i] = irq_of_parse_and_map(node, i);
-+ if (!irqs[i]) {
-+ ret = -ENOMEM;
-+ goto out_unmap;
-+ }
-+ }
-+
-+ base = of_iomap(node, 0);
-+ if (!base)
-+ goto out_unmap;
-+
-+ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
-+ toggle_clear_on_ack);
-+ if (!ret)
-+ return 0;
-+out_unmap:
-+ iounmap(base);
-+
-+ for (i = 0; i < num_irqs; i++)
-+ irq_dispose_mapping(irqs[i]);
-+
-+ return ret;
-+}
-+
-+IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
-+ bcm6345_ext_intc_of_init);
-+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
-+ bcm6345_ext_intc_of_init);
-+#endif
---- /dev/null
-+++ b/include/linux/irqchip/irq-bcm6345-ext.h
-@@ -0,0 +1,14 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
-+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
-+
-+void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
-+
-+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
+++ /dev/null
-From d2d2489e0a4b740abd980e9d1cad952d15bc2d9e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:55:02 +0100
-Subject: [PATCH] MIPS: BCM63XX: switch to IRQ_DOMAIN
-
-Now that we have working IRQ_DOMAIN drivers for both interrupt controllers,
-switch to using them.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 3 +
- arch/mips/bcm63xx/irq.c | 612 +++++++++---------------------------------------
- 2 files changed, 108 insertions(+), 507 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -272,6 +272,9 @@ config BCM63XX
- select SYNC_R4K
- select DMA_NONCOHERENT
- select IRQ_MIPS_CPU
-+ select BCM6345_EXT_IRQ
-+ select BCM6345_PERIPH_IRQ
-+ select IRQ_DOMAIN
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_HAS_EARLY_PRINTK
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -11,7 +11,9 @@
- #include <linux/init.h>
- #include <linux/interrupt.h>
- #include <linux/irq.h>
--#include <linux/spinlock.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/irq-bcm6345-ext.h>
-+#include <linux/irqchip/irq-bcm6345-periph.h>
- #include <asm/irq_cpu.h>
- #include <asm/mipsregs.h>
- #include <bcm63xx_cpu.h>
-@@ -19,544 +21,140 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-
--
--static DEFINE_SPINLOCK(ipic_lock);
--static DEFINE_SPINLOCK(epic_lock);
--
--static u32 irq_stat_addr[2];
--static u32 irq_mask_addr[2];
--static void (*dispatch_internal)(int cpu);
--static int is_ext_irq_cascaded;
--static unsigned int ext_irq_count;
--static unsigned int ext_irq_start, ext_irq_end;
--static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
--static void (*internal_irq_mask)(struct irq_data *d);
--static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
--
--
--static inline u32 get_ext_irq_perf_reg(int irq)
--{
-- if (irq < 4)
-- return ext_irq_cfg_reg1;
-- return ext_irq_cfg_reg2;
--}
--
--static inline void handle_internal(int intbit)
--{
-- if (is_ext_irq_cascaded &&
-- intbit >= ext_irq_start && intbit <= ext_irq_end)
-- do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
-- else
-- do_IRQ(intbit + IRQ_INTERNAL_BASE);
--}
--
--static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
-- const struct cpumask *m)
--{
-- bool enable = cpu_online(cpu);
--
--#ifdef CONFIG_SMP
-- if (m)
-- enable &= cpumask_test_cpu(cpu, m);
-- else if (irqd_affinity_was_set(d))
-- enable &= cpumask_test_cpu(cpu, irq_data_get_affinity_mask(d));
--#endif
-- return enable;
--}
--
--/*
-- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
-- * prioritize any interrupt relatively to another. the static counter
-- * will resume the loop where it ended the last time we left this
-- * function.
-- */
--
--#define BUILD_IPIC_INTERNAL(width) \
--void __dispatch_internal_##width(int cpu) \
--{ \
-- u32 pending[width / 32]; \
-- unsigned int src, tgt; \
-- bool irqs_pending = false; \
-- static unsigned int i[2]; \
-- unsigned int *next = &i[cpu]; \
-- unsigned long flags; \
-- \
-- /* read registers in reverse order */ \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
-- u32 val; \
-- \
-- val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
-- val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
-- pending[--tgt] = val; \
-- \
-- if (val) \
-- irqs_pending = true; \
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
-- \
-- if (!irqs_pending) \
-- return; \
-- \
-- while (1) { \
-- unsigned int to_call = *next; \
-- \
-- *next = (*next + 1) & (width - 1); \
-- if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
-- handle_internal(to_call); \
-- break; \
-- } \
-- } \
--} \
-- \
--static void __internal_irq_mask_##width(struct irq_data *d) \
--{ \
-- u32 val; \
-- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
-- unsigned reg = (irq / 32) ^ (width/32 - 1); \
-- unsigned bit = irq & 0x1f; \
-- unsigned long flags; \
-- int cpu; \
-- \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for_each_present_cpu(cpu) { \
-- if (!irq_mask_addr[cpu]) \
-- break; \
-- \
-- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-- val &= ~(1 << bit); \
-- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
--} \
-- \
--static void __internal_irq_unmask_##width(struct irq_data *d, \
-- const struct cpumask *m) \
--{ \
-- u32 val; \
-- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
-- unsigned reg = (irq / 32) ^ (width/32 - 1); \
-- unsigned bit = irq & 0x1f; \
-- unsigned long flags; \
-- int cpu; \
-- \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for_each_present_cpu(cpu) { \
-- if (!irq_mask_addr[cpu]) \
-- break; \
-- \
-- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-- if (enable_irq_for_cpu(cpu, d, m)) \
-- val |= (1 << bit); \
-- else \
-- val &= ~(1 << bit); \
-- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
--}
--
--BUILD_IPIC_INTERNAL(32);
--BUILD_IPIC_INTERNAL(64);
--
--asmlinkage void plat_irq_dispatch(void)
--{
-- u32 cause;
--
-- do {
-- cause = read_c0_cause() & read_c0_status() & ST0_IM;
--
-- if (!cause)
-- break;
--
-- if (cause & CAUSEF_IP7)
-- do_IRQ(7);
-- if (cause & CAUSEF_IP0)
-- do_IRQ(0);
-- if (cause & CAUSEF_IP1)
-- do_IRQ(1);
-- if (cause & CAUSEF_IP2)
-- dispatch_internal(0);
-- if (is_ext_irq_cascaded) {
-- if (cause & CAUSEF_IP3)
-- dispatch_internal(1);
-- } else {
-- if (cause & CAUSEF_IP3)
-- do_IRQ(IRQ_EXT_0);
-- if (cause & CAUSEF_IP4)
-- do_IRQ(IRQ_EXT_1);
-- if (cause & CAUSEF_IP5)
-- do_IRQ(IRQ_EXT_2);
-- if (cause & CAUSEF_IP6)
-- do_IRQ(IRQ_EXT_3);
-- }
-- } while (1);
--}
--
--/*
-- * internal IRQs operations: only mask/unmask on PERF irq mask
-- * register.
-- */
--static void bcm63xx_internal_irq_mask(struct irq_data *d)
--{
-- internal_irq_mask(d);
--}
--
--static void bcm63xx_internal_irq_unmask(struct irq_data *d)
--{
-- internal_irq_unmask(d, NULL);
--}
--
--/*
-- * external IRQs operations: mask/unmask and clear on PERF external
-- * irq control register.
-- */
--static void bcm63xx_external_irq_mask(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4);
-- else
-- reg &= ~EXTIRQ_CFG_MASK(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- if (is_ext_irq_cascaded)
-- internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
--}
--
--static void bcm63xx_external_irq_unmask(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg |= EXTIRQ_CFG_MASK_6348(irq % 4);
-- else
-- reg |= EXTIRQ_CFG_MASK(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- if (is_ext_irq_cascaded)
-- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
-- NULL);
--}
--
--static void bcm63xx_external_irq_clear(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4);
-- else
-- reg |= EXTIRQ_CFG_CLEAR(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--}
--
--static int bcm63xx_external_irq_set_type(struct irq_data *d,
-- unsigned int flow_type)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- int levelsense, sense, bothedge;
-- unsigned long flags;
--
-- flow_type &= IRQ_TYPE_SENSE_MASK;
--
-- if (flow_type == IRQ_TYPE_NONE)
-- flow_type = IRQ_TYPE_LEVEL_LOW;
--
-- levelsense = sense = bothedge = 0;
-- switch (flow_type) {
-- case IRQ_TYPE_EDGE_BOTH:
-- bothedge = 1;
-- break;
--
-- case IRQ_TYPE_EDGE_RISING:
-- sense = 1;
-- break;
--
-- case IRQ_TYPE_EDGE_FALLING:
-- break;
--
-- case IRQ_TYPE_LEVEL_HIGH:
-- levelsense = 1;
-- sense = 1;
-- break;
--
-- case IRQ_TYPE_LEVEL_LOW:
-- levelsense = 1;
-- break;
--
-- default:
-- pr_err("bogus flow type combination given !\n");
-- return -EINVAL;
-- }
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
-- irq %= 4;
--
-- switch (bcm63xx_get_cpu_id()) {
-- case BCM6348_CPU_ID:
-- if (levelsense)
-- reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq);
-- if (sense)
-- reg |= EXTIRQ_CFG_SENSE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_SENSE_6348(irq);
-- if (bothedge)
-- reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
-- break;
--
-- case BCM3368_CPU_ID:
-- case BCM6328_CPU_ID:
-- case BCM6338_CPU_ID:
-- case BCM6345_CPU_ID:
-- case BCM6358_CPU_ID:
-- case BCM6362_CPU_ID:
-- case BCM6368_CPU_ID:
-- if (levelsense)
-- reg |= EXTIRQ_CFG_LEVELSENSE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
-- if (sense)
-- reg |= EXTIRQ_CFG_SENSE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_SENSE(irq);
-- if (bothedge)
-- reg |= EXTIRQ_CFG_BOTHEDGE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
-- break;
-- default:
-- BUG();
-- }
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- irqd_set_trigger_type(d, flow_type);
-- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-- irq_set_handler_locked(d, handle_level_irq);
-- else
-- irq_set_handler_locked(d, handle_edge_irq);
--
-- return IRQ_SET_MASK_OK_NOCOPY;
--}
--
--#ifdef CONFIG_SMP
--static int bcm63xx_internal_set_affinity(struct irq_data *data,
-- const struct cpumask *dest,
-- bool force)
--{
-- if (!irqd_irq_disabled(data))
-- internal_irq_unmask(data, dest);
--
-- return 0;
--}
--#endif
--
--static struct irq_chip bcm63xx_internal_irq_chip = {
-- .name = "bcm63xx_ipic",
-- .irq_mask = bcm63xx_internal_irq_mask,
-- .irq_unmask = bcm63xx_internal_irq_unmask,
--};
--
--static struct irq_chip bcm63xx_external_irq_chip = {
-- .name = "bcm63xx_epic",
-- .irq_ack = bcm63xx_external_irq_clear,
--
-- .irq_mask = bcm63xx_external_irq_mask,
-- .irq_unmask = bcm63xx_external_irq_unmask,
--
-- .irq_set_type = bcm63xx_external_irq_set_type,
--};
--
--static struct irqaction cpu_ip2_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_ip2",
-- .flags = IRQF_NO_THREAD,
--};
--
--#ifdef CONFIG_SMP
--static struct irqaction cpu_ip3_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_ip3",
-- .flags = IRQF_NO_THREAD,
--};
--#endif
--
--static struct irqaction cpu_ext_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_extirq",
-- .flags = IRQF_NO_THREAD,
--};
--
--static void bcm63xx_init_irq(void)
-+void __init arch_init_irq(void)
- {
-- int irq_bits;
--
-- irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
-- irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
-- irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
-- irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
-+ void __iomem *periph_bases[2];
-+ void __iomem *ext_intc_bases[2];
-+ int periph_irq_count, periph_width, ext_irq_count, ext_shift;
-+ int periph_irqs[2] = { 2, 3 };
-+ int ext_irqs[6];
-+
-+ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-
- switch (bcm63xx_get_cpu_id()) {
- case BCM3368_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-+ periph_bases[0] += PERF_IRQMASK_3368_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_3368_EXT_IRQ0;
-+ ext_irqs[1] = BCM_3368_EXT_IRQ1;
-+ ext_irqs[2] = BCM_3368_EXT_IRQ2;
-+ ext_irqs[3] = BCM_3368_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6328_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
-- irq_bits = 64;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
-+ periph_bases[0] += PERF_IRQMASK_6328_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6328_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6328_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6328_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6328_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6328_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6338_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
-+ periph_bases[0] += PERF_IRQMASK_6338_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 4;
- break;
- case BCM6345_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
-+ periph_bases[0] += PERF_IRQMASK_6345_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 4;
- break;
- case BCM6348_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
-+ periph_bases[0] += PERF_IRQMASK_6348_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 5;
- break;
- case BCM6358_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
-- irq_bits = 32;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
-+ periph_bases[0] += PERF_IRQMASK_6358_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6358_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6358_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6358_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6358_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6358_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6362_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
-- irq_bits = 64;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
-+ periph_bases[0] += PERF_IRQMASK_6362_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6362_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6362_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6362_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6362_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6362_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6368_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
-- irq_bits = 64;
-+ periph_bases[0] += PERF_IRQMASK_6368_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6368_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368;
-+ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368;
- ext_irq_count = 6;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
-- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
-+ ext_irqs[0] = BCM_6368_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6368_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6368_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6368_EXT_IRQ3;
-+ ext_irqs[4] = BCM_6368_EXT_IRQ4;
-+ ext_irqs[5] = BCM_6368_EXT_IRQ5;
-+ ext_shift = 4;
- break;
- default:
- BUG();
- }
-
-- if (irq_bits == 32) {
-- dispatch_internal = __dispatch_internal_32;
-- internal_irq_mask = __internal_irq_mask_32;
-- internal_irq_unmask = __internal_irq_unmask_32;
-- } else {
-- dispatch_internal = __dispatch_internal_64;
-- internal_irq_mask = __internal_irq_mask_64;
-- internal_irq_unmask = __internal_irq_unmask_64;
-- }
--}
--
--void __init arch_init_irq(void)
--{
-- int i;
--
-- bcm63xx_init_irq();
- mips_cpu_irq_init();
-- for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
-- irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
-- handle_level_irq);
--
-- for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i)
-- irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip,
-- handle_edge_irq);
--
-- if (!is_ext_irq_cascaded) {
-- for (i = 3; i < 3 + ext_irq_count; ++i)
-- setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
-- }
--
-- setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
--#ifdef CONFIG_SMP
-- if (is_ext_irq_cascaded) {
-- setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
-- bcm63xx_internal_irq_chip.irq_set_affinity =
-- bcm63xx_internal_set_affinity;
--
-- cpumask_clear(irq_default_affinity);
-- cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
-- }
--#endif
-+ bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases,
-+ periph_width);
-+ bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift);
-+ if (ext_irq_count > 4)
-+ bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1],
-+ ext_shift);
- }
+++ /dev/null
-From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 20:20:30 +0100
-Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
- and 5
-
-Due to the external interrupts being non consecutive, the previous
-implementation did not support them. Now that we treat both registers
-as separate irq controllers, there is no such limitation anymore and
-we can expose them for drivers to use.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 5 ++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
- 3 files changed, 7 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -108,11 +108,14 @@ void __init arch_init_irq(void)
- periph_width = 1;
-
- ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
-- ext_irq_count = 4;
-+ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
-+ ext_irq_count = 6;
- ext_irqs[0] = BCM_6358_EXT_IRQ0;
- ext_irqs[1] = BCM_6358_EXT_IRQ1;
- ext_irqs[2] = BCM_6358_EXT_IRQ2;
- ext_irqs[3] = BCM_6358_EXT_IRQ3;
-+ ext_irqs[4] = BCM_6358_EXT_IRQ4;
-+ ext_irqs[5] = BCM_6358_EXT_IRQ5;
- ext_shift = 4;
- break;
- case BCM6362_CPU_ID:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -896,6 +896,8 @@ enum bcm63xx_irq {
- #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
- #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
- #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
-+#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20)
-+#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21)
-
- /*
- * 6362 irqs
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -244,6 +244,7 @@
- #define PERF_EXTIRQ_CFG_REG_6362 0x18
- #define PERF_EXTIRQ_CFG_REG_6368 0x18
-
-+#define PERF_EXTIRQ_CFG_REG2_6358 0x1c
- #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
-
- /* for 6348 only */
+++ /dev/null
-From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:08:36 +0100
-Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
-
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 2 files changed, 28 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
- u16 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
-+static u32 bcm63xx_cpu_variant __read_mostly;
-+
- static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
-@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
-
- };
-
-+u32 bcm63xx_get_cpu_variant(void)
-+{
-+ return bcm63xx_cpu_variant;
-+}
-+
-+EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
-+
- u8 bcm63xx_get_cpu_rev(void)
- {
- return bcm63xx_cpu_rev;
-@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -20,6 +20,7 @@
- #define BCM6368_CPU_ID 0x6368
-
- void __init bcm63xx_cpu_init(void);
-+u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
-@@ -83,6 +84,23 @@ static inline u16 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-
-+#define BCMCPU_VARIANT_IS_3368() \
-+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6328() \
-+ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6338() \
-+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6345() \
-+ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6348() \
-+ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6358() \
-+ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6362() \
-+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6368() \
-+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
- * address of these sets do change.
+++ /dev/null
-From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:22:41 +0100
-Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
-
-Some SoC have a variant id field in the chip id register.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -10,6 +10,8 @@
- #define PERF_REV_REG 0x0
- #define REV_CHIPID_SHIFT 16
- #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_VARID_SHIFT 12
-+#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT 0
- #define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
-
+++ /dev/null
-From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:30:59 +0100
-Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
- 2 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void)
- unsigned int tmp;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
- chipid_reg = 0;
-@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6328_CPU_ID:
- bcm63xx_regs_base = bcm6328_regs_base;
- bcm63xx_irqs = bcm6328_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM63281_CPU_ID;
-+ else if (varid == 3)
-+ bcm63xx_cpu_variant = BCM63283_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6328 variant: %x\n", varid);
-+
- break;
- case BCM6338_CPU_ID:
- bcm63xx_regs_base = bcm6338_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -12,6 +12,8 @@
- */
- #define BCM3368_CPU_ID 0x3368
- #define BCM6328_CPU_ID 0x6328
-+#define BCM63281_CPU_ID 0x63281
-+#define BCM63283_CPU_ID 0x63283
- #define BCM6338_CPU_ID 0x6338
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
-@@ -86,8 +88,10 @@ static inline u16 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
--#define BCMCPU_VARIANT_IS_6328() \
-- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63281() \
-+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63283() \
-+ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
- #define BCMCPU_VARIANT_IS_6338() \
- (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
- #define BCMCPU_VARIANT_IS_6345() \
+++ /dev/null
-From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:33:28 +0100
-Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
-
----
- arch/mips/bcm63xx/cpu.c | 8 ++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 11 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6362_CPU_ID:
- bcm63xx_regs_base = bcm6362_regs_base;
- bcm63xx_irqs = bcm6362_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM6362_CPU_ID;
-+ else if (varid == 2)
-+ bcm63xx_cpu_variant = BCM6361_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6362 variant: %x\n", varid);
-+
- break;
- case BCM6368_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -18,6 +18,7 @@
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
- #define BCM6358_CPU_ID 0x6358
-+#define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-
-@@ -100,6 +101,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
- #define BCMCPU_VARIANT_IS_6358() \
- (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6361() \
-+ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
- #define BCMCPU_VARIANT_IS_6362() \
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
+++ /dev/null
-From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:36:56 +0100
-Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
-
-The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
-from missing DSL, there is no difference to BCM6368, so treat it such.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/cpu.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
-
- break;
- case BCM6368_CPU_ID:
-+ case BCM6369_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
- bcm63xx_irqs = bcm6368_irqs;
-+
-+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
-+ bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -21,6 +21,7 @@
- #define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-+#define BCM6369_CPU_ID 0x6369
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -107,6 +108,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6369() \
-+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
+++ /dev/null
-From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:05:54 +0100
-Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -42,7 +42,7 @@
- BCM_CB_MEM_SIZE - 1)
-
- #define BCM_PCIE_MEM_BASE_PA 0x10f00000
--#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024)
-+#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
- #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
- BCM_PCIE_MEM_SIZE - 1)
-
+++ /dev/null
-From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:13:06 +0100
-Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
-
-Different SoCs use different memory windows (and sizes), so don't
-hardcode it.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++----
- arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++-----
- 2 files changed, 14 insertions(+), 9 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -41,10 +41,10 @@
- #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
- BCM_CB_MEM_SIZE - 1)
-
--#define BCM_PCIE_MEM_BASE_PA 0x10f00000
--#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
--#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
-- BCM_PCIE_MEM_SIZE - 1)
-+#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
-+#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
-+ BCM_PCIE_MEM_SIZE_6328 - 1)
-
- /*
- * Internal registers are accessed through KSEG3
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
-
- static struct resource bcm_pcie_mem_resource = {
- .name = "bcm63xx PCIe memory space",
-- .start = BCM_PCIE_MEM_BASE_PA,
-- .end = BCM_PCIE_MEM_END_PA,
-+ .start = 0,
-+ .end = 0,
- .flags = IORESOURCE_MEM,
- };
-
-@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
- bcm_pcie_writel(val, PCIE_CONFIG2_REG);
-
- /* set bar0 to little endian */
-- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
-- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
-+ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-+ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
- val |= BASEMASK_REMAP_EN;
- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
-
-- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
-+ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
-
- register_pci_controller(&bcm63xx_pcie_controller);
-@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
- if (!bcm63xx_pci_enabled)
- return -ENODEV;
-
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+ }
-+
- switch (bcm63xx_get_cpu_id()) {
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
+++ /dev/null
-From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:54:51 +0100
-Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
-
----
- arch/mips/bcm63xx/cpu.c | 2 +-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
- 2 files changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
- const int *bcm63xx_irqs;
- EXPORT_SYMBOL(bcm63xx_irqs);
-
--u16 bcm63xx_cpu_id __read_mostly;
-+u32 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
- static u32 bcm63xx_cpu_variant __read_mostly;
-@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
-
- static unsigned int detect_cpu_clock(void)
- {
-- u16 cpu_id = bcm63xx_get_cpu_id();
-+ u32 cpu_id = bcm63xx_get_cpu_id();
-
- switch (cpu_id) {
- case BCM3368_CPU_ID:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -28,7 +28,7 @@ u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
--static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
-+static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
- {
- switch (cpu_id) {
- #ifdef CONFIG_BCM63XX_CPU_3368
-@@ -70,11 +70,11 @@ static inline u16 __pure __bcm63xx_get_c
- return cpu_id;
- }
-
--extern u16 bcm63xx_cpu_id;
-+extern u32 bcm63xx_cpu_id;
-
--static inline u16 __pure bcm63xx_get_cpu_id(void)
-+static inline u32 __pure bcm63xx_get_cpu_id(void)
- {
-- const u16 cpu_id = bcm63xx_cpu_id;
-+ const u32 cpu_id = bcm63xx_cpu_id;
-
- return __bcm63xx_get_cpu_id(cpu_id);
- }
+++ /dev/null
-From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 15 Dec 2013 20:46:26 +0100
-Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
-
-Newer SoCs have 128 bit wide irq registers, thus 128 available internal
-interupts.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
- arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-@@ -2,10 +2,12 @@
- #ifndef BCM63XX_IRQ_H_
- #define BCM63XX_IRQ_H_
-
-+#include <irq.h>
- #include <bcm63xx_cpu.h>
-
- #define IRQ_INTERNAL_BASE 8
--#define IRQ_EXTERNAL_BASE 100
-+#define NR_INTERNAL_IRQS 128
-+#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
- #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
- #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
- #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
---- a/arch/mips/include/asm/mach-bcm63xx/irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
-@@ -2,7 +2,7 @@
- #ifndef __ASM_MACH_BCM63XX_IRQ_H
- #define __ASM_MACH_BCM63XX_IRQ_H
-
--#define NR_IRQS 128
-+#define NR_IRQS 256
- #define MIPS_CPU_IRQ_BASE 0
-
- #endif
+++ /dev/null
-From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 17:14:17 +0100
-Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 5 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/clk.c | 25 ++++-
- arch/mips/bcm63xx/cpu.c | 59 +++++++++-
- arch/mips/bcm63xx/dev-flash.c | 6 +
- arch/mips/bcm63xx/dev-spi.c | 4 +-
- arch/mips/bcm63xx/irq.c | 20 +++-
- arch/mips/bcm63xx/reset.c | 21 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 130 ++++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 +
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 79 +++++++++++++
- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
- 12 files changed, 342 insertions(+), 12 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -61,6 +61,11 @@ config BCM63XX_CPU_6368
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+
-+config BCM63XX_CPU_63268
-+ bool "support 63268 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
-+ select HW_HAS_PCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -697,7 +697,7 @@ void __init board_prom_init(void)
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
- */
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
- val = 0x18000000;
- } else {
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -169,6 +169,8 @@ static void enetsw_set(struct clk *clk,
- clk_disable_unlocked(&clk_swpkt_sar);
- }
- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
-+ } else if (BCMCPU_IS_63268()) {
-+ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
- } else {
- return;
- }
-@@ -214,6 +216,8 @@ static void usbh_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
- else
- return;
-
-@@ -236,6 +240,8 @@ static void usbd_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
- else
- return;
-
-@@ -262,9 +268,13 @@ static void spi_set(struct clk *clk, int
- mask = CKCTL_6358_SPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_SPI_EN;
-- else
-- /* BCMCPU_IS_6368 */
-+ else if (BCMCPU_IS_6368())
- mask = CKCTL_6368_SPI_EN;
-+ else if (BCMCPU_IS_63268())
-+ mask = CKCTL_63268_SPI_EN;
-+ else
-+ return;
-+
- bcm_hwclock_set(mask, enable);
- }
-
-@@ -283,6 +293,8 @@ static void hsspi_set(struct clk *clk, i
- mask = CKCTL_6328_HSSPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_HSSPI_EN;
-+ else if (BCMCPU_IS_63268())
-+ mask = CKCTL_63268_HSSPI_EN;
- else
- return;
-
-@@ -352,6 +364,8 @@ static void pcie_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
- else if (BCMCPU_IS_6362())
- bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
- }
-
- static struct clk clk_pcie = {
-@@ -536,6 +550,21 @@ static struct clk_lookup bcm6368_clks[]
- CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
- };
-
-+static struct clk_lookup bcm63268_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-
-@@ -568,6 +597,10 @@ static int __init bcm63xx_clk_init(void)
- case BCM6368_CPU_ID:
- clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
- break;
-+ case BCM63268_CPU_ID:
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
-+ clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks));
-+ break;
- }
-
- return 0;
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
-
- };
-
-+static const unsigned long bcm63268_regs_base[] = {
-+ __GEN_CPU_REGS_TABLE(63268)
-+};
-+
-+static const int bcm63268_irqs[] = {
-+ __GEN_CPU_IRQ_TABLE(63268)
-+
-+};
-+
- u32 bcm63xx_get_cpu_variant(void)
- {
- return bcm63xx_cpu_variant;
-@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
-
- return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
- }
-+ case BCM63268_CPU_ID:
-+ {
-+ unsigned int tmp, mips_pll_fcvo;
-+
-+ tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
-+ STRAPBUS_63268_FCVO_SHIFT;
-+ switch (mips_pll_fcvo) {
-+ case 0x3:
-+ case 0xe:
-+ return 320000000;
-+ case 0xa:
-+ return 333000000;
-+ case 0x2:
-+ case 0xb:
-+ case 0xf:
-+ return 400000000;
-+ default:
-+ return 0;
-+ }
-+ }
-
- default:
- panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
-@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
- unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
- u32 val;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
- return bcm_ddr_readl(DDR_CSEND_REG) << 24;
-
- if (BCMCPU_IS_6345()) {
-@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void)
- unsigned int tmp;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ bool long_chipid = false;
- u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
-@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void)
- case 0x10:
- chipid_reg = BCM_6345_PERF_BASE;
- break;
-+ case 0x80:
-+ long_chipid = true;
-+ /* fall-through */
- default:
- chipid_reg = BCM_6368_PERF_BASE;
- break;
-@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void)
- break;
- }
-
-+
- /*
- * really early to panic, but delaying panic would not help since we
- * will never get any working console
-@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void)
-
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
-- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-- bcm63xx_cpu_variant = bcm63xx_cpu_id;
-+
-+ if (long_chipid) {
-+ bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
-+ bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
-+ } else {
-+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+ }
-+
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-- varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
- /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
- bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
-+ case BCM63168_CPU_ID:
-+ case BCM63169_CPU_ID:
-+ case BCM63268_CPU_ID:
-+ case BCM63269_CPU_ID:
-+ bcm63xx_regs_base = bcm63268_regs_base;
-+ bcm63xx_irqs = bcm63268_irqs;
-+
-+ bcm63xx_cpu_id = BCM63268_CPU_ID;
-+ break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
- break;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
- case STRAPBUS_6368_BOOT_SEL_PARALLEL:
- return BCM63XX_FLASH_TYPE_PARALLEL;
- }
-+ case BCM63268_CPU_ID:
-+ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
-+ return BCM63XX_FLASH_TYPE_SERIAL;
-+ else
-+ return BCM63XX_FLASH_TYPE_NAND;
- default:
- return -EINVAL;
- }
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -51,7 +51,7 @@ int __init bcm63xx_spi_register(void)
- }
-
- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
-- BCMCPU_IS_6368()) {
-+ BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
- bcm63xx_spi_device.name = "bcm6358-spi",
- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
- }
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -149,6 +149,20 @@ void __init arch_init_irq(void)
- ext_irqs[5] = BCM_6368_EXT_IRQ5;
- ext_shift = 4;
- break;
-+ case BCM63268_CPU_ID:
-+ periph_bases[0] += PERF_IRQMASK_63268_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_63268_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 4;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_63268_EXT_IRQ0;
-+ ext_irqs[1] = BCM_63268_EXT_IRQ1;
-+ ext_irqs[2] = BCM_63268_EXT_IRQ2;
-+ ext_irqs[3] = BCM_63268_EXT_IRQ3;
-+ ext_shift = 4;
-+ break;
- default:
- BUG();
- }
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -126,6 +126,20 @@
- #define BCM6368_RESET_PCIE 0
- #define BCM6368_RESET_PCIE_EXT 0
-
-+#define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
-+#define BCM63268_RESET_ENET 0
-+#define BCM63268_RESET_USBH SOFTRESET_63268_USBH_MASK
-+#define BCM63268_RESET_USBD SOFTRESET_63268_USBS_MASK
-+#define BCM63268_RESET_DSL 0
-+#define BCM63268_RESET_SAR SOFTRESET_63268_SAR_MASK
-+#define BCM63268_RESET_EPHY 0
-+#define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
-+#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
-+#define BCM63268_RESET_MPI 0
-+#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-+ SOFTRESET_63268_PCIE_CORE_MASK)
-+#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-+
- /*
- * core reset bits
- */
-@@ -157,6 +171,10 @@ static const u32 bcm6368_reset_bits[] =
- __GEN_RESET_BITS_TABLE(6368)
- };
-
-+static const u32 bcm63268_reset_bits[] = {
-+ __GEN_RESET_BITS_TABLE(63268)
-+};
-+
- const u32 *bcm63xx_reset_bits;
- static int reset_reg;
-
-@@ -183,6 +201,9 @@ static int __init bcm63xx_reset_bits_ini
- } else if (BCMCPU_IS_6368()) {
- reset_reg = PERF_SOFTRESET_6368_REG;
- bcm63xx_reset_bits = bcm6368_reset_bits;
-+ } else if (BCMCPU_IS_63268()) {
-+ reset_reg = PERF_SOFTRESET_63268_REG;
-+ bcm63xx_reset_bits = bcm63268_reset_bits;
- }
-
- return 0;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -22,6 +22,10 @@
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
- #define BCM6369_CPU_ID 0x6369
-+#define BCM63168_CPU_ID 0x63168
-+#define BCM63169_CPU_ID 0x63169
-+#define BCM63268_CPU_ID 0x63268
-+#define BCM63269_CPU_ID 0x63269
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -62,6 +66,10 @@ static inline u32 __pure __bcm63xx_get_c
- #ifdef CONFIG_BCM63XX_CPU_6368
- case BCM6368_CPU_ID:
- #endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+ case BCM63268_CPU_ID:
-+#endif
- break;
- default:
- unreachable();
-@@ -87,6 +95,7 @@ static inline u32 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-+#define BCMCPU_IS_63268() (bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-@@ -110,6 +119,14 @@ static inline u32 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
- #define BCMCPU_VARIANT_IS_6369() \
- (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63168() \
-+ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63169() \
-+ (bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63268() \
-+ (bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63269() \
-+ (bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
-@@ -574,6 +591,52 @@ enum bcm63xx_regs_set {
- #define BCM_6368_RNG_BASE (0xb0004180)
- #define BCM_6368_MISC_BASE (0xdeadbeef)
-
-+/*
-+ * 63268 register sets base address
-+ */
-+#define BCM_63268_DSL_LMEM_BASE (0xdeadbeef)
-+#define BCM_63268_PERF_BASE (0xb0000000)
-+#define BCM_63268_TIMER_BASE (0xb0000080)
-+#define BCM_63268_WDT_BASE (0xb000009c)
-+#define BCM_63268_UART0_BASE (0xb0000180)
-+#define BCM_63268_UART1_BASE (0xb00001a0)
-+#define BCM_63268_GPIO_BASE (0xb00000c0)
-+#define BCM_63268_SPI_BASE (0xb0000800)
-+#define BCM_63268_HSSPI_BASE (0xb0001000)
-+#define BCM_63268_UDC0_BASE (0xdeadbeef)
-+#define BCM_63268_USBDMA_BASE (0xb000c800)
-+#define BCM_63268_OHCI0_BASE (0xb0002600)
-+#define BCM_63268_OHCI_PRIV_BASE (0xdeadbeef)
-+#define BCM_63268_USBH_PRIV_BASE (0xb0002700)
-+#define BCM_63268_USBD_BASE (0xb0002400)
-+#define BCM_63268_MPI_BASE (0xdeadbeef)
-+#define BCM_63268_PCMCIA_BASE (0xdeadbeef)
-+#define BCM_63268_PCIE_BASE (0xb06e0000)
-+#define BCM_63268_SDRAM_REGS_BASE (0xdeadbeef)
-+#define BCM_63268_DSL_BASE (0xdeadbeef)
-+#define BCM_63268_UBUS_BASE (0xdeadbeef)
-+#define BCM_63268_ENET0_BASE (0xdeadbeef)
-+#define BCM_63268_ENET1_BASE (0xdeadbeef)
-+#define BCM_63268_ENETDMA_BASE (0xb000d800)
-+#define BCM_63268_ENETDMAC_BASE (0xb000da00)
-+#define BCM_63268_ENETDMAS_BASE (0xb000dc00)
-+#define BCM_63268_ENETSW_BASE (0xb0700000)
-+#define BCM_63268_EHCI0_BASE (0xb0002500)
-+#define BCM_63268_SDRAM_BASE (0xdeadbeef)
-+#define BCM_63268_MEMC_BASE (0xdeadbeef)
-+#define BCM_63268_DDR_BASE (0xb0003000)
-+#define BCM_63268_M2M_BASE (0xdeadbeef)
-+#define BCM_63268_ATM_BASE (0xdeadbeef)
-+#define BCM_63268_XTM_BASE (0xb0007000)
-+#define BCM_63268_XTMDMA_BASE (0xb000b800)
-+#define BCM_63268_XTMDMAC_BASE (0xdeadbeef)
-+#define BCM_63268_XTMDMAS_BASE (0xdeadbeef)
-+#define BCM_63268_PCM_BASE (0xb000b000)
-+#define BCM_63268_PCMDMA_BASE (0xb000b800)
-+#define BCM_63268_PCMDMAC_BASE (0xdeadbeef)
-+#define BCM_63268_PCMDMAS_BASE (0xdeadbeef)
-+#define BCM_63268_RNG_BASE (0xdeadbeef)
-+#define BCM_63268_MISC_BASE (0xb0001800)
-
- extern const unsigned long *bcm63xx_regs_base;
-
-@@ -1042,6 +1105,73 @@ enum bcm63xx_irq {
- #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
- #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)
-
-+/*
-+ * 63268 irqs
-+ */
-+#define BCM_63268_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
-+#define BCM_63268_VERY_HIGH_IRQ_BASE (BCM_63268_HIGH_IRQ_BASE + 32)
-+
-+#define BCM_63268_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
-+#define BCM_63268_SPI_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 16)
-+#define BCM_63268_UART0_IRQ (IRQ_INTERNAL_BASE + 5)
-+#define BCM_63268_UART1_IRQ (BCM_63268_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_DSL_IRQ (IRQ_INTERNAL_BASE + 23)
-+#define BCM_63268_UDC0_IRQ 0
-+#define BCM_63268_ENET0_IRQ 0
-+#define BCM_63268_ENET1_IRQ 0
-+#define BCM_63268_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_HSSPI_IRQ (IRQ_INTERNAL_BASE + 6)
-+#define BCM_63268_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_63268_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
-+#define BCM_63268_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
-+#define BCM_63268_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_USBD_TXDMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 4)
-+#define BCM_63268_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 20)
-+#define BCM_63268_USBD_TXDMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 5)
-+#define BCM_63268_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 21)
-+#define BCM_63268_USBD_TXDMA2_IRQ (BCM_63268_HIGH_IRQ_BASE + 6)
-+#define BCM_63268_PCMCIA_IRQ 0
-+#define BCM_63268_ENET0_RXDMA_IRQ 0
-+#define BCM_63268_ENET0_TXDMA_IRQ 0
-+#define BCM_63268_ENET1_RXDMA_IRQ 0
-+#define BCM_63268_ENET1_TXDMA_IRQ 0
-+#define BCM_63268_PCI_IRQ (BCM_63268_HIGH_IRQ_BASE + 8)
-+#define BCM_63268_ATM_IRQ 0
-+#define BCM_63268_ENETSW_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 1)
-+#define BCM_63268_ENETSW_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 2)
-+#define BCM_63268_ENETSW_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 3)
-+#define BCM_63268_ENETSW_RXDMA3_IRQ (IRQ_INTERNAL_BASE + 4)
-+#define BCM_63268_ENETSW_TXDMA0_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_ENETSW_TXDMA1_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_ENETSW_TXDMA2_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_ENETSW_TXDMA3_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_XTM_IRQ (BCM_63268_HIGH_IRQ_BASE + 17)
-+#define BCM_63268_XTM_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
-+
-+#define BCM_63268_RING_OSC_IRQ (BCM_63268_HIGH_IRQ_BASE + 20)
-+#define BCM_63268_WLAN_GPIO_IRQ (BCM_63268_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
-+#define BCM_63268_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
-+#define BCM_63268_NAND_IRQ (BCM_63268_HIGH_IRQ_BASE + 18)
-+#define BCM_63268_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_DG_IRQ (IRQ_INTERNAL_BASE + 15)
-+#define BCM_63268_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
-+#define BCM_63268_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
-+#define BCM_63268_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
-+#define BCM_63268_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 22)
-+#define BCM_63268_IPSEC_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 7)
-+#define BCM_63268_FAP0_IRQ (IRQ_INTERNAL_BASE + 24)
-+#define BCM_63268_FAP1_IRQ (IRQ_INTERNAL_BASE + 25)
-+#define BCM_63268_PCM_DMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 10)
-+#define BCM_63268_PCM_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 11)
-+#define BCM_63268_DECT0_IRQ (BCM_63268_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_DECT1_IRQ (BCM_63268_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_EXT_IRQ0 (BCM_63268_HIGH_IRQ_BASE + 12)
-+#define BCM_63268_EXT_IRQ1 (BCM_63268_HIGH_IRQ_BASE + 13)
-+#define BCM_63268_EXT_IRQ2 (BCM_63268_HIGH_IRQ_BASE + 14)
-+#define BCM_63268_EXT_IRQ3 (BCM_63268_HIGH_IRQ_BASE + 15)
-+
- extern const int *bcm63xx_irqs;
-
- #define __GEN_CPU_IRQ_TABLE(__cpu) \
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -23,6 +23,8 @@ static inline unsigned long bcm63xx_gpio
- return 48;
- case BCM6368_CPU_ID:
- return 38;
-+ case BCM63268_CPU_ID:
-+ return 52;
- case BCM6348_CPU_ID:
- default:
- return 37;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -10,6 +10,8 @@
- #define PERF_REV_REG 0x0
- #define REV_CHIPID_SHIFT 16
- #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_LONG_CHIPID_SHIFT 12
-+#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
- #define REV_VARID_SHIFT 12
- #define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT 0
-@@ -212,6 +214,52 @@
- CKCTL_6368_NAND_EN | \
- CKCTL_6368_IPSEC_EN)
-
-+#define CKCTL_63268_DISABLE_GLESS (1 << 0)
-+#define CKCTL_63268_VDSL_QPROC_EN (1 << 1)
-+#define CKCTL_63268_VDSL_AFE_EN (1 << 2)
-+#define CKCTL_63268_VDSL_EN (1 << 3)
-+#define CKCTL_63268_MIPS_EN (1 << 4)
-+#define CKCTL_63268_WLAN_OCP_EN (1 << 5)
-+#define CKCTL_63268_DECT_EN (1 << 6)
-+#define CKCTL_63268_FAP0_EN (1 << 7)
-+#define CKCTL_63268_FAP1_EN (1 << 8)
-+#define CKCTL_63268_SAR_EN (1 << 9)
-+#define CKCTL_63268_ROBOSW_EN (1 << 10)
-+#define CKCTL_63268_PCM_EN (1 << 11)
-+#define CKCTL_63268_USBD_EN (1 << 12)
-+#define CKCTL_63268_USBH_EN (1 << 13)
-+#define CKCTL_63268_IPSEC_EN (1 << 14)
-+#define CKCTL_63268_SPI_EN (1 << 15)
-+#define CKCTL_63268_HSSPI_EN (1 << 16)
-+#define CKCTL_63268_PCIE_EN (1 << 17)
-+#define CKCTL_63268_PHYMIPS_EN (1 << 18)
-+#define CKCTL_63268_GMAC_EN (1 << 19)
-+#define CKCTL_63268_NAND_EN (1 << 20)
-+#define CKCTL_63268_TBUS_EN (1 << 27)
-+#define CKCTL_63268_ROBOSW250_EN (1 << 31)
-+
-+#define CKCTL_63268_ALL_SAFE_EN (CKCTL_63268_VDSL_QPROC_EN | \
-+ CKCTL_63268_VDSL_AFE_EN | \
-+ CKCTL_63268_VDSL_EN | \
-+ CKCTL_63268_WLAN_OCP_EN | \
-+ CKCTL_63268_DECT_EN | \
-+ CKCTL_63268_FAP0_EN | \
-+ CKCTL_63268_FAP1_EN | \
-+ CKCTL_63268_SAR_EN | \
-+ CKCTL_63268_ROBOSW_EN | \
-+ CKCTL_63268_PCM_EN | \
-+ CKCTL_63268_USBD_EN | \
-+ CKCTL_63268_USBH_EN | \
-+ CKCTL_63268_IPSEC_EN | \
-+ CKCTL_63268_SPI_EN | \
-+ CKCTL_63268_HSSPI_EN | \
-+ CKCTL_63268_PCIE_EN | \
-+ CKCTL_63268_PHYMIPS_EN | \
-+ CKCTL_63268_GMAC_EN | \
-+ CKCTL_63268_NAND_EN | \
-+ CKCTL_63268_TBUS_EN | \
-+ CKCTL_63268_ROBOSW250_EN)
-+
- /* System PLL Control register */
- #define PERF_SYS_PLL_CTL_REG 0x8
- #define SYS_PLL_SOFT_RESET 0x1
-@@ -225,6 +273,7 @@
- #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c)
- #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10)
-+#define PERF_IRQMASK_63268_REG(x) (0x20 + (x) * 0x20)
-
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG 0x10
-@@ -235,6 +284,7 @@
- #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c)
- #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10)
-+#define PERF_IRQSTAT_63268_REG(x) (0x30 + (x) * 0x20)
-
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368 0x14
-@@ -245,6 +295,7 @@
- #define PERF_EXTIRQ_CFG_REG_6358 0x14
- #define PERF_EXTIRQ_CFG_REG_6362 0x18
- #define PERF_EXTIRQ_CFG_REG_6368 0x18
-+#define PERF_EXTIRQ_CFG_REG_63268 0x18
-
- #define PERF_EXTIRQ_CFG_REG2_6358 0x1c
- #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
-@@ -275,6 +326,7 @@
- #define PERF_SOFTRESET_6358_REG 0x34
- #define PERF_SOFTRESET_6362_REG 0x10
- #define PERF_SOFTRESET_6368_REG 0x10
-+#define PERF_SOFTRESET_63268_REG 0x10
-
- #define SOFTRESET_3368_SPI_MASK (1 << 0)
- #define SOFTRESET_3368_ENET_MASK (1 << 2)
-@@ -368,6 +420,26 @@
- #define SOFTRESET_6368_USBH_MASK (1 << 12)
- #define SOFTRESET_6368_PCM_MASK (1 << 13)
-
-+#define SOFTRESET_63268_SPI_MASK (1 << 0)
-+#define SOFTRESET_63268_IPSEC_MASK (1 << 1)
-+#define SOFTRESET_63268_EPHY_MASK (1 << 2)
-+#define SOFTRESET_63268_SAR_MASK (1 << 3)
-+#define SOFTRESET_63268_ENETSW_MASK (1 << 4)
-+#define SOFTRESET_63268_USBS_MASK (1 << 5)
-+#define SOFTRESET_63268_USBH_MASK (1 << 6)
-+#define SOFTRESET_63268_PCM_MASK (1 << 7)
-+#define SOFTRESET_63268_PCIE_CORE_MASK (1 << 8)
-+#define SOFTRESET_63268_PCIE_MASK (1 << 9)
-+#define SOFTRESET_63268_PCIE_EXT_MASK (1 << 10)
-+#define SOFTRESET_63268_WLAN_SHIM_MASK (1 << 11)
-+#define SOFTRESET_63268_DDR_PHY_MASK (1 << 12)
-+#define SOFTRESET_63268_FAP0_MASK (1 << 13)
-+#define SOFTRESET_63268_WLAN_UBUS_MASK (1 << 14)
-+#define SOFTRESET_63268_DECT_MASK (1 << 15)
-+#define SOFTRESET_63268_FAP1_MASK (1 << 16)
-+#define SOFTRESET_63268_PCIE_HARD_MASK (1 << 17)
-+#define SOFTRESET_63268_GPHY_MASK (1 << 18)
-+
- /* MIPS PLL control register */
- #define PERF_MIPSPLLCTL_REG 0x34
- #define MIPSPLLCTL_N1_SHIFT 20
-@@ -1367,6 +1439,13 @@
- #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
- #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)
-
-+#define MISC_STRAPBUS_63268_REG 0x14
-+#define STRAPBUS_63268_HSSPI_CLK_FAST (1 << 9)
-+#define STRAPBUS_63268_BOOT_SEL_SERIAL (1 << 11)
-+#define STRAPBUS_63268_BOOT_SEL_NAND (0 << 11)
-+#define STRAPBUS_63268_FCVO_SHIFT 21
-+#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
-+
- #define MISC_STRAPBUS_6328_REG 0x240
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -26,6 +26,7 @@ static inline int is_bcm63xx_internal_re
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM6368_CPU_ID:
-+ case BCM63268_CPU_ID:
- if (offset >= 0xb0000000 && offset < 0xb1000000)
- return 1;
- break;
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
-
- int __init bcm63xx_hsspi_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -176,7 +176,8 @@ static int __init register_shared(void)
- else
- shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-+ BCMCPU_IS_63268())
- chan_count = 32;
- else if (BCMCPU_IS_6345())
- chan_count = 8;
-@@ -284,7 +285,8 @@ bcm63xx_enetsw_register(const struct bcm
- {
- int ret;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
-+ !BCMCPU_IS_63268())
- return -ENODEV;
-
- ret = register_shared();
-@@ -305,6 +307,8 @@ bcm63xx_enetsw_register(const struct bcm
- enetsw_pd.num_ports = ENETSW_PORTS_6328;
- else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
- enetsw_pd.num_ports = ENETSW_PORTS_6368;
-+ else if (BCMCPU_IS_63268())
-+ enetsw_pd.num_ports = ENETSW_PORTS_63268;
-
- enetsw_pd.dma_has_sram = true;
- enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -67,6 +67,7 @@ struct bcm63xx_enet_platform_data {
- #define ENETSW_MAX_PORT 8
- #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
- #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
-+#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
-
- #define ENETSW_RGMII_PORT0 4
-
+++ /dev/null
-From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:22:40 +0100
-Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
-
----
- arch/mips/bcm63xx/reset.c | 3 ++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
- arch/mips/pci/pci-bcm63xx.c | 4 ++++
- 3 files changed, 11 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -137,7 +137,8 @@
- #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
- #define BCM63268_RESET_MPI 0
- #define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-- SOFTRESET_63268_PCIE_CORE_MASK)
-+ SOFTRESET_63268_PCIE_CORE_MASK | \
-+ SOFTRESET_63268_PCIE_HARD_MASK)
- #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-
- /*
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -46,6 +46,11 @@
- #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
- BCM_PCIE_MEM_SIZE_6328 - 1)
-
-+#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000
-+#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \
-+ BCM_PCIE_MEM_SIZE_63268 - 1)
-+
- /*
- * Internal registers are accessed through KSEG3
- */
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
- bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
- bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+ } else if (BCMCPU_IS_63268()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
- }
-
- switch (bcm63xx_get_cpu_id()) {
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
-+ case BCM63268_CPU_ID:
- return bcm63xx_register_pcie();
- case BCM3368_CPU_ID:
- case BCM6348_CPU_ID:
+++ /dev/null
-From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 01:24:09 +0100
-Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
-
----
- arch/mips/bcm63xx/Kconfig | 5 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/clk.c | 8 +-
- arch/mips/bcm63xx/cpu.c | 53 +++++++++++
- arch/mips/bcm63xx/dev-flash.c | 3 +
- arch/mips/bcm63xx/dev-spi.c | 2 +-
- arch/mips/bcm63xx/irq.c | 10 ++
- arch/mips/bcm63xx/prom.c | 2 +-
- arch/mips/bcm63xx/reset.c | 24 +++++
- arch/mips/bcm63xx/setup.c | 5 +-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 107 ++++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 75 ++++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
- 13 files changed, 291 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -19,6 +19,11 @@ config BCM63XX_EHCI
- select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
- select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
-
-+config BCM63XX_CPU_6318
-+ bool "support 6318 CPU"
-+ select SYS_HAS_CPU_BMIPS32_3300
-+ select HW_HAS_PCI
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -697,7 +697,7 @@ void __init board_prom_init(void)
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
- */
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
- val = 0x18000000;
- } else {
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -289,7 +289,9 @@ static void hsspi_set(struct clk *clk, i
- {
- u32 mask;
-
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318())
-+ mask = CKCTL_6318_HSSPI_EN;
-+ else if (BCMCPU_IS_6328())
- mask = CKCTL_6328_HSSPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_HSSPI_EN;
-@@ -444,6 +446,19 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
-
-+static struct clk_lookup bcm6318_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbh),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
- static struct clk_lookup bcm6328_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-@@ -565,6 +580,7 @@ static struct clk_lookup bcm63268_clks[]
- CLKDEV_INIT(NULL, "pcie", &clk_pcie),
- };
-
-+#define HSSPI_PLL_HZ_6318 250000000
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-
-@@ -574,6 +590,10 @@ static int __init bcm63xx_clk_init(void)
- case BCM3368_CPU_ID:
- clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
- break;
-+ case BCM6318_CPU_ID:
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318;
-+ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks));
-+ break;
- case BCM6328_CPU_ID:
- clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
- clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {
- __GEN_CPU_IRQ_TABLE(3368)
- };
-
-+static const unsigned long bcm6318_regs_base[] = {
-+ __GEN_CPU_REGS_TABLE(6318)
-+};
-+
-+static const int bcm6318_irqs[] = {
-+ __GEN_CPU_IRQ_TABLE(6318)
-+};
-+
- static const unsigned long bcm6328_regs_base[] = {
- __GEN_CPU_REGS_TABLE(6328)
- };
-@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
- return bcm63xx_memory_size;
- }
-
-+#define STRAP_OVERRIDE_BUS_REG 0x0
-+#define OVERRIDE_BUS_MIPS_FREQ_SHIFT 23
-+#define OVERRIDE_BUS_MIPS_FREQ_MASK (0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT)
-+
- static unsigned int detect_cpu_clock(void)
- {
- u32 cpu_id = bcm63xx_get_cpu_id();
-@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
- case BCM3368_CPU_ID:
- return 300000000;
-
-+ case BCM6318_CPU_ID:
-+ {
-+ unsigned int tmp, mips_pll_fcvo;
-+
-+ tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG);
-+
-+ pr_info("strap_override_bus = %08x\n", tmp);
-+
-+ mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK)
-+ >> OVERRIDE_BUS_MIPS_FREQ_SHIFT;
-+
-+ switch (mips_pll_fcvo) {
-+ case 0:
-+ return 166000000;
-+ case 1:
-+ return 400000000;
-+ case 2:
-+ return 250000000;
-+ case 3:
-+ return 333000000;
-+ };
-+ }
- case BCM6328_CPU_ID:
- {
- unsigned int tmp, mips_pll_fcvo;
-@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
- unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
- u32 val;
-
-+ if (BCMCPU_IS_6318()) {
-+ val = bcm_sdram_readl(SDRAM_CFG_REG);
-+ val = val & SDRAM_CFG_6318_SPACE_MASK;
-+ val >>= SDRAM_CFG_6318_SPACE_SHIFT;
-+ return 1 << (val + 20);
-+ }
-+
- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
- return bcm_ddr_readl(DDR_CSEND_REG) << 24;
-
-@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void)
-
- switch (current_cpu_type()) {
- case CPU_BMIPS3300:
-+ if ((read_c0_prid() & 0xff) >= 0x33) {
-+ /* BCM6318 */
-+ chipid_reg = BCM_6368_PERF_BASE;
-+ break;
-+ }
-+
- if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
- __cpu_name[cpu] = "Broadcom BCM6338";
- /* fall-through */
-@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
-
- switch (bcm63xx_cpu_id) {
-+ case BCM6318_CPU_ID:
-+ bcm63xx_regs_base = bcm6318_regs_base;
-+ bcm63xx_irqs = bcm6318_irqs;
-+ break;
- case BCM3368_CPU_ID:
- bcm63xx_regs_base = bcm3368_regs_base;
- bcm63xx_irqs = bcm3368_irqs;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t
- u32 val;
-
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
-+ /* only support serial flash */
-+ return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6328_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
- if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -38,7 +38,7 @@ static struct platform_device bcm63xx_sp
-
- int __init bcm63xx_spi_register(void)
- {
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -48,6 +48,19 @@ void __init arch_init_irq(void)
- ext_irqs[3] = BCM_3368_EXT_IRQ3;
- ext_shift = 4;
- break;
-+ case BCM6318_CPU_ID:
-+ periph_bases[0] += PERF_IRQMASK_6318_REG;
-+ periph_irq_count = 1;
-+ periph_width = 4;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[2] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[3] = BCM_6318_EXT_IRQ0;
-+ ext_shift = 4;
-+ break;
- case BCM6328_CPU_ID:
- periph_bases[0] += PERF_IRQMASK_6328_REG(0);
- periph_bases[1] += PERF_IRQMASK_6328_REG(1);
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -68,7 +68,7 @@ void __init prom_init(void)
-
- if (reg & OTP_6328_REG3_TP1_DISABLED)
- bmips_smp_enabled = 0;
-- } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
-+ } else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
- bmips_smp_enabled = 0;
- }
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -44,6 +44,23 @@
- #define BCM3368_RESET_PCIE 0
- #define BCM3368_RESET_PCIE_EXT 0
-
-+
-+#define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
-+#define BCM6318_RESET_ENET 0
-+#define BCM6318_RESET_USBH SOFTRESET_6318_USBH_MASK
-+#define BCM6318_RESET_USBD SOFTRESET_6318_USBS_MASK
-+#define BCM6318_RESET_DSL 0
-+#define BCM6318_RESET_SAR SOFTRESET_6318_SAR_MASK
-+#define BCM6318_RESET_EPHY SOFTRESET_6318_EPHY_MASK
-+#define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
-+#define BCM6318_RESET_PCM 0
-+#define BCM6318_RESET_MPI 0
-+#define BCM6318_RESET_PCIE \
-+ (SOFTRESET_6318_PCIE_MASK | \
-+ SOFTRESET_6318_PCIE_CORE_MASK | \
-+ SOFTRESET_6318_PCIE_HARD_MASK)
-+#define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
-+
- #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
- #define BCM6328_RESET_ENET 0
- #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK
-@@ -148,6 +165,10 @@ static const u32 bcm3368_reset_bits[] =
- __GEN_RESET_BITS_TABLE(3368)
- };
-
-+static const u32 bcm6318_reset_bits[] = {
-+ __GEN_RESET_BITS_TABLE(6318)
-+};
-+
- static const u32 bcm6328_reset_bits[] = {
- __GEN_RESET_BITS_TABLE(6328)
- };
-@@ -184,6 +205,9 @@ static int __init bcm63xx_reset_bits_ini
- if (BCMCPU_IS_3368()) {
- reset_reg = PERF_SOFTRESET_6358_REG;
- bcm63xx_reset_bits = bcm3368_reset_bits;
-+ } else if (BCMCPU_IS_6318()) {
-+ reset_reg = PERF_SOFTRESET_6318_REG;
-+ bcm63xx_reset_bits = bcm6318_reset_bits;
- } else if (BCMCPU_IS_6328()) {
- reset_reg = PERF_SOFTRESET_6328_REG;
- bcm63xx_reset_bits = bcm6328_reset_bits;
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void)
- case BCM3368_CPU_ID:
- perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
- break;
-+ case BCM6318_CPU_ID:
-+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318;
-+ break;
- case BCM6328_CPU_ID:
- perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
- break;
-@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void)
- bcm6348_a1_reboot();
-
- pr_info("triggering watchdog soft-reset...\n");
-- if (BCMCPU_IS_6328()) {
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) {
- bcm_wdt_writel(1, WDT_SOFTRESET_REG);
- } else {
- reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -11,6 +11,7 @@
- * arm mach-types)
- */
- #define BCM3368_CPU_ID 0x3368
-+#define BCM6318_CPU_ID 0x6318
- #define BCM6328_CPU_ID 0x6328
- #define BCM63281_CPU_ID 0x63281
- #define BCM63283_CPU_ID 0x63283
-@@ -39,6 +40,10 @@ static inline u32 __pure __bcm63xx_get_c
- case BCM3368_CPU_ID:
- #endif
-
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ case BCM6318_CPU_ID:
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6328
- case BCM6328_CPU_ID:
- #endif
-@@ -88,6 +93,7 @@ static inline u32 __pure bcm63xx_get_cpu
- }
-
- #define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
-+#define BCMCPU_IS_6318() (bcm63xx_get_cpu_id() == BCM6318_CPU_ID)
- #define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
- #define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
- #define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
-@@ -99,6 +105,8 @@ static inline u32 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6318() \
-+ (bcm63xx_get_cpu_variant() == BCM6318_CPU_ID)
- #define BCMCPU_VARIANT_IS_63281() \
- (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
- #define BCMCPU_VARIANT_IS_63283() \
-@@ -253,6 +261,56 @@ enum bcm63xx_regs_set {
- #define BCM_3368_MISC_BASE (0xdeadbeef)
-
- /*
-+ * 6318 register sets base address
-+ */
-+#define BCM_6318_DSL_LMEM_BASE (0xdeadbeef)
-+#define BCM_6318_PERF_BASE (0xb0000000)
-+#define BCM_6318_TIMER_BASE (0xb0000040)
-+#define BCM_6318_WDT_BASE (0xb0000068)
-+#define BCM_6318_UART0_BASE (0xb0000100)
-+#define BCM_6318_UART1_BASE (0xdeadbeef)
-+#define BCM_6318_GPIO_BASE (0xb0000080)
-+#define BCM_6318_SPI_BASE (0xdeadbeef)
-+#define BCM_6318_HSSPI_BASE (0xb0003000)
-+#define BCM_6318_UDC0_BASE (0xdeadbeef)
-+#define BCM_6318_USBDMA_BASE (0xb0006800)
-+#define BCM_6318_OHCI0_BASE (0xb0005100)
-+#define BCM_6318_OHCI_PRIV_BASE (0xdeadbeef)
-+#define BCM_6318_USBH_PRIV_BASE (0xb0005200)
-+#define BCM_6318_USBD_BASE (0xb0006000)
-+#define BCM_6318_MPI_BASE (0xdeadbeef)
-+#define BCM_6318_PCMCIA_BASE (0xdeadbeef)
-+#define BCM_6318_PCIE_BASE (0xb0010000)
-+#define BCM_6318_SDRAM_REGS_BASE (0xdeadbeef)
-+#define BCM_6318_DSL_BASE (0xdeadbeef)
-+#define BCM_6318_UBUS_BASE (0xdeadbeef)
-+#define BCM_6318_ENET0_BASE (0xdeadbeef)
-+#define BCM_6318_ENET1_BASE (0xdeadbeef)
-+#define BCM_6318_ENETDMA_BASE (0xb0088000)
-+#define BCM_6318_ENETDMAC_BASE (0xb0088200)
-+#define BCM_6318_ENETDMAS_BASE (0xb0088400)
-+#define BCM_6318_ENETSW_BASE (0xb0080000)
-+#define BCM_6318_EHCI0_BASE (0xb0005000)
-+#define BCM_6318_SDRAM_BASE (0xb0004000)
-+#define BCM_6318_MEMC_BASE (0xdeadbeef)
-+#define BCM_6318_DDR_BASE (0xdeadbeef)
-+#define BCM_6318_M2M_BASE (0xdeadbeef)
-+#define BCM_6318_ATM_BASE (0xdeadbeef)
-+#define BCM_6318_XTM_BASE (0xdeadbeef)
-+#define BCM_6318_XTMDMA_BASE (0xb000c000)
-+#define BCM_6318_XTMDMAC_BASE (0xdeadbeef)
-+#define BCM_6318_XTMDMAS_BASE (0xdeadbeef)
-+#define BCM_6318_PCM_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMA_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMAC_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMAS_BASE (0xdeadbeef)
-+#define BCM_6318_RNG_BASE (0xdeadbeef)
-+#define BCM_6318_MISC_BASE (0xb0000280)
-+#define BCM_6318_OTP_BASE (0xdeadbeef)
-+
-+#define BCM_6318_STRAP_BASE (0xb0000900)
-+
-+/*
- * 6328 register sets base address
- */
- #define BCM_6328_DSL_LMEM_BASE (0xdeadbeef)
-@@ -775,6 +833,55 @@ enum bcm63xx_irq {
- #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
- #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
-
-+/*
-+ * 6318 irqs
-+ */
-+#define BCM_6318_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
-+#define BCM_6318_VERY_HIGH_IRQ_BASE (BCM_6318_HIGH_IRQ_BASE + 32)
-+
-+#define BCM_6318_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
-+#define BCM_6318_SPI_IRQ 0
-+#define BCM_6318_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
-+#define BCM_6318_UART1_IRQ 0
-+#define BCM_6318_DSL_IRQ (IRQ_INTERNAL_BASE + 21)
-+#define BCM_6318_UDC0_IRQ 0
-+#define BCM_6318_ENET0_IRQ 0
-+#define BCM_6318_ENET1_IRQ 0
-+#define BCM_6318_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
-+#define BCM_6318_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
-+#define BCM_6318_OHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 9)
-+#define BCM_6318_EHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 10)
-+#define BCM_6318_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
-+#define BCM_6318_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
-+#define BCM_6318_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
-+#define BCM_6318_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
-+#define BCM_6318_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
-+#define BCM_6318_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_6318_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
-+#define BCM_6318_PCMCIA_IRQ 0
-+#define BCM_6318_ENET0_RXDMA_IRQ 0
-+#define BCM_6318_ENET0_TXDMA_IRQ 0
-+#define BCM_6318_ENET1_RXDMA_IRQ 0
-+#define BCM_6318_ENET1_TXDMA_IRQ 0
-+#define BCM_6318_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
-+#define BCM_6318_ATM_IRQ 0
-+#define BCM_6318_ENETSW_RXDMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 0)
-+#define BCM_6318_ENETSW_RXDMA1_IRQ (BCM_6318_HIGH_IRQ_BASE + 1)
-+#define BCM_6318_ENETSW_RXDMA2_IRQ (BCM_6318_HIGH_IRQ_BASE + 2)
-+#define BCM_6318_ENETSW_RXDMA3_IRQ (BCM_6318_HIGH_IRQ_BASE + 3)
-+#define BCM_6318_ENETSW_TXDMA0_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 10)
-+#define BCM_6318_ENETSW_TXDMA1_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 11)
-+#define BCM_6318_ENETSW_TXDMA2_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 12)
-+#define BCM_6318_ENETSW_TXDMA3_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 13)
-+#define BCM_6318_XTM_IRQ (BCM_6318_HIGH_IRQ_BASE + 31)
-+#define BCM_6318_XTM_DMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 11)
-+
-+#define BCM_6318_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
-+#define BCM_6318_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
-+#define BCM_6318_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
-+#define BCM_6318_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
-+#define BCM_6318_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
-+#define BCM_6318_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
-
- /*
- * 6328 irqs
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -53,6 +53,39 @@
- CKCTL_3368_EMUSB_EN | \
- CKCTL_3368_USBU_EN)
-
-+#define CKCTL_6318_ADSL_ASB_EN (1 << 0)
-+#define CKCTL_6318_USB_ASB_EN (1 << 1)
-+#define CKCTL_6318_MIPS_ASB_EN (1 << 2)
-+#define CKCTL_6318_PCIE_ASB_EN (1 << 3)
-+#define CKCTL_6318_PHYMIPS_ASB_EN (1 << 4)
-+#define CKCTL_6318_ROBOSW_ASB_EN (1 << 5)
-+#define CKCTL_6318_SAR_ASB_EN (1 << 6)
-+#define CKCTL_6318_SDR_ASB_EN (1 << 7)
-+#define CKCTL_6318_SWREG_ASB_EN (1 << 8)
-+#define CKCTL_6318_PERIPH_ASB_EN (1 << 9)
-+#define CKCTL_6318_CPUBUS160_EN (1 << 10)
-+#define CKCTL_6318_ADSL_EN (1 << 11)
-+#define CKCTL_6318_SAR125_EN (1 << 12)
-+#define CKCTL_6318_MIPS_EN (1 << 13)
-+#define CKCTL_6318_PCIE_EN (1 << 14)
-+#define CKCTL_6318_ROBOSW250_EN (1 << 16)
-+#define CKCTL_6318_ROBOSW025_EN (1 << 17)
-+#define CKCTL_6318_SDR_EN (1 << 19)
-+#define CKCTL_6318_USB_EN (1 << 20) /* both device and host */
-+#define CKCTL_6318_HSSPI_EN (1 << 25)
-+#define CKCTL_6318_PCIE25_EN (1 << 27)
-+#define CKCTL_6318_PHYMIPS_EN (1 << 28)
-+#define CKCTL_6318_ADSL_AFE_EN (1 << 29)
-+#define CKCTL_6318_ADSL_QPROC_EN (1 << 30)
-+
-+#define CKCTL_6318_ALL_SAFE_EN (CKCTL_6318_PHYMIPS_EN | \
-+ CKCTL_6318_ADSL_QPROC_EN | \
-+ CKCTL_6318_ADSL_AFE_EN | \
-+ CKCTL_6318_ADSL_EN | \
-+ CKCTL_6318_SAR_EN | \
-+ CKCTL_6318_USB_EN | \
-+ CKCTL_6318_PCIE_EN)
-+
- #define CKCTL_6328_PHYMIPS_EN (1 << 0)
- #define CKCTL_6328_ADSL_QPROC_EN (1 << 1)
- #define CKCTL_6328_ADSL_AFE_EN (1 << 2)
-@@ -260,12 +293,27 @@
- CKCTL_63268_TBUS_EN | \
- CKCTL_63268_ROBOSW250_EN)
-
-+/* UBUS Clock Control register */
-+#define PERF_UB_CKCTL_REG 0x10
-+
-+#define UB_CKCTL_6318_ADSL_EN (1 << 0)
-+#define UB_CKCTL_6318_ARB_EN (1 << 1)
-+#define UB_CKCTL_6318_MIPS_EN (1 << 2)
-+#define UB_CKCTL_6318_PCIE_EN (1 << 3)
-+#define UB_CKCTL_6318_PERIPH_EN (1 << 4)
-+#define UB_CKCTL_6318_PHYMIPS_EN (1 << 5)
-+#define UB_CKCTL_6318_ROBOSW_EN (1 << 6)
-+#define UB_CKCTL_6318_SAR_EN (1 << 7)
-+#define UB_CKCTL_6318_SDR_EN (1 << 8)
-+#define UB_CKCTL_6318_USB_EN (1 << 9)
-+
- /* System PLL Control register */
- #define PERF_SYS_PLL_CTL_REG 0x8
- #define SYS_PLL_SOFT_RESET 0x1
-
- /* Interrupt Mask register */
- #define PERF_IRQMASK_3368_REG 0xc
-+#define PERF_IRQMASK_6318_REG 0x20
- #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6338_REG 0xc
- #define PERF_IRQMASK_6345_REG 0xc
-@@ -277,6 +325,7 @@
-
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG 0x10
-+#define PERF_IRQSTAT_6318_REG 0x30
- #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6338_REG 0x10
- #define PERF_IRQSTAT_6345_REG 0x10
-@@ -288,6 +337,7 @@
-
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368 0x14
-+#define PERF_EXTIRQ_CFG_REG_6318 0x18
- #define PERF_EXTIRQ_CFG_REG_6328 0x18
- #define PERF_EXTIRQ_CFG_REG_6338 0x14
- #define PERF_EXTIRQ_CFG_REG_6345 0x14
-@@ -322,6 +372,7 @@
-
- /* Soft Reset register */
- #define PERF_SOFTRESET_REG 0x28
-+#define PERF_SOFTRESET_6318_REG 0x10
- #define PERF_SOFTRESET_6328_REG 0x10
- #define PERF_SOFTRESET_6358_REG 0x34
- #define PERF_SOFTRESET_6362_REG 0x10
-@@ -335,6 +386,18 @@
- #define SOFTRESET_3368_USBS_MASK (1 << 11)
- #define SOFTRESET_3368_PCM_MASK (1 << 13)
-
-+#define SOFTRESET_6318_SPI_MASK (1 << 0)
-+#define SOFTRESET_6318_EPHY_MASK (1 << 1)
-+#define SOFTRESET_6318_SAR_MASK (1 << 2)
-+#define SOFTRESET_6318_ENETSW_MASK (1 << 3)
-+#define SOFTRESET_6318_USBS_MASK (1 << 4)
-+#define SOFTRESET_6318_USBH_MASK (1 << 5)
-+#define SOFTRESET_6318_PCIE_CORE_MASK (1 << 6)
-+#define SOFTRESET_6318_PCIE_MASK (1 << 7)
-+#define SOFTRESET_6318_PCIE_EXT_MASK (1 << 8)
-+#define SOFTRESET_6318_PCIE_HARD_MASK (1 << 9)
-+#define SOFTRESET_6318_ADSL_MASK (1 << 10)
-+
- #define SOFTRESET_6328_SPI_MASK (1 << 0)
- #define SOFTRESET_6328_EPHY_MASK (1 << 1)
- #define SOFTRESET_6328_SAR_MASK (1 << 2)
-@@ -506,8 +569,17 @@
- #define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9)
- #define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10)
-
-+#define TIMER_IRQMASK_6318_REG 0x0
-+#define TIMER_IRQSTAT_6318_REG 0x4
-+#define IRQSTATMASK_TIMER0 (1 << 0)
-+#define IRQSTATMASK_TIMER1 (1 << 1)
-+#define IRQSTATMASK_TIMER2 (1 << 2)
-+#define IRQSTATMASK_TIMER3 (1 << 3)
-+#define IRQSTATMASK_WDT (1 << 4)
-+
- /* Timer control register */
- #define TIMER_CTLx_REG(x) (0x4 + (x * 4))
-+#define TIMER_CTRx_6318_REG(x) (0x8 + (x * 4))
- #define TIMER_CTL0_REG 0x4
- #define TIMER_CTL1_REG 0x8
- #define TIMER_CTL2_REG 0xC
-@@ -1254,6 +1326,8 @@
- #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT)
- #define SDRAM_CFG_BANK_SHIFT 13
- #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
-+#define SDRAM_CFG_6318_SPACE_SHIFT 4
-+#define SDRAM_CFG_6318_SPACE_MASK (0xf << SDRAM_CFG_6318_SPACE_SHIFT)
-
- #define SDRAM_MBASE_REG 0xc
-
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -23,6 +23,7 @@ static inline int is_bcm63xx_internal_re
- if (offset >= 0xfff00000)
- return 1;
- break;
-+ case BCM6318_CPU_ID:
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM6368_CPU_ID:
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs
-
- int __init bcm63xx_hsspi_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-+ !BCMCPU_IS_63268())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
---- a/arch/mips/bcm63xx/dev-usb-usbd.c
-+++ b/arch/mips/bcm63xx/dev-usb-usbd.c
-@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s
- IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
- int i;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368())
- return 0;
-
- usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -176,8 +176,8 @@ static int __init register_shared(void)
- else
- shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-- BCMCPU_IS_63268())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
-+ BCMCPU_IS_6368() || BCMCPU_IS_63268())
- chan_count = 32;
- else if (BCMCPU_IS_6345())
- chan_count = 8;
-@@ -285,8 +285,8 @@ bcm63xx_enetsw_register(const struct bcm
- {
- int ret;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
-- !BCMCPU_IS_63268())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-+ !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return -ENODEV;
-
- ret = register_shared();
-@@ -303,7 +303,7 @@ bcm63xx_enetsw_register(const struct bcm
-
- memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
-
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328())
- enetsw_pd.num_ports = ENETSW_PORTS_6328;
- else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
- enetsw_pd.num_ports = ENETSW_PORTS_6368;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -10,6 +10,8 @@ int __init bcm63xx_gpio_init(void);
- static inline unsigned long bcm63xx_gpio_count(void)
- {
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
-+ return 50;
- case BCM6328_CPU_ID:
- return 32;
- case BCM3368_CPU_ID:
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh
-
- int __init bcm63xx_ehci_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
-+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
- return 0;
-
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+++ /dev/null
-From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 14:17:50 +0100
-Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals
-
----
- arch/mips/bcm63xx/reset.c | 39 ++++++++++++++--------
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++
- arch/mips/pci/pci-bcm63xx.c | 7 ++++
- 3 files changed, 34 insertions(+), 14 deletions(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -29,7 +29,9 @@
- [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \
- [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \
- [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \
-- [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT,
-+ [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \
-+ [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \
-+ [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD,
-
- #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK
- #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK
-@@ -43,6 +45,8 @@
- #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK
- #define BCM3368_RESET_PCIE 0
- #define BCM3368_RESET_PCIE_EXT 0
-+#define BCM3368_RESET_PCIE_CORE 0
-+#define BCM3368_RESET_PCIE_HARD 0
-
-
- #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
-@@ -55,11 +59,10 @@
- #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
- #define BCM6318_RESET_PCM 0
- #define BCM6318_RESET_MPI 0
--#define BCM6318_RESET_PCIE \
-- (SOFTRESET_6318_PCIE_MASK | \
-- SOFTRESET_6318_PCIE_CORE_MASK | \
-- SOFTRESET_6318_PCIE_HARD_MASK)
-+#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK
- #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
-+#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK
-+#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK
-
- #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
- #define BCM6328_RESET_ENET 0
-@@ -71,11 +74,10 @@
- #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK
- #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK
- #define BCM6328_RESET_MPI 0
--#define BCM6328_RESET_PCIE \
-- (SOFTRESET_6328_PCIE_MASK | \
-- SOFTRESET_6328_PCIE_CORE_MASK | \
-- SOFTRESET_6328_PCIE_HARD_MASK)
-+#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK
- #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK
-+#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK
-+#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK
-
- #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK
- #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK
-@@ -89,6 +91,8 @@
- #define BCM6338_RESET_MPI 0
- #define BCM6338_RESET_PCIE 0
- #define BCM6338_RESET_PCIE_EXT 0
-+#define BCM6338_RESET_PCIE_CORE 0
-+#define BCM6338_RESET_PCIE_HARD 0
-
- #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK
- #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK
-@@ -102,6 +106,8 @@
- #define BCM6348_RESET_MPI 0
- #define BCM6348_RESET_PCIE 0
- #define BCM6348_RESET_PCIE_EXT 0
-+#define BCM6348_RESET_PCIE_CORE 0
-+#define BCM6348_RESET_PCIE_HARD 0
-
- #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK
- #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK
-@@ -115,6 +121,8 @@
- #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK
- #define BCM6358_RESET_PCIE 0
- #define BCM6358_RESET_PCIE_EXT 0
-+#define BCM6358_RESET_PCIE_CORE 0
-+#define BCM6358_RESET_PCIE_HARD 0
-
- #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK
- #define BCM6362_RESET_ENET 0
-@@ -126,9 +134,10 @@
- #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK
- #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK
- #define BCM6362_RESET_MPI 0
--#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \
-- SOFTRESET_6362_PCIE_CORE_MASK)
-+#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK
- #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK
-+#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK
-+#define BCM6362_RESET_PCIE_HARD 0
-
- #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK
- #define BCM6368_RESET_ENET 0
-@@ -142,6 +151,8 @@
- #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK
- #define BCM6368_RESET_PCIE 0
- #define BCM6368_RESET_PCIE_EXT 0
-+#define BCM6368_RESET_PCIE_CORE 0
-+#define BCM6368_RESET_PCIE_HARD 0
-
- #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
- #define BCM63268_RESET_ENET 0
-@@ -153,10 +164,10 @@
- #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
- #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
- #define BCM63268_RESET_MPI 0
--#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-- SOFTRESET_63268_PCIE_CORE_MASK | \
-- SOFTRESET_63268_PCIE_HARD_MASK)
-+#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK
- #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-+#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK
-+#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK
-
- /*
- * core reset bits
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
-@@ -15,6 +15,8 @@ enum bcm63xx_core_reset {
- BCM63XX_RESET_MPI,
- BCM63XX_RESET_PCIE,
- BCM63XX_RESET_PCIE_EXT,
-+ BCM63XX_RESET_PCIE_CORE,
-+ BCM63XX_RESET_PCIE_HARD,
- };
-
- void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo
-
- /* reset the PCIe core */
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) {
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
-+ }
- mdelay(10);
-
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
- mdelay(10);
-
+++ /dev/null
-From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 15 Dec 2013 20:47:34 +0100
-Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
-
----
- arch/mips/bcm63xx/clk.c | 25 ++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 6 ++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 60 +++++++++++-
- arch/mips/pci/ops-bcm63xx.c | 16 +++-
- arch/mips/pci/pci-bcm63xx.c | 106 ++++++++++++++++++----
- 5 files changed, 184 insertions(+), 29 deletions(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -52,6 +52,18 @@ static void bcm_hwclock_set(u32 mask, in
- bcm_perf_writel(reg, PERF_CKCTL_REG);
- }
-
-+static void bcm_ub_hwclock_set(u32 mask, int enable)
-+{
-+ u32 reg;
-+
-+ reg = bcm_perf_readl(PERF_UB_CKCTL_REG);
-+ if (enable)
-+ reg |= mask;
-+ else
-+ reg &= ~mask;
-+ bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
-+}
-+
- /*
- * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
- */
-@@ -362,12 +374,17 @@ static struct clk clk_ipsec = {
-
- static void pcie_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable);
-+ bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
-- else if (BCMCPU_IS_63268())
-+ } else if (BCMCPU_IS_63268()) {
- bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
-+ }
- }
-
- static struct clk clk_pcie = {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -41,6 +41,12 @@
- #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
- BCM_CB_MEM_SIZE - 1)
-
-+#define BCM_PCIE_MEM_BASE_PA_6318 0x10200000
-+#define BCM_PCIE_MEM_SIZE_6318 (1 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_6318 (BCM_PCIE_MEM_BASE_PA_6318 + \
-+ BCM_PCIE_MEM_SIZE_6318 - 1)
-+
-+
- #define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
- #define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
- #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1530,6 +1530,17 @@
- * _REG relative to RSET_PCIE
- *************************************************************************/
-
-+#define PCIE_SPECIFIC_REG 0x188
-+#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT 0
-+#define SPECIFIC_ENDIAN_MODE_BAR1_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT 2
-+#define SPECIFIC_ENDIAN_MODE_BAR2_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT 4
-+#define SPECIFIC_ENDIAN_MODE_BAR3_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN 0
-+#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1
-+#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN 2
-+
- #define PCIE_CONFIG2_REG 0x408
- #define CONFIG2_BAR1_SIZE_EN 1
- #define CONFIG2_BAR1_SIZE_MASK 0xf
-@@ -1575,7 +1586,54 @@
- #define PCIE_RC_INT_C (1 << 2)
- #define PCIE_RC_INT_D (1 << 3)
-
--#define PCIE_DEVICE_OFFSET 0x8000
-+#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG 0x400c
-+#define C2P_MEM_WIN_ENDIAN_MODE_MASK 0x3
-+#define C2P_MEM_WIN_ENDIAN_NO_SWAP 0
-+#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1
-+#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2
-+#define C2P_MEM_WIN_BASE_ADDR_SHIFT 20
-+#define C2P_MEM_WIN_BASE_ADDR_MASK (0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT)
-+
-+#define PCIE_RC_BAR1_CONFIG_LO_REG 0x402c
-+#define RC_BAR_CFG_LO_SIZE_256MB 0xd
-+#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT 20
-+#define RC_BAR_CFG_LO_MATCH_ADDR_MASK (0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT)
-+
-+#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070
-+#define C2P_BASELIMIT_LIMIT_SHIFT 20
-+#define C2P_BASELIMIT_LIMIT_MASK (0xfff << C2P_BASELIMIT_LIMIT_SHIFT)
-+#define C2P_BASELIMIT_BASE_SHIFT 4
-+#define C2P_BASELIMIT_BASE_MASK (0xfff << C2P_BASELIMIT_BASE_SHIFT)
-+
-+#define PCIE_UBUS_BAR1_CFG_REMAP_REG 0x4088
-+#define BAR1_CFG_REMAP_OFFSET_SHIFT 20
-+#define BAR1_CFG_REMAP_OFFSET_MASK (0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT)
-+#define BAR1_CFG_REMAP_ACCESS_EN 1
-+
-+#define PCIE_HARD_DEBUG_REG 0x4204
-+#define HARD_DEBUG_SERDES_IDDQ (1 << 23)
-+
-+#define PCIE_CPU_INT1_MASK_CLEAR_REG 0x830c
-+#define CPU_INT_PCIE_ERR_ATTN_CPU (1 << 0)
-+#define CPU_INT_PCIE_INTA (1 << 1)
-+#define CPU_INT_PCIE_INTB (1 << 2)
-+#define CPU_INT_PCIE_INTC (1 << 3)
-+#define CPU_INT_PCIE_INTD (1 << 4)
-+#define CPU_INT_PCIE_INTR (1 << 5)
-+#define CPU_INT_PCIE_NMI (1 << 6)
-+#define CPU_INT_PCIE_UBUS (1 << 7)
-+#define CPU_INT_IPI (1 << 8)
-+
-+#define PCIE_EXT_CFG_INDEX_REG 0x8400
-+#define EXT_CFG_FUNC_NUM_SHIFT 12
-+#define EXT_CFG_FUNC_NUM_MASK (0x7 << EXT_CFG_FUNC_NUM_SHIFT)
-+#define EXT_CFG_DEV_NUM_SHIFT 15
-+#define EXT_CFG_DEV_NUM_MASK (0xf << EXT_CFG_DEV_NUM_SHIFT)
-+#define EXT_CFG_BUS_NUM_SHIFT 20
-+#define EXT_CFG_BUS_NUM_MASK (0xff << EXT_CFG_BUS_NUM_SHIFT)
-+
-+#define PCIE_DEVICE_OFFSET_6318 0x9000
-+#define PCIE_DEVICE_OFFSET_6328 0x8000
-
- /*************************************************************************
- * _REG relative to RSET_OTP
---- a/arch/mips/pci/ops-bcm63xx.c
-+++ b/arch/mips/pci/ops-bcm63xx.c
-@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
- if (!bcm63xx_pcie_can_access(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
-- if (bus->number == PCIE_BUS_DEVICE)
-- reg += PCIE_DEVICE_OFFSET;
-+ if (bus->number == PCIE_BUS_DEVICE) {
-+ if (BCMCPU_IS_6318())
-+ reg += PCIE_DEVICE_OFFSET_6318;
-+ else
-+ reg += PCIE_DEVICE_OFFSET_6328;
-+ }
-
- data = bcm_pcie_readl(reg);
-
-@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
- if (!bcm63xx_pcie_can_access(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
-- if (bus->number == PCIE_BUS_DEVICE)
-- reg += PCIE_DEVICE_OFFSET;
-+ if (bus->number == PCIE_BUS_DEVICE) {
-+ if (BCMCPU_IS_6318())
-+ reg += PCIE_DEVICE_OFFSET_6318;
-+ else
-+ reg += PCIE_DEVICE_OFFSET_6328;
-+ }
-
-
- data = bcm_pcie_readl(reg);
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v
-
- void __iomem *pci_iospace_start;
-
--static void __init bcm63xx_reset_pcie(void)
-+static void __init bcm63xx_reset_pcie_gen1(void)
- {
- u32 val;
- u32 reg;
-@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo
- mdelay(200);
- }
-
--static struct clk *pcie_clk;
--
--static int __init bcm63xx_register_pcie(void)
-+static void __init bcm63xx_reset_pcie_gen2(void)
- {
- u32 val;
-
-- /* enable clock */
-- pcie_clk = clk_get(NULL, "pcie");
-- if (IS_ERR_OR_NULL(pcie_clk))
-- return -ENODEV;
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
-
-- clk_prepare_enable(pcie_clk);
-+ /* reset the PCIe core */
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
-+ mdelay(10);
-+ val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG);
-+ val &= ~HARD_DEBUG_SERDES_IDDQ;
-+ bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
-+ mdelay(200);
-+}
-
-- bcm63xx_reset_pcie();
-+static void __init bcm63xx_init_pcie_gen1(void)
-+{
-+ u32 val;
-
- /* configure the PCIe bridge */
- val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);
-@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie(
- val |= OPT2_CFG_TYPE1_BD_SEL;
- bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);
-
-+ /* set bar0 to little endian */
-+ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-+ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
-+ val |= BASEMASK_REMAP_EN;
-+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
-+
-+ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
-+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
-+}
-+
-+static void __init bcm63xx_init_pcie_gen2(void)
-+{
-+ u32 val;
-+
-+ bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB |
-+ CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD,
-+ PCIE_CPU_INT1_MASK_CLEAR_REG);
-+
-+ val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK;
-+ val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) <<
-+ C2P_BASELIMIT_BASE_SHIFT;
-+
-+ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG);
-+
-+ /* set bar0 to little endian */
-+ val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
-+ val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK;
-+ val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP;
-+ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
-+
-+ bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG);
-+ bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG);
-+ bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG);
-+
-+ bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT,
-+ PCIE_EXT_CFG_INDEX_REG);
-+}
-+
-+static struct clk *pcie_clk;
-+
-+static int __init bcm63xx_register_pcie(void)
-+{
-+ u32 val;
-+
-+ /* enable clock */
-+ pcie_clk = clk_get(NULL, "pcie");
-+ if (IS_ERR_OR_NULL(pcie_clk))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(pcie_clk);
-+
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
-+ bcm63xx_reset_pcie_gen1();
-+ bcm63xx_init_pcie_gen1();
-+ } else {
-+ bcm63xx_reset_pcie_gen2();
-+ bcm63xx_init_pcie_gen2();
-+ }
-+
- /* setup class code as bridge */
- val = bcm_pcie_readl(PCIE_IDVAL3_REG);
- val &= ~IDVAL3_CLASS_CODE_MASK;
-@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie(
- val &= ~CONFIG2_BAR1_SIZE_MASK;
- bcm_pcie_writel(val, PCIE_CONFIG2_REG);
-
-- /* set bar0 to little endian */
-- val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-- val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
-- val |= BASEMASK_REMAP_EN;
-- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
--
-- val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
-- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
--
- register_pci_controller(&bcm63xx_pcie_controller);
-
- return 0;
-@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void)
- if (!bcm63xx_pci_enabled)
- return -ENODEV;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ if (BCMCPU_IS_6318()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318;
-+ } if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
- bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
- bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
- } else if (BCMCPU_IS_63268()) {
-@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void)
- }
-
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM63268_CPU_ID:
+++ /dev/null
-From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Dec 2013 12:26:57 +0100
-Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
- result
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 10 +++++++---
- arch/mips/bcm63xx/prom.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 3 files changed, 13 insertions(+), 3 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -22,6 +22,8 @@
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-
-+static int flash_type;
-+
- static struct mtd_partition mtd_partitions[] = {
- {
- .name = "cfe",
-@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
- }
- }
-
-+void __init bcm63xx_flash_detect(void)
-+{
-+ flash_type = bcm63xx_detect_flash_type();
-+}
-+
- int __init bcm63xx_flash_register(void)
- {
-- int flash_type;
- u32 val;
-
-- flash_type = bcm63xx_detect_flash_type();
--
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
- /* read base address of boot chip select (0) */
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -17,6 +17,7 @@
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-+#include <bcm63xx_dev_flash.h>
-
- void __init prom_init(void)
- {
-@@ -52,6 +53,9 @@ void __init prom_init(void)
- reg &= ~mask;
- bcm_perf_writel(reg, PERF_CKCTL_REG);
-
-+ /* detect and setup flash access */
-+ bcm63xx_flash_detect();
-+
- /* do low level board init */
- board_prom_init();
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -8,6 +8,8 @@ enum {
- BCM63XX_FLASH_TYPE_NAND,
- };
-
-+void bcm63xx_flash_detect(void);
-+
- int __init bcm63xx_flash_register(void);
-
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Dec 2013 13:25:25 +0100
-Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
-
-Some bootloaders leave the flash access in an invalid state with dual
-read enabled; fix it by disabling it and falling back to simple fast
-reads.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 51 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -16,6 +16,7 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/physmap.h>
-+#include <linux/mtd/spi-nor.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
-@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
- }
- }
-
-+#define HSSPI_FLASH_CTRL_REG 0x14
-+#define FLASH_CTRL_READ_OPCODE_MASK 0xff
-+#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8)
-+#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10
-+#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
-+#define FLASH_CTRL_MB_EN (1 << 23)
-+
- void __init bcm63xx_flash_detect(void)
- {
- flash_type = bcm63xx_detect_flash_type();
-+
-+ /* ensure flash mapping has sane values */
-+ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
-+ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
-+ BCMCPU_IS_63268())) {
-+ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
-+
-+ if (val & FLASH_CTRL_MB_EN) {
-+ /* cfe might configure non working dual-io mode */
-+ val &= ~FLASH_CTRL_MB_EN;
-+ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
-+ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
-+ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
-+
-+ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
-+ case FLASH_CTRL_ADDR_BYTES_3:
-+ val |= SPINOR_OP_READ_FAST;
-+ break;
-+ case FLASH_CTRL_ADDR_BYTES_4:
-+ val |= SPINOR_OP_READ_FAST_4B;
-+ break;
-+ case FLASH_CTRL_ADDR_BYTES_2:
-+ default:
-+ pr_warn("unsupported address byte mode (%x), not fixing up\n",
-+ val & FLASH_CTRL_ADDR_BYTES_MASK);
-+ return;
-+ }
-+ } else {
-+ /* ensure dummy bytes is set to 1 for _FAST reads */
-+ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
-+
-+ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ_FAST_4B)
-+ return;
-+
-+ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
-+ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
-+ }
-+
-+ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
-+ }
- }
-
- int __init bcm63xx_flash_register(void)
+++ /dev/null
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -168,7 +168,11 @@ static struct clk clk_swpkt_usb = {
- */
- static void enetsw_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328()) {
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
-+ CKCTL_6318_ROBOSW025_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
- } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
-@@ -220,18 +224,22 @@ static struct clk clk_pcm = {
- */
- static void usbh_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_USB_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
-- else if (BCMCPU_IS_6348())
-+ } else if (BCMCPU_IS_6348()) {
- bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
-- else if (BCMCPU_IS_6368())
-+ } else if (BCMCPU_IS_6368()) {
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-- else if (BCMCPU_IS_63268())
-+ } else if (BCMCPU_IS_63268()) {
- bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
-- else
-+ } else {
- return;
-+ }
-
- if (enable)
- msleep(100);
+++ /dev/null
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -682,6 +682,12 @@
- #define GPIO_MODE_6368_SPI_SSN4 (1 << 30)
- #define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
-
-+#define GPIO_PINMUX_SEL0_6318 0x1c
-+#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26
-+#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-
- #define GPIO_PINMUX_OTHR_REG 0x24
- #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
-@@ -1000,6 +1006,7 @@
-
- #define USBH_PRIV_SWAP_6358_REG 0x0
- #define USBH_PRIV_SWAP_6368_REG 0x1c
-+#define USBH_PRIV_SWAP_6318_REG 0x0c
-
- #define USBH_PRIV_SWAP_USBD_SHIFT 6
- #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
-@@ -1025,6 +1032,13 @@
- #define USBH_PRIV_SETUP_IOC_SHIFT 4
- #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
-
-+#define USBH_PRIV_SETUP_6318_REG 0x00
-+#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
-+#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
-+#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
-+#define USBH_PRIV_SIM_CTRL_6318_REG 0x20
-+#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
-+
-
- /*************************************************************************
- * _REG relative to RSET_USBD
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -125,6 +125,15 @@ void __init board_early_setup(const stru
- }
-
- bcm_gpio_writel(val, GPIO_MODE_REG);
-+
-+#if IS_ENABLED(CONFIG_USB)
-+ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
-+ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
-+ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
-+ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
-+ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
-+ }
-+#endif
- }
-
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -23,6 +23,8 @@ config BCM63XX_CPU_6318
- bool "support 6318 CPU"
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -587,6 +587,9 @@
- #define TIMER_CTL_MONOTONIC_MASK (1 << 30)
- #define TIMER_CTL_ENABLE_MASK (1 << 31)
-
-+/* Clock reset control (63268 only) */
-+#define TIMER_CLK_RST_CTL_REG 0x2c
-+#define CLK_RST_CTL_USB_REF_CLK_EN (1 << 18)
-
- /*************************************************************************
- * _REG relative to RSET_WDT
-@@ -1534,6 +1537,11 @@
- #define STRAPBUS_63268_FCVO_SHIFT 21
- #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
-
-+#define MISC_IDDQ_CTRL_6328_REG 0x48
-+#define MISC_IDDQ_CTRL_63268_REG 0x4c
-+
-+#define IDDQ_CTRL_63268_USBH (1 << 4)
-+
- #define MISC_STRAPBUS_6328_REG 0x240
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -64,6 +64,26 @@ static void bcm_ub_hwclock_set(u32 mask,
- bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
- }
-
-+static void bcm_misc_iddq_set(u32 mask, int enable)
-+{
-+ u32 offset;
-+ u32 reg;
-+
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
-+ offset = MISC_IDDQ_CTRL_6328_REG;
-+ else if (BCMCPU_IS_63268())
-+ offset = MISC_IDDQ_CTRL_63268_REG;
-+ else
-+ return;
-+
-+ reg = bcm_misc_readl(offset);
-+ if (enable)
-+ reg &= ~mask;
-+ else
-+ reg |= mask;
-+ bcm_misc_writel(reg, offset);
-+}
-+
- /*
- * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
- */
-@@ -236,7 +256,17 @@ static void usbh_set(struct clk *clk, in
- } else if (BCMCPU_IS_6368()) {
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
- } else if (BCMCPU_IS_63268()) {
-+ u32 reg;
-+
- bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
-+ bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
-+ reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
-+ if (enable)
-+ reg |= CLK_RST_CTL_USB_REF_CLK_EN;
-+ else
-+ reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
-+ bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
- } else {
- return;
- }
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1034,11 +1034,18 @@
- #define USBH_PRIV_SETUP_6368_REG 0x28
- #define USBH_PRIV_SETUP_IOC_SHIFT 4
- #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
-+#define USBH_PRIV_SETUP_IPP_SHIFT 5
-+#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT)
-
- #define USBH_PRIV_SETUP_6318_REG 0x00
-+#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18
- #define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
--#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
--#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
-+
-+#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27)
-+#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31)
-+#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9)
-+#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10)
-+
- #define USBH_PRIV_SIM_CTRL_6318_REG 0x20
- #define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -73,6 +73,8 @@ config BCM63XX_CPU_63268
- bool "support 63268 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-+ select BCM63XX_EHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
- int __init bcm63xx_ehci_register(void)
- {
- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
-- !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return 0;
-
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_63268()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
-+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
-+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
- } else if (BCMCPU_IS_6318()) {
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_63268()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
-+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
-+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
- } else if (BCMCPU_IS_6318()) {
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -40,6 +40,7 @@ struct board_info {
-
- /* USB config */
- struct bcm63xx_usbd_platform_data usbd;
-+ unsigned int num_usbh_ports:2;
-
- /* GPIO LEDs */
- struct gpio_led leds[5];
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -1,6 +1,6 @@
- #ifndef BCM63XX_DEV_USB_EHCI_H_
- #define BCM63XX_DEV_USB_EHCI_H_
-
--int bcm63xx_ehci_register(void);
-+int bcm63xx_ehci_register(unsigned int num_ports);
-
- #endif /* BCM63XX_DEV_USB_EHCI_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -1,6 +1,6 @@
- #ifndef BCM63XX_DEV_USB_OHCI_H_
- #define BCM63XX_DEV_USB_OHCI_H_
-
--int bcm63xx_ohci_register(void);
-+int bcm63xx_ohci_register(unsigned int num_ports);
-
- #endif /* BCM63XX_DEV_USB_OHCI_H_ */
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -165,6 +165,8 @@ static struct platform_device bcm63xx_gp
- */
- int __init board_register_devices(void)
- {
-+ int usbh_ports = 0;
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
-@@ -186,14 +188,21 @@ int __init board_register_devices(void)
- !board_get_mac_address(board.enetsw.mac_addr))
- bcm63xx_enetsw_register(&board.enetsw);
-
-+ if ((board.has_ohci0 || board.has_ehci0)) {
-+ usbh_ports = board.num_usbh_ports;
-+
-+ if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd))
-+ usbh_ports = 1;
-+ }
-+
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
- if (board.has_ehci0)
-- bcm63xx_ehci_register();
-+ bcm63xx_ehci_register(usbh_ports);
-
- if (board.has_ohci0)
-- bcm63xx_ohci_register();
-+ bcm63xx_ohci_register(usbh_ports);
-
- /* Generate MAC address for WLAN and register our SPROM,
- * do this after registering enet devices
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh
- },
- };
-
--int __init bcm63xx_ehci_register(void)
-+int __init bcm63xx_ehci_register(unsigned int num_ports)
- {
- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
- !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return 0;
-
-+ bcm63xx_ehci_pdata.num_ports = num_ports;
-+
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
- ehci_resources[0].end = ehci_resources[0].start;
- ehci_resources[0].end += RSET_EHCI_SIZE - 1;
---- a/arch/mips/bcm63xx/dev-usb-ohci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc
- .big_endian_desc = 1,
- .big_endian_mmio = 1,
- .no_big_frame_no = 1,
-- .num_ports = 1,
- .power_on = bcm63xx_ohci_power_on,
- .power_off = bcm63xx_ohci_power_off,
- .power_suspend = bcm63xx_ohci_power_off,
-@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh
- },
- };
-
--int __init bcm63xx_ohci_register(void)
-+int __init bcm63xx_ohci_register(unsigned int num_ports)
- {
- if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
- return -ENODEV;
-
-+ bcm63xx_ohci_pdata.num_ports = num_ports;
-+
- ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
- ohci_resources[0].end = ohci_resources[0].start;
- ohci_resources[0].end += RSET_OHCI_SIZE - 1;
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -576,6 +576,7 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-
- .leds = {
- {
+++ /dev/null
-From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Jun 2014 12:47:49 +0200
-Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one
- board type
-
-Use the arguments passed to the kernel to detect being booted with
-CFE as the indicator for bcm963xx board support, allowing the
-non presence of CFE_EPTSEAL to assume a different board type.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 7 +++----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 13 +++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 6 ++++++
- 4 files changed, 23 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -1,12 +1,11 @@
- # SPDX-License-Identifier: GPL-2.0
--choice
-- prompt "Board support"
-+menu "Board support"
- depends on BCM63XX
-- default BOARD_BCM963XX
-
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
-+ default y
- help
-
--endchoice
-+endmenu
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -686,7 +686,7 @@ static const struct board_info __initcon
- /*
- * early init callback, read nvram data from flash and checksum it
- */
--void __init board_prom_init(void)
-+void __init board_bcm963xx_init(void)
- {
- unsigned int i;
- u8 *boot_addr, *cfe;
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -13,6 +13,8 @@
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
-+#include <asm/bootinfo.h>
-+#include <asm/fw/cfe/cfe_api.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_uart.h>
-@@ -30,6 +32,8 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-+#include "board_common.h"
-+
- #define PFX "board: "
-
- static struct board_info board;
-@@ -80,6 +84,15 @@ const char *board_get_name(void)
- return board.name;
- }
-
-+void __init board_prom_init(void)
-+{
-+ /* detect bootloader */
-+ if (fw_arg3 == CFE_EPTSEAL)
-+ board_bcm963xx_init();
-+ else
-+ panic("unsupported bootloader detected");
-+}
-+
- static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
-
- /*
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -6,4 +6,10 @@
- void board_early_setup(const struct board_info *board,
- int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
-+#if defined(CONFIG_BOARD_BCM963XX)
-+void board_bcm963xx_init(void);
-+#else
-+static inline void board_bcm963xx_init(void) { }
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
-From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:28:14 +0100
-Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
- flash address
-
-Allow board implementations to force the physmap address.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++-----
- .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 2 files changed, 16 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
- },
- };
-
-+void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
-+{
-+ mtd_resources[0].start = start;
-+ mtd_resources[0].end = end;
-+}
-+
- static int __init bcm63xx_detect_flash_type(void)
- {
- u32 val;
-@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void)
-
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
-- /* read base address of boot chip select (0) */
-- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-- val &= MPI_CSBASE_BASE_MASK;
-
-- mtd_resources[0].start = val;
-- mtd_resources[0].end = 0x1FFFFFFF;
-+ if (!mtd_resources[0].start) {
-+ /* read base address of boot chip select (0) */
-+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ val &= MPI_CSBASE_BASE_MASK;
-+
-+ mtd_resources[0].start = val;
-+ mtd_resources[0].end = 0x1FFFFFFF;
-+ }
-
- return platform_device_register(&mtd_dev);
- case BCM63XX_FLASH_TYPE_SERIAL:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -10,6 +10,8 @@ enum {
-
- void bcm63xx_flash_detect(void);
-
-+void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
-+
- int __init bcm63xx_flash_register(void);
-
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:31:12 +0200
-Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own
- unit
-
-In preparation for enhancing it, move it into its own file. Require a
-mac address to be passed as the argument to always "reserve" the mac
-regardless of the inclusion state of SSB.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 53 ++--------------
- arch/mips/bcm63xx/sprom.c | 70 ++++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 ++
- 4 files changed, 83 insertions(+), 48 deletions(-)
- create mode 100644 arch/mips/bcm63xx/sprom.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,8 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
-+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
-+ sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -39,44 +39,6 @@
- static struct board_info board;
-
- /*
-- * Register a sane SPROMv2 to make the on-board
-- * bcm4318 WLAN work
-- */
--#ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-- .revision = 0x02,
-- .board_rev = 0x17,
-- .country_code = 0x0,
-- .ant_available_bg = 0x3,
-- .pa0b0 = 0x15ae,
-- .pa0b1 = 0xfa85,
-- .pa0b2 = 0xfe8d,
-- .pa1b0 = 0xffff,
-- .pa1b1 = 0xffff,
-- .pa1b2 = 0xffff,
-- .gpio0 = 0xff,
-- .gpio1 = 0xff,
-- .gpio2 = 0xff,
-- .gpio3 = 0xff,
-- .maxpwr_bg = 0x004c,
-- .itssi_bg = 0x00,
-- .boardflags_lo = 0x2848,
-- .boardflags_hi = 0x0000,
--};
--
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--{
-- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-- return 0;
-- } else {
-- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-- return -EINVAL;
-- }
--}
--#endif
--
--/*
- * return board name for /proc/cpuinfo
- */
- const char *board_get_name(void)
-@@ -179,6 +141,7 @@ static struct platform_device bcm63xx_gp
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-+ u8 mac[ETH_ALEN];
-
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-@@ -220,15 +183,10 @@ int __init board_register_devices(void)
- /* Generate MAC address for WLAN and register our SPROM,
- * do this after registering enet devices
- */
--#ifdef CONFIG_SSB_PCIHOST
-- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
-- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- if (ssb_arch_register_fallback_sprom(
-- &bcm63xx_get_fallback_sprom) < 0)
-- pr_err(PFX "failed to register fallback SPROM\n");
-- }
--#endif
-+
-+ if (board_get_mac_address(mac) ||
-+ bcm63xx_register_fallback_sprom(mac))
-+ pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
-
---- /dev/null
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -0,0 +1,70 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/ssb/ssb.h>
-+#include <bcm63xx_fallback_sprom.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX "sprom: "
-+
-+/*
-+ * Register a sane SPROMv2 to make the on-board
-+ * bcm4318 WLAN work
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+static struct ssb_sprom bcm63xx_sprom = {
-+ .revision = 0x02,
-+ .board_rev = 0x17,
-+ .country_code = 0x0,
-+ .ant_available_bg = 0x3,
-+ .pa0b0 = 0x15ae,
-+ .pa0b1 = 0xfa85,
-+ .pa0b2 = 0xfe8d,
-+ .pa1b0 = 0xffff,
-+ .pa1b1 = 0xffff,
-+ .pa1b2 = 0xffff,
-+ .gpio0 = 0xff,
-+ .gpio1 = 0xff,
-+ .gpio2 = 0xff,
-+ .gpio3 = 0xff,
-+ .maxpwr_bg = 0x004c,
-+ .itssi_bg = 0x00,
-+ .boardflags_lo = 0x2848,
-+ .boardflags_hi = 0x0000,
-+};
-+
-+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->bustype == SSB_BUSTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-+
-+int __init bcm63xx_register_fallback_sprom(u8 *mac)
-+{
-+ int ret = 0;
-+
-+#ifdef CONFIG_SSB_PCIHOST
-+ memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
-+
-+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
-+#endif
-+ return ret;
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -0,0 +1,6 @@
-+#ifndef __BCM63XX_FALLBACK_SPROM
-+#define __BCM63XX_FALLBACK_SPROM
-+
-+int bcm63xx_register_fallback_sprom(u8 *mac);
-+
-+#endif
+++ /dev/null
-From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:43:49 +0200
-Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom
-
-Similar to ethernet setup, use a platform data struct for passing
-the mac. This eliminates the requirement to allocate an array on
-stack for the mac passed.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_common.c | 6 ++----
- arch/mips/bcm63xx/sprom.c | 8 ++++----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++-
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 4 ++++
- 4 files changed, 17 insertions(+), 9 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -141,7 +141,6 @@ static struct platform_device bcm63xx_gp
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-- u8 mac[ETH_ALEN];
-
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-@@ -184,8 +183,8 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
-
-- if (board_get_mac_address(mac) ||
-- bcm63xx_register_fallback_sprom(mac))
-+ if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-+ bcm63xx_register_fallback_sprom(&board.fallback_sprom))
- pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss
- }
- #endif
-
--int __init bcm63xx_register_fallback_sprom(u8 *mac)
-+int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
- {
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-- memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-
- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
- #endif
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -1,6 +1,12 @@
- #ifndef __BCM63XX_FALLBACK_SPROM
- #define __BCM63XX_FALLBACK_SPROM
-
--int bcm63xx_register_fallback_sprom(u8 *mac);
-+#include <linux/if_ether.h>
-+
-+struct fallback_sprom_data {
-+ u8 mac_addr[ETH_ALEN];
-+};
-+
-+int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
-
- #endif
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -7,6 +7,7 @@
- #include <linux/leds.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
-+#include <bcm63xx_fallback_sprom.h>
-
- /*
- * flash mapping
-@@ -50,6 +51,9 @@ struct board_info {
-
- /* External PHY reset GPIO flags from gpio.h */
- unsigned long ephy_reset_gpio_flags;
-+
-+ /* fallback sprom config */
-+ struct fallback_sprom_data fallback_sprom;
- };
-
- #endif /* ! BOARD_BCM963XX_H_ */
+++ /dev/null
-From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:52:56 +0200
-Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional
-
-Some devices do not provide enough mac addresses to populate wifi in
-addition to ethernet.
-
-Use having pci enabled as a rough heuristic which boards should have it
-enabled.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 12 ++++++++++++
- arch/mips/bcm63xx/boards/board_common.c | 5 +++--
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 1 +
- 3 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -70,6 +70,7 @@ static struct board_info __initdata boar
- .has_uart0 = 1,
- .has_pci = 1,
- .has_usbd = 0,
-+ .use_fallback_sprom = 1,
-
- .usbd = {
- .use_fullspeed = 0,
-@@ -219,6 +220,7 @@ static struct board_info __initdata boar
- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -264,6 +266,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -316,6 +319,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -370,6 +374,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -420,6 +425,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -443,6 +449,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -461,6 +468,7 @@ static struct board_info __initdata boar
-
- .has_uart0 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
- .has_ohci0 = 1,
-
- .has_enet0 = 1,
-@@ -483,6 +491,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -509,6 +518,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -561,6 +571,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -632,6 +643,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -183,8 +183,9 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
-
-- if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-- bcm63xx_register_fallback_sprom(&board.fallback_sprom))
-+ if (board.use_fallback_sprom &&
-+ (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-+ bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
- pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -33,6 +33,7 @@ struct board_info {
- unsigned int has_usbd:1;
- unsigned int has_uart0:1;
- unsigned int has_uart1:1;
-+ unsigned int use_fallback_sprom:1;
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
+++ /dev/null
-From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:58:38 +0200
-Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom
-
-Different chips require different sprom contents, so prepare for
-supplying the appropriate sprom type.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 13 ++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 5 +++++
- 2 files changed, 17 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -22,7 +22,7 @@
- * bcm4318 WLAN work
- */
- #ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-+static __initconst struct ssb_sprom bcm63xx_default_sprom = {
- .revision = 0x02,
- .board_rev = 0x17,
- .country_code = 0x0,
-@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom =
- .boardflags_hi = 0x0000,
- };
-
-+static struct ssb_sprom bcm63xx_sprom;
-+
- int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
-@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-+ switch (data->type) {
-+ case SPROM_DEFAULT:
-+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-+ sizeof(bcm63xx_sprom));
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -3,8 +3,13 @@
-
- #include <linux/if_ether.h>
-
-+enum sprom_type {
-+ SPROM_DEFAULT, /* default fallback sprom */
-+};
-+
- struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
-+ enum sprom_type type;
- };
-
- int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+++ /dev/null
-From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:16:36 +0200
-Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
-
-Allow using raw sprom content as templates.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 482 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss
- return -EINVAL;
- }
- }
-+
-+/* FIXME: use lib_sprom after submission upstream */
-+
-+/* Get the word-offset for a SSB_SPROM_XXX define. */
-+#define SPOFF(offset) ((offset) / sizeof(u16))
-+/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
-+#define SPEX16(_outvar, _offset, _mask, _shift) \
-+ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
-+#define SPEX32(_outvar, _offset, _mask, _shift) \
-+ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
-+ in[SPOFF(_offset)]) & (_mask)) >> (_shift))
-+#define SPEX(_outvar, _offset, _mask, _shift) \
-+ SPEX16(_outvar, _offset, _mask, _shift)
-+
-+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
-+ do { \
-+ SPEX(_field[0], _offset + 0, _mask, _shift); \
-+ SPEX(_field[1], _offset + 2, _mask, _shift); \
-+ SPEX(_field[2], _offset + 4, _mask, _shift); \
-+ SPEX(_field[3], _offset + 6, _mask, _shift); \
-+ SPEX(_field[4], _offset + 8, _mask, _shift); \
-+ SPEX(_field[5], _offset + 10, _mask, _shift); \
-+ SPEX(_field[6], _offset + 12, _mask, _shift); \
-+ SPEX(_field[7], _offset + 14, _mask, _shift); \
-+ } while (0)
-+
-+
-+static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
-+ u16 mask, u16 shift)
-+{
-+ u16 v;
-+ u8 gain;
-+
-+ v = in[SPOFF(SSB_SPROM1_AGAIN)];
-+ gain = (v & mask) >> shift;
-+ if (gain == 0xFF)
-+ gain = 2; /* If unset use 2dBm */
-+ if (sprom_revision == 1) {
-+ /* Convert to Q5.2 */
-+ gain <<= 2;
-+ } else {
-+ /* Q5.2 Fractional part is stored in 0xC0 */
-+ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
-+ }
-+
-+ return (s8)gain;
-+}
-+
-+static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
-+{
-+ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
-+ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
-+ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
-+ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
-+ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
-+ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
-+ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
-+ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
-+ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
-+ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
-+ SSB_SPROM2_MAXP_A_LO_SHIFT);
-+}
-+
-+static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
-+{
-+ u16 loc[3];
-+
-+ if (out->revision == 3) /* rev 3 moved MAC */
-+ loc[0] = SSB_SPROM3_IL0MAC;
-+ else {
-+ loc[0] = SSB_SPROM1_IL0MAC;
-+ loc[1] = SSB_SPROM1_ET0MAC;
-+ loc[2] = SSB_SPROM1_ET1MAC;
-+ }
-+
-+ SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
-+ SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
-+ SSB_SPROM1_ETHPHY_ET1A_SHIFT);
-+ SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
-+ SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
-+ SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ if (out->revision == 1)
-+ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
-+ SSB_SPROM1_BINF_CCODE_SHIFT);
-+ SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
-+ SSB_SPROM1_BINF_ANTA_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
-+ SSB_SPROM1_BINF_ANTBG_SHIFT);
-+ SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
-+ SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
-+ SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
-+ SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
-+ SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
-+ SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
-+ SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
-+ SSB_SPROM1_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
-+ SSB_SPROM1_GPIOB_P3_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
-+ SSB_SPROM1_MAXPWR_A_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
-+ SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
-+ SSB_SPROM1_ITSSI_A_SHIFT);
-+ SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
-+ SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
-+
-+ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
-+
-+ /* Extract the antenna gain values. */
-+ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
-+ SSB_SPROM1_AGAIN_BG,
-+ SSB_SPROM1_AGAIN_BG_SHIFT);
-+ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
-+ SSB_SPROM1_AGAIN_A,
-+ SSB_SPROM1_AGAIN_A_SHIFT);
-+ if (out->revision >= 2)
-+ sprom_extract_r23(out, in);
-+}
-+
-+/* Revs 4 5 and 8 have partially shared layout */
-+static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
-+{
-+ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
-+ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
-+ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
-+ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
-+ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
-+ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
-+ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
-+ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
-+
-+ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
-+ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
-+ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
-+ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
-+ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
-+ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
-+ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
-+ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
-+
-+ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
-+ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
-+ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
-+ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
-+ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
-+ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
-+ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
-+ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
-+
-+ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
-+ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
-+ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
-+ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
-+ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
-+ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
-+ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
-+ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
-+}
-+
-+static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
-+{
-+ u16 il0mac_offset;
-+
-+ if (out->revision == 4)
-+ il0mac_offset = SSB_SPROM4_IL0MAC;
-+ else
-+ il0mac_offset = SSB_SPROM5_IL0MAC;
-+
-+ SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
-+ SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
-+ SSB_SPROM4_ETHPHY_ET1A_SHIFT);
-+ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ if (out->revision == 4) {
-+ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
-+ } else {
-+ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
-+ }
-+ SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
-+ SSB_SPROM4_ANTAVAIL_A_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
-+ SSB_SPROM4_ANTAVAIL_BG_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
-+ SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
-+ SSB_SPROM4_ITSSI_BG_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
-+ SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
-+ SSB_SPROM4_ITSSI_A_SHIFT);
-+ if (out->revision == 4) {
-+ SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
-+ SSB_SPROM4_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
-+ SSB_SPROM4_GPIOB_P3_SHIFT);
-+ } else {
-+ SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
-+ SSB_SPROM5_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
-+ SSB_SPROM5_GPIOB_P3_SHIFT);
-+ }
-+
-+ /* Extract the antenna gain values. */
-+ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
-+ SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
-+ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
-+ SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
-+ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
-+ SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
-+ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
-+ SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
-+
-+ sprom_extract_r458(out, in);
-+
-+ /* TODO - get remaining rev 4 stuff needed */
-+}
-+
-+static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
-+{
-+ int i;
-+ u16 o;
-+ u16 pwr_info_offset[] = {
-+ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
-+ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
-+ };
-+ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
-+ ARRAY_SIZE(out->core_pwr_info));
-+
-+ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
-+ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
-+ SSB_SPROM8_ANTAVAIL_A_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
-+ SSB_SPROM8_ANTAVAIL_BG_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
-+ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
-+ SSB_SPROM8_ITSSI_BG_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
-+ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
-+ SSB_SPROM8_ITSSI_A_SHIFT);
-+ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
-+ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
-+ SSB_SPROM8_MAXP_AL_SHIFT);
-+ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
-+ SSB_SPROM8_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
-+ SSB_SPROM8_GPIOB_P3_SHIFT);
-+ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
-+ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
-+ SSB_SPROM8_TRI5G_SHIFT);
-+ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
-+ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
-+ SSB_SPROM8_TRI5GH_SHIFT);
-+ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
-+ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
-+ SSB_SPROM8_RXPO5G_SHIFT);
-+ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
-+ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
-+ SSB_SPROM8_RSSISMC2G_SHIFT);
-+ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
-+ SSB_SPROM8_RSSISAV2G_SHIFT);
-+ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
-+ SSB_SPROM8_BXA2G_SHIFT);
-+ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
-+ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
-+ SSB_SPROM8_RSSISMC5G_SHIFT);
-+ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
-+ SSB_SPROM8_RSSISAV5G_SHIFT);
-+ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
-+ SSB_SPROM8_BXA5G_SHIFT);
-+ SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
-+ SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
-+ SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
-+ SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
-+ SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
-+ SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
-+ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
-+ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
-+ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
-+ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
-+ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
-+ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
-+ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
-+ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
-+
-+ /* Extract the antenna gain values. */
-+ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
-+ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
-+ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
-+ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
-+ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
-+ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
-+ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
-+ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
-+
-+ /* Extract cores power info info */
-+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
-+ o = pwr_info_offset[i];
-+ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
-+ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
-+ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
-+ SSB_SPROM8_2G_MAXP, 0);
-+
-+ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
-+
-+ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
-+ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
-+ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
-+ SSB_SPROM8_5G_MAXP, 0);
-+ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
-+ SSB_SPROM8_5GH_MAXP, 0);
-+ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
-+ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
-+
-+ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
-+ }
-+
-+ /* Extract FEM info */
-+ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
-+ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
-+ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
-+ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
-+ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
-+
-+ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
-+ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
-+ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
-+ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
-+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
-+
-+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
-+ SSB_SPROM8_LEDDC_ON_SHIFT);
-+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
-+ SSB_SPROM8_LEDDC_OFF_SHIFT);
-+
-+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
-+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
-+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
-+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
-+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
-+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
-+
-+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
-+
-+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
-+
-+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
-+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
-+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
-+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
-+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
-+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
-+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
-+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
-+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
-+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
-+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
-+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
-+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
-+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
-+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
-+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
-+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
-+
-+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
-+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
-+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
-+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
-+
-+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
-+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
-+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
-+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
-+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
-+ SSB_SPROM8_TEMPDELTA_PHYCAL,
-+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
-+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
-+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
-+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
-+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
-+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
-+ sprom_extract_r458(out, in);
-+
-+ /* TODO - get remaining rev 8 stuff needed */
-+}
-+
-+static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
-+{
-+ memset(out, 0, sizeof(*out));
-+
-+ out->revision = in[size - 1] & 0x00FF;
-+ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
-+ memset(out->et1mac, 0xFF, 6);
-+
-+ switch (out->revision) {
-+ case 1:
-+ case 2:
-+ case 3:
-+ sprom_extract_r123(out, in);
-+ break;
-+ case 4:
-+ case 5:
-+ sprom_extract_r45(out, in);
-+ break;
-+ case 8:
-+ sprom_extract_r8(out, in);
-+ break;
-+ default:
-+ pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
-+ out->revision);
-+ out->revision = 1;
-+ sprom_extract_r123(out, in);
-+ }
-+
-+ if (out->boardflags_lo == 0xFFFF)
-+ out->boardflags_lo = 0; /* per specs */
-+ if (out->boardflags_hi == 0xFFFF)
-+ out->boardflags_hi = 0; /* per specs */
-+
-+ return 0;
-+}
-+
-+static __initdata u16 template_sprom[220];
- #endif
-
-+
- int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
- {
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-+ u16 size = 0;
-+
- switch (data->type) {
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr
- return -EINVAL;
- }
-
-+ if (size > 0)
-+ sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+++ /dev/null
-From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:33:38 +0200
-Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common
- ssb cards
-
-Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 136 +++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 +
- 2 files changed, 142 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6
- .boardflags_hi = 0x0000,
- };
-
-+
-+static __initconst u16 bcm4306_sprom[] = {
-+ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4,
-+ 0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff,
-+ 0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002,
-+};
-+
-+static __initconst u16 bcm4318_sprom[] = {
-+ 0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7,
-+ 0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff,
-+ 0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002,
-+};
-+
-+static __initconst u16 bcm4321_sprom[] = {
-+ 0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36,
-+ 0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0004,
-+};
-+
-+static __initconst u16 bcm4322_sprom[] = {
-+ 0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000,
-+ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43222_sprom[] = {
-+ 0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000,
-+ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
- static struct ssb_sprom bcm63xx_sprom;
-
- int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr
- u16 size = 0;
-
- switch (data->type) {
-+ case SPROM_BCM4306:
-+ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
-+ size = ARRAY_SIZE(bcm4306_sprom);
-+ break;
-+ case SPROM_BCM4318:
-+ memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom));
-+ size = ARRAY_SIZE(bcm4318_sprom);
-+ break;
-+ case SPROM_BCM4321:
-+ memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom));
-+ size = ARRAY_SIZE(bcm4321_sprom);
-+ break;
-+ case SPROM_BCM4322:
-+ memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom));
-+ size = ARRAY_SIZE(bcm4322_sprom);
-+ break;
-+ case SPROM_BCM43222:
-+ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
-+ size = ARRAY_SIZE(bcm43222_sprom);
-+ break;
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -5,6 +5,12 @@
-
- enum sprom_type {
- SPROM_DEFAULT, /* default fallback sprom */
-+ /* SSB based */
-+ SPROM_BCM4306,
-+ SPROM_BCM4318,
-+ SPROM_BCM4321,
-+ SPROM_BCM4322,
-+ SPROM_BCM43222,
- };
-
- struct fallback_sprom_data {
+++ /dev/null
-From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:48:26 +0200
-Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma
-
-Similar to SSB, register a fallback sprom handler for BCMA.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 1 +
- arch/mips/bcm63xx/sprom.c | 40 +++++++++++++++++++++++++++++++++++-----
- 2 files changed, 36 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -5,6 +5,7 @@ menu "Board support"
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
-+ select BCMA
- default y
- help
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -12,6 +12,7 @@
- #include <linux/string.h>
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
-+#include <linux/bcma/bcma.h>
- #include <bcm63xx_fallback_sprom.h>
- #include <board_bcm963xx.h>
-
-@@ -21,7 +22,7 @@
- * Register a sane SPROMv2 to make the on-board
- * bcm4318 WLAN work
- */
--#ifdef CONFIG_SSB_PCIHOST
-+#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
- static __initconst struct ssb_sprom bcm63xx_default_sprom = {
- .revision = 0x02,
- .board_rev = 0x17,
-@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6
- .boardflags_hi = 0x0000,
- };
-
--
-+#if defined (CONFIG_SSB_PCIHOST)
- static __initconst u16 bcm4306_sprom[] = {
- 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
- 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[]
- 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
- 0xffff, 0xffff, 0xffff, 0x0008,
- };
-+#endif /* CONFIG_SSB_PCIHOST */
-
- static struct ssb_sprom bcm63xx_sprom;
-
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+#if defined(CONFIG_SSB_PCIHOST)
-+int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss
- return -EINVAL;
- }
- }
-+#endif
-+
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-
- /* FIXME: use lib_sprom after submission upstream */
-
-@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr
- {
- int ret = 0;
-
--#ifdef CONFIG_SSB_PCIHOST
-+#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
- u16 size = 0;
-
- switch (data->type) {
-+#if defined(CONFIG_SSB_PCIHOST)
- case SPROM_BCM4306:
- memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
- size = ARRAY_SIZE(bcm4306_sprom);
-@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr
- memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
- size = ARRAY_SIZE(bcm43222_sprom);
- break;
-+#endif
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
-@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-+#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
-+
-+#if defined(CONFIG_SSB_PCIHOST)
-+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom);
-+ if (ret)
-+ return ret;
-+
-+#endif
-
-- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+ ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom);
-+ if (ret)
-+ return ret;
- #endif
- return ret;
- }
+++ /dev/null
-From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 30 Jul 2014 23:14:27 +0200
-Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates
-
-Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227,
-BCM43228, and BCM4331.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 256 +++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +
- 2 files changed, 264 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[]
- };
- #endif /* CONFIG_SSB_PCIHOST */
-
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+static __initconst u16 bcm4313_sprom[] = {
-+ 0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201,
-+ 0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000,
-+ 0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0008,
-+};
-+
-+static __initconst u16 bcm43131_sprom[] = {
-+ 0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202,
-+ 0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43217_sprom[] = {
-+ 0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x7a08,
-+};
-+
-+static __initconst u16 bcm43225_sprom[] = {
-+ 0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555,
-+ 0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43227_sprom[] = {
-+ 0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43228_sprom[] = {
-+ 0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215,
-+ 0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c,
-+ 0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000,
-+ 0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446,
-+ 0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888,
-+ 0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xf008,
-+};
-+
-+static __initconst u16 bcm4331_sprom[] = {
-+ 0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202,
-+ 0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657,
-+ 0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000,
-+ 0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d,
-+ 0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000,
-+ 0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4,
-+ 0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0009,
-+};
-+
-+#endif /* CONFIG_BCMA_HOST_PCI */
-+
- static struct ssb_sprom bcm63xx_sprom;
-
- #if defined(CONFIG_SSB_PCIHOST)
-@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr
- size = ARRAY_SIZE(bcm43222_sprom);
- break;
- #endif
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+ case SPROM_BCM4313:
-+ memcpy(&template_sprom, &bcm4313_sprom,
-+ sizeof(bcm4313_sprom));
-+ size = ARRAY_SIZE(bcm4313_sprom);
-+ break;
-+ case SPROM_BCM43131:
-+ memcpy(&template_sprom, &bcm43131_sprom,
-+ sizeof(bcm43131_sprom));
-+ size = ARRAY_SIZE(bcm43131_sprom);
-+ break;
-+ case SPROM_BCM43217:
-+ memcpy(&template_sprom, &bcm43217_sprom,
-+ sizeof(bcm43217_sprom));
-+ size = ARRAY_SIZE(bcm43217_sprom);
-+ break;
-+ case SPROM_BCM43225:
-+ memcpy(&template_sprom, &bcm43225_sprom,
-+ sizeof(bcm43225_sprom));
-+ size = ARRAY_SIZE(bcm43225_sprom);
-+ break;
-+ case SPROM_BCM43227:
-+ memcpy(&template_sprom, &bcm43227_sprom,
-+ sizeof(bcm43227_sprom));
-+ size = ARRAY_SIZE(bcm43227_sprom);
-+ break;
-+ case SPROM_BCM43228:
-+ memcpy(&template_sprom, &bcm43228_sprom,
-+ sizeof(bcm43228_sprom));
-+ size = ARRAY_SIZE(bcm43228_sprom);
-+ break;
-+ case SPROM_BCM4331:
-+ memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom));
-+ size = ARRAY_SIZE(bcm4331_sprom);
-+ break;
-+#endif
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -11,6 +11,14 @@ enum sprom_type {
- SPROM_BCM4321,
- SPROM_BCM4322,
- SPROM_BCM43222,
-+ /* BCMA based */
-+ SPROM_BCM4313,
-+ SPROM_BCM43131,
-+ SPROM_BCM43217,
-+ SPROM_BCM43225,
-+ SPROM_BCM43227,
-+ SPROM_BCM43228,
-+ SPROM_BCM4331,
- };
-
- struct fallback_sprom_data {
+++ /dev/null
-From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 31 Jul 2014 19:12:33 +0200
-Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom
- fixups
-
-Allow board_info files to supply fixups for the base sproms to adapt
-them to the actual used sprom contents in case they do not use the
-default ones.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 14 +++++++++++++-
- .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 ++++++++
- 2 files changed, 21 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro
- return 0;
- }
-
-+void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n)
-+{
-+ unsigned int i;
-+
-+ for (i = 0; i < n; i++)
-+ sprom[fixups[i].offset] = fixups[i].value;
-+}
-+
- static __initdata u16 template_sprom[220];
- #endif
-
-@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr
- return -EINVAL;
- }
-
-- if (size > 0)
-+ if (size > 0) {
-+ sprom_apply_fixups(template_sprom, data->board_fixups,
-+ data->num_board_fixups);
-+
- sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+ }
-
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -21,9 +21,17 @@ enum sprom_type {
- SPROM_BCM4331,
- };
-
-+struct sprom_fixup {
-+ u16 offset;
-+ u16 value;
-+};
-+
- struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
- enum sprom_type type;
-+
-+ struct sprom_fixup *board_fixups;
-+ unsigned int num_board_fixups;
- };
-
- int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+++ /dev/null
-From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 31 Jul 2014 20:39:44 +0200
-Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for
- fallback sprom
-
-Warn if the set pci bus/slot does not match the actual request.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 31 ++++++++++++++++++----
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 3 +++
- 2 files changed, 29 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] =
-
- #endif /* CONFIG_BCMA_HOST_PCI */
-
--static struct ssb_sprom bcm63xx_sprom;
-+struct fallback_sprom_match {
-+ u8 pci_bus;
-+ u8 pci_dev;
-+ struct ssb_sprom sprom;
-+};
-+
-+static struct fallback_sprom_match fallback_sprom;
-
- #if defined(CONFIG_SSB_PCIHOST)
- int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
-+ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
-+ pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ bus->host_pci->bus->number,
-+ PCI_SLOT(bus->host_pci->devfn));
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
- return 0;
- } else {
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc
- int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
- {
- if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
-+ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
-+ pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ bus->host_pci->bus->number,
-+ PCI_SLOT(bus->host_pci->devfn));
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
- return 0;
- } else {
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr
- break;
- #endif
- case SPROM_DEFAULT:
-- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-- sizeof(bcm63xx_sprom));
-+ memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom,
-+ sizeof(bcm63xx_default_sprom));
- break;
- default:
- return -EINVAL;
-@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr
- sprom_apply_fixups(template_sprom, data->board_fixups,
- data->num_board_fixups);
-
-- sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+ sprom_extract(&fallback_sprom.sprom, template_sprom, size);
- }
-
-- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN);
-+
-+ fallback_sprom.pci_bus = data->pci_bus;
-+ fallback_sprom.pci_dev = data->pci_dev;
- #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
-
- #if defined(CONFIG_SSB_PCIHOST)
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -30,6 +30,9 @@ struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
- enum sprom_type type;
-
-+ u8 pci_bus;
-+ u8 pci_dev;
-+
- struct sprom_fixup *board_fixups;
- unsigned int num_board_fixups;
- };
+++ /dev/null
-From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 24 Jun 2014 10:57:51 +0200
-Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 4 ++++
- arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++
- arch/mips/bcm63xx/prom.c | 6 ++++++
- 3 files changed, 44 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -2,6 +2,10 @@
- menu "Board support"
- depends on BCM63XX
-
-+config BOARD_BCM63XX_DT
-+ bool "Device Tree boards (experimential)"
-+ select USE_OF
-+
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -10,11 +10,14 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
-+#include <linux/of_fdt.h>
-+#include <linux/of_platform.h>
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
- #include <asm/bootinfo.h>
- #include <asm/fw/cfe/cfe_api.h>
-+#include <asm/prom.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_uart.h>
-@@ -125,8 +128,23 @@ void __init board_setup(void)
- /* make sure we're running on expected cpu */
- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
- panic("unexpected CPU for bcm963xx board");
-+
-+#if CONFIG_OF
-+ if (initial_boot_params)
-+ __dt_setup_arch(initial_boot_params);
-+#endif
- }
-
-+#if CONFIG_OF
-+void __init device_tree_init(void)
-+{
-+ if (!initial_boot_params)
-+ return;
-+
-+ unflatten_and_copy_device_tree();
-+}
-+#endif
-+
- static struct gpio_led_platform_data bcm63xx_led_data;
-
- static struct platform_device bcm63xx_gpio_leds = {
-@@ -135,6 +153,13 @@ static struct platform_device bcm63xx_gp
- .dev.platform_data = &bcm63xx_led_data,
- };
-
-+#if CONFIG_OF
-+static struct of_device_id of_ids[] = {
-+ { /* filled at runtime */ },
-+ { .compatible = "simple-bus" },
-+ { },
-+};
-+#endif
- /*
- * third stage init callback, register all board devices.
- */
-@@ -142,6 +167,15 @@ int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-
-+#if CONFIG_OF
-+ if (of_have_populated_dt()) {
-+ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
-+ "brcm,bcm%x", bcm63xx_get_cpu_id());
-+
-+ of_platform_populate(NULL, of_ids, NULL, NULL);
-+ }
-+#endif
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -8,6 +8,7 @@
-
- #include <linux/init.h>
- #include <linux/bootmem.h>
-+#include <linux/of_fdt.h>
- #include <linux/smp.h>
- #include <asm/bootinfo.h>
- #include <asm/bmips.h>
-@@ -23,6 +24,11 @@ void __init prom_init(void)
- {
- u32 reg, mask;
-
-+#if CONFIG_OF
-+ if (fw_passed_dtb)
-+ early_init_dt_verify((void *)fw_passed_dtb);
-+#endif
-+
- bcm63xx_cpu_init();
-
- /* stop any running watchdog */
+++ /dev/null
-From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 26 Jun 2014 12:51:00 +0200
-Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info
- by dtb
-
-Allow using the passed dtb's compatible property to match board_info
-structs instead of nvram's boardname field, which is not unique anyway.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 +++++++++++++++
- arch/mips/bcm63xx/boards/board_common.c | 18 ++++++++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 3 +++
- 3 files changed, 36 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -695,6 +695,10 @@ static const struct board_info __initcon
- #endif
- };
-
-+static struct of_device_id const bcm963xx_boards_dt[] = {
-+ { },
-+};
-+
- /*
- * early init callback, read nvram data from flash and checksum it
- */
-@@ -706,6 +710,7 @@ void __init board_bcm963xx_init(void)
- char *board_name = NULL;
- u32 val;
- struct bcm_hcs *hcs;
-+ const struct of_device_id *board_match;
-
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
-@@ -745,6 +750,16 @@ void __init board_bcm963xx_init(void)
- } else {
- board_name = bcm63xx_nvram_get_name();
- }
-+
-+ /* find board by compat */
-+ board_match = bcm63xx_match_board(bcm963xx_boards_dt);
-+ if (board_match) {
-+ board_early_setup(board_match->data,
-+ bcm63xx_nvram_get_mac_address);
-+
-+ return;
-+ }
-+
- /* find board by name */
- for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -239,3 +239,21 @@ int __init board_register_devices(void)
-
- return 0;
- }
-+
-+const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m)
-+{
-+ const struct of_device_id *match;
-+ unsigned long dt_root;
-+
-+ if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params)
-+ return NULL;
-+
-+ dt_root = of_get_flat_dt_root();
-+
-+ for (match = m; match->compatible[0]; match++) {
-+ if (of_flat_dt_is_compatible(dt_root, match->compatible))
-+ return match;
-+ }
-+
-+ return NULL;
-+}
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -1,11 +1,14 @@
- #ifndef __BOARD_COMMON_H
- #define __BOARD_COMMON_H
-
-+#include <linux/of.h>
- #include <board_bcm963xx.h>
-
- void board_early_setup(const struct board_info *board,
- int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
-+const struct of_device_id *bcm63xx_match_board(const struct of_device_id *);
-+
- #if defined(CONFIG_BOARD_BCM963XX)
- void board_bcm963xx_init(void);
- #else
+++ /dev/null
-From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 21 Nov 2014 16:54:06 +0100
-Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info
- list
-
-Populate the compatible to board_info list to allow dtbs to be used
-for known boards.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 34 +++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -696,6 +696,48 @@ static const struct board_info __initcon
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-+#ifdef CONFIG_OF
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6338
-+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
-+ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6345
-+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
-+ { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
-+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
-+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
-+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
-+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
-+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
-+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
-+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
-+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6358
-+ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
-+ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
-+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+#endif
-+#endif /* CONFIG_OF */
- { },
- };
-
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -143,6 +143,18 @@ void __init device_tree_init(void)
-
- unflatten_and_copy_device_tree();
- }
-+
-+int board_of_device_present(const char *alias)
-+{
-+ bool present;
-+ struct device_node *np;
-+
-+ np = of_find_node_by_path(alias);
-+ present = of_device_is_available(np);
-+ of_node_put(np);
-+
-+ return present;
-+}
- #endif
-
- static struct gpio_led_platform_data bcm63xx_led_data;
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -15,4 +15,13 @@ void board_bcm963xx_init(void);
- static inline void board_bcm963xx_init(void) { }
- #endif
-
-+#if defined(CONFIG_OF)
-+int board_of_device_present(const char *alias);
-+#else
-+static inline void board_of_device_present(const char *alias)
-+{
-+ return 0;
-+}
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -23,6 +23,8 @@
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-
-+#include "boards/board_common.h"
-+
- static int flash_type;
-
- static struct mtd_partition mtd_partitions[] = {
-@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void)
-
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
-+ /* don't register when already registered through from dtb */
-+ if (board_of_device_present("pflash"))
-+ return 0;
-
- if (!mtd_resources[0].start) {
- /* read base address of boot chip select (0) */
+++ /dev/null
-From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 1 Dec 2014 00:20:07 +0100
-Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -14,6 +14,8 @@
- #include <linux/irqchip.h>
- #include <linux/irqchip/irq-bcm6345-ext.h>
- #include <linux/irqchip/irq-bcm6345-periph.h>
-+#include <linux/of.h>
-+#include <linux/of_fdt.h>
- #include <asm/irq_cpu.h>
- #include <asm/mipsregs.h>
- #include <bcm63xx_cpu.h>
-@@ -21,6 +23,9 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-
-+IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
-+ mips_cpu_irq_of_init);
-+
- void __init arch_init_irq(void)
- {
- void __iomem *periph_bases[2];
-@@ -29,6 +34,13 @@ void __init arch_init_irq(void)
- int periph_irqs[2] = { 2, 3 };
- int ext_irqs[6];
-
-+#ifdef CONFIG_OF
-+ if (initial_boot_params) {
-+ irqchip_init();
-+ return;
-+ }
-+#endif
-+
- periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
- periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
- ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+++ /dev/null
-From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 20 Feb 2015 19:55:32 +0100
-Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx
-
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/gpio/Kconfig | 8 +++
- drivers/gpio/Makefile | 1 +
- drivers/gpio/gpio-bcm63xx.c | 135 +++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 131 insertions(+)
- create mode 100644 drivers/gpio/gpio-bcm63xx.c
-
---- a/drivers/gpio/Kconfig
-+++ b/drivers/gpio/Kconfig
-@@ -134,6 +134,13 @@ config GPIO_BCM_KONA
- help
- Turn on GPIO support for Broadcom "Kona" chips.
-
-+config GPIO_BCM63XX
-+ bool "Broadcom BCM63XX GPIO"
-+ depends on MIPS || COMPILE_TEST
-+ select GPIO_GENERIC
-+ help
-+ Turn on GPIO support for Broadcom BCM63XX xDSL chips.
-+
- config GPIO_BRCMSTB
- tristate "BRCMSTB GPIO support"
- default y if (ARCH_BRCMSTB || BMIPS_GENERIC)
---- a/drivers/gpio/Makefile
-+++ b/drivers/gpio/Makefile
-@@ -34,6 +34,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
- obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
- obj-$(CONFIG_GPIO_AXP209) += gpio-axp209.o
- obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
-+obj-$(CONFIG_GPIO_BCM63XX) += gpio-bcm63xx.o
- obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
- obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
- obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
---- /dev/null
-+++ b/drivers/gpio/gpio-bcm63xx.c
-@@ -0,0 +1,135 @@
-+/*
-+ * Driver for BCM63XX memory-mapped GPIO controllers, based on
-+ * Generic driver for memory-mapped GPIO controllers.
-+ *
-+ * Copyright 2008 MontaVista Software, Inc.
-+ * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
-+ * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/err.h>
-+#include <linux/bug.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/spinlock.h>
-+#include <linux/compiler.h>
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/log2.h>
-+#include <linux/ioport.h>
-+#include <linux/io.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+#include <linux/mod_devicetable.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_gpio.h>
-+
-+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
-+{
-+ char irq_name[7]; /* "gpioXX" */
-+
-+ sprintf(irq_name, "gpio%d", gpio);
-+ return of_irq_get_byname(chip->of_node, irq_name);
-+}
-+
-+static int bcm63xx_gpio_probe(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct resource *dat_r, *dirout_r;
-+ void __iomem *dat;
-+ void __iomem *dirout;
-+ unsigned long sz;
-+ int err;
-+ struct gpio_chip *gc;
-+ struct bgpio_pdata *pdata = dev_get_platdata(dev);
-+
-+ dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+ if (!dat_r || !dirout_r)
-+ return -EINVAL;
-+
-+ if (resource_size(dat_r) != resource_size(dirout_r))
-+ return -EINVAL;
-+
-+ sz = resource_size(dat_r);
-+
-+ dat = devm_ioremap_resource(dev, dat_r);
-+ if (IS_ERR(dat))
-+ return PTR_ERR(dat);
-+
-+ dirout = devm_ioremap_resource(dev, dirout_r);
-+ if (IS_ERR(dirout))
-+ return PTR_ERR(dirout);
-+
-+ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
-+ if (!gc)
-+ return -ENOMEM;
-+
-+ err = bgpio_init(gc, dev, sz, dat, NULL, NULL, dirout, NULL,
-+ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-+ if (err)
-+ return err;
-+
-+ platform_set_drvdata(pdev, gc);
-+
-+ if (dev->of_node) {
-+ int id = of_alias_get_id(dev->of_node, "gpio");
-+ u32 ngpios;
-+
-+ if (id >= 0)
-+ gc->label = devm_kasprintf(dev, GFP_KERNEL,
-+ "bcm63xx-gpio.%d", id);
-+
-+ if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios))
-+ gc->ngpio = ngpios;
-+
-+ if (of_get_property(dev->of_node, "interrupt-names", NULL))
-+ gc->to_irq = bcm63xx_gpio_to_irq;
-+
-+ } else if (pdata) {
-+ gc->base = pdata->base;
-+ if (pdata->ngpio > 0)
-+ gc->ngpio = pdata->ngpio;
-+ }
-+
-+ return gpiochip_add(gc);
-+}
-+
-+static int bcm63xx_gpio_remove(struct platform_device *pdev)
-+{
-+ struct gpio_chip *gc = platform_get_drvdata(pdev);
-+
-+ gpiochip_remove(gc);
-+ return 0;
-+}
-+
-+#ifdef CONFIG_OF
-+static struct of_device_id bcm63xx_gpio_of_match[] = {
-+ { .compatible = "brcm,bcm6345-gpio" },
-+ { },
-+};
-+#endif
-+
-+static struct platform_driver bcm63xx_gpio_driver = {
-+ .probe = bcm63xx_gpio_probe,
-+ .remove = bcm63xx_gpio_remove,
-+ .driver = {
-+ .name = "bcm63xx-gpio",
-+ .of_match_table = of_match_ptr(bcm63xx_gpio_of_match),
-+ },
-+};
-+
-+module_platform_driver(bcm63xx_gpio_driver);
-+
-+MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers");
-+MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
-+MODULE_LICENSE("GPL");
+++ /dev/null
-From 302f69453721e5ee19f583339a3a646821d4a173 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 20 Feb 2015 23:58:54 +0100
-Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_common.c | 2 +
- arch/mips/bcm63xx/gpio.c | 145 ++++++++++------------------------------------
- arch/mips/bcm63xx/setup.c | 3 -
- 3 files changed, 32 insertions(+), 118 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -188,6 +188,8 @@ int __init board_register_devices(void)
- }
- #endif
-
-+ bcm63xx_gpio_init();
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -5,147 +5,62 @@
- *
- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
-+ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
- */
-
- #include <linux/kernel.h>
- #include <linux/init.h>
--#include <linux/spinlock.h>
- #include <linux/platform_device.h>
- #include <linux/gpio/driver.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_gpio.h>
--#include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-
--static u32 gpio_out_low_reg;
--
--static void bcm63xx_gpio_out_low_reg_init(void)
-+static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
- {
-- switch (bcm63xx_get_cpu_id()) {
-- case BCM6345_CPU_ID:
-- gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
-- break;
-- default:
-- gpio_out_low_reg = GPIO_DATA_LO_REG;
-- break;
-- }
--}
--
--static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
--static u32 gpio_out_low, gpio_out_high;
-+ struct resource res[2];
-+ struct bgpio_pdata pdata;
-
--static void bcm63xx_gpio_set(struct gpio_chip *chip,
-- unsigned gpio, int val)
--{
-- u32 reg;
-- u32 mask;
-- u32 *v;
-- unsigned long flags;
--
-- if (gpio >= chip->ngpio)
-- BUG();
--
-- if (gpio < 32) {
-- reg = gpio_out_low_reg;
-- mask = 1 << gpio;
-- v = &gpio_out_low;
-- } else {
-- reg = GPIO_DATA_HI_REG;
-- mask = 1 << (gpio - 32);
-- v = &gpio_out_high;
-- }
--
-- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
-- if (val)
-- *v |= mask;
-- else
-- *v &= ~mask;
-- bcm_gpio_writel(*v, reg);
-- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
--}
-+ memset(res, 0, sizeof(res));
-+ memset(&pdata, 0, sizeof(pdata));
-
--static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
--{
-- u32 reg;
-- u32 mask;
-+ res[0].flags = IORESOURCE_MEM;
-+ res[0].start = bcm63xx_regset_address(RSET_GPIO);
-+ res[0].start += dir;
-
-- if (gpio >= chip->ngpio)
-- BUG();
-+ res[0].end = res[0].start + 3;
-
-- if (gpio < 32) {
-- reg = gpio_out_low_reg;
-- mask = 1 << gpio;
-- } else {
-- reg = GPIO_DATA_HI_REG;
-- mask = 1 << (gpio - 32);
-- }
-+ res[1].flags = IORESOURCE_MEM;
-+ res[1].start = bcm63xx_regset_address(RSET_GPIO);
-+ res[1].start += data;
-
-- return !!(bcm_gpio_readl(reg) & mask);
--}
-+ res[1].end = res[1].start + 3;
-
--static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
-- unsigned gpio, int dir)
--{
-- u32 reg;
-- u32 mask;
-- u32 tmp;
-- unsigned long flags;
--
-- if (gpio >= chip->ngpio)
-- BUG();
--
-- if (gpio < 32) {
-- reg = GPIO_CTL_LO_REG;
-- mask = 1 << gpio;
-- } else {
-- reg = GPIO_CTL_HI_REG;
-- mask = 1 << (gpio - 32);
-- }
--
-- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
-- tmp = bcm_gpio_readl(reg);
-- if (dir == BCM63XX_GPIO_DIR_IN)
-- tmp &= ~mask;
-- else
-- tmp |= mask;
-- bcm_gpio_writel(tmp, reg);
-- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
-+ pdata.base = id * 32;
-+ pdata.ngpio = ngpio;
-
-- return 0;
-+ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
-+ &pdata, sizeof(pdata));
- }
-
--static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
-+int __init bcm63xx_gpio_init(void)
- {
-- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
--}
-+ int ngpio = bcm63xx_gpio_count();
-+ int data_low_reg;
-
--static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
-- unsigned gpio, int value)
--{
-- bcm63xx_gpio_set(chip, gpio, value);
-- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
--}
-+ if (BCMCPU_IS_6345())
-+ data_low_reg = GPIO_DATA_LO_REG_6345;
-+ else
-+ data_low_reg = GPIO_DATA_LO_REG;
-
-+ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
-
--static struct gpio_chip bcm63xx_gpio_chip = {
-- .label = "bcm63xx-gpio",
-- .direction_input = bcm63xx_gpio_direction_input,
-- .direction_output = bcm63xx_gpio_direction_output,
-- .get = bcm63xx_gpio_get,
-- .set = bcm63xx_gpio_set,
-- .base = 0,
--};
-+ if (ngpio <= 32)
-+ return 0;
-
--int __init bcm63xx_gpio_init(void)
--{
-- bcm63xx_gpio_out_low_reg_init();
-+ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
-
-- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
-- if (!BCMCPU_IS_6345())
-- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
-- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
-- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
-+ return 0;
-
-- return gpiochip_add_data(&bcm63xx_gpio_chip, NULL);
- }
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
-
- int __init bcm63xx_register_devices(void)
- {
-- /* register gpiochip */
-- bcm63xx_gpio_init();
--
- return board_register_devices();
- }
-
+++ /dev/null
-From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Feb 2015 17:21:59 +0100
-Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio
-
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 7 +++--
- arch/mips/bcm63xx/gpio.c | 32 ++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 ++
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 5 +--
- 5 files changed, 42 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -55,7 +55,7 @@ static struct board_info __initdata boar
- },
-
- .ephy_reset_gpio = 36,
-- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
- #endif
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -247,9 +247,10 @@ int __init board_register_devices(void)
-
- platform_device_register(&bcm63xx_gpio_leds);
-
-- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-- gpio_request_one(board.ephy_reset_gpio,
-- board.ephy_reset_gpio_flags, "ephy-reset");
-+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) {
-+ bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio,
-+ board.ephy_reset_gpio_flags);
-+ }
-
- return 0;
- }
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -8,15 +8,23 @@
- * Copyright (C) Jonas Gorski <jogo@openwrt.org>
- */
-
-+#include <asm/addrspace.h>
-+
- #include <linux/kernel.h>
- #include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/gpio/driver.h>
-+#include <linux/gpio/machine.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_regs.h>
-
-+static const char * const gpio_chip_labels[] = {
-+ "bcm63xx-gpio.0",
-+ "bcm63xx-gpio.1",
-+};
-+
- static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
- {
- struct resource res[2];
-@@ -64,3 +72,25 @@ int __init bcm63xx_gpio_init(void)
- return 0;
-
- }
-+
-+static struct gpiod_lookup_table ephy_reset = {
-+ .dev_id = "bcm63xx_enet-0",
-+ .table = {
-+ { /* filled at runtime */ },
-+ { },
-+ },
-+};
-+
-+
-+void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags)
-+{
-+ if (ephy_reset.table[0].chip_label)
-+ return;
-+
-+ ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32];
-+ ephy_reset.table[0].chip_hwnum = hw_gpio % 32;
-+ ephy_reset.table[0].con_id = "reset";
-+ ephy_reset.table[0].flags = flags;
-+
-+ gpiod_add_lookup_table(&ephy_reset);
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -3,9 +3,11 @@
- #define BCM63XX_GPIO_H
-
- #include <linux/init.h>
-+#include <linux/gpio/machine.h>
- #include <bcm63xx_cpu.h>
-
- int __init bcm63xx_gpio_init(void);
-+void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags);
-
- static inline unsigned long bcm63xx_gpio_count(void)
- {
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -4,6 +4,7 @@
-
- #include <linux/types.h>
- #include <linux/gpio.h>
-+#include <linux/gpio/machine.h>
- #include <linux/leds.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -50,8 +51,8 @@ struct board_info {
- /* External PHY reset GPIO */
- unsigned int ephy_reset_gpio;
-
-- /* External PHY reset GPIO flags from gpio.h */
-- unsigned long ephy_reset_gpio_flags;
-+ /* External PHY reset GPIO flags from gpio/machine.h */
-+ enum gpio_lookup_flags ephy_reset_gpio_flags;
-
- /* fallback sprom config */
- struct fallback_sprom_data fallback_sprom;
+++ /dev/null
-From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Feb 2015 17:26:50 +0100
-Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if
-present in dtb
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/gpio.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -20,6 +20,8 @@
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_regs.h>
-
-+#include "boards/board_common.h"
-+
- static const char * const gpio_chip_labels[] = {
- "bcm63xx-gpio.0",
- "bcm63xx-gpio.1",
-@@ -48,8 +50,10 @@ static void __init bcm63xx_gpio_init_one
- pdata.base = id * 32;
- pdata.ngpio = ngpio;
-
-- platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
-- &pdata, sizeof(pdata));
-+ if (!board_of_device_present("gpio0") &&
-+ !board_of_device_present("pinctrl"))
-+ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res,
-+ 2, &pdata, sizeof(pdata));
- }
-
- int __init bcm63xx_gpio_init(void)
+++ /dev/null
-From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 25 Mar 2015 13:52:02 +0100
-Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia
- ready gpio
-
-To prepare for a time when gpiobases don't need to be fixed anymore.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-pcmcia.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-pcmcia.c
-+++ b/arch/mips/bcm63xx/dev-pcmcia.c
-@@ -10,6 +10,7 @@
- #include <linux/kernel.h>
- #include <asm/bootinfo.h>
- #include <linux/platform_device.h>
-+#include <linux/gpio/machine.h>
- #include <bcm63xx_cs.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_pcmcia.h>
-@@ -101,6 +102,14 @@ static const struct {
- },
- };
-
-+static struct gpiod_lookup_table pcmcia_gpios_table = {
-+ .dev_id = "bcm63xx_pcmcia.0",
-+ .table = {
-+ GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH),
-+ { },
-+ },
-+};
-+
- int __init bcm63xx_pcmcia_register(void)
- {
- int ret, i;
-@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void)
- switch (bcm63xx_get_cpu_id()) {
- case BCM6348_CPU_ID:
- pd.ready_gpio = 22;
-+ pcmcia_gpios_table.table[0].chip_hwnum = 22;
- break;
-
- case BCM6358_CPU_ID:
- pd.ready_gpio = 18;
-+ pcmcia_gpios_table.table[0].chip_hwnum = 18;
- break;
-
- default:
- return -ENODEV;
- }
-
-+ gpiod_add_lookup_table(&pcmcia_gpios_table);
-+
- pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
- pcmcia_resources[0].end = pcmcia_resources[0].start +
- RSET_PCMCIA_SIZE - 1;
+++ /dev/null
-From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 25 Mar 2015 13:54:56 +0100
-Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio
-
-Use the new named gpio instead of relying on the hardware gpio numbers
-matching the virtual gpio numbers.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/pcmcia/bcm63xx_pcmcia.c | 9 ++++++++-
- drivers/pcmcia/bcm63xx_pcmcia.h | 4 ++++
- 2 files changed, 12 insertions(+), 1 deletion(-)
-
---- a/drivers/pcmcia/bcm63xx_pcmcia.c
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.c
-@@ -237,7 +237,7 @@ static unsigned int __get_socket_status(
- stat |= SS_XVCARD;
- stat |= SS_POWERON;
-
-- if (gpio_get_value(skt->pd->ready_gpio))
-+ if (gpiod_get_value(skt->ready_gpio))
- stat |= SS_READY;
-
- return stat;
-@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru
- goto err;
- }
-
-+ /* get ready gpio */
-+ skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN);
-+ if (IS_ERR(skt->ready_gpio)) {
-+ ret = PTR_ERR(skt->ready_gpio);
-+ goto err;
-+ }
-+
- /* resources are static */
- sock->resource_ops = &pccard_static_ops;
- sock->ops = &bcm63xx_pcmcia_operations;
---- a/drivers/pcmcia/bcm63xx_pcmcia.h
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.h
-@@ -4,6 +4,7 @@
-
- #include <linux/types.h>
- #include <linux/timer.h>
-+#include <linux/gpio/consumer.h>
- #include <pcmcia/ss.h>
- #include <bcm63xx_dev_pcmcia.h>
-
-@@ -56,6 +57,9 @@ struct bcm63xx_pcmcia_socket {
-
- /* base address of io memory */
- void __iomem *io_base;
-+
-+ /* ready gpio */
-+ struct gpio_desc *ready_gpio;
- };
-
- #endif /* BCM63XX_PCMCIA_H_ */
+++ /dev/null
-From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:38:05 +0200
-Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6318 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6318 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6318-pinctrl".
-+- regs: Register specifiers of dirout, dat, mode, mux, and pad registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux", "pad".
-+- gpio-controller: Identifies this node as a gpio controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6318-pinctrl";
-+ reg = <0x10000080 0x08>,
-+ <0x10000088 0x08>,
-+ <0x10000098 0x04>,
-+ <0x1000009c 0x0c>,
-+ <0x100000d4 0x18>;
-+ reg-names = "dirout", "dat", "mode", "mux", "pad";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, ephy0_spd_led
-+gpio1 1 led, ephy1_spd_led
-+gpio2 2 led, ephy2_spd_led
-+gpio3 3 led, ephy3_spd_led
-+gpio4 4 led, ephy0_act_led
-+gpio5 5 led, ephy1_act_led
-+gpio6 6 led, ephy2_act_led, serial_led_data
-+gpio7 7 led, ephy3_act_led, serial_led_clk
-+gpio8 8 led, inet_act_led
-+gpio9 9 led, inet_fail_led
-+gpio10 10 led, dsl_led
-+gpio11 11 led, post_fail_led
-+gpio12 12 led, wlan_wps_led
-+gpio13 13 led, usb_pwron, usb_device_led
-+gpio14 14 led
-+gpio15 15 led
-+gpio16 16 led
-+gpio17 17 led
-+gpio18 18 led
-+gpio19 19 led
-+gpio20 20 led
-+gpio21 21 led
-+gpio22 22 led
-+gpio23 23 led
-+gpio24 24 -
-+gpio25 25 -
-+gpio26 26 -
-+gpio27 27 -
-+gpio28 28 -
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+gpio32 32 -
-+gpio33 33 -
-+gpio34 34 -
-+gpio35 35 -
-+gpio36 36 -
-+gpio37 37 -
-+gpio38 38 -
-+gpio39 39 -
-+gpio40 40 usb_active
-+gpio41 41 -
-+gpio42 42 -
-+gpio43 43 -
-+gpio44 44 -
-+gpio45 45 -
-+gpio46 46 -
-+gpio47 47 -
-+gpio48 48 -
-+gpio49 49 -
+++ /dev/null
-From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:20:39 +0200
-Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
-
-Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
-to different functions. BCM6318 is similar to BCM6328 with the addition
-of a pad register, and the GPIO meaning of the mux register changes
-based on the GPIO number.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
- 3 files changed, 572 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX
- bool
- select GPIO_GENERIC
-
-+config PINCTRL_BCM6318
-+ bool "BCM6318 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+
- config PINCTRL_BCM6328
- bool "BCM6328 pincontrol driver" if COMPILE_TEST
- select PINMUX
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,4 +1,5 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
-@@ -0,0 +1,564 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6318_NGPIO 50
-+
-+struct bcm6318_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6318_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned mode_val:1;
-+ unsigned mux_val:2;
-+};
-+
-+struct bcm6318_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ void __iomem *mux[3];
-+ void __iomem *pad[6];
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+static const struct pinctrl_pin_desc bcm6318_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+ PINCTRL_PIN(48, "gpio48"),
-+ PINCTRL_PIN(49, "gpio49"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+static unsigned gpio48_pins[] = { 48 };
-+static unsigned gpio49_pins[] = { 49 };
-+
-+#define BCM6318_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6318_pingroup bcm6318_groups[] = {
-+ BCM6318_GROUP(gpio0),
-+ BCM6318_GROUP(gpio1),
-+ BCM6318_GROUP(gpio2),
-+ BCM6318_GROUP(gpio3),
-+ BCM6318_GROUP(gpio4),
-+ BCM6318_GROUP(gpio5),
-+ BCM6318_GROUP(gpio6),
-+ BCM6318_GROUP(gpio7),
-+ BCM6318_GROUP(gpio8),
-+ BCM6318_GROUP(gpio9),
-+ BCM6318_GROUP(gpio10),
-+ BCM6318_GROUP(gpio11),
-+ BCM6318_GROUP(gpio12),
-+ BCM6318_GROUP(gpio13),
-+ BCM6318_GROUP(gpio14),
-+ BCM6318_GROUP(gpio15),
-+ BCM6318_GROUP(gpio16),
-+ BCM6318_GROUP(gpio17),
-+ BCM6318_GROUP(gpio18),
-+ BCM6318_GROUP(gpio19),
-+ BCM6318_GROUP(gpio20),
-+ BCM6318_GROUP(gpio21),
-+ BCM6318_GROUP(gpio22),
-+ BCM6318_GROUP(gpio23),
-+ BCM6318_GROUP(gpio24),
-+ BCM6318_GROUP(gpio25),
-+ BCM6318_GROUP(gpio26),
-+ BCM6318_GROUP(gpio27),
-+ BCM6318_GROUP(gpio28),
-+ BCM6318_GROUP(gpio29),
-+ BCM6318_GROUP(gpio30),
-+ BCM6318_GROUP(gpio31),
-+ BCM6318_GROUP(gpio32),
-+ BCM6318_GROUP(gpio33),
-+ BCM6318_GROUP(gpio34),
-+ BCM6318_GROUP(gpio35),
-+ BCM6318_GROUP(gpio36),
-+ BCM6318_GROUP(gpio37),
-+ BCM6318_GROUP(gpio38),
-+ BCM6318_GROUP(gpio39),
-+ BCM6318_GROUP(gpio40),
-+ BCM6318_GROUP(gpio41),
-+ BCM6318_GROUP(gpio42),
-+ BCM6318_GROUP(gpio43),
-+ BCM6318_GROUP(gpio44),
-+ BCM6318_GROUP(gpio45),
-+ BCM6318_GROUP(gpio46),
-+ BCM6318_GROUP(gpio47),
-+ BCM6318_GROUP(gpio48),
-+ BCM6318_GROUP(gpio49),
-+};
-+
-+/* GPIO_MODE */
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+/* PINMUX_SEL */
-+static const char * const ephy0_spd_led_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const ephy1_spd_led_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const ephy2_spd_led_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const ephy3_spd_led_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const ephy0_act_led_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const ephy1_act_led_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const ephy2_act_led_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const ephy3_act_led_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_act_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const inet_fail_led_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const dsl_led_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const post_fail_led_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const wlan_wps_led_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const usb_pwron_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_active_groups[] = {
-+ "gpio40",
-+};
-+
-+#define BCM6318_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mode_val = 1, \
-+ }
-+
-+#define BCM6318_MUX_FUN(n, mux) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mux_val = mux, \
-+ }
-+
-+static const struct bcm6318_function bcm6318_funcs[] = {
-+ BCM6318_MODE_FUN(led),
-+ BCM6318_MUX_FUN(ephy0_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy1_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy2_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy3_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy0_act_led, 1),
-+ BCM6318_MUX_FUN(ephy1_act_led, 1),
-+ BCM6318_MUX_FUN(ephy2_act_led, 1),
-+ BCM6318_MUX_FUN(ephy3_act_led, 1),
-+ BCM6318_MUX_FUN(serial_led_data, 3),
-+ BCM6318_MUX_FUN(serial_led_clk, 3),
-+ BCM6318_MUX_FUN(inet_act_led, 1),
-+ BCM6318_MUX_FUN(inet_fail_led, 1),
-+ BCM6318_MUX_FUN(dsl_led, 1),
-+ BCM6318_MUX_FUN(post_fail_led, 1),
-+ BCM6318_MUX_FUN(wlan_wps_led, 1),
-+ BCM6318_MUX_FUN(usb_pwron, 1),
-+ BCM6318_MUX_FUN(usb_device_led, 2),
-+ BCM6318_MUX_FUN(usb_active, 2),
-+};
-+
-+static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6318_groups);
-+}
-+
-+static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6318_groups[group].name;
-+}
-+
-+static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6318_groups[group].pins;
-+ *num_pins = bcm6318_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6318_funcs);
-+}
-+
-+static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6318_funcs[selector].name;
-+}
-+
-+static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6318_funcs[selector].groups;
-+ *num_groups = bcm6318_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
-+ u32 mode, u32 mux)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (pin < 32) {
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~BIT(pin);
-+ if (mode)
-+ reg |= BIT(pin);
-+ __raw_writel(reg, pctl->mode);
-+ }
-+
-+ if (pin < 48) {
-+ reg = __raw_readl(pctl->mux[pin / 16]);
-+ reg &= ~(3UL << ((pin % 16) * 2));
-+ reg |= mux << ((pin % 16) * 2);
-+ __raw_writel(reg, pctl->mux[pin / 16]);
-+ }
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ reg = __raw_readl(pctl->pad[pin / 8]);
-+ reg &= ~(0xfUL << ((pin % 8) * 4));
-+ reg |= val << ((pin % 8) * 4);
-+ __raw_writel(reg, pctl->pad[pin / 8]);
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
-+ const struct bcm6318_function *f = &bcm6318_funcs[selector];
-+
-+ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
-+
-+ return 0;
-+}
-+
-+static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ if (offset < 13) {
-+ /* GPIOs 0-12 use mux 0 as GPIO function */
-+ bcm6318_rmw_mux(pctl, offset, 0, 0);
-+ } else if (offset < 42) {
-+ /* GPIOs 13-41 use mux 3 as GPIO function */
-+ bcm6318_rmw_mux(pctl, offset, 0, 3);
-+
-+ /* FIXME: revert to old value for non gpio? */
-+ bcm6318_set_pad(pctl, offset, 0);
-+ } else {
-+ /* no idea, really */
-+ }
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6318_pctl_ops = {
-+ .get_groups_count = bcm6318_pinctrl_get_group_count,
-+ .get_group_name = bcm6318_pinctrl_get_group_name,
-+ .get_group_pins = bcm6318_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6318_pmx_ops = {
-+ .get_functions_count = bcm6318_pinctrl_get_func_count,
-+ .get_function_name = bcm6318_pinctrl_get_func_name,
-+ .get_function_groups = bcm6318_pinctrl_get_groups,
-+ .set_mux = bcm6318_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6318_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6318_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6318_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode, *mux, *pad;
-+ unsigned i;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+ mux = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mux))
-+ return PTR_ERR(mux);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
-+ pad = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(pad))
-+ return PTR_ERR(pad);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ for (i = 0; i < 3; i++)
-+ pctl->mux[i] = mux + (i * 4);
-+
-+ for (i = 0; i < 6; i++)
-+ pctl->pad[i] = pad + (i * 4);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6318_pctl_ops;
-+ pctl->desc.pmxops = &bcm6318_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
-+ pctl->desc.pins = bcm6318_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6318_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6318_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6318-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6318_pinctrl_driver = {
-+ .probe = bcm6318_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6318-pinctrl",
-+ .of_match_table = bcm6318_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6318_pinctrl_driver);
+++ /dev/null
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -25,6 +25,8 @@ config BCM63XX_CPU_6318
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6318
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
-@@ -32,6 +34,8 @@ config BCM63XX_CPU_6328
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6328
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -47,6 +51,8 @@ config BCM63XX_CPU_6348
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6348
-
- config BCM63XX_CPU_6358
- bool "support 6358 CPU"
-@@ -54,6 +60,8 @@ config BCM63XX_CPU_6358
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6358
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
-@@ -61,6 +69,8 @@ config BCM63XX_CPU_6362
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6362
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
-@@ -68,6 +78,8 @@ config BCM63XX_CPU_6368
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6368
-
- config BCM63XX_CPU_63268
- bool "support 63268 CPU"
-@@ -75,6 +87,8 @@ config BCM63XX_CPU_63268
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM63268
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 31 Jul 2017 20:10:36 +0200
-Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
-
----
- arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -489,6 +489,8 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -505,7 +507,9 @@ static struct clk_lookup bcm6318_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -519,7 +523,10 @@ static struct clk_lookup bcm6328_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -532,6 +539,7 @@ static struct clk_lookup bcm6338_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -546,6 +554,7 @@ static struct clk_lookup bcm6345_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -560,6 +569,7 @@ static struct clk_lookup bcm6348_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -576,6 +586,8 @@ static struct clk_lookup bcm6358_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -595,7 +607,10 @@ static struct clk_lookup bcm6362_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -611,6 +626,8 @@ static struct clk_lookup bcm6368_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -625,7 +642,10 @@ static struct clk_lookup bcm63268_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+++ /dev/null
-From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 4 Feb 2017 12:58:50 +0100
-Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers
-
-We now register them through DT, so no need to keep them here.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 -------
- 1 file changed, 7 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -27,9 +27,7 @@
- #include <bcm63xx_dev_pci.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_flash.h>
--#include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
--#include <bcm63xx_dev_spi.h>
- #include <bcm63xx_dev_usb_ehci.h>
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -236,10 +234,6 @@ int __init board_register_devices(void)
- bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
- pr_err(PFX "failed to register fallback SPROM\n");
-
-- bcm63xx_spi_register();
--
-- bcm63xx_hsspi_register();
--
- bcm63xx_flash_register();
-
- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- # SPDX-License-Identifier: GPL-2.0
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
-- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-+ dev-rng.o dev-uart.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
- sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ /dev/null
-@@ -1,48 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/platform_device.h>
--
--#include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_hsspi.h>
--#include <bcm63xx_regs.h>
--
--static struct resource spi_resources[] = {
-- {
-- .start = -1, /* filled at runtime */
-- .end = -1, /* filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- .start = -1, /* filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_hsspi_device = {
-- .name = "bcm63xx-hsspi",
-- .id = 0,
-- .num_resources = ARRAY_SIZE(spi_resources),
-- .resource = spi_resources,
--};
--
--int __init bcm63xx_hsspi_register(void)
--{
-- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-- !BCMCPU_IS_63268())
-- return -ENODEV;
--
-- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
-- spi_resources[0].end = spi_resources[0].start;
-- spi_resources[0].end += RSET_HSSPI_SIZE - 1;
-- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
--
-- return platform_device_register(&bcm63xx_hsspi_device);
--}
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ /dev/null
-@@ -1,60 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
-- * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/export.h>
--#include <linux/platform_device.h>
--#include <linux/err.h>
--#include <linux/clk.h>
--
--#include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_spi.h>
--#include <bcm63xx_regs.h>
--
--static struct resource spi_resources[] = {
-- {
-- .start = -1, /* filled at runtime */
-- .end = -1, /* filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- .start = -1, /* filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_spi_device = {
-- .id = -1,
-- .num_resources = ARRAY_SIZE(spi_resources),
-- .resource = spi_resources,
--};
--
--int __init bcm63xx_spi_register(void)
--{
-- if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
-- return -ENODEV;
--
-- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
-- spi_resources[0].end = spi_resources[0].start;
-- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
--
-- if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
-- bcm63xx_spi_device.name = "bcm6348-spi",
-- spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1;
-- }
--
-- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
-- BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
-- bcm63xx_spi_device.name = "bcm6358-spi",
-- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
-- }
--
-- return platform_device_register(&bcm63xx_spi_device);
--}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
-+++ /dev/null
-@@ -1,9 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 */
--#ifndef BCM63XX_DEV_HSSPI_H
--#define BCM63XX_DEV_HSSPI_H
--
--#include <linux/types.h>
--
--int bcm63xx_hsspi_register(void);
--
--#endif /* BCM63XX_DEV_HSSPI_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- # SPDX-License-Identifier: GPL-2.0
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
-- dev-rng.o dev-uart.o dev-wdt.o \
-+ dev-rng.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
- sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
---- a/arch/mips/bcm63xx/dev-uart.c
-+++ /dev/null
-@@ -1,76 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/platform_device.h>
--#include <bcm63xx_cpu.h>
--
--static struct resource uart0_resources[] = {
-- {
-- /* start & end filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- /* start filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct resource uart1_resources[] = {
-- {
-- /* start & end filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- /* start filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_uart_devices[] = {
-- {
-- .name = "bcm63xx_uart",
-- .id = 0,
-- .num_resources = ARRAY_SIZE(uart0_resources),
-- .resource = uart0_resources,
-- },
--
-- {
-- .name = "bcm63xx_uart",
-- .id = 1,
-- .num_resources = ARRAY_SIZE(uart1_resources),
-- .resource = uart1_resources,
-- }
--};
--
--int __init bcm63xx_uart_register(unsigned int id)
--{
-- if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
-- return -ENODEV;
--
-- if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() &&
-- !BCMCPU_IS_6368()))
-- return -ENODEV;
--
-- if (id == 0) {
-- uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0);
-- uart0_resources[0].end = uart0_resources[0].start +
-- RSET_UART_SIZE - 1;
-- uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
-- }
--
-- if (id == 1) {
-- uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1);
-- uart1_resources[0].end = uart1_resources[0].start +
-- RSET_UART_SIZE - 1;
-- uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1);
-- }
--
-- return platform_device_register(&bcm63xx_uart_devices[id]);
--}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
-+++ /dev/null
-@@ -1,7 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 */
--#ifndef BCM63XX_DEV_UART_H_
--#define BCM63XX_DEV_UART_H_
--
--int bcm63xx_uart_register(unsigned int id);
--
--#endif /* BCM63XX_DEV_UART_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -32,8 +32,6 @@ struct board_info {
- unsigned int has_ohci0:1;
- unsigned int has_ehci0:1;
- unsigned int has_usbd:1;
-- unsigned int has_uart0:1;
-- unsigned int has_uart1:1;
- unsigned int use_fallback_sprom:1;
-
- /* ethernet config */
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -20,7 +20,6 @@
- #include <asm/prom.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_gpio.h>
-@@ -188,12 +187,6 @@ int __init board_register_devices(void)
-
- bcm63xx_gpio_init();
-
-- if (board.has_uart0)
-- bcm63xx_uart_register(0);
--
-- if (board.has_uart1)
-- bcm63xx_uart_register(1);
--
- if (board.has_pccard)
- bcm63xx_pcmcia_register();
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -35,9 +35,6 @@ static struct board_info __initdata boar
- .name = "CVG834G_E15R3921",
- .expected_cpu_id = 0x3368,
-
-- .has_uart0 = 1,
-- .has_uart1 = 1,
--
- .has_enet0 = 1,
- .has_pci = 1,
-
-@@ -67,7 +64,6 @@ static struct board_info __initdata boar
- .name = "96328avng",
- .expected_cpu_id = 0x6328,
-
-- .has_uart0 = 1,
- .has_pci = 1,
- .has_usbd = 0,
- .use_fallback_sprom = 1,
-@@ -116,7 +112,6 @@ static struct board_info __initdata boar
- .name = "96338GW",
- .expected_cpu_id = 0x6338,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .enet0 = {
- .force_speed_100 = 1,
-@@ -159,7 +154,6 @@ static struct board_info __initdata boar
- .name = "96338W",
- .expected_cpu_id = 0x6338,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .enet0 = {
- .force_speed_100 = 1,
-@@ -204,8 +198,6 @@ static struct board_info __initdata boar
- static struct board_info __initdata board_96345gw2 = {
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
--
-- .has_uart0 = 1,
- };
- #endif
-
-@@ -217,7 +209,6 @@ static struct board_info __initdata boar
- .name = "96348R",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_pci = 1,
- .use_fallback_sprom = 1,
-@@ -262,7 +253,6 @@ static struct board_info __initdata boar
- .name = "96348GW-10",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -315,7 +305,6 @@ static struct board_info __initdata boar
- .name = "96348GW-11",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -370,7 +359,6 @@ static struct board_info __initdata boar
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -421,7 +409,6 @@ static struct board_info __initdata boar
- .name = "F@ST2404",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -466,7 +453,6 @@ static struct board_info __initdata boar
- .name = "DV201AMR",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_pci = 1,
- .use_fallback_sprom = 1,
- .has_ohci0 = 1,
-@@ -487,7 +473,6 @@ static struct board_info __initdata boar
- .name = "96348GW-A",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -514,7 +499,6 @@ static struct board_info __initdata boar
- .name = "96358VW",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -567,7 +551,6 @@ static struct board_info __initdata boar
- .name = "96358VW2",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -617,7 +600,6 @@ static struct board_info __initdata boar
- .name = "AGPF-S0",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
+++ /dev/null
-From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Feb 2015 17:52:32 +0100
-Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 262 -----------------------------
- 1 file changed, 262 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -43,14 +43,6 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
-
-- .leds = {
-- {
-- .name = "CVG834G:green:power",
-- .gpio = 37,
-- .default_trigger= "default-on",
-- },
-- },
--
- .ephy_reset_gpio = 36,
- .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
-@@ -72,35 +64,6 @@ static struct board_info __initdata boar
- .use_fullspeed = 0,
- .port_no = 0,
- },
--
-- .leds = {
-- {
-- .name = "96328avng::ppp-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::power",
-- .gpio = 4,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "96328avng::power-fail",
-- .gpio = 8,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::wps",
-- .gpio = 9,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::ppp",
-- .gpio = 11,
-- .active_low = 1,
-- },
-- },
- };
- #endif
-
-@@ -119,35 +82,6 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ses",
-- .gpio = 5,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- }
-- },
- };
-
- static struct board_info __initdata board_96338w = {
-@@ -159,35 +93,6 @@ static struct board_info __initdata boar
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ses",
-- .gpio = 5,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
- #endif
-
-@@ -217,36 +122,6 @@ static struct board_info __initdata boar
- .has_phy = 1,
- .use_internal_phy = 1,
- },
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
--
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw_10 = {
-@@ -270,35 +145,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw_11 = {
-@@ -324,35 +170,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw = {
-@@ -374,35 +191,6 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_FAST2404 = {
-@@ -518,33 +306,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 15,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 22,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 23,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 4,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 5,
-- },
-- },
- };
-
- static struct board_info __initdata board_96358vw2 = {
-@@ -571,29 +332,6 @@ static struct board_info __initdata boar
- .has_pccard = 1,
- .has_ehci0 = 1,
- .num_usbh_ports = 2,
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 22,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 23,
-- },
-- {
-- .name = "power",
-- .gpio = 5,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_AGPFS0 = {
+++ /dev/null
-From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
-From: Axel Gembe <ago@bastart.eu.org>
-Date: Mon, 12 May 2008 18:54:09 +0200
-Subject: [PATCH] bcm963xx: flashmap support
-
-Signed-off-by: Axel Gembe <ago@bastart.eu.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +----------------
- drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++----
- drivers/mtd/redboot.c | 13 +++++++++--
- 3 files changed, 38 insertions(+), 26 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio
- }
- };
-
--static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
-+static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
-
- static struct physmap_flash_data flash_data = {
- .width = 2,
---- a/drivers/mtd/redboot.c
-+++ b/drivers/mtd/redboot.c
-@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru
- int nulllen = 0;
- int numslots;
- unsigned long offset;
-+ unsigned long fis_origin = 0;
- #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
- static char nullstring[] = "unallocated";
- #endif
-@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru
- goto out;
- }
-
-+ if (data && data->origin) {
-+ fis_origin = data->origin;
-+ } else {
-+ for (i = 0; i < numslots; i++) {
-+ if (!strncmp(buf[i].name, "RedBoot", 8)) {
-+ fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
-+ }
-+ }
-+ }
-+
- for (i = 0; i < numslots; i++) {
- struct fis_list *new_fl, **prev;
-
-@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru
- goto out;
- }
- new_fl->img = &buf[i];
-- if (data && data->origin)
-- buf[i].flash_base -= data->origin;
-- else
-- buf[i].flash_base &= master->size-1;
-+ if (fis_origin)
-+ buf[i].flash_base -= fis_origin;
-+
-+ buf[i].flash_base &= (master->size << 1) - 1;
-
- /* I'm sure the JFFS2 code has done me permanent damage.
- * I now think the following is _normal_
+++ /dev/null
---- a/include/linux/bcm963xx_tag.h
-+++ b/include/linux/bcm963xx_tag.h
-@@ -92,8 +92,10 @@ struct bcm_tag {
- __u32 rootfs_crc;
- /* 224-227: CRC32 of kernel partition */
- __u32 kernel_crc;
-- /* 228-235: Unused at present */
-- char reserved1[8];
-+ /* 228-231: Unused at present */
-+ char reserved1[4];
-+ /* 222-235: Openwrt: real rootfs length */
-+ __u32 real_rootfs_length;
- /* 236-239: CRC32 of header excluding last 20 bytes */
- __u32 header_crc;
- /* 240-255: Unused at present */
---- a/drivers/mtd/parsers/parser_imagetag.c
-+++ b/drivers/mtd/parsers/parser_imagetag.c
-@@ -137,7 +137,8 @@ static int bcm963xx_parse_imagetag_parti
- } else {
- /* OpenWrt layout */
- rootfsaddr = kerneladdr + kernellen;
-- rootfslen = spareaddr - rootfsaddr;
-+ rootfslen = buf->real_rootfs_length;
-+ spareaddr = rootfsaddr + rootfslen;
- }
- } else {
- goto out;
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1637,7 +1637,7 @@ static int bcm_enet_change_mtu(struct ne
- return -EBUSY;
-
- /* add ethernet header + vlan tag size */
-- actual_mtu += VLAN_ETH_HLEN;
-+ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
-
- /*
- * setup maximum size before we get overflow mark in
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -97,6 +97,8 @@ void __init board_early_setup(const stru
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G3_EXT_MII |
- GPIO_MODE_6348_G0_EXT_MII;
-+ else if (BCMCPU_IS_6358())
-+ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
- }
-
- bcm_gpio_writel(val, GPIO_MODE_REG);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -652,6 +652,8 @@
- #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
- #define GPIO_MODE_6358_SERIAL_LED (1 << 10)
- #define GPIO_MODE_6358_UTOPIA (1 << 12)
-+#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
-+#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
-
- #define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0)
- #define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1)
+++ /dev/null
-From 7fa63fdde703aaabaa7199ae879219737a98a3f3 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 6 Jan 2012 12:24:18 +0100
-Subject: [PATCH] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
-
-Only connect/disconnect the phy during probe and remove, not during any
-open/close. The phy seldom changes during the runtime, and disconnecting
-the phy during close will prevent it from keeping any configuration over
-a down/up cycle.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 158 +++++++++++++--------------
- 1 file changed, 78 insertions(+), 80 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -870,10 +870,8 @@ static int bcm_enet_open(struct net_devi
- struct bcm_enet_priv *priv;
- struct sockaddr addr;
- struct device *kdev;
-- struct phy_device *phydev;
- int i, ret;
- unsigned int size;
-- char phy_id[MII_BUS_ID_SIZE + 3];
- void *p;
- u32 val;
-
-@@ -881,40 +879,10 @@ static int bcm_enet_open(struct net_devi
- kdev = &priv->pdev->dev;
-
- if (priv->has_phy) {
-- /* connect to PHY */
-- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
-- priv->mii_bus->id, priv->phy_id);
--
-- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
-- PHY_INTERFACE_MODE_MII);
--
-- if (IS_ERR(phydev)) {
-- dev_err(kdev, "could not attach to PHY\n");
-- return PTR_ERR(phydev);
-- }
--
-- /* mask with MAC supported features */
-- phydev->supported &= (SUPPORTED_10baseT_Half |
-- SUPPORTED_10baseT_Full |
-- SUPPORTED_100baseT_Half |
-- SUPPORTED_100baseT_Full |
-- SUPPORTED_Autoneg |
-- SUPPORTED_Pause |
-- SUPPORTED_MII);
-- phydev->advertising = phydev->supported;
--
-- if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
-- phydev->advertising |= SUPPORTED_Pause;
-- else
-- phydev->advertising &= ~SUPPORTED_Pause;
--
-- phy_attached_info(phydev);
--
-+ /* Reset state */
- priv->old_link = 0;
- priv->old_duplex = -1;
- priv->old_pause = -1;
-- } else {
-- phydev = NULL;
- }
-
- /* mask all interrupts and request them */
-@@ -924,7 +892,7 @@ static int bcm_enet_open(struct net_devi
-
- ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
- if (ret)
-- goto out_phy_disconnect;
-+ return ret;
-
- ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0,
- dev->name, dev);
-@@ -1086,8 +1054,8 @@ static int bcm_enet_open(struct net_devi
- enet_dmac_writel(priv, priv->dma_chan_int_mask,
- ENETDMAC_IRMASK, priv->tx_chan);
-
-- if (phydev)
-- phy_start(phydev);
-+ if (priv->has_phy)
-+ phy_start(dev->phydev);
- else
- bcm_enet_adjust_link(dev);
-
-@@ -1128,10 +1096,6 @@ out_freeirq_rx:
- out_freeirq:
- free_irq(dev->irq, dev);
-
--out_phy_disconnect:
-- if (phydev)
-- phy_disconnect(phydev);
--
- return ret;
- }
-
-@@ -1236,10 +1200,6 @@ static int bcm_enet_stop(struct net_devi
- free_irq(priv->irq_rx, dev);
- free_irq(dev->irq, dev);
-
-- /* release phy */
-- if (priv->has_phy)
-- phy_disconnect(dev->phydev);
--
- return 0;
- }
-
-@@ -1805,14 +1765,49 @@ static int bcm_enet_probe(struct platfor
-
- /* do minimal hardware init to be able to probe mii bus */
- bcm_enet_hw_preinit(priv);
-+ spin_lock_init(&priv->rx_lock);
-+
-+ /* init rx timeout (used for oom) */
-+ init_timer(&priv->rx_timeout);
-+ priv->rx_timeout.function = bcm_enet_refill_rx_timer;
-+ priv->rx_timeout.data = (unsigned long)dev;
-+
-+ /* init the mib update lock&work */
-+ mutex_init(&priv->mib_update_lock);
-+ INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
-+
-+ /* zero mib counters */
-+ for (i = 0; i < ENET_MIB_REG_COUNT; i++)
-+ enet_writel(priv, 0, ENET_MIB_REG(i));
-+
-+ /* register netdevice */
-+ dev->netdev_ops = &bcm_enet_ops;
-+ netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
-+
-+ dev->ethtool_ops = &bcm_enet_ethtool_ops;
-+ /* MTU range: 46 - 2028 */
-+ dev->min_mtu = ETH_ZLEN - ETH_HLEN;
-+ dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
-+ SET_NETDEV_DEV(dev, &pdev->dev);
-+
-+ ret = register_netdev(dev);
-+ if (ret)
-+ goto out_uninit_hw;
-+
-+ netif_carrier_off(dev);
-+ platform_set_drvdata(pdev, dev);
-+ priv->pdev = pdev;
-+ priv->net_dev = dev;
-
- /* MII bus registration */
- if (priv->has_phy) {
-+ struct phy_device *phydev;
-+ char phy_id[MII_BUS_ID_SIZE + 3];
-
- priv->mii_bus = mdiobus_alloc();
- if (!priv->mii_bus) {
- ret = -ENOMEM;
-- goto out_uninit_hw;
-+ goto out_unregister_netdev;
- }
-
- bus = priv->mii_bus;
-@@ -1836,6 +1831,35 @@ static int bcm_enet_probe(struct platfor
- dev_err(&pdev->dev, "unable to register mdio bus\n");
- goto out_free_mdio;
- }
-+
-+ /* connect to PHY */
-+ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
-+ priv->mii_bus->id, priv->phy_id);
-+
-+ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
-+ PHY_INTERFACE_MODE_MII);
-+
-+ if (IS_ERR(phydev)) {
-+ dev_err(&pdev->dev, "could not attach to PHY\n");
-+ goto out_unregister_mdio;
-+ }
-+
-+ /* mask with MAC supported features */
-+ phydev->supported &= (SUPPORTED_10baseT_Half |
-+ SUPPORTED_10baseT_Full |
-+ SUPPORTED_100baseT_Half |
-+ SUPPORTED_100baseT_Full |
-+ SUPPORTED_Autoneg |
-+ SUPPORTED_Pause |
-+ SUPPORTED_MII);
-+ phydev->advertising = phydev->supported;
-+
-+ if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
-+ phydev->advertising |= SUPPORTED_Pause;
-+ else
-+ phydev->advertising &= ~SUPPORTED_Pause;
-+
-+ phy_attached_info(phydev);
- } else {
-
- /* run platform code to initialize PHY device */
-@@ -1843,47 +1867,16 @@ static int bcm_enet_probe(struct platfor
- pd->mii_config(dev, 1, bcm_enet_mdio_read_mii,
- bcm_enet_mdio_write_mii)) {
- dev_err(&pdev->dev, "unable to configure mdio bus\n");
-- goto out_uninit_hw;
-+ goto out_unregister_netdev;
- }
- }
-
-- spin_lock_init(&priv->rx_lock);
--
-- /* init rx timeout (used for oom) */
-- init_timer(&priv->rx_timeout);
-- priv->rx_timeout.function = bcm_enet_refill_rx_timer;
-- priv->rx_timeout.data = (unsigned long)dev;
--
-- /* init the mib update lock&work */
-- mutex_init(&priv->mib_update_lock);
-- INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
--
-- /* zero mib counters */
-- for (i = 0; i < ENET_MIB_REG_COUNT; i++)
-- enet_writel(priv, 0, ENET_MIB_REG(i));
--
-- /* register netdevice */
-- dev->netdev_ops = &bcm_enet_ops;
-- netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
--
-- dev->ethtool_ops = &bcm_enet_ethtool_ops;
-- /* MTU range: 46 - 2028 */
-- dev->min_mtu = ETH_ZLEN - ETH_HLEN;
-- dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
-- SET_NETDEV_DEV(dev, &pdev->dev);
--
-- ret = register_netdev(dev);
-- if (ret)
-- goto out_unregister_mdio;
--
-- netif_carrier_off(dev);
-- platform_set_drvdata(pdev, dev);
-- priv->pdev = pdev;
-- priv->net_dev = dev;
--
- return 0;
-
- out_unregister_mdio:
-+ if (dev->phydev)
-+ phy_disconnect(dev->phydev);
-+
- if (priv->mii_bus)
- mdiobus_unregister(priv->mii_bus);
-
-@@ -1891,6 +1884,9 @@ out_free_mdio:
- if (priv->mii_bus)
- mdiobus_free(priv->mii_bus);
-
-+out_unregister_netdev:
-+ unregister_netdev(dev);
-+
- out_uninit_hw:
- /* turn off mdc clock */
- enet_writel(priv, 0, ENET_MIISC_REG);
-@@ -1921,6 +1917,7 @@ static int bcm_enet_remove(struct platfo
- enet_writel(priv, 0, ENET_MIISC_REG);
-
- if (priv->has_phy) {
-+ phy_disconnect(dev->phydev);
- mdiobus_unregister(priv->mii_bus);
- mdiobus_free(priv->mii_bus);
- } else {
+++ /dev/null
-From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 15 Jul 2012 20:08:57 +0200
-Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++
- 2 files changed, 25 insertions(+), 0 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -968,6 +968,19 @@
- #define ENETSW_PORTOV_FDX_MASK (1 << 1)
- #define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
-
-+/* Port RGMII control register */
-+#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x))
-+#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7)
-+#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
-+#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4)
-+#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4)
-+#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4)
-+#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4)
-+#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0)
-+
-+/* Port RGMII timing register */
-+#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x))
-+
- /* MDIO control register */
- #define ENETSW_MDIOC_REG (0xb0)
- #define ENETSW_MDIOC_EXT_MASK (1 << 16)
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2192,6 +2192,18 @@ static int bcm_enetsw_open(struct net_de
- priv->sw_port_link[i] = 0;
- }
-
-+ /* enable external ports */
-+ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
-+ u8 rgmii_ctrl;
-+
-+ if (!priv->used_ports[i].used)
-+ continue;
-+
-+ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
-+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
-+ }
-+
- /* reset mib */
- val = enetsw_readb(priv, ENETSW_GMCR_REG);
- val |= ENETSW_GMCR_RST_MIB_MASK;
+++ /dev/null
-From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 3 Jul 2011 15:00:38 +0200
-Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +
- 2 files changed, 33 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -17,6 +17,9 @@
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/physmap.h>
- #include <linux/mtd/spi-nor.h>
-+#include <linux/of.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
-@@ -66,6 +69,41 @@ void __init bcm63xx_flash_force_phys_bas
- mtd_resources[0].end = end;
- }
-
-+static struct spi_board_info bcm63xx_spi_flash_info[] = {
-+ {
-+ .bus_num = 0,
-+ .chip_select = 0,
-+ .mode = 0,
-+ .max_speed_hz = 781000,
-+ .modalias = "m25p80",
-+ },
-+};
-+
-+static void bcm63xx_of_update_spi_flash_speed(struct device_node *np,
-+ unsigned int new_hz)
-+{
-+ struct property *max_hz;
-+ __be32 *hz;
-+
-+ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL);
-+ if (!max_hz)
-+ return;
-+
-+ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL);
-+ if (!max_hz->name) {
-+ kfree(max_hz);
-+ return;
-+ }
-+
-+ max_hz->value = max_hz + 1;
-+ max_hz->length = sizeof(*hz);
-+
-+ hz = max_hz->value;
-+ *hz = cpu_to_be32(new_hz);
-+
-+ of_update_property(np, max_hz);
-+}
-+
- static int __init bcm63xx_detect_flash_type(void)
- {
- u32 val;
-@@ -73,9 +111,15 @@ static int __init bcm63xx_detect_flash_t
- switch (bcm63xx_get_cpu_id()) {
- case BCM6318_CPU_ID:
- /* only support serial flash */
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
- return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6328_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
-+ if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
-+
- if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
-@@ -94,12 +138,20 @@ static int __init bcm63xx_detect_flash_t
- return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6362_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
-+ if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
- return BCM63XX_FLASH_TYPE_NAND;
- case BCM6368_CPU_ID:
- val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
-+ if (val & STRAPBUS_6368_SPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
- case STRAPBUS_6368_BOOT_SEL_NAND:
- return BCM63XX_FLASH_TYPE_NAND;
-@@ -110,6 +162,11 @@ static int __init bcm63xx_detect_flash_t
- }
- case BCM63268_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
-@@ -176,6 +233,7 @@ void __init bcm63xx_flash_detect(void)
-
- int __init bcm63xx_flash_register(void)
- {
-+ struct device_node *np;
- u32 val;
-
- switch (flash_type) {
-@@ -195,8 +253,14 @@ int __init bcm63xx_flash_register(void)
-
- return platform_device_register(&mtd_dev);
- case BCM63XX_FLASH_TYPE_SERIAL:
-- pr_warn("unsupported serial flash detected\n");
-- return -ENODEV;
-+ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor");
-+ if (np) {
-+ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz);
-+ of_node_put(np);
-+ return 0;
-+ } else {
-+ return -ENODEV;
-+ }
- case BCM63XX_FLASH_TYPE_NAND:
- pr_warn("unsupported NAND flash detected\n");
- return -ENODEV;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -709,6 +709,7 @@
- #define GPIO_STRAPBUS_REG 0x40
- #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
- #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
-+#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
- #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
- #define STRAPBUS_6368_BOOT_SEL_NAND 0
- #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1565,6 +1566,7 @@
- #define IDDQ_CTRL_63268_USBH (1 << 4)
-
- #define MISC_STRAPBUS_6328_REG 0x240
-+#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4)
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
- #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
+++ /dev/null
-From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 3 May 2012 14:40:03 +0200
-Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 9 ++++++++-
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 10 ++++++++++
- 2 files changed, 18 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -31,6 +31,7 @@
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-+#include <pci_ath9k_fixup.h>
-
- #include "board_common.h"
-
-@@ -177,6 +178,7 @@ static struct of_device_id of_ids[] = {
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-+ int i;
-
- #if CONFIG_OF
- if (of_have_populated_dt()) {
-@@ -241,6 +243,10 @@ int __init board_register_devices(void)
- board.ephy_reset_gpio_flags);
- }
-
-+ /* register any fixups */
-+ for (i = 0; i < board.has_caldata; i++)
-+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
-+
- return 0;
- }
-
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -9,6 +9,7 @@
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_fallback_sprom.h>
-+#include <pci_ath9k_fixup.h>
-
- /*
- * flash mapping
-@@ -16,6 +17,11 @@
- #define BCM963XX_CFE_VERSION_OFFSET 0x570
- #define BCM963XX_NVRAM_OFFSET 0x580
-
-+struct ath9k_caldata {
-+ unsigned int slot;
-+ u32 caldata_offset;
-+};
-+
- /*
- * board definition
- */
-@@ -33,6 +39,10 @@ struct board_info {
- unsigned int has_ehci0:1;
- unsigned int has_usbd:1;
- unsigned int use_fallback_sprom:1;
-+ unsigned int has_caldata:2;
-+
-+ /* wifi calibration data config */
-+ struct ath9k_caldata caldata[2];
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
+++ /dev/null
-From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 13 Jan 2014 12:12:30 +0100
-Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 5 +++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -270,3 +270,8 @@ int __init bcm63xx_flash_register(void)
- return -ENODEV;
- }
- }
-+
-+int bcm63xx_flash_get_type(void)
-+{
-+ return flash_type;
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -14,4 +14,6 @@ void bcm63xx_flash_force_phys_base_addre
-
- int __init bcm63xx_flash_register(void);
-
-+int bcm63xx_flash_get_type(void);
-+
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 3 May 2012 14:36:11 +0200
-Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
-
----
- arch/mips/bcm63xx/Makefile | 3 +-
- arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 +
- 3 files changed, 199 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
-- sprom.o
-+ pci-ath9k-fixup.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -0,0 +1,200 @@
-+/*
-+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
-+ *
-+ * Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * Based on
-+ *
-+ * Atheros AP94 reference board PCI initialization
-+ *
-+ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/pci.h>
-+#include <linux/delay.h>
-+#include <linux/ath9k_platform.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_nvram.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <pci_ath9k_fixup.h>
-+
-+#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
-+
-+struct ath9k_fixup {
-+ unsigned slot;
-+ u8 mac[ETH_ALEN];
-+ struct ath9k_platform_data pdata;
-+};
-+
-+static int ath9k_num_fixups;
-+static struct ath9k_fixup ath9k_fixups[2] = {
-+ {
-+ .slot = 255,
-+ .pdata = {
-+ .led_pin = -1,
-+ },
-+ },
-+ {
-+ .slot = 255,
-+ .pdata = {
-+ .led_pin = -1,
-+ },
-+ },
-+};
-+
-+static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
-+{
-+ u32 addr;
-+
-+ if (BCMCPU_IS_6328()) {
-+ addr = 0x18000000;
-+ } else {
-+ addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ addr &= MPI_CSBASE_BASE_MASK;
-+ }
-+
-+ switch (bcm63xx_flash_get_type()) {
-+ case BCM63XX_FLASH_TYPE_PARALLEL:
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ return eeprom;
-+ case BCM63XX_FLASH_TYPE_SERIAL:
-+ /* the first megabyte is memory mapped */
-+ if (offset < 0x100000) {
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ return eeprom;
-+ }
-+
-+ if (BCMCPU_IS_6328()) {
-+ /* we can change the memory mapped megabyte */
-+ bcm_hsspi_writel(offset & 0xf00000, 0x18);
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ bcm_hsspi_writel(0, 0x18);
-+ return eeprom;
-+ }
-+ /* can't do anything here without talking to the SPI controller. */
-+ case BCM63XX_FLASH_TYPE_NAND:
-+ default:
-+ return NULL;
-+ }
-+}
-+
-+static void ath9k_pci_fixup(struct pci_dev *dev)
-+{
-+ void __iomem *mem;
-+ struct ath9k_platform_data *pdata = NULL;
-+ struct pci_dev *bridge = pci_upstream_bridge(dev);
-+ u16 *cal_data = NULL;
-+ u16 cmd;
-+ u32 bar0;
-+ u32 val;
-+ unsigned i;
-+
-+ for (i = 0; i < ath9k_num_fixups; i++) {
-+ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
-+ continue;
-+
-+ cal_data = ath9k_fixups[i].pdata.eeprom_data;
-+ pdata = &ath9k_fixups[i].pdata;
-+ break;
-+ }
-+
-+ if (cal_data == NULL)
-+ return;
-+
-+ if (*cal_data != 0xa55a) {
-+ pr_err("pci %s: invalid calibration data\n", pci_name(dev));
-+ return;
-+ }
-+
-+ pr_info("pci %s: fixup device configuration\n", pci_name(dev));
-+
-+ switch (bcm63xx_get_cpu_id()) {
-+ case BCM6328_CPU_ID:
-+ val = BCM_PCIE_MEM_BASE_PA_6328;
-+ break;
-+ case BCM6348_CPU_ID:
-+ case BCM6358_CPU_ID:
-+ case BCM6368_CPU_ID:
-+ val = BCM_PCI_MEM_BASE_PA;
-+ break;
-+ default:
-+ BUG();
-+ }
-+
-+ mem = ioremap(val, 0x10000);
-+ if (!mem) {
-+ pr_err("pci %s: ioremap error\n", pci_name(dev));
-+ return;
-+ }
-+
-+ if (bridge)
-+ pci_enable_device(bridge);
-+
-+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
-+
-+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-+ pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+ /* set offset to first reg address */
-+ cal_data += 3;
-+ while(*cal_data != 0xffff) {
-+ u32 reg;
-+ reg = *cal_data++;
-+ val = *cal_data++;
-+ val |= (*cal_data++) << 16;
-+
-+ writel(val, mem + reg);
-+ udelay(100);
-+ }
-+
-+ pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
-+ dev->vendor = val & 0xffff;
-+ dev->device = (val >> 16) & 0xffff;
-+
-+ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
-+ dev->revision = val & 0xff;
-+ dev->class = val >> 8; /* upper 3 bytes */
-+
-+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-+ pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
-+
-+ if (bridge)
-+ pci_disable_device(bridge);
-+
-+ iounmap(mem);
-+
-+ dev->dev.platform_data = pdata;
-+}
-+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-+
-+void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
-+{
-+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
-+ return;
-+
-+ ath9k_fixups[ath9k_num_fixups].slot = slot;
-+
-+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
-+ return;
-+
-+ if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
-+ return;
-+
-+ ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
-+ ath9k_num_fixups++;
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -0,0 +1,7 @@
-+#ifndef _PCI_ATH9K_FIXUP
-+#define _PCI_ATH9K_FIXUP
-+
-+
-+void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
-+
-+#endif /* _PCI_ATH9K_FIXUP */
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -2,6 +2,7 @@
- #define _PCI_ATH9K_FIXUP
-
-
--void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
-+void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-+ unsigned endian_check) __init;
-
- #endif /* _PCI_ATH9K_FIXUP */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -20,6 +20,7 @@
- struct ath9k_caldata {
- unsigned int slot;
- u32 caldata_offset;
-+ unsigned int endian_check:1;
- };
-
- /*
---- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -182,12 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
- }
- DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-
--void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
-+void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-+ unsigned endian_check)
- {
- if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
- return;
-
- ath9k_fixups[ath9k_num_fixups].slot = slot;
-+ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
-
- if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
- return;
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -245,7 +245,8 @@ int __init board_register_devices(void)
-
- /* register any fixups */
- for (i = 0; i < board.has_caldata; i++)
-- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
-+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-+ board.caldata[i].endian_check);
-
- return 0;
- }
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -246,7 +246,7 @@ int __init board_register_devices(void)
- /* register any fixups */
- for (i = 0; i < board.has_caldata; i++)
- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-- board.caldata[i].endian_check);
-+ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
-
- return 0;
- }
---- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -183,13 +183,15 @@ static void ath9k_pci_fixup(struct pci_d
- DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-
- void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-- unsigned endian_check)
-+ unsigned endian_check, int led_pin, bool led_active_high)
- {
- if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
- return;
-
- ath9k_fixups[ath9k_num_fixups].slot = slot;
- ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
-+ ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin;
-+ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high;
-
- if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
- return;
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -21,6 +21,8 @@ struct ath9k_caldata {
- unsigned int slot;
- u32 caldata_offset;
- unsigned int endian_check:1;
-+ int led_pin;
-+ bool led_active_high;
- };
-
- /*
---- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -3,6 +3,6 @@
-
-
- void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-- unsigned endian_check) __init;
-+ unsigned endian_check, int led_pin, bool led_active_high) __init;
-
- #endif /* _PCI_ATH9K_FIXUP */
+++ /dev/null
-From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 7 Jan 2013 17:45:39 +0100
-Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
-
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++-
- arch/mips/bcm63xx/dev-flash.c | 2 +-
- arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +-
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++-
- .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++
- 7 files changed, 104 insertions(+), 8 deletions(-)
- create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
-- pci-ath9k-fixup.o sprom.o
-+ pci-ath9k-fixup.o pci-rt2x00-fixup.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -32,6 +32,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
- #include <pci_ath9k_fixup.h>
-+#include <pci_rt2x00_fixup.h>
-
- #include "board_common.h"
-
-@@ -244,9 +245,19 @@ int __init board_register_devices(void)
- }
-
- /* register any fixups */
-- for (i = 0; i < board.has_caldata; i++)
-- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
-+ for (i = 0; i < board.has_caldata; i++) {
-+ switch (board.caldata[i].vendor) {
-+ case PCI_VENDOR_ID_ATHEROS:
-+ pci_enable_ath9k_fixup(board.caldata[i].slot,
-+ board.caldata[i].caldata_offset, board.caldata[i].endian_check,
-+ board.caldata[i].led_pin, board.caldata[i].led_active_high);
-+ break;
-+ case PCI_VENDOR_ID_RALINK:
-+ pci_enable_rt2x00_fixup(board.caldata[i].slot,
-+ board.caldata[i].eeprom);
-+ break;
-+ }
-+ }
-
- return 0;
- }
---- /dev/null
-+++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
-@@ -0,0 +1,72 @@
-+/*
-+ * Broadcom BCM63XX RT2x00 EEPROM fixup helper.
-+ *
-+ * Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
-+ *
-+ * Based on
-+ *
-+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
-+ *
-+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/pci.h>
-+#include <linux/platform_device.h>
-+#include <linux/rt2x00_platform.h>
-+
-+#include <bcm63xx_nvram.h>
-+#include <pci_rt2x00_fixup.h>
-+
-+struct rt2x00_fixup {
-+ unsigned slot;
-+ u8 mac[ETH_ALEN];
-+ struct rt2x00_platform_data pdata;
-+};
-+
-+static int rt2x00_num_fixups;
-+static struct rt2x00_fixup rt2x00_fixups[2] = {
-+ {
-+ .slot = 255,
-+ },
-+ {
-+ .slot = 255,
-+ },
-+};
-+
-+static void rt2x00_pci_fixup(struct pci_dev *dev)
-+{
-+ unsigned i;
-+ struct rt2x00_platform_data *pdata = NULL;
-+
-+ for (i = 0; i < rt2x00_num_fixups; i++) {
-+ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
-+ continue;
-+
-+ pdata = &rt2x00_fixups[i].pdata;
-+ break;
-+ }
-+
-+ dev->dev.platform_data = pdata;
-+}
-+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
-+
-+void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
-+{
-+ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
-+ return;
-+
-+ rt2x00_fixups[rt2x00_num_fixups].slot = slot;
-+ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
-+
-+ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
-+ return;
-+
-+ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
-+ rt2x00_num_fixups++;
-+}
-+
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -10,6 +10,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_fallback_sprom.h>
- #include <pci_ath9k_fixup.h>
-+#include <pci_rt2x00_fixup.h>
-
- /*
- * flash mapping
-@@ -17,12 +18,16 @@
- #define BCM963XX_CFE_VERSION_OFFSET 0x570
- #define BCM963XX_NVRAM_OFFSET 0x580
-
--struct ath9k_caldata {
-+struct bcm63xx_caldata {
-+ unsigned int vendor;
- unsigned int slot;
- u32 caldata_offset;
-+ /* Atheros */
- unsigned int endian_check:1;
- int led_pin;
- bool led_active_high;
-+ /* Ralink */
-+ char* eeprom;
- };
-
- /*
-@@ -45,7 +50,7 @@ struct board_info {
- unsigned int has_caldata:2;
-
- /* wifi calibration data config */
-- struct ath9k_caldata caldata[2];
-+ struct bcm63xx_caldata caldata[2];
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
-@@ -0,0 +1,9 @@
-+#ifndef _PCI_RT2X00_FIXUP
-+#define _PCI_RT2X00_FIXUP
-+
-+#define PCI_VENDOR_ID_RALINK 0x1814
-+
-+void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
-+
-+#endif /* _PCI_RT2X00_FIXUP */
-+
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -332,6 +332,9 @@ struct bcm_enet_priv {
- struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
- int sw_port_link[ENETSW_MAX_PORT];
-
-+ /* platform device for associated switch */
-+ struct platform_device *b53_device;
-+
- /* used to poll switch port state */
- struct timer_list swphy_poll;
- spinlock_t enetsw_mdio_lock;
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -30,6 +30,7 @@
- #include <linux/dma-mapping.h>
- #include <linux/platform_device.h>
- #include <linux/if_vlan.h>
-+#include <linux/platform_data/b53.h>
-
- #include <bcm63xx_dev_enet.h>
- #include "bcm63xx_enet.h"
-@@ -1937,7 +1938,8 @@ static int bcm_enet_remove(struct platfo
- return 0;
- }
-
--struct platform_driver bcm63xx_enet_driver = {
-+
-+static struct platform_driver bcm63xx_enet_driver = {
- .probe = bcm_enet_probe,
- .remove = bcm_enet_remove,
- .driver = {
-@@ -1946,6 +1948,42 @@ struct platform_driver bcm63xx_enet_driv
- },
- };
-
-+struct b53_platform_data bcm63xx_b53_pdata = {
-+ .chip_id = 0x6300,
-+ .big_endian = 1,
-+};
-+
-+struct platform_device bcm63xx_b53_dev = {
-+ .name = "b53-switch",
-+ .id = -1,
-+ .dev = {
-+ .platform_data = &bcm63xx_b53_pdata,
-+ },
-+};
-+
-+static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask)
-+{
-+ int ret;
-+
-+ bcm63xx_b53_pdata.regs = priv->base;
-+ bcm63xx_b53_pdata.enabled_ports = port_mask;
-+ bcm63xx_b53_pdata.alias = priv->net_dev->name;
-+
-+ ret = platform_device_register(&bcm63xx_b53_dev);
-+ if (!ret)
-+ priv->b53_device = &bcm63xx_b53_dev;
-+
-+ return ret;
-+}
-+
-+static void bcmenet_switch_unregister(struct bcm_enet_priv *priv)
-+{
-+ if (priv->b53_device)
-+ platform_device_unregister(&bcm63xx_b53_dev);
-+
-+ priv->b53_device = NULL;
-+}
-+
- /*
- * switch mii access callbacks
- */
-@@ -2204,29 +2242,6 @@ static int bcm_enetsw_open(struct net_de
- enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
- }
-
-- /* reset mib */
-- val = enetsw_readb(priv, ENETSW_GMCR_REG);
-- val |= ENETSW_GMCR_RST_MIB_MASK;
-- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-- mdelay(1);
-- val &= ~ENETSW_GMCR_RST_MIB_MASK;
-- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-- mdelay(1);
--
-- /* force CPU port state */
-- val = enetsw_readb(priv, ENETSW_IMPOV_REG);
-- val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
-- enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
--
-- /* enable switch forward engine */
-- val = enetsw_readb(priv, ENETSW_SWMODE_REG);
-- val |= ENETSW_SWMODE_FWD_EN_MASK;
-- enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
--
-- /* enable jumbo on all ports */
-- enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
-- enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
--
- /* initialize flow control buffer allocation */
- enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
- ENETDMA_BUFALLOC_REG(priv->rx_chan));
-@@ -2685,6 +2700,9 @@ static int bcm_enetsw_probe(struct platf
- struct bcm63xx_enetsw_platform_data *pd;
- struct resource *res_mem;
- int ret, irq_rx, irq_tx;
-+ unsigned i, num_ports = 0;
-+ u16 port_mask = BIT(8);
-+ u8 val;
-
- if (!bcm_enet_shared_base[0])
- return -EPROBE_DEFER;
-@@ -2767,6 +2785,43 @@ static int bcm_enetsw_probe(struct platf
- priv->pdev = pdev;
- priv->net_dev = dev;
-
-+ /* reset mib */
-+ val = enetsw_readb(priv, ENETSW_GMCR_REG);
-+ val |= ENETSW_GMCR_RST_MIB_MASK;
-+ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+ mdelay(1);
-+ val &= ~ENETSW_GMCR_RST_MIB_MASK;
-+ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+ mdelay(1);
-+
-+ /* force CPU port state */
-+ val = enetsw_readb(priv, ENETSW_IMPOV_REG);
-+ val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
-+ enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
-+
-+ /* enable switch forward engine */
-+ val = enetsw_readb(priv, ENETSW_SWMODE_REG);
-+ val |= ENETSW_SWMODE_FWD_EN_MASK;
-+ enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
-+
-+ /* enable jumbo on all ports */
-+ enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
-+ enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
-+
-+ for (i = 0; i < priv->num_ports; i++) {
-+ struct bcm63xx_enetsw_port *port = &priv->used_ports[i];
-+
-+ if (!port->used)
-+ continue;
-+
-+ num_ports++;
-+ port_mask |= BIT(i);
-+ }
-+
-+ /* only register if there is more than one external port */
-+ if (num_ports > 1)
-+ bcmenet_switch_register(priv, port_mask);
-+
- return 0;
-
- out_disable_clk:
-@@ -2788,6 +2843,9 @@ static int bcm_enetsw_remove(struct plat
- priv = netdev_priv(dev);
- unregister_netdev(dev);
-
-+ /* remove switch */
-+ bcmenet_switch_unregister(priv);
-+
- clk_disable_unprepare(priv->mac_clk);
-
- free_netdev(dev);
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2744,9 +2744,9 @@ static int bcm_enetsw_probe(struct platf
- if (ret)
- goto out;
-
-- priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
-- if (IS_ERR(priv->base)) {
-- ret = PTR_ERR(priv->base);
-+ priv->base = devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem));
-+ if (priv->base == NULL) {
-+ ret = -ENOMEM;
- goto out;
- }
-
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -77,6 +77,8 @@ static struct board_info __initdata boar
-
- .has_enet0 = 1,
- .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -90,6 +92,8 @@ static struct board_info __initdata boar
-
- .has_enet0 = 1,
- .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -138,6 +142,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -162,6 +168,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -186,6 +194,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -208,6 +218,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -231,6 +243,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -252,6 +266,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -271,6 +287,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -298,6 +316,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -323,6 +343,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -348,6 +370,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -371,6 +395,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -46,7 +46,7 @@ static struct board_info __initdata boar
- .ephy_reset_gpio = 36,
- .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_3368 */
-
- /*
- * known 6328 boards
-@@ -65,7 +65,7 @@ static struct board_info __initdata boar
- .port_no = 0,
- },
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
- * known 6338 boards
-@@ -98,7 +98,7 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
- * known 6345 boards
-@@ -108,7 +108,7 @@ static struct board_info __initdata boar
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
- * known 6348 boards
-@@ -295,7 +295,7 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
- * known 6358 boards
-@@ -403,7 +403,7 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
- * all boards
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -295,6 +295,21 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
-+
-+static struct board_info __initdata board_96348_D4PW = {
-+ .name = "D-4P-W",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -431,6 +446,7 @@ static const struct board_info __initcon
- &board_DV201AMR,
- &board_96348gw_a,
- &board_rta1025w_16,
-+ &board_96348_D4PW,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -462,6 +478,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -418,6 +418,60 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
-+
-+static struct board_info __initdata board_nb4_ser_r0 = {
-+ .name = "NB4-SER-r0",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+};
-+
-+static struct board_info __initdata board_nb4_fxc_r1 = {
-+ .name = "NB4-FXC-r1",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -454,6 +508,8 @@ static const struct board_info __initcon
- &board_96358vw2,
- &board_AGPFS0,
- &board_DWVS0,
-+ &board_nb4_ser_r0,
-+ &board_nb4_fxc_r1,
- #endif
- };
-
-@@ -495,6 +551,8 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
-+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
-+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -98,6 +98,20 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct board_info __initdata board_96338w2_e7t = {
-+ .name = "96338W2_E7T",
-+ .expected_cpu_id = 0x6338,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
-@@ -487,6 +501,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
- &board_96338w,
-+ &board_96338w2_e7t,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-@@ -524,6 +539,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
- { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -385,6 +385,25 @@ static struct board_info __initdata boar
- .num_usbh_ports = 2,
- };
-
-+static struct board_info __initdata board_CPVA642 = {
-+ .name = "CPVA642",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
-+
-+
- static struct board_info __initdata board_AGPFS0 = {
- .name = "AGPF-S0",
- .expected_cpu_id = 0x6358,
-@@ -522,6 +541,7 @@ static const struct board_info __initcon
- &board_96358vw,
- &board_96358vw2,
- &board_AGPFS0,
-+ &board_CPVA642,
- &board_DWVS0,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-@@ -569,6 +589,7 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
- { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
- { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
-+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -452,6 +452,22 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+/* D-Link DSL-274xB revison C2/C3 */
-+static struct board_info __initdata board_dsl_274xb_rev_c = {
-+ .name = "AW4139",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_nb4_ser_r0 = {
- .name = "NB4-SER-r0",
- .expected_cpu_id = 0x6358,
-@@ -543,6 +559,7 @@ static const struct board_info __initcon
- &board_AGPFS0,
- &board_CPVA642,
- &board_DWVS0,
-+ &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- #endif
-@@ -582,6 +599,7 @@ static struct of_device_id const bcm963x
- { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
- { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -324,6 +324,36 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct sprom_fixup __initdata spw500v_fixups[] = {
-+ { .offset = 46, .value = 0x3046 },
-+ { .offset = 47, .value = 0x15a7 },
-+ { .offset = 48, .value = 0xfa89 },
-+ { .offset = 49, .value = 0xfe79 },
-+ { .offset = 57, .value = 0x6a49 },
-+};
-+
-+static struct board_info __initdata board_spw500v = {
-+ .name = "SPW500V",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = spw500v_fixups,
-+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -551,6 +581,7 @@ static const struct board_info __initcon
- &board_96348gw_a,
- &board_rta1025w_16,
- &board_96348_D4PW,
-+ &board_spw500v,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -592,6 +623,7 @@ static struct of_device_id const bcm963x
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
-+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -217,6 +217,48 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+static struct board_info __initdata board_gw6200 = {
-+ .name = "GW6200",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+};
-+
-+static struct board_info __initdata board_gw6000 = {
-+ .name = "GW6000",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+};
-+
-+
-+
- static struct board_info __initdata board_FAST2404 = {
- .name = "F@ST2404",
- .expected_cpu_id = 0x6348,
-@@ -574,6 +616,8 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
- &board_96348gw,
-+ &board_gw6000,
-+ &board_gw6200,
- &board_96348gw_10,
- &board_96348gw_11,
- &board_FAST2404,
-@@ -624,6 +668,8 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
-+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
-+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -396,6 +396,31 @@ static struct board_info __initdata boar
- .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
- },
- };
-+
-+static struct board_info __initdata board_96348sv = {
-+ .name = "MAGIC",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ /* it has BP_ENET_EXTERNAL_PHY */
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -626,6 +651,7 @@ static const struct board_info __initcon
- &board_rta1025w_16,
- &board_96348_D4PW,
- &board_spw500v,
-+ &board_96348sv,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -670,6 +696,7 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
-+ { .compatible = "telsey,magic", .data = &board_96348sv, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -618,6 +618,32 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- .num_usbh_ports = 2,
- };
-+
-+static struct board_info __initdata board_HW553 = {
-+ .name = "HW553",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -663,6 +689,7 @@ static const struct board_info __initcon
- &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-+ &board_HW553,
- #endif
- };
-
-@@ -706,6 +733,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -112,6 +112,20 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct board_info __initdata board_rta1320_16m = {
-+ .name = "RTA1320_16M",
-+ .expected_cpu_id = 0x6338,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
-@@ -660,6 +674,7 @@ static const struct board_info __initcon
- &board_96338gw,
- &board_96338w,
- &board_96338w2_e7t,
-+ &board_rta1320_16m,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-@@ -704,6 +719,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
- { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
- { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -658,6 +658,20 @@ static struct board_info __initdata boar
- .pci_dev = 1,
- },
- };
-+
-+ /* T-Home Speedport W 303V Typ B */
-+static struct board_info __initdata board_spw303v = {
-+ .name = "96358-502V",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -705,6 +719,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_HW553,
-+ &board_spw303v,
- #endif
- };
-
-@@ -756,6 +771,7 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
- { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
- { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
-+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -435,6 +435,26 @@ static struct board_info __initdata boar
- .has_pccard = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct board_info __initdata board_V2500V_BB = {
-+ .name = "V2500V_BB",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -707,6 +727,7 @@ static const struct board_info __initcon
- &board_96348_D4PW,
- &board_spw500v,
- &board_96348sv,
-+ &board_V2500V_BB,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -746,6 +767,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
-@@ -805,6 +827,22 @@ void __init board_bcm963xx_init(void)
- val &= MPI_CSBASE_BASE_MASK;
- }
- boot_addr = (u8 *)KSEG1ADDR(val);
-+ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
-+
-+ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
-+ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
-+ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
-+ /* Do an early check of CFE and then select bank 0 */
-+
-+ if (boot_addr == (u8 *)0xbf800000) {
-+ u8 *tmp_boot_addr = (u8*)0xbfc00000;
-+
-+ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
-+ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
-+ pr_info("V2500V: nvram bank 0\n");
-+ boot_addr = tmp_boot_addr;
-+ }
-+ }
-
- /* dump cfe version */
- cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -21,6 +21,7 @@
- #include <linux/spi/spi.h>
- #include <linux/spi/flash.h>
-
-+#include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
- #include <bcm63xx_regs.h>
-@@ -247,6 +248,13 @@ int __init bcm63xx_flash_register(void)
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
- val &= MPI_CSBASE_BASE_MASK;
-
-+ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
-+ /* Loading from CFE always uses Bank 0 */
-+ if (!strcmp(board_get_name(), "V2500V_BB")) {
-+ pr_info("V2500V: Start in Bank 0\n");
-+ val = val + 0x400000; // Select Bank 0 start address
-+ }
-+
- mtd_resources[0].start = val;
- mtd_resources[0].end = 0x1FFFFFFF;
- }
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -208,6 +208,24 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+
-+/* BT Voyager 2110 */
-+static struct board_info __initdata board_V2110 = {
-+ .name = "V2110",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -728,6 +746,7 @@ static const struct board_info __initcon
- &board_spw500v,
- &board_96348sv,
- &board_V2500V_BB,
-+ &board_V2110,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -767,6 +786,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
- { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+++ /dev/null
-From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:55:52 +0100
-Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
-
----
- arch/mips/bcm63xx/boards/Kconfig | 6 +
- arch/mips/bcm63xx/boards/Makefile | 1 +
- arch/mips/bcm63xx/boards/board_common.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.h | 6 +
- arch/mips/bcm63xx/boards/board_livebox.c | 215 ++++++++++++++++++++++++++++++
- 5 files changed, 229 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -13,4 +13,10 @@ config BOARD_BCM963XX
- default y
- help
-
-+config BOARD_LIVEBOX
-+ bool "Inventel Livebox(es) boards"
-+ select SSB
-+ help
-+ Inventel Livebox boards using the RedBoot bootloader.
-+
- endmenu
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1,2 +1,3 @@
- obj-y += board_common.o
- obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
-+obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -54,7 +54,7 @@ void __init board_prom_init(void)
- if (fw_arg3 == CFE_EPTSEAL)
- board_bcm963xx_init();
- else
-- panic("unsupported bootloader detected");
-+ board_livebox_init();
- }
-
- static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -24,4 +24,10 @@ static inline void board_of_device_prese
- }
- #endif
-
-+#if defined(CONFIG_BOARD_LIVEBOX)
-+void board_livebox_init(void);
-+#else
-+static inline void board_livebox_init(void) { }
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_livebox.c
-@@ -0,0 +1,155 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/input.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <board_bcm963xx.h>
-+
-+#include "board_common.h"
-+
-+#define PFX "board_livebox: "
-+
-+static unsigned int mac_addr_used = 0;
-+
-+/*
-+ * known 6348 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+static struct board_info __initdata board_livebox_blue5g = {
-+ .name = "Livebox-blue-5g",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 31,
-+ },
-+
-+ .ephy_reset_gpio = 6,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+};
-+#endif
-+
-+/*
-+ * all boards
-+ */
-+static const struct board_info __initdata *bcm963xx_boards[] = {
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+ &board_livebox_blue5g
-+#endif
-+};
-+
-+static struct of_device_id const livebox_boards_dt[] = {
-+ { .compatible = "inventel,livebox-1", .data = &board_livebox_blue5g, },
-+ { }
-+};
-+
-+/*
-+ * register & return a new board mac address
-+ */
-+static int livebox_get_mac_address(u8 *mac)
-+{
-+ u8 *p;
-+ int count;
-+
-+ memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN);
-+
-+ p = mac + ETH_ALEN - 1;
-+ count = mac_addr_used;
-+
-+ while (count--) {
-+ do {
-+ (*p)++;
-+ if (*p != 0)
-+ break;
-+ p--;
-+ } while (p != mac);
-+ }
-+
-+ if (p == mac) {
-+ printk(KERN_ERR PFX "unable to fetch mac address\n");
-+ return -ENODEV;
-+ }
-+ mac_addr_used++;
-+
-+ return 0;
-+}
-+
-+/*
-+ * early init callback
-+ */
-+#define LIVEBOX_GPIO_DETECT_MASK 0x000000ff
-+#define LIVEBOX_BOOT_ADDR 0x1e400000
-+
-+#define LIVEBOX_HW_BLUE5G_9 0x90
-+
-+void __init board_livebox_init(void)
-+{
-+ u32 val;
-+ u8 hw_version;
-+ const struct board_info *board;
-+ const struct of_device_id *board_match;
-+
-+ /* find board by compat */
-+ board_match = bcm63xx_match_board(livebox_boards_dt);
-+ if (board_match) {
-+ board = board_match->data;
-+ } else {
-+ /* Get hardware version */
-+ val = bcm_gpio_readl(GPIO_CTL_LO_REG);
-+ val &= ~LIVEBOX_GPIO_DETECT_MASK;
-+ bcm_gpio_writel(val, GPIO_CTL_LO_REG);
-+
-+ hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG);
-+ hw_version &= LIVEBOX_GPIO_DETECT_MASK;
-+
-+ switch (hw_version) {
-+ case LIVEBOX_HW_BLUE5G_9:
-+ printk(KERN_INFO PFX "Livebox BLUE5G.9\n");
-+ board = bcm963xx_boards[0];
-+ break;
-+ default:
-+ printk(KERN_INFO PFX "Unknown livebox version: %02x\n",
-+ hw_version);
-+ /* use default livebox configuration */
-+ board = bcm963xx_boards[0];
-+ break;
-+ }
-+ }
-+
-+ /* use default livebox configuration */
-+ board_early_setup(board, livebox_get_mac_address);
-+
-+ /* read base address of boot chip select (0) */
-+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ val &= MPI_CSBASE_BASE_MASK;
-+ if (val != LIVEBOX_BOOT_ADDR) {
-+ printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n",
-+ val, LIVEBOX_BOOT_ADDR);
-+ bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff);
-+ }
-+}
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -226,6 +226,33 @@ static struct board_info __initdata boar
- };
-
-
-+static struct board_info __initdata board_ct536_ct5621 = {
-+ .name = "CT536_CT5621",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 0,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -747,6 +774,7 @@ static const struct board_info __initcon
- &board_96348sv,
- &board_V2500V_BB,
- &board_V2110,
-+ &board_ct536_ct5621,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -788,6 +816,8 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
- { .compatible = "bt,voyager-2110", .data = &board_V2110, },
- { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
-+ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
-+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -626,6 +626,7 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
-+ .has_ehci0 = 1,
- };
-
- /* D-Link DSL-274xB revison C2/C3 */
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -253,6 +253,30 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_96348A_122 = {
-+ .name = "96348A-122",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -776,6 +800,7 @@ static const struct board_info __initcon
- &board_V2500V_BB,
- &board_V2110,
- &board_ct536_ct5621,
-+ &board_96348A_122,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -818,6 +843,7 @@ static struct of_device_id const bcm963x
- { .compatible = "bt,voyager-2110", .data = &board_V2110, },
- { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
-+ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
- { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -225,6 +225,33 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_CPVA502plus = {
-+ .name = "CPVA502+",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ },
-+
-+ .ephy_reset_gpio = 4,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-
- static struct board_info __initdata board_ct536_ct5621 = {
- .name = "CT536_CT5621",
-@@ -801,6 +828,7 @@ static const struct board_info __initcon
- &board_V2110,
- &board_ct536_ct5621,
- &board_96348A_122,
-+ &board_CPVA502plus,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -853,6 +881,7 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
-+ { .compatible = "telsey,cpva502plus", .data = &board_CPVA502plus, },
- { .compatible = "telsey,magic", .data = &board_96348sv, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+++ /dev/null
-From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Wed, 20 Jan 2010 16:21:30 +0100
-Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
- 2 files changed, 97 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -792,6 +792,58 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-+ * known 6368 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+static struct board_info __initdata board_96368mvwg = {
-+ .name = "96368MVWG",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port1",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port2",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0x12,
-+ .name = "port0",
-+ },
-+
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0x11,
-+ .name = "port3",
-+ },
-+ },
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6368 */
-+
-+/*
- * all boards
- */
- static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -843,6 +895,10 @@ static const struct board_info __initcon
- &board_HW553,
- &board_spw303v,
- #endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+ &board_96368mvwg,
-+#endif
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-@@ -903,6 +959,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- #endif
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -81,12 +81,25 @@ void __init board_early_setup(const stru
- bcm63xx_pci_enabled = 1;
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G2_PCI;
-+
-+ if (BCMCPU_IS_6368())
-+ val |= GPIO_MODE_6368_PCI_REQ1 |
-+ GPIO_MODE_6368_PCI_GNT1 |
-+ GPIO_MODE_6368_PCI_INTB |
-+ GPIO_MODE_6368_PCI_REQ0 |
-+ GPIO_MODE_6368_PCI_GNT0;
- }
- #endif
-
- if (board.has_pccard) {
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+
-+ if (BCMCPU_IS_6368())
-+ val |= GPIO_MODE_6368_PCMCIA_CD1 |
-+ GPIO_MODE_6368_PCMCIA_CD2 |
-+ GPIO_MODE_6368_PCMCIA_VS1 |
-+ GPIO_MODE_6368_PCMCIA_VS2;
- }
-
- if (board.has_enet0 && !board.enet0.use_internal_phy) {
+++ /dev/null
-From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Fri, 4 Nov 2011 12:33:48 +0100
-Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++
- 1 files changed, 67 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -841,6 +841,45 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct board_info __initdata board_96368mvngr = {
-+ .name = "96368MVNgr",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-@@ -898,6 +937,7 @@ static const struct board_info __initcon
-
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
-+ &board_96368mvngr,
- #endif
- };
-
-@@ -959,6 +999,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
-From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 29 May 2012 10:52:25 +0200
-Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++
- 1 files changed, 77 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -64,6 +64,33 @@ static struct board_info __initdata boar
- .use_fullspeed = 0,
- .port_no = 0,
- },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
- };
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
+++ /dev/null
-From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 29 May 2012 11:01:12 +0200
-Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++
- 1 files changed, 71 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -92,6 +92,40 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_963281TAN = {
-+ .name = "963281TAN",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -918,6 +952,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_963281TAN,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -974,6 +1009,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
-From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 30 Apr 2012 09:10:51 +0200
-Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
- DSL-274xB rev F1
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++
- 1 files changed, 104 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -126,6 +126,51 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_dsl_274xb_f1 = {
-+ .name = "AW4339U",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0x7d1000,
-+ .slot = 0,
-+ .led_pin = -1,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 1",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -953,6 +998,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_963281TAN,
-+ &board_dsl_274xb_f1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -1011,6 +1057,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -568,6 +568,24 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+/* NetGear DG834G v4 */
-+static struct board_info __initdata board_96348W3 = {
-+ .name = "96348W3",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+};
-+
- static struct board_info __initdata board_96348_D4PW = {
- .name = "D-4P-W",
- .expected_cpu_id = 0x6348,
-@@ -1028,6 +1046,7 @@ static const struct board_info __initcon
- &board_ct536_ct5621,
- &board_96348A_122,
- &board_CPVA502plus,
-+ &board_96348W3,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -1083,6 +1102,7 @@ static struct of_device_id const bcm963x
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
-+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -874,6 +874,30 @@ static struct board_info __initdata boar
- .num_usbh_ports = 2,
- };
-
-+static struct board_info __initdata board_ct6373_1 = {
-+ .name = "CT6373-1",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW553 = {
- .name = "HW553",
- .expected_cpu_id = 0x6358,
-@@ -1058,6 +1082,7 @@ static const struct board_info __initcon
- &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-+ &board_ct6373_1,
- &board_HW553,
- &board_spw303v,
- #endif
-@@ -1116,6 +1141,7 @@ static struct of_device_id const bcm963x
- { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
- { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -937,6 +937,33 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- };
-+
-+/* D-Link DVA-G3810BN/TL */
-+static struct board_info __initdata board_DVAG3810BN = {
-+ .name = "DVAG3810BN",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -1085,6 +1112,7 @@ static const struct board_info __initcon
- &board_ct6373_1,
- &board_HW553,
- &board_spw303v,
-+ &board_DVAG3810BN,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-@@ -1144,6 +1172,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -966,6 +966,32 @@ static struct board_info __initdata boar
- };
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+static struct board_info __initdata board_nb6 = {
-+ .name = "NB6",
-+ .expected_cpu_id = 0x6362,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6362 */
-+
- /*
- * known 6368 boards
- */
-@@ -1115,6 +1141,10 @@ static const struct board_info __initcon
- &board_DVAG3810BN,
- #endif
-
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+ &board_nb6,
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-@@ -1183,6 +1213,9 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -501,6 +501,22 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_FAST2604 = {
-+ .name = "F@ST2604",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_rta1025w_16 = {
- .name = "RTA1025W_16",
- .expected_cpu_id = 0x6348,
-@@ -1112,6 +1128,7 @@ static const struct board_info __initcon
- &board_96348gw_10,
- &board_96348gw_11,
- &board_FAST2404,
-+ &board_FAST2604,
- &board_DV201AMR,
- &board_96348gw_a,
- &board_rta1025w_16,
-@@ -1187,6 +1204,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
- { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
-+ { .compatible = "sagem,fast-2604", .data = &board_FAST2604, },
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -127,6 +127,49 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_A4001N1 = {
-+ .name = "963281T_TEF",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- static struct board_info __initdata board_dsl_274xb_f1 = {
- .name = "AW4339U",
- .expected_cpu_id = 0x6328,
-@@ -1109,6 +1152,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_963281TAN,
-+ &board_A4001N1,
- &board_dsl_274xb_f1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
-@@ -1174,6 +1218,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -93,6 +93,78 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5387un_fixups[] = {
-+ { .offset = 2, .value = 0x05bb },
-+ { .offset = 65, .value = 0x1204 },
-+ { .offset = 78, .value = 0x0303 },
-+ { .offset = 79, .value = 0x0202 },
-+ { .offset = 80, .value = 0xff02 },
-+ { .offset = 87, .value = 0x0315 },
-+ { .offset = 88, .value = 0x0315 },
-+ { .offset = 96, .value = 0x2048 },
-+ { .offset = 97, .value = 0xff11 },
-+ { .offset = 98, .value = 0x1567 },
-+ { .offset = 99, .value = 0xfb24 },
-+ { .offset = 100, .value = 0x3e3c },
-+ { .offset = 101, .value = 0x4038 },
-+ { .offset = 102, .value = 0xfe7f },
-+ { .offset = 103, .value = 0x1279 },
-+ { .offset = 112, .value = 0x2048 },
-+ { .offset = 113, .value = 0xff03 },
-+ { .offset = 114, .value = 0x154c },
-+ { .offset = 115, .value = 0xfb27 },
-+ { .offset = 116, .value = 0x3e3c },
-+ { .offset = 117, .value = 0x4038 },
-+ { .offset = 118, .value = 0xfe87 },
-+ { .offset = 119, .value = 0x1233 },
-+ { .offset = 203, .value = 0x2226 },
-+};
-+
-+static struct board_info __initdata board_AR5387un = {
-+ .name = "96328A-1441N1",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5387un_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
-+ },
-+};
-+
- static struct board_info __initdata board_963281TAN = {
- .name = "963281TAN",
- .expected_cpu_id = 0x6328,
-@@ -1151,6 +1223,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AR5387un,
- &board_963281TAN,
- &board_A4001N1,
- &board_dsl_274xb_f1,
-@@ -1221,6 +1294,7 @@ static struct of_device_id const bcm963x
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -93,6 +93,60 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5381u_fixups[] = {
-+ { .offset = 97, .value = 0xfee5 },
-+ { .offset = 98, .value = 0x157c },
-+ { .offset = 99, .value = 0xfae7 },
-+ { .offset = 113, .value = 0xfefa },
-+ { .offset = 114, .value = 0x15d6 },
-+ { .offset = 115, .value = 0xfaf8 },
-+};
-+
-+static struct board_info __initdata board_AR5381u = {
-+ .name = "96328A-1241N",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5381u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata ar5387un_fixups[] = {
- { .offset = 2, .value = 0x05bb },
- { .offset = 65, .value = 0x1204 },
-@@ -1223,6 +1277,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
- &board_A4001N1,
-@@ -1294,6 +1349,7 @@ static struct of_device_id const bcm963x
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -411,6 +411,20 @@ static struct board_info __initdata boar
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
- };
-+
-+static struct board_info __initdata board_rta770bw = {
-+ .name = "RTA770BW",
-+ .expected_cpu_id = 0x6345,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
-@@ -1291,6 +1305,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-+ &board_rta770bw,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
-@@ -1361,6 +1376,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
-+ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -12,6 +12,7 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
-+#include <linux/pci_ids.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -1123,6 +1124,92 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HW556_C = {
-+ .name = "HW556_C",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0xeffe00,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+static struct board_info __initdata board_HW556_A = {
-+ .name = "HW556_A",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0xf7e000,
-+ .slot = 1,
-+ .endian_check = 1,
-+ .led_pin = 2,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+static struct board_info __initdata board_HW556_B = {
-+ .name = "HW556_B",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0xefe000,
-+ .slot = 1,
-+ .endian_check = 1,
-+ .led_pin = 2,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- /* T-Home Speedport W 303V Typ B */
- static struct board_info __initdata board_spw303v = {
- .name = "96358-502V",
-@@ -1341,6 +1428,9 @@ static const struct board_info __initcon
- &board_nb4_fxc_r1,
- &board_ct6373_1,
- &board_HW553,
-+ &board_HW556_A,
-+ &board_HW556_B,
-+ &board_HW556_C,
- &board_spw303v,
- &board_DVAG3810BN,
- #endif
-@@ -1413,6 +1503,9 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
-+ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
-+ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
-+ { .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -426,6 +426,25 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+// Actually this board is the very same as the rta770bw,
-+// where the additional 'b' within the name just
-+// just indicates 'Annex B'. The ADSL Modem itself is able
-+// to handle both Annex A as well as Annex B -
-+// the loaded firmware makes the only difference
-+static struct board_info __initdata board_rta770w = {
-+ .name = "RTA770W",
-+ .expected_cpu_id = 0x6345,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
-@@ -1393,6 +1412,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
- &board_rta770bw,
-+ &board_rta770w,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
-@@ -1467,6 +1487,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
- { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
-+ { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+++ /dev/null
-From: Marcin Jurkowski <marcin1j@gmail.com>
-Date: Thu, 31 Oct 2013 22:33:10 +0000
-Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
- router
-
-This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
-router.
-It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
-modem equipped with 64 MiB RAM and 8 MiB flash.
-
-Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -341,6 +341,43 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_FAST2704V2 = {
-+ .name = "F@ST2704V2",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .has_usbd = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -1402,6 +1439,7 @@ static const struct board_info __initcon
- &board_963281TAN,
- &board_A4001N1,
- &board_dsl_274xb_f1,
-+ &board_FAST2704V2,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -1477,6 +1515,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
-+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
-From: Max Staudt <openwrt.max@enpas.org>
-Date: Wed, 15 Jan 2014 18:51:13 +0000
-Subject: [PATCH] brcm63xx: F@ST2504n board support (Linux-3.10.26)
-
-Signed-off-by: Max Staudt <openwrt.max@enpas.org>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1332,6 +1332,41 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_fast2504n = {
-+ .name = "F@ST2504n",
-+ .expected_cpu_id = 0x6362,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6362 */
-
- /*
-@@ -1495,6 +1530,7 @@ static const struct board_info __initcon
-
- #ifdef CONFIG_BCM63XX_CPU_6362
- &board_nb6,
-+ &board_fast2504n,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-@@ -1576,6 +1612,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6362
-+ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
- { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -50,6 +50,55 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_3368 */
-
- /*
-+ * known 6318 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+static struct board_info __initdata board_96318ref = {
-+ .name = "96318REF",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6318 */
-+
-+/*
- * known 6328 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_6328
-@@ -1467,6 +1516,9 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_3368
- &board_cvg834g,
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ &board_96318ref,
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_AR5381u,
-@@ -1544,6 +1596,9 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_3368
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -96,6 +96,50 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_96318ref_p300 = {
-+ .name = "96318REF_P300",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -1518,6 +1562,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
-+ &board_96318ref_p300,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -1598,6 +1643,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
-+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1554,6 +1554,50 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-+ * known 63268/63269 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+static struct board_info __initdata board_963269bhr = {
-+ .name = "963269BHR",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_pci = 1,
-+
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_63268 */
-+
-+/*
- * all boards
- */
- static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -1634,6 +1678,9 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+ &board_963269bhr,
-+#endif
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-@@ -1721,6 +1768,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
-From: "mexit@o2.pl" <mexit@o2.pl>
-Date: Sun, 24 Nov 2013 21:33:38 +0000
-Subject: [PATCH 4/5] brcm63xx: add support for Asmax AR 1004g router
-
-Support for Asmax AR 1004g router
-
-Signed-off-by: Adrian Feliks <mexit@o2.pl>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -647,6 +647,21 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_96348gw_10_AR1004G = {
-+ .name = "AR1004G",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
-
- /* BT Voyager 2110 */
- static struct board_info __initdata board_V2110 = {
-@@ -1649,6 +1664,7 @@ static const struct board_info __initcon
- &board_96348A_122,
- &board_CPVA502plus,
- &board_96348W3,
-+ &board_96348gw_10_AR1004G,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -1713,6 +1729,7 @@ static struct of_device_id const bcm963x
- { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
-+ { .compatible = "asmax,ar-1004g", .data = &board_96348gw_10_AR1004G, },
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1610,6 +1610,51 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_vw6339gu = {
-+ .name = "VW6339GU",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN2",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN4",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 7,
-+ .name = "WAN",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_63268 */
-
- /*
-@@ -1696,6 +1741,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- &board_963269bhr,
-+ &board_vw6339gu,
- #endif
- };
-
-@@ -1786,6 +1832,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
-+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1572,6 +1572,64 @@ static struct board_info __initdata boar
- * known 63268/63269 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_63268
-+static struct board_info __initdata board_963268bu_p300 = {
-+ .name = "963268BU_P300",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 17,
-+ .name = "FE1",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "GbE2",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0,
-+ .name = "GbE3",
-+ },
-+
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "GbE1",
-+ },
-+
-+ [6] = {
-+ .used = 1,
-+ .phy_id = 24,
-+ .name = "GbE4",
-+ },
-+
-+ [7] = {
-+ .used = 1,
-+ .phy_id = 25,
-+ .name = "GbE5",
-+ },
-+ },
-+ },
-+};
-+
- static struct board_info __initdata board_963269bhr = {
- .name = "963269BHR",
- .expected_cpu_id = 0x63268,
-@@ -1740,6 +1798,7 @@ static const struct board_info __initcon
- &board_96368mvngr,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ &board_963268bu_p300,
- &board_963269bhr,
- &board_vw6339gu,
- #endif
-@@ -1831,6 +1890,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -13,6 +13,8 @@
- #include <linux/kernel.h>
- #include <linux/string.h>
- #include <linux/pci_ids.h>
-+#include <linux/platform_data/b53.h>
-+#include <linux/spi/spi.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -1566,6 +1568,47 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct sprom_fixup __initdata wap5813n_fixups[] = {
-+ { .offset = 97, .value = 0xfeed },
-+ { .offset = 98, .value = 0x15d1 },
-+ { .offset = 99, .value = 0xfb0d },
-+ { .offset = 113, .value = 0xfef7 },
-+ { .offset = 114, .value = 0x15f7 },
-+ { .offset = 115, .value = 0xfb1a },
-+};
-+
-+static struct board_info __initdata board_WAP5813n = {
-+ .name = "96369R-1231N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = wap5813n_fixups,
-+ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-@@ -1796,6 +1839,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- &board_963268bu_p300,
-@@ -1888,6 +1932,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
-+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1569,6 +1569,59 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct sprom_fixup __initdata vr3025u_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3025u = {
-+ .name = "96368M-1541N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3025u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -1839,6 +1892,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_VR3025u,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -1932,6 +1986,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
-+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1622,6 +1622,59 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vr3025un_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3025un = {
-+ .name = "96368M-1341N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3025un_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -1893,6 +1946,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_VR3025u,
-+ &board_VR3025un,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -1987,6 +2041,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
-+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1578,6 +1578,48 @@ static struct sprom_fixup __initdata vr3
- { .offset = 115, .value = 0xfad9 },
- };
-
-+static struct board_info __initdata board_P870HW51A_V2 = {
-+ .name = "P870HW-51a_v2",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_VR3025u = {
- .name = "96368M-1541N",
- .expected_cpu_id = 0x6368,
-@@ -1945,6 +1987,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
- &board_WAP5813n,
-@@ -2043,6 +2086,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1264,6 +1264,36 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HW520 = {
-+ .name = "HW6358GW_B",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enet0 = 1,
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW553 = {
- .name = "HW553",
- .expected_cpu_id = 0x6358,
-@@ -1971,6 +2001,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_ct6373_1,
-+ &board_HW520,
- &board_HW553,
- &board_HW556_A,
- &board_HW556_B,
-@@ -2063,6 +2094,7 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
-+ { .compatible = "huawei,echolife-hg520v", .data = &board_HW520, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
- { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
- { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -349,6 +349,49 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_A4001N = {
-+ .name = "96328dg2x2",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- static struct board_info __initdata board_A4001N1 = {
- .name = "963281T_TEF",
- .expected_cpu_id = 0x6328,
-@@ -1952,6 +1995,7 @@ static const struct board_info __initcon
- &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
-+ &board_A4001N,
- &board_A4001N1,
- &board_dsl_274xb_f1,
- &board_FAST2704V2,
-@@ -2040,6 +2084,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -142,6 +142,74 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
-+ { .offset = 96, .value = 0x2046 },
-+ { .offset = 97, .value = 0xfe9d },
-+ { .offset = 98, .value = 0x1854 },
-+ { .offset = 99, .value = 0xfa59 },
-+ { .offset = 112, .value = 0x2046 },
-+ { .offset = 113, .value = 0xfe79 },
-+ { .offset = 114, .value = 0x17f5 },
-+ { .offset = 115, .value = 0xfa47 },
-+ { .offset = 161, .value = 0x2222 },
-+ { .offset = 162, .value = 0x2222 },
-+ { .offset = 169, .value = 0x2222 },
-+ { .offset = 170, .value = 0x2222 },
-+ { .offset = 171, .value = 0x5555 },
-+ { .offset = 172, .value = 0x5555 },
-+ { .offset = 173, .value = 0x4444 },
-+ { .offset = 174, .value = 0x4444 },
-+ { .offset = 175, .value = 0x5555 },
-+ { .offset = 176, .value = 0x5555 },
-+};
-+
-+static struct board_info __initdata board_dsl_2751b_d1 = {
-+ .name = "AW5200B",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = dsl2751b_e1_fixups,
-+ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -1989,6 +2057,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
- &board_96318ref_p300,
-+ &board_dsl_2751b_d1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -2082,6 +2151,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
-+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n", .data = &board_A4001N, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1710,6 +1710,30 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_DGND3700v1_3800B = {
-+ .name = "DGND3700v1_3800B",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2131,6 +2155,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_DGND3700v1_3800B,
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2233,6 +2258,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1375,6 +1375,31 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_homehub2a = {
-+ .name = "HOMEHUB2A",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4322,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW520 = {
- .name = "HW6358GW_B",
- .expected_cpu_id = 0x6358,
-@@ -2138,6 +2163,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_ct6373_1,
-+ &board_homehub2a,
- &board_HW520,
- &board_HW553,
- &board_HW556_A,
-@@ -2247,6 +2273,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
- { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
-+ { .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6362
- { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1759,6 +1759,52 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HG655b = {
-+ .name = "HW65x",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0x7c0000,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2182,6 +2228,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_HG655b,
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2285,6 +2332,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -210,6 +210,45 @@ static struct board_info __initdata boar
- .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
- },
- };
-+
-+static struct board_info __initdata board_FAST2704N = {
-+ .name = "F@ST2704N",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -2153,6 +2192,7 @@ static const struct board_info __initcon
- &board_96318ref,
- &board_96318ref_p300,
- &board_dsl_2751b_d1,
-+ &board_FAST2704N,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -2250,6 +2290,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
- { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
-+ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n", .data = &board_A4001N, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1992,6 +1992,59 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vr3026e_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3026e = {
-+ .name = "96368MT-1341N1",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3026e_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -2272,6 +2325,7 @@ static const struct board_info __initcon
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-+ &board_VR3026e,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -2372,6 +2426,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
-+ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -623,6 +623,50 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_R5010UNV2 = {
-+ .name = "96328ang",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -2256,6 +2300,7 @@ static const struct board_info __initcon
- &board_A4001N1,
- &board_dsl_274xb_f1,
- &board_FAST2704V2,
-+ &board_R5010UNV2,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -2354,6 +2399,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
-+ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
- { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1888,6 +1888,52 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HG622 = {
-+ .name = "96368MVWG_hg622",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0xfa0000,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2366,6 +2412,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
- &board_VR3025u,
-@@ -2474,6 +2521,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1842,6 +1842,42 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata EVG2000_fixups[] = {
-+ { .offset = 219, .value = 0xec08 },
-+};
-+
-+static struct board_info __initdata board_EVG2000 = {
-+ .name = "96369PVG",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+ .use_fallback_sprom = 1,
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4322,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = EVG2000_fixups,
-+ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
-+ },
-+};
-+
- static struct board_info __initdata board_HG655b = {
- .name = "HW65x",
- .expected_cpu_id = 0x6368,
-@@ -2412,6 +2448,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_EVG2000,
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-@@ -2524,6 +2561,7 @@ static struct of_device_id const bcm963x
- { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
-+ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1732,6 +1732,51 @@ static struct board_info __initdata boar
- * known 6368 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_6368
-+static struct board_info __initdata board_AV4202N = {
-+ .name = "96368_Swiss_S1",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+ .use_fallback_sprom = 1,
-+ .fallback_sprom = {
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+
-+};
-+
- static struct board_info __initdata board_96368mvwg = {
- .name = "96368MVWG",
- .expected_cpu_id = 0x6368,
-@@ -2445,6 +2490,7 @@ static const struct board_info __initcon
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ &board_AV4202N,
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-@@ -2552,6 +2598,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2216,6 +2216,106 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vh4032n_fixups[] = {
-+ { .offset = 2, .value = 0x04d2 },
-+ { .offset = 4, .value = 0x4350 },
-+ { .offset = 65, .value = 0x1300 },
-+ { .offset = 68, .value = 0x0402 },
-+ { .offset = 70, .value = 0x0090 },
-+ { .offset = 71, .value = 0x4c19 },
-+ { .offset = 72, .value = 0x2345 },
-+ { .offset = 87, .value = 0x0315 },
-+ { .offset = 88, .value = 0x0315 },
-+ { .offset = 96, .value = 0x2048 },
-+ { .offset = 97, .value = 0xfed7 },
-+ { .offset = 98, .value = 0x15a6 },
-+ { .offset = 99, .value = 0xfaee },
-+ { .offset = 100, .value = 0x3e3a },
-+ { .offset = 101, .value = 0x3a36 },
-+ { .offset = 102, .value = 0xff7f },
-+ { .offset = 103, .value = 0x11b9 },
-+ { .offset = 104, .value = 0xfc53 },
-+ { .offset = 105, .value = 0xffe6 },
-+ { .offset = 106, .value = 0xfdd2 },
-+ { .offset = 107, .value = 0xfe49 },
-+ { .offset = 108, .value = 0xff6a },
-+ { .offset = 109, .value = 0x136e },
-+ { .offset = 110, .value = 0xfbed },
-+ { .offset = 111, .value = 0x0000 },
-+ { .offset = 112, .value = 0x2048 },
-+ { .offset = 113, .value = 0xfee2 },
-+ { .offset = 114, .value = 0x15e5 },
-+ { .offset = 115, .value = 0xfaed },
-+ { .offset = 116, .value = 0x3e3a },
-+ { .offset = 117, .value = 0x3a36 },
-+ { .offset = 118, .value = 0xffc8 },
-+ { .offset = 119, .value = 0x12b8 },
-+ { .offset = 120, .value = 0xfca1 },
-+ { .offset = 121, .value = 0xff9b },
-+ { .offset = 122, .value = 0x122a },
-+ { .offset = 123, .value = 0xfcc8 },
-+ { .offset = 124, .value = 0xff95 },
-+ { .offset = 125, .value = 0x146b },
-+ { .offset = 126, .value = 0xfbba },
-+ { .offset = 127, .value = 0x0000 },
-+ { .offset = 161, .value = 0x0000 },
-+ { .offset = 162, .value = 0x0000 },
-+ { .offset = 169, .value = 0x0000 },
-+ { .offset = 170, .value = 0x0000 },
-+ { .offset = 171, .value = 0x0000 },
-+ { .offset = 172, .value = 0x0000 },
-+ { .offset = 173, .value = 0x0000 },
-+ { .offset = 174, .value = 0x0000 },
-+ { .offset = 175, .value = 0x0000 },
-+ { .offset = 176, .value = 0x0000 },
-+ { .offset = 219, .value = 0x1108 },
-+};
-+
-+static struct board_info __initdata board_VH4032N = {
-+ .name = "VH4032N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vh4032n_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -2498,6 +2598,7 @@ static const struct board_info __initcon
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-+ &board_VH4032N,
- &board_VR3025u,
- &board_VR3025un,
- &board_VR3026e,
-@@ -2609,6 +2710,7 @@ static struct of_device_id const bcm963x
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
-+ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2066,6 +2066,29 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_R1000H = {
-+ .name = "R1000H",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+
- static struct board_info __initdata board_VR3025u = {
- .name = "96368M-1541N",
- .expected_cpu_id = 0x6368,
-@@ -2598,6 +2621,7 @@ static const struct board_info __initcon
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-+ &board_R1000H,
- &board_VH4032N,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2699,6 +2723,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
- { .compatible = "adb,av4202n", .data = &board_AV4202N, },
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -143,6 +143,67 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5315u_fixups[] = {
-+ { .offset = 6, .value = 0x1c00 },
-+ { .offset = 65, .value = 0x1255 },
-+ { .offset = 97, .value = 0xfe55 },
-+ { .offset = 98, .value = 0x171d },
-+ { .offset = 99, .value = 0xfa42 },
-+ { .offset = 113, .value = 0xfeb7 },
-+ { .offset = 114, .value = 0x18cd },
-+ { .offset = 115, .value = 0xfa4f },
-+ { .offset = 162, .value = 0x6444 },
-+ { .offset = 170, .value = 0x6444 },
-+ { .offset = 172, .value = 0x6444 },
-+};
-+
-+static struct board_info __initdata board_AR5315u = {
-+ .name = "96318A-1441N1",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5315u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
- { .offset = 96, .value = 0x2046 },
- { .offset = 97, .value = 0xfe9d },
-@@ -2538,6 +2599,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
- &board_96318ref_p300,
-+ &board_AR5315u,
- &board_dsl_2751b_d1,
- &board_FAST2704N,
- #endif
-@@ -2643,6 +2705,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
-+ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, },
- { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
- { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -357,6 +357,73 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ad1018_fixups[] = {
-+ { .offset = 6, .value = 0x1c00 },
-+ { .offset = 65, .value = 0x1256 },
-+ { .offset = 96, .value = 0x2046 },
-+ { .offset = 97, .value = 0xfe69 },
-+ { .offset = 98, .value = 0x1726 },
-+ { .offset = 99, .value = 0xfa5c },
-+ { .offset = 112, .value = 0x2046 },
-+ { .offset = 113, .value = 0xfea8 },
-+ { .offset = 114, .value = 0x1978 },
-+ { .offset = 115, .value = 0xfa26 },
-+ { .offset = 161, .value = 0x2222 },
-+ { .offset = 169, .value = 0x2222 },
-+ { .offset = 171, .value = 0x2222 },
-+ { .offset = 173, .value = 0x2222 },
-+ { .offset = 174, .value = 0x4444 },
-+ { .offset = 175, .value = 0x2222 },
-+ { .offset = 176, .value = 0x4444 },
-+};
-+
-+static struct board_info __initdata board_AD1018 = {
-+ .name = "96328avngr",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "FIBRE",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ad1018_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata ar5381u_fixups[] = {
- { .offset = 97, .value = 0xfee5 },
- { .offset = 98, .value = 0x157c },
-@@ -2605,6 +2672,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AD1018,
- &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
-@@ -2719,6 +2787,7 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
- { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
-+ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2654,6 +2654,49 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_BSKYB_63168 = {
-+ .name = "BSKYB_63168",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 0,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_63268 */
-
- /*
-@@ -2762,6 +2805,7 @@ static const struct board_info __initcon
- &board_963268bu_p300,
- &board_963269bhr,
- &board_vw6339gu,
-+ &board_BSKYB_63168,
- #endif
- };
-
-@@ -2874,6 +2918,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
-+ { .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
---- a/arch/mips/bcm63xx/nvram.c
-+++ b/arch/mips/bcm63xx/nvram.c
-@@ -24,6 +24,12 @@
- static struct bcm963xx_nvram nvram;
- static int mac_addr_used;
-
-+/*
-+ * Required export for WL
-+ */
-+u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 };
-+EXPORT_SYMBOL(nvram_buf);
-+
- void __init bcm63xx_nvram_init(void *addr)
- {
- u32 crc, expected_crc;
---- a/arch/mips/mm/cache.c
-+++ b/arch/mips/mm/cache.c
-@@ -64,6 +64,7 @@ void (*_dma_cache_wback)(unsigned long s
- void (*_dma_cache_inv)(unsigned long start, unsigned long size);
-
- EXPORT_SYMBOL(_dma_cache_wback_inv);
-+EXPORT_SYMBOL(_dma_cache_inv);
-
- #endif /* CONFIG_DMA_NONCOHERENT || CONFIG_DMA_MAYBE_COHERENT */
-
+++ /dev/null
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -8,6 +8,7 @@
- */
-
- #include <linux/init.h>
-+#include <linux/export.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
- #include <linux/platform_device.h>
-@@ -387,7 +388,19 @@ struct fallback_sprom_match {
- struct ssb_sprom sprom;
- };
-
--static struct fallback_sprom_match fallback_sprom;
-+struct fallback_sprom_match fallback_sprom;
-+
-+int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out)
-+{
-+ if (pci_bus != fallback_sprom.pci_bus ||
-+ pci_slot != fallback_sprom.pci_dev)
-+ pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ pci_bus, pci_slot);
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+}
-+EXPORT_SYMBOL(bcm63xx_get_fallback_sprom);
-
- #if defined(CONFIG_SSB_PCIHOST)
- int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+++ /dev/null
-From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001
-From: Miguel GAIO <miguel.gaio@efixo.com>
-Date: Fri, 6 Jul 2012 14:12:33 +0200
-Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support
-
----
- drivers/net/phy/rtl8367.c | 5 +++++
- 1 files changed, 5 insertions(+), 0 deletions(-)
-
---- a/drivers/net/phy/rtl8367.c
-+++ b/drivers/net/phy/rtl8367.c
-@@ -146,6 +146,10 @@
- #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1
- #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7
-
-+#define RTL8367_PHY_AD_REG 0x130f
-+#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5
-+#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0
-+
- #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x))
- #define RTL8367_DI_FORCE_MODE BIT(12)
- #define RTL8367_DI_FORCE_NWAY BIT(7)
-@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct
- case RTL8367_EXTIF_MODE_RGMII_33V:
- REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
- REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
-+ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0);
- break;
-
- case RTL8367_EXTIF_MODE_TMII_MAC:
+++ /dev/null
-From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 6 Apr 2014 22:33:16 +0200
-Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp
-
-Unligned memcpy_fromio randomly fails with an unaligned dst. Work around
-it by ensuring we are always doing aligned copies.
-
-Should fix filename corruption in jffs2 with SMP.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- fs/jffs2/nodelist.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/fs/jffs2/nodelist.h
-+++ b/fs/jffs2/nodelist.h
-@@ -259,7 +259,7 @@ struct jffs2_full_dirent
- uint32_t ino; /* == zero for unlink */
- unsigned int nhash;
- unsigned char type;
-- unsigned char name[0];
-+ unsigned char name[0] __attribute__((aligned((sizeof(long)))));
- };
-
- /*
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2239,6 +2239,10 @@ static int bcm_enetsw_open(struct net_de
-
- rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
- rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
-+ if (BCMCPU_IS_63268()) {
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN;
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN;
-+ }
- enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
- }
-
+++ /dev/null
-From 80a2f983e9f44dbc3e01ae31c62d877846a7f791 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:19 +0100
-Subject: [PATCH 01/11] MIPS: BCM63XX: add USB host clock enable delay
-
-Knowledge of the clock setup delay should remain at the clock level (so
-it can be clock specific and CPU specific). Add the 100 milliseconds
-required clock delay for the USB host clock when it gets enabled.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 5 +++++
- 1 file changed, 5 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -214,6 +214,11 @@ static void usbh_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+ else
-+ return;
-+
-+ if (enable)
-+ msleep(100);
- }
-
- static struct clk clk_usbh = {
+++ /dev/null
-From 8e9bf528a122741f0171b89c297b63041116d704 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:20 +0100
-Subject: [PATCH 02/11] MIPS: BCM63XX: add USB device clock enable delay to
- clock code
-
-This patch adds the required 10 micro seconds delay to the USB device
-clock enable operation. Put this where the correct clock knowledege is,
-which is in the clock code, and remove this delay from the bcm63xx_udc
-gadget driver where it was before.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/clk.c | 5 +++++
- drivers/usb/gadget/bcm63xx_udc.c | 1 -
- 2 files changed, 5 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -236,6 +236,11 @@ static void usbd_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+ else
-+ return;
-+
-+ if (enable)
-+ udelay(10);
- }
-
- static struct clk clk_usbd = {
---- a/drivers/usb/gadget/udc/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
-@@ -402,7 +402,6 @@ static inline void set_clocks(struct bcm
- if (is_enabled) {
- clk_enable(udc->usbh_clk);
- clk_enable(udc->usbd_clk);
-- udelay(10);
- } else {
- clk_disable(udc->usbd_clk);
- clk_disable(udc->usbh_clk);
+++ /dev/null
-From ac9b0b574d54be28b300bf99ffe092a2c589484f Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:21 +0100
-Subject: [PATCH 03/11] MIPS: BCM63XX: move code touching the USB private
- register
-
-This patch moves the code touching the USB private register in the
-bcm63xx USB gadget driver to arch/mips/bcm63xx/usb-common.c in
-preparation for adding support for OHCI and EHCI host controllers which
-will also touch the USB private register.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/usb-common.c | 53 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 9 ++++
- drivers/usb/gadget/bcm63xx_udc.c | 27 ++--------
- 4 files changed, 67 insertions(+), 24 deletions(-)
- create mode 100644 arch/mips/bcm63xx/usb-common.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-usbd.o
-+ dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -0,0 +1,53 @@
-+/*
-+ * Broadcom BCM63xx common USB device configuration code
-+ *
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
-+ * Copyright (C) 2012 Broadcom Corporation
-+ *
-+ */
-+#include <linux/export.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
-+{
-+ u32 val;
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+ if (is_device) {
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ } else {
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ }
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ if (is_device)
-+ val |= USBH_PRIV_SWAP_USBD_MASK;
-+ else
-+ val &= ~USBH_PRIV_SWAP_USBD_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
-+
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
-+{
-+ u32 val;
-+
-+ val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-+ if (is_on)
-+ val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ else
-+ val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-+ bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+}
-+EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -0,0 +1,9 @@
-+#ifndef BCM63XX_USB_PRIV_H_
-+#define BCM63XX_USB_PRIV_H_
-+
-+#include <linux/types.h>
-+
-+void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
-+void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+
-+#endif /* BCM63XX_USB_PRIV_H_ */
---- a/drivers/usb/gadget/udc/bcm63xx_udc.c
-+++ b/drivers/usb/gadget/udc/bcm63xx_udc.c
-@@ -35,6 +35,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-+#include <bcm63xx_usb_priv.h>
-
- #define DRV_MODULE_NAME "bcm63xx_udc"
-
-@@ -879,22 +880,7 @@ static void bcm63xx_select_phy_mode(stru
- bcm_gpio_writel(val, GPIO_PINMUX_OTHR_REG);
- }
-
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-- if (is_device) {
-- val |= (portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- } else {
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_HOSTB_SHIFT);
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- }
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
--
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-- if (is_device)
-- val |= USBH_PRIV_SWAP_USBD_MASK;
-- else
-- val &= ~USBH_PRIV_SWAP_USBD_MASK;
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+ bcm63xx_usb_priv_select_phy_mode(portmask, is_device);
- }
-
- /**
-@@ -908,14 +894,9 @@ static void bcm63xx_select_phy_mode(stru
- */
- static void bcm63xx_select_pullup(struct bcm63xx_udc *udc, bool is_on)
- {
-- u32 val, portmask = BIT(udc->pd->port_no);
-+ u32 portmask = BIT(udc->pd->port_no);
-
-- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
-- if (is_on)
-- val &= ~(portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- else
-- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
-- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+ bcm63xx_usb_priv_select_pullup(portmask, is_on);
- }
-
- /**
+++ /dev/null
-From 28758a9da77954ed323f86123ef448c6a563c037 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:22 +0100
-Subject: [PATCH 04/11] MIPS: BCM63XX: add OHCI/EHCI configuration bits to
- common USB code
-
-This patch updates the common USB code touching the USB private
-registers with the specific bits to properly enable OHCI and EHCI
-controllers on BCM63xx SoCs. As a result we now need to protect access
-to Read Modify Write sequences using a spinlock because we cannot
-guarantee that any of the exposed helper will not be called
-concurrently.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/usb-common.c | 97 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_usb_priv.h | 2 +
- 2 files changed, 99 insertions(+)
-
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -5,10 +5,12 @@
- * License. See the file "COPYING" in the main directory of this archive
- * for more details.
- *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Copyright (C) 2012 Kevin Cernekee <cernekee@gmail.com>
- * Copyright (C) 2012 Broadcom Corporation
- *
- */
-+#include <linux/spinlock.h>
- #include <linux/export.h>
-
- #include <bcm63xx_cpu.h>
-@@ -16,9 +18,14 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_usb_priv.h>
-
-+static DEFINE_SPINLOCK(usb_priv_reg_lock);
-+
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device)
- {
- u32 val;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- if (is_device) {
-@@ -36,12 +43,17 @@ void bcm63xx_usb_priv_select_phy_mode(u3
- else
- val &= ~USBH_PRIV_SWAP_USBD_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_SWAP_6368_REG);
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_phy_mode);
-
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on)
- {
- u32 val;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-
- val = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_UTMI_CTL_6368_REG);
- if (is_on)
-@@ -49,5 +61,90 @@ void bcm63xx_usb_priv_select_pullup(u32
- else
- val |= (portmask << USBH_PRIV_UTMI_CTL_NODRIV_SHIFT);
- bcm_rset_writel(RSET_USBH_PRIV, val, USBH_PRIV_UTMI_CTL_6368_REG);
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
- }
- EXPORT_SYMBOL(bcm63xx_usb_priv_select_pullup);
-+
-+/* The following array represents the meaning of the DESC/DATA
-+ * endian swapping with respect to the CPU configured endianness
-+ *
-+ * DATA ENDN mmio descriptor
-+ * 0 0 BE invalid
-+ * 0 1 BE LE
-+ * 1 0 BE BE
-+ * 1 1 BE invalid
-+ *
-+ * Since BCM63XX SoCs are configured to be in big-endian mode
-+ * we want configuration at line 3.
-+ */
-+void bcm63xx_usb_priv_ohci_cfg_set(void)
-+{
-+ u32 reg;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+ if (BCMCPU_IS_6348())
-+ bcm_rset_writel(RSET_OHCI_PRIV, 0, OHCI_PRIV_REG);
-+ else if (BCMCPU_IS_6358()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+ /*
-+ * The magic value comes for the original vendor BSP
-+ * and is needed for USB to work. Datasheet does not
-+ * help, so the magic value is used as-is.
-+ */
-+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+ USBH_PRIV_TEST_6358_REG);
-+
-+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ }
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
-+
-+void bcm63xx_usb_priv_ehci_cfg_set(void)
-+{
-+ u32 reg;
-+ unsigned long flags;
-+
-+ spin_lock_irqsave(&usb_priv_reg_lock, flags);
-+
-+ if (BCMCPU_IS_6358()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6358_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6358_REG);
-+
-+ /*
-+ * The magic value comes for the original vendor BSP
-+ * and is needed for USB to work. Datasheet does not
-+ * help, so the magic value is used as-is.
-+ */
-+ bcm_rset_writel(RSET_USBH_PRIV, 0x1c0020,
-+ USBH_PRIV_TEST_6358_REG);
-+
-+ } else if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ }
-+
-+ spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_usb_priv.h
-@@ -5,5 +5,7 @@
-
- void bcm63xx_usb_priv_select_phy_mode(u32 portmask, bool is_device);
- void bcm63xx_usb_priv_select_pullup(u32 portmask, bool is_on);
-+void bcm63xx_usb_priv_ohci_cfg_set(void);
-+void bcm63xx_usb_priv_ehci_cfg_set(void);
-
- #endif /* BCM63XX_USB_PRIV_H_ */
+++ /dev/null
-From 94ec618bd1a6b07fafbbfc9bcc54e7f9360ff9a0 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:23 +0100
-Subject: [PATCH 05/11] MIPS: BCM63XX: introduce BCM63XX_OHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-OHCI controller, and ensures that all relevant OHCI-related
-configuration options are correctly selected. So far, OHCI support is
-available for the 6328, 6348, 6358 and 6358 SoCs.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 15 ++++++++++-----
- 1 file changed, 10 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -7,10 +7,17 @@ config BCM63XX_CPU_3368
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-
-+config BCM63XX_OHCI
-+ bool
-+ select USB_ARCH_HAS_OHCI
-+ select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
-+ select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -25,21 +32,25 @@ config BCM63XX_CPU_6348
- bool "support 6348 CPU"
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6358
- bool "support 6358 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From 30d22baef255c99a12c4858ce4ab0d45f0d8c9ae Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:24 +0100
-Subject: [PATCH 06/11] MIPS: BCM63XX: add support for the on-chip OHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip OHCI controller which can be
-driven by the ohci-platform generic driver by using specific power
-on/off/suspend callback to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/dev-usb-ohci.c | 94 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h | 6 ++
- 3 files changed, 101 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ohci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-usbd.o usb-common.o
-+ dev-usb-ohci.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -0,0 +1,94 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/usb/ohci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+
-+static struct resource ohci_resources[] = {
-+ {
-+ .start = -1, /* filled at runtime */
-+ .end = -1, /* filled at runtime */
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = -1, /* filled at runtime */
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 ohci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ohci_power_on(struct platform_device *pdev)
-+{
-+ usb_host_clock = clk_get(&pdev->dev, "usbh");
-+ if (IS_ERR_OR_NULL(usb_host_clock))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(usb_host_clock);
-+
-+ bcm63xx_usb_priv_ohci_cfg_set();
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_ohci_power_off(struct platform_device *pdev)
-+{
-+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+ clk_disable_unprepare(usb_host_clock);
-+ clk_put(usb_host_clock);
-+ }
-+}
-+
-+static struct usb_ohci_pdata bcm63xx_ohci_pdata = {
-+ .big_endian_desc = 1,
-+ .big_endian_mmio = 1,
-+ .no_big_frame_no = 1,
-+ .num_ports = 1,
-+ .power_on = bcm63xx_ohci_power_on,
-+ .power_off = bcm63xx_ohci_power_off,
-+ .power_suspend = bcm63xx_ohci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ohci_device = {
-+ .name = "ohci-platform",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(ohci_resources),
-+ .resource = ohci_resources,
-+ .dev = {
-+ .platform_data = &bcm63xx_ohci_pdata,
-+ .dma_mask = &ohci_dmamask,
-+ .coherent_dma_mask = DMA_BIT_MASK(32),
-+ },
-+};
-+
-+int __init bcm63xx_ohci_register(void)
-+{
-+ if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
-+ return -ENODEV;
-+
-+ ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
-+ ohci_resources[0].end = ohci_resources[0].start;
-+ ohci_resources[0].end += RSET_OHCI_SIZE - 1;
-+ ohci_resources[1].start = bcm63xx_get_irq_number(IRQ_OHCI0);
-+
-+ return platform_device_register(&bcm63xx_ohci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_OHCI_H_
-+#define BCM63XX_DEV_USB_OHCI_H_
-+
-+int bcm63xx_ohci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_OHCI_H_ */
+++ /dev/null
-From 33ef960aed15f9a98a2c51d8d794cd72418e0be4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:25 +0100
-Subject: [PATCH 07/11] MIPS: BCM63XX: register OHCI controller if board
- enables it
-
-BCM63XX-based boards can control the registration of the OHCI controller
-by setting their has_ohci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to
-register the OHCI controller.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -27,6 +27,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-@@ -881,6 +882,9 @@ int __init board_register_devices(void)
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
-+ if (board.has_ohci0)
-+ bcm63xx_ohci_register();
-+
- /* Generate MAC address for WLAN and register our SPROM,
- * do this after registering enet devices
- */
+++ /dev/null
-From 00da1683364e58c6430a4577123d01037f8faddc Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:26 +0100
-Subject: [PATCH 08/11] MIPS: BCM63XX: introduce BCM63XX_EHCI configuration
- symbol
-
-This configuration symbol can be used by CPUs supporting the on-chip
-EHCI controller, and ensures that all relevant EHCI-related
-configuration options are selected. So far BCM6328, BCM6358 and BCM6368
-have an EHCI controller and do select this symbol. Update
-drivers/usb/host/Kconfig with BCM63XX to update direct unmet
-dependencies.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 9 +++++++++
- drivers/usb/host/Kconfig | 5 +++--
- 2 files changed, 12 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -13,11 +13,18 @@ config BCM63XX_OHCI
- select USB_OHCI_BIG_ENDIAN_DESC if USB_OHCI_HCD
- select USB_OHCI_BIG_ENDIAN_MMIO if USB_OHCI_HCD
-
-+config BCM63XX_EHCI
-+ bool
-+ select USB_ARCH_HAS_EHCI
-+ select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
-+ select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -39,18 +46,21 @@ config BCM63XX_CPU_6358
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select BCM63XX_EHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From e38f13bd6408769c0b565bb1079024f496eee121 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:27 +0100
-Subject: [PATCH 09/11] MIPS: BCM63XX: add support for the on-chip EHCI
- controller
-
-Broadcom BCM63XX SoCs include an on-chip EHCI controller which can be
-driven by the generic ehci-platform driver by using specific power
-on/off/suspend callbacks to manage clocks and hardware specific
-configuration.
-
-Signed-off-by: Maxime Bizon <mbizon@freebox.fr>
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/dev-usb-ehci.c | 92 ++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h | 6 ++
- 3 files changed, 99 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/dev-usb-ehci.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,7 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-ohci.o dev-usb-usbd.o usb-common.o
-+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -0,0 +1,92 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2013 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/platform_device.h>
-+#include <linux/clk.h>
-+#include <linux/delay.h>
-+#include <linux/usb/ehci_pdriver.h>
-+#include <linux/dma-mapping.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_usb_priv.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+
-+static struct resource ehci_resources[] = {
-+ {
-+ .start = -1, /* filled at runtime */
-+ .end = -1, /* filled at runtime */
-+ .flags = IORESOURCE_MEM,
-+ },
-+ {
-+ .start = -1, /* filled at runtime */
-+ .flags = IORESOURCE_IRQ,
-+ },
-+};
-+
-+static u64 ehci_dmamask = DMA_BIT_MASK(32);
-+
-+static struct clk *usb_host_clock;
-+
-+static int bcm63xx_ehci_power_on(struct platform_device *pdev)
-+{
-+ usb_host_clock = clk_get(&pdev->dev, "usbh");
-+ if (IS_ERR_OR_NULL(usb_host_clock))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(usb_host_clock);
-+
-+ bcm63xx_usb_priv_ehci_cfg_set();
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_ehci_power_off(struct platform_device *pdev)
-+{
-+ if (!IS_ERR_OR_NULL(usb_host_clock)) {
-+ clk_disable_unprepare(usb_host_clock);
-+ clk_put(usb_host_clock);
-+ }
-+}
-+
-+static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
-+ .big_endian_desc = 1,
-+ .big_endian_mmio = 1,
-+ .power_on = bcm63xx_ehci_power_on,
-+ .power_off = bcm63xx_ehci_power_off,
-+ .power_suspend = bcm63xx_ehci_power_off,
-+};
-+
-+static struct platform_device bcm63xx_ehci_device = {
-+ .name = "ehci-platform",
-+ .id = -1,
-+ .num_resources = ARRAY_SIZE(ehci_resources),
-+ .resource = ehci_resources,
-+ .dev = {
-+ .platform_data = &bcm63xx_ehci_pdata,
-+ .dma_mask = &ehci_dmamask,
-+ .coherent_dma_mask = DMA_BIT_MASK(32),
-+ },
-+};
-+
-+int __init bcm63xx_ehci_register(void)
-+{
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ return 0;
-+
-+ ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
-+ ehci_resources[0].end = ehci_resources[0].start;
-+ ehci_resources[0].end += RSET_EHCI_SIZE - 1;
-+ ehci_resources[1].start = bcm63xx_get_irq_number(IRQ_EHCI0);
-+
-+ return platform_device_register(&bcm63xx_ehci_device);
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -0,0 +1,6 @@
-+#ifndef BCM63XX_DEV_USB_EHCI_H_
-+#define BCM63XX_DEV_USB_EHCI_H_
-+
-+int bcm63xx_ehci_register(void);
-+
-+#endif /* BCM63XX_DEV_USB_EHCI_H_ */
+++ /dev/null
-From 709ef2034f5ba06da35f89856ad7baf2b7a41287 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:28 +0100
-Subject: [PATCH 10/11] MIPS: BCM63XX: register EHCI controller if board
- enables it
-
-BCM63XX-based board can control the registration of the EHCI controller
-by setting their has_ehci0 flag to 1. Handle this in the generic
-code dealing with board registration and call the actual helper to register
-the EHCI controller.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 4 ++++
- 1 file changed, 4 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -27,6 +27,7 @@
- #include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
- #include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-@@ -882,6 +883,9 @@ int __init board_register_devices(void)
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
-+ if (board.has_ehci0)
-+ bcm63xx_ehci_register();
-+
- if (board.has_ohci0)
- bcm63xx_ohci_register();
-
+++ /dev/null
-From 111bbd770441ab34f9da5bb1d85767a9b75227b4 Mon Sep 17 00:00:00 2001
-From: Florian Fainelli <florian@openwrt.org>
-Date: Mon, 28 Jan 2013 20:06:30 +0100
-Subject: [PATCH 12/12] MIPS: BCM63XX: EHCI controller does not support
- overcurrent
-
-This patch sets the ignore_oc flag for the BCM63XX EHCI controller as it
-does not support proper overcurrent reporting.
-
-Signed-off-by: Florian Fainelli <florian@openwrt.org>
----
- arch/mips/bcm63xx/dev-usb-ehci.c | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -61,6 +61,7 @@ static void bcm63xx_ehci_power_off(struc
- static struct usb_ehci_pdata bcm63xx_ehci_pdata = {
- .big_endian_desc = 1,
- .big_endian_mmio = 1,
-+ .ignore_oc = 1,
- .power_on = bcm63xx_ehci_power_on,
- .power_off = bcm63xx_ehci_power_off,
- .power_suspend = bcm63xx_ehci_power_off,
+++ /dev/null
-From a2b8c7f648e168573905818dbb4cb90ca3957c65 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 28 Jun 2017 18:29:43 +0200
-Subject: [PATCH] mtd: bcm63xxpart: move imagetag parsing to its own parser
-
-Move the bcm963xx Image Tag parsing into its own partition parser. This
-Allows reusing the parser with different full flash parsers.
-
-While moving it, rename it to bcm963* to better reflect it isn't chip
-but board specific.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
-I tried to keep the code as-is, to keep the changes as small as
-possible.
-
-One side effect is that the partitions get renumbered, which means any
-root=/dev/mtdblock* will now point to the wrong mtd device. But since
-bcm963xx boards will require these hardcoded in the kernel commandline
-anyway this should b a non issue, as it can be easily updated.
-
-There is no such thing in the mips/bcm63xx defconfig, so nothing to update
-there.
-
- drivers/mtd/Kconfig | 1 +
- drivers/mtd/bcm63xxpart.c | 155 ++----------------------
- drivers/mtd/parsers/Kconfig | 11 ++
- drivers/mtd/parsers/Makefile | 1 +
- drivers/mtd/parsers/parser_imagetag.c | 214 ++++++++++++++++++++++++++++++++++
- 5 files changed, 235 insertions(+), 147 deletions(-)
- create mode 100644 drivers/mtd/parsers/parser_imagetag.c
-
---- a/drivers/mtd/Kconfig
-+++ b/drivers/mtd/Kconfig
-@@ -162,6 +162,7 @@ config MTD_BCM63XX_PARTS
- tristate "BCM63XX CFE partitioning support"
- depends on BCM63XX || BMIPS_GENERIC || COMPILE_TEST
- select CRC32
-+ select MTD_PARSER_IMAGETAG
- help
- This provides partions parsing for BCM63xx devices with CFE
- bootloaders.
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -93,51 +93,19 @@ static int bcm63xx_read_nvram(struct mtd
- return 0;
- }
-
--static int bcm63xx_read_image_tag(struct mtd_info *master, const char *name,
-- loff_t tag_offset, struct bcm_tag *buf)
--{
-- int ret;
-- size_t retlen;
-- u32 computed_crc;
--
-- ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
-- if (ret)
-- return ret;
--
-- if (retlen != sizeof(*buf))
-- return -EIO;
--
-- computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
-- offsetof(struct bcm_tag, header_crc));
-- if (computed_crc == buf->header_crc) {
-- STR_NULL_TERMINATE(buf->board_id);
-- STR_NULL_TERMINATE(buf->tag_version);
--
-- pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
-- name, tag_offset, buf->tag_version, buf->board_id);
--
-- return 0;
-- }
--
-- pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
-- name, tag_offset, buf->header_crc, computed_crc);
-- return 1;
--}
-+static const char * const bcm63xx_cfe_part_types[] = {
-+ "bcm963xx-imagetag",
-+ NULL,
-+};
-
- static int bcm63xx_parse_cfe_nor_partitions(struct mtd_info *master,
- const struct mtd_partition **pparts, struct bcm963xx_nvram *nvram)
- {
-- /* CFE, NVRAM and global Linux are always present */
-- int nrparts = 3, curpart = 0;
-- struct bcm_tag *buf = NULL;
- struct mtd_partition *parts;
-- int ret;
-- unsigned int rootfsaddr, kerneladdr, spareaddr;
-- unsigned int rootfslen, kernellen, sparelen, totallen;
-+ int nrparts = 3, curpart = 0;
- unsigned int cfelen, nvramlen;
- unsigned int cfe_erasesize;
- int i;
-- bool rootfs_first = false;
-
- cfe_erasesize = max_t(uint32_t, master->erasesize,
- BCM963XX_CFE_BLOCK_SIZE);
-@@ -146,83 +114,9 @@ static int bcm63xx_parse_cfe_nor_partiti
- nvramlen = nvram->psi_size * SZ_1K;
- nvramlen = roundup(nvramlen, cfe_erasesize);
-
-- buf = vmalloc(sizeof(struct bcm_tag));
-- if (!buf)
-- return -ENOMEM;
--
-- /* Get the tag */
-- ret = bcm63xx_read_image_tag(master, "rootfs", cfelen, buf);
-- if (!ret) {
-- STR_NULL_TERMINATE(buf->flash_image_start);
-- if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
-- rootfsaddr < BCM963XX_EXTENDED_SIZE) {
-- pr_err("invalid rootfs address: %*ph\n",
-- (int)sizeof(buf->flash_image_start),
-- buf->flash_image_start);
-- goto invalid_tag;
-- }
--
-- STR_NULL_TERMINATE(buf->kernel_address);
-- if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
-- kerneladdr < BCM963XX_EXTENDED_SIZE) {
-- pr_err("invalid kernel address: %*ph\n",
-- (int)sizeof(buf->kernel_address),
-- buf->kernel_address);
-- goto invalid_tag;
-- }
--
-- STR_NULL_TERMINATE(buf->kernel_length);
-- if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
-- pr_err("invalid kernel length: %*ph\n",
-- (int)sizeof(buf->kernel_length),
-- buf->kernel_length);
-- goto invalid_tag;
-- }
--
-- STR_NULL_TERMINATE(buf->total_length);
-- if (kstrtouint(buf->total_length, 10, &totallen)) {
-- pr_err("invalid total length: %*ph\n",
-- (int)sizeof(buf->total_length),
-- buf->total_length);
-- goto invalid_tag;
-- }
--
-- kerneladdr = kerneladdr - BCM963XX_EXTENDED_SIZE;
-- rootfsaddr = rootfsaddr - BCM963XX_EXTENDED_SIZE;
-- spareaddr = roundup(totallen, master->erasesize) + cfelen;
--
-- if (rootfsaddr < kerneladdr) {
-- /* default Broadcom layout */
-- rootfslen = kerneladdr - rootfsaddr;
-- rootfs_first = true;
-- } else {
-- /* OpenWrt layout */
-- rootfsaddr = kerneladdr + kernellen;
-- rootfslen = spareaddr - rootfsaddr;
-- }
-- } else if (ret > 0) {
--invalid_tag:
-- kernellen = 0;
-- rootfslen = 0;
-- rootfsaddr = 0;
-- spareaddr = cfelen;
-- } else {
-- goto out;
-- }
-- sparelen = master->size - spareaddr - nvramlen;
--
-- /* Determine number of partitions */
-- if (rootfslen > 0)
-- nrparts++;
--
-- if (kernellen > 0)
-- nrparts++;
--
- parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
-- if (!parts) {
-- ret = -ENOMEM;
-- goto out;
-- }
-+ if (!parts)
-+ return -ENOMEM;
-
- /* Start building partition list */
- parts[curpart].name = "CFE";
-@@ -230,30 +124,6 @@ invalid_tag:
- parts[curpart].size = cfelen;
- curpart++;
-
-- if (kernellen > 0) {
-- int kernelpart = curpart;
--
-- if (rootfslen > 0 && rootfs_first)
-- kernelpart++;
-- parts[kernelpart].name = "kernel";
-- parts[kernelpart].offset = kerneladdr;
-- parts[kernelpart].size = kernellen;
-- curpart++;
-- }
--
-- if (rootfslen > 0) {
-- int rootfspart = curpart;
--
-- if (kernellen > 0 && rootfs_first)
-- rootfspart--;
-- parts[rootfspart].name = "rootfs";
-- parts[rootfspart].offset = rootfsaddr;
-- parts[rootfspart].size = rootfslen;
-- if (sparelen > 0 && !rootfs_first)
-- parts[rootfspart].size += sparelen;
-- curpart++;
-- }
--
- parts[curpart].name = "nvram";
- parts[curpart].offset = master->size - nvramlen;
- parts[curpart].size = nvramlen;
-@@ -263,22 +133,13 @@ invalid_tag:
- parts[curpart].name = "linux";
- parts[curpart].offset = cfelen;
- parts[curpart].size = master->size - cfelen - nvramlen;
-+ parts[curpart].types = bcm63xx_cfe_part_types;
-
- for (i = 0; i < nrparts; i++)
- pr_info("Partition %d is %s offset %llx and length %llx\n", i,
- parts[i].name, parts[i].offset, parts[i].size);
-
-- pr_info("Spare partition is offset %x and length %x\n", spareaddr,
-- sparelen);
--
- *pparts = parts;
-- ret = 0;
--
--out:
-- vfree(buf);
--
-- if (ret)
-- return ret;
-
- return nrparts;
- }
---- a/drivers/mtd/parsers/Kconfig
-+++ b/drivers/mtd/parsers/Kconfig
-@@ -1,3 +1,14 @@
-+config MTD_PARSER_IMAGETAG
-+ tristate "Parser for BCM963XX Image Tag format partitions"
-+ depends on BCM63XX || BMIPS || COMPILE_TEST
-+ select CRC32
-+ help
-+ Image Tag is the firmware header used by broadcom on their xDSL line
-+ of devices. It is used to describe the offsets and lengths of kernel
-+ and rootfs partitions.
-+ This driver adds support for parsing a partition with an Image Tag
-+ header and creates up to two partitions, kernel and rootfs.
-+
- config MTD_PARSER_TRX
- tristate "Parser for TRX format partitions"
- depends on MTD && (BCM47XX || ARCH_BCM_5301X || COMPILE_TEST)
---- a/drivers/mtd/parsers/Makefile
-+++ b/drivers/mtd/parsers/Makefile
-@@ -1,2 +1,3 @@
-+obj-$(CONFIG_MTD_PARSER_IMAGETAG) += parser_imagetag.o
- obj-$(CONFIG_MTD_PARSER_TRX) += parser_trx.o
- obj-$(CONFIG_MTD_SHARPSL_PARTS) += sharpslpart.o
---- /dev/null
-+++ b/drivers/mtd/parsers/parser_imagetag.c
-@@ -0,0 +1,214 @@
-+/*
-+ * BCM63XX CFE image tag parser
-+ *
-+ * Copyright © 2006-2008 Florian Fainelli <florian@openwrt.org>
-+ * Mike Albon <malbon@openwrt.org>
-+ * Copyright © 2009-2010 Daniel Dickinson <openwrt@cshore.neomailbox.net>
-+ * Copyright © 2011-2013 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify
-+ * it under the terms of the GNU General Public License as published by
-+ * the Free Software Foundation; either version 2 of the License, or
-+ * (at your option) any later version.
-+ *
-+ */
-+
-+#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
-+
-+#include <linux/bcm963xx_tag.h>
-+#include <linux/crc32.h>
-+#include <linux/module.h>
-+#include <linux/kernel.h>
-+#include <linux/sizes.h>
-+#include <linux/slab.h>
-+#include <linux/vmalloc.h>
-+#include <linux/mtd/mtd.h>
-+#include <linux/mtd/partitions.h>
-+
-+/* Ensure strings read from flash structs are null terminated */
-+#define STR_NULL_TERMINATE(x) \
-+ do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
-+
-+static int bcm963xx_read_imagetag(struct mtd_info *master, const char *name,
-+ loff_t tag_offset, struct bcm_tag *buf)
-+{
-+ int ret;
-+ size_t retlen;
-+ u32 computed_crc;
-+
-+ ret = mtd_read(master, tag_offset, sizeof(*buf), &retlen, (void *)buf);
-+ if (ret)
-+ return ret;
-+
-+ if (retlen != sizeof(*buf))
-+ return -EIO;
-+
-+ computed_crc = crc32_le(IMAGETAG_CRC_START, (u8 *)buf,
-+ offsetof(struct bcm_tag, header_crc));
-+ if (computed_crc == buf->header_crc) {
-+ STR_NULL_TERMINATE(buf->board_id);
-+ STR_NULL_TERMINATE(buf->tag_version);
-+
-+ pr_info("%s: CFE image tag found at 0x%llx with version %s, board type %s\n",
-+ name, tag_offset, buf->tag_version, buf->board_id);
-+
-+ return 0;
-+ }
-+
-+ pr_warn("%s: CFE image tag at 0x%llx CRC invalid (expected %08x, actual %08x)\n",
-+ name, tag_offset, buf->header_crc, computed_crc);
-+ return -EINVAL;
-+}
-+
-+static int bcm963xx_parse_imagetag_partitions(struct mtd_info *master,
-+ const struct mtd_partition **pparts,
-+ struct mtd_part_parser_data *data)
-+{
-+ /* CFE, NVRAM and global Linux are always present */
-+ int nrparts = 0, curpart = 0;
-+ struct bcm_tag *buf = NULL;
-+ struct mtd_partition *parts;
-+ int ret;
-+ unsigned int rootfsaddr, kerneladdr, spareaddr, offset;
-+ unsigned int rootfslen, kernellen, sparelen, totallen;
-+ int i;
-+ bool rootfs_first = false;
-+
-+ buf = vmalloc(sizeof(struct bcm_tag));
-+ if (!buf)
-+ return -ENOMEM;
-+
-+ /* Get the tag */
-+ ret = bcm963xx_read_imagetag(master, "rootfs", 0, buf);
-+ if (!ret) {
-+ STR_NULL_TERMINATE(buf->flash_image_start);
-+ if (kstrtouint(buf->flash_image_start, 10, &rootfsaddr) ||
-+ rootfsaddr < BCM963XX_EXTENDED_SIZE) {
-+ pr_err("invalid rootfs address: %*ph\n",
-+ (int)sizeof(buf->flash_image_start),
-+ buf->flash_image_start);
-+ goto out;
-+ }
-+
-+ STR_NULL_TERMINATE(buf->kernel_address);
-+ if (kstrtouint(buf->kernel_address, 10, &kerneladdr) ||
-+ kerneladdr < BCM963XX_EXTENDED_SIZE) {
-+ pr_err("invalid kernel address: %*ph\n",
-+ (int)sizeof(buf->kernel_address),
-+ buf->kernel_address);
-+ goto out;
-+ }
-+
-+ STR_NULL_TERMINATE(buf->kernel_length);
-+ if (kstrtouint(buf->kernel_length, 10, &kernellen)) {
-+ pr_err("invalid kernel length: %*ph\n",
-+ (int)sizeof(buf->kernel_length),
-+ buf->kernel_length);
-+ goto out;
-+ }
-+
-+ STR_NULL_TERMINATE(buf->total_length);
-+ if (kstrtouint(buf->total_length, 10, &totallen)) {
-+ pr_err("invalid total length: %*ph\n",
-+ (int)sizeof(buf->total_length),
-+ buf->total_length);
-+ goto out;
-+ }
-+
-+ /*
-+ * Addresses are flash absolute, so convert to partition
-+ * relative addresses. Assume either kernel or rootfs will
-+ * directly follow the image tag.
-+ */
-+ if (rootfsaddr < kerneladdr)
-+ offset = rootfsaddr - sizeof(struct bcm_tag);
-+ else
-+ offset = kerneladdr - sizeof(struct bcm_tag);
-+
-+ kerneladdr = kerneladdr - offset;
-+ rootfsaddr = rootfsaddr - offset;
-+ spareaddr = roundup(totallen, master->erasesize);
-+
-+ if (rootfsaddr < kerneladdr) {
-+ /* default Broadcom layout */
-+ rootfslen = kerneladdr - rootfsaddr;
-+ rootfs_first = true;
-+ } else {
-+ /* OpenWrt layout */
-+ rootfsaddr = kerneladdr + kernellen;
-+ rootfslen = spareaddr - rootfsaddr;
-+ }
-+ } else {
-+ goto out;
-+ }
-+ sparelen = master->size - spareaddr;
-+
-+ /* Determine number of partitions */
-+ if (rootfslen > 0)
-+ nrparts++;
-+
-+ if (kernellen > 0)
-+ nrparts++;
-+
-+ parts = kzalloc(sizeof(*parts) * nrparts + 10 * nrparts, GFP_KERNEL);
-+ if (!parts) {
-+ ret = -ENOMEM;
-+ goto out;
-+ }
-+
-+ /* Start building partition list */
-+ if (kernellen > 0) {
-+ int kernelpart = curpart;
-+
-+ if (rootfslen > 0 && rootfs_first)
-+ kernelpart++;
-+ parts[kernelpart].name = "kernel";
-+ parts[kernelpart].offset = kerneladdr;
-+ parts[kernelpart].size = kernellen;
-+ curpart++;
-+ }
-+
-+ if (rootfslen > 0) {
-+ int rootfspart = curpart;
-+
-+ if (kernellen > 0 && rootfs_first)
-+ rootfspart--;
-+ parts[rootfspart].name = "rootfs";
-+ parts[rootfspart].offset = rootfsaddr;
-+ parts[rootfspart].size = rootfslen;
-+ if (sparelen > 0 && !rootfs_first)
-+ parts[rootfspart].size += sparelen;
-+ curpart++;
-+ }
-+
-+ for (i = 0; i < nrparts; i++)
-+ pr_info("Partition %d is %s offset %llx and length %llx\n", i,
-+ parts[i].name, parts[i].offset, parts[i].size);
-+
-+ pr_info("Spare partition is offset %x and length %x\n", spareaddr,
-+ sparelen);
-+
-+ *pparts = parts;
-+ ret = 0;
-+
-+out:
-+ vfree(buf);
-+
-+ if (ret)
-+ return ret;
-+
-+ return nrparts;
-+}
-+
-+static struct mtd_part_parser bcm963xx_imagetag_parser = {
-+ .parse_fn = bcm963xx_parse_imagetag_partitions,
-+ .name = "bcm963xx-imagetag",
-+};
-+module_mtd_part_parser(bcm963xx_imagetag_parser);
-+
-+MODULE_LICENSE("GPL");
-+MODULE_AUTHOR("Daniel Dickinson <openwrt@cshore.neomailbox.net>");
-+MODULE_AUTHOR("Florian Fainelli <florian@openwrt.org>");
-+MODULE_AUTHOR("Mike Albon <malbon@openwrt.org>");
-+MODULE_AUTHOR("Jonas Gorski <jonas.gorski@gmail.com");
-+MODULE_DESCRIPTION("MTD parser for BCM963XX CFE Image Tag partitions");
+++ /dev/null
-From 89cd5efa4a0d342b860a726bb1d382e4db4b96a4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 28 Jun 2017 18:34:42 +0200
-Subject: [PATCH 1/2] mtd: bcm63xxpart: add of_match_table
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/mtd/bcm63xxpart.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -34,6 +34,7 @@
- #include <linux/vmalloc.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
-+#include <linux/of.h>
-
- #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
-
-@@ -172,9 +173,16 @@ out:
- return ret;
- };
-
-+static const struct of_device_id parse_bcm63xx_cfe_match_table[] = {
-+ { .compatible = "brcm,bcm963xx-cfe-nor-partitions" },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, parse_bcm63xx_cfe_match_table);
-+
- static struct mtd_part_parser bcm63xx_cfe_parser = {
- .parse_fn = bcm63xx_parse_cfe_partitions,
- .name = "bcm63xxpart",
-+ .of_match_table = parse_bcm63xx_cfe_match_table,
- };
- module_mtd_part_parser(bcm63xx_cfe_parser);
-
+++ /dev/null
-From 3303dd9f5b197cc2efd9cbd7b9b45fc1e510a393 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 28 Jun 2017 18:37:12 +0200
-Subject: [PATCH 2/2] mtd: parser_bcm63xx_imagetag: add of_match_table support
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/mtd/parsers/parser_imagetag.c | 8 ++++++++
- 1 file changed, 8 insertions(+)
-
---- a/drivers/mtd/parsers/parser_imagetag.c
-+++ b/drivers/mtd/parsers/parser_imagetag.c
-@@ -24,6 +24,7 @@
- #include <linux/vmalloc.h>
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
-+#include <linux/of.h>
-
- /* Ensure strings read from flash structs are null terminated */
- #define STR_NULL_TERMINATE(x) \
-@@ -200,9 +201,16 @@ out:
- return nrparts;
- }
-
-+static const struct of_device_id parse_bcm963xx_imagetag_match_table[] = {
-+ { .compatible = "brcm,bcm963xx-imagetag" },
-+ {},
-+};
-+MODULE_DEVICE_TABLE(of, parse_bcm963xx_imagetag_match_table);
-+
- static struct mtd_part_parser bcm963xx_imagetag_parser = {
- .parse_fn = bcm963xx_parse_imagetag_partitions,
- .name = "bcm963xx-imagetag",
-+ .of_match_table = parse_bcm963xx_imagetag_match_table,
- };
- module_mtd_part_parser(bcm963xx_imagetag_parser);
-
+++ /dev/null
-From ab2f33e35e35905a76204138143875251f3e1088 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:07:42 +0200
-Subject: [PATCH 01/13] pinctrl: add bcm63xx base code
-
-Setup directory and add a helper for bcm63xx pinctrl support.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/Kconfig | 1 +
- drivers/pinctrl/Makefile | 1 +
- drivers/pinctrl/bcm63xx/Kconfig | 3 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c | 142 ++++++++++++++++++++++++++++++
- drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h | 14 +++
- 7 files changed, 163 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/Kconfig
- create mode 100644 drivers/pinctrl/bcm63xx/Makefile
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-
---- a/drivers/pinctrl/Kconfig
-+++ b/drivers/pinctrl/Kconfig
-@@ -341,6 +341,7 @@ config PINCTRL_OCELOT
- source "drivers/pinctrl/actions/Kconfig"
- source "drivers/pinctrl/aspeed/Kconfig"
- source "drivers/pinctrl/bcm/Kconfig"
-+source "drivers/pinctrl/bcm63xx/Kconfig"
- source "drivers/pinctrl/berlin/Kconfig"
- source "drivers/pinctrl/freescale/Kconfig"
- source "drivers/pinctrl/intel/Kconfig"
---- a/drivers/pinctrl/Makefile
-+++ b/drivers/pinctrl/Makefile
-@@ -46,6 +46,7 @@ obj-$(CONFIG_PINCTRL_OCELOT) += pinctrl-
- obj-y += actions/
- obj-$(CONFIG_ARCH_ASPEED) += aspeed/
- obj-y += bcm/
-+obj-y += bcm63xx/
- obj-$(CONFIG_PINCTRL_BERLIN) += berlin/
- obj-y += freescale/
- obj-$(CONFIG_X86) += intel/
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -0,0 +1,3 @@
-+config PINCTRL_BCM63XX
-+ bool
-+ select GPIO_GENERIC
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -0,0 +1 @@
-+obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.c
-@@ -0,0 +1,155 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/device.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/of_irq.h>
-+
-+#include "pinctrl-bcm63xx.h"
-+#include "../core.h"
-+
-+#define BANK_SIZE sizeof(u32)
-+#define PINS_PER_BANK (BANK_SIZE * BITS_PER_BYTE)
-+
-+#ifdef CONFIG_OF
-+static int bcm63xx_gpio_of_xlate(struct gpio_chip *gc,
-+ const struct of_phandle_args *gpiospec,
-+ u32 *flags)
-+{
-+ struct gpio_chip *base = gpiochip_get_data(gc);
-+ int pin = gpiospec->args[0];
-+
-+ if (gc != &base[pin / PINS_PER_BANK])
-+ return -EINVAL;
-+
-+ pin = pin % PINS_PER_BANK;
-+
-+ if (pin >= gc->ngpio)
-+ return -EINVAL;
-+
-+ if (flags)
-+ *flags = gpiospec->args[1];
-+
-+ return pin;
-+}
-+#endif
-+
-+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
-+{
-+ struct gpio_chip *base = gpiochip_get_data(chip);
-+ char irq_name[7]; /* "gpioXX" */
-+
-+ /* FIXME: this is ugly */
-+ sprintf(irq_name, "gpio%d", gpio + PINS_PER_BANK * (chip - base));
-+ return of_irq_get_byname(chip->of_node, irq_name);
-+}
-+
-+static int bcm63xx_setup_gpio(struct device *dev, struct gpio_chip *gc,
-+ void __iomem *dirout, void __iomem *data,
-+ size_t sz, int ngpio)
-+
-+{
-+ int banks, chips, i, ret = -EINVAL;
-+
-+ chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+ banks = sz / BANK_SIZE;
-+
-+ for (i = 0; i < chips; i++) {
-+ int offset, pins;
-+ int reg_offset;
-+ char *label;
-+
-+ label = devm_kasprintf(dev, GFP_KERNEL, "bcm63xx-gpio.%i", i);
-+ if (!label)
-+ return -ENOMEM;
-+
-+ offset = i * PINS_PER_BANK;
-+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+ /* the registers are treated like a huge big endian register */
-+ reg_offset = (banks - i - 1) * BANK_SIZE;
-+
-+ ret = bgpio_init(&gc[i], dev, BANK_SIZE, data + reg_offset,
-+ NULL, NULL, dirout + reg_offset, NULL,
-+ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-+ if (ret)
-+ return ret;
-+
-+ gc[i].request = gpiochip_generic_request;
-+ gc[i].free = gpiochip_generic_free;
-+
-+ if (of_get_property(dev->of_node, "interrupt-names", NULL))
-+ gc[i].to_irq = bcm63xx_gpio_to_irq;
-+
-+#ifdef CONFIG_OF
-+ gc[i].of_gpio_n_cells = 2;
-+ gc[i].of_xlate = bcm63xx_gpio_of_xlate;
-+#endif
-+
-+ gc[i].label = label;
-+ gc[i].ngpio = pins;
-+
-+ devm_gpiochip_add_data(dev, &gc[i], gc);
-+ }
-+
-+ return 0;
-+}
-+
-+static void bcm63xx_setup_pinranges(struct gpio_chip *gc, const char *name,
-+ int ngpio)
-+{
-+ int i, chips = DIV_ROUND_UP(ngpio, PINS_PER_BANK);
-+
-+ for (i = 0; i < chips; i++) {
-+ int offset, pins;
-+
-+ offset = i * PINS_PER_BANK;
-+ pins = min_t(int, ngpio - offset, PINS_PER_BANK);
-+
-+ gpiochip_add_pin_range(&gc[i], name, 0, offset, pins);
-+ }
-+}
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+ struct pinctrl_desc *desc,
-+ void *priv, struct gpio_chip *gc,
-+ int ngpio)
-+{
-+ struct pinctrl_dev *pctldev;
-+ struct resource *res;
-+ void __iomem *dirout, *data;
-+ size_t sz;
-+ int ret;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dirout");
-+ dirout = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(dirout))
-+ return ERR_CAST(dirout);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "dat");
-+ data = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(data))
-+ return ERR_CAST(data);
-+
-+ sz = resource_size(res);
-+
-+ ret = bcm63xx_setup_gpio(&pdev->dev, gc, dirout, data, sz, ngpio);
-+ if (ret)
-+ return ERR_PTR(ret);
-+
-+ pctldev = devm_pinctrl_register(&pdev->dev, desc, priv);
-+ if (IS_ERR(pctldev))
-+ return pctldev;
-+
-+ bcm63xx_setup_pinranges(gc, pinctrl_dev_get_devname(pctldev), ngpio);
-+
-+ dev_info(&pdev->dev, "registered at mmio %p\n", dirout);
-+
-+ return pctldev;
-+}
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63xx.h
-@@ -0,0 +1,14 @@
-+#ifndef __PINCTRL_BCM63XX
-+#define __PINCTRL_BCM63XX
-+
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/pinctrl/pinctrl.h>
-+#include <linux/platform_device.h>
-+
-+struct pinctrl_dev *bcm63xx_pinctrl_register(struct platform_device *pdev,
-+ struct pinctrl_desc *desc,
-+ void *priv, struct gpio_chip *gc,
-+ int ngpio);
-+
-+#endif
+++ /dev/null
-From 4bdd40849632608d5cb7d3a64380cd76e7eea07b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:33:56 +0200
-Subject: [PATCH 02/16] Documentation: add BCM6328 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6328 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6328-pinctrl.txt | 61 ++++++++++++++++++++++
- 1 file changed, 61 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6328-pinctrl.txt
-@@ -0,0 +1,61 @@
-+* Broadcom BCM6328 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6328-pinctrl".
-+- reg: Register specifies of dirout, dat, mode, mux registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6328-pinctrl";
-+ reg = <0x10000080 0x8>,
-+ <0x10000088 0x8>,
-+ <0x10000098 0x4>,
-+ <0x1000009c 0xc>;
-+ reg-names = "dirout", "dat", "mode", "mux";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led
-+gpio1 1 led
-+gpio2 2 led
-+gpio3 3 led
-+gpio4 4 led
-+gpio5 5 led
-+gpio6 6 led, serial_led_data
-+gpio7 7 led, serial_led_clk
-+gpio8 8 led
-+gpio9 9 led
-+gpio10 10 led
-+gpio11 11 led
-+gpio12 12 led
-+gpio13 13 led
-+gpio14 14 led
-+gpio15 15 led
-+gpio16 16 led, pcie_clkreq
-+gpio17 17 led
-+gpio18 18 led
-+gpio19 19 led
-+gpio20 20 led
-+gpio21 21 led
-+gpio22 22 led
-+gpio23 23 led
-+gpio24 24 -
-+gpio25 25 ephy0_act_led
-+gpio26 26 ephy1_act_led
-+gpio27 27 ephy2_act_led
-+gpio28 28 ephy3_act_led
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+hsspi_cs1 - hsspi_cs1
-+usb_port1 - usb_host_port, usb_device_port
+++ /dev/null
-From 393e9753f6492c1fdf55891ddee60d955ae8b119 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:12:50 +0200
-Subject: [PATCH 03/16] pinctrl: add a pincontrol driver for BCM6328
-
-Add a pincontrol driver for BCM6328. BCM628 supports muxing 32 pins as
-GPIOs, as LEDs for the integrated LED controller, or various other
-functions. Its pincontrol mux registers also control other aspects, like
-switching the second USB port between host and device mode.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c | 456 ++++++++++++++++++++++++++++++
- 3 files changed, 464 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -1,3 +1,10 @@
- config PINCTRL_BCM63XX
- bool
- select GPIO_GENERIC
-+
-+config PINCTRL_BCM6328
-+ bool "BCM6328 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1 +1,2 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6328.c
-@@ -0,0 +1,456 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/kernel.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/machine.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6328_MUX_LO_REG 0x4
-+#define BCM6328_MUX_HI_REG 0x0
-+#define BCM6328_MUX_OTHER_REG 0x8
-+
-+#define BCM6328_NGPIO 32
-+
-+struct bcm6328_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6328_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned mode_val:1;
-+ unsigned mux_val:2;
-+};
-+
-+struct bcm6328_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ void __iomem *mux[3];
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio;
-+};
-+
-+static const struct pinctrl_pin_desc bcm6328_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+
-+ /*
-+ * No idea where they really are; so let's put them according
-+ * to their mux offsets.
-+ */
-+ PINCTRL_PIN(36, "hsspi_cs1"),
-+ PINCTRL_PIN(38, "usb_p2"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+
-+static unsigned hsspi_cs1_pins[] = { 36 };
-+static unsigned usb_port1_pins[] = { 38 };
-+
-+#define BCM6328_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6328_pingroup bcm6328_groups[] = {
-+ BCM6328_GROUP(gpio0),
-+ BCM6328_GROUP(gpio1),
-+ BCM6328_GROUP(gpio2),
-+ BCM6328_GROUP(gpio3),
-+ BCM6328_GROUP(gpio4),
-+ BCM6328_GROUP(gpio5),
-+ BCM6328_GROUP(gpio6),
-+ BCM6328_GROUP(gpio7),
-+ BCM6328_GROUP(gpio8),
-+ BCM6328_GROUP(gpio9),
-+ BCM6328_GROUP(gpio10),
-+ BCM6328_GROUP(gpio11),
-+ BCM6328_GROUP(gpio12),
-+ BCM6328_GROUP(gpio13),
-+ BCM6328_GROUP(gpio14),
-+ BCM6328_GROUP(gpio15),
-+ BCM6328_GROUP(gpio16),
-+ BCM6328_GROUP(gpio17),
-+ BCM6328_GROUP(gpio18),
-+ BCM6328_GROUP(gpio19),
-+ BCM6328_GROUP(gpio20),
-+ BCM6328_GROUP(gpio21),
-+ BCM6328_GROUP(gpio22),
-+ BCM6328_GROUP(gpio23),
-+ BCM6328_GROUP(gpio24),
-+ BCM6328_GROUP(gpio25),
-+ BCM6328_GROUP(gpio26),
-+ BCM6328_GROUP(gpio27),
-+ BCM6328_GROUP(gpio28),
-+ BCM6328_GROUP(gpio29),
-+ BCM6328_GROUP(gpio30),
-+ BCM6328_GROUP(gpio31),
-+
-+ BCM6328_GROUP(hsspi_cs1),
-+ BCM6328_GROUP(usb_port1),
-+};
-+
-+/* GPIO_MODE */
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+/* PINMUX_SEL */
-+static const char * const serial_led_data_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_act_led_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const pcie_clkreq_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const ephy0_act_led_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ephy1_act_led_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ephy2_act_led_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const ephy3_act_led_groups[] = {
-+ "gpio28",
-+};
-+
-+static const char * const hsspi_cs1_groups[] = {
-+ "hsspi_cs1"
-+};
-+
-+static const char * const usb_host_port_groups[] = {
-+ "usb_port1",
-+};
-+
-+static const char * const usb_device_port_groups[] = {
-+ "usb_port1",
-+};
-+
-+#define BCM6328_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mode_val = 1, \
-+ }
-+
-+#define BCM6328_MUX_FUN(n, mux) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mux_val = mux, \
-+ }
-+
-+static const struct bcm6328_function bcm6328_funcs[] = {
-+ BCM6328_MODE_FUN(led),
-+ BCM6328_MUX_FUN(serial_led_data, 2),
-+ BCM6328_MUX_FUN(serial_led_clk, 2),
-+ BCM6328_MUX_FUN(inet_act_led, 1),
-+ BCM6328_MUX_FUN(pcie_clkreq, 2),
-+ BCM6328_MUX_FUN(ephy0_act_led, 1),
-+ BCM6328_MUX_FUN(ephy1_act_led, 1),
-+ BCM6328_MUX_FUN(ephy2_act_led, 1),
-+ BCM6328_MUX_FUN(ephy3_act_led, 1),
-+ BCM6328_MUX_FUN(hsspi_cs1, 2),
-+ BCM6328_MUX_FUN(usb_host_port, 1),
-+ BCM6328_MUX_FUN(usb_device_port, 2),
-+};
-+
-+static int bcm6328_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6328_groups);
-+}
-+
-+static const char *bcm6328_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6328_groups[group].name;
-+}
-+
-+static int bcm6328_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6328_groups[group].pins;
-+ *num_pins = bcm6328_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6328_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6328_funcs);
-+}
-+
-+static const char *bcm6328_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6328_funcs[selector].name;
-+}
-+
-+static int bcm6328_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6328_funcs[selector].groups;
-+ *num_groups = bcm6328_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6328_rmw_mux(struct bcm6328_pinctrl *pctl, unsigned pin,
-+ u32 mode, u32 mux)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (pin < 32) {
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~BIT(pin);
-+ if (mode)
-+ reg |= BIT(pin);
-+ __raw_writel(reg, pctl->mode);
-+ }
-+
-+ reg = __raw_readl(pctl->mux[pin / 16]);
-+ reg &= ~(3UL << ((pin % 16) * 2));
-+ reg |= mux << ((pin % 16) * 2);
-+ __raw_writel(reg, pctl->mux[pin / 16]);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6328_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6328_pingroup *grp = &bcm6328_groups[group];
-+ const struct bcm6328_function *f = &bcm6328_funcs[selector];
-+
-+ bcm6328_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
-+
-+ return 0;
-+}
-+
-+static int bcm6328_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6328_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm6328_rmw_mux(pctl, offset, 0, 0);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6328_pctl_ops = {
-+ .get_groups_count = bcm6328_pinctrl_get_group_count,
-+ .get_group_name = bcm6328_pinctrl_get_group_name,
-+ .get_group_pins = bcm6328_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6328_pmx_ops = {
-+ .get_functions_count = bcm6328_pinctrl_get_func_count,
-+ .get_function_name = bcm6328_pinctrl_get_func_name,
-+ .get_function_groups = bcm6328_pinctrl_get_groups,
-+ .set_mux = bcm6328_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6328_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6328_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6328_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode, *mux;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+ mux = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mux))
-+ return PTR_ERR(mux);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+ pctl->mux[0] = mux + BCM6328_MUX_LO_REG;
-+ pctl->mux[1] = mux + BCM6328_MUX_HI_REG;
-+ pctl->mux[2] = mux + BCM6328_MUX_OTHER_REG;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6328_pctl_ops;
-+ pctl->desc.pmxops = &bcm6328_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6328_pins);
-+ pctl->desc.pins = bcm6328_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ &pctl->gpio, BCM6328_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6328_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6328-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6328_pinctrl_driver = {
-+ .probe = bcm6328_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6328-pinctrl",
-+ .of_match_table = bcm6328_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6328_pinctrl_driver);
+++ /dev/null
-From 962c46bf7f43df730e2d3698930e77958cc6b191 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:35:45 +0200
-Subject: [PATCH 04/16] Documentation: add BCM6348 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6348 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6348-pinctrl.txt | 32 ++++++++++++++++++++++
- 1 file changed, 32 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6348-pinctrl.txt
-@@ -0,0 +1,32 @@
-+* Broadcom BCM6348 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6348-pinctrl".
-+- reg: register Specifiers of dirout, dat, mode registers.
-+- reg-names: Must be "dirout", "dat", "mode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@fffe0080 {
-+ compatible = "brcm,bcm6348-pinctrl";
-+ reg = <0xfffe0080 0x8>,
-+ <0xfffe0088 0x8>,
-+ <0xfffe0098 0x4>;
-+ reg-names = "dirout", "dat", "mode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+group0 32-36 ext_mii, utopia, diag
-+group1 22-31 ext_ephy, mii_snoop, mii_pccard,
-+ spi_master_uart, utopia, diag
-+group2 16-21 pci, diag
-+group3 8-15 ext_mii, utopia
-+group4 0-7 ext_ephy, mii_snoop, legacy_led, diag
+++ /dev/null
-From 45444cb631555e2dc16b95d779b10aa075c7482e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:14:13 +0200
-Subject: [PATCH 05/16] pinctrl: add a pincontrol driver for BCM6348
-
-Add a pincotrol driver for BCM6348. BCM6348 allow muxing five groups of
-up to ten gpios into fourteen potential functions. It does not allow
-muxing individual pins. Some functions require more than one group to be
-muxed to the same function.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c | 391 ++++++++++++++++++++++++++++++
- 3 files changed, 399 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -8,3 +8,10 @@ config PINCTRL_BCM6328
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6348
-+ bool "BCM6348 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,2 +1,3 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
-+obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6348.c
-@@ -0,0 +1,391 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/machine.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6348_NGPIO 37
-+
-+#define MAX_GROUP 4
-+#define PINS_PER_GROUP 8
-+#define PIN_TO_GROUP(pin) (MAX_GROUP - ((pin) / PINS_PER_GROUP))
-+#define GROUP_SHIFT(pin) (PIN_TO_GROUP(pin) * 4)
-+#define GROUP_MASK(pin) (0xf << GROUP_SHIFT(pin))
-+
-+struct bcm6348_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6348_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+ unsigned int value;
-+};
-+
-+struct bcm6348_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6348_PIN(a, b, group) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(group), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6348_pins[] = {
-+ BCM6348_PIN(0, "gpio0", 4),
-+ BCM6348_PIN(1, "gpio1", 4),
-+ BCM6348_PIN(2, "gpio2", 4),
-+ BCM6348_PIN(3, "gpio3", 4),
-+ BCM6348_PIN(4, "gpio4", 4),
-+ BCM6348_PIN(5, "gpio5", 4),
-+ BCM6348_PIN(6, "gpio6", 4),
-+ BCM6348_PIN(7, "gpio7", 4),
-+ BCM6348_PIN(8, "gpio8", 3),
-+ BCM6348_PIN(9, "gpio9", 3),
-+ BCM6348_PIN(10, "gpio10", 3),
-+ BCM6348_PIN(11, "gpio11", 3),
-+ BCM6348_PIN(12, "gpio12", 3),
-+ BCM6348_PIN(13, "gpio13", 3),
-+ BCM6348_PIN(14, "gpio14", 3),
-+ BCM6348_PIN(15, "gpio15", 3),
-+ BCM6348_PIN(16, "gpio16", 2),
-+ BCM6348_PIN(17, "gpio17", 2),
-+ BCM6348_PIN(18, "gpio18", 2),
-+ BCM6348_PIN(19, "gpio19", 2),
-+ BCM6348_PIN(20, "gpio20", 2),
-+ BCM6348_PIN(21, "gpio21", 2),
-+ BCM6348_PIN(22, "gpio22", 1),
-+ BCM6348_PIN(23, "gpio23", 1),
-+ BCM6348_PIN(24, "gpio24", 1),
-+ BCM6348_PIN(25, "gpio25", 1),
-+ BCM6348_PIN(26, "gpio26", 1),
-+ BCM6348_PIN(27, "gpio27", 1),
-+ BCM6348_PIN(28, "gpio28", 1),
-+ BCM6348_PIN(29, "gpio29", 1),
-+ BCM6348_PIN(30, "gpio30", 1),
-+ BCM6348_PIN(31, "gpio31", 1),
-+ BCM6348_PIN(32, "gpio32", 0),
-+ BCM6348_PIN(33, "gpio33", 0),
-+ BCM6348_PIN(34, "gpio34", 0),
-+ BCM6348_PIN(35, "gpio35", 0),
-+ BCM6348_PIN(36, "gpio36", 0),
-+};
-+
-+enum bcm6348_muxes {
-+ BCM6348_MUX_GPIO = 0,
-+ BCM6348_MUX_EXT_EPHY,
-+ BCM6348_MUX_MII_SNOOP,
-+ BCM6348_MUX_LEGACY_LED,
-+ BCM6348_MUX_MII_PCCARD,
-+ BCM6348_MUX_PCI,
-+ BCM6348_MUX_SPI_MASTER_UART,
-+ BCM6348_MUX_EXT_MII,
-+ BCM6348_MUX_UTOPIA,
-+ BCM6348_MUX_DIAG,
-+};
-+
-+static unsigned group0_pins[] = {
-+ 32, 33, 34, 35, 36,
-+};
-+
-+static unsigned group1_pins[] = {
-+ 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned group2_pins[] = {
-+ 16, 17, 18, 19, 20, 21,
-+};
-+
-+static unsigned group3_pins[] = {
-+ 8, 9, 10, 11, 12, 13, 14, 15,
-+};
-+
-+static unsigned group4_pins[] = {
-+ 0, 1, 2, 3, 4, 5, 6, 7,
-+};
-+
-+#define BCM6348_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ } \
-+
-+static struct bcm6348_pingroup bcm6348_groups[] = {
-+ BCM6348_GROUP(group0),
-+ BCM6348_GROUP(group1),
-+ BCM6348_GROUP(group2),
-+ BCM6348_GROUP(group3),
-+ BCM6348_GROUP(group4),
-+};
-+
-+static const char * const ext_mii_groups[] = {
-+ "group0",
-+ "group3",
-+};
-+
-+static const char * const ext_ephy_groups[] = {
-+ "group1",
-+ "group4"
-+};
-+
-+static const char * const mii_snoop_groups[] = {
-+ "group1",
-+ "group4",
-+};
-+
-+static const char * const legacy_led_groups[] = {
-+ "group4",
-+};
-+
-+static const char * const mii_pccard_groups[] = {
-+ "group1",
-+};
-+
-+static const char * const pci_groups[] = {
-+ "group2",
-+};
-+
-+static const char * const spi_master_uart_groups[] = {
-+ "group1",
-+};
-+
-+static const char * const utopia_groups[] = {
-+ "group0",
-+ "group1",
-+ "group3",
-+};
-+
-+static const char * const diag_groups[] = {
-+ "group0",
-+ "group1",
-+ "group2",
-+ "group4",
-+};
-+
-+#define BCM6348_FUN(n, f) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .value = BCM6348_MUX_##f, \
-+ }
-+
-+static const struct bcm6348_function bcm6348_funcs[] = {
-+ BCM6348_FUN(ext_mii, EXT_MII),
-+ BCM6348_FUN(ext_ephy, EXT_EPHY),
-+ BCM6348_FUN(mii_snoop, MII_SNOOP),
-+ BCM6348_FUN(legacy_led, LEGACY_LED),
-+ BCM6348_FUN(mii_pccard, MII_PCCARD),
-+ BCM6348_FUN(pci, PCI),
-+ BCM6348_FUN(spi_master_uart, SPI_MASTER_UART),
-+ BCM6348_FUN(utopia, UTOPIA),
-+ BCM6348_FUN(diag, DIAG),
-+};
-+
-+static int bcm6348_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6348_groups);
-+}
-+
-+static const char *bcm6348_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6348_groups[group].name;
-+}
-+
-+static int bcm6348_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6348_groups[group].pins;
-+ *num_pins = bcm6348_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6348_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6348_funcs);
-+}
-+
-+static const char *bcm6348_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6348_funcs[selector].name;
-+}
-+
-+static int bcm6348_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6348_funcs[selector].groups;
-+ *num_groups = bcm6348_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6348_rmw_mux(struct bcm6348_pinctrl *pctl, u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~mask;
-+ reg |= val & mask;
-+ __raw_writel(reg, pctl->mode);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6348_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6348_pingroup *grp = &bcm6348_groups[group];
-+ const struct bcm6348_function *f = &bcm6348_funcs[selector];
-+ u32 mask, val;
-+
-+ /*
-+ * pins n..(n+7) share the same group, so we only need to look at
-+ * the first pin.
-+ */
-+ mask = GROUP_MASK(grp->pins[0]);
-+ val = f->value << GROUP_SHIFT(grp->pins[0]);
-+
-+ bcm6348_rmw_mux(pctl, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm6348_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6348_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ struct pin_desc *desc;
-+ u32 mask;
-+
-+ /* don't reconfigure if already muxed */
-+ desc = pin_desc_get(pctldev, offset);
-+ if (desc->mux_usecount)
-+ return 0;
-+
-+ mask = GROUP_MASK(offset);
-+
-+ /* disable all functions using this pin */
-+ bcm6348_rmw_mux(pctl, mask, 0);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6348_pctl_ops = {
-+ .get_groups_count = bcm6348_pinctrl_get_group_count,
-+ .get_group_name = bcm6348_pinctrl_get_group_name,
-+ .get_group_pins = bcm6348_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6348_pmx_ops = {
-+ .get_functions_count = bcm6348_pinctrl_get_func_count,
-+ .get_function_name = bcm6348_pinctrl_get_func_name,
-+ .get_function_groups = bcm6348_pinctrl_get_groups,
-+ .set_mux = bcm6348_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6348_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6348_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6348_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ /* disable all muxes by default */
-+ __raw_writel(0, pctl->mode);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6348_pctl_ops;
-+ pctl->desc.pmxops = &bcm6348_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6348_pins);
-+ pctl->desc.pins = bcm6348_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6348_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6348_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6348-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6348_pinctrl_driver = {
-+ .probe = bcm6348_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6348-pinctrl",
-+ .of_match_table = bcm6348_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6348_pinctrl_driver);
+++ /dev/null
-From c7c8fa7f5b5ee9bea751fa7bdae8ff4acde8f26e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:00 +0200
-Subject: [PATCH 06/16] Documentation: add BCM6358 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6358 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6358-pinctrl.txt | 44 ++++++++++++++++++++++
- 1 file changed, 44 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6358-pinctrl.txt
-@@ -0,0 +1,44 @@
-+* Broadcom BCM6358 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6358-pinctrl".
-+- reg: Register specifiers of dirout, dat registers.
-+- reg-names: Must be "dirout", "dat".
-+- brcm,gpiomode: Phandle to the shared gpiomode register.
-+- gpio-controller: Identifies this node as a gpio-controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@fffe0080 {
-+ compatible = "brcm,bcm6358-pinctrl";
-+ reg = <0xfffe0080 0x8>,
-+ <0xfffe0088 0x8>,
-+ <0xfffe0098 0x4>;
-+ reg-names = "dirout", "dat";
-+ brcm,gpiomode = <&gpiomode>;
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+gpiomode: syscon@fffe0098 {
-+ compatible = "brcm,bcm6358-gpiomode", "syscon";
-+ reg = <0xfffe0098 0x4>;
-+ native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+ebi_cs_grp 30-31 ebi_cs
-+uart1_grp 28-31 uart1
-+spi_cs_grp 32-33 spi_cs
-+async_modem_grp 12-15 async_modem
-+legacy_led_grp 9-15 legacy_led
-+serial_led_grp 6-7 serial_led
-+led_grp 0-3 led
-+utopia_grp 12-15, 22-31 utopia
-+pwm_syn_clk_grp 8 pwm_syn_clk
-+sys_irq_grp 5 sys_irq
+++ /dev/null
-From fb00ef462f3f8b70ea8902151cc72810fe90b999 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:16:01 +0200
-Subject: [PATCH 07/16] pinctrl: add a pincontrol driver for BCM6358
-
-Add a pincotrol driver for BCM6358. BCM6358 allow overlaying different
-functions onto the GPIO pins. It does not support configuring individual
-pins but only whole groups. These groups may overlap, and still require
-the directions to be set correctly in the GPIO register. In addition the
-functions register controls other, not directly mux related functions.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 8 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c | 393 ++++++++++++++++++++++++++++++
- 3 files changed, 402 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -15,3 +15,11 @@ config PINCTRL_BCM6348
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6358
-+ bool "BCM6358 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+ select MFD_SYSCON
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,3 +1,4 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
-+obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6358.c
-@@ -0,0 +1,393 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/regmap.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+/* GPIO_MODE register */
-+#define BCM6358_MODE_MUX_NONE 0
-+
-+/* overlays on gpio pins */
-+#define BCM6358_MODE_MUX_EBI_CS BIT(5)
-+#define BCM6358_MODE_MUX_UART1 BIT(6)
-+#define BCM6358_MODE_MUX_SPI_CS BIT(7)
-+#define BCM6358_MODE_MUX_ASYNC_MODEM BIT(8)
-+#define BCM6358_MODE_MUX_LEGACY_LED BIT(9)
-+#define BCM6358_MODE_MUX_SERIAL_LED BIT(10)
-+#define BCM6358_MODE_MUX_LED BIT(11)
-+#define BCM6358_MODE_MUX_UTOPIA BIT(12)
-+#define BCM6358_MODE_MUX_CLKRST BIT(13)
-+#define BCM6358_MODE_MUX_PWM_SYN_CLK BIT(14)
-+#define BCM6358_MODE_MUX_SYS_IRQ BIT(15)
-+
-+#define BCM6358_NGPIO 40
-+
-+struct bcm6358_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+
-+ const u16 mode_val;
-+
-+ /* non-GPIO function muxes require the gpio direction to be set */
-+ const u16 direction;
-+};
-+
-+struct bcm6358_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+};
-+
-+struct bcm6358_pinctrl {
-+ struct device *dev;
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ struct regmap_field *overlays;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6358_GPIO_PIN(a, b, bit1, bit2, bit3) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(BCM6358_MODE_MUX_##bit1 | \
-+ BCM6358_MODE_MUX_##bit2 | \
-+ BCM6358_MODE_MUX_##bit3), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6358_pins[] = {
-+ BCM6358_GPIO_PIN(0, "gpio0", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(1, "gpio1", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(2, "gpio2", LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(3, "gpio3", LED, NONE, NONE),
-+ PINCTRL_PIN(4, "gpio4"),
-+ BCM6358_GPIO_PIN(5, "gpio5", SYS_IRQ, NONE, NONE),
-+ BCM6358_GPIO_PIN(6, "gpio6", SERIAL_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(7, "gpio7", SERIAL_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(8, "gpio8", PWM_SYN_CLK, NONE, NONE),
-+ BCM6358_GPIO_PIN(9, "gpio09", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(10, "gpio10", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(11, "gpio11", LEGACY_LED, NONE, NONE),
-+ BCM6358_GPIO_PIN(12, "gpio12", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(13, "gpio13", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(14, "gpio14", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ BCM6358_GPIO_PIN(15, "gpio15", LEGACY_LED, ASYNC_MODEM, UTOPIA),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ BCM6358_GPIO_PIN(22, "gpio22", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(23, "gpio23", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(24, "gpio24", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(25, "gpio25", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(26, "gpio26", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(27, "gpio27", UTOPIA, NONE, NONE),
-+ BCM6358_GPIO_PIN(28, "gpio28", UTOPIA, UART1, NONE),
-+ BCM6358_GPIO_PIN(29, "gpio29", UTOPIA, UART1, NONE),
-+ BCM6358_GPIO_PIN(30, "gpio30", UTOPIA, UART1, EBI_CS),
-+ BCM6358_GPIO_PIN(31, "gpio31", UTOPIA, UART1, EBI_CS),
-+ BCM6358_GPIO_PIN(32, "gpio32", SPI_CS, NONE, NONE),
-+ BCM6358_GPIO_PIN(33, "gpio33", SPI_CS, NONE, NONE),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+};
-+
-+static unsigned ebi_cs_grp_pins[] = { 30, 31 };
-+
-+static unsigned uart1_grp_pins[] = { 28, 29, 30, 31 };
-+
-+static unsigned spi_cs_grp_pins[] = { 32, 33 };
-+
-+static unsigned async_modem_grp_pins[] = { 12, 13, 14, 15 };
-+
-+static unsigned serial_led_grp_pins[] = { 6, 7 };
-+
-+static unsigned legacy_led_grp_pins[] = { 9, 10, 11, 12, 13, 14, 15 };
-+
-+static unsigned led_grp_pins[] = { 0, 1, 2, 3 };
-+
-+static unsigned utopia_grp_pins[] = {
-+ 12, 13, 14, 15, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned pwm_syn_clk_grp_pins[] = { 8 };
-+
-+static unsigned sys_irq_grp_pins[] = { 5 };
-+
-+#define BCM6358_GPIO_MUX_GROUP(n, bit, dir) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ .mode_val = BCM6358_MODE_MUX_##bit, \
-+ .direction = dir, \
-+ }
-+
-+static const struct bcm6358_pingroup bcm6358_groups[] = {
-+ BCM6358_GPIO_MUX_GROUP(ebi_cs_grp, EBI_CS, 0x3),
-+ BCM6358_GPIO_MUX_GROUP(uart1_grp, UART1, 0x2),
-+ BCM6358_GPIO_MUX_GROUP(spi_cs_grp, SPI_CS, 0x6),
-+ BCM6358_GPIO_MUX_GROUP(async_modem_grp, ASYNC_MODEM, 0x6),
-+ BCM6358_GPIO_MUX_GROUP(legacy_led_grp, LEGACY_LED, 0x7f),
-+ BCM6358_GPIO_MUX_GROUP(serial_led_grp, SERIAL_LED, 0x3),
-+ BCM6358_GPIO_MUX_GROUP(led_grp, LED, 0xf),
-+ BCM6358_GPIO_MUX_GROUP(utopia_grp, UTOPIA, 0x000f),
-+ BCM6358_GPIO_MUX_GROUP(pwm_syn_clk_grp, PWM_SYN_CLK, 0x1),
-+ BCM6358_GPIO_MUX_GROUP(sys_irq_grp, SYS_IRQ, 0x1),
-+};
-+
-+static const char * const ebi_cs_groups[] = {
-+ "ebi_cs_grp"
-+};
-+
-+static const char * const uart1_groups[] = {
-+ "uart1_grp"
-+};
-+
-+static const char * const spi_cs_2_3_groups[] = {
-+ "spi_cs_2_3_grp"
-+};
-+
-+static const char * const async_modem_groups[] = {
-+ "async_modem_grp"
-+};
-+
-+static const char * const legacy_led_groups[] = {
-+ "legacy_led_grp",
-+};
-+
-+static const char * const serial_led_groups[] = {
-+ "serial_led_grp",
-+};
-+
-+static const char * const led_groups[] = {
-+ "led_grp",
-+};
-+
-+static const char * const clkrst_groups[] = {
-+ "clkrst_grp",
-+};
-+
-+static const char * const pwm_syn_clk_groups[] = {
-+ "pwm_syn_clk_grp",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "sys_irq_grp",
-+};
-+
-+#define BCM6358_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ }
-+
-+static const struct bcm6358_function bcm6358_funcs[] = {
-+ BCM6358_FUN(ebi_cs),
-+ BCM6358_FUN(uart1),
-+ BCM6358_FUN(spi_cs_2_3),
-+ BCM6358_FUN(async_modem),
-+ BCM6358_FUN(legacy_led),
-+ BCM6358_FUN(serial_led),
-+ BCM6358_FUN(led),
-+ BCM6358_FUN(clkrst),
-+ BCM6358_FUN(pwm_syn_clk),
-+ BCM6358_FUN(sys_irq),
-+};
-+
-+static int bcm6358_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6358_groups);
-+}
-+
-+static const char *bcm6358_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6358_groups[group].name;
-+}
-+
-+static int bcm6358_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6358_groups[group].pins;
-+ *num_pins = bcm6358_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6358_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6358_funcs);
-+}
-+
-+static const char *bcm6358_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6358_funcs[selector].name;
-+}
-+
-+static int bcm6358_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6358_funcs[selector].groups;
-+ *num_groups = bcm6358_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static int bcm6358_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6358_pingroup *grp = &bcm6358_groups[group];
-+ u32 val = grp->mode_val;
-+ u32 mask = val;
-+ unsigned pin;
-+
-+ for (pin = 0; pin < grp->num_pins; pin++)
-+ mask |= (unsigned long)bcm6358_pins[pin].drv_data;
-+
-+ regmap_field_update_bits(pctl->overlays, mask, val);
-+
-+ for (pin = 0; pin < grp->num_pins; pin++) {
-+ int hw_gpio = bcm6358_pins[pin].number;
-+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
-+
-+ if (grp->direction & BIT(pin))
-+ gc->direction_output(gc, hw_gpio % 32, 0);
-+ else
-+ gc->direction_input(gc, hw_gpio % 32);
-+ }
-+
-+ return 0;
-+}
-+
-+static int bcm6358_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6358_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ u32 mask;
-+
-+ mask = (unsigned long)bcm6358_pins[offset].drv_data;
-+ if (!mask)
-+ return 0;
-+
-+ /* disable all functions using this pin */
-+ return regmap_field_update_bits(pctl->overlays, mask, 0);
-+}
-+
-+static struct pinctrl_ops bcm6358_pctl_ops = {
-+ .get_groups_count = bcm6358_pinctrl_get_group_count,
-+ .get_group_name = bcm6358_pinctrl_get_group_name,
-+ .get_group_pins = bcm6358_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6358_pmx_ops = {
-+ .get_functions_count = bcm6358_pinctrl_get_func_count,
-+ .get_function_name = bcm6358_pinctrl_get_func_name,
-+ .get_function_groups = bcm6358_pinctrl_get_groups,
-+ .set_mux = bcm6358_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6358_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6358_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6358_pinctrl *pctl;
-+ struct regmap *mode;
-+ struct reg_field overlays = REG_FIELD(0, 0, 15);
-+
-+ if (pdev->dev.of_node)
-+ mode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+ "brcm,gpiomode");
-+ else
-+ mode = syscon_regmap_lookup_by_pdevname("syscon.fffe0098");
-+
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ pctl->overlays = devm_regmap_field_alloc(&pdev->dev, mode, overlays);
-+ if (IS_ERR(pctl->overlays))
-+ return PTR_ERR(pctl->overlays);
-+
-+ /* disable all muxes by default */
-+ regmap_field_write(pctl->overlays, 0);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6358_pctl_ops;
-+ pctl->desc.pmxops = &bcm6358_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6358_pins);
-+ pctl->desc.pins = bcm6358_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6358_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6358_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6358-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6358_pinctrl_driver = {
-+ .probe = bcm6358_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6358-pinctrl",
-+ .of_match_table = bcm6358_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6358_pinctrl_driver);
+++ /dev/null
-From ba03ea8ada2ca71c9095d96a1e4085c2c5cf0e69 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:18 +0200
-Subject: [PATCH 08/16] Documentation: add BCM6362 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6362 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6362-pinctrl.txt | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6362-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6362 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl"
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6362-pinctrl";
-+ reg = <0x10000080 0x8>,
-+ <0x10000088 0x8>,
-+ <0x10000090 0x4>,
-+ <0x10000098 0x4>,
-+ <0x1000009c 0x4>,
-+ <0x100000b8 0x4>;
-+ reg-names = "dirout", "dat", "led",
-+ "mode", "ctrl", "basemode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, usb_device_led
-+gpio1 1 led, sys_irq
-+gpio2 2 led, serial_led_clk
-+gpio3 3 led, serial_led_data
-+gpio4 4 led, robosw_led_data
-+gpio5 5 led, robosw_led_clk
-+gpio6 6 led, robosw_led0
-+gpio7 7 led, robosw_led1
-+gpio8 8 led, inet_led
-+gpio9 9 led, spi_cs2
-+gpio10 10 led, spi_cs3
-+gpio11 11 led, ntr_pulse
-+gpio12 12 led, uart1_scts
-+gpio13 13 led, uart1_srts
-+gpio14 14 led, uart1_sdin
-+gpio15 15 led, uart1_sdout
-+gpio16 16 led, adsl_spi_miso
-+gpio17 17 led, adsl_spi_mosi
-+gpio18 18 led, adsl_spi_clk
-+gpio19 19 led, adsl_spi_cs
-+gpio20 20 led, ephy0_led
-+gpio21 21 led, ephy1_led
-+gpio22 22 led, ephy2_led
-+gpio23 23 led, ephy3_led
-+gpio24 24 ext_irq0
-+gpio25 25 ext_irq1
-+gpio26 26 ext_irq2
-+gpio27 27 ext_irq3
-+gpio28 28 -
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+gpio32 32 wifi
-+gpio33 33 wifi
-+gpio34 34 wifi
-+gpio35 35 wifi
-+gpio36 36 wifi
-+gpio37 37 wifi
-+gpio38 38 wifi
-+gpio39 39 wifi
-+gpio40 40 wifi
-+gpio41 41 wifi
-+gpio42 42 wifi
-+gpio43 43 wifi
-+gpio44 44 wifi
-+gpio45 45 wifi
-+gpio46 46 wifi
-+gpio47 47 wifi
-+nand_grp 8, 12-23, 27 nand
+++ /dev/null
-From eea6b96701d734095e2f823f3a82d9b063f553ae Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:17:20 +0200
-Subject: [PATCH 09/16] pinctrl: add a pincontrol driver for BCM6362
-
-Add a pincotrol driver for BCM6362. BCM6362 allows muxing individual
-GPIO pins to the LED controller, to be available by the integrated
-wifi, or other functions. It also supports overlay groups, of which
-only NAND is documented.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c | 692 ++++++++++++++++++++++++++++++
- 3 files changed, 700 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -23,3 +23,10 @@ config PINCTRL_BCM6358
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
- select MFD_SYSCON
-+
-+config PINCTRL_BCM6362
-+ bool "BCM6362 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -2,3 +2,4 @@ obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
-+obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6362.c
-@@ -0,0 +1,692 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6362_NGPIO 48
-+
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND BIT(2)
-+
-+enum bcm6362_pinctrl_reg {
-+ BCM6362_LEDCTRL,
-+ BCM6362_MODE,
-+ BCM6362_CTRL,
-+ BCM6362_BASEMODE,
-+};
-+
-+struct bcm6362_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6362_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ enum bcm6362_pinctrl_reg reg;
-+ u32 basemode_mask;
-+};
-+
-+struct bcm6362_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *led;
-+ void __iomem *mode;
-+ void __iomem *ctrl;
-+ void __iomem *basemode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6362_PIN(a, b, mask) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(mask), \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6362_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ BCM6362_PIN(8, "gpio8", BASEMODE_NAND),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ BCM6362_PIN(12, "gpio12", BASEMODE_NAND),
-+ BCM6362_PIN(13, "gpio13", BASEMODE_NAND),
-+ BCM6362_PIN(14, "gpio14", BASEMODE_NAND),
-+ BCM6362_PIN(15, "gpio15", BASEMODE_NAND),
-+ BCM6362_PIN(16, "gpio16", BASEMODE_NAND),
-+ BCM6362_PIN(17, "gpio17", BASEMODE_NAND),
-+ BCM6362_PIN(18, "gpio18", BASEMODE_NAND),
-+ BCM6362_PIN(19, "gpio19", BASEMODE_NAND),
-+ BCM6362_PIN(20, "gpio20", BASEMODE_NAND),
-+ BCM6362_PIN(21, "gpio21", BASEMODE_NAND),
-+ BCM6362_PIN(22, "gpio22", BASEMODE_NAND),
-+ BCM6362_PIN(23, "gpio23", BASEMODE_NAND),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ BCM6362_PIN(27, "gpio27", BASEMODE_NAND),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+
-+static unsigned nand_grp_pins[] = {
-+ 8, 12, 13, 14, 15, 16, 17,
-+ 18, 19, 20, 21, 22, 23, 27,
-+};
-+
-+#define BCM6362_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6362_pingroup bcm6362_groups[] = {
-+ BCM6362_GROUP(gpio0),
-+ BCM6362_GROUP(gpio1),
-+ BCM6362_GROUP(gpio2),
-+ BCM6362_GROUP(gpio3),
-+ BCM6362_GROUP(gpio4),
-+ BCM6362_GROUP(gpio5),
-+ BCM6362_GROUP(gpio6),
-+ BCM6362_GROUP(gpio7),
-+ BCM6362_GROUP(gpio8),
-+ BCM6362_GROUP(gpio9),
-+ BCM6362_GROUP(gpio10),
-+ BCM6362_GROUP(gpio11),
-+ BCM6362_GROUP(gpio12),
-+ BCM6362_GROUP(gpio13),
-+ BCM6362_GROUP(gpio14),
-+ BCM6362_GROUP(gpio15),
-+ BCM6362_GROUP(gpio16),
-+ BCM6362_GROUP(gpio17),
-+ BCM6362_GROUP(gpio18),
-+ BCM6362_GROUP(gpio19),
-+ BCM6362_GROUP(gpio20),
-+ BCM6362_GROUP(gpio21),
-+ BCM6362_GROUP(gpio22),
-+ BCM6362_GROUP(gpio23),
-+ BCM6362_GROUP(gpio24),
-+ BCM6362_GROUP(gpio25),
-+ BCM6362_GROUP(gpio26),
-+ BCM6362_GROUP(gpio27),
-+ BCM6362_GROUP(gpio28),
-+ BCM6362_GROUP(gpio29),
-+ BCM6362_GROUP(gpio30),
-+ BCM6362_GROUP(gpio31),
-+ BCM6362_GROUP(gpio32),
-+ BCM6362_GROUP(gpio33),
-+ BCM6362_GROUP(gpio34),
-+ BCM6362_GROUP(gpio35),
-+ BCM6362_GROUP(gpio36),
-+ BCM6362_GROUP(gpio37),
-+ BCM6362_GROUP(gpio38),
-+ BCM6362_GROUP(gpio39),
-+ BCM6362_GROUP(gpio40),
-+ BCM6362_GROUP(gpio41),
-+ BCM6362_GROUP(gpio42),
-+ BCM6362_GROUP(gpio43),
-+ BCM6362_GROUP(gpio44),
-+ BCM6362_GROUP(gpio45),
-+ BCM6362_GROUP(gpio46),
-+ BCM6362_GROUP(gpio47),
-+ BCM6362_GROUP(nand_grp),
-+};
-+
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const robosw_led_data_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const robosw_led_clk_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const robosw_led0_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const robosw_led1_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const spi_cs2_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const spi_cs3_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const ntr_pulse_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const uart1_scts_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const uart1_srts_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const uart1_sdin_groups[] = {
-+ "gpio14",
-+};
-+
-+static const char * const uart1_sdout_groups[] = {
-+ "gpio15",
-+};
-+
-+static const char * const adsl_spi_miso_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const adsl_spi_mosi_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const adsl_spi_clk_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const adsl_spi_cs_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const ephy0_led_groups[] = {
-+ "gpio20",
-+};
-+
-+static const char * const ephy1_led_groups[] = {
-+ "gpio21",
-+};
-+
-+static const char * const ephy2_led_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const ephy3_led_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const ext_irq0_groups[] = {
-+ "gpio24",
-+};
-+
-+static const char * const ext_irq1_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ext_irq2_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ext_irq3_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const wifi_groups[] = {
-+ "gpio32",
-+ "gpio33",
-+ "gpio34",
-+ "gpio35",
-+ "gpio36",
-+ "gpio37",
-+ "gpio38",
-+ "gpio39",
-+ "gpio40",
-+ "gpio41",
-+ "gpio42",
-+ "gpio43",
-+ "gpio44",
-+ "gpio45",
-+ "gpio46",
-+ "gpio47",
-+};
-+
-+static const char * const nand_groups[] = {
-+ "nand_grp",
-+};
-+
-+#define BCM6362_LED_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_LEDCTRL, \
-+ }
-+
-+#define BCM6362_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_MODE, \
-+ }
-+
-+#define BCM6362_CTRL_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_CTRL, \
-+ }
-+
-+#define BCM6362_BASEMODE_FUN(n, mask) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM6362_BASEMODE, \
-+ .basemode_mask = (mask), \
-+ }
-+
-+static const struct bcm6362_function bcm6362_funcs[] = {
-+ BCM6362_LED_FUN(led),
-+ BCM6362_MODE_FUN(usb_device_led),
-+ BCM6362_MODE_FUN(sys_irq),
-+ BCM6362_MODE_FUN(serial_led_clk),
-+ BCM6362_MODE_FUN(serial_led_data),
-+ BCM6362_MODE_FUN(robosw_led_data),
-+ BCM6362_MODE_FUN(robosw_led_clk),
-+ BCM6362_MODE_FUN(robosw_led0),
-+ BCM6362_MODE_FUN(robosw_led1),
-+ BCM6362_MODE_FUN(inet_led),
-+ BCM6362_MODE_FUN(spi_cs2),
-+ BCM6362_MODE_FUN(spi_cs3),
-+ BCM6362_MODE_FUN(ntr_pulse),
-+ BCM6362_MODE_FUN(uart1_scts),
-+ BCM6362_MODE_FUN(uart1_srts),
-+ BCM6362_MODE_FUN(uart1_sdin),
-+ BCM6362_MODE_FUN(uart1_sdout),
-+ BCM6362_MODE_FUN(adsl_spi_miso),
-+ BCM6362_MODE_FUN(adsl_spi_mosi),
-+ BCM6362_MODE_FUN(adsl_spi_clk),
-+ BCM6362_MODE_FUN(adsl_spi_cs),
-+ BCM6362_MODE_FUN(ephy0_led),
-+ BCM6362_MODE_FUN(ephy1_led),
-+ BCM6362_MODE_FUN(ephy2_led),
-+ BCM6362_MODE_FUN(ephy3_led),
-+ BCM6362_MODE_FUN(ext_irq0),
-+ BCM6362_MODE_FUN(ext_irq1),
-+ BCM6362_MODE_FUN(ext_irq2),
-+ BCM6362_MODE_FUN(ext_irq3),
-+ BCM6362_CTRL_FUN(wifi),
-+ BCM6362_BASEMODE_FUN(nand, BASEMODE_NAND),
-+};
-+
-+static int bcm6362_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6362_groups);
-+}
-+
-+static const char *bcm6362_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6362_groups[group].name;
-+}
-+
-+static int bcm6362_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6362_groups[group].pins;
-+ *num_pins = bcm6362_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6362_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6362_funcs);
-+}
-+
-+static const char *bcm6362_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6362_funcs[selector].name;
-+}
-+
-+static int bcm6362_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6362_funcs[selector].groups;
-+ *num_groups = bcm6362_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6362_rmw_mux(struct bcm6362_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 tmp;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= val & mask;
-+ __raw_writel(tmp, reg);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm6362_set_gpio(struct bcm6362_pinctrl *pctl, unsigned pin)
-+{
-+ const struct pinctrl_pin_desc *desc = &bcm6362_pins[pin];
-+ u32 mask = BIT(pin % 32);
-+
-+ if (desc->drv_data)
-+ bcm6362_rmw_mux(pctl, pctl->basemode, (u32)desc->drv_data, 0);
-+
-+ if (pin < 32) {
-+ /* base mode 0 => gpio 1 => mux function */
-+ bcm6362_rmw_mux(pctl, pctl->mode, mask, 0);
-+
-+ /* pins 0-23 might be muxed to led */
-+ if (pin < 24)
-+ bcm6362_rmw_mux(pctl, pctl->led, mask, 0);
-+ } else {
-+ /* ctrl reg 0 => wifi function 1 => gpio */
-+ bcm6362_rmw_mux(pctl, pctl->ctrl, mask, mask);
-+ }
-+}
-+
-+static int bcm6362_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6362_pingroup *grp = &bcm6362_groups[group];
-+ const struct bcm6362_function *f = &bcm6362_funcs[selector];
-+ unsigned i;
-+ void __iomem *reg;
-+ u32 val, mask;
-+
-+ for (i = 0; i < grp->num_pins; i++)
-+ bcm6362_set_gpio(pctl, grp->pins[i]);
-+
-+ switch (f->reg) {
-+ case BCM6362_LEDCTRL:
-+ reg = pctl->led;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM6362_MODE:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM6362_CTRL:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = 0;
-+ break;
-+ case BCM6362_BASEMODE:
-+ reg = pctl->basemode;
-+ mask = f->basemode_mask;
-+ val = f->basemode_mask;
-+ break;
-+ default:
-+ WARN_ON(1);
-+ return -EINVAL;
-+ }
-+
-+ bcm6362_rmw_mux(pctl, reg, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm6362_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6362_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm6362_set_gpio(pctl, offset);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6362_pctl_ops = {
-+ .get_groups_count = bcm6362_pinctrl_get_group_count,
-+ .get_group_name = bcm6362_pinctrl_get_group_name,
-+ .get_group_pins = bcm6362_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6362_pmx_ops = {
-+ .get_functions_count = bcm6362_pinctrl_get_func_count,
-+ .get_function_name = bcm6362_pinctrl_get_func_name,
-+ .get_function_groups = bcm6362_pinctrl_get_groups,
-+ .set_mux = bcm6362_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6362_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6362_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6362_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *led, *mode, *ctrl, *basemode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+ led = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(led))
-+ return PTR_ERR(led);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+ ctrl = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(ctrl))
-+ return PTR_ERR(ctrl);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+ basemode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->led = led;
-+ pctl->mode = mode;
-+ pctl->ctrl = ctrl;
-+ pctl->basemode = basemode;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6362_pctl_ops;
-+ pctl->desc.pmxops = &bcm6362_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6362_pins);
-+ pctl->desc.pins = bcm6362_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6362_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6362_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6362-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6362_pinctrl_driver = {
-+ .probe = bcm6362_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6362-pinctrl",
-+ .of_match_table = bcm6362_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6362_pinctrl_driver);
+++ /dev/null
-From 30594cf9bfff176a9e4b14c50dcd8b9d0cc3edec Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:36:51 +0200
-Subject: [PATCH 10/16] Documentation: add BCM6368 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6368 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6368-pinctrl.txt | 67 ++++++++++++++++++++++
- 1 file changed, 67 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6368-pinctrl.txt
-@@ -0,0 +1,67 @@
-+* Broadcom BCM6368 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6368-pinctrl".
-+- reg: Register specifiers of dirout, dat, mode registers.
-+- reg-names: Must be "dirout", "dat", "mode".
-+- brcm,gpiobasemode: Phandle to the gpio basemode register.
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6368-pinctrl";
-+ reg = <0x10000080 0x08>,
-+ <0x10000088 0x08>,
-+ <0x10000098 0x04>;
-+ reg-names = "dirout", "dat", "mode";
-+ brcm,gpiobasemode = <&gpiobasemode>;
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+gpiobasemode: syscon@100000b8 {
-+ compatible = "brcm,bcm6368-gpiobasemode", "syscon";
-+ reg = <0x100000b8 4>;
-+ native-endian;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 analog_afe0
-+gpio1 1 analog_afe1
-+gpio2 2 sys_irq
-+gpio3 3 serial_led_data
-+gpio4 4 serial_led_clk
-+gpio5 5 inet_led
-+gpio6 6 ephy0_led
-+gpio7 7 ephy1_led
-+gpio8 8 ephy2_led
-+gpio9 9 ephy3_led
-+gpio10 10 robosw_led_data
-+gpio11 11 robosw_led_clk
-+gpio12 12 robosw_led0
-+gpio13 13 robosw_led1
-+gpio14 14 usb_device_led
-+gpio15 15 -
-+gpio16 16 pci_req1
-+gpio17 17 pci_gnt1
-+gpio18 18 pci_intb
-+gpio19 19 pci_req0
-+gpio20 20 pci_gnt0
-+gpio21 21 -
-+gpio22 22 pcmcia_cd1
-+gpio23 23 pcmcia_cd2
-+gpio24 24 pcmcia_vs1
-+gpio25 25 pcmcia_vs2
-+gpio26 26 ebi_cs2
-+gpio27 27 ebi_cs3
-+gpio28 28 spi_cs2
-+gpio29 29 spi_cs3
-+gpio30 30 spi_cs4
-+gpio31 31 spi_cs5
-+uart1_grp 30-33 uart1
+++ /dev/null
-From 90be3cb4f1a45b8be4a4ec264cd66c2f8e893fcb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:18:25 +0200
-Subject: [PATCH 11/16] pinctrl: add a pincontrol driver for BCM6368
-
-Add a pincontrol driver for BCM6368. BCM6368 allows muxing the first 32
-GPIOs onto alternative functions. Not all are documented.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 15 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c | 573 ++++++++++++++++++++++++++++++
- 3 files changed, 589 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -30,3 +30,18 @@ config PINCTRL_BCM6362
- select PINCONF
- select PINCTRL_BCM63XX
- select GENERIC_PINCONF
-+
-+config PINCTRL_BCM6368
-+ bool "BCM6368 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+ select MFD_SYSCON
-+
-+config PINCTRL_BCM63268
-+ bool "BCM63268 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -3,3 +3,4 @@ obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
-+obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6368.c
-@@ -0,0 +1,573 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/bitops.h>
-+#include <linux/kernel.h>
-+#include <linux/gpio.h>
-+#include <linux/mfd/syscon.h>
-+#include <linux/of.h>
-+#include <linux/of_address.h>
-+#include <linux/of_gpio.h>
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+#include <linux/platform_device.h>
-+#include <linux/regmap.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6368_NGPIO 38
-+
-+#define BCM6368_BASEMODE_MASK 0x7
-+#define BCM6368_BASEMODE_GPIO 0x0
-+#define BCM6368_BASEMODE_UART1 0x1
-+
-+struct bcm6368_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6368_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned dir_out:16;
-+ unsigned basemode:3;
-+};
-+
-+struct bcm6368_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ struct regmap_field *overlay;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM6368_BASEMODE_PIN(a, b) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)true \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm6368_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ BCM6368_BASEMODE_PIN(30, "gpio30"),
-+ BCM6368_BASEMODE_PIN(31, "gpio31"),
-+ BCM6368_BASEMODE_PIN(32, "gpio32"),
-+ BCM6368_BASEMODE_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned uart1_grp_pins[] = { 30, 31, 32, 33 };
-+
-+#define BCM6368_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6368_pingroup bcm6368_groups[] = {
-+ BCM6368_GROUP(gpio0),
-+ BCM6368_GROUP(gpio1),
-+ BCM6368_GROUP(gpio2),
-+ BCM6368_GROUP(gpio3),
-+ BCM6368_GROUP(gpio4),
-+ BCM6368_GROUP(gpio5),
-+ BCM6368_GROUP(gpio6),
-+ BCM6368_GROUP(gpio7),
-+ BCM6368_GROUP(gpio8),
-+ BCM6368_GROUP(gpio9),
-+ BCM6368_GROUP(gpio10),
-+ BCM6368_GROUP(gpio11),
-+ BCM6368_GROUP(gpio12),
-+ BCM6368_GROUP(gpio13),
-+ BCM6368_GROUP(gpio14),
-+ BCM6368_GROUP(gpio15),
-+ BCM6368_GROUP(gpio16),
-+ BCM6368_GROUP(gpio17),
-+ BCM6368_GROUP(gpio18),
-+ BCM6368_GROUP(gpio19),
-+ BCM6368_GROUP(gpio20),
-+ BCM6368_GROUP(gpio21),
-+ BCM6368_GROUP(gpio22),
-+ BCM6368_GROUP(gpio23),
-+ BCM6368_GROUP(gpio24),
-+ BCM6368_GROUP(gpio25),
-+ BCM6368_GROUP(gpio26),
-+ BCM6368_GROUP(gpio27),
-+ BCM6368_GROUP(gpio28),
-+ BCM6368_GROUP(gpio29),
-+ BCM6368_GROUP(gpio30),
-+ BCM6368_GROUP(gpio31),
-+ BCM6368_GROUP(uart1_grp),
-+};
-+
-+static const char * const analog_afe_0_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const analog_afe_1_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const sys_irq_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const inet_led_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const ephy0_led_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const ephy1_led_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const ephy2_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const ephy3_led_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const robosw_led_data_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const robosw_led_clk_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const robosw_led0_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const robosw_led1_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio14",
-+};
-+
-+static const char * const pci_req1_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const pci_gnt1_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const pci_intb_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const pci_req0_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const pci_gnt0_groups[] = {
-+ "gpio20",
-+};
-+
-+static const char * const pcmcia_cd1_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const pcmcia_cd2_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const pcmcia_vs1_groups[] = {
-+ "gpio24",
-+};
-+
-+static const char * const pcmcia_vs2_groups[] = {
-+ "gpio25",
-+};
-+
-+static const char * const ebi_cs2_groups[] = {
-+ "gpio26",
-+};
-+
-+static const char * const ebi_cs3_groups[] = {
-+ "gpio27",
-+};
-+
-+static const char * const spi_cs2_groups[] = {
-+ "gpio28",
-+};
-+
-+static const char * const spi_cs3_groups[] = {
-+ "gpio29",
-+};
-+
-+static const char * const spi_cs4_groups[] = {
-+ "gpio30",
-+};
-+
-+static const char * const spi_cs5_groups[] = {
-+ "gpio31",
-+};
-+
-+static const char * const uart1_groups[] = {
-+ "uart1_grp",
-+};
-+
-+#define BCM6368_FUN(n, out) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .dir_out = out, \
-+ }
-+
-+#define BCM6368_BASEMODE_FUN(n, val, out) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .basemode = BCM6368_BASEMODE_##val, \
-+ .dir_out = out, \
-+ }
-+
-+static const struct bcm6368_function bcm6368_funcs[] = {
-+ BCM6368_FUN(analog_afe_0, 1),
-+ BCM6368_FUN(analog_afe_1, 1),
-+ BCM6368_FUN(sys_irq, 1),
-+ BCM6368_FUN(serial_led_data, 1),
-+ BCM6368_FUN(serial_led_clk, 1),
-+ BCM6368_FUN(inet_led, 1),
-+ BCM6368_FUN(ephy0_led, 1),
-+ BCM6368_FUN(ephy1_led, 1),
-+ BCM6368_FUN(ephy2_led, 1),
-+ BCM6368_FUN(ephy3_led, 1),
-+ BCM6368_FUN(robosw_led_data, 1),
-+ BCM6368_FUN(robosw_led_clk, 1),
-+ BCM6368_FUN(robosw_led0, 1),
-+ BCM6368_FUN(robosw_led1, 1),
-+ BCM6368_FUN(usb_device_led, 1),
-+ BCM6368_FUN(pci_req1, 0),
-+ BCM6368_FUN(pci_gnt1, 0),
-+ BCM6368_FUN(pci_intb, 0),
-+ BCM6368_FUN(pci_req0, 0),
-+ BCM6368_FUN(pci_gnt0, 0),
-+ BCM6368_FUN(pcmcia_cd1, 0),
-+ BCM6368_FUN(pcmcia_cd2, 0),
-+ BCM6368_FUN(pcmcia_vs1, 0),
-+ BCM6368_FUN(pcmcia_vs2, 0),
-+ BCM6368_FUN(ebi_cs2, 1),
-+ BCM6368_FUN(ebi_cs3, 1),
-+ BCM6368_FUN(spi_cs2, 1),
-+ BCM6368_FUN(spi_cs3, 1),
-+ BCM6368_FUN(spi_cs4, 1),
-+ BCM6368_FUN(spi_cs5, 1),
-+ BCM6368_BASEMODE_FUN(uart1, UART1, 0x6),
-+};
-+
-+static int bcm6368_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6368_groups);
-+}
-+
-+static const char *bcm6368_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6368_groups[group].name;
-+}
-+
-+static int bcm6368_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6368_groups[group].pins;
-+ *num_pins = bcm6368_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6368_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6368_funcs);
-+}
-+
-+static const char *bcm6368_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6368_funcs[selector].name;
-+}
-+
-+static int bcm6368_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6368_funcs[selector].groups;
-+ *num_groups = bcm6368_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6368_rmw_mux(struct bcm6368_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ u32 tmp;
-+
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= (val & mask);
-+ __raw_writel(tmp, reg);
-+}
-+
-+static int bcm6368_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6368_pingroup *grp = &bcm6368_groups[group];
-+ const struct bcm6368_function *fun = &bcm6368_funcs[selector];
-+ unsigned long flags;
-+ int i, pin;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (fun->basemode) {
-+ u32 mask = 0;
-+
-+ for (i = 0; i < grp->num_pins; i++) {
-+ pin = grp->pins[i];
-+ if (pin < 32)
-+ mask |= BIT(pin);
-+ }
-+
-+ bcm6368_rmw_mux(pctl, pctl->mode, mask, 0);
-+ regmap_field_write(pctl->overlay, fun->basemode);
-+ } else {
-+ pin = grp->pins[0];
-+
-+ if (bcm6368_pins[pin].drv_data)
-+ regmap_field_write(pctl->overlay,
-+ BCM6368_BASEMODE_GPIO);
-+
-+ bcm6368_rmw_mux(pctl, pctl->mode, BIT(pin), BIT(pin));
-+ }
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+
-+ for (pin = 0; pin < grp->num_pins; pin++) {
-+ int hw_gpio = bcm6368_pins[pin].number;
-+ struct gpio_chip *gc = &pctl->gpio[hw_gpio / 32];
-+
-+ if (fun->dir_out & BIT(pin))
-+ gc->direction_output(gc, hw_gpio % 32, 0);
-+ else
-+ gc->direction_input(gc, hw_gpio % 32);
-+ }
-+
-+ return 0;
-+}
-+
-+static int bcm6368_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6368_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ unsigned long flags;
-+
-+ if (offset >= 32 && !bcm6368_pins[offset].drv_data)
-+ return 0;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ /* disable all functions using this pin */
-+ if (offset < 32)
-+ bcm6368_rmw_mux(pctl, pctl->mode, BIT(offset), 0);
-+
-+ if (bcm6368_pins[offset].drv_data)
-+ regmap_field_write(pctl->overlay, BCM6368_BASEMODE_GPIO);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6368_pctl_ops = {
-+ .get_groups_count = bcm6368_pinctrl_get_group_count,
-+ .get_group_name = bcm6368_pinctrl_get_group_name,
-+ .get_group_pins = bcm6368_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6368_pmx_ops = {
-+ .get_functions_count = bcm6368_pinctrl_get_func_count,
-+ .get_function_name = bcm6368_pinctrl_get_func_name,
-+ .get_function_groups = bcm6368_pinctrl_get_groups,
-+ .set_mux = bcm6368_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6368_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6368_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6368_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode;
-+ struct regmap *basemode;
-+ struct reg_field overlay = REG_FIELD(0, 0, 3);
-+
-+ if (pdev->dev.of_node)
-+ basemode = syscon_regmap_lookup_by_phandle(pdev->dev.of_node,
-+ "brcm,gpiobasemode");
-+ else
-+ basemode = syscon_regmap_lookup_by_pdevname("syscon.b00000b8");
-+
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ pctl->overlay = devm_regmap_field_alloc(&pdev->dev, basemode, overlay);
-+ if (IS_ERR(pctl->overlay))
-+ return PTR_ERR(pctl->overlay);
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ /* disable all muxes by default */
-+ __raw_writel(0, pctl->mode);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6368_pctl_ops;
-+ pctl->desc.pmxops = &bcm6368_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6368_pins);
-+ pctl->desc.pins = bcm6368_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6368_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6368_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6368-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6368_pinctrl_driver = {
-+ .probe = bcm6368_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6368-pinctrl",
-+ .of_match_table = bcm6368_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6368_pinctrl_driver);
+++ /dev/null
-From 28cc80e4ada5d73d5305fd268297825cd8d01936 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:37:08 +0200
-Subject: [PATCH 12/16] Documentation: add BCM63268 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in the BCM63268
-family SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm63268-pinctrl.txt | 88 ++++++++++++++++++++++
- 1 file changed, 88 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm63268-pinctrl.txt
-@@ -0,0 +1,88 @@
-+* Broadcom BCM63268 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6362-pinctrl".
-+- reg: Register specifiers of dirout, dat, led, mode, ctrl, basemode registers.
-+- reg-names: Must be "dirout", "dat", "led", "mode", "ctrl", "basemode".
-+- gpio-controller: Identifies this node as a GPIO controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@100000c0 {
-+ compatible = "brcm,bcm63268-pinctrl";
-+ reg = <0x100000c0 0x8>,
-+ <0x100000c8 0x8>,
-+ <0x100000d0 0x4>,
-+ <0x100000d8 0x4>,
-+ <0x100000dc 0x4>,
-+ <0x100000f8 0x4>;
-+ reg-names = "dirout", "dat", "led", "mode",
-+ "ctrl", "basemode";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, serial_led_clk
-+gpio1 1 led, serial_led_data
-+gpio2 2 led,
-+gpio3 3 led,
-+gpio4 4 led,
-+gpio5 5 led,
-+gpio6 6 led,
-+gpio7 7 led,
-+gpio8 8 led, hsspi_cs6
-+gpio9 9 led, hsspi_cs7
-+gpio10 10 led, uart1_scts
-+gpio11 11 led, uart1_srts
-+gpio12 12 led, uart1_sdin
-+gpio13 13 led, uart1_sdout
-+gpio14 14 led, ntr_pulse_in
-+gpio15 15 led, dsl_ntr_pulse_out
-+gpio16 16 led, hsspi_cs4
-+gpio17 17 led, hsspi_cs5
-+gpio18 18 led, adsl_spi_miso
-+gpio19 19 led, adsl_spi_mosi
-+gpio20 20 led,
-+gpio21 21 led,
-+gpio22 22 led, vreg_clk
-+gpio23 23 led, pcie_clkreq_b
-+gpio24 24 uart1_scts
-+gpio25 25 uart1_srts
-+gpio26 26 uart1_sdin
-+gpio27 27 uart1_sdout
-+gpio28 28 ntr_pulse_in
-+gpio29 29 dsl_ntr_pulse_out
-+gpio30 30 switch_led_clk
-+gpio31 31 switch_led_data
-+gpio32 32 wifi
-+gpio33 33 wifi
-+gpio34 34 wifi
-+gpio35 35 wifi
-+gpio36 36 wifi
-+gpio37 37 wifi
-+gpio38 38 wifi
-+gpio39 39 wifi
-+gpio40 40 wifi
-+gpio41 41 wifi
-+gpio42 42 wifi
-+gpio43 43 wifi
-+gpio44 44 wifi
-+gpio45 45 wifi
-+gpio46 46 wifi
-+gpio47 47 wifi
-+gpio48 48 wifi
-+gpio49 49 wifi
-+gpio50 50 wifi
-+gpio51 51 wifi
-+nand_grp 2-7,24-31 nand
-+dect_pd_grp 8-9 dect_pd
-+vdsl_phy0_grp 10-11 vdsl_phy0
-+vdsl_phy1_grp 12-13 vdsl_phy1
-+vdsl_phy2_grp 24-25 vdsl_phy2
-+vdsl_phy3_grp 26-27 vdsl_phy3
+++ /dev/null
-From 8665d3ea63649cc155286c75f83f694a930580e5 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:19:12 +0200
-Subject: [PATCH 13/16] pinctrl: add a pincontrol driver for BCM63268
-
-Add a pincontrol driver for BCM63268. BCM63268 allows muxing GPIOs
-to different functions. Depending on the mux, these are either single
-pin configurations or whole pin groups.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c | 710 +++++++++++++++++++++++++++++
- 2 files changed, 711 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
-
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -4,3 +4,4 @@ obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
- obj-$(CONFIG_PINCTRL_BCM6362) += pinctrl-bcm6362.o
- obj-$(CONFIG_PINCTRL_BCM6368) += pinctrl-bcm6368.o
-+obj-$(CONFIG_PINCTRL_BCM63268) += pinctrl-bcm63268.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm63268.c
-@@ -0,0 +1,710 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM63268_NGPIO 52
-+
-+/* GPIO_BASEMODE register */
-+#define BASEMODE_NAND BIT(2) /* GPIOs 2-7, 24-31 */
-+#define BASEMODE_GPIO35 BIT(4) /* GPIO 35 */
-+#define BASEMODE_DECTPD BIT(5) /* GPIOs 8/9 */
-+#define BASEMODE_VDSL_PHY_0 BIT(6) /* GPIOs 10/11 */
-+#define BASEMODE_VDSL_PHY_1 BIT(7) /* GPIOs 12/13 */
-+#define BASEMODE_VDSL_PHY_2 BIT(8) /* GPIOs 24/25 */
-+#define BASEMODE_VDSL_PHY_3 BIT(9) /* GPIOs 26/27 */
-+
-+enum bcm63268_pinctrl_reg {
-+ BCM63268_LEDCTRL,
-+ BCM63268_MODE,
-+ BCM63268_CTRL,
-+ BCM63268_BASEMODE,
-+};
-+
-+struct bcm63268_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm63268_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ enum bcm63268_pinctrl_reg reg;
-+ u32 mask;
-+};
-+
-+struct bcm63268_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *led;
-+ void __iomem *mode;
-+ void __iomem *ctrl;
-+ void __iomem *basemode;
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+#define BCM63268_PIN(a, b, basemode) \
-+ { \
-+ .number = a, \
-+ .name = b, \
-+ .drv_data = (void *)(basemode) \
-+ }
-+
-+static const struct pinctrl_pin_desc bcm63268_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ BCM63268_PIN(2, "gpio2", BASEMODE_NAND),
-+ BCM63268_PIN(3, "gpio3", BASEMODE_NAND),
-+ BCM63268_PIN(4, "gpio4", BASEMODE_NAND),
-+ BCM63268_PIN(5, "gpio5", BASEMODE_NAND),
-+ BCM63268_PIN(6, "gpio6", BASEMODE_NAND),
-+ BCM63268_PIN(7, "gpio7", BASEMODE_NAND),
-+ BCM63268_PIN(8, "gpio8", BASEMODE_DECTPD),
-+ BCM63268_PIN(9, "gpio9", BASEMODE_DECTPD),
-+ BCM63268_PIN(10, "gpio10", BASEMODE_VDSL_PHY_0),
-+ BCM63268_PIN(11, "gpio11", BASEMODE_VDSL_PHY_0),
-+ BCM63268_PIN(12, "gpio12", BASEMODE_VDSL_PHY_1),
-+ BCM63268_PIN(13, "gpio13", BASEMODE_VDSL_PHY_1),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ BCM63268_PIN(24, "gpio24", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+ BCM63268_PIN(25, "gpio25", BASEMODE_NAND | BASEMODE_VDSL_PHY_2),
-+ BCM63268_PIN(26, "gpio26", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+ BCM63268_PIN(27, "gpio27", BASEMODE_NAND | BASEMODE_VDSL_PHY_3),
-+ BCM63268_PIN(28, "gpio28", BASEMODE_NAND),
-+ BCM63268_PIN(29, "gpio29", BASEMODE_NAND),
-+ BCM63268_PIN(30, "gpio30", BASEMODE_NAND),
-+ BCM63268_PIN(31, "gpio31", BASEMODE_NAND),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+ PINCTRL_PIN(48, "gpio48"),
-+ PINCTRL_PIN(49, "gpio49"),
-+ PINCTRL_PIN(50, "gpio50"),
-+ PINCTRL_PIN(51, "gpio51"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+static unsigned gpio48_pins[] = { 48 };
-+static unsigned gpio49_pins[] = { 49 };
-+static unsigned gpio50_pins[] = { 50 };
-+static unsigned gpio51_pins[] = { 51 };
-+
-+static unsigned nand_grp_pins[] = {
-+ 2, 3, 4, 5, 6, 7, 24,
-+ 25, 26, 27, 28, 29, 30, 31,
-+};
-+
-+static unsigned dectpd_grp_pins[] = { 8, 9 };
-+static unsigned vdsl_phy0_grp_pins[] = { 10, 11 };
-+static unsigned vdsl_phy1_grp_pins[] = { 12, 13 };
-+static unsigned vdsl_phy2_grp_pins[] = { 24, 25 };
-+static unsigned vdsl_phy3_grp_pins[] = { 26, 27 };
-+
-+#define BCM63268_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm63268_pingroup bcm63268_groups[] = {
-+ BCM63268_GROUP(gpio0),
-+ BCM63268_GROUP(gpio1),
-+ BCM63268_GROUP(gpio2),
-+ BCM63268_GROUP(gpio3),
-+ BCM63268_GROUP(gpio4),
-+ BCM63268_GROUP(gpio5),
-+ BCM63268_GROUP(gpio6),
-+ BCM63268_GROUP(gpio7),
-+ BCM63268_GROUP(gpio8),
-+ BCM63268_GROUP(gpio9),
-+ BCM63268_GROUP(gpio10),
-+ BCM63268_GROUP(gpio11),
-+ BCM63268_GROUP(gpio12),
-+ BCM63268_GROUP(gpio13),
-+ BCM63268_GROUP(gpio14),
-+ BCM63268_GROUP(gpio15),
-+ BCM63268_GROUP(gpio16),
-+ BCM63268_GROUP(gpio17),
-+ BCM63268_GROUP(gpio18),
-+ BCM63268_GROUP(gpio19),
-+ BCM63268_GROUP(gpio20),
-+ BCM63268_GROUP(gpio21),
-+ BCM63268_GROUP(gpio22),
-+ BCM63268_GROUP(gpio23),
-+ BCM63268_GROUP(gpio24),
-+ BCM63268_GROUP(gpio25),
-+ BCM63268_GROUP(gpio26),
-+ BCM63268_GROUP(gpio27),
-+ BCM63268_GROUP(gpio28),
-+ BCM63268_GROUP(gpio29),
-+ BCM63268_GROUP(gpio30),
-+ BCM63268_GROUP(gpio31),
-+ BCM63268_GROUP(gpio32),
-+ BCM63268_GROUP(gpio33),
-+ BCM63268_GROUP(gpio34),
-+ BCM63268_GROUP(gpio35),
-+ BCM63268_GROUP(gpio36),
-+ BCM63268_GROUP(gpio37),
-+ BCM63268_GROUP(gpio38),
-+ BCM63268_GROUP(gpio39),
-+ BCM63268_GROUP(gpio40),
-+ BCM63268_GROUP(gpio41),
-+ BCM63268_GROUP(gpio42),
-+ BCM63268_GROUP(gpio43),
-+ BCM63268_GROUP(gpio44),
-+ BCM63268_GROUP(gpio45),
-+ BCM63268_GROUP(gpio46),
-+ BCM63268_GROUP(gpio47),
-+ BCM63268_GROUP(gpio48),
-+ BCM63268_GROUP(gpio49),
-+ BCM63268_GROUP(gpio50),
-+ BCM63268_GROUP(gpio51),
-+
-+ /* multi pin groups */
-+ BCM63268_GROUP(nand_grp),
-+ BCM63268_GROUP(dectpd_grp),
-+ BCM63268_GROUP(vdsl_phy0_grp),
-+ BCM63268_GROUP(vdsl_phy1_grp),
-+ BCM63268_GROUP(vdsl_phy2_grp),
-+ BCM63268_GROUP(vdsl_phy3_grp),
-+};
-+
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const hsspi_cs4_groups[] = {
-+ "gpio16",
-+};
-+
-+static const char * const hsspi_cs5_groups[] = {
-+ "gpio17",
-+};
-+
-+static const char * const hsspi_cs6_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const hsspi_cs7_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const uart1_scts_groups[] = {
-+ "gpio10",
-+ "gpio24",
-+};
-+
-+static const char * const uart1_srts_groups[] = {
-+ "gpio11",
-+ "gpio25",
-+};
-+
-+static const char * const uart1_sdin_groups[] = {
-+ "gpio12",
-+ "gpio26",
-+};
-+
-+static const char * const uart1_sdout_groups[] = {
-+ "gpio13",
-+ "gpio27",
-+};
-+
-+static const char * const ntr_pulse_in_groups[] = {
-+ "gpio14",
-+ "gpio28",
-+};
-+
-+static const char * const dsl_ntr_pulse_out_groups[] = {
-+ "gpio15",
-+ "gpio29",
-+};
-+
-+static const char * const adsl_spi_miso_groups[] = {
-+ "gpio18",
-+};
-+
-+static const char * const adsl_spi_mosi_groups[] = {
-+ "gpio19",
-+};
-+
-+static const char * const vreg_clk_groups[] = {
-+ "gpio22",
-+};
-+
-+static const char * const pcie_clkreq_b_groups[] = {
-+ "gpio23",
-+};
-+
-+static const char * const switch_led_clk_groups[] = {
-+ "gpio30",
-+};
-+
-+static const char * const switch_led_data_groups[] = {
-+ "gpio31",
-+};
-+
-+static const char * const wifi_groups[] = {
-+ "gpio32",
-+ "gpio33",
-+ "gpio34",
-+ "gpio35",
-+ "gpio36",
-+ "gpio37",
-+ "gpio38",
-+ "gpio39",
-+ "gpio40",
-+ "gpio41",
-+ "gpio42",
-+ "gpio43",
-+ "gpio44",
-+ "gpio45",
-+ "gpio46",
-+ "gpio47",
-+ "gpio48",
-+ "gpio49",
-+ "gpio50",
-+ "gpio51",
-+};
-+
-+static const char * const nand_groups[] = {
-+ "nand_grp",
-+};
-+
-+static const char * const dectpd_groups[] = {
-+ "dectpd_grp",
-+};
-+
-+static const char * const vdsl_phy_override_0_groups[] = {
-+ "vdsl_phy_override_0_grp",
-+};
-+
-+static const char * const vdsl_phy_override_1_groups[] = {
-+ "vdsl_phy_override_1_grp",
-+};
-+
-+static const char * const vdsl_phy_override_2_groups[] = {
-+ "vdsl_phy_override_2_grp",
-+};
-+
-+static const char * const vdsl_phy_override_3_groups[] = {
-+ "vdsl_phy_override_3_grp",
-+};
-+
-+#define BCM63268_LED_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_LEDCTRL, \
-+ }
-+
-+#define BCM63268_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_MODE, \
-+ }
-+
-+#define BCM63268_CTRL_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_CTRL, \
-+ }
-+
-+#define BCM63268_BASEMODE_FUN(n, val) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .reg = BCM63268_BASEMODE, \
-+ .mask = val, \
-+ }
-+
-+static const struct bcm63268_function bcm63268_funcs[] = {
-+ BCM63268_LED_FUN(led),
-+ BCM63268_MODE_FUN(serial_led_clk),
-+ BCM63268_MODE_FUN(serial_led_data),
-+ BCM63268_MODE_FUN(hsspi_cs6),
-+ BCM63268_MODE_FUN(hsspi_cs7),
-+ BCM63268_MODE_FUN(uart1_scts),
-+ BCM63268_MODE_FUN(uart1_srts),
-+ BCM63268_MODE_FUN(uart1_sdin),
-+ BCM63268_MODE_FUN(uart1_sdout),
-+ BCM63268_MODE_FUN(ntr_pulse_in),
-+ BCM63268_MODE_FUN(dsl_ntr_pulse_out),
-+ BCM63268_MODE_FUN(hsspi_cs4),
-+ BCM63268_MODE_FUN(hsspi_cs5),
-+ BCM63268_MODE_FUN(adsl_spi_miso),
-+ BCM63268_MODE_FUN(adsl_spi_mosi),
-+ BCM63268_MODE_FUN(vreg_clk),
-+ BCM63268_MODE_FUN(pcie_clkreq_b),
-+ BCM63268_MODE_FUN(switch_led_clk),
-+ BCM63268_MODE_FUN(switch_led_data),
-+ BCM63268_CTRL_FUN(wifi),
-+ BCM63268_BASEMODE_FUN(nand, BASEMODE_NAND),
-+ BCM63268_BASEMODE_FUN(dectpd, BASEMODE_DECTPD),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_0, BASEMODE_VDSL_PHY_0),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_1, BASEMODE_VDSL_PHY_1),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_2, BASEMODE_VDSL_PHY_2),
-+ BCM63268_BASEMODE_FUN(vdsl_phy_override_3, BASEMODE_VDSL_PHY_3),
-+};
-+
-+static int bcm63268_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm63268_groups);
-+}
-+
-+static const char *bcm63268_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm63268_groups[group].name;
-+}
-+
-+static int bcm63268_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group,
-+ const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm63268_groups[group].pins;
-+ *num_pins = bcm63268_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm63268_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm63268_funcs);
-+}
-+
-+static const char *bcm63268_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm63268_funcs[selector].name;
-+}
-+
-+static int bcm63268_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm63268_funcs[selector].groups;
-+ *num_groups = bcm63268_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm63268_rmw_mux(struct bcm63268_pinctrl *pctl, void __iomem *reg,
-+ u32 mask, u32 val)
-+{
-+ unsigned long flags;
-+ u32 tmp;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ tmp = __raw_readl(reg);
-+ tmp &= ~mask;
-+ tmp |= val;
-+ __raw_writel(tmp, reg);
-+
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm63268_set_gpio(struct bcm63268_pinctrl *pctl, unsigned pin)
-+{
-+ const struct pinctrl_pin_desc *desc = &bcm63268_pins[pin];
-+ u32 basemode = (unsigned long)desc->drv_data;
-+ u32 mask = BIT(pin % 32);
-+
-+ if (basemode)
-+ bcm63268_rmw_mux(pctl, pctl->basemode, basemode, 0);
-+
-+ if (pin < 32) {
-+ /* base mode: 0 => gpio, 1 => mux function */
-+ bcm63268_rmw_mux(pctl, pctl->mode, mask, 0);
-+
-+ /* pins 0-23 might be muxed to led */
-+ if (pin < 24)
-+ bcm63268_rmw_mux(pctl, pctl->led, mask, 0);
-+ } else if (pin < 52) {
-+ /* ctrl reg: 0 => wifi function, 1 => gpio */
-+ bcm63268_rmw_mux(pctl, pctl->ctrl, mask, mask);
-+ }
-+}
-+
-+static int bcm63268_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm63268_pingroup *grp = &bcm63268_groups[group];
-+ const struct bcm63268_function *f = &bcm63268_funcs[selector];
-+ unsigned i;
-+ void __iomem *reg;
-+ u32 val, mask;
-+
-+ for (i = 0; i < grp->num_pins; i++)
-+ bcm63268_set_gpio(pctl, grp->pins[i]);
-+
-+ switch (f->reg) {
-+ case BCM63268_LEDCTRL:
-+ reg = pctl->led;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM63268_MODE:
-+ reg = pctl->mode;
-+ mask = BIT(grp->pins[0]);
-+ val = BIT(grp->pins[0]);
-+ break;
-+ case BCM63268_CTRL:
-+ reg = pctl->ctrl;
-+ mask = BIT(grp->pins[0]);
-+ val = 0;
-+ break;
-+ case BCM63268_BASEMODE:
-+ reg = pctl->basemode;
-+ mask = f->mask;
-+ val = f->mask;
-+ break;
-+ default:
-+ WARN_ON(1);
-+ return -EINVAL;
-+ }
-+
-+ bcm63268_rmw_mux(pctl, reg, mask, val);
-+
-+ return 0;
-+}
-+
-+static int bcm63268_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm63268_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ bcm63268_set_gpio(pctl, offset);
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm63268_pctl_ops = {
-+ .get_groups_count = bcm63268_pinctrl_get_group_count,
-+ .get_group_name = bcm63268_pinctrl_get_group_name,
-+ .get_group_pins = bcm63268_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm63268_pmx_ops = {
-+ .get_functions_count = bcm63268_pinctrl_get_func_count,
-+ .get_function_name = bcm63268_pinctrl_get_func_name,
-+ .get_function_groups = bcm63268_pinctrl_get_groups,
-+ .set_mux = bcm63268_pinctrl_set_mux,
-+ .gpio_request_enable = bcm63268_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm63268_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm63268_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *led, *mode, *ctrl, *basemode;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "led");
-+ led = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(led))
-+ return PTR_ERR(led);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "ctrl");
-+ ctrl = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(ctrl))
-+ return PTR_ERR(ctrl);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "basemode");
-+ basemode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(basemode))
-+ return PTR_ERR(basemode);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->led = led;
-+ pctl->mode = mode;
-+ pctl->ctrl = ctrl;
-+ pctl->basemode = basemode;
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm63268_pctl_ops;
-+ pctl->desc.pmxops = &bcm63268_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm63268_pins);
-+ pctl->desc.pins = bcm63268_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM63268_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm63268_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm63268-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm63268_pinctrl_driver = {
-+ .probe = bcm63268_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm63268-pinctrl",
-+ .of_match_table = bcm63268_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm63268_pinctrl_driver);
+++ /dev/null
-From e058fa1969019c2f6705c53c4130e364a877d4e6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 26 Nov 2017 12:07:31 +0100
-Subject: [PATCH] gpio: fix device tree gpio hogs on dual role gpio/pincontrol
- controllers
-
-For dual role gpio and pincontrol controller, the device registration
-path is often:
-
- pinctrl_register(...);
- gpiochip_add_data(...);
- gpiochip_add_pin_range(...);
-
-If the device tree node has any gpio-hogs, the code will try to apply them
-in the gpiochip_add_data step, but fail as they cannot be requested, as the
-ranges are missing. But we also cannot first add the pinranges, as the
-appropriate data structures are only initialized in gpiochip_add_data.
-
-To fix this, defer gpio-hogs to the time pin ranges get added instead of
-directly at chip request time, if the gpio-chip has a request method.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
-
- drivers/gpio/gpiolib-of.c | 20 +++++++++++++++-----
- drivers/gpio/gpiolib.c | 5 +++--
- drivers/gpio/gpiolib.h | 8 ++++++++
- 3 files changed, 26 insertions(+), 7 deletions(-)
-
---- a/drivers/gpio/gpiolib-of.c
-+++ b/drivers/gpio/gpiolib-of.c
-@@ -363,12 +363,15 @@ static struct gpio_desc *of_parse_own_gp
- /**
- * of_gpiochip_scan_gpios - Scan gpio-controller for gpio definitions
- * @chip: gpio chip to act on
-+ * @start: first gpio to check
-+ * @num: number of gpios to check
- *
-- * This is only used by of_gpiochip_add to request/set GPIO initial
-- * configuration.
-+ * This is used by of_gpiochip_add, gpiochip_add_pingroup_range and
-+ * gpiochip_add_pin_range to request/set GPIO initial configuration.
- * It returns error if it fails otherwise 0 on success.
- */
--static int of_gpiochip_scan_gpios(struct gpio_chip *chip)
-+int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
-+ unsigned int num)
- {
- struct gpio_desc *desc = NULL;
- struct device_node *np;
-@@ -376,7 +379,7 @@ static int of_gpiochip_scan_gpios(struct
- enum gpio_lookup_flags lflags;
- enum gpiod_flags dflags;
- unsigned int i;
-- int ret;
-+ int ret, hwgpio;
-
- for_each_available_child_of_node(chip->of_node, np) {
- if (!of_property_read_bool(np, "gpio-hog"))
-@@ -388,6 +391,10 @@ static int of_gpiochip_scan_gpios(struct
- if (IS_ERR(desc))
- break;
-
-+ hwgpio = gpio_chip_hwgpio(desc);
-+ if (hwgpio < start || hwgpio >= (start + num))
-+ continue;
-+
- ret = gpiod_hog(desc, name, lflags, dflags);
- if (ret < 0) {
- of_node_put(np);
-@@ -646,12 +653,13 @@ int of_gpiochip_add(struct gpio_chip *ch
-
- of_node_get(chip->of_node);
-
-- status = of_gpiochip_scan_gpios(chip);
-- if (status) {
-- of_node_put(chip->of_node);
-- gpiochip_remove_pin_ranges(chip);
-+ if (!chip->request) {
-+ status = of_gpiochip_scan_gpios(chip, 0, chip->ngpio);
-+ if (status) {
-+ of_node_put(chip->of_node);
-+ gpiochip_remove_pin_ranges(chip);
-+ }
- }
--
- return status;
- }
-
---- a/drivers/gpio/gpiolib.c
-+++ b/drivers/gpio/gpiolib.c
-@@ -2205,7 +2205,8 @@ int gpiochip_add_pingroup_range(struct g
-
- list_add_tail(&pin_range->node, &gdev->pin_ranges);
-
-- return 0;
-+ return of_gpiochip_scan_gpios(chip, gpio_offset,
-+ pin_range->range.npins);
- }
- EXPORT_SYMBOL_GPL(gpiochip_add_pingroup_range);
-
-@@ -2262,7 +2263,7 @@ int gpiochip_add_pin_range(struct gpio_c
-
- list_add_tail(&pin_range->node, &gdev->pin_ranges);
-
-- return 0;
-+ return of_gpiochip_scan_gpios(chip, gpio_offset, npins);
- }
- EXPORT_SYMBOL_GPL(gpiochip_add_pin_range);
-
---- a/drivers/gpio/gpiolib.h
-+++ b/drivers/gpio/gpiolib.h
-@@ -103,6 +103,8 @@ struct gpio_desc *of_get_named_gpiod_fla
- const char *list_name, int index, enum of_gpio_flags *flags);
- int of_gpiochip_add(struct gpio_chip *gc);
- void of_gpiochip_remove(struct gpio_chip *gc);
-+int of_gpiochip_scan_gpios(struct gpio_chip *chip, unsigned int start,
-+ unsigned int num);
- #else
- static inline struct gpio_desc *of_find_gpio(struct device *dev,
- const char *con_id,
-@@ -118,6 +120,12 @@ static inline struct gpio_desc *of_get_n
- }
- static inline int of_gpiochip_add(struct gpio_chip *gc) { return 0; }
- static inline void of_gpiochip_remove(struct gpio_chip *gc) { }
-+static inline int of_gpiochip_scan_gpios(struct gpio_chip *chip,
-+ unsigned int start,
-+ unsigned int num)
-+{
-+ return 0;
-+}
- #endif /* CONFIG_OF_GPIO */
-
- #ifdef CONFIG_ACPI
+++ /dev/null
-From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 19 Jan 2014 12:18:03 +0100
-Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
-
-In the same way as the ohci platform driver allows limiting ports,
-enable the same for ehci. This prevents a mismatch in the available
-ports between ehci/ohci on USB 2.0 controllers.
-
-This is needed if the USB host controller always reports the maximum
-number of ports regardless of the number of available ports (because
-one might be set to be usb device).
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/usb/host/ehci-hcd.c | 4 ++++
- drivers/usb/host/ehci-platform.c | 2 ++
- drivers/usb/host/ehci.h | 1 +
- include/linux/usb/ehci_pdriver.h | 1 +
- 4 files changed, 8 insertions(+)
-
---- a/drivers/usb/host/ehci-hcd.c
-+++ b/drivers/usb/host/ehci-hcd.c
-@@ -665,6 +665,10 @@ int ehci_setup(struct usb_hcd *hcd)
-
- /* cache this readonly data; minimize chip reads */
- ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
-+ if (ehci->num_ports) {
-+ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
-+ ehci->hcs_params |= ehci->num_ports;
-+ }
-
- ehci->sbrn = HCD_USB2;
-
---- a/drivers/usb/host/ehci-platform.c
-+++ b/drivers/usb/host/ehci-platform.c
-@@ -57,6 +57,9 @@ static int ehci_platform_reset(struct us
-
- ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
-
-+ if (pdata->num_ports && pdata->num_ports <= 15)
-+ ehci->num_ports = pdata->num_ports;
-+
- if (pdata->pre_setup) {
- retval = pdata->pre_setup(hcd);
- if (retval < 0)
---- a/drivers/usb/host/ehci.h
-+++ b/drivers/usb/host/ehci.h
-@@ -203,6 +203,7 @@ struct ehci_hcd { /* one per controlle
- u32 command;
-
- /* SILICON QUIRKS */
-+ unsigned int num_ports;
- unsigned no_selective_suspend:1;
- unsigned has_fsl_port_bug:1; /* FreeScale */
- unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
---- a/include/linux/usb/ehci_pdriver.h
-+++ b/include/linux/usb/ehci_pdriver.h
-@@ -43,6 +43,7 @@ struct usb_hcd;
- */
- struct usb_ehci_pdata {
- int caps_offset;
-+ unsigned int num_ports;
- unsigned has_tt:1;
- unsigned has_synopsys_hc_bug:1;
- unsigned big_endian_desc:1;
+++ /dev/null
-From 5a50cb0d53344a2429831b00925d6183d4d332e1 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 03:54:05 +0100
-Subject: [PATCH 40/44] MIPS: BCM63XX: move device registration code into its
- own file
-
-Move device registration code into its own file to allow sharing it
-between board implementations.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Makefile | 1 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 188 +-------------------------
- arch/mips/bcm63xx/boards/board_common.c | 215 ++++++++++++++++++++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 8 ++
- 4 files changed, 223 insertions(+), 183 deletions(-)
- create mode 100644 arch/mips/bcm63xx/boards/board_common.c
- create mode 100644 arch/mips/bcm63xx/boards/board_common.h
-
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1 +1,2 @@
-+obj-y += board_common.o
- obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -12,33 +12,21 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
--#include <linux/platform_device.h>
--#include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_nvram.h>
--#include <bcm63xx_dev_pci.h>
--#include <bcm63xx_dev_enet.h>
--#include <bcm63xx_dev_flash.h>
--#include <bcm63xx_dev_hsspi.h>
--#include <bcm63xx_dev_pcmcia.h>
--#include <bcm63xx_dev_spi.h>
--#include <bcm63xx_dev_usb_ehci.h>
--#include <bcm63xx_dev_usb_ohci.h>
--#include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-+#include "board_common.h"
-+
- #include <uapi/linux/bcm933xx_hcs.h>
-
-
- #define HCS_OFFSET_128K 0x20000
-
--static struct board_info board;
--
- /*
- * known 3368 boards
- */
-@@ -695,52 +683,6 @@ static const struct board_info __initcon
- };
-
- /*
-- * Register a sane SPROMv2 to make the on-board
-- * bcm4318 WLAN work
-- */
--#ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-- .revision = 0x02,
-- .board_rev = 0x17,
-- .country_code = 0x0,
-- .ant_available_bg = 0x3,
-- .pa0b0 = 0x15ae,
-- .pa0b1 = 0xfa85,
-- .pa0b2 = 0xfe8d,
-- .pa1b0 = 0xffff,
-- .pa1b1 = 0xffff,
-- .pa1b2 = 0xffff,
-- .gpio0 = 0xff,
-- .gpio1 = 0xff,
-- .gpio2 = 0xff,
-- .gpio3 = 0xff,
-- .maxpwr_bg = 0x004c,
-- .itssi_bg = 0x00,
-- .boardflags_lo = 0x2848,
-- .boardflags_hi = 0x0000,
--};
--
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--{
-- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-- return 0;
-- } else {
-- pr_err("unable to fill SPROM for given bustype\n");
-- return -EINVAL;
-- }
--}
--#endif
--
--/*
-- * return board name for /proc/cpuinfo
-- */
--const char *board_get_name(void)
--{
-- return board.name;
--}
--
--/*
- * early init callback, read nvram data from flash and checksum it
- */
- void __init board_prom_init(void)
-@@ -785,137 +727,15 @@ void __init board_prom_init(void)
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- continue;
- /* copy, board desc array is marked initdata */
-- memcpy(&board, bcm963xx_boards[i], sizeof(board));
-+ board_early_setup(bcm963xx_boards[i]);
- break;
- }
-
-- /* bail out if board is not found, will complain later */
-- if (!board.name[0]) {
-+ /* warn if board is not found, will complain later */
-+ if (i == ARRAY_SIZE(bcm963xx_boards)) {
- char name[17];
- memcpy(name, board_name, 16);
- name[16] = 0;
- pr_err("unknown bcm963xx board: %s\n", name);
-- return;
-- }
--
-- /* setup pin multiplexing depending on board enabled device,
-- * this has to be done this early since PCI init is done
-- * inside arch_initcall */
-- val = 0;
--
--#ifdef CONFIG_PCI
-- if (board.has_pci) {
-- bcm63xx_pci_enabled = 1;
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G2_PCI;
- }
--#endif
--
-- if (board.has_pccard) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G1_MII_PCCARD;
-- }
--
-- if (board.has_enet0 && !board.enet0.use_internal_phy) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G3_EXT_MII |
-- GPIO_MODE_6348_G0_EXT_MII;
-- }
--
-- if (board.has_enet1 && !board.enet1.use_internal_phy) {
-- if (BCMCPU_IS_6348())
-- val |= GPIO_MODE_6348_G3_EXT_MII |
-- GPIO_MODE_6348_G0_EXT_MII;
-- }
--
-- bcm_gpio_writel(val, GPIO_MODE_REG);
--}
--
--/*
-- * second stage init callback, good time to panic if we couldn't
-- * identify on which board we're running since early printk is working
-- */
--void __init board_setup(void)
--{
-- if (!board.name[0])
-- panic("unable to detect bcm963xx board");
-- pr_info("board name: %s\n", board.name);
--
-- /* make sure we're running on expected cpu */
-- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-- panic("unexpected CPU for bcm963xx board");
--}
--
--static struct gpio_led_platform_data bcm63xx_led_data;
--
--static struct platform_device bcm63xx_gpio_leds = {
-- .name = "leds-gpio",
-- .id = 0,
-- .dev.platform_data = &bcm63xx_led_data,
--};
--
--/*
-- * third stage init callback, register all board devices.
-- */
--int __init board_register_devices(void)
--{
-- if (board.has_uart0)
-- bcm63xx_uart_register(0);
--
-- if (board.has_uart1)
-- bcm63xx_uart_register(1);
--
-- if (board.has_pccard)
-- bcm63xx_pcmcia_register();
--
-- if (board.has_enet0 &&
-- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-- bcm63xx_enet_register(0, &board.enet0);
--
-- if (board.has_enet1 &&
-- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-- bcm63xx_enet_register(1, &board.enet1);
--
-- if (board.has_enetsw &&
-- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-- bcm63xx_enetsw_register(&board.enetsw);
--
-- if (board.has_usbd)
-- bcm63xx_usbd_register(&board.usbd);
--
-- if (board.has_ehci0)
-- bcm63xx_ehci_register();
--
-- if (board.has_ohci0)
-- bcm63xx_ohci_register();
--
-- /* Generate MAC address for WLAN and register our SPROM,
-- * do this after registering enet devices
-- */
--#ifdef CONFIG_SSB_PCIHOST
-- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- if (ssb_arch_register_fallback_sprom(
-- &bcm63xx_get_fallback_sprom) < 0)
-- pr_err("failed to register fallback SPROM\n");
-- }
--#endif
--
-- bcm63xx_spi_register();
--
-- bcm63xx_hsspi_register();
--
-- bcm63xx_flash_register();
--
-- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
-- bcm63xx_led_data.leds = board.leds;
--
-- platform_device_register(&bcm63xx_gpio_leds);
--
-- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-- gpio_request_one(board.ephy_reset_gpio,
-- board.ephy_reset_gpio_flags, "ephy-reset");
--
-- return 0;
- }
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -0,0 +1,214 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/ssb/ssb.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_dev_uart.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_nvram.h>
-+#include <bcm63xx_gpio.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_enet.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <bcm63xx_dev_hsspi.h>
-+#include <bcm63xx_dev_pcmcia.h>
-+#include <bcm63xx_dev_spi.h>
-+#include <bcm63xx_dev_usb_ehci.h>
-+#include <bcm63xx_dev_usb_ohci.h>
-+#include <bcm63xx_dev_usb_usbd.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX "board: "
-+
-+static struct board_info board;
-+
-+/*
-+ * Register a sane SPROMv2 to make the on-board
-+ * bcm4318 WLAN work
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+static struct ssb_sprom bcm63xx_sprom = {
-+ .revision = 0x02,
-+ .board_rev = 0x17,
-+ .country_code = 0x0,
-+ .ant_available_bg = 0x3,
-+ .pa0b0 = 0x15ae,
-+ .pa0b1 = 0xfa85,
-+ .pa0b2 = 0xfe8d,
-+ .pa1b0 = 0xffff,
-+ .pa1b1 = 0xffff,
-+ .pa1b2 = 0xffff,
-+ .gpio0 = 0xff,
-+ .gpio1 = 0xff,
-+ .gpio2 = 0xff,
-+ .gpio3 = 0xff,
-+ .maxpwr_bg = 0x004c,
-+ .itssi_bg = 0x00,
-+ .boardflags_lo = 0x2848,
-+ .boardflags_hi = 0x0000,
-+};
-+
-+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->bustype == SSB_BUSTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-+
-+/*
-+ * return board name for /proc/cpuinfo
-+ */
-+const char *board_get_name(void)
-+{
-+ return board.name;
-+}
-+
-+/*
-+ * setup board for device registration
-+ */
-+void __init board_early_setup(const struct board_info *target)
-+{
-+ u32 val;
-+
-+ memcpy(&board, target, sizeof(board));
-+
-+ /* setup pin multiplexing depending on board enabled device,
-+ * this has to be done this early since PCI init is done
-+ * inside arch_initcall */
-+ val = 0;
-+
-+#ifdef CONFIG_PCI
-+ if (board.has_pci) {
-+ bcm63xx_pci_enabled = 1;
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G2_PCI;
-+ }
-+#endif
-+
-+ if (board.has_pccard) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+ }
-+
-+ if (board.has_enet0 && !board.enet0.use_internal_phy) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G3_EXT_MII |
-+ GPIO_MODE_6348_G0_EXT_MII;
-+ }
-+
-+ if (board.has_enet1 && !board.enet1.use_internal_phy) {
-+ if (BCMCPU_IS_6348())
-+ val |= GPIO_MODE_6348_G3_EXT_MII |
-+ GPIO_MODE_6348_G0_EXT_MII;
-+ }
-+
-+ bcm_gpio_writel(val, GPIO_MODE_REG);
-+}
-+
-+
-+/*
-+ * second stage init callback, good time to panic if we couldn't
-+ * identify on which board we're running since early printk is working
-+ */
-+void __init board_setup(void)
-+{
-+ if (!board.name[0])
-+ panic("unable to detect bcm963xx board");
-+ printk(KERN_INFO PFX "board name: %s\n", board.name);
-+
-+ /* make sure we're running on expected cpu */
-+ if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
-+ panic("unexpected CPU for bcm963xx board");
-+}
-+
-+static struct gpio_led_platform_data bcm63xx_led_data;
-+
-+static struct platform_device bcm63xx_gpio_leds = {
-+ .name = "leds-gpio",
-+ .id = 0,
-+ .dev.platform_data = &bcm63xx_led_data,
-+};
-+
-+/*
-+ * third stage init callback, register all board devices.
-+ */
-+int __init board_register_devices(void)
-+{
-+ if (board.has_uart0)
-+ bcm63xx_uart_register(0);
-+
-+ if (board.has_uart1)
-+ bcm63xx_uart_register(1);
-+
-+ if (board.has_pccard)
-+ bcm63xx_pcmcia_register();
-+
-+ if (board.has_enet0 &&
-+ !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+ bcm63xx_enet_register(0, &board.enet0);
-+
-+ if (board.has_enet1 &&
-+ !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+ bcm63xx_enet_register(1, &board.enet1);
-+
-+ if (board.has_enetsw &&
-+ !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+ bcm63xx_enetsw_register(&board.enetsw);
-+
-+ if (board.has_usbd)
-+ bcm63xx_usbd_register(&board.usbd);
-+
-+ if (board.has_ehci0)
-+ bcm63xx_ehci_register();
-+
-+ if (board.has_ohci0)
-+ bcm63xx_ohci_register();
-+
-+ /* Generate MAC address for WLAN and register our SPROM,
-+ * do this after registering enet devices
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+ if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+ memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-+ if (ssb_arch_register_fallback_sprom(
-+ &bcm63xx_get_fallback_sprom) < 0)
-+ pr_err(PFX "failed to register fallback SPROM\n");
-+ }
-+#endif
-+
-+ bcm63xx_spi_register();
-+
-+ bcm63xx_hsspi_register();
-+
-+ bcm63xx_flash_register();
-+
-+ bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
-+ bcm63xx_led_data.leds = board.leds;
-+
-+ platform_device_register(&bcm63xx_gpio_leds);
-+
-+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-+ gpio_request_one(board.ephy_reset_gpio,
-+ board.ephy_reset_gpio_flags, "ephy-reset");
-+
-+ return 0;
-+}
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -0,0 +1,8 @@
-+#ifndef __BOARD_COMMON_H
-+#define __BOARD_COMMON_H
-+
-+#include <board_bcm963xx.h>
-+
-+void board_early_setup(const struct board_info *board);
-+
-+#endif /* __BOARD_COMMON_H */
+++ /dev/null
-From 4e9c34a37bd3442b286ba55441bfe22c1ac5b65f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:08:06 +0100
-Subject: [PATCH 41/44] MIPS: BCM63XX: pass a mac addresss allocator to board
- setup
-
-Pass a mac address allocator to board setup code to allow board
-implementations to work with third party bootloaders not using nvram
-for configuration storage.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ++-
- arch/mips/bcm63xx/boards/board_common.c | 16 ++++++++++------
- arch/mips/bcm63xx/boards/board_common.h | 3 ++-
- 3 files changed, 14 insertions(+), 8 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -727,7 +727,8 @@ void __init board_prom_init(void)
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
- continue;
- /* copy, board desc array is marked initdata */
-- board_early_setup(bcm963xx_boards[i]);
-+ board_early_setup(bcm963xx_boards[i],
-+ bcm63xx_nvram_get_mac_address);
- break;
- }
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -18,7 +18,6 @@
- #include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
--#include <bcm63xx_nvram.h>
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_dev_pci.h>
- #include <bcm63xx_dev_enet.h>
-@@ -81,15 +80,20 @@ const char *board_get_name(void)
- return board.name;
- }
-
-+static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
-+
- /*
- * setup board for device registration
- */
--void __init board_early_setup(const struct board_info *target)
-+void __init board_early_setup(const struct board_info *target,
-+ int (*get_mac_address)(u8 mac[ETH_ALEN]))
- {
- u32 val;
-
- memcpy(&board, target, sizeof(board));
-
-+ board_get_mac_address = get_mac_address;
-+
- /* setup pin multiplexing depending on board enabled device,
- * this has to be done this early since PCI init is done
- * inside arch_initcall */
-@@ -162,15 +166,15 @@ int __init board_register_devices(void)
- bcm63xx_pcmcia_register();
-
- if (board.has_enet0 &&
-- !bcm63xx_nvram_get_mac_address(board.enet0.mac_addr))
-+ !board_get_mac_address(board.enet0.mac_addr))
- bcm63xx_enet_register(0, &board.enet0);
-
- if (board.has_enet1 &&
-- !bcm63xx_nvram_get_mac_address(board.enet1.mac_addr))
-+ !board_get_mac_address(board.enet1.mac_addr))
- bcm63xx_enet_register(1, &board.enet1);
-
- if (board.has_enetsw &&
-- !bcm63xx_nvram_get_mac_address(board.enetsw.mac_addr))
-+ !board_get_mac_address(board.enetsw.mac_addr))
- bcm63xx_enetsw_register(&board.enetsw);
-
- if (board.has_usbd)
-@@ -186,7 +190,7 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
- #ifdef CONFIG_SSB_PCIHOST
-- if (!bcm63xx_nvram_get_mac_address(bcm63xx_sprom.il0mac)) {
-+ if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
- if (ssb_arch_register_fallback_sprom(
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -3,6 +3,7 @@
-
- #include <board_bcm963xx.h>
-
--void board_early_setup(const struct board_info *board);
-+void board_early_setup(const struct board_info *board,
-+ int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -707,10 +707,20 @@ void __init board_prom_init(void)
-
- /* dump cfe version */
- cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
-- if (!memcmp(cfe, "cfe-v", 5))
-- snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-- cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-- else
-+ if (strstarts(cfe, "cfe-")) {
-+ if(cfe[4] == 'v') {
-+ if(cfe[5] == 'd')
-+ snprintf(cfe_version, 11, "%s", (char *) &cfe[5]);
-+ else if (cfe[10] > 0)
-+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u-%u",
-+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9], cfe[10]);
-+ else
-+ snprintf(cfe_version, sizeof(cfe_version), "%u.%u.%u-%u.%u",
-+ cfe[5], cfe[6], cfe[7], cfe[8], cfe[9]);
-+ } else {
-+ snprintf(cfe_version, 12, "%s", (char *) &cfe[4]);
-+ }
-+ } else
- strcpy(cfe_version, "unknown");
- pr_info("CFE version: %s\n", cfe_version);
-
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_board.h
-@@ -2,6 +2,8 @@
- #ifndef BCM63XX_BOARD_H_
- #define BCM63XX_BOARD_H_
-
-+#include <asm/bootinfo.h>
-+
- const char *board_get_name(void);
-
- void board_prom_init(void);
-@@ -10,4 +12,8 @@ void board_setup(void);
-
- int board_register_devices(void);
-
-+static inline bool bcm63xx_is_cfe_present(void) {
-+ return fw_arg3 == 0x43464531;
-+}
-+
- #endif /* ! BCM63XX_BOARD_H_ */
+++ /dev/null
---- a/drivers/mtd/bcm63xxpart.c
-+++ b/drivers/mtd/bcm63xxpart.c
-@@ -35,6 +35,8 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/of.h>
-+
-+#include <asm/mach-bcm63xx/bcm63xx_board.h>
-
- #define BCM963XX_CFE_BLOCK_SIZE SZ_64K /* always at least 64KiB */
-
-@@ -46,30 +48,6 @@
- #define STR_NULL_TERMINATE(x) \
- do { char *_str = (x); _str[sizeof(x) - 1] = 0; } while (0)
-
--static int bcm63xx_detect_cfe(struct mtd_info *master)
--{
-- char buf[9];
-- int ret;
-- size_t retlen;
--
-- ret = mtd_read(master, BCM963XX_CFE_VERSION_OFFSET, 5, &retlen,
-- (void *)buf);
-- buf[retlen] = 0;
--
-- if (ret)
-- return ret;
--
-- if (strncmp("cfe-v", buf, 5) == 0)
-- return 0;
--
-- /* very old CFE's do not have the cfe-v string, so check for magic */
-- ret = mtd_read(master, BCM963XX_CFE_MAGIC_OFFSET, 8, &retlen,
-- (void *)buf);
-- buf[retlen] = 0;
--
-- return strncmp("CFE1CFE1", buf, 8);
--}
--
- static int bcm63xx_read_nvram(struct mtd_info *master,
- struct bcm963xx_nvram *nvram)
- {
-@@ -152,7 +130,7 @@ static int bcm63xx_parse_cfe_partitions(
- struct bcm963xx_nvram *nvram = NULL;
- int ret;
-
-- if (bcm63xx_detect_cfe(master))
-+ if (!bcm63xx_is_cfe_present())
- return -EINVAL;
-
- nvram = vzalloc(sizeof(*nvram));
+++ /dev/null
-From 301744ecbeece89ab3a9d6beef7802fa22598f00 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:53:12 +0100
-Subject: [PATCH 1/5] irqchip: add support for bcm6345-style periphery irq
- controller
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- .../brcm,bcm6345-periph-intc.txt | 50 +++
- drivers/irqchip/Kconfig | 4 +
- drivers/irqchip/Makefile | 1 +
- drivers/irqchip/irq-bcm6345-periph.c | 339 ++++++++++++++++++++
- include/linux/irqchip/irq-bcm6345-periph.h | 16 +
- 5 files changed, 410 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
- create mode 100644 drivers/irqchip/irq-bcm6345-periph.c
- create mode 100644 include/linux/irqchip/irq-bcm6345-periph.h
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-periph-intc.txt
-@@ -0,0 +1,50 @@
-+Broadcom BCM6345 Level 1 periphery interrupt controller
-+
-+This block is a interrupt controller that is typically connected directly
-+to one of the HW INT lines on each CPU. Every BCM63XX xDSL chip since
-+BCM6345 has contained this hardware.
-+
-+Key elements of the hardware design include:
-+
-+- 32, 64, or 128 incoming level IRQ lines
-+
-+- All onchip peripherals are wired directly to an L2 input
-+
-+- A separate instance of the register set for each CPU, allowing individual
-+ peripheral IRQs to be routed to any CPU
-+
-+- No atomic mask/unmask operations
-+
-+- No polarity/level/edge settings
-+
-+- No FIFO or priority encoder logic; software is expected to read all
-+ 1-4 status words to determine which IRQs are pending
-+
-+Required properties:
-+
-+- compatible: Should be "brcm,bcm6345-periph-intc".
-+- reg: Specifies the base physical address and size of the registers.
-+ Multiple register addresses may be specified, and must match the amount of
-+ parent interrupts.
-+- interrupt-controller: Identifies the node as an interrupt controller.
-+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
-+ source, should be 1.
-+- interrupt-parent: Specifies the phandle to the parent interrupt controller
-+ this one is cascaded from.
-+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
-+ node, valid values depend on the type of parent interrupt controller.
-+ Multiple lines are used to route interrupts to different cpus, with the first
-+ assumed to be for the boot CPU.
-+
-+Example:
-+
-+periph_intc: interrupt-controller@f0406800 {
-+ compatible = "brcm,bcm6345-periph-intc";
-+ reg = <0x10000020 0x10>, <0x10000030 0x10>;
-+
-+ interrupt-controller;
-+ #interrupt-cells = <1>;
-+
-+ interrupt-parent = <&cpu_intc>;
-+ interrupts = <2>, <3>;
-+};
---- a/drivers/irqchip/Kconfig
-+++ b/drivers/irqchip/Kconfig
-@@ -129,6 +129,10 @@ config BRCMSTB_L2_IRQ
- select GENERIC_IRQ_CHIP
- select IRQ_DOMAIN
-
-+config BCM6345_PERIPH_IRQ
-+ bool
-+ select IRQ_DOMAIN
-+
- config DW_APB_ICTL
- bool
- select GENERIC_IRQ_CHIP
---- a/drivers/irqchip/Makefile
-+++ b/drivers/irqchip/Makefile
-@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
- obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
- obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
- obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
-+obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
- obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
- obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
- obj-$(CONFIG_OMPIC) += irq-ompic.o
---- /dev/null
-+++ b/drivers/irqchip/irq-bcm6345-periph.c
-@@ -0,0 +1,339 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#include <linux/ioport.h>
-+#include <linux/irq.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqchip/irq-bcm6345-periph.h>
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#ifdef CONFIG_BCM63XX
-+#include <asm/mach-bcm63xx/bcm63xx_irq.h>
-+
-+#define VIRQ_BASE IRQ_INTERNAL_BASE
-+#else
-+#define VIRQ_BASE 0
-+#endif
-+
-+#define MAX_WORDS 4
-+#define MAX_PARENT_IRQS 2
-+#define IRQS_PER_WORD 32
-+
-+struct intc_block {
-+ int parent_irq;
-+ void __iomem *base;
-+ void __iomem *en_reg[MAX_WORDS];
-+ void __iomem *status_reg[MAX_WORDS];
-+ u32 mask_cache[MAX_WORDS];
-+};
-+
-+struct intc_data {
-+ struct irq_chip chip;
-+ struct intc_block block[MAX_PARENT_IRQS];
-+
-+ int num_words;
-+
-+ struct irq_domain *domain;
-+ raw_spinlock_t lock;
-+};
-+
-+static void bcm6345_periph_irq_handle(struct irq_desc *desc)
-+{
-+ struct intc_data *data = irq_desc_get_handler_data(desc);
-+ struct irq_chip *chip = irq_desc_get_chip(desc);
-+ struct intc_block *block;
-+ unsigned int irq = irq_desc_get_irq(desc);
-+ unsigned int idx;
-+
-+ chained_irq_enter(chip, desc);
-+
-+ for (idx = 0; idx < MAX_PARENT_IRQS; idx++)
-+ if (irq == data->block[idx].parent_irq)
-+ block = &data->block[idx];
-+
-+ for (idx = 0; idx < data->num_words; idx++) {
-+ int base = idx * IRQS_PER_WORD;
-+ unsigned long pending;
-+ int hw_irq;
-+
-+ raw_spin_lock(&data->lock);
-+ pending = __raw_readl(block->en_reg[idx]) &
-+ __raw_readl(block->status_reg[idx]);
-+ raw_spin_unlock(&data->lock);
-+
-+ for_each_set_bit(hw_irq, &pending, IRQS_PER_WORD) {
-+ int virq;
-+
-+ virq = irq_find_mapping(data->domain, base + hw_irq);
-+ generic_handle_irq(virq);
-+ }
-+ }
-+
-+ chained_irq_exit(chip, desc);
-+}
-+
-+static void __bcm6345_periph_enable(struct intc_block *block, int reg, int bit,
-+ bool enable)
-+{
-+ u32 val;
-+
-+ val = __raw_readl(block->en_reg[reg]);
-+ if (enable)
-+ val |= BIT(bit);
-+ else
-+ val &= ~BIT(bit);
-+ __raw_writel(val, block->en_reg[reg]);
-+}
-+
-+static void bcm6345_periph_irq_mask(struct irq_data *data)
-+{
-+ unsigned int i, reg, bit;
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ raw_spin_lock(&priv->lock);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_periph_irq_unmask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ unsigned int i, reg, bit;
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ raw_spin_lock(&priv->lock);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ if (block->mask_cache[reg] & BIT(bit))
-+ __bcm6345_periph_enable(block, reg, bit, true);
-+ else
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+#ifdef CONFIG_SMP
-+static int bcm6345_periph_set_affinity(struct irq_data *data,
-+ const struct cpumask *mask, bool force)
-+{
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ struct intc_data *priv = data->domain->host_data;
-+ unsigned int i, reg, bit;
-+ unsigned long flags;
-+ bool enabled;
-+ int cpu;
-+
-+ reg = hwirq / IRQS_PER_WORD;
-+ bit = hwirq % IRQS_PER_WORD;
-+
-+ /* we could route to more than one cpu, but performance
-+ suffers, so fix it to one.
-+ */
-+ cpu = cpumask_any_and(mask, cpu_online_mask);
-+ if (cpu >= nr_cpu_ids)
-+ return -EINVAL;
-+
-+ if (cpu >= MAX_PARENT_IRQS)
-+ return -EINVAL;
-+
-+ if (!priv->block[cpu].parent_irq)
-+ return -EINVAL;
-+
-+ raw_spin_lock_irqsave(&priv->lock, flags);
-+ enabled = !irqd_irq_masked(data);
-+ for (i = 0; i < MAX_PARENT_IRQS; i++) {
-+ struct intc_block *block = &priv->block[i];
-+
-+ if (!block->parent_irq)
-+ break;
-+
-+ if (i == cpu) {
-+ block->mask_cache[reg] |= BIT(bit);
-+ __bcm6345_periph_enable(block, reg, bit, enabled);
-+ } else {
-+ block->mask_cache[reg] &= ~BIT(bit);
-+ __bcm6345_periph_enable(block, reg, bit, false);
-+ }
-+ }
-+ raw_spin_unlock_irqrestore(&priv->lock, flags);
-+
-+ return 0;
-+}
-+#endif
-+
-+static int bcm6345_periph_map(struct irq_domain *d, unsigned int irq,
-+ irq_hw_number_t hw)
-+{
-+ struct intc_data *priv = d->host_data;
-+
-+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
-+
-+ return 0;
-+}
-+
-+static const struct irq_domain_ops bcm6345_periph_domain_ops = {
-+ .xlate = irq_domain_xlate_onecell,
-+ .map = bcm6345_periph_map,
-+};
-+
-+static int __init __bcm6345_periph_intc_init(struct device_node *node,
-+ int num_blocks, int *irq,
-+ void __iomem **base, int num_words)
-+{
-+ struct intc_data *data;
-+ unsigned int i, w, status_offset;
-+
-+ data = kzalloc(sizeof(*data), GFP_KERNEL);
-+ if (!data)
-+ return -ENOMEM;
-+
-+ raw_spin_lock_init(&data->lock);
-+
-+ status_offset = num_words * sizeof(u32);
-+
-+ for (i = 0; i < num_blocks; i++) {
-+ struct intc_block *block = &data->block[i];
-+
-+ block->parent_irq = irq[i];
-+ block->base = base[i];
-+
-+ for (w = 0; w < num_words; w++) {
-+ int word_offset = sizeof(u32) * ((num_words - w) - 1);
-+
-+ block->en_reg[w] = base[i] + word_offset;
-+ block->status_reg[w] = base[i] + status_offset;
-+ block->status_reg[w] += word_offset;
-+
-+ /* route all interrupts to line 0 by default */
-+ if (i == 0)
-+ block->mask_cache[w] = 0xffffffff;
-+ }
-+
-+ irq_set_handler_data(block->parent_irq, data);
-+ irq_set_chained_handler(block->parent_irq,
-+ bcm6345_periph_irq_handle);
-+ }
-+
-+ data->num_words = num_words;
-+
-+ data->chip.name = "bcm6345-periph-intc";
-+ data->chip.irq_mask = bcm6345_periph_irq_mask;
-+ data->chip.irq_unmask = bcm6345_periph_irq_unmask;
-+
-+#ifdef CONFIG_SMP
-+ if (num_blocks > 1)
-+ data->chip.irq_set_affinity = bcm6345_periph_set_affinity;
-+#endif
-+
-+ data->domain = irq_domain_add_simple(node, IRQS_PER_WORD * num_words,
-+ VIRQ_BASE,
-+ &bcm6345_periph_domain_ops, data);
-+ if (!data->domain) {
-+ kfree(data);
-+ return -EINVAL;
-+ }
-+
-+ return 0;
-+}
-+
-+void __init bcm6345_periph_intc_init(int num_blocks, int *irq,
-+ void __iomem **base, int num_words)
-+{
-+ __bcm6345_periph_intc_init(NULL, num_blocks, irq, base, num_words);
-+}
-+
-+#ifdef CONFIG_OF
-+static int __init bcm6345_periph_of_init(struct device_node *node,
-+ struct device_node *parent)
-+{
-+ struct resource res;
-+ int num_irqs, ret = -EINVAL;
-+ int irqs[MAX_PARENT_IRQS] = { 0 };
-+ void __iomem *bases[MAX_PARENT_IRQS] = { NULL };
-+ int words = 0;
-+ int i;
-+
-+ num_irqs = of_irq_count(node);
-+
-+ if (num_irqs < 1 || num_irqs > MAX_PARENT_IRQS)
-+ return -EINVAL;
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ resource_size_t size;
-+
-+ irqs[i] = irq_of_parse_and_map(node, i);
-+ if (!irqs[i])
-+ goto out_unmap;
-+
-+ if (of_address_to_resource(node, i, &res))
-+ goto out_unmap;
-+
-+ size = resource_size(&res);
-+ switch (size) {
-+ case 8:
-+ case 16:
-+ case 32:
-+ size = size / 8;
-+ break;
-+ default:
-+ goto out_unmap;
-+ }
-+
-+ if (words && words != size) {
-+ ret = -EINVAL;
-+ goto out_unmap;
-+ }
-+ words = size;
-+
-+ bases[i] = of_iomap(node, i);
-+ if (!bases[i]) {
-+ ret = -ENOMEM;
-+ goto out_unmap;
-+ }
-+ }
-+
-+ ret = __bcm6345_periph_intc_init(node, num_irqs, irqs, bases, words);
-+ if (!ret)
-+ return 0;
-+
-+out_unmap:
-+ for (i = 0; i < num_irqs; i++) {
-+ iounmap(bases[i]);
-+ irq_dispose_mapping(irqs[i]);
-+ }
-+
-+ return ret;
-+}
-+
-+IRQCHIP_DECLARE(bcm6345_periph_intc, "brcm,bcm6345-l1-intc",
-+ bcm6345_periph_of_init);
-+#endif
---- /dev/null
-+++ b/include/linux/irqchip/irq-bcm6345-periph.h
-@@ -0,0 +1,16 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Nicolas Schichan <nschichan@freebox.fr>
-+ */
-+
-+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
-+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H
-+
-+void bcm6345_periph_intc_init(int num_blocks, int *irq, void __iomem **base,
-+ int num_words);
-+
-+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_PERIPH_H */
+++ /dev/null
-From cf908990d4a8ccdb73ee4484aa8cadad379ca314 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:54:27 +0100
-Subject: [PATCH 2/5] irqchip: add support for bcm6345-style external
- interrupt controller
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- .../interrupt-controller/brcm,bcm6345-ext-intc.txt | 29 ++
- drivers/irqchip/Kconfig | 4 +
- drivers/irqchip/Makefile | 1 +
- drivers/irqchip/irq-bcm6345-ext.c | 287 ++++++++++++++++++++
- include/linux/irqchip/irq-bcm6345-ext.h | 14 +
- 5 files changed, 335 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
- create mode 100644 drivers/irqchip/irq-bcm6345-ext.c
- create mode 100644 include/linux/irqchip/irq-bcm6345-ext.h
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm6345-ext-intc.txt
-@@ -0,0 +1,29 @@
-+Broadcom BCM6345-style external interrupt controller
-+
-+Required properties:
-+
-+- compatible: Should be "brcm,bcm6345-ext-intc" or "brcm,bcm6318-ext-intc".
-+- reg: Specifies the base physical addresses and size of the registers.
-+- interrupt-controller: identifies the node as an interrupt controller.
-+- #interrupt-cells: Specifies the number of cells needed to encode an interrupt
-+ source, Should be 2.
-+- interrupt-parent: Specifies the phandle to the parent interrupt controller
-+ this one is cascaded from.
-+- interrupts: Specifies the interrupt line(s) in the interrupt-parent controller
-+ node, valid values depend on the type of parent interrupt controller.
-+
-+Optional properties:
-+
-+- brcm,field-width: Size of each field (mask, clear, sense, ...) in bits in the
-+ register. Defaults to 4.
-+
-+Example:
-+
-+ext_intc: interrupt-controller@10000018 {
-+ compatible = "brcm,bcm6345-ext-intc";
-+ interrupt-parent = <&periph_intc>;
-+ #interrupt-cells = <2>;
-+ reg = <0x10000018 0x4>;
-+ interrupt-controller;
-+ interrupts = <24>, <25>, <26>, <27>;
-+};
---- a/drivers/irqchip/Kconfig
-+++ b/drivers/irqchip/Kconfig
-@@ -129,6 +129,10 @@ config BRCMSTB_L2_IRQ
- select GENERIC_IRQ_CHIP
- select IRQ_DOMAIN
-
-+config BCM6345_EXT_IRQ
-+ bool
-+ select IRQ_DOMAIN
-+
- config BCM6345_PERIPH_IRQ
- bool
- select IRQ_DOMAIN
---- a/drivers/irqchip/Makefile
-+++ b/drivers/irqchip/Makefile
-@@ -14,6 +14,7 @@ obj-$(CONFIG_ARCH_MMP) += irq-mmp.o
- obj-$(CONFIG_IRQ_MXS) += irq-mxs.o
- obj-$(CONFIG_ARCH_TEGRA) += irq-tegra.o
- obj-$(CONFIG_ARCH_S3C24XX) += irq-s3c24xx.o
-+obj-$(CONFIG_BCM6345_EXT_IRQ) += irq-bcm6345-ext.o
- obj-$(CONFIG_BCM6345_PERIPH_IRQ) += irq-bcm6345-periph.o
- obj-$(CONFIG_DW_APB_ICTL) += irq-dw-apb-ictl.o
- obj-$(CONFIG_CLPS711X_IRQCHIP) += irq-clps711x.o
---- /dev/null
-+++ b/drivers/irqchip/irq-bcm6345-ext.c
-@@ -0,0 +1,301 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#include <linux/ioport.h>
-+#include <linux/irq.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/chained_irq.h>
-+#include <linux/irqchip/irq-bcm6345-ext.h>
-+#include <linux/kernel.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_address.h>
-+#include <linux/slab.h>
-+#include <linux/spinlock.h>
-+
-+#ifdef CONFIG_BCM63XX
-+#include <asm/mach-bcm63xx/bcm63xx_irq.h>
-+
-+#define VIRQ_BASE IRQ_EXTERNAL_BASE
-+#else
-+#define VIRQ_BASE 0
-+#endif
-+
-+#define MAX_IRQS 4
-+
-+#define EXTIRQ_CFG_SENSE 0
-+#define EXTIRQ_CFG_STAT 1
-+#define EXTIRQ_CFG_CLEAR 2
-+#define EXTIRQ_CFG_MASK 3
-+#define EXTIRQ_CFG_BOTHEDGE 4
-+#define EXTIRQ_CFG_LEVELSENSE 5
-+
-+struct intc_data {
-+ struct irq_chip chip;
-+ struct irq_domain *domain;
-+ raw_spinlock_t lock;
-+
-+ int parent_irq[MAX_IRQS];
-+ void __iomem *reg;
-+ int shift;
-+ unsigned int toggle_clear_on_ack:1;
-+};
-+
-+static void bcm6345_ext_intc_irq_handle(struct irq_desc *desc)
-+{
-+ struct intc_data *data = irq_desc_get_handler_data(desc);
-+ struct irq_chip *chip = irq_desc_get_chip(desc);
-+ unsigned int irq = irq_desc_get_irq(desc);
-+ unsigned int idx;
-+
-+ chained_irq_enter(chip, desc);
-+
-+ for (idx = 0; idx < MAX_IRQS; idx++) {
-+ if (data->parent_irq[idx] != irq)
-+ continue;
-+
-+ generic_handle_irq(irq_find_mapping(data->domain, idx));
-+ }
-+
-+ chained_irq_exit(chip, desc);
-+}
-+
-+static void bcm6345_ext_intc_irq_ack(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ __raw_writel(reg | (1 << (hwirq + EXTIRQ_CFG_CLEAR * priv->shift)),
-+ priv->reg);
-+ if (priv->toggle_clear_on_ack)
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_ext_intc_irq_mask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift));
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static void bcm6345_ext_intc_irq_unmask(struct irq_data *data)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ u32 reg;
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_MASK * priv->shift);
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+}
-+
-+static int bcm6345_ext_intc_set_type(struct irq_data *data,
-+ unsigned int flow_type)
-+{
-+ struct intc_data *priv = data->domain->host_data;
-+ irq_hw_number_t hwirq = irqd_to_hwirq(data);
-+ bool levelsense = 0, sense = 0, bothedge = 0;
-+ u32 reg;
-+
-+ flow_type &= IRQ_TYPE_SENSE_MASK;
-+
-+ if (flow_type == IRQ_TYPE_NONE)
-+ flow_type = IRQ_TYPE_LEVEL_LOW;
-+
-+ switch (flow_type) {
-+ case IRQ_TYPE_EDGE_BOTH:
-+ bothedge = 1;
-+ break;
-+
-+ case IRQ_TYPE_EDGE_RISING:
-+ sense = 1;
-+ break;
-+
-+ case IRQ_TYPE_EDGE_FALLING:
-+ break;
-+
-+ case IRQ_TYPE_LEVEL_HIGH:
-+ levelsense = 1;
-+ sense = 1;
-+ break;
-+
-+ case IRQ_TYPE_LEVEL_LOW:
-+ levelsense = 1;
-+ break;
-+
-+ default:
-+ pr_err("bogus flow type combination given!\n");
-+ return -EINVAL;
-+ }
-+
-+ raw_spin_lock(&priv->lock);
-+ reg = __raw_readl(priv->reg);
-+
-+ if (levelsense)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_LEVELSENSE * priv->shift));
-+ if (sense)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_SENSE * priv->shift));
-+ if (bothedge)
-+ reg |= 1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift);
-+ else
-+ reg &= ~(1 << (hwirq + EXTIRQ_CFG_BOTHEDGE * priv->shift));
-+
-+ __raw_writel(reg, priv->reg);
-+ raw_spin_unlock(&priv->lock);
-+
-+ irqd_set_trigger_type(data, flow_type);
-+ if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-+ irq_set_handler_locked(data, handle_level_irq);
-+ else
-+ irq_set_handler_locked(data, handle_edge_irq);
-+
-+ return 0;
-+}
-+
-+static int bcm6345_ext_intc_map(struct irq_domain *d, unsigned int irq,
-+ irq_hw_number_t hw)
-+{
-+ struct intc_data *priv = d->host_data;
-+
-+ irq_set_chip_and_handler(irq, &priv->chip, handle_level_irq);
-+
-+ return 0;
-+}
-+
-+static const struct irq_domain_ops bcm6345_ext_domain_ops = {
-+ .xlate = irq_domain_xlate_twocell,
-+ .map = bcm6345_ext_intc_map,
-+};
-+
-+static int __init __bcm6345_ext_intc_init(struct device_node *node,
-+ int num_irqs, int *irqs,
-+ void __iomem *reg, int shift,
-+ bool toggle_clear_on_ack)
-+{
-+ struct intc_data *data;
-+ unsigned int i;
-+ int start = VIRQ_BASE;
-+
-+ data = kzalloc(sizeof(*data), GFP_KERNEL);
-+ if (!data)
-+ return -ENOMEM;
-+
-+ raw_spin_lock_init(&data->lock);
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ data->parent_irq[i] = irqs[i];
-+
-+ irq_set_handler_data(irqs[i], data);
-+ irq_set_chained_handler(irqs[i], bcm6345_ext_intc_irq_handle);
-+ }
-+
-+ data->reg = reg;
-+ data->shift = shift;
-+ data->toggle_clear_on_ack = toggle_clear_on_ack;
-+
-+ data->chip.name = "bcm6345-ext-intc";
-+ data->chip.irq_ack = bcm6345_ext_intc_irq_ack;
-+ data->chip.irq_mask = bcm6345_ext_intc_irq_mask;
-+ data->chip.irq_unmask = bcm6345_ext_intc_irq_unmask;
-+ data->chip.irq_set_type = bcm6345_ext_intc_set_type;
-+
-+ /*
-+ * If we have less than 4 irqs, this is the second controller on
-+ * bcm63xx. So increase the VIRQ start to not overlap with the first
-+ * one, but only do so if we actually use a non-zero start.
-+ *
-+ * This can be removed when bcm63xx has no legacy users anymore.
-+ */
-+ if (start && num_irqs < 4)
-+ start += 4;
-+
-+ data->domain = irq_domain_add_simple(node, num_irqs, start,
-+ &bcm6345_ext_domain_ops, data);
-+ if (!data->domain) {
-+ kfree(data);
-+ return -ENOMEM;
-+ }
-+
-+ return 0;
-+}
-+
-+void __init bcm6345_ext_intc_init(int num_irqs, int *irqs, void __iomem *reg,
-+ int shift)
-+{
-+ __bcm6345_ext_intc_init(NULL, num_irqs, irqs, reg, shift, false);
-+}
-+
-+#ifdef CONFIG_OF
-+static int __init bcm6345_ext_intc_of_init(struct device_node *node,
-+ struct device_node *parent)
-+{
-+ int num_irqs, ret = -EINVAL;
-+ unsigned i;
-+ void __iomem *base;
-+ int irqs[MAX_IRQS] = { 0 };
-+ u32 shift;
-+ bool toggle_clear_on_ack = false;
-+
-+ num_irqs = of_irq_count(node);
-+
-+ if (!num_irqs || num_irqs > MAX_IRQS)
-+ return -EINVAL;
-+
-+ if (of_property_read_u32(node, "brcm,field-width", &shift))
-+ shift = 4;
-+
-+ /* on BCM6318 setting CLEAR seems to continuously mask interrupts */
-+ if (of_device_is_compatible(node, "brcm,bcm6318-ext-intc"))
-+ toggle_clear_on_ack = true;
-+
-+ for (i = 0; i < num_irqs; i++) {
-+ irqs[i] = irq_of_parse_and_map(node, i);
-+ if (!irqs[i]) {
-+ ret = -ENOMEM;
-+ goto out_unmap;
-+ }
-+ }
-+
-+ base = of_iomap(node, 0);
-+ if (!base)
-+ goto out_unmap;
-+
-+ ret = __bcm6345_ext_intc_init(node, num_irqs, irqs, base, shift,
-+ toggle_clear_on_ack);
-+ if (!ret)
-+ return 0;
-+out_unmap:
-+ iounmap(base);
-+
-+ for (i = 0; i < num_irqs; i++)
-+ irq_dispose_mapping(irqs[i]);
-+
-+ return ret;
-+}
-+
-+IRQCHIP_DECLARE(bcm6318_ext_intc, "brcm,bcm6318-ext-intc",
-+ bcm6345_ext_intc_of_init);
-+IRQCHIP_DECLARE(bcm6345_ext_intc, "brcm,bcm6345-ext-intc",
-+ bcm6345_ext_intc_of_init);
-+#endif
---- /dev/null
-+++ b/include/linux/irqchip/irq-bcm6345-ext.h
-@@ -0,0 +1,14 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2014 Jonas Gorski <jogo@openwrt.org>
-+ */
-+
-+#ifndef __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
-+#define __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H
-+
-+void bcm6345_ext_intc_init(int n_irqs, int *irqs, void __iomem *reg, int shift);
-+
-+#endif /* __INCLUDE_LINUX_IRQCHIP_IRQ_BCM6345_EXT_H */
+++ /dev/null
-From d2d2489e0a4b740abd980e9d1cad952d15bc2d9e Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 14:55:02 +0100
-Subject: [PATCH] MIPS: BCM63XX: switch to IRQ_DOMAIN
-
-Now that we have working IRQ_DOMAIN drivers for both interrupt controllers,
-switch to using them.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/Kconfig | 3 +
- arch/mips/bcm63xx/irq.c | 612 +++++++++---------------------------------------
- 2 files changed, 108 insertions(+), 507 deletions(-)
-
---- a/arch/mips/Kconfig
-+++ b/arch/mips/Kconfig
-@@ -283,6 +283,9 @@ config BCM63XX
- select SYNC_R4K
- select DMA_NONCOHERENT
- select IRQ_MIPS_CPU
-+ select BCM6345_EXT_IRQ
-+ select BCM6345_PERIPH_IRQ
-+ select IRQ_DOMAIN
- select SYS_SUPPORTS_32BIT_KERNEL
- select SYS_SUPPORTS_BIG_ENDIAN
- select SYS_HAS_EARLY_PRINTK
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -11,7 +11,9 @@
- #include <linux/init.h>
- #include <linux/interrupt.h>
- #include <linux/irq.h>
--#include <linux/spinlock.h>
-+#include <linux/irqchip.h>
-+#include <linux/irqchip/irq-bcm6345-ext.h>
-+#include <linux/irqchip/irq-bcm6345-periph.h>
- #include <asm/irq_cpu.h>
- #include <asm/mipsregs.h>
- #include <bcm63xx_cpu.h>
-@@ -19,544 +21,140 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-
--
--static DEFINE_SPINLOCK(ipic_lock);
--static DEFINE_SPINLOCK(epic_lock);
--
--static u32 irq_stat_addr[2];
--static u32 irq_mask_addr[2];
--static void (*dispatch_internal)(int cpu);
--static int is_ext_irq_cascaded;
--static unsigned int ext_irq_count;
--static unsigned int ext_irq_start, ext_irq_end;
--static unsigned int ext_irq_cfg_reg1, ext_irq_cfg_reg2;
--static void (*internal_irq_mask)(struct irq_data *d);
--static void (*internal_irq_unmask)(struct irq_data *d, const struct cpumask *m);
--
--
--static inline u32 get_ext_irq_perf_reg(int irq)
--{
-- if (irq < 4)
-- return ext_irq_cfg_reg1;
-- return ext_irq_cfg_reg2;
--}
--
--static inline void handle_internal(int intbit)
--{
-- if (is_ext_irq_cascaded &&
-- intbit >= ext_irq_start && intbit <= ext_irq_end)
-- do_IRQ(intbit - ext_irq_start + IRQ_EXTERNAL_BASE);
-- else
-- do_IRQ(intbit + IRQ_INTERNAL_BASE);
--}
--
--static inline int enable_irq_for_cpu(int cpu, struct irq_data *d,
-- const struct cpumask *m)
--{
-- bool enable = cpu_online(cpu);
--
--#ifdef CONFIG_SMP
-- if (m)
-- enable &= cpumask_test_cpu(cpu, m);
-- else if (irqd_affinity_was_set(d))
-- enable &= cpumask_test_cpu(cpu, irq_data_get_affinity_mask(d));
--#endif
-- return enable;
--}
--
--/*
-- * dispatch internal devices IRQ (uart, enet, watchdog, ...). do not
-- * prioritize any interrupt relatively to another. the static counter
-- * will resume the loop where it ended the last time we left this
-- * function.
-- */
--
--#define BUILD_IPIC_INTERNAL(width) \
--void __dispatch_internal_##width(int cpu) \
--{ \
-- u32 pending[width / 32]; \
-- unsigned int src, tgt; \
-- bool irqs_pending = false; \
-- static unsigned int i[2]; \
-- unsigned int *next = &i[cpu]; \
-- unsigned long flags; \
-- \
-- /* read registers in reverse order */ \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for (src = 0, tgt = (width / 32); src < (width / 32); src++) { \
-- u32 val; \
-- \
-- val = bcm_readl(irq_stat_addr[cpu] + src * sizeof(u32)); \
-- val &= bcm_readl(irq_mask_addr[cpu] + src * sizeof(u32)); \
-- pending[--tgt] = val; \
-- \
-- if (val) \
-- irqs_pending = true; \
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
-- \
-- if (!irqs_pending) \
-- return; \
-- \
-- while (1) { \
-- unsigned int to_call = *next; \
-- \
-- *next = (*next + 1) & (width - 1); \
-- if (pending[to_call / 32] & (1 << (to_call & 0x1f))) { \
-- handle_internal(to_call); \
-- break; \
-- } \
-- } \
--} \
-- \
--static void __internal_irq_mask_##width(struct irq_data *d) \
--{ \
-- u32 val; \
-- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
-- unsigned reg = (irq / 32) ^ (width/32 - 1); \
-- unsigned bit = irq & 0x1f; \
-- unsigned long flags; \
-- int cpu; \
-- \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for_each_present_cpu(cpu) { \
-- if (!irq_mask_addr[cpu]) \
-- break; \
-- \
-- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-- val &= ~(1 << bit); \
-- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
--} \
-- \
--static void __internal_irq_unmask_##width(struct irq_data *d, \
-- const struct cpumask *m) \
--{ \
-- u32 val; \
-- unsigned irq = d->irq - IRQ_INTERNAL_BASE; \
-- unsigned reg = (irq / 32) ^ (width/32 - 1); \
-- unsigned bit = irq & 0x1f; \
-- unsigned long flags; \
-- int cpu; \
-- \
-- spin_lock_irqsave(&ipic_lock, flags); \
-- for_each_present_cpu(cpu) { \
-- if (!irq_mask_addr[cpu]) \
-- break; \
-- \
-- val = bcm_readl(irq_mask_addr[cpu] + reg * sizeof(u32));\
-- if (enable_irq_for_cpu(cpu, d, m)) \
-- val |= (1 << bit); \
-- else \
-- val &= ~(1 << bit); \
-- bcm_writel(val, irq_mask_addr[cpu] + reg * sizeof(u32));\
-- } \
-- spin_unlock_irqrestore(&ipic_lock, flags); \
--}
--
--BUILD_IPIC_INTERNAL(32);
--BUILD_IPIC_INTERNAL(64);
--
--asmlinkage void plat_irq_dispatch(void)
--{
-- u32 cause;
--
-- do {
-- cause = read_c0_cause() & read_c0_status() & ST0_IM;
--
-- if (!cause)
-- break;
--
-- if (cause & CAUSEF_IP7)
-- do_IRQ(7);
-- if (cause & CAUSEF_IP0)
-- do_IRQ(0);
-- if (cause & CAUSEF_IP1)
-- do_IRQ(1);
-- if (cause & CAUSEF_IP2)
-- dispatch_internal(0);
-- if (is_ext_irq_cascaded) {
-- if (cause & CAUSEF_IP3)
-- dispatch_internal(1);
-- } else {
-- if (cause & CAUSEF_IP3)
-- do_IRQ(IRQ_EXT_0);
-- if (cause & CAUSEF_IP4)
-- do_IRQ(IRQ_EXT_1);
-- if (cause & CAUSEF_IP5)
-- do_IRQ(IRQ_EXT_2);
-- if (cause & CAUSEF_IP6)
-- do_IRQ(IRQ_EXT_3);
-- }
-- } while (1);
--}
--
--/*
-- * internal IRQs operations: only mask/unmask on PERF irq mask
-- * register.
-- */
--static void bcm63xx_internal_irq_mask(struct irq_data *d)
--{
-- internal_irq_mask(d);
--}
--
--static void bcm63xx_internal_irq_unmask(struct irq_data *d)
--{
-- internal_irq_unmask(d, NULL);
--}
--
--/*
-- * external IRQs operations: mask/unmask and clear on PERF external
-- * irq control register.
-- */
--static void bcm63xx_external_irq_mask(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg &= ~EXTIRQ_CFG_MASK_6348(irq % 4);
-- else
-- reg &= ~EXTIRQ_CFG_MASK(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- if (is_ext_irq_cascaded)
-- internal_irq_mask(irq_get_irq_data(irq + ext_irq_start));
--}
--
--static void bcm63xx_external_irq_unmask(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg |= EXTIRQ_CFG_MASK_6348(irq % 4);
-- else
-- reg |= EXTIRQ_CFG_MASK(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- if (is_ext_irq_cascaded)
-- internal_irq_unmask(irq_get_irq_data(irq + ext_irq_start),
-- NULL);
--}
--
--static void bcm63xx_external_irq_clear(struct irq_data *d)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- unsigned long flags;
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
--
-- if (BCMCPU_IS_6348())
-- reg |= EXTIRQ_CFG_CLEAR_6348(irq % 4);
-- else
-- reg |= EXTIRQ_CFG_CLEAR(irq % 4);
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--}
--
--static int bcm63xx_external_irq_set_type(struct irq_data *d,
-- unsigned int flow_type)
--{
-- unsigned int irq = d->irq - IRQ_EXTERNAL_BASE;
-- u32 reg, regaddr;
-- int levelsense, sense, bothedge;
-- unsigned long flags;
--
-- flow_type &= IRQ_TYPE_SENSE_MASK;
--
-- if (flow_type == IRQ_TYPE_NONE)
-- flow_type = IRQ_TYPE_LEVEL_LOW;
--
-- levelsense = sense = bothedge = 0;
-- switch (flow_type) {
-- case IRQ_TYPE_EDGE_BOTH:
-- bothedge = 1;
-- break;
--
-- case IRQ_TYPE_EDGE_RISING:
-- sense = 1;
-- break;
--
-- case IRQ_TYPE_EDGE_FALLING:
-- break;
--
-- case IRQ_TYPE_LEVEL_HIGH:
-- levelsense = 1;
-- sense = 1;
-- break;
--
-- case IRQ_TYPE_LEVEL_LOW:
-- levelsense = 1;
-- break;
--
-- default:
-- pr_err("bogus flow type combination given !\n");
-- return -EINVAL;
-- }
--
-- regaddr = get_ext_irq_perf_reg(irq);
-- spin_lock_irqsave(&epic_lock, flags);
-- reg = bcm_perf_readl(regaddr);
-- irq %= 4;
--
-- switch (bcm63xx_get_cpu_id()) {
-- case BCM6348_CPU_ID:
-- if (levelsense)
-- reg |= EXTIRQ_CFG_LEVELSENSE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_LEVELSENSE_6348(irq);
-- if (sense)
-- reg |= EXTIRQ_CFG_SENSE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_SENSE_6348(irq);
-- if (bothedge)
-- reg |= EXTIRQ_CFG_BOTHEDGE_6348(irq);
-- else
-- reg &= ~EXTIRQ_CFG_BOTHEDGE_6348(irq);
-- break;
--
-- case BCM3368_CPU_ID:
-- case BCM6328_CPU_ID:
-- case BCM6338_CPU_ID:
-- case BCM6345_CPU_ID:
-- case BCM6358_CPU_ID:
-- case BCM6362_CPU_ID:
-- case BCM6368_CPU_ID:
-- if (levelsense)
-- reg |= EXTIRQ_CFG_LEVELSENSE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_LEVELSENSE(irq);
-- if (sense)
-- reg |= EXTIRQ_CFG_SENSE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_SENSE(irq);
-- if (bothedge)
-- reg |= EXTIRQ_CFG_BOTHEDGE(irq);
-- else
-- reg &= ~EXTIRQ_CFG_BOTHEDGE(irq);
-- break;
-- default:
-- BUG();
-- }
--
-- bcm_perf_writel(reg, regaddr);
-- spin_unlock_irqrestore(&epic_lock, flags);
--
-- irqd_set_trigger_type(d, flow_type);
-- if (flow_type & (IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH))
-- irq_set_handler_locked(d, handle_level_irq);
-- else
-- irq_set_handler_locked(d, handle_edge_irq);
--
-- return IRQ_SET_MASK_OK_NOCOPY;
--}
--
--#ifdef CONFIG_SMP
--static int bcm63xx_internal_set_affinity(struct irq_data *data,
-- const struct cpumask *dest,
-- bool force)
--{
-- if (!irqd_irq_disabled(data))
-- internal_irq_unmask(data, dest);
--
-- return 0;
--}
--#endif
--
--static struct irq_chip bcm63xx_internal_irq_chip = {
-- .name = "bcm63xx_ipic",
-- .irq_mask = bcm63xx_internal_irq_mask,
-- .irq_unmask = bcm63xx_internal_irq_unmask,
--};
--
--static struct irq_chip bcm63xx_external_irq_chip = {
-- .name = "bcm63xx_epic",
-- .irq_ack = bcm63xx_external_irq_clear,
--
-- .irq_mask = bcm63xx_external_irq_mask,
-- .irq_unmask = bcm63xx_external_irq_unmask,
--
-- .irq_set_type = bcm63xx_external_irq_set_type,
--};
--
--static struct irqaction cpu_ip2_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_ip2",
-- .flags = IRQF_NO_THREAD,
--};
--
--#ifdef CONFIG_SMP
--static struct irqaction cpu_ip3_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_ip3",
-- .flags = IRQF_NO_THREAD,
--};
--#endif
--
--static struct irqaction cpu_ext_cascade_action = {
-- .handler = no_action,
-- .name = "cascade_extirq",
-- .flags = IRQF_NO_THREAD,
--};
--
--static void bcm63xx_init_irq(void)
-+void __init arch_init_irq(void)
- {
-- int irq_bits;
--
-- irq_stat_addr[0] = bcm63xx_regset_address(RSET_PERF);
-- irq_mask_addr[0] = bcm63xx_regset_address(RSET_PERF);
-- irq_stat_addr[1] = bcm63xx_regset_address(RSET_PERF);
-- irq_mask_addr[1] = bcm63xx_regset_address(RSET_PERF);
-+ void __iomem *periph_bases[2];
-+ void __iomem *ext_intc_bases[2];
-+ int periph_irq_count, periph_width, ext_irq_count, ext_shift;
-+ int periph_irqs[2] = { 2, 3 };
-+ int ext_irqs[6];
-+
-+ periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-+ ext_intc_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
-
- switch (bcm63xx_get_cpu_id()) {
- case BCM3368_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_3368_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_3368_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_3368;
-+ periph_bases[0] += PERF_IRQMASK_3368_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_3368;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_3368_EXT_IRQ0;
-+ ext_irqs[1] = BCM_3368_EXT_IRQ1;
-+ ext_irqs[2] = BCM_3368_EXT_IRQ2;
-+ ext_irqs[3] = BCM_3368_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6328_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6328_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6328_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6328_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6328_REG(1);
-- irq_bits = 64;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6328_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6328_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6328;
-+ periph_bases[0] += PERF_IRQMASK_6328_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6328_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6328;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6328_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6328_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6328_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6328_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6338_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6338_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6338_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6338;
-+ periph_bases[0] += PERF_IRQMASK_6338_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6338;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 4;
- break;
- case BCM6345_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6345_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6345_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6345;
-+ periph_bases[0] += PERF_IRQMASK_6345_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6345;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 4;
- break;
- case BCM6348_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6348_REG;
-- irq_mask_addr[0] += PERF_IRQMASK_6348_REG;
-- irq_stat_addr[1] = 0;
-- irq_mask_addr[1] = 0;
-- irq_bits = 32;
-- ext_irq_count = 4;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6348;
-+ periph_bases[0] += PERF_IRQMASK_6348_REG;
-+ periph_irq_count = 1;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6348;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = 3;
-+ ext_irqs[1] = 4;
-+ ext_irqs[2] = 5;
-+ ext_irqs[3] = 6;
-+ ext_shift = 5;
- break;
- case BCM6358_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6358_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6358_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6358_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6358_REG(1);
-- irq_bits = 32;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6358_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6358_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6358;
-+ periph_bases[0] += PERF_IRQMASK_6358_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6358_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 1;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6358_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6358_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6358_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6358_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6362_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6362_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6362_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6362_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6362_REG(1);
-- irq_bits = 64;
-- ext_irq_count = 4;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6362_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6362_EXT_IRQ3 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6362;
-+ periph_bases[0] += PERF_IRQMASK_6362_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6362_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6362;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6362_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6362_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6362_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6362_EXT_IRQ3;
-+ ext_shift = 4;
- break;
- case BCM6368_CPU_ID:
-- irq_stat_addr[0] += PERF_IRQSTAT_6368_REG(0);
-- irq_mask_addr[0] += PERF_IRQMASK_6368_REG(0);
-- irq_stat_addr[1] += PERF_IRQSTAT_6368_REG(1);
-- irq_mask_addr[1] += PERF_IRQMASK_6368_REG(1);
-- irq_bits = 64;
-+ periph_bases[0] += PERF_IRQMASK_6368_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_6368_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 2;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6368;
-+ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6368;
- ext_irq_count = 6;
-- is_ext_irq_cascaded = 1;
-- ext_irq_start = BCM_6368_EXT_IRQ0 - IRQ_INTERNAL_BASE;
-- ext_irq_end = BCM_6368_EXT_IRQ5 - IRQ_INTERNAL_BASE;
-- ext_irq_cfg_reg1 = PERF_EXTIRQ_CFG_REG_6368;
-- ext_irq_cfg_reg2 = PERF_EXTIRQ_CFG_REG2_6368;
-+ ext_irqs[0] = BCM_6368_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6368_EXT_IRQ1;
-+ ext_irqs[2] = BCM_6368_EXT_IRQ2;
-+ ext_irqs[3] = BCM_6368_EXT_IRQ3;
-+ ext_irqs[4] = BCM_6368_EXT_IRQ4;
-+ ext_irqs[5] = BCM_6368_EXT_IRQ5;
-+ ext_shift = 4;
- break;
- default:
- BUG();
- }
-
-- if (irq_bits == 32) {
-- dispatch_internal = __dispatch_internal_32;
-- internal_irq_mask = __internal_irq_mask_32;
-- internal_irq_unmask = __internal_irq_unmask_32;
-- } else {
-- dispatch_internal = __dispatch_internal_64;
-- internal_irq_mask = __internal_irq_mask_64;
-- internal_irq_unmask = __internal_irq_unmask_64;
-- }
--}
--
--void __init arch_init_irq(void)
--{
-- int i;
--
-- bcm63xx_init_irq();
- mips_cpu_irq_init();
-- for (i = IRQ_INTERNAL_BASE; i < NR_IRQS; ++i)
-- irq_set_chip_and_handler(i, &bcm63xx_internal_irq_chip,
-- handle_level_irq);
--
-- for (i = IRQ_EXTERNAL_BASE; i < IRQ_EXTERNAL_BASE + ext_irq_count; ++i)
-- irq_set_chip_and_handler(i, &bcm63xx_external_irq_chip,
-- handle_edge_irq);
--
-- if (!is_ext_irq_cascaded) {
-- for (i = 3; i < 3 + ext_irq_count; ++i)
-- setup_irq(MIPS_CPU_IRQ_BASE + i, &cpu_ext_cascade_action);
-- }
--
-- setup_irq(MIPS_CPU_IRQ_BASE + 2, &cpu_ip2_cascade_action);
--#ifdef CONFIG_SMP
-- if (is_ext_irq_cascaded) {
-- setup_irq(MIPS_CPU_IRQ_BASE + 3, &cpu_ip3_cascade_action);
-- bcm63xx_internal_irq_chip.irq_set_affinity =
-- bcm63xx_internal_set_affinity;
--
-- cpumask_clear(irq_default_affinity);
-- cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
-- }
--#endif
-+ bcm6345_periph_intc_init(periph_irq_count, periph_irqs, periph_bases,
-+ periph_width);
-+ bcm6345_ext_intc_init(4, ext_irqs, ext_intc_bases[0], ext_shift);
-+ if (ext_irq_count > 4)
-+ bcm6345_ext_intc_init(2, &ext_irqs[4], ext_intc_bases[1],
-+ ext_shift);
- }
+++ /dev/null
-From 4fd286c3e5a5bebab0391cf1937695b3ed6721a3 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 30 Nov 2014 20:20:30 +0100
-Subject: [PATCH 4/5] MIPS: BCM63XX: wire up BCM6358's external interrupts 4
- and 5
-
-Due to the external interrupts being non consecutive, the previous
-implementation did not support them. Now that we treat both registers
-as separate irq controllers, there is no such limitation anymore and
-we can expose them for drivers to use.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 5 ++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 2 ++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 1 +
- 3 files changed, 7 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -108,11 +108,14 @@ void __init arch_init_irq(void)
- periph_width = 1;
-
- ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6358;
-- ext_irq_count = 4;
-+ ext_intc_bases[1] += PERF_EXTIRQ_CFG_REG2_6358;
-+ ext_irq_count = 6;
- ext_irqs[0] = BCM_6358_EXT_IRQ0;
- ext_irqs[1] = BCM_6358_EXT_IRQ1;
- ext_irqs[2] = BCM_6358_EXT_IRQ2;
- ext_irqs[3] = BCM_6358_EXT_IRQ3;
-+ ext_irqs[4] = BCM_6358_EXT_IRQ4;
-+ ext_irqs[5] = BCM_6358_EXT_IRQ5;
- ext_shift = 4;
- break;
- case BCM6362_CPU_ID:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -896,6 +896,8 @@ enum bcm63xx_irq {
- #define BCM_6358_EXT_IRQ1 (IRQ_INTERNAL_BASE + 26)
- #define BCM_6358_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
- #define BCM_6358_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
-+#define BCM_6358_EXT_IRQ4 (IRQ_INTERNAL_BASE + 20)
-+#define BCM_6358_EXT_IRQ5 (IRQ_INTERNAL_BASE + 21)
-
- /*
- * 6362 irqs
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -244,6 +244,7 @@
- #define PERF_EXTIRQ_CFG_REG_6362 0x18
- #define PERF_EXTIRQ_CFG_REG_6368 0x18
-
-+#define PERF_EXTIRQ_CFG_REG2_6358 0x1c
- #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
-
- /* for 6348 only */
+++ /dev/null
-From c50acd37b425a8a907a6f7f93aa2e658256e79ce Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:08:36 +0100
-Subject: [PATCH 40/53] MIPS: BCM63XX: add a new cpu variant helper
-
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 18 ++++++++++++++++++
- 2 files changed, 28 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -27,6 +27,8 @@ EXPORT_SYMBOL(bcm63xx_irqs);
- u16 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
-+static u32 bcm63xx_cpu_variant __read_mostly;
-+
- static u8 bcm63xx_cpu_rev;
- static unsigned int bcm63xx_cpu_freq;
- static unsigned int bcm63xx_memory_size;
-@@ -99,6 +101,13 @@ static const int bcm6368_irqs[] = {
-
- };
-
-+u32 bcm63xx_get_cpu_variant(void)
-+{
-+ return bcm63xx_cpu_variant;
-+}
-+
-+EXPORT_SYMBOL(bcm63xx_get_cpu_variant);
-+
- u8 bcm63xx_get_cpu_rev(void)
- {
- return bcm63xx_cpu_rev;
-@@ -333,6 +342,7 @@ void __init bcm63xx_cpu_init(void)
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -20,6 +20,7 @@
- #define BCM6368_CPU_ID 0x6368
-
- void __init bcm63xx_cpu_init(void);
-+u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
-@@ -83,6 +84,23 @@ static inline u16 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-
-+#define BCMCPU_VARIANT_IS_3368() \
-+ (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6328() \
-+ (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6338() \
-+ (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6345() \
-+ (bcm63xx_get_cpu_variant() == BCM6345_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6348() \
-+ (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6358() \
-+ (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6362() \
-+ (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6368() \
-+ (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
- * address of these sets do change.
+++ /dev/null
-From 3bd8e2535265f06f79ed9c0ad788405441e091dc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:22:41 +0100
-Subject: [PATCH 21/45] MIPS: BCM63XX: define variant id field
-
-Some SoC have a variant id field in the chip id register.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 ++
- 1 file changed, 2 insertions(+)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -10,6 +10,8 @@
- #define PERF_REV_REG 0x0
- #define REV_CHIPID_SHIFT 16
- #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_VARID_SHIFT 12
-+#define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT 0
- #define REV_REVID_MASK (0xff << REV_REVID_SHIFT)
-
+++ /dev/null
-From d59120f23279ef62a48d9f94847254b061d0a8b6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:30:59 +0100
-Subject: [PATCH 22/45] MIPS: BCM63XX: detect BCM6328 variants
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/cpu.c | 10 ++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++++--
- 2 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -305,6 +305,7 @@ void __init bcm63xx_cpu_init(void)
- unsigned int tmp;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
- chipid_reg = 0;
-@@ -344,6 +345,7 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -353,6 +355,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6328_CPU_ID:
- bcm63xx_regs_base = bcm6328_regs_base;
- bcm63xx_irqs = bcm6328_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM63281_CPU_ID;
-+ else if (varid == 3)
-+ bcm63xx_cpu_variant = BCM63283_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6328 variant: %x\n", varid);
-+
- break;
- case BCM6338_CPU_ID:
- bcm63xx_regs_base = bcm6338_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -12,6 +12,8 @@
- */
- #define BCM3368_CPU_ID 0x3368
- #define BCM6328_CPU_ID 0x6328
-+#define BCM63281_CPU_ID 0x63281
-+#define BCM63283_CPU_ID 0x63283
- #define BCM6338_CPU_ID 0x6338
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
-@@ -86,8 +88,10 @@ static inline u16 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
--#define BCMCPU_VARIANT_IS_6328() \
-- (bcm63xx_get_cpu_variant() == BCM6328_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63281() \
-+ (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63283() \
-+ (bcm63xx_get_cpu_variant() == BCM63283_CPU_ID)
- #define BCMCPU_VARIANT_IS_6338() \
- (bcm63xx_get_cpu_variant() == BCM6338_CPU_ID)
- #define BCMCPU_VARIANT_IS_6345() \
+++ /dev/null
-From 04458c3db8eb79da21ecde40ab36a1dde52bef06 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:33:28 +0100
-Subject: [PATCH 23/45] MIPS: BCM63XX: detect BCM6362 variants
-
----
- arch/mips/bcm63xx/cpu.c | 8 ++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 11 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -383,6 +383,14 @@ void __init bcm63xx_cpu_init(void)
- case BCM6362_CPU_ID:
- bcm63xx_regs_base = bcm6362_regs_base;
- bcm63xx_irqs = bcm6362_irqs;
-+
-+ if (varid == 1)
-+ bcm63xx_cpu_variant = BCM6362_CPU_ID;
-+ else if (varid == 2)
-+ bcm63xx_cpu_variant = BCM6361_CPU_ID;
-+ else
-+ pr_warn("unknown BCM6362 variant: %x\n", varid);
-+
- break;
- case BCM6368_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -18,6 +18,7 @@
- #define BCM6345_CPU_ID 0x6345
- #define BCM6348_CPU_ID 0x6348
- #define BCM6358_CPU_ID 0x6358
-+#define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-
-@@ -100,6 +101,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6348_CPU_ID)
- #define BCMCPU_VARIANT_IS_6358() \
- (bcm63xx_get_cpu_cariant() == BCM6358_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6361() \
-+ (bcm63xx_get_cpu_variant() == BCM6361_CPU_ID)
- #define BCMCPU_VARIANT_IS_6362() \
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
+++ /dev/null
-From 825cc67e56b5e624a05f6850a86d91508b786848 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:36:56 +0100
-Subject: [PATCH 24/44] MIPS: BCM63XX: detect BCM6368 variants
-
-The DSL-less BCM6368 variant BCM6367 uses a different chip id. Apart
-from missing DSL, there is no difference to BCM6368, so treat it such.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/cpu.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 3 +++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -393,8 +393,12 @@ void __init bcm63xx_cpu_init(void)
-
- break;
- case BCM6368_CPU_ID:
-+ case BCM6369_CPU_ID:
- bcm63xx_regs_base = bcm6368_regs_base;
- bcm63xx_irqs = bcm6368_irqs;
-+
-+ /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
-+ bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -21,6 +21,7 @@
- #define BCM6361_CPU_ID 0x6361
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
-+#define BCM6369_CPU_ID 0x6369
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -107,6 +108,8 @@ static inline u16 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6362_CPU_ID)
- #define BCMCPU_VARIANT_IS_6368() \
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6369() \
-+ (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
+++ /dev/null
-From f67f8134b4537c8bbafe7e1975edfe808b813997 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:05:54 +0100
-Subject: [PATCH 45/53] MIPS: BCM63XX: fix PCIe memory window size
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -42,7 +42,7 @@
- BCM_CB_MEM_SIZE - 1)
-
- #define BCM_PCIE_MEM_BASE_PA 0x10f00000
--#define BCM_PCIE_MEM_SIZE (16 * 1024 * 1024)
-+#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
- #define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
- BCM_PCIE_MEM_SIZE - 1)
-
+++ /dev/null
-From aa05464973bc176478af462ca7c53a9239c651d4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:13:06 +0100
-Subject: [PATCH 46/53] MIPS: BCM63XX: dynamically set the pcie memory windows
-
-Different SoCs use different memory windows (and sizes), so don't
-hardcode it.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 8 ++++----
- arch/mips/pci/pci-bcm63xx.c | 15 ++++++++++-----
- 2 files changed, 14 insertions(+), 9 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -41,10 +41,10 @@
- #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
- BCM_CB_MEM_SIZE - 1)
-
--#define BCM_PCIE_MEM_BASE_PA 0x10f00000
--#define BCM_PCIE_MEM_SIZE (1 * 1024 * 1024)
--#define BCM_PCIE_MEM_END_PA (BCM_PCIE_MEM_BASE_PA + \
-- BCM_PCIE_MEM_SIZE - 1)
-+#define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
-+#define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
-+ BCM_PCIE_MEM_SIZE_6328 - 1)
-
- /*
- * Internal registers are accessed through KSEG3
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -77,8 +77,8 @@ struct pci_controller bcm63xx_cb_control
-
- static struct resource bcm_pcie_mem_resource = {
- .name = "bcm63xx PCIe memory space",
-- .start = BCM_PCIE_MEM_BASE_PA,
-- .end = BCM_PCIE_MEM_END_PA,
-+ .start = 0,
-+ .end = 0,
- .flags = IORESOURCE_MEM,
- };
-
-@@ -195,12 +195,12 @@ static int __init bcm63xx_register_pcie(
- bcm_pcie_writel(val, PCIE_CONFIG2_REG);
-
- /* set bar0 to little endian */
-- val = (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_BASE_SHIFT;
-- val |= (BCM_PCIE_MEM_BASE_PA >> 20) << BASEMASK_MASK_SHIFT;
-+ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-+ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
- val |= BASEMASK_REMAP_EN;
- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
-
-- val = (BCM_PCIE_MEM_BASE_PA >> 20) << REBASE_ADDR_BASE_SHIFT;
-+ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
-
- register_pci_controller(&bcm63xx_pcie_controller);
-@@ -334,6 +334,11 @@ static int __init bcm63xx_pci_init(void)
- if (!bcm63xx_pci_enabled)
- return -ENODEV;
-
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+ }
-+
- switch (bcm63xx_get_cpu_id()) {
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
+++ /dev/null
-From f1477f6e3551fd6beecfee5368fed1325dcd421f Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 14:54:51 +0100
-Subject: [PATCH 47/53] MIPS: BCM63XX: widen cpuid field
-
----
- arch/mips/bcm63xx/cpu.c | 2 +-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 8 ++++----
- 2 files changed, 5 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -24,7 +24,7 @@ EXPORT_SYMBOL(bcm63xx_regs_base);
- const int *bcm63xx_irqs;
- EXPORT_SYMBOL(bcm63xx_irqs);
-
--u16 bcm63xx_cpu_id __read_mostly;
-+u32 bcm63xx_cpu_id __read_mostly;
- EXPORT_SYMBOL(bcm63xx_cpu_id);
-
- static u32 bcm63xx_cpu_variant __read_mostly;
-@@ -127,7 +127,7 @@ unsigned int bcm63xx_get_memory_size(voi
-
- static unsigned int detect_cpu_clock(void)
- {
-- u16 cpu_id = bcm63xx_get_cpu_id();
-+ u32 cpu_id = bcm63xx_get_cpu_id();
-
- switch (cpu_id) {
- case BCM3368_CPU_ID:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -28,7 +28,7 @@ u32 bcm63xx_get_cpu_variant(void);
- u8 bcm63xx_get_cpu_rev(void);
- unsigned int bcm63xx_get_cpu_freq(void);
-
--static inline u16 __pure __bcm63xx_get_cpu_id(const u16 cpu_id)
-+static inline u32 __pure __bcm63xx_get_cpu_id(const u32 cpu_id)
- {
- switch (cpu_id) {
- #ifdef CONFIG_BCM63XX_CPU_3368
-@@ -70,11 +70,11 @@ static inline u16 __pure __bcm63xx_get_c
- return cpu_id;
- }
-
--extern u16 bcm63xx_cpu_id;
-+extern u32 bcm63xx_cpu_id;
-
--static inline u16 __pure bcm63xx_get_cpu_id(void)
-+static inline u32 __pure bcm63xx_get_cpu_id(void)
- {
-- const u16 cpu_id = bcm63xx_cpu_id;
-+ const u32 cpu_id = bcm63xx_cpu_id;
-
- return __bcm63xx_get_cpu_id(cpu_id);
- }
+++ /dev/null
-From 6f5658c845cf1f79213b1d20423a04967259fdaa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 15 Dec 2013 20:46:26 +0100
-Subject: [PATCH 48/53] MIPS: BCM63XX: increase number of IRQs
-
-Newer SoCs have 128 bit wide irq registers, thus 128 available internal
-interupts.
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h | 4 +++-
- arch/mips/include/asm/mach-bcm63xx/irq.h | 2 +-
- 2 files changed, 4 insertions(+), 2 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_irq.h
-@@ -2,10 +2,12 @@
- #ifndef BCM63XX_IRQ_H_
- #define BCM63XX_IRQ_H_
-
-+#include <irq.h>
- #include <bcm63xx_cpu.h>
-
- #define IRQ_INTERNAL_BASE 8
--#define IRQ_EXTERNAL_BASE 100
-+#define NR_INTERNAL_IRQS 128
-+#define IRQ_EXTERNAL_BASE (IRQ_INTERNAL_BASE + NR_INTERNAL_IRQS)
- #define IRQ_EXT_0 (IRQ_EXTERNAL_BASE + 0)
- #define IRQ_EXT_1 (IRQ_EXTERNAL_BASE + 1)
- #define IRQ_EXT_2 (IRQ_EXTERNAL_BASE + 2)
---- a/arch/mips/include/asm/mach-bcm63xx/irq.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/irq.h
-@@ -2,7 +2,7 @@
- #ifndef __ASM_MACH_BCM63XX_IRQ_H
- #define __ASM_MACH_BCM63XX_IRQ_H
-
--#define NR_IRQS 128
-+#define NR_IRQS 256
- #define MIPS_CPU_IRQ_BASE 0
-
- #endif
+++ /dev/null
-From 98f63141190ac02c58b78d58f771bd263c61d756 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 7 Dec 2013 17:14:17 +0100
-Subject: [PATCH 48/56] MIPS: BCM63XX: add support for BCM63268
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/Kconfig | 5 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/clk.c | 25 ++++-
- arch/mips/bcm63xx/cpu.c | 59 +++++++++-
- arch/mips/bcm63xx/dev-flash.c | 6 +
- arch/mips/bcm63xx/dev-spi.c | 4 +-
- arch/mips/bcm63xx/irq.c | 20 +++-
- arch/mips/bcm63xx/reset.c | 21 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 130 ++++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 +
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 79 +++++++++++++
- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
- 12 files changed, 342 insertions(+), 12 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -61,6 +61,11 @@ config BCM63XX_CPU_6368
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+
-+config BCM63XX_CPU_63268
-+ bool "support 63268 CPU"
-+ select SYS_HAS_CPU_BMIPS4350
-+ select HW_HAS_PCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -697,7 +697,7 @@ void __init board_prom_init(void)
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
- */
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
- val = 0x18000000;
- } else {
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -169,6 +169,8 @@ static void enetsw_set(struct clk *clk,
- clk_disable_unlocked(&clk_swpkt_sar);
- }
- bcm_hwclock_set(CKCTL_6368_ROBOSW_EN, enable);
-+ } else if (BCMCPU_IS_63268()) {
-+ bcm_hwclock_set(CKCTL_63268_ROBOSW_EN, enable);
- } else {
- return;
- }
-@@ -214,6 +216,8 @@ static void usbh_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
- else
- return;
-
-@@ -236,6 +240,8 @@ static void usbd_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6362_USBD_EN, enable);
- else if (BCMCPU_IS_6368())
- bcm_hwclock_set(CKCTL_6368_USBD_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_USBD_EN, enable);
- else
- return;
-
-@@ -262,9 +268,13 @@ static void spi_set(struct clk *clk, int
- mask = CKCTL_6358_SPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_SPI_EN;
-- else
-- /* BCMCPU_IS_6368 */
-+ else if (BCMCPU_IS_6368())
- mask = CKCTL_6368_SPI_EN;
-+ else if (BCMCPU_IS_63268())
-+ mask = CKCTL_63268_SPI_EN;
-+ else
-+ return;
-+
- bcm_hwclock_set(mask, enable);
- }
-
-@@ -283,6 +293,8 @@ static void hsspi_set(struct clk *clk, i
- mask = CKCTL_6328_HSSPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_HSSPI_EN;
-+ else if (BCMCPU_IS_63268())
-+ mask = CKCTL_63268_HSSPI_EN;
- else
- return;
-
-@@ -352,6 +364,8 @@ static void pcie_set(struct clk *clk, in
- bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
- else if (BCMCPU_IS_6362())
- bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
-+ else if (BCMCPU_IS_63268())
-+ bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
- }
-
- static struct clk clk_pcie = {
-@@ -536,6 +550,21 @@ static struct clk_lookup bcm6368_clks[]
- CLKDEV_INIT(NULL, "ipsec", &clk_ipsec),
- };
-
-+static struct clk_lookup bcm63268_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbd),
-+ CLKDEV_INIT(NULL, "spi", &clk_spi),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-
-@@ -568,6 +597,10 @@ static int __init bcm63xx_clk_init(void)
- case BCM6368_CPU_ID:
- clkdev_add_table(bcm6368_clks, ARRAY_SIZE(bcm6368_clks));
- break;
-+ case BCM63268_CPU_ID:
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6362;
-+ clkdev_add_table(bcm63268_clks, ARRAY_SIZE(bcm63268_clks));
-+ break;
- }
-
- return 0;
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -101,6 +101,15 @@ static const int bcm6368_irqs[] = {
-
- };
-
-+static const unsigned long bcm63268_regs_base[] = {
-+ __GEN_CPU_REGS_TABLE(63268)
-+};
-+
-+static const int bcm63268_irqs[] = {
-+ __GEN_CPU_IRQ_TABLE(63268)
-+
-+};
-+
- u32 bcm63xx_get_cpu_variant(void)
- {
- return bcm63xx_cpu_variant;
-@@ -253,6 +262,27 @@ static unsigned int detect_cpu_clock(voi
-
- return (((64 * 1000000) / p1) * p2 * ndiv) / m1;
- }
-+ case BCM63268_CPU_ID:
-+ {
-+ unsigned int tmp, mips_pll_fcvo;
-+
-+ tmp = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ mips_pll_fcvo = (tmp & STRAPBUS_63268_FCVO_MASK) >>
-+ STRAPBUS_63268_FCVO_SHIFT;
-+ switch (mips_pll_fcvo) {
-+ case 0x3:
-+ case 0xe:
-+ return 320000000;
-+ case 0xa:
-+ return 333000000;
-+ case 0x2:
-+ case 0xb:
-+ case 0xf:
-+ return 400000000;
-+ default:
-+ return 0;
-+ }
-+ }
-
- default:
- panic("Failed to detect clock for CPU with id=%04X\n", cpu_id);
-@@ -267,7 +297,7 @@ static unsigned int detect_memory_size(v
- unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
- u32 val;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
- return bcm_ddr_readl(DDR_CSEND_REG) << 24;
-
- if (BCMCPU_IS_6345()) {
-@@ -305,6 +335,7 @@ void __init bcm63xx_cpu_init(void)
- unsigned int tmp;
- unsigned int cpu = smp_processor_id();
- u32 chipid_reg;
-+ bool long_chipid = false;
- u8 __maybe_unused varid = 0;
-
- /* soc registers location depends on cpu type */
-@@ -326,6 +357,9 @@ void __init bcm63xx_cpu_init(void)
- case 0x10:
- chipid_reg = BCM_6345_PERF_BASE;
- break;
-+ case 0x80:
-+ long_chipid = true;
-+ /* fall-through */
- default:
- chipid_reg = BCM_6368_PERF_BASE;
- break;
-@@ -333,6 +367,7 @@ void __init bcm63xx_cpu_init(void)
- break;
- }
-
-+
- /*
- * really early to panic, but delaying panic would not help since we
- * will never get any working console
-@@ -342,10 +377,17 @@ void __init bcm63xx_cpu_init(void)
-
- /* read out CPU type */
- tmp = bcm_readl(chipid_reg);
-- bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-- bcm63xx_cpu_variant = bcm63xx_cpu_id;
-+
-+ if (long_chipid) {
-+ bcm63xx_cpu_id = tmp & REV_LONG_CHIPID_MASK;
-+ bcm63xx_cpu_id >>= REV_LONG_CHIPID_SHIFT;
-+ } else {
-+ bcm63xx_cpu_id = (tmp & REV_CHIPID_MASK) >> REV_CHIPID_SHIFT;
-+ varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+ }
-+
- bcm63xx_cpu_rev = (tmp & REV_REVID_MASK) >> REV_REVID_SHIFT;
-- varid = (tmp & REV_VARID_MASK) >> REV_VARID_SHIFT;
-+ bcm63xx_cpu_variant = bcm63xx_cpu_id;
-
- switch (bcm63xx_cpu_id) {
- case BCM3368_CPU_ID:
-@@ -400,6 +442,15 @@ void __init bcm63xx_cpu_init(void)
- /* BCM6369 is a BCM6368 without xDSL, so treat it the same */
- bcm63xx_cpu_id = BCM6368_CPU_ID;
- break;
-+ case BCM63168_CPU_ID:
-+ case BCM63169_CPU_ID:
-+ case BCM63268_CPU_ID:
-+ case BCM63269_CPU_ID:
-+ bcm63xx_regs_base = bcm63268_regs_base;
-+ bcm63xx_irqs = bcm63268_irqs;
-+
-+ bcm63xx_cpu_id = BCM63268_CPU_ID;
-+ break;
- default:
- panic("unsupported broadcom CPU %x", bcm63xx_cpu_id);
- break;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -94,6 +94,12 @@ static int __init bcm63xx_detect_flash_t
- case STRAPBUS_6368_BOOT_SEL_PARALLEL:
- return BCM63XX_FLASH_TYPE_PARALLEL;
- }
-+ case BCM63268_CPU_ID:
-+ val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
-+ return BCM63XX_FLASH_TYPE_SERIAL;
-+ else
-+ return BCM63XX_FLASH_TYPE_NAND;
- default:
- return -EINVAL;
- }
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -51,7 +51,7 @@ int __init bcm63xx_spi_register(void)
- }
-
- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
-- BCMCPU_IS_6368()) {
-+ BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
- bcm63xx_spi_device.name = "bcm6358-spi",
- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
- }
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -149,6 +149,20 @@ void __init arch_init_irq(void)
- ext_irqs[5] = BCM_6368_EXT_IRQ5;
- ext_shift = 4;
- break;
-+ case BCM63268_CPU_ID:
-+ periph_bases[0] += PERF_IRQMASK_63268_REG(0);
-+ periph_bases[1] += PERF_IRQMASK_63268_REG(1);
-+ periph_irq_count = 2;
-+ periph_width = 4;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_63268;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_63268_EXT_IRQ0;
-+ ext_irqs[1] = BCM_63268_EXT_IRQ1;
-+ ext_irqs[2] = BCM_63268_EXT_IRQ2;
-+ ext_irqs[3] = BCM_63268_EXT_IRQ3;
-+ ext_shift = 4;
-+ break;
- default:
- BUG();
- }
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -126,6 +126,20 @@
- #define BCM6368_RESET_PCIE 0
- #define BCM6368_RESET_PCIE_EXT 0
-
-+#define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
-+#define BCM63268_RESET_ENET 0
-+#define BCM63268_RESET_USBH SOFTRESET_63268_USBH_MASK
-+#define BCM63268_RESET_USBD SOFTRESET_63268_USBS_MASK
-+#define BCM63268_RESET_DSL 0
-+#define BCM63268_RESET_SAR SOFTRESET_63268_SAR_MASK
-+#define BCM63268_RESET_EPHY 0
-+#define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
-+#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
-+#define BCM63268_RESET_MPI 0
-+#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-+ SOFTRESET_63268_PCIE_CORE_MASK)
-+#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-+
- /*
- * core reset bits
- */
-@@ -157,6 +171,10 @@ static const u32 bcm6368_reset_bits[] =
- __GEN_RESET_BITS_TABLE(6368)
- };
-
-+static const u32 bcm63268_reset_bits[] = {
-+ __GEN_RESET_BITS_TABLE(63268)
-+};
-+
- const u32 *bcm63xx_reset_bits;
- static int reset_reg;
-
-@@ -183,6 +201,9 @@ static int __init bcm63xx_reset_bits_ini
- } else if (BCMCPU_IS_6368()) {
- reset_reg = PERF_SOFTRESET_6368_REG;
- bcm63xx_reset_bits = bcm6368_reset_bits;
-+ } else if (BCMCPU_IS_63268()) {
-+ reset_reg = PERF_SOFTRESET_63268_REG;
-+ bcm63xx_reset_bits = bcm63268_reset_bits;
- }
-
- return 0;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -22,6 +22,10 @@
- #define BCM6362_CPU_ID 0x6362
- #define BCM6368_CPU_ID 0x6368
- #define BCM6369_CPU_ID 0x6369
-+#define BCM63168_CPU_ID 0x63168
-+#define BCM63169_CPU_ID 0x63169
-+#define BCM63268_CPU_ID 0x63268
-+#define BCM63269_CPU_ID 0x63269
-
- void __init bcm63xx_cpu_init(void);
- u32 bcm63xx_get_cpu_variant(void);
-@@ -62,6 +66,10 @@ static inline u32 __pure __bcm63xx_get_c
- #ifdef CONFIG_BCM63XX_CPU_6368
- case BCM6368_CPU_ID:
- #endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+ case BCM63268_CPU_ID:
-+#endif
- break;
- default:
- unreachable();
-@@ -87,6 +95,7 @@ static inline u32 __pure bcm63xx_get_cpu
- #define BCMCPU_IS_6358() (bcm63xx_get_cpu_id() == BCM6358_CPU_ID)
- #define BCMCPU_IS_6362() (bcm63xx_get_cpu_id() == BCM6362_CPU_ID)
- #define BCMCPU_IS_6368() (bcm63xx_get_cpu_id() == BCM6368_CPU_ID)
-+#define BCMCPU_IS_63268() (bcm63xx_get_cpu_id() == BCM63268_CPU_ID)
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-@@ -110,6 +119,14 @@ static inline u32 __pure bcm63xx_get_cpu
- (bcm63xx_get_cpu_variant() == BCM6368_CPU_ID)
- #define BCMCPU_VARIANT_IS_6369() \
- (bcm63xx_get_cpu_variant() == BCM6369_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63168() \
-+ (bcm63xx_get_cpu_variant() == BCM63168_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63169() \
-+ (bcm63xx_get_cpu_variant() == BCM63169_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63268() \
-+ (bcm63xx_get_cpu_variant() == BCM63268_CPU_ID)
-+#define BCMCPU_VARIANT_IS_63269() \
-+ (bcm63xx_get_cpu_variant() == BCM63269_CPU_ID)
-
- /*
- * While registers sets are (mostly) the same across 63xx CPU, base
-@@ -574,6 +591,52 @@ enum bcm63xx_regs_set {
- #define BCM_6368_RNG_BASE (0xb0004180)
- #define BCM_6368_MISC_BASE (0xdeadbeef)
-
-+/*
-+ * 63268 register sets base address
-+ */
-+#define BCM_63268_DSL_LMEM_BASE (0xdeadbeef)
-+#define BCM_63268_PERF_BASE (0xb0000000)
-+#define BCM_63268_TIMER_BASE (0xb0000080)
-+#define BCM_63268_WDT_BASE (0xb000009c)
-+#define BCM_63268_UART0_BASE (0xb0000180)
-+#define BCM_63268_UART1_BASE (0xb00001a0)
-+#define BCM_63268_GPIO_BASE (0xb00000c0)
-+#define BCM_63268_SPI_BASE (0xb0000800)
-+#define BCM_63268_HSSPI_BASE (0xb0001000)
-+#define BCM_63268_UDC0_BASE (0xdeadbeef)
-+#define BCM_63268_USBDMA_BASE (0xb000c800)
-+#define BCM_63268_OHCI0_BASE (0xb0002600)
-+#define BCM_63268_OHCI_PRIV_BASE (0xdeadbeef)
-+#define BCM_63268_USBH_PRIV_BASE (0xb0002700)
-+#define BCM_63268_USBD_BASE (0xb0002400)
-+#define BCM_63268_MPI_BASE (0xdeadbeef)
-+#define BCM_63268_PCMCIA_BASE (0xdeadbeef)
-+#define BCM_63268_PCIE_BASE (0xb06e0000)
-+#define BCM_63268_SDRAM_REGS_BASE (0xdeadbeef)
-+#define BCM_63268_DSL_BASE (0xdeadbeef)
-+#define BCM_63268_UBUS_BASE (0xdeadbeef)
-+#define BCM_63268_ENET0_BASE (0xdeadbeef)
-+#define BCM_63268_ENET1_BASE (0xdeadbeef)
-+#define BCM_63268_ENETDMA_BASE (0xb000d800)
-+#define BCM_63268_ENETDMAC_BASE (0xb000da00)
-+#define BCM_63268_ENETDMAS_BASE (0xb000dc00)
-+#define BCM_63268_ENETSW_BASE (0xb0700000)
-+#define BCM_63268_EHCI0_BASE (0xb0002500)
-+#define BCM_63268_SDRAM_BASE (0xdeadbeef)
-+#define BCM_63268_MEMC_BASE (0xdeadbeef)
-+#define BCM_63268_DDR_BASE (0xb0003000)
-+#define BCM_63268_M2M_BASE (0xdeadbeef)
-+#define BCM_63268_ATM_BASE (0xdeadbeef)
-+#define BCM_63268_XTM_BASE (0xb0007000)
-+#define BCM_63268_XTMDMA_BASE (0xb000b800)
-+#define BCM_63268_XTMDMAC_BASE (0xdeadbeef)
-+#define BCM_63268_XTMDMAS_BASE (0xdeadbeef)
-+#define BCM_63268_PCM_BASE (0xb000b000)
-+#define BCM_63268_PCMDMA_BASE (0xb000b800)
-+#define BCM_63268_PCMDMAC_BASE (0xdeadbeef)
-+#define BCM_63268_PCMDMAS_BASE (0xdeadbeef)
-+#define BCM_63268_RNG_BASE (0xdeadbeef)
-+#define BCM_63268_MISC_BASE (0xb0001800)
-
- extern const unsigned long *bcm63xx_regs_base;
-
-@@ -1042,6 +1105,73 @@ enum bcm63xx_irq {
- #define BCM_6368_EXT_IRQ4 (IRQ_INTERNAL_BASE + 24)
- #define BCM_6368_EXT_IRQ5 (IRQ_INTERNAL_BASE + 25)
-
-+/*
-+ * 63268 irqs
-+ */
-+#define BCM_63268_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
-+#define BCM_63268_VERY_HIGH_IRQ_BASE (BCM_63268_HIGH_IRQ_BASE + 32)
-+
-+#define BCM_63268_TIMER_IRQ (IRQ_INTERNAL_BASE + 0)
-+#define BCM_63268_SPI_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 16)
-+#define BCM_63268_UART0_IRQ (IRQ_INTERNAL_BASE + 5)
-+#define BCM_63268_UART1_IRQ (BCM_63268_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_DSL_IRQ (IRQ_INTERNAL_BASE + 23)
-+#define BCM_63268_UDC0_IRQ 0
-+#define BCM_63268_ENET0_IRQ 0
-+#define BCM_63268_ENET1_IRQ 0
-+#define BCM_63268_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_HSSPI_IRQ (IRQ_INTERNAL_BASE + 6)
-+#define BCM_63268_OHCI0_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_63268_EHCI0_IRQ (IRQ_INTERNAL_BASE + 10)
-+#define BCM_63268_USBD_IRQ (IRQ_INTERNAL_BASE + 11)
-+#define BCM_63268_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_USBD_TXDMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 4)
-+#define BCM_63268_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 20)
-+#define BCM_63268_USBD_TXDMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 5)
-+#define BCM_63268_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 21)
-+#define BCM_63268_USBD_TXDMA2_IRQ (BCM_63268_HIGH_IRQ_BASE + 6)
-+#define BCM_63268_PCMCIA_IRQ 0
-+#define BCM_63268_ENET0_RXDMA_IRQ 0
-+#define BCM_63268_ENET0_TXDMA_IRQ 0
-+#define BCM_63268_ENET1_RXDMA_IRQ 0
-+#define BCM_63268_ENET1_TXDMA_IRQ 0
-+#define BCM_63268_PCI_IRQ (BCM_63268_HIGH_IRQ_BASE + 8)
-+#define BCM_63268_ATM_IRQ 0
-+#define BCM_63268_ENETSW_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 1)
-+#define BCM_63268_ENETSW_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 2)
-+#define BCM_63268_ENETSW_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 3)
-+#define BCM_63268_ENETSW_RXDMA3_IRQ (IRQ_INTERNAL_BASE + 4)
-+#define BCM_63268_ENETSW_TXDMA0_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_ENETSW_TXDMA1_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_ENETSW_TXDMA2_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 2)
-+#define BCM_63268_ENETSW_TXDMA3_IRQ (BCM_63268_VERY_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_XTM_IRQ (BCM_63268_HIGH_IRQ_BASE + 17)
-+#define BCM_63268_XTM_DMA0_IRQ (IRQ_INTERNAL_BASE + 26)
-+
-+#define BCM_63268_RING_OSC_IRQ (BCM_63268_HIGH_IRQ_BASE + 20)
-+#define BCM_63268_WLAN_GPIO_IRQ (BCM_63268_HIGH_IRQ_BASE + 3)
-+#define BCM_63268_WLAN_IRQ (IRQ_INTERNAL_BASE + 7)
-+#define BCM_63268_IPSEC_IRQ (IRQ_INTERNAL_BASE + 8)
-+#define BCM_63268_NAND_IRQ (BCM_63268_HIGH_IRQ_BASE + 18)
-+#define BCM_63268_PCM_IRQ (IRQ_INTERNAL_BASE + 13)
-+#define BCM_63268_DG_IRQ (IRQ_INTERNAL_BASE + 15)
-+#define BCM_63268_EPHY_ENERGY0_IRQ (IRQ_INTERNAL_BASE + 16)
-+#define BCM_63268_EPHY_ENERGY1_IRQ (IRQ_INTERNAL_BASE + 17)
-+#define BCM_63268_EPHY_ENERGY2_IRQ (IRQ_INTERNAL_BASE + 18)
-+#define BCM_63268_EPHY_ENERGY3_IRQ (IRQ_INTERNAL_BASE + 19)
-+#define BCM_63268_IPSEC_DMA0_IRQ (IRQ_INTERNAL_BASE + 22)
-+#define BCM_63268_IPSEC_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 7)
-+#define BCM_63268_FAP0_IRQ (IRQ_INTERNAL_BASE + 24)
-+#define BCM_63268_FAP1_IRQ (IRQ_INTERNAL_BASE + 25)
-+#define BCM_63268_PCM_DMA0_IRQ (BCM_63268_HIGH_IRQ_BASE + 10)
-+#define BCM_63268_PCM_DMA1_IRQ (BCM_63268_HIGH_IRQ_BASE + 11)
-+#define BCM_63268_DECT0_IRQ (BCM_63268_HIGH_IRQ_BASE + 0)
-+#define BCM_63268_DECT1_IRQ (BCM_63268_HIGH_IRQ_BASE + 1)
-+#define BCM_63268_EXT_IRQ0 (BCM_63268_HIGH_IRQ_BASE + 12)
-+#define BCM_63268_EXT_IRQ1 (BCM_63268_HIGH_IRQ_BASE + 13)
-+#define BCM_63268_EXT_IRQ2 (BCM_63268_HIGH_IRQ_BASE + 14)
-+#define BCM_63268_EXT_IRQ3 (BCM_63268_HIGH_IRQ_BASE + 15)
-+
- extern const int *bcm63xx_irqs;
-
- #define __GEN_CPU_IRQ_TABLE(__cpu) \
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -23,6 +23,8 @@ static inline unsigned long bcm63xx_gpio
- return 48;
- case BCM6368_CPU_ID:
- return 38;
-+ case BCM63268_CPU_ID:
-+ return 52;
- case BCM6348_CPU_ID:
- default:
- return 37;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -10,6 +10,8 @@
- #define PERF_REV_REG 0x0
- #define REV_CHIPID_SHIFT 16
- #define REV_CHIPID_MASK (0xffff << REV_CHIPID_SHIFT)
-+#define REV_LONG_CHIPID_SHIFT 12
-+#define REV_LONG_CHIPID_MASK (0xfffff << REV_LONG_CHIPID_SHIFT)
- #define REV_VARID_SHIFT 12
- #define REV_VARID_MASK (0xf << REV_VARID_SHIFT)
- #define REV_REVID_SHIFT 0
-@@ -212,6 +214,52 @@
- CKCTL_6368_NAND_EN | \
- CKCTL_6368_IPSEC_EN)
-
-+#define CKCTL_63268_DISABLE_GLESS (1 << 0)
-+#define CKCTL_63268_VDSL_QPROC_EN (1 << 1)
-+#define CKCTL_63268_VDSL_AFE_EN (1 << 2)
-+#define CKCTL_63268_VDSL_EN (1 << 3)
-+#define CKCTL_63268_MIPS_EN (1 << 4)
-+#define CKCTL_63268_WLAN_OCP_EN (1 << 5)
-+#define CKCTL_63268_DECT_EN (1 << 6)
-+#define CKCTL_63268_FAP0_EN (1 << 7)
-+#define CKCTL_63268_FAP1_EN (1 << 8)
-+#define CKCTL_63268_SAR_EN (1 << 9)
-+#define CKCTL_63268_ROBOSW_EN (1 << 10)
-+#define CKCTL_63268_PCM_EN (1 << 11)
-+#define CKCTL_63268_USBD_EN (1 << 12)
-+#define CKCTL_63268_USBH_EN (1 << 13)
-+#define CKCTL_63268_IPSEC_EN (1 << 14)
-+#define CKCTL_63268_SPI_EN (1 << 15)
-+#define CKCTL_63268_HSSPI_EN (1 << 16)
-+#define CKCTL_63268_PCIE_EN (1 << 17)
-+#define CKCTL_63268_PHYMIPS_EN (1 << 18)
-+#define CKCTL_63268_GMAC_EN (1 << 19)
-+#define CKCTL_63268_NAND_EN (1 << 20)
-+#define CKCTL_63268_TBUS_EN (1 << 27)
-+#define CKCTL_63268_ROBOSW250_EN (1 << 31)
-+
-+#define CKCTL_63268_ALL_SAFE_EN (CKCTL_63268_VDSL_QPROC_EN | \
-+ CKCTL_63268_VDSL_AFE_EN | \
-+ CKCTL_63268_VDSL_EN | \
-+ CKCTL_63268_WLAN_OCP_EN | \
-+ CKCTL_63268_DECT_EN | \
-+ CKCTL_63268_FAP0_EN | \
-+ CKCTL_63268_FAP1_EN | \
-+ CKCTL_63268_SAR_EN | \
-+ CKCTL_63268_ROBOSW_EN | \
-+ CKCTL_63268_PCM_EN | \
-+ CKCTL_63268_USBD_EN | \
-+ CKCTL_63268_USBH_EN | \
-+ CKCTL_63268_IPSEC_EN | \
-+ CKCTL_63268_SPI_EN | \
-+ CKCTL_63268_HSSPI_EN | \
-+ CKCTL_63268_PCIE_EN | \
-+ CKCTL_63268_PHYMIPS_EN | \
-+ CKCTL_63268_GMAC_EN | \
-+ CKCTL_63268_NAND_EN | \
-+ CKCTL_63268_TBUS_EN | \
-+ CKCTL_63268_ROBOSW250_EN)
-+
- /* System PLL Control register */
- #define PERF_SYS_PLL_CTL_REG 0x8
- #define SYS_PLL_SOFT_RESET 0x1
-@@ -225,6 +273,7 @@
- #define PERF_IRQMASK_6358_REG(x) (0xc + (x) * 0x2c)
- #define PERF_IRQMASK_6362_REG(x) (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6368_REG(x) (0x20 + (x) * 0x10)
-+#define PERF_IRQMASK_63268_REG(x) (0x20 + (x) * 0x20)
-
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG 0x10
-@@ -235,6 +284,7 @@
- #define PERF_IRQSTAT_6358_REG(x) (0x10 + (x) * 0x2c)
- #define PERF_IRQSTAT_6362_REG(x) (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6368_REG(x) (0x28 + (x) * 0x10)
-+#define PERF_IRQSTAT_63268_REG(x) (0x30 + (x) * 0x20)
-
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368 0x14
-@@ -245,6 +295,7 @@
- #define PERF_EXTIRQ_CFG_REG_6358 0x14
- #define PERF_EXTIRQ_CFG_REG_6362 0x18
- #define PERF_EXTIRQ_CFG_REG_6368 0x18
-+#define PERF_EXTIRQ_CFG_REG_63268 0x18
-
- #define PERF_EXTIRQ_CFG_REG2_6358 0x1c
- #define PERF_EXTIRQ_CFG_REG2_6368 0x1c
-@@ -275,6 +326,7 @@
- #define PERF_SOFTRESET_6358_REG 0x34
- #define PERF_SOFTRESET_6362_REG 0x10
- #define PERF_SOFTRESET_6368_REG 0x10
-+#define PERF_SOFTRESET_63268_REG 0x10
-
- #define SOFTRESET_3368_SPI_MASK (1 << 0)
- #define SOFTRESET_3368_ENET_MASK (1 << 2)
-@@ -368,6 +420,26 @@
- #define SOFTRESET_6368_USBH_MASK (1 << 12)
- #define SOFTRESET_6368_PCM_MASK (1 << 13)
-
-+#define SOFTRESET_63268_SPI_MASK (1 << 0)
-+#define SOFTRESET_63268_IPSEC_MASK (1 << 1)
-+#define SOFTRESET_63268_EPHY_MASK (1 << 2)
-+#define SOFTRESET_63268_SAR_MASK (1 << 3)
-+#define SOFTRESET_63268_ENETSW_MASK (1 << 4)
-+#define SOFTRESET_63268_USBS_MASK (1 << 5)
-+#define SOFTRESET_63268_USBH_MASK (1 << 6)
-+#define SOFTRESET_63268_PCM_MASK (1 << 7)
-+#define SOFTRESET_63268_PCIE_CORE_MASK (1 << 8)
-+#define SOFTRESET_63268_PCIE_MASK (1 << 9)
-+#define SOFTRESET_63268_PCIE_EXT_MASK (1 << 10)
-+#define SOFTRESET_63268_WLAN_SHIM_MASK (1 << 11)
-+#define SOFTRESET_63268_DDR_PHY_MASK (1 << 12)
-+#define SOFTRESET_63268_FAP0_MASK (1 << 13)
-+#define SOFTRESET_63268_WLAN_UBUS_MASK (1 << 14)
-+#define SOFTRESET_63268_DECT_MASK (1 << 15)
-+#define SOFTRESET_63268_FAP1_MASK (1 << 16)
-+#define SOFTRESET_63268_PCIE_HARD_MASK (1 << 17)
-+#define SOFTRESET_63268_GPHY_MASK (1 << 18)
-+
- /* MIPS PLL control register */
- #define PERF_MIPSPLLCTL_REG 0x34
- #define MIPSPLLCTL_N1_SHIFT 20
-@@ -1367,6 +1439,13 @@
- #define STRAPBUS_6362_BOOT_SEL_SERIAL (1 << 15)
- #define STRAPBUS_6362_BOOT_SEL_NAND (0 << 15)
-
-+#define MISC_STRAPBUS_63268_REG 0x14
-+#define STRAPBUS_63268_HSSPI_CLK_FAST (1 << 9)
-+#define STRAPBUS_63268_BOOT_SEL_SERIAL (1 << 11)
-+#define STRAPBUS_63268_BOOT_SEL_NAND (0 << 11)
-+#define STRAPBUS_63268_FCVO_SHIFT 21
-+#define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
-+
- #define MISC_STRAPBUS_6328_REG 0x240
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -26,6 +26,7 @@ static inline int is_bcm63xx_internal_re
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM6368_CPU_ID:
-+ case BCM63268_CPU_ID:
- if (offset >= 0xb0000000 && offset < 0xb1000000)
- return 1;
- break;
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -35,7 +35,7 @@ static struct platform_device bcm63xx_hs
-
- int __init bcm63xx_hsspi_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362())
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -184,7 +184,8 @@ static int __init register_shared(void)
- else
- shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368())
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-+ BCMCPU_IS_63268())
- chan_count = 32;
- else if (BCMCPU_IS_6345())
- chan_count = 8;
-@@ -292,7 +293,8 @@ bcm63xx_enetsw_register(const struct bcm
- {
- int ret;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
-+ !BCMCPU_IS_63268())
- return -ENODEV;
-
- ret = register_shared();
-@@ -313,6 +315,8 @@ bcm63xx_enetsw_register(const struct bcm
- enetsw_pd.num_ports = ENETSW_PORTS_6328;
- else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
- enetsw_pd.num_ports = ENETSW_PORTS_6368;
-+ else if (BCMCPU_IS_63268())
-+ enetsw_pd.num_ports = ENETSW_PORTS_63268;
-
- enetsw_pd.dma_has_sram = true;
- enetsw_pd.dma_chan_width = ENETDMA_CHAN_WIDTH;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_enet.h
-@@ -67,6 +67,7 @@ struct bcm63xx_enet_platform_data {
- #define ENETSW_MAX_PORT 8
- #define ENETSW_PORTS_6328 5 /* 4 FE PHY + 1 RGMII */
- #define ENETSW_PORTS_6368 6 /* 4 FE PHY + 2 RGMII */
-+#define ENETSW_PORTS_63268 8 /* 3 FE PHY + 1 GE PHY + 4 RGMII */
-
- #define ENETSW_RGMII_PORT0 4
-
+++ /dev/null
-From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 03:22:40 +0100
-Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
-
----
- arch/mips/bcm63xx/reset.c | 3 ++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
- arch/mips/pci/pci-bcm63xx.c | 4 ++++
- 3 files changed, 11 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -137,7 +137,8 @@
- #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
- #define BCM63268_RESET_MPI 0
- #define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-- SOFTRESET_63268_PCIE_CORE_MASK)
-+ SOFTRESET_63268_PCIE_CORE_MASK | \
-+ SOFTRESET_63268_PCIE_HARD_MASK)
- #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-
- /*
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -46,6 +46,11 @@
- #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
- BCM_PCIE_MEM_SIZE_6328 - 1)
-
-+#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000
-+#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \
-+ BCM_PCIE_MEM_SIZE_63268 - 1)
-+
- /*
- * Internal registers are accessed through KSEG3
- */
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
- bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
- bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
-+ } else if (BCMCPU_IS_63268()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
- }
-
- switch (bcm63xx_get_cpu_id()) {
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
-+ case BCM63268_CPU_ID:
- return bcm63xx_register_pcie();
- case BCM3368_CPU_ID:
- case BCM6348_CPU_ID:
+++ /dev/null
-From 60c29522a8c77d96145d965589c56befda7d4c3d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 01:24:09 +0100
-Subject: [PATCH 51/53] MIPS: BCM63XX: add support for BCM6318
-
----
- arch/mips/bcm63xx/Kconfig | 5 +
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/clk.c | 8 +-
- arch/mips/bcm63xx/cpu.c | 53 +++++++++++
- arch/mips/bcm63xx/dev-flash.c | 3 +
- arch/mips/bcm63xx/dev-spi.c | 2 +-
- arch/mips/bcm63xx/irq.c | 10 ++
- arch/mips/bcm63xx/prom.c | 2 +-
- arch/mips/bcm63xx/reset.c | 24 +++++
- arch/mips/bcm63xx/setup.c | 5 +-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h | 107 ++++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 75 ++++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/ioremap.h | 1 +
- 13 files changed, 291 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -19,6 +19,11 @@ config BCM63XX_EHCI
- select USB_EHCI_BIG_ENDIAN_DESC if USB_EHCI_HCD
- select USB_EHCI_BIG_ENDIAN_MMIO if USB_EHCI_HCD
-
-+config BCM63XX_CPU_6318
-+ bool "support 6318 CPU"
-+ select SYS_HAS_CPU_BMIPS32_3300
-+ select HW_HAS_PCI
-+
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
- select SYS_HAS_CPU_BMIPS4350
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -697,7 +697,7 @@ void __init board_prom_init(void)
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
- */
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
- val = 0x18000000;
- } else {
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -289,7 +289,9 @@ static void hsspi_set(struct clk *clk, i
- {
- u32 mask;
-
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318())
-+ mask = CKCTL_6318_HSSPI_EN;
-+ else if (BCMCPU_IS_6328())
- mask = CKCTL_6328_HSSPI_EN;
- else if (BCMCPU_IS_6362())
- mask = CKCTL_6362_HSSPI_EN;
-@@ -444,6 +446,19 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT("bcm63xx_enet.1", "enet", &clk_enet1),
- };
-
-+static struct clk_lookup bcm6318_clks[] = {
-+ /* fixed rate clocks */
-+ CLKDEV_INIT(NULL, "periph", &clk_periph),
-+ CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ /* gated clocks */
-+ CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
-+ CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-+ CLKDEV_INIT(NULL, "usbd", &clk_usbh),
-+ CLKDEV_INIT(NULL, "hsspi", &clk_hsspi),
-+ CLKDEV_INIT(NULL, "pcie", &clk_pcie),
-+};
-+
- static struct clk_lookup bcm6328_clks[] = {
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
-@@ -565,6 +580,7 @@ static struct clk_lookup bcm63268_clks[]
- CLKDEV_INIT(NULL, "pcie", &clk_pcie),
- };
-
-+#define HSSPI_PLL_HZ_6318 250000000
- #define HSSPI_PLL_HZ_6328 133333333
- #define HSSPI_PLL_HZ_6362 400000000
-
-@@ -574,6 +590,10 @@ static int __init bcm63xx_clk_init(void)
- case BCM3368_CPU_ID:
- clkdev_add_table(bcm3368_clks, ARRAY_SIZE(bcm3368_clks));
- break;
-+ case BCM6318_CPU_ID:
-+ clk_hsspi_pll.rate = HSSPI_PLL_HZ_6318;
-+ clkdev_add_table(bcm6318_clks, ARRAY_SIZE(bcm6318_clks));
-+ break;
- case BCM6328_CPU_ID:
- clk_hsspi_pll.rate = HSSPI_PLL_HZ_6328;
- clkdev_add_table(bcm6328_clks, ARRAY_SIZE(bcm6328_clks));
---- a/arch/mips/bcm63xx/cpu.c
-+++ b/arch/mips/bcm63xx/cpu.c
-@@ -41,6 +41,14 @@ static const int bcm3368_irqs[] = {
- __GEN_CPU_IRQ_TABLE(3368)
- };
-
-+static const unsigned long bcm6318_regs_base[] = {
-+ __GEN_CPU_REGS_TABLE(6318)
-+};
-+
-+static const int bcm6318_irqs[] = {
-+ __GEN_CPU_IRQ_TABLE(6318)
-+};
-+
- static const unsigned long bcm6328_regs_base[] = {
- __GEN_CPU_REGS_TABLE(6328)
- };
-@@ -134,6 +142,10 @@ unsigned int bcm63xx_get_memory_size(voi
- return bcm63xx_memory_size;
- }
-
-+#define STRAP_OVERRIDE_BUS_REG 0x0
-+#define OVERRIDE_BUS_MIPS_FREQ_SHIFT 23
-+#define OVERRIDE_BUS_MIPS_FREQ_MASK (0x3 << OVERRIDE_BUS_MIPS_FREQ_SHIFT)
-+
- static unsigned int detect_cpu_clock(void)
- {
- u32 cpu_id = bcm63xx_get_cpu_id();
-@@ -142,6 +154,28 @@ static unsigned int detect_cpu_clock(voi
- case BCM3368_CPU_ID:
- return 300000000;
-
-+ case BCM6318_CPU_ID:
-+ {
-+ unsigned int tmp, mips_pll_fcvo;
-+
-+ tmp = bcm_readl(BCM_6318_STRAP_BASE + STRAP_OVERRIDE_BUS_REG);
-+
-+ pr_info("strap_override_bus = %08x\n", tmp);
-+
-+ mips_pll_fcvo = (tmp & OVERRIDE_BUS_MIPS_FREQ_MASK)
-+ >> OVERRIDE_BUS_MIPS_FREQ_SHIFT;
-+
-+ switch (mips_pll_fcvo) {
-+ case 0:
-+ return 166000000;
-+ case 1:
-+ return 400000000;
-+ case 2:
-+ return 250000000;
-+ case 3:
-+ return 333000000;
-+ };
-+ }
- case BCM6328_CPU_ID:
- {
- unsigned int tmp, mips_pll_fcvo;
-@@ -297,6 +331,13 @@ static unsigned int detect_memory_size(v
- unsigned int cols = 0, rows = 0, is_32bits = 0, banks = 0;
- u32 val;
-
-+ if (BCMCPU_IS_6318()) {
-+ val = bcm_sdram_readl(SDRAM_CFG_REG);
-+ val = val & SDRAM_CFG_6318_SPACE_MASK;
-+ val >>= SDRAM_CFG_6318_SPACE_SHIFT;
-+ return 1 << (val + 20);
-+ }
-+
- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268())
- return bcm_ddr_readl(DDR_CSEND_REG) << 24;
-
-@@ -343,6 +384,12 @@ void __init bcm63xx_cpu_init(void)
-
- switch (current_cpu_type()) {
- case CPU_BMIPS3300:
-+ if ((read_c0_prid() & 0xff) >= 0x33) {
-+ /* BCM6318 */
-+ chipid_reg = BCM_6368_PERF_BASE;
-+ break;
-+ }
-+
- if ((read_c0_prid() & PRID_IMP_MASK) != PRID_IMP_BMIPS3300_ALT)
- __cpu_name[cpu] = "Broadcom BCM6338";
- /* fall-through */
-@@ -390,6 +437,10 @@ void __init bcm63xx_cpu_init(void)
- bcm63xx_cpu_variant = bcm63xx_cpu_id;
-
- switch (bcm63xx_cpu_id) {
-+ case BCM6318_CPU_ID:
-+ bcm63xx_regs_base = bcm6318_regs_base;
-+ bcm63xx_irqs = bcm6318_irqs;
-+ break;
- case BCM3368_CPU_ID:
- bcm63xx_regs_base = bcm3368_regs_base;
- bcm63xx_irqs = bcm3368_irqs;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -60,6 +60,9 @@ static int __init bcm63xx_detect_flash_t
- u32 val;
-
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
-+ /* only support serial flash */
-+ return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6328_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
- if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ b/arch/mips/bcm63xx/dev-spi.c
-@@ -38,7 +38,7 @@ static struct platform_device bcm63xx_sp
-
- int __init bcm63xx_spi_register(void)
- {
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6345())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -48,6 +48,19 @@ void __init arch_init_irq(void)
- ext_irqs[3] = BCM_3368_EXT_IRQ3;
- ext_shift = 4;
- break;
-+ case BCM6318_CPU_ID:
-+ periph_bases[0] += PERF_IRQMASK_6318_REG;
-+ periph_irq_count = 1;
-+ periph_width = 4;
-+
-+ ext_intc_bases[0] += PERF_EXTIRQ_CFG_REG_6318;
-+ ext_irq_count = 4;
-+ ext_irqs[0] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[1] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[2] = BCM_6318_EXT_IRQ0;
-+ ext_irqs[3] = BCM_6318_EXT_IRQ0;
-+ ext_shift = 4;
-+ break;
- case BCM6328_CPU_ID:
- periph_bases[0] += PERF_IRQMASK_6328_REG(0);
- periph_bases[1] += PERF_IRQMASK_6328_REG(1);
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -68,7 +68,7 @@ void __init prom_init(void)
-
- if (reg & OTP_6328_REG3_TP1_DISABLED)
- bmips_smp_enabled = 0;
-- } else if (BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
-+ } else if (BCMCPU_IS_6318() || BCMCPU_IS_3368() || BCMCPU_IS_6358()) {
- bmips_smp_enabled = 0;
- }
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -44,6 +44,23 @@
- #define BCM3368_RESET_PCIE 0
- #define BCM3368_RESET_PCIE_EXT 0
-
-+
-+#define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
-+#define BCM6318_RESET_ENET 0
-+#define BCM6318_RESET_USBH SOFTRESET_6318_USBH_MASK
-+#define BCM6318_RESET_USBD SOFTRESET_6318_USBS_MASK
-+#define BCM6318_RESET_DSL 0
-+#define BCM6318_RESET_SAR SOFTRESET_6318_SAR_MASK
-+#define BCM6318_RESET_EPHY SOFTRESET_6318_EPHY_MASK
-+#define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
-+#define BCM6318_RESET_PCM 0
-+#define BCM6318_RESET_MPI 0
-+#define BCM6318_RESET_PCIE \
-+ (SOFTRESET_6318_PCIE_MASK | \
-+ SOFTRESET_6318_PCIE_CORE_MASK | \
-+ SOFTRESET_6318_PCIE_HARD_MASK)
-+#define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
-+
- #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
- #define BCM6328_RESET_ENET 0
- #define BCM6328_RESET_USBH SOFTRESET_6328_USBH_MASK
-@@ -148,6 +165,10 @@ static const u32 bcm3368_reset_bits[] =
- __GEN_RESET_BITS_TABLE(3368)
- };
-
-+static const u32 bcm6318_reset_bits[] = {
-+ __GEN_RESET_BITS_TABLE(6318)
-+};
-+
- static const u32 bcm6328_reset_bits[] = {
- __GEN_RESET_BITS_TABLE(6328)
- };
-@@ -184,6 +205,9 @@ static int __init bcm63xx_reset_bits_ini
- if (BCMCPU_IS_3368()) {
- reset_reg = PERF_SOFTRESET_6358_REG;
- bcm63xx_reset_bits = bcm3368_reset_bits;
-+ } else if (BCMCPU_IS_6318()) {
-+ reset_reg = PERF_SOFTRESET_6318_REG;
-+ bcm63xx_reset_bits = bcm6318_reset_bits;
- } else if (BCMCPU_IS_6328()) {
- reset_reg = PERF_SOFTRESET_6328_REG;
- bcm63xx_reset_bits = bcm6328_reset_bits;
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -72,6 +72,9 @@ void bcm63xx_machine_reboot(void)
- case BCM3368_CPU_ID:
- perf_regs[0] = PERF_EXTIRQ_CFG_REG_3368;
- break;
-+ case BCM6318_CPU_ID:
-+ perf_regs[0] = PERF_EXTIRQ_CFG_REG_6318;
-+ break;
- case BCM6328_CPU_ID:
- perf_regs[0] = PERF_EXTIRQ_CFG_REG_6328;
- break;
-@@ -111,7 +114,7 @@ void bcm63xx_machine_reboot(void)
- bcm6348_a1_reboot();
-
- pr_info("triggering watchdog soft-reset...\n");
-- if (BCMCPU_IS_6328()) {
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328()) {
- bcm_wdt_writel(1, WDT_SOFTRESET_REG);
- } else {
- reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_cpu.h
-@@ -11,6 +11,7 @@
- * arm mach-types)
- */
- #define BCM3368_CPU_ID 0x3368
-+#define BCM6318_CPU_ID 0x6318
- #define BCM6328_CPU_ID 0x6328
- #define BCM63281_CPU_ID 0x63281
- #define BCM63283_CPU_ID 0x63283
-@@ -39,6 +40,10 @@ static inline u32 __pure __bcm63xx_get_c
- case BCM3368_CPU_ID:
- #endif
-
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ case BCM6318_CPU_ID:
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6328
- case BCM6328_CPU_ID:
- #endif
-@@ -88,6 +93,7 @@ static inline u32 __pure bcm63xx_get_cpu
- }
-
- #define BCMCPU_IS_3368() (bcm63xx_get_cpu_id() == BCM3368_CPU_ID)
-+#define BCMCPU_IS_6318() (bcm63xx_get_cpu_id() == BCM6318_CPU_ID)
- #define BCMCPU_IS_6328() (bcm63xx_get_cpu_id() == BCM6328_CPU_ID)
- #define BCMCPU_IS_6338() (bcm63xx_get_cpu_id() == BCM6338_CPU_ID)
- #define BCMCPU_IS_6345() (bcm63xx_get_cpu_id() == BCM6345_CPU_ID)
-@@ -99,6 +105,8 @@ static inline u32 __pure bcm63xx_get_cpu
-
- #define BCMCPU_VARIANT_IS_3368() \
- (bcm63xx_get_cpu_variant() == BCM3368_CPU_ID)
-+#define BCMCPU_VARIANT_IS_6318() \
-+ (bcm63xx_get_cpu_variant() == BCM6318_CPU_ID)
- #define BCMCPU_VARIANT_IS_63281() \
- (bcm63xx_get_cpu_variant() == BCM63281_CPU_ID)
- #define BCMCPU_VARIANT_IS_63283() \
-@@ -253,6 +261,56 @@ enum bcm63xx_regs_set {
- #define BCM_3368_MISC_BASE (0xdeadbeef)
-
- /*
-+ * 6318 register sets base address
-+ */
-+#define BCM_6318_DSL_LMEM_BASE (0xdeadbeef)
-+#define BCM_6318_PERF_BASE (0xb0000000)
-+#define BCM_6318_TIMER_BASE (0xb0000040)
-+#define BCM_6318_WDT_BASE (0xb0000068)
-+#define BCM_6318_UART0_BASE (0xb0000100)
-+#define BCM_6318_UART1_BASE (0xdeadbeef)
-+#define BCM_6318_GPIO_BASE (0xb0000080)
-+#define BCM_6318_SPI_BASE (0xdeadbeef)
-+#define BCM_6318_HSSPI_BASE (0xb0003000)
-+#define BCM_6318_UDC0_BASE (0xdeadbeef)
-+#define BCM_6318_USBDMA_BASE (0xb0006800)
-+#define BCM_6318_OHCI0_BASE (0xb0005100)
-+#define BCM_6318_OHCI_PRIV_BASE (0xdeadbeef)
-+#define BCM_6318_USBH_PRIV_BASE (0xb0005200)
-+#define BCM_6318_USBD_BASE (0xb0006000)
-+#define BCM_6318_MPI_BASE (0xdeadbeef)
-+#define BCM_6318_PCMCIA_BASE (0xdeadbeef)
-+#define BCM_6318_PCIE_BASE (0xb0010000)
-+#define BCM_6318_SDRAM_REGS_BASE (0xdeadbeef)
-+#define BCM_6318_DSL_BASE (0xdeadbeef)
-+#define BCM_6318_UBUS_BASE (0xdeadbeef)
-+#define BCM_6318_ENET0_BASE (0xdeadbeef)
-+#define BCM_6318_ENET1_BASE (0xdeadbeef)
-+#define BCM_6318_ENETDMA_BASE (0xb0088000)
-+#define BCM_6318_ENETDMAC_BASE (0xb0088200)
-+#define BCM_6318_ENETDMAS_BASE (0xb0088400)
-+#define BCM_6318_ENETSW_BASE (0xb0080000)
-+#define BCM_6318_EHCI0_BASE (0xb0005000)
-+#define BCM_6318_SDRAM_BASE (0xb0004000)
-+#define BCM_6318_MEMC_BASE (0xdeadbeef)
-+#define BCM_6318_DDR_BASE (0xdeadbeef)
-+#define BCM_6318_M2M_BASE (0xdeadbeef)
-+#define BCM_6318_ATM_BASE (0xdeadbeef)
-+#define BCM_6318_XTM_BASE (0xdeadbeef)
-+#define BCM_6318_XTMDMA_BASE (0xb000c000)
-+#define BCM_6318_XTMDMAC_BASE (0xdeadbeef)
-+#define BCM_6318_XTMDMAS_BASE (0xdeadbeef)
-+#define BCM_6318_PCM_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMA_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMAC_BASE (0xdeadbeef)
-+#define BCM_6318_PCMDMAS_BASE (0xdeadbeef)
-+#define BCM_6318_RNG_BASE (0xdeadbeef)
-+#define BCM_6318_MISC_BASE (0xb0000280)
-+#define BCM_6318_OTP_BASE (0xdeadbeef)
-+
-+#define BCM_6318_STRAP_BASE (0xb0000900)
-+
-+/*
- * 6328 register sets base address
- */
- #define BCM_6328_DSL_LMEM_BASE (0xdeadbeef)
-@@ -775,6 +833,55 @@ enum bcm63xx_irq {
- #define BCM_3368_EXT_IRQ2 (IRQ_INTERNAL_BASE + 27)
- #define BCM_3368_EXT_IRQ3 (IRQ_INTERNAL_BASE + 28)
-
-+/*
-+ * 6318 irqs
-+ */
-+#define BCM_6318_HIGH_IRQ_BASE (IRQ_INTERNAL_BASE + 32)
-+#define BCM_6318_VERY_HIGH_IRQ_BASE (BCM_6318_HIGH_IRQ_BASE + 32)
-+
-+#define BCM_6318_TIMER_IRQ (IRQ_INTERNAL_BASE + 31)
-+#define BCM_6318_SPI_IRQ 0
-+#define BCM_6318_UART0_IRQ (IRQ_INTERNAL_BASE + 28)
-+#define BCM_6318_UART1_IRQ 0
-+#define BCM_6318_DSL_IRQ (IRQ_INTERNAL_BASE + 21)
-+#define BCM_6318_UDC0_IRQ 0
-+#define BCM_6318_ENET0_IRQ 0
-+#define BCM_6318_ENET1_IRQ 0
-+#define BCM_6318_ENET_PHY_IRQ (IRQ_INTERNAL_BASE + 12)
-+#define BCM_6318_HSSPI_IRQ (IRQ_INTERNAL_BASE + 29)
-+#define BCM_6318_OHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 9)
-+#define BCM_6318_EHCI0_IRQ (BCM_6318_HIGH_IRQ_BASE + 10)
-+#define BCM_6318_USBD_IRQ (IRQ_INTERNAL_BASE + 4)
-+#define BCM_6318_USBD_RXDMA0_IRQ (IRQ_INTERNAL_BASE + 5)
-+#define BCM_6318_USBD_TXDMA0_IRQ (IRQ_INTERNAL_BASE + 6)
-+#define BCM_6318_USBD_RXDMA1_IRQ (IRQ_INTERNAL_BASE + 7)
-+#define BCM_6318_USBD_TXDMA1_IRQ (IRQ_INTERNAL_BASE + 8)
-+#define BCM_6318_USBD_RXDMA2_IRQ (IRQ_INTERNAL_BASE + 9)
-+#define BCM_6318_USBD_TXDMA2_IRQ (IRQ_INTERNAL_BASE + 10)
-+#define BCM_6318_PCMCIA_IRQ 0
-+#define BCM_6318_ENET0_RXDMA_IRQ 0
-+#define BCM_6318_ENET0_TXDMA_IRQ 0
-+#define BCM_6318_ENET1_RXDMA_IRQ 0
-+#define BCM_6318_ENET1_TXDMA_IRQ 0
-+#define BCM_6318_PCI_IRQ (IRQ_INTERNAL_BASE + 23)
-+#define BCM_6318_ATM_IRQ 0
-+#define BCM_6318_ENETSW_RXDMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 0)
-+#define BCM_6318_ENETSW_RXDMA1_IRQ (BCM_6318_HIGH_IRQ_BASE + 1)
-+#define BCM_6318_ENETSW_RXDMA2_IRQ (BCM_6318_HIGH_IRQ_BASE + 2)
-+#define BCM_6318_ENETSW_RXDMA3_IRQ (BCM_6318_HIGH_IRQ_BASE + 3)
-+#define BCM_6318_ENETSW_TXDMA0_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 10)
-+#define BCM_6318_ENETSW_TXDMA1_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 11)
-+#define BCM_6318_ENETSW_TXDMA2_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 12)
-+#define BCM_6318_ENETSW_TXDMA3_IRQ (BCM_6318_VERY_HIGH_IRQ_BASE + 13)
-+#define BCM_6318_XTM_IRQ (BCM_6318_HIGH_IRQ_BASE + 31)
-+#define BCM_6318_XTM_DMA0_IRQ (BCM_6318_HIGH_IRQ_BASE + 11)
-+
-+#define BCM_6318_PCM_DMA0_IRQ (IRQ_INTERNAL_BASE + 2)
-+#define BCM_6318_PCM_DMA1_IRQ (IRQ_INTERNAL_BASE + 3)
-+#define BCM_6318_EXT_IRQ0 (IRQ_INTERNAL_BASE + 24)
-+#define BCM_6318_EXT_IRQ1 (IRQ_INTERNAL_BASE + 25)
-+#define BCM_6318_EXT_IRQ2 (IRQ_INTERNAL_BASE + 26)
-+#define BCM_6318_EXT_IRQ3 (IRQ_INTERNAL_BASE + 27)
-
- /*
- * 6328 irqs
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -53,6 +53,39 @@
- CKCTL_3368_EMUSB_EN | \
- CKCTL_3368_USBU_EN)
-
-+#define CKCTL_6318_ADSL_ASB_EN (1 << 0)
-+#define CKCTL_6318_USB_ASB_EN (1 << 1)
-+#define CKCTL_6318_MIPS_ASB_EN (1 << 2)
-+#define CKCTL_6318_PCIE_ASB_EN (1 << 3)
-+#define CKCTL_6318_PHYMIPS_ASB_EN (1 << 4)
-+#define CKCTL_6318_ROBOSW_ASB_EN (1 << 5)
-+#define CKCTL_6318_SAR_ASB_EN (1 << 6)
-+#define CKCTL_6318_SDR_ASB_EN (1 << 7)
-+#define CKCTL_6318_SWREG_ASB_EN (1 << 8)
-+#define CKCTL_6318_PERIPH_ASB_EN (1 << 9)
-+#define CKCTL_6318_CPUBUS160_EN (1 << 10)
-+#define CKCTL_6318_ADSL_EN (1 << 11)
-+#define CKCTL_6318_SAR125_EN (1 << 12)
-+#define CKCTL_6318_MIPS_EN (1 << 13)
-+#define CKCTL_6318_PCIE_EN (1 << 14)
-+#define CKCTL_6318_ROBOSW250_EN (1 << 16)
-+#define CKCTL_6318_ROBOSW025_EN (1 << 17)
-+#define CKCTL_6318_SDR_EN (1 << 19)
-+#define CKCTL_6318_USB_EN (1 << 20) /* both device and host */
-+#define CKCTL_6318_HSSPI_EN (1 << 25)
-+#define CKCTL_6318_PCIE25_EN (1 << 27)
-+#define CKCTL_6318_PHYMIPS_EN (1 << 28)
-+#define CKCTL_6318_ADSL_AFE_EN (1 << 29)
-+#define CKCTL_6318_ADSL_QPROC_EN (1 << 30)
-+
-+#define CKCTL_6318_ALL_SAFE_EN (CKCTL_6318_PHYMIPS_EN | \
-+ CKCTL_6318_ADSL_QPROC_EN | \
-+ CKCTL_6318_ADSL_AFE_EN | \
-+ CKCTL_6318_ADSL_EN | \
-+ CKCTL_6318_SAR_EN | \
-+ CKCTL_6318_USB_EN | \
-+ CKCTL_6318_PCIE_EN)
-+
- #define CKCTL_6328_PHYMIPS_EN (1 << 0)
- #define CKCTL_6328_ADSL_QPROC_EN (1 << 1)
- #define CKCTL_6328_ADSL_AFE_EN (1 << 2)
-@@ -260,12 +293,27 @@
- CKCTL_63268_TBUS_EN | \
- CKCTL_63268_ROBOSW250_EN)
-
-+/* UBUS Clock Control register */
-+#define PERF_UB_CKCTL_REG 0x10
-+
-+#define UB_CKCTL_6318_ADSL_EN (1 << 0)
-+#define UB_CKCTL_6318_ARB_EN (1 << 1)
-+#define UB_CKCTL_6318_MIPS_EN (1 << 2)
-+#define UB_CKCTL_6318_PCIE_EN (1 << 3)
-+#define UB_CKCTL_6318_PERIPH_EN (1 << 4)
-+#define UB_CKCTL_6318_PHYMIPS_EN (1 << 5)
-+#define UB_CKCTL_6318_ROBOSW_EN (1 << 6)
-+#define UB_CKCTL_6318_SAR_EN (1 << 7)
-+#define UB_CKCTL_6318_SDR_EN (1 << 8)
-+#define UB_CKCTL_6318_USB_EN (1 << 9)
-+
- /* System PLL Control register */
- #define PERF_SYS_PLL_CTL_REG 0x8
- #define SYS_PLL_SOFT_RESET 0x1
-
- /* Interrupt Mask register */
- #define PERF_IRQMASK_3368_REG 0xc
-+#define PERF_IRQMASK_6318_REG 0x20
- #define PERF_IRQMASK_6328_REG(x) (0x20 + (x) * 0x10)
- #define PERF_IRQMASK_6338_REG 0xc
- #define PERF_IRQMASK_6345_REG 0xc
-@@ -277,6 +325,7 @@
-
- /* Interrupt Status register */
- #define PERF_IRQSTAT_3368_REG 0x10
-+#define PERF_IRQSTAT_6318_REG 0x30
- #define PERF_IRQSTAT_6328_REG(x) (0x28 + (x) * 0x10)
- #define PERF_IRQSTAT_6338_REG 0x10
- #define PERF_IRQSTAT_6345_REG 0x10
-@@ -288,6 +337,7 @@
-
- /* External Interrupt Configuration register */
- #define PERF_EXTIRQ_CFG_REG_3368 0x14
-+#define PERF_EXTIRQ_CFG_REG_6318 0x18
- #define PERF_EXTIRQ_CFG_REG_6328 0x18
- #define PERF_EXTIRQ_CFG_REG_6338 0x14
- #define PERF_EXTIRQ_CFG_REG_6345 0x14
-@@ -322,6 +372,7 @@
-
- /* Soft Reset register */
- #define PERF_SOFTRESET_REG 0x28
-+#define PERF_SOFTRESET_6318_REG 0x10
- #define PERF_SOFTRESET_6328_REG 0x10
- #define PERF_SOFTRESET_6358_REG 0x34
- #define PERF_SOFTRESET_6362_REG 0x10
-@@ -335,6 +386,18 @@
- #define SOFTRESET_3368_USBS_MASK (1 << 11)
- #define SOFTRESET_3368_PCM_MASK (1 << 13)
-
-+#define SOFTRESET_6318_SPI_MASK (1 << 0)
-+#define SOFTRESET_6318_EPHY_MASK (1 << 1)
-+#define SOFTRESET_6318_SAR_MASK (1 << 2)
-+#define SOFTRESET_6318_ENETSW_MASK (1 << 3)
-+#define SOFTRESET_6318_USBS_MASK (1 << 4)
-+#define SOFTRESET_6318_USBH_MASK (1 << 5)
-+#define SOFTRESET_6318_PCIE_CORE_MASK (1 << 6)
-+#define SOFTRESET_6318_PCIE_MASK (1 << 7)
-+#define SOFTRESET_6318_PCIE_EXT_MASK (1 << 8)
-+#define SOFTRESET_6318_PCIE_HARD_MASK (1 << 9)
-+#define SOFTRESET_6318_ADSL_MASK (1 << 10)
-+
- #define SOFTRESET_6328_SPI_MASK (1 << 0)
- #define SOFTRESET_6328_EPHY_MASK (1 << 1)
- #define SOFTRESET_6328_SAR_MASK (1 << 2)
-@@ -506,8 +569,17 @@
- #define TIMER_IRQSTAT_TIMER1_IR_EN (1 << 9)
- #define TIMER_IRQSTAT_TIMER2_IR_EN (1 << 10)
-
-+#define TIMER_IRQMASK_6318_REG 0x0
-+#define TIMER_IRQSTAT_6318_REG 0x4
-+#define IRQSTATMASK_TIMER0 (1 << 0)
-+#define IRQSTATMASK_TIMER1 (1 << 1)
-+#define IRQSTATMASK_TIMER2 (1 << 2)
-+#define IRQSTATMASK_TIMER3 (1 << 3)
-+#define IRQSTATMASK_WDT (1 << 4)
-+
- /* Timer control register */
- #define TIMER_CTLx_REG(x) (0x4 + (x * 4))
-+#define TIMER_CTRx_6318_REG(x) (0x8 + (x * 4))
- #define TIMER_CTL0_REG 0x4
- #define TIMER_CTL1_REG 0x8
- #define TIMER_CTL2_REG 0xC
-@@ -1254,6 +1326,8 @@
- #define SDRAM_CFG_32B_MASK (1 << SDRAM_CFG_32B_SHIFT)
- #define SDRAM_CFG_BANK_SHIFT 13
- #define SDRAM_CFG_BANK_MASK (1 << SDRAM_CFG_BANK_SHIFT)
-+#define SDRAM_CFG_6318_SPACE_SHIFT 4
-+#define SDRAM_CFG_6318_SPACE_MASK (0xf << SDRAM_CFG_6318_SPACE_SHIFT)
-
- #define SDRAM_MBASE_REG 0xc
-
---- a/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/ioremap.h
-@@ -23,6 +23,7 @@ static inline int is_bcm63xx_internal_re
- if (offset >= 0xfff00000)
- return 1;
- break;
-+ case BCM6318_CPU_ID:
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM6368_CPU_ID:
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ b/arch/mips/bcm63xx/dev-hsspi.c
-@@ -35,7 +35,8 @@ static struct platform_device bcm63xx_hs
-
- int __init bcm63xx_hsspi_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_63268())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-+ !BCMCPU_IS_63268())
- return -ENODEV;
-
- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
---- a/arch/mips/bcm63xx/dev-usb-usbd.c
-+++ b/arch/mips/bcm63xx/dev-usb-usbd.c
-@@ -41,7 +41,7 @@ int __init bcm63xx_usbd_register(const s
- IRQ_USBD_RXDMA2, IRQ_USBD_TXDMA2 };
- int i;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6368())
- return 0;
-
- usbd_resources[0].start = bcm63xx_regset_address(RSET_USBD);
---- a/arch/mips/bcm63xx/dev-enet.c
-+++ b/arch/mips/bcm63xx/dev-enet.c
-@@ -184,8 +184,8 @@ static int __init register_shared(void)
- else
- shared_res[0].end += (RSET_ENETDMA_SIZE) - 1;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_6368() ||
-- BCMCPU_IS_63268())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
-+ BCMCPU_IS_6368() || BCMCPU_IS_63268())
- chan_count = 32;
- else if (BCMCPU_IS_6345())
- chan_count = 8;
-@@ -293,8 +293,8 @@ bcm63xx_enetsw_register(const struct bcm
- {
- int ret;
-
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368() &&
-- !BCMCPU_IS_63268())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-+ !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return -ENODEV;
-
- ret = register_shared();
-@@ -311,7 +311,7 @@ bcm63xx_enetsw_register(const struct bcm
-
- memcpy(bcm63xx_enetsw_device.dev.platform_data, pd, sizeof(*pd));
-
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318() || BCMCPU_IS_6328())
- enetsw_pd.num_ports = ENETSW_PORTS_6328;
- else if (BCMCPU_IS_6362() || BCMCPU_IS_6368())
- enetsw_pd.num_ports = ENETSW_PORTS_6368;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -10,6 +10,8 @@ int __init bcm63xx_gpio_init(void);
- static inline unsigned long bcm63xx_gpio_count(void)
- {
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
-+ return 50;
- case BCM6328_CPU_ID:
- return 32;
- case BCM3368_CPU_ID:
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -81,7 +81,8 @@ static struct platform_device bcm63xx_eh
-
- int __init bcm63xx_ehci_register(void)
- {
-- if (!BCMCPU_IS_6328() && !BCMCPU_IS_6358() && !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
-+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
- return 0;
-
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
+++ /dev/null
-From 4bdfacdeaf3c988c4f3256c88118893eac640b03 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 8 Dec 2013 14:17:50 +0100
-Subject: [PATCH 52/53] MIPS: BCM63XX: split PCIE reset signals
-
----
- arch/mips/bcm63xx/reset.c | 39 ++++++++++++++--------
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h | 2 ++
- arch/mips/pci/pci-bcm63xx.c | 7 ++++
- 3 files changed, 34 insertions(+), 14 deletions(-)
-
---- a/arch/mips/bcm63xx/reset.c
-+++ b/arch/mips/bcm63xx/reset.c
-@@ -29,7 +29,9 @@
- [BCM63XX_RESET_PCM] = BCM## __cpu ##_RESET_PCM, \
- [BCM63XX_RESET_MPI] = BCM## __cpu ##_RESET_MPI, \
- [BCM63XX_RESET_PCIE] = BCM## __cpu ##_RESET_PCIE, \
-- [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT,
-+ [BCM63XX_RESET_PCIE_EXT] = BCM## __cpu ##_RESET_PCIE_EXT, \
-+ [BCM63XX_RESET_PCIE_CORE] = BCM## __cpu ##_RESET_PCIE_CORE, \
-+ [BCM63XX_RESET_PCIE_HARD] = BCM## __cpu ##_RESET_PCIE_HARD,
-
- #define BCM3368_RESET_SPI SOFTRESET_3368_SPI_MASK
- #define BCM3368_RESET_ENET SOFTRESET_3368_ENET_MASK
-@@ -43,6 +45,8 @@
- #define BCM3368_RESET_MPI SOFTRESET_3368_MPI_MASK
- #define BCM3368_RESET_PCIE 0
- #define BCM3368_RESET_PCIE_EXT 0
-+#define BCM3368_RESET_PCIE_CORE 0
-+#define BCM3368_RESET_PCIE_HARD 0
-
-
- #define BCM6318_RESET_SPI SOFTRESET_6318_SPI_MASK
-@@ -55,11 +59,10 @@
- #define BCM6318_RESET_ENETSW SOFTRESET_6318_ENETSW_MASK
- #define BCM6318_RESET_PCM 0
- #define BCM6318_RESET_MPI 0
--#define BCM6318_RESET_PCIE \
-- (SOFTRESET_6318_PCIE_MASK | \
-- SOFTRESET_6318_PCIE_CORE_MASK | \
-- SOFTRESET_6318_PCIE_HARD_MASK)
-+#define BCM6318_RESET_PCIE SOFTRESET_6318_PCIE_MASK
- #define BCM6318_RESET_PCIE_EXT SOFTRESET_6318_PCIE_EXT_MASK
-+#define BCM6318_RESET_PCIE_CORE SOFTRESET_6318_PCIE_CORE_MASK
-+#define BCM6318_RESET_PCIE_HARD SOFTRESET_6318_PCIE_HARD_MASK
-
- #define BCM6328_RESET_SPI SOFTRESET_6328_SPI_MASK
- #define BCM6328_RESET_ENET 0
-@@ -71,11 +74,10 @@
- #define BCM6328_RESET_ENETSW SOFTRESET_6328_ENETSW_MASK
- #define BCM6328_RESET_PCM SOFTRESET_6328_PCM_MASK
- #define BCM6328_RESET_MPI 0
--#define BCM6328_RESET_PCIE \
-- (SOFTRESET_6328_PCIE_MASK | \
-- SOFTRESET_6328_PCIE_CORE_MASK | \
-- SOFTRESET_6328_PCIE_HARD_MASK)
-+#define BCM6328_RESET_PCIE SOFTRESET_6328_PCIE_MASK
- #define BCM6328_RESET_PCIE_EXT SOFTRESET_6328_PCIE_EXT_MASK
-+#define BCM6328_RESET_PCIE_CORE SOFTRESET_6328_PCIE_CORE_MASK
-+#define BCM6328_RESET_PCIE_HARD SOFTRESET_6328_PCIE_HARD_MASK
-
- #define BCM6338_RESET_SPI SOFTRESET_6338_SPI_MASK
- #define BCM6338_RESET_ENET SOFTRESET_6338_ENET_MASK
-@@ -89,6 +91,8 @@
- #define BCM6338_RESET_MPI 0
- #define BCM6338_RESET_PCIE 0
- #define BCM6338_RESET_PCIE_EXT 0
-+#define BCM6338_RESET_PCIE_CORE 0
-+#define BCM6338_RESET_PCIE_HARD 0
-
- #define BCM6348_RESET_SPI SOFTRESET_6348_SPI_MASK
- #define BCM6348_RESET_ENET SOFTRESET_6348_ENET_MASK
-@@ -102,6 +106,8 @@
- #define BCM6348_RESET_MPI 0
- #define BCM6348_RESET_PCIE 0
- #define BCM6348_RESET_PCIE_EXT 0
-+#define BCM6348_RESET_PCIE_CORE 0
-+#define BCM6348_RESET_PCIE_HARD 0
-
- #define BCM6358_RESET_SPI SOFTRESET_6358_SPI_MASK
- #define BCM6358_RESET_ENET SOFTRESET_6358_ENET_MASK
-@@ -115,6 +121,8 @@
- #define BCM6358_RESET_MPI SOFTRESET_6358_MPI_MASK
- #define BCM6358_RESET_PCIE 0
- #define BCM6358_RESET_PCIE_EXT 0
-+#define BCM6358_RESET_PCIE_CORE 0
-+#define BCM6358_RESET_PCIE_HARD 0
-
- #define BCM6362_RESET_SPI SOFTRESET_6362_SPI_MASK
- #define BCM6362_RESET_ENET 0
-@@ -126,9 +134,10 @@
- #define BCM6362_RESET_ENETSW SOFTRESET_6362_ENETSW_MASK
- #define BCM6362_RESET_PCM SOFTRESET_6362_PCM_MASK
- #define BCM6362_RESET_MPI 0
--#define BCM6362_RESET_PCIE (SOFTRESET_6362_PCIE_MASK | \
-- SOFTRESET_6362_PCIE_CORE_MASK)
-+#define BCM6362_RESET_PCIE SOFTRESET_6362_PCIE_MASK
- #define BCM6362_RESET_PCIE_EXT SOFTRESET_6362_PCIE_EXT_MASK
-+#define BCM6362_RESET_PCIE_CORE SOFTRESET_6362_PCIE_CORE_MASK
-+#define BCM6362_RESET_PCIE_HARD 0
-
- #define BCM6368_RESET_SPI SOFTRESET_6368_SPI_MASK
- #define BCM6368_RESET_ENET 0
-@@ -142,6 +151,8 @@
- #define BCM6368_RESET_MPI SOFTRESET_6368_MPI_MASK
- #define BCM6368_RESET_PCIE 0
- #define BCM6368_RESET_PCIE_EXT 0
-+#define BCM6368_RESET_PCIE_CORE 0
-+#define BCM6368_RESET_PCIE_HARD 0
-
- #define BCM63268_RESET_SPI SOFTRESET_63268_SPI_MASK
- #define BCM63268_RESET_ENET 0
-@@ -153,10 +164,10 @@
- #define BCM63268_RESET_ENETSW SOFTRESET_63268_ENETSW_MASK
- #define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
- #define BCM63268_RESET_MPI 0
--#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
-- SOFTRESET_63268_PCIE_CORE_MASK | \
-- SOFTRESET_63268_PCIE_HARD_MASK)
-+#define BCM63268_RESET_PCIE SOFTRESET_63268_PCIE_MASK
- #define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
-+#define BCM63268_RESET_PCIE_CORE SOFTRESET_63268_PCIE_CORE_MASK
-+#define BCM63268_RESET_PCIE_HARD SOFTRESET_63268_PCIE_HARD_MASK
-
- /*
- * core reset bits
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_reset.h
-@@ -15,6 +15,8 @@ enum bcm63xx_core_reset {
- BCM63XX_RESET_MPI,
- BCM63XX_RESET_PCIE,
- BCM63XX_RESET_PCIE_EXT,
-+ BCM63XX_RESET_PCIE_CORE,
-+ BCM63XX_RESET_PCIE_HARD,
- };
-
- void bcm63xx_core_set_reset(enum bcm63xx_core_reset, int reset);
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -135,9 +135,16 @@ static void __init bcm63xx_reset_pcie(vo
-
- /* reset the PCIe core */
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_63268()) {
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 1);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
-+ }
- mdelay(10);
-
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
- bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
- mdelay(10);
-
+++ /dev/null
-From 11a8ab8dac4ef5d0d70199843043927edce1d4db Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 15 Dec 2013 20:47:34 +0100
-Subject: [PATCH 53/53] MIPS: BCM63XX: add PCIe support for BCM6318
-
----
- arch/mips/bcm63xx/clk.c | 25 ++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 6 ++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 60 +++++++++++-
- arch/mips/pci/ops-bcm63xx.c | 16 +++-
- arch/mips/pci/pci-bcm63xx.c | 106 ++++++++++++++++++----
- 5 files changed, 184 insertions(+), 29 deletions(-)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -52,6 +52,18 @@ static void bcm_hwclock_set(u32 mask, in
- bcm_perf_writel(reg, PERF_CKCTL_REG);
- }
-
-+static void bcm_ub_hwclock_set(u32 mask, int enable)
-+{
-+ u32 reg;
-+
-+ reg = bcm_perf_readl(PERF_UB_CKCTL_REG);
-+ if (enable)
-+ reg |= mask;
-+ else
-+ reg &= ~mask;
-+ bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
-+}
-+
- /*
- * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
- */
-@@ -362,12 +374,17 @@ static struct clk clk_ipsec = {
-
- static void pcie_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_PCIE_EN, enable);
-+ bcm_hwclock_set(CKCTL_6318_PCIE25_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_PCIE_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_PCIE_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_PCIE_EN, enable);
-- else if (BCMCPU_IS_63268())
-+ } else if (BCMCPU_IS_63268()) {
- bcm_hwclock_set(CKCTL_63268_PCIE_EN, enable);
-+ }
- }
-
- static struct clk clk_pcie = {
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
-@@ -41,6 +41,12 @@
- #define BCM_CB_MEM_END_PA (BCM_CB_MEM_BASE_PA + \
- BCM_CB_MEM_SIZE - 1)
-
-+#define BCM_PCIE_MEM_BASE_PA_6318 0x10200000
-+#define BCM_PCIE_MEM_SIZE_6318 (1 * 1024 * 1024)
-+#define BCM_PCIE_MEM_END_PA_6318 (BCM_PCIE_MEM_BASE_PA_6318 + \
-+ BCM_PCIE_MEM_SIZE_6318 - 1)
-+
-+
- #define BCM_PCIE_MEM_BASE_PA_6328 0x10f00000
- #define BCM_PCIE_MEM_SIZE_6328 (1 * 1024 * 1024)
- #define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1530,6 +1530,17 @@
- * _REG relative to RSET_PCIE
- *************************************************************************/
-
-+#define PCIE_SPECIFIC_REG 0x188
-+#define SPECIFIC_ENDIAN_MODE_BAR1_SHIFT 0
-+#define SPECIFIC_ENDIAN_MODE_BAR1_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_BAR2_SHIFT 2
-+#define SPECIFIC_ENDIAN_MODE_BAR2_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_BAR3_SHIFT 4
-+#define SPECIFIC_ENDIAN_MODE_BAR3_MASK (0x3 << SPECIFIC_ENDIAN_MODE_BAR1_SHIFT)
-+#define SPECIFIC_ENDIAN_MODE_WORD_ALIGN 0
-+#define SPECIFIC_ENDIAN_MODE_HALFWORD_ALIGN 1
-+#define SPECIFIC_ENDIAN_MODE_BYTE_ALIGN 2
-+
- #define PCIE_CONFIG2_REG 0x408
- #define CONFIG2_BAR1_SIZE_EN 1
- #define CONFIG2_BAR1_SIZE_MASK 0xf
-@@ -1575,7 +1586,54 @@
- #define PCIE_RC_INT_C (1 << 2)
- #define PCIE_RC_INT_D (1 << 3)
-
--#define PCIE_DEVICE_OFFSET 0x8000
-+#define PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG 0x400c
-+#define C2P_MEM_WIN_ENDIAN_MODE_MASK 0x3
-+#define C2P_MEM_WIN_ENDIAN_NO_SWAP 0
-+#define C2P_MEM_WIN_ENDIAN_HALF_WORD_SWAP 1
-+#define C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP 2
-+#define C2P_MEM_WIN_BASE_ADDR_SHIFT 20
-+#define C2P_MEM_WIN_BASE_ADDR_MASK (0xfff << C2P_MEM_WIN_BASE_ADDR_SHIFT)
-+
-+#define PCIE_RC_BAR1_CONFIG_LO_REG 0x402c
-+#define RC_BAR_CFG_LO_SIZE_256MB 0xd
-+#define RC_BAR_CFG_LO_MATCH_ADDR_SHIFT 20
-+#define RC_BAR_CFG_LO_MATCH_ADDR_MASK (0xfff << RC_BAR_CFG_LO_MATCH_ADDR_SHIFT)
-+
-+#define PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG 0x4070
-+#define C2P_BASELIMIT_LIMIT_SHIFT 20
-+#define C2P_BASELIMIT_LIMIT_MASK (0xfff << C2P_BASELIMIT_LIMIT_SHIFT)
-+#define C2P_BASELIMIT_BASE_SHIFT 4
-+#define C2P_BASELIMIT_BASE_MASK (0xfff << C2P_BASELIMIT_BASE_SHIFT)
-+
-+#define PCIE_UBUS_BAR1_CFG_REMAP_REG 0x4088
-+#define BAR1_CFG_REMAP_OFFSET_SHIFT 20
-+#define BAR1_CFG_REMAP_OFFSET_MASK (0xfff << BAR1_CFG_REMAP_OFFSET_SHIFT)
-+#define BAR1_CFG_REMAP_ACCESS_EN 1
-+
-+#define PCIE_HARD_DEBUG_REG 0x4204
-+#define HARD_DEBUG_SERDES_IDDQ (1 << 23)
-+
-+#define PCIE_CPU_INT1_MASK_CLEAR_REG 0x830c
-+#define CPU_INT_PCIE_ERR_ATTN_CPU (1 << 0)
-+#define CPU_INT_PCIE_INTA (1 << 1)
-+#define CPU_INT_PCIE_INTB (1 << 2)
-+#define CPU_INT_PCIE_INTC (1 << 3)
-+#define CPU_INT_PCIE_INTD (1 << 4)
-+#define CPU_INT_PCIE_INTR (1 << 5)
-+#define CPU_INT_PCIE_NMI (1 << 6)
-+#define CPU_INT_PCIE_UBUS (1 << 7)
-+#define CPU_INT_IPI (1 << 8)
-+
-+#define PCIE_EXT_CFG_INDEX_REG 0x8400
-+#define EXT_CFG_FUNC_NUM_SHIFT 12
-+#define EXT_CFG_FUNC_NUM_MASK (0x7 << EXT_CFG_FUNC_NUM_SHIFT)
-+#define EXT_CFG_DEV_NUM_SHIFT 15
-+#define EXT_CFG_DEV_NUM_MASK (0xf << EXT_CFG_DEV_NUM_SHIFT)
-+#define EXT_CFG_BUS_NUM_SHIFT 20
-+#define EXT_CFG_BUS_NUM_MASK (0xff << EXT_CFG_BUS_NUM_SHIFT)
-+
-+#define PCIE_DEVICE_OFFSET_6318 0x9000
-+#define PCIE_DEVICE_OFFSET_6328 0x8000
-
- /*************************************************************************
- * _REG relative to RSET_OTP
---- a/arch/mips/pci/ops-bcm63xx.c
-+++ b/arch/mips/pci/ops-bcm63xx.c
-@@ -488,8 +488,12 @@ static int bcm63xx_pcie_read(struct pci_
- if (!bcm63xx_pcie_can_access(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
-- if (bus->number == PCIE_BUS_DEVICE)
-- reg += PCIE_DEVICE_OFFSET;
-+ if (bus->number == PCIE_BUS_DEVICE) {
-+ if (BCMCPU_IS_6318())
-+ reg += PCIE_DEVICE_OFFSET_6318;
-+ else
-+ reg += PCIE_DEVICE_OFFSET_6328;
-+ }
-
- data = bcm_pcie_readl(reg);
-
-@@ -508,8 +512,12 @@ static int bcm63xx_pcie_write(struct pci
- if (!bcm63xx_pcie_can_access(bus, devfn))
- return PCIBIOS_DEVICE_NOT_FOUND;
-
-- if (bus->number == PCIE_BUS_DEVICE)
-- reg += PCIE_DEVICE_OFFSET;
-+ if (bus->number == PCIE_BUS_DEVICE) {
-+ if (BCMCPU_IS_6318())
-+ reg += PCIE_DEVICE_OFFSET_6318;
-+ else
-+ reg += PCIE_DEVICE_OFFSET_6328;
-+ }
-
-
- data = bcm_pcie_readl(reg);
---- a/arch/mips/pci/pci-bcm63xx.c
-+++ b/arch/mips/pci/pci-bcm63xx.c
-@@ -118,7 +118,7 @@ static void bcm63xx_int_cfg_writel(u32 v
-
- void __iomem *pci_iospace_start;
-
--static void __init bcm63xx_reset_pcie(void)
-+static void __init bcm63xx_reset_pcie_gen1(void)
- {
- u32 val;
- u32 reg;
-@@ -152,20 +152,32 @@ static void __init bcm63xx_reset_pcie(vo
- mdelay(200);
- }
-
--static struct clk *pcie_clk;
--
--static int __init bcm63xx_register_pcie(void)
-+static void __init bcm63xx_reset_pcie_gen2(void)
- {
- u32 val;
-
-- /* enable clock */
-- pcie_clk = clk_get(NULL, "pcie");
-- if (IS_ERR_OR_NULL(pcie_clk))
-- return -ENODEV;
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_HARD, 0);
-
-- clk_prepare_enable(pcie_clk);
-+ /* reset the PCIe core */
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 1);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 1);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_EXT, 0);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE, 0);
-+ mdelay(10);
-+ val = bcm_pcie_readl(PCIE_HARD_DEBUG_REG);
-+ val &= ~HARD_DEBUG_SERDES_IDDQ;
-+ bcm_pcie_writel(val, PCIE_HARD_DEBUG_REG);
-+ mdelay(10);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_PCIE_CORE, 0);
-+ mdelay(200);
-+}
-
-- bcm63xx_reset_pcie();
-+static void __init bcm63xx_init_pcie_gen1(void)
-+{
-+ u32 val;
-
- /* configure the PCIe bridge */
- val = bcm_pcie_readl(PCIE_BRIDGE_OPT1_REG);
-@@ -190,6 +202,65 @@ static int __init bcm63xx_register_pcie(
- val |= OPT2_CFG_TYPE1_BD_SEL;
- bcm_pcie_writel(val, PCIE_BRIDGE_OPT2_REG);
-
-+ /* set bar0 to little endian */
-+ val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-+ val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
-+ val |= BASEMASK_REMAP_EN;
-+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
-+
-+ val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
-+ bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
-+}
-+
-+static void __init bcm63xx_init_pcie_gen2(void)
-+{
-+ u32 val;
-+
-+ bcm_pcie_writel(CPU_INT_PCIE_INTA | CPU_INT_PCIE_INTB |
-+ CPU_INT_PCIE_INTC | CPU_INT_PCIE_INTD,
-+ PCIE_CPU_INT1_MASK_CLEAR_REG);
-+
-+ val = bcm_pcie_mem_resource.end & C2P_BASELIMIT_LIMIT_MASK;
-+ val |= (bcm_pcie_mem_resource.start >> C2P_BASELIMIT_LIMIT_SHIFT) <<
-+ C2P_BASELIMIT_BASE_SHIFT;
-+
-+ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_BASELIMIT_REG);
-+
-+ /* set bar0 to little endian */
-+ val = bcm_pcie_readl(PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
-+ val |= bcm_pcie_mem_resource.start & C2P_MEM_WIN_BASE_ADDR_MASK;
-+ val |= C2P_MEM_WIN_ENDIAN_HALF_BYTE_SWAP;
-+ bcm_pcie_writel(val, PCIE_CPU_2_PCIE_MEM_WIN0_LO_REG);
-+
-+ bcm_pcie_writel(SPECIFIC_ENDIAN_MODE_BYTE_ALIGN, PCIE_SPECIFIC_REG);
-+ bcm_pcie_writel(RC_BAR_CFG_LO_SIZE_256MB, PCIE_RC_BAR1_CONFIG_LO_REG);
-+ bcm_pcie_writel(BAR1_CFG_REMAP_ACCESS_EN, PCIE_UBUS_BAR1_CFG_REMAP_REG);
-+
-+ bcm_pcie_writel(PCIE_BUS_DEVICE << EXT_CFG_BUS_NUM_SHIFT,
-+ PCIE_EXT_CFG_INDEX_REG);
-+}
-+
-+static struct clk *pcie_clk;
-+
-+static int __init bcm63xx_register_pcie(void)
-+{
-+ u32 val;
-+
-+ /* enable clock */
-+ pcie_clk = clk_get(NULL, "pcie");
-+ if (IS_ERR_OR_NULL(pcie_clk))
-+ return -ENODEV;
-+
-+ clk_prepare_enable(pcie_clk);
-+
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362() || BCMCPU_IS_63268()) {
-+ bcm63xx_reset_pcie_gen1();
-+ bcm63xx_init_pcie_gen1();
-+ } else {
-+ bcm63xx_reset_pcie_gen2();
-+ bcm63xx_init_pcie_gen2();
-+ }
-+
- /* setup class code as bridge */
- val = bcm_pcie_readl(PCIE_IDVAL3_REG);
- val &= ~IDVAL3_CLASS_CODE_MASK;
-@@ -201,15 +272,6 @@ static int __init bcm63xx_register_pcie(
- val &= ~CONFIG2_BAR1_SIZE_MASK;
- bcm_pcie_writel(val, PCIE_CONFIG2_REG);
-
-- /* set bar0 to little endian */
-- val = (bcm_pcie_mem_resource.start >> 20) << BASEMASK_BASE_SHIFT;
-- val |= (bcm_pcie_mem_resource.end >> 20) << BASEMASK_MASK_SHIFT;
-- val |= BASEMASK_REMAP_EN;
-- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_BASEMASK_REG);
--
-- val = (bcm_pcie_mem_resource.start >> 20) << REBASE_ADDR_BASE_SHIFT;
-- bcm_pcie_writel(val, PCIE_BRIDGE_BAR0_REBASE_ADDR_REG);
--
- register_pci_controller(&bcm63xx_pcie_controller);
-
- return 0;
-@@ -341,7 +403,10 @@ static int __init bcm63xx_pci_init(void)
- if (!bcm63xx_pci_enabled)
- return -ENODEV;
-
-- if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
-+ if (BCMCPU_IS_6318()) {
-+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6318;
-+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6318;
-+ } if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
- bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
- bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
- } else if (BCMCPU_IS_63268()) {
-@@ -350,6 +415,7 @@ static int __init bcm63xx_pci_init(void)
- }
-
- switch (bcm63xx_get_cpu_id()) {
-+ case BCM6318_CPU_ID:
- case BCM6328_CPU_ID:
- case BCM6362_CPU_ID:
- case BCM63268_CPU_ID:
+++ /dev/null
-From 9a97177b907330971aa7bf41855fafc2602e1c18 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Dec 2013 12:26:57 +0100
-Subject: [PATCH 51/56] MIPS: BCM63XX: detect flash type early and store the
- result
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 10 +++++++---
- arch/mips/bcm63xx/prom.c | 4 ++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 3 files changed, 13 insertions(+), 3 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -22,6 +22,8 @@
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-
-+static int flash_type;
-+
- static struct mtd_partition mtd_partitions[] = {
- {
- .name = "cfe",
-@@ -108,13 +110,15 @@ static int __init bcm63xx_detect_flash_t
- }
- }
-
-+void __init bcm63xx_flash_detect(void)
-+{
-+ flash_type = bcm63xx_detect_flash_type();
-+}
-+
- int __init bcm63xx_flash_register(void)
- {
-- int flash_type;
- u32 val;
-
-- flash_type = bcm63xx_detect_flash_type();
--
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
- /* read base address of boot chip select (0) */
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -17,6 +17,7 @@
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-+#include <bcm63xx_dev_flash.h>
-
- void __init prom_init(void)
- {
-@@ -52,6 +53,9 @@ void __init prom_init(void)
- reg &= ~mask;
- bcm_perf_writel(reg, PERF_CKCTL_REG);
-
-+ /* detect and setup flash access */
-+ bcm63xx_flash_detect();
-+
- /* do low level board init */
- board_prom_init();
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -8,6 +8,8 @@ enum {
- BCM63XX_FLASH_TYPE_NAND,
- };
-
-+void bcm63xx_flash_detect(void);
-+
- int __init bcm63xx_flash_register(void);
-
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From 1cacd0f7b0d35f8e3d3f8a69ecb3b5e436d6b9e8 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Dec 2013 13:25:25 +0100
-Subject: [PATCH 52/56] MIPS: BCM63XX: fixup mapped SPI flash access on boot
-
-Some bootloaders leave the flash access in an invalid state with dual
-read enabled; fix it by disabling it and falling back to simple fast
-reads.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 51 ++++++++++++++++++++++++++++++++++++
- 1 file changed, 51 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -16,6 +16,7 @@
- #include <linux/mtd/mtd.h>
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/physmap.h>
-+#include <linux/mtd/spi-nor.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
-@@ -110,9 +111,59 @@ static int __init bcm63xx_detect_flash_t
- }
- }
-
-+#define HSSPI_FLASH_CTRL_REG 0x14
-+#define FLASH_CTRL_READ_OPCODE_MASK 0xff
-+#define FLASH_CTRL_ADDR_BYTES_MASK (0x3 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_2 (0 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_3 (1 << 8)
-+#define FLASH_CTRL_ADDR_BYTES_4 (2 << 8)
-+#define FLASH_CTRL_DUMMY_BYTES_SHIFT 10
-+#define FLASH_CTRL_DUMMY_BYTES_MASK (0x3 << FLASH_CTRL_DUMMY_BYTES_SHIFT)
-+#define FLASH_CTRL_MB_EN (1 << 23)
-+
- void __init bcm63xx_flash_detect(void)
- {
- flash_type = bcm63xx_detect_flash_type();
-+
-+ /* ensure flash mapping has sane values */
-+ if (flash_type == BCM63XX_FLASH_TYPE_SERIAL &&
-+ (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6362() ||
-+ BCMCPU_IS_63268())) {
-+ u32 val = bcm_rset_readl(RSET_HSSPI, HSSPI_FLASH_CTRL_REG);
-+
-+ if (val & FLASH_CTRL_MB_EN) {
-+ /* cfe might configure non working dual-io mode */
-+ val &= ~FLASH_CTRL_MB_EN;
-+ val &= ~FLASH_CTRL_READ_OPCODE_MASK;
-+ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
-+ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
-+
-+ switch (val & FLASH_CTRL_ADDR_BYTES_MASK) {
-+ case FLASH_CTRL_ADDR_BYTES_3:
-+ val |= SPINOR_OP_READ_FAST;
-+ break;
-+ case FLASH_CTRL_ADDR_BYTES_4:
-+ val |= SPINOR_OP_READ_FAST_4B;
-+ break;
-+ case FLASH_CTRL_ADDR_BYTES_2:
-+ default:
-+ pr_warn("unsupported address byte mode (%x), not fixing up\n",
-+ val & FLASH_CTRL_ADDR_BYTES_MASK);
-+ return;
-+ }
-+ } else {
-+ /* ensure dummy bytes is set to 1 for _FAST reads */
-+ u8 cmd = val & FLASH_CTRL_READ_OPCODE_MASK;
-+
-+ if (cmd != SPINOR_OP_READ_FAST && cmd != SPINOR_OP_READ_FAST_4B)
-+ return;
-+
-+ val &= ~FLASH_CTRL_DUMMY_BYTES_MASK;
-+ val |= 1 << FLASH_CTRL_DUMMY_BYTES_SHIFT;
-+ }
-+
-+ bcm_rset_writel(RSET_HSSPI, val, HSSPI_FLASH_CTRL_REG);
-+ }
- }
-
- int __init bcm63xx_flash_register(void)
+++ /dev/null
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -168,7 +168,11 @@ static struct clk clk_swpkt_usb = {
- */
- static void enetsw_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328()) {
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_ROBOSW250_EN |
-+ CKCTL_6318_ROBOSW025_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_ROBOSW_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_ROBOSW_EN, enable);
- } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_ROBOSW_EN, enable);
-@@ -220,18 +224,22 @@ static struct clk clk_pcm = {
- */
- static void usbh_set(struct clk *clk, int enable)
- {
-- if (BCMCPU_IS_6328())
-+ if (BCMCPU_IS_6318()) {
-+ bcm_hwclock_set(CKCTL_6318_USB_EN, enable);
-+ bcm_ub_hwclock_set(UB_CKCTL_6318_USB_EN, enable);
-+ } else if (BCMCPU_IS_6328()) {
- bcm_hwclock_set(CKCTL_6328_USBH_EN, enable);
-- else if (BCMCPU_IS_6348())
-+ } else if (BCMCPU_IS_6348()) {
- bcm_hwclock_set(CKCTL_6348_USBH_EN, enable);
-- else if (BCMCPU_IS_6362())
-+ } else if (BCMCPU_IS_6362()) {
- bcm_hwclock_set(CKCTL_6362_USBH_EN, enable);
-- else if (BCMCPU_IS_6368())
-+ } else if (BCMCPU_IS_6368()) {
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
-- else if (BCMCPU_IS_63268())
-+ } else if (BCMCPU_IS_63268()) {
- bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
-- else
-+ } else {
- return;
-+ }
-
- if (enable)
- msleep(100);
+++ /dev/null
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -109,6 +109,27 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
-@@ -144,6 +165,27 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_6318()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6318_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-+ reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-+ reg |= USBH_PRIV_SIM_CTRL_LADDR_SEL;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SIM_CTRL_6318_REG);
- }
-
- spin_unlock_irqrestore(&usb_priv_reg_lock, flags);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -682,6 +682,12 @@
- #define GPIO_MODE_6368_SPI_SSN4 (1 << 30)
- #define GPIO_MODE_6368_SPI_SSN5 (1 << 31)
-
-+#define GPIO_PINMUX_SEL0_6318 0x1c
-+#define GPIO_PINMUX_SEL0_GPIO13_SHIFT 26
-+#define GPIO_PINMUX_SEL0_GPIO13_MASK (0x3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_PWRON (1 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_LED (2 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-+#define GPIO_PINMUX_SEL0_GPIO13_GPIO (3 << GPIO_PINMUX_SEL0_GPIO13_SHIFT)
-
- #define GPIO_PINMUX_OTHR_REG 0x24
- #define GPIO_PINMUX_OTHR_6328_USB_SHIFT 12
-@@ -1000,6 +1006,7 @@
-
- #define USBH_PRIV_SWAP_6358_REG 0x0
- #define USBH_PRIV_SWAP_6368_REG 0x1c
-+#define USBH_PRIV_SWAP_6318_REG 0x0c
-
- #define USBH_PRIV_SWAP_USBD_SHIFT 6
- #define USBH_PRIV_SWAP_USBD_MASK (1 << USBH_PRIV_SWAP_USBD_SHIFT)
-@@ -1025,6 +1032,13 @@
- #define USBH_PRIV_SETUP_IOC_SHIFT 4
- #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
-
-+#define USBH_PRIV_SETUP_6318_REG 0x00
-+#define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
-+#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
-+#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
-+#define USBH_PRIV_SIM_CTRL_6318_REG 0x20
-+#define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
-+
-
- /*************************************************************************
- * _REG relative to RSET_USBD
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -125,6 +125,15 @@ void __init board_early_setup(const stru
- }
-
- bcm_gpio_writel(val, GPIO_MODE_REG);
-+
-+#if IS_ENABLED(CONFIG_USB)
-+ if (BCMCPU_IS_6318() && (board.has_ehci0 || board.has_ohci0)) {
-+ val = bcm_gpio_readl(GPIO_PINMUX_SEL0_6318);
-+ val &= ~GPIO_PINMUX_SEL0_GPIO13_MASK;
-+ val |= GPIO_PINMUX_SEL0_GPIO13_PWRON;
-+ bcm_gpio_writel(val, GPIO_PINMUX_SEL0_6318);
-+ }
-+#endif
- }
-
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -23,6 +23,8 @@ config BCM63XX_CPU_6318
- bool "support 6318 CPU"
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-+ select BCM63XX_EHCI
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -587,6 +587,9 @@
- #define TIMER_CTL_MONOTONIC_MASK (1 << 30)
- #define TIMER_CTL_ENABLE_MASK (1 << 31)
-
-+/* Clock reset control (63268 only) */
-+#define TIMER_CLK_RST_CTL_REG 0x2c
-+#define CLK_RST_CTL_USB_REF_CLK_EN (1 << 18)
-
- /*************************************************************************
- * _REG relative to RSET_WDT
-@@ -1534,6 +1537,11 @@
- #define STRAPBUS_63268_FCVO_SHIFT 21
- #define STRAPBUS_63268_FCVO_MASK (0xf << STRAPBUS_63268_FCVO_SHIFT)
-
-+#define MISC_IDDQ_CTRL_6328_REG 0x48
-+#define MISC_IDDQ_CTRL_63268_REG 0x4c
-+
-+#define IDDQ_CTRL_63268_USBH (1 << 4)
-+
- #define MISC_STRAPBUS_6328_REG 0x240
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -64,6 +64,26 @@ static void bcm_ub_hwclock_set(u32 mask,
- bcm_perf_writel(reg, PERF_UB_CKCTL_REG);
- }
-
-+static void bcm_misc_iddq_set(u32 mask, int enable)
-+{
-+ u32 offset;
-+ u32 reg;
-+
-+ if (BCMCPU_IS_6328() || BCMCPU_IS_6362())
-+ offset = MISC_IDDQ_CTRL_6328_REG;
-+ else if (BCMCPU_IS_63268())
-+ offset = MISC_IDDQ_CTRL_63268_REG;
-+ else
-+ return;
-+
-+ reg = bcm_misc_readl(offset);
-+ if (enable)
-+ reg &= ~mask;
-+ else
-+ reg |= mask;
-+ bcm_misc_writel(reg, offset);
-+}
-+
- /*
- * Ethernet MAC "misc" clock: dma clocks and main clock on 6348
- */
-@@ -236,7 +256,17 @@ static void usbh_set(struct clk *clk, in
- } else if (BCMCPU_IS_6368()) {
- bcm_hwclock_set(CKCTL_6368_USBH_EN, enable);
- } else if (BCMCPU_IS_63268()) {
-+ u32 reg;
-+
- bcm_hwclock_set(CKCTL_63268_USBH_EN, enable);
-+ bcm_misc_iddq_set(IDDQ_CTRL_63268_USBH, enable);
-+ bcm63xx_core_set_reset(BCM63XX_RESET_USBH, !enable);
-+ reg = bcm_timer_readl(TIMER_CLK_RST_CTL_REG);
-+ if (enable)
-+ reg |= CLK_RST_CTL_USB_REF_CLK_EN;
-+ else
-+ reg &= ~CLK_RST_CTL_USB_REF_CLK_EN;
-+ bcm_timer_writel(reg, TIMER_CLK_RST_CTL_REG);
- } else {
- return;
- }
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -1034,11 +1034,18 @@
- #define USBH_PRIV_SETUP_6368_REG 0x28
- #define USBH_PRIV_SETUP_IOC_SHIFT 4
- #define USBH_PRIV_SETUP_IOC_MASK (1 << USBH_PRIV_SETUP_IOC_SHIFT)
-+#define USBH_PRIV_SETUP_IPP_SHIFT 5
-+#define USBH_PRIV_SETUP_IPP_MASK (1 << USBH_PRIV_SETUP_IPP_SHIFT)
-
- #define USBH_PRIV_SETUP_6318_REG 0x00
-+#define USBH_PRIV_PLL_CTRL1_6368_REG 0x18
- #define USBH_PRIV_PLL_CTRL1_6318_REG 0x04
--#define USBH_PRIV_PLL_CTRL1_SUSP_EN (1 << 27)
--#define USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN (1 << 31)
-+
-+#define USBH_PRIV_PLL_CTRL1_6318_SUSP_EN (1 << 27)
-+#define USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN (1 << 31)
-+#define USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN (1 << 9)
-+#define USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY (1 << 10)
-+
- #define USBH_PRIV_SIM_CTRL_6318_REG 0x20
- #define USBH_PRIV_SIM_CTRL_LADDR_SEL (1 << 5)
-
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -73,6 +73,8 @@ config BCM63XX_CPU_63268
- bool "support 63268 CPU"
- select SYS_HAS_CPU_BMIPS4350
- select HW_HAS_PCI
-+ select BCM63XX_OHCI
-+ select BCM63XX_EHCI
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -82,7 +82,7 @@ static struct platform_device bcm63xx_eh
- int __init bcm63xx_ehci_register(void)
- {
- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
-- !BCMCPU_IS_6362() && !BCMCPU_IS_6368())
-+ !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return 0;
-
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
---- a/arch/mips/bcm63xx/usb-common.c
-+++ b/arch/mips/bcm63xx/usb-common.c
-@@ -109,9 +109,24 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_63268()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_OHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_OHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
-+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
-+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
- } else if (BCMCPU_IS_6318()) {
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-@@ -124,7 +139,7 @@ void bcm63xx_usb_priv_ohci_cfg_set(void)
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
-@@ -165,9 +180,24 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
- reg |= USBH_PRIV_SETUP_IOC_MASK;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+ } else if (BCMCPU_IS_63268()) {
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6368_REG);
-+ reg &= ~USBH_PRIV_SWAP_EHCI_ENDN_MASK;
-+ reg |= USBH_PRIV_SWAP_EHCI_DATA_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SWAP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SETUP_6368_REG);
-+ reg |= USBH_PRIV_SETUP_IOC_MASK;
-+ reg &= ~USBH_PRIV_SETUP_IPP_MASK;
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6368_REG);
-+
-+ reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6368_REG);
-+ reg &= ~(USBH_PRIV_PLL_CTRL1_63268_IDDQ_PWRDN |
-+ USBH_PRIV_PLL_CTRL1_63268_PWRDN_DELAY);
-+ bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6368_REG);
- } else if (BCMCPU_IS_6318()) {
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg |= USBH_PRIV_PLL_CTRL1_SUSP_EN;
-+ reg |= USBH_PRIV_PLL_CTRL1_6318_SUSP_EN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SWAP_6318_REG);
-@@ -180,7 +210,7 @@ void bcm63xx_usb_priv_ehci_cfg_set(void)
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_SETUP_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_PLL_CTRL1_6318_REG);
-- reg &= ~USBH_PRIV_PLL_CTRL1_IDDQ_PWRDN;
-+ reg &= ~USBH_PRIV_PLL_CTRL1_6318_IDDQ_PWRDN;
- bcm_rset_writel(RSET_USBH_PRIV, reg, USBH_PRIV_PLL_CTRL1_6318_REG);
-
- reg = bcm_rset_readl(RSET_USBH_PRIV, USBH_PRIV_SIM_CTRL_6318_REG);
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -40,6 +40,7 @@ struct board_info {
-
- /* USB config */
- struct bcm63xx_usbd_platform_data usbd;
-+ unsigned int num_usbh_ports:2;
-
- /* GPIO LEDs */
- struct gpio_led leds[5];
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ehci.h
-@@ -1,6 +1,6 @@
- #ifndef BCM63XX_DEV_USB_EHCI_H_
- #define BCM63XX_DEV_USB_EHCI_H_
-
--int bcm63xx_ehci_register(void);
-+int bcm63xx_ehci_register(unsigned int num_ports);
-
- #endif /* BCM63XX_DEV_USB_EHCI_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_usb_ohci.h
-@@ -1,6 +1,6 @@
- #ifndef BCM63XX_DEV_USB_OHCI_H_
- #define BCM63XX_DEV_USB_OHCI_H_
-
--int bcm63xx_ohci_register(void);
-+int bcm63xx_ohci_register(unsigned int num_ports);
-
- #endif /* BCM63XX_DEV_USB_OHCI_H_ */
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -165,6 +165,8 @@ static struct platform_device bcm63xx_gp
- */
- int __init board_register_devices(void)
- {
-+ int usbh_ports = 0;
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
-@@ -186,14 +188,21 @@ int __init board_register_devices(void)
- !board_get_mac_address(board.enetsw.mac_addr))
- bcm63xx_enetsw_register(&board.enetsw);
-
-+ if ((board.has_ohci0 || board.has_ehci0)) {
-+ usbh_ports = board.num_usbh_ports;
-+
-+ if (!usbh_ports || WARN_ON(usbh_ports > 1 && board.has_usbd))
-+ usbh_ports = 1;
-+ }
-+
- if (board.has_usbd)
- bcm63xx_usbd_register(&board.usbd);
-
- if (board.has_ehci0)
-- bcm63xx_ehci_register();
-+ bcm63xx_ehci_register(usbh_ports);
-
- if (board.has_ohci0)
-- bcm63xx_ohci_register();
-+ bcm63xx_ohci_register(usbh_ports);
-
- /* Generate MAC address for WLAN and register our SPROM,
- * do this after registering enet devices
---- a/arch/mips/bcm63xx/dev-usb-ehci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ehci.c
-@@ -79,12 +79,14 @@ static struct platform_device bcm63xx_eh
- },
- };
-
--int __init bcm63xx_ehci_register(void)
-+int __init bcm63xx_ehci_register(unsigned int num_ports)
- {
- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6358() &&
- !BCMCPU_IS_6362() && !BCMCPU_IS_6368() && !BCMCPU_IS_63268())
- return 0;
-
-+ bcm63xx_ehci_pdata.num_ports = num_ports;
-+
- ehci_resources[0].start = bcm63xx_regset_address(RSET_EHCI0);
- ehci_resources[0].end = ehci_resources[0].start;
- ehci_resources[0].end += RSET_EHCI_SIZE - 1;
---- a/arch/mips/bcm63xx/dev-usb-ohci.c
-+++ b/arch/mips/bcm63xx/dev-usb-ohci.c
-@@ -62,7 +62,6 @@ static struct usb_ohci_pdata bcm63xx_ohc
- .big_endian_desc = 1,
- .big_endian_mmio = 1,
- .no_big_frame_no = 1,
-- .num_ports = 1,
- .power_on = bcm63xx_ohci_power_on,
- .power_off = bcm63xx_ohci_power_off,
- .power_suspend = bcm63xx_ohci_power_off,
-@@ -80,11 +79,13 @@ static struct platform_device bcm63xx_oh
- },
- };
-
--int __init bcm63xx_ohci_register(void)
-+int __init bcm63xx_ohci_register(unsigned int num_ports)
- {
- if (BCMCPU_IS_6345() || BCMCPU_IS_6338())
- return -ENODEV;
-
-+ bcm63xx_ohci_pdata.num_ports = num_ports;
-+
- ohci_resources[0].start = bcm63xx_regset_address(RSET_OHCI0);
- ohci_resources[0].end = ohci_resources[0].start;
- ohci_resources[0].end += RSET_OHCI_SIZE - 1;
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -576,6 +576,7 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-
- .leds = {
- {
+++ /dev/null
-From 0daf361ea799fba0af5a232036d0f06cea85ad24 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Jun 2014 12:47:49 +0200
-Subject: [PATCH 42/44] MIPS: BCM63XX: allow building support for more than one
- board type
-
-Use the arguments passed to the kernel to detect being booted with
-CFE as the indicator for bcm963xx board support, allowing the
-non presence of CFE_EPTSEAL to assume a different board type.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 7 +++----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 13 +++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 6 ++++++
- 4 files changed, 23 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -1,11 +1,10 @@
- # SPDX-License-Identifier: GPL-2.0
--choice
-- prompt "Board support"
-+menu "Board support"
- depends on BCM63XX
-- default BOARD_BCM963XX
-
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
-+ default y
-
--endchoice
-+endmenu
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -686,7 +686,7 @@ static const struct board_info __initcon
- /*
- * early init callback, read nvram data from flash and checksum it
- */
--void __init board_prom_init(void)
-+void __init board_bcm963xx_init(void)
- {
- unsigned int i;
- u8 *boot_addr, *cfe;
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -13,6 +13,8 @@
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
-+#include <asm/bootinfo.h>
-+#include <asm/fw/cfe/cfe_api.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_uart.h>
-@@ -30,6 +32,8 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-
-+#include "board_common.h"
-+
- #define PFX "board: "
-
- static struct board_info board;
-@@ -80,6 +84,15 @@ const char *board_get_name(void)
- return board.name;
- }
-
-+void __init board_prom_init(void)
-+{
-+ /* detect bootloader */
-+ if (fw_arg3 == CFE_EPTSEAL)
-+ board_bcm963xx_init();
-+ else
-+ panic("unsupported bootloader detected");
-+}
-+
- static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
-
- /*
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -6,4 +6,10 @@
- void board_early_setup(const struct board_info *board,
- int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
-+#if defined(CONFIG_BOARD_BCM963XX)
-+void board_bcm963xx_init(void);
-+#else
-+static inline void board_bcm963xx_init(void) { }
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
-From 8a30097a899b975709f728666d5ad20c8b832d21 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:28:14 +0100
-Subject: [PATCH 43/44] MIPS: BCM63XX: allow board implementations to force
- flash address
-
-Allow board implementations to force the physmap address.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 19 ++++++++++++++-----
- .../mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 2 files changed, 16 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -58,6 +58,12 @@ static struct platform_device mtd_dev =
- },
- };
-
-+void __init bcm63xx_flash_force_phys_base_address(u32 start, u32 end)
-+{
-+ mtd_resources[0].start = start;
-+ mtd_resources[0].end = end;
-+}
-+
- static int __init bcm63xx_detect_flash_type(void)
- {
- u32 val;
-@@ -172,12 +178,15 @@ int __init bcm63xx_flash_register(void)
-
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
-- /* read base address of boot chip select (0) */
-- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-- val &= MPI_CSBASE_BASE_MASK;
-
-- mtd_resources[0].start = val;
-- mtd_resources[0].end = 0x1FFFFFFF;
-+ if (!mtd_resources[0].start) {
-+ /* read base address of boot chip select (0) */
-+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ val &= MPI_CSBASE_BASE_MASK;
-+
-+ mtd_resources[0].start = val;
-+ mtd_resources[0].end = 0x1FFFFFFF;
-+ }
-
- return platform_device_register(&mtd_dev);
- case BCM63XX_FLASH_TYPE_SERIAL:
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -10,6 +10,8 @@ enum {
-
- void bcm63xx_flash_detect(void);
-
-+void bcm63xx_flash_force_phys_base_address(u32 start, u32 end);
-+
- int __init bcm63xx_flash_register(void);
-
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From cc025e749a1fece61a6cc0d64bbe7b12472259cc Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:31:12 +0200
-Subject: [PATCH 01/10] MIPS: BCM63XX: move fallback sprom support into its own
- unit
-
-In preparation for enhancing it, move it into its own file. Require a
-mac address to be passed as the argument to always "reserve" the mac
-regardless of the inclusion state of SSB.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 53 ++--------------
- arch/mips/bcm63xx/sprom.c | 70 ++++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 ++
- 4 files changed, 83 insertions(+), 48 deletions(-)
- create mode 100644 arch/mips/bcm63xx/sprom.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -2,7 +2,8 @@
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o
-+ dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
-+ sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -39,44 +39,6 @@
- static struct board_info board;
-
- /*
-- * Register a sane SPROMv2 to make the on-board
-- * bcm4318 WLAN work
-- */
--#ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-- .revision = 0x02,
-- .board_rev = 0x17,
-- .country_code = 0x0,
-- .ant_available_bg = 0x3,
-- .pa0b0 = 0x15ae,
-- .pa0b1 = 0xfa85,
-- .pa0b2 = 0xfe8d,
-- .pa1b0 = 0xffff,
-- .pa1b1 = 0xffff,
-- .pa1b2 = 0xffff,
-- .gpio0 = 0xff,
-- .gpio1 = 0xff,
-- .gpio2 = 0xff,
-- .gpio3 = 0xff,
-- .maxpwr_bg = 0x004c,
-- .itssi_bg = 0x00,
-- .boardflags_lo = 0x2848,
-- .boardflags_hi = 0x0000,
--};
--
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
--{
-- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-- return 0;
-- } else {
-- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-- return -EINVAL;
-- }
--}
--#endif
--
--/*
- * return board name for /proc/cpuinfo
- */
- const char *board_get_name(void)
-@@ -179,6 +141,7 @@ static struct platform_device bcm63xx_gp
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-+ u8 mac[ETH_ALEN];
-
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-@@ -220,15 +183,10 @@ int __init board_register_devices(void)
- /* Generate MAC address for WLAN and register our SPROM,
- * do this after registering enet devices
- */
--#ifdef CONFIG_SSB_PCIHOST
-- if (!board_get_mac_address(bcm63xx_sprom.il0mac)) {
-- memcpy(bcm63xx_sprom.et0mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, bcm63xx_sprom.il0mac, ETH_ALEN);
-- if (ssb_arch_register_fallback_sprom(
-- &bcm63xx_get_fallback_sprom) < 0)
-- pr_err(PFX "failed to register fallback SPROM\n");
-- }
--#endif
-+
-+ if (board_get_mac_address(mac) ||
-+ bcm63xx_register_fallback_sprom(mac))
-+ pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
-
---- /dev/null
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -0,0 +1,70 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/platform_device.h>
-+#include <linux/ssb/ssb.h>
-+#include <bcm63xx_fallback_sprom.h>
-+#include <board_bcm963xx.h>
-+
-+#define PFX "sprom: "
-+
-+/*
-+ * Register a sane SPROMv2 to make the on-board
-+ * bcm4318 WLAN work
-+ */
-+#ifdef CONFIG_SSB_PCIHOST
-+static struct ssb_sprom bcm63xx_sprom = {
-+ .revision = 0x02,
-+ .board_rev = 0x17,
-+ .country_code = 0x0,
-+ .ant_available_bg = 0x3,
-+ .pa0b0 = 0x15ae,
-+ .pa0b1 = 0xfa85,
-+ .pa0b2 = 0xfe8d,
-+ .pa1b0 = 0xffff,
-+ .pa1b1 = 0xffff,
-+ .pa1b2 = 0xffff,
-+ .gpio0 = 0xff,
-+ .gpio1 = 0xff,
-+ .gpio2 = 0xff,
-+ .gpio3 = 0xff,
-+ .maxpwr_bg = 0x004c,
-+ .itssi_bg = 0x00,
-+ .boardflags_lo = 0x2848,
-+ .boardflags_hi = 0x0000,
-+};
-+
-+int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->bustype == SSB_BUSTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-+
-+int __init bcm63xx_register_fallback_sprom(u8 *mac)
-+{
-+ int ret = 0;
-+
-+#ifdef CONFIG_SSB_PCIHOST
-+ memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
-+
-+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
-+#endif
-+ return ret;
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -0,0 +1,6 @@
-+#ifndef __BCM63XX_FALLBACK_SPROM
-+#define __BCM63XX_FALLBACK_SPROM
-+
-+int bcm63xx_register_fallback_sprom(u8 *mac);
-+
-+#endif
+++ /dev/null
-From 9912a8b3c240a9b0af01ff496b7e8ed9e4cc5b82 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:43:49 +0200
-Subject: [PATCH 02/10] MIPS: BCM63XX: use platform data for the sprom
-
-Similar to ethernet setup, use a platform data struct for passing
-the mac. This eliminates the requirement to allocate an array on
-stack for the mac passed.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_common.c | 6 ++----
- arch/mips/bcm63xx/sprom.c | 8 ++++----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +++++++-
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 4 ++++
- 4 files changed, 17 insertions(+), 9 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -141,7 +141,6 @@ static struct platform_device bcm63xx_gp
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-- u8 mac[ETH_ALEN];
-
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-@@ -184,8 +183,8 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
-
-- if (board_get_mac_address(mac) ||
-- bcm63xx_register_fallback_sprom(mac))
-+ if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-+ bcm63xx_register_fallback_sprom(&board.fallback_sprom))
- pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -55,14 +55,14 @@ int bcm63xx_get_fallback_sprom(struct ss
- }
- #endif
-
--int __init bcm63xx_register_fallback_sprom(u8 *mac)
-+int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
- {
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-- memcpy(bcm63xx_sprom.il0mac, mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et0mac, mac, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, mac, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-
- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
- #endif
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -1,6 +1,12 @@
- #ifndef __BCM63XX_FALLBACK_SPROM
- #define __BCM63XX_FALLBACK_SPROM
-
--int bcm63xx_register_fallback_sprom(u8 *mac);
-+#include <linux/if_ether.h>
-+
-+struct fallback_sprom_data {
-+ u8 mac_addr[ETH_ALEN];
-+};
-+
-+int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
-
- #endif
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -7,6 +7,7 @@
- #include <linux/leds.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
-+#include <bcm63xx_fallback_sprom.h>
-
- /*
- * flash mapping
-@@ -50,6 +51,9 @@ struct board_info {
-
- /* External PHY reset GPIO flags from gpio.h */
- unsigned long ephy_reset_gpio_flags;
-+
-+ /* fallback sprom config */
-+ struct fallback_sprom_data fallback_sprom;
- };
-
- #endif /* ! BOARD_BCM963XX_H_ */
+++ /dev/null
-From 83131acbfb59760a19f3711c09526e191c8aad54 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:52:56 +0200
-Subject: [PATCH 03/10] MIPS: BCM63XX: make fallback sprom optional
-
-Some devices do not provide enough mac addresses to populate wifi in
-addition to ethernet.
-
-Use having pci enabled as a rough heuristic which boards should have it
-enabled.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 12 ++++++++++++
- arch/mips/bcm63xx/boards/board_common.c | 5 +++--
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 1 +
- 3 files changed, 16 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -70,6 +70,7 @@ static struct board_info __initdata boar
- .has_uart0 = 1,
- .has_pci = 1,
- .has_usbd = 0,
-+ .use_fallback_sprom = 1,
-
- .usbd = {
- .use_fullspeed = 0,
-@@ -219,6 +220,7 @@ static struct board_info __initdata boar
- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -264,6 +266,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -316,6 +319,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -370,6 +374,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -420,6 +425,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -443,6 +449,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -461,6 +468,7 @@ static struct board_info __initdata boar
-
- .has_uart0 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
- .has_ohci0 = 1,
-
- .has_enet0 = 1,
-@@ -483,6 +491,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -509,6 +518,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -561,6 +571,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
-@@ -632,6 +643,7 @@ static struct board_info __initdata boar
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-+ .use_fallback_sprom = 1,
-
- .enet0 = {
- .has_phy = 1,
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -183,8 +183,9 @@ int __init board_register_devices(void)
- * do this after registering enet devices
- */
-
-- if (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-- bcm63xx_register_fallback_sprom(&board.fallback_sprom))
-+ if (board.use_fallback_sprom &&
-+ (board_get_mac_address(board.fallback_sprom.mac_addr) ||
-+ bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
- pr_err(PFX "failed to register fallback SPROM\n");
-
- bcm63xx_spi_register();
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -33,6 +33,7 @@ struct board_info {
- unsigned int has_usbd:1;
- unsigned int has_uart0:1;
- unsigned int has_uart1:1;
-+ unsigned int use_fallback_sprom:1;
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
+++ /dev/null
-From 1cece9f7aca1f0c193edce201f77a87008c5a405 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 21:58:38 +0200
-Subject: [PATCH 04/10] MIPS: BCM63XX: allow different types of sprom
-
-Different chips require different sprom contents, so prepare for
-supplying the appropriate sprom type.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 13 ++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 5 +++++
- 2 files changed, 17 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -22,7 +22,7 @@
- * bcm4318 WLAN work
- */
- #ifdef CONFIG_SSB_PCIHOST
--static struct ssb_sprom bcm63xx_sprom = {
-+static __initconst struct ssb_sprom bcm63xx_default_sprom = {
- .revision = 0x02,
- .board_rev = 0x17,
- .country_code = 0x0,
-@@ -43,6 +43,8 @@ static struct ssb_sprom bcm63xx_sprom =
- .boardflags_hi = 0x0000,
- };
-
-+static struct ssb_sprom bcm63xx_sprom;
-+
- int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
-@@ -60,6 +62,15 @@ int __init bcm63xx_register_fallback_spr
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-+ switch (data->type) {
-+ case SPROM_DEFAULT:
-+ memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-+ sizeof(bcm63xx_sprom));
-+ break;
-+ default:
-+ return -EINVAL;
-+ }
-+
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -3,8 +3,13 @@
-
- #include <linux/if_ether.h>
-
-+enum sprom_type {
-+ SPROM_DEFAULT, /* default fallback sprom */
-+};
-+
- struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
-+ enum sprom_type type;
- };
-
- int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+++ /dev/null
-From cedee63bc73f8b7d45b8c0cba1236986812c1f83 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:16:36 +0200
-Subject: [PATCH 05/10] MIPS: BCM63XX: add support for "raw" sproms
-
-Allow using raw sprom content as templates.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 482 ++++++++++++++++++++++++++++++++++++++++++++++
- 1 file changed, 482 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -55,13 +55,492 @@ int bcm63xx_get_fallback_sprom(struct ss
- return -EINVAL;
- }
- }
-+
-+/* FIXME: use lib_sprom after submission upstream */
-+
-+/* Get the word-offset for a SSB_SPROM_XXX define. */
-+#define SPOFF(offset) ((offset) / sizeof(u16))
-+/* Helper to extract some _offset, which is one of the SSB_SPROM_XXX defines. */
-+#define SPEX16(_outvar, _offset, _mask, _shift) \
-+ out->_outvar = ((in[SPOFF(_offset)] & (_mask)) >> (_shift))
-+#define SPEX32(_outvar, _offset, _mask, _shift) \
-+ out->_outvar = ((((u32)in[SPOFF((_offset)+2)] << 16 | \
-+ in[SPOFF(_offset)]) & (_mask)) >> (_shift))
-+#define SPEX(_outvar, _offset, _mask, _shift) \
-+ SPEX16(_outvar, _offset, _mask, _shift)
-+
-+#define SPEX_ARRAY8(_field, _offset, _mask, _shift) \
-+ do { \
-+ SPEX(_field[0], _offset + 0, _mask, _shift); \
-+ SPEX(_field[1], _offset + 2, _mask, _shift); \
-+ SPEX(_field[2], _offset + 4, _mask, _shift); \
-+ SPEX(_field[3], _offset + 6, _mask, _shift); \
-+ SPEX(_field[4], _offset + 8, _mask, _shift); \
-+ SPEX(_field[5], _offset + 10, _mask, _shift); \
-+ SPEX(_field[6], _offset + 12, _mask, _shift); \
-+ SPEX(_field[7], _offset + 14, _mask, _shift); \
-+ } while (0)
-+
-+
-+static s8 r123_extract_antgain(u8 sprom_revision, const u16 *in,
-+ u16 mask, u16 shift)
-+{
-+ u16 v;
-+ u8 gain;
-+
-+ v = in[SPOFF(SSB_SPROM1_AGAIN)];
-+ gain = (v & mask) >> shift;
-+ if (gain == 0xFF)
-+ gain = 2; /* If unset use 2dBm */
-+ if (sprom_revision == 1) {
-+ /* Convert to Q5.2 */
-+ gain <<= 2;
-+ } else {
-+ /* Q5.2 Fractional part is stored in 0xC0 */
-+ gain = ((gain & 0xC0) >> 6) | ((gain & 0x3F) << 2);
-+ }
-+
-+ return (s8)gain;
-+}
-+
-+static void sprom_extract_r23(struct ssb_sprom *out, const u16 *in)
-+{
-+ SPEX(boardflags_hi, SSB_SPROM2_BFLHI, 0xFFFF, 0);
-+ SPEX(opo, SSB_SPROM2_OPO, SSB_SPROM2_OPO_VALUE, 0);
-+ SPEX(pa1lob0, SSB_SPROM2_PA1LOB0, 0xFFFF, 0);
-+ SPEX(pa1lob1, SSB_SPROM2_PA1LOB1, 0xFFFF, 0);
-+ SPEX(pa1lob2, SSB_SPROM2_PA1LOB2, 0xFFFF, 0);
-+ SPEX(pa1hib0, SSB_SPROM2_PA1HIB0, 0xFFFF, 0);
-+ SPEX(pa1hib1, SSB_SPROM2_PA1HIB1, 0xFFFF, 0);
-+ SPEX(pa1hib2, SSB_SPROM2_PA1HIB2, 0xFFFF, 0);
-+ SPEX(maxpwr_ah, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_HI, 0);
-+ SPEX(maxpwr_al, SSB_SPROM2_MAXP_A, SSB_SPROM2_MAXP_A_LO,
-+ SSB_SPROM2_MAXP_A_LO_SHIFT);
-+}
-+
-+static void sprom_extract_r123(struct ssb_sprom *out, const u16 *in)
-+{
-+ u16 loc[3];
-+
-+ if (out->revision == 3) /* rev 3 moved MAC */
-+ loc[0] = SSB_SPROM3_IL0MAC;
-+ else {
-+ loc[0] = SSB_SPROM1_IL0MAC;
-+ loc[1] = SSB_SPROM1_ET0MAC;
-+ loc[2] = SSB_SPROM1_ET1MAC;
-+ }
-+
-+ SPEX(et0phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0A, 0);
-+ SPEX(et1phyaddr, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1A,
-+ SSB_SPROM1_ETHPHY_ET1A_SHIFT);
-+ SPEX(et0mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET0M, 14);
-+ SPEX(et1mdcport, SSB_SPROM1_ETHPHY, SSB_SPROM1_ETHPHY_ET1M, 15);
-+ SPEX(board_rev, SSB_SPROM1_BINF, SSB_SPROM1_BINF_BREV, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ if (out->revision == 1)
-+ SPEX(country_code, SSB_SPROM1_BINF, SSB_SPROM1_BINF_CCODE,
-+ SSB_SPROM1_BINF_CCODE_SHIFT);
-+ SPEX(ant_available_a, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTA,
-+ SSB_SPROM1_BINF_ANTA_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM1_BINF, SSB_SPROM1_BINF_ANTBG,
-+ SSB_SPROM1_BINF_ANTBG_SHIFT);
-+ SPEX(pa0b0, SSB_SPROM1_PA0B0, 0xFFFF, 0);
-+ SPEX(pa0b1, SSB_SPROM1_PA0B1, 0xFFFF, 0);
-+ SPEX(pa0b2, SSB_SPROM1_PA0B2, 0xFFFF, 0);
-+ SPEX(pa1b0, SSB_SPROM1_PA1B0, 0xFFFF, 0);
-+ SPEX(pa1b1, SSB_SPROM1_PA1B1, 0xFFFF, 0);
-+ SPEX(pa1b2, SSB_SPROM1_PA1B2, 0xFFFF, 0);
-+ SPEX(gpio0, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM1_GPIOA, SSB_SPROM1_GPIOA_P1,
-+ SSB_SPROM1_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM1_GPIOB, SSB_SPROM1_GPIOB_P3,
-+ SSB_SPROM1_GPIOB_P3_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_A,
-+ SSB_SPROM1_MAXPWR_A_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM1_MAXPWR, SSB_SPROM1_MAXPWR_BG, 0);
-+ SPEX(itssi_a, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_A,
-+ SSB_SPROM1_ITSSI_A_SHIFT);
-+ SPEX(itssi_bg, SSB_SPROM1_ITSSI, SSB_SPROM1_ITSSI_BG, 0);
-+ SPEX(boardflags_lo, SSB_SPROM1_BFLLO, 0xFFFF, 0);
-+
-+ SPEX(alpha2[0], SSB_SPROM1_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM1_CCODE, 0x00ff, 0);
-+
-+ /* Extract the antenna gain values. */
-+ out->antenna_gain.a0 = r123_extract_antgain(out->revision, in,
-+ SSB_SPROM1_AGAIN_BG,
-+ SSB_SPROM1_AGAIN_BG_SHIFT);
-+ out->antenna_gain.a1 = r123_extract_antgain(out->revision, in,
-+ SSB_SPROM1_AGAIN_A,
-+ SSB_SPROM1_AGAIN_A_SHIFT);
-+ if (out->revision >= 2)
-+ sprom_extract_r23(out, in);
-+}
-+
-+/* Revs 4 5 and 8 have partially shared layout */
-+static void sprom_extract_r458(struct ssb_sprom *out, const u16 *in)
-+{
-+ SPEX(txpid2g[0], SSB_SPROM4_TXPID2G01,
-+ SSB_SPROM4_TXPID2G0, SSB_SPROM4_TXPID2G0_SHIFT);
-+ SPEX(txpid2g[1], SSB_SPROM4_TXPID2G01,
-+ SSB_SPROM4_TXPID2G1, SSB_SPROM4_TXPID2G1_SHIFT);
-+ SPEX(txpid2g[2], SSB_SPROM4_TXPID2G23,
-+ SSB_SPROM4_TXPID2G2, SSB_SPROM4_TXPID2G2_SHIFT);
-+ SPEX(txpid2g[3], SSB_SPROM4_TXPID2G23,
-+ SSB_SPROM4_TXPID2G3, SSB_SPROM4_TXPID2G3_SHIFT);
-+
-+ SPEX(txpid5gl[0], SSB_SPROM4_TXPID5GL01,
-+ SSB_SPROM4_TXPID5GL0, SSB_SPROM4_TXPID5GL0_SHIFT);
-+ SPEX(txpid5gl[1], SSB_SPROM4_TXPID5GL01,
-+ SSB_SPROM4_TXPID5GL1, SSB_SPROM4_TXPID5GL1_SHIFT);
-+ SPEX(txpid5gl[2], SSB_SPROM4_TXPID5GL23,
-+ SSB_SPROM4_TXPID5GL2, SSB_SPROM4_TXPID5GL2_SHIFT);
-+ SPEX(txpid5gl[3], SSB_SPROM4_TXPID5GL23,
-+ SSB_SPROM4_TXPID5GL3, SSB_SPROM4_TXPID5GL3_SHIFT);
-+
-+ SPEX(txpid5g[0], SSB_SPROM4_TXPID5G01,
-+ SSB_SPROM4_TXPID5G0, SSB_SPROM4_TXPID5G0_SHIFT);
-+ SPEX(txpid5g[1], SSB_SPROM4_TXPID5G01,
-+ SSB_SPROM4_TXPID5G1, SSB_SPROM4_TXPID5G1_SHIFT);
-+ SPEX(txpid5g[2], SSB_SPROM4_TXPID5G23,
-+ SSB_SPROM4_TXPID5G2, SSB_SPROM4_TXPID5G2_SHIFT);
-+ SPEX(txpid5g[3], SSB_SPROM4_TXPID5G23,
-+ SSB_SPROM4_TXPID5G3, SSB_SPROM4_TXPID5G3_SHIFT);
-+
-+ SPEX(txpid5gh[0], SSB_SPROM4_TXPID5GH01,
-+ SSB_SPROM4_TXPID5GH0, SSB_SPROM4_TXPID5GH0_SHIFT);
-+ SPEX(txpid5gh[1], SSB_SPROM4_TXPID5GH01,
-+ SSB_SPROM4_TXPID5GH1, SSB_SPROM4_TXPID5GH1_SHIFT);
-+ SPEX(txpid5gh[2], SSB_SPROM4_TXPID5GH23,
-+ SSB_SPROM4_TXPID5GH2, SSB_SPROM4_TXPID5GH2_SHIFT);
-+ SPEX(txpid5gh[3], SSB_SPROM4_TXPID5GH23,
-+ SSB_SPROM4_TXPID5GH3, SSB_SPROM4_TXPID5GH3_SHIFT);
-+}
-+
-+static void sprom_extract_r45(struct ssb_sprom *out, const u16 *in)
-+{
-+ u16 il0mac_offset;
-+
-+ if (out->revision == 4)
-+ il0mac_offset = SSB_SPROM4_IL0MAC;
-+ else
-+ il0mac_offset = SSB_SPROM5_IL0MAC;
-+
-+ SPEX(et0phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET0A, 0);
-+ SPEX(et1phyaddr, SSB_SPROM4_ETHPHY, SSB_SPROM4_ETHPHY_ET1A,
-+ SSB_SPROM4_ETHPHY_ET1A_SHIFT);
-+ SPEX(board_rev, SSB_SPROM4_BOARDREV, 0xFFFF, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ if (out->revision == 4) {
-+ SPEX(alpha2[0], SSB_SPROM4_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM4_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM4_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM4_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM4_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM4_BFL2HI, 0xFFFF, 0);
-+ } else {
-+ SPEX(alpha2[0], SSB_SPROM5_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM5_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM5_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM5_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM5_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM5_BFL2HI, 0xFFFF, 0);
-+ }
-+ SPEX(ant_available_a, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_A,
-+ SSB_SPROM4_ANTAVAIL_A_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM4_ANTAVAIL, SSB_SPROM4_ANTAVAIL_BG,
-+ SSB_SPROM4_ANTAVAIL_BG_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_MAXP_BG_MASK, 0);
-+ SPEX(itssi_bg, SSB_SPROM4_MAXP_BG, SSB_SPROM4_ITSSI_BG,
-+ SSB_SPROM4_ITSSI_BG_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_MAXP_A_MASK, 0);
-+ SPEX(itssi_a, SSB_SPROM4_MAXP_A, SSB_SPROM4_ITSSI_A,
-+ SSB_SPROM4_ITSSI_A_SHIFT);
-+ if (out->revision == 4) {
-+ SPEX(gpio0, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM4_GPIOA, SSB_SPROM4_GPIOA_P1,
-+ SSB_SPROM4_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM4_GPIOB, SSB_SPROM4_GPIOB_P3,
-+ SSB_SPROM4_GPIOB_P3_SHIFT);
-+ } else {
-+ SPEX(gpio0, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM5_GPIOA, SSB_SPROM5_GPIOA_P1,
-+ SSB_SPROM5_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM5_GPIOB, SSB_SPROM5_GPIOB_P3,
-+ SSB_SPROM5_GPIOB_P3_SHIFT);
-+ }
-+
-+ /* Extract the antenna gain values. */
-+ SPEX(antenna_gain.a0, SSB_SPROM4_AGAIN01,
-+ SSB_SPROM4_AGAIN0, SSB_SPROM4_AGAIN0_SHIFT);
-+ SPEX(antenna_gain.a1, SSB_SPROM4_AGAIN01,
-+ SSB_SPROM4_AGAIN1, SSB_SPROM4_AGAIN1_SHIFT);
-+ SPEX(antenna_gain.a2, SSB_SPROM4_AGAIN23,
-+ SSB_SPROM4_AGAIN2, SSB_SPROM4_AGAIN2_SHIFT);
-+ SPEX(antenna_gain.a3, SSB_SPROM4_AGAIN23,
-+ SSB_SPROM4_AGAIN3, SSB_SPROM4_AGAIN3_SHIFT);
-+
-+ sprom_extract_r458(out, in);
-+
-+ /* TODO - get remaining rev 4 stuff needed */
-+}
-+
-+static void sprom_extract_r8(struct ssb_sprom *out, const u16 *in)
-+{
-+ int i;
-+ u16 o;
-+ u16 pwr_info_offset[] = {
-+ SSB_SROM8_PWR_INFO_CORE0, SSB_SROM8_PWR_INFO_CORE1,
-+ SSB_SROM8_PWR_INFO_CORE2, SSB_SROM8_PWR_INFO_CORE3
-+ };
-+ BUILD_BUG_ON(ARRAY_SIZE(pwr_info_offset) !=
-+ ARRAY_SIZE(out->core_pwr_info));
-+
-+ SPEX(board_rev, SSB_SPROM8_BOARDREV, 0xFFFF, 0);
-+ SPEX(board_type, SSB_SPROM1_SPID, 0xFFFF, 0);
-+ SPEX(alpha2[0], SSB_SPROM8_CCODE, 0xff00, 8);
-+ SPEX(alpha2[1], SSB_SPROM8_CCODE, 0x00ff, 0);
-+ SPEX(boardflags_lo, SSB_SPROM8_BFLLO, 0xFFFF, 0);
-+ SPEX(boardflags_hi, SSB_SPROM8_BFLHI, 0xFFFF, 0);
-+ SPEX(boardflags2_lo, SSB_SPROM8_BFL2LO, 0xFFFF, 0);
-+ SPEX(boardflags2_hi, SSB_SPROM8_BFL2HI, 0xFFFF, 0);
-+ SPEX(ant_available_a, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_A,
-+ SSB_SPROM8_ANTAVAIL_A_SHIFT);
-+ SPEX(ant_available_bg, SSB_SPROM8_ANTAVAIL, SSB_SPROM8_ANTAVAIL_BG,
-+ SSB_SPROM8_ANTAVAIL_BG_SHIFT);
-+ SPEX(maxpwr_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_MAXP_BG_MASK, 0);
-+ SPEX(itssi_bg, SSB_SPROM8_MAXP_BG, SSB_SPROM8_ITSSI_BG,
-+ SSB_SPROM8_ITSSI_BG_SHIFT);
-+ SPEX(maxpwr_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_MAXP_A_MASK, 0);
-+ SPEX(itssi_a, SSB_SPROM8_MAXP_A, SSB_SPROM8_ITSSI_A,
-+ SSB_SPROM8_ITSSI_A_SHIFT);
-+ SPEX(maxpwr_ah, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AH_MASK, 0);
-+ SPEX(maxpwr_al, SSB_SPROM8_MAXP_AHL, SSB_SPROM8_MAXP_AL_MASK,
-+ SSB_SPROM8_MAXP_AL_SHIFT);
-+ SPEX(gpio0, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P0, 0);
-+ SPEX(gpio1, SSB_SPROM8_GPIOA, SSB_SPROM8_GPIOA_P1,
-+ SSB_SPROM8_GPIOA_P1_SHIFT);
-+ SPEX(gpio2, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P2, 0);
-+ SPEX(gpio3, SSB_SPROM8_GPIOB, SSB_SPROM8_GPIOB_P3,
-+ SSB_SPROM8_GPIOB_P3_SHIFT);
-+ SPEX(tri2g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI2G, 0);
-+ SPEX(tri5g, SSB_SPROM8_TRI25G, SSB_SPROM8_TRI5G,
-+ SSB_SPROM8_TRI5G_SHIFT);
-+ SPEX(tri5gl, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GL, 0);
-+ SPEX(tri5gh, SSB_SPROM8_TRI5GHL, SSB_SPROM8_TRI5GH,
-+ SSB_SPROM8_TRI5GH_SHIFT);
-+ SPEX(rxpo2g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO2G, 0);
-+ SPEX(rxpo5g, SSB_SPROM8_RXPO, SSB_SPROM8_RXPO5G,
-+ SSB_SPROM8_RXPO5G_SHIFT);
-+ SPEX(rssismf2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMF2G, 0);
-+ SPEX(rssismc2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISMC2G,
-+ SSB_SPROM8_RSSISMC2G_SHIFT);
-+ SPEX(rssisav2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_RSSISAV2G,
-+ SSB_SPROM8_RSSISAV2G_SHIFT);
-+ SPEX(bxa2g, SSB_SPROM8_RSSIPARM2G, SSB_SPROM8_BXA2G,
-+ SSB_SPROM8_BXA2G_SHIFT);
-+ SPEX(rssismf5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMF5G, 0);
-+ SPEX(rssismc5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISMC5G,
-+ SSB_SPROM8_RSSISMC5G_SHIFT);
-+ SPEX(rssisav5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_RSSISAV5G,
-+ SSB_SPROM8_RSSISAV5G_SHIFT);
-+ SPEX(bxa5g, SSB_SPROM8_RSSIPARM5G, SSB_SPROM8_BXA5G,
-+ SSB_SPROM8_BXA5G_SHIFT);
-+ SPEX(pa0b0, SSB_SPROM8_PA0B0, 0xFFFF, 0);
-+ SPEX(pa0b1, SSB_SPROM8_PA0B1, 0xFFFF, 0);
-+ SPEX(pa0b2, SSB_SPROM8_PA0B2, 0xFFFF, 0);
-+ SPEX(pa1b0, SSB_SPROM8_PA1B0, 0xFFFF, 0);
-+ SPEX(pa1b1, SSB_SPROM8_PA1B1, 0xFFFF, 0);
-+ SPEX(pa1b2, SSB_SPROM8_PA1B2, 0xFFFF, 0);
-+ SPEX(pa1lob0, SSB_SPROM8_PA1LOB0, 0xFFFF, 0);
-+ SPEX(pa1lob1, SSB_SPROM8_PA1LOB1, 0xFFFF, 0);
-+ SPEX(pa1lob2, SSB_SPROM8_PA1LOB2, 0xFFFF, 0);
-+ SPEX(pa1hib0, SSB_SPROM8_PA1HIB0, 0xFFFF, 0);
-+ SPEX(pa1hib1, SSB_SPROM8_PA1HIB1, 0xFFFF, 0);
-+ SPEX(pa1hib2, SSB_SPROM8_PA1HIB2, 0xFFFF, 0);
-+ SPEX(cck2gpo, SSB_SPROM8_CCK2GPO, 0xFFFF, 0);
-+ SPEX32(ofdm2gpo, SSB_SPROM8_OFDM2GPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5glpo, SSB_SPROM8_OFDM5GLPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5gpo, SSB_SPROM8_OFDM5GPO, 0xFFFFFFFF, 0);
-+ SPEX32(ofdm5ghpo, SSB_SPROM8_OFDM5GHPO, 0xFFFFFFFF, 0);
-+
-+ /* Extract the antenna gain values. */
-+ SPEX(antenna_gain.a0, SSB_SPROM8_AGAIN01,
-+ SSB_SPROM8_AGAIN0, SSB_SPROM8_AGAIN0_SHIFT);
-+ SPEX(antenna_gain.a1, SSB_SPROM8_AGAIN01,
-+ SSB_SPROM8_AGAIN1, SSB_SPROM8_AGAIN1_SHIFT);
-+ SPEX(antenna_gain.a2, SSB_SPROM8_AGAIN23,
-+ SSB_SPROM8_AGAIN2, SSB_SPROM8_AGAIN2_SHIFT);
-+ SPEX(antenna_gain.a3, SSB_SPROM8_AGAIN23,
-+ SSB_SPROM8_AGAIN3, SSB_SPROM8_AGAIN3_SHIFT);
-+
-+ /* Extract cores power info info */
-+ for (i = 0; i < ARRAY_SIZE(pwr_info_offset); i++) {
-+ o = pwr_info_offset[i];
-+ SPEX(core_pwr_info[i].itssi_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
-+ SSB_SPROM8_2G_ITSSI, SSB_SPROM8_2G_ITSSI_SHIFT);
-+ SPEX(core_pwr_info[i].maxpwr_2g, o + SSB_SROM8_2G_MAXP_ITSSI,
-+ SSB_SPROM8_2G_MAXP, 0);
-+
-+ SPEX(core_pwr_info[i].pa_2g[0], o + SSB_SROM8_2G_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_2g[1], o + SSB_SROM8_2G_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_2g[2], o + SSB_SROM8_2G_PA_2, ~0, 0);
-+
-+ SPEX(core_pwr_info[i].itssi_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
-+ SSB_SPROM8_5G_ITSSI, SSB_SPROM8_5G_ITSSI_SHIFT);
-+ SPEX(core_pwr_info[i].maxpwr_5g, o + SSB_SROM8_5G_MAXP_ITSSI,
-+ SSB_SPROM8_5G_MAXP, 0);
-+ SPEX(core_pwr_info[i].maxpwr_5gh, o + SSB_SPROM8_5GHL_MAXP,
-+ SSB_SPROM8_5GH_MAXP, 0);
-+ SPEX(core_pwr_info[i].maxpwr_5gl, o + SSB_SPROM8_5GHL_MAXP,
-+ SSB_SPROM8_5GL_MAXP, SSB_SPROM8_5GL_MAXP_SHIFT);
-+
-+ SPEX(core_pwr_info[i].pa_5gl[0], o + SSB_SROM8_5GL_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gl[1], o + SSB_SROM8_5GL_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gl[2], o + SSB_SROM8_5GL_PA_2, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[0], o + SSB_SROM8_5G_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[1], o + SSB_SROM8_5G_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5g[2], o + SSB_SROM8_5G_PA_2, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[0], o + SSB_SROM8_5GH_PA_0, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[1], o + SSB_SROM8_5GH_PA_1, ~0, 0);
-+ SPEX(core_pwr_info[i].pa_5gh[2], o + SSB_SROM8_5GH_PA_2, ~0, 0);
-+ }
-+
-+ /* Extract FEM info */
-+ SPEX(fem.ghz2.tssipos, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
-+ SPEX(fem.ghz2.extpa_gain, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
-+ SPEX(fem.ghz2.pdet_range, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
-+ SPEX(fem.ghz2.tr_iso, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
-+ SPEX(fem.ghz2.antswlut, SSB_SPROM8_FEM2G,
-+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
-+
-+ SPEX(fem.ghz5.tssipos, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_TSSIPOS, SSB_SROM8_FEM_TSSIPOS_SHIFT);
-+ SPEX(fem.ghz5.extpa_gain, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_EXTPA_GAIN, SSB_SROM8_FEM_EXTPA_GAIN_SHIFT);
-+ SPEX(fem.ghz5.pdet_range, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_PDET_RANGE, SSB_SROM8_FEM_PDET_RANGE_SHIFT);
-+ SPEX(fem.ghz5.tr_iso, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_TR_ISO, SSB_SROM8_FEM_TR_ISO_SHIFT);
-+ SPEX(fem.ghz5.antswlut, SSB_SPROM8_FEM5G,
-+ SSB_SROM8_FEM_ANTSWLUT, SSB_SROM8_FEM_ANTSWLUT_SHIFT);
-+
-+ SPEX(leddc_on_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_ON,
-+ SSB_SPROM8_LEDDC_ON_SHIFT);
-+ SPEX(leddc_off_time, SSB_SPROM8_LEDDC, SSB_SPROM8_LEDDC_OFF,
-+ SSB_SPROM8_LEDDC_OFF_SHIFT);
-+
-+ SPEX(txchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_TXCHAIN,
-+ SSB_SPROM8_TXRXC_TXCHAIN_SHIFT);
-+ SPEX(rxchain, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_RXCHAIN,
-+ SSB_SPROM8_TXRXC_RXCHAIN_SHIFT);
-+ SPEX(antswitch, SSB_SPROM8_TXRXC, SSB_SPROM8_TXRXC_SWITCH,
-+ SSB_SPROM8_TXRXC_SWITCH_SHIFT);
-+
-+ SPEX(opo, SSB_SPROM8_OFDM2GPO, 0x00ff, 0);
-+
-+ SPEX_ARRAY8(mcs2gpo, SSB_SPROM8_2G_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5gpo, SSB_SPROM8_5G_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5glpo, SSB_SPROM8_5GL_MCSPO, ~0, 0);
-+ SPEX_ARRAY8(mcs5ghpo, SSB_SPROM8_5GH_MCSPO, ~0, 0);
-+
-+ SPEX(rawtempsense, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_RAWTEMP,
-+ SSB_SPROM8_RAWTS_RAWTEMP_SHIFT);
-+ SPEX(measpower, SSB_SPROM8_RAWTS, SSB_SPROM8_RAWTS_MEASPOWER,
-+ SSB_SPROM8_RAWTS_MEASPOWER_SHIFT);
-+ SPEX(tempsense_slope, SSB_SPROM8_OPT_CORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE,
-+ SSB_SPROM8_OPT_CORRX_TEMP_SLOPE_SHIFT);
-+ SPEX(tempcorrx, SSB_SPROM8_OPT_CORRX, SSB_SPROM8_OPT_CORRX_TEMPCORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMPCORRX_SHIFT);
-+ SPEX(tempsense_option, SSB_SPROM8_OPT_CORRX,
-+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION,
-+ SSB_SPROM8_OPT_CORRX_TEMP_OPTION_SHIFT);
-+ SPEX(freqoffset_corr, SSB_SPROM8_HWIQ_IQSWP,
-+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR,
-+ SSB_SPROM8_HWIQ_IQSWP_FREQ_CORR_SHIFT);
-+ SPEX(iqcal_swp_dis, SSB_SPROM8_HWIQ_IQSWP,
-+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP,
-+ SSB_SPROM8_HWIQ_IQSWP_IQCAL_SWP_SHIFT);
-+ SPEX(hw_iqcal_en, SSB_SPROM8_HWIQ_IQSWP, SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL,
-+ SSB_SPROM8_HWIQ_IQSWP_HW_IQCAL_SHIFT);
-+
-+ SPEX(bw40po, SSB_SPROM8_BW40PO, ~0, 0);
-+ SPEX(cddpo, SSB_SPROM8_CDDPO, ~0, 0);
-+ SPEX(stbcpo, SSB_SPROM8_STBCPO, ~0, 0);
-+ SPEX(bwduppo, SSB_SPROM8_BWDUPPO, ~0, 0);
-+
-+ SPEX(tempthresh, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_TRESH,
-+ SSB_SPROM8_THERMAL_TRESH_SHIFT);
-+ SPEX(tempoffset, SSB_SPROM8_THERMAL, SSB_SPROM8_THERMAL_OFFSET,
-+ SSB_SPROM8_THERMAL_OFFSET_SHIFT);
-+ SPEX(phycal_tempdelta, SSB_SPROM8_TEMPDELTA,
-+ SSB_SPROM8_TEMPDELTA_PHYCAL,
-+ SSB_SPROM8_TEMPDELTA_PHYCAL_SHIFT);
-+ SPEX(temps_period, SSB_SPROM8_TEMPDELTA, SSB_SPROM8_TEMPDELTA_PERIOD,
-+ SSB_SPROM8_TEMPDELTA_PERIOD_SHIFT);
-+ SPEX(temps_hysteresis, SSB_SPROM8_TEMPDELTA,
-+ SSB_SPROM8_TEMPDELTA_HYSTERESIS,
-+ SSB_SPROM8_TEMPDELTA_HYSTERESIS_SHIFT);
-+ sprom_extract_r458(out, in);
-+
-+ /* TODO - get remaining rev 8 stuff needed */
-+}
-+
-+static int sprom_extract(struct ssb_sprom *out, const u16 *in, u16 size)
-+{
-+ memset(out, 0, sizeof(*out));
-+
-+ out->revision = in[size - 1] & 0x00FF;
-+ memset(out->et0mac, 0xFF, 6); /* preset et0 and et1 mac */
-+ memset(out->et1mac, 0xFF, 6);
-+
-+ switch (out->revision) {
-+ case 1:
-+ case 2:
-+ case 3:
-+ sprom_extract_r123(out, in);
-+ break;
-+ case 4:
-+ case 5:
-+ sprom_extract_r45(out, in);
-+ break;
-+ case 8:
-+ sprom_extract_r8(out, in);
-+ break;
-+ default:
-+ pr_warn("Unsupported SPROM revision %d detected. Will extract v1\n",
-+ out->revision);
-+ out->revision = 1;
-+ sprom_extract_r123(out, in);
-+ }
-+
-+ if (out->boardflags_lo == 0xFFFF)
-+ out->boardflags_lo = 0; /* per specs */
-+ if (out->boardflags_hi == 0xFFFF)
-+ out->boardflags_hi = 0; /* per specs */
-+
-+ return 0;
-+}
-+
-+static __initdata u16 template_sprom[220];
- #endif
-
-+
- int __init bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data)
- {
- int ret = 0;
-
- #ifdef CONFIG_SSB_PCIHOST
-+ u16 size = 0;
-+
- switch (data->type) {
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-@@ -71,6 +550,9 @@ int __init bcm63xx_register_fallback_spr
- return -EINVAL;
- }
-
-+ if (size > 0)
-+ sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
+++ /dev/null
-From 7be5bb46003295c9e04fd4e795593b2deaacd783 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:33:38 +0200
-Subject: [PATCH 06/10] MIPS: BCM63XX: add raw fallback sproms for most common
- ssb cards
-
-Add template sproms for BCM4306, BCM4318, BCM4321, BCM4322, and BCM43222.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 136 +++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 6 +
- 2 files changed, 142 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -43,6 +43,122 @@ static __initconst struct ssb_sprom bcm6
- .boardflags_hi = 0x0000,
- };
-
-+
-+static __initconst u16 bcm4306_sprom[] = {
-+ 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3034, 0x14d4,
-+ 0xfa91, 0xfe60, 0xffff, 0xffff, 0x004c, 0xffff, 0xffff, 0xffff,
-+ 0x003e, 0x0a49, 0xff02, 0x0000, 0xff10, 0xffff, 0xffff, 0x0002,
-+};
-+
-+static __initconst u16 bcm4318_sprom[] = {
-+ 0x2001, 0x0000, 0x0449, 0x14e4, 0x4318, 0x8000, 0x0002, 0x0000,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0000, 0x0000, 0x0000, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x3046, 0x15a7,
-+ 0xfab0, 0xfe97, 0xffff, 0xffff, 0x0048, 0xffff, 0xffff, 0xffff,
-+ 0x003e, 0xea49, 0xff02, 0x0000, 0xff08, 0xffff, 0xffff, 0x0002,
-+};
-+
-+static __initconst u16 bcm4321_sprom[] = {
-+ 0x3001, 0x0000, 0x046c, 0x14e4, 0x4328, 0x8000, 0x0002, 0x0000,
-+ 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x0032, 0x4a01, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x2728, 0x5b5b, 0x222b, 0x5b5b, 0x1927, 0x5b5b, 0x1e36,
-+ 0x5b5b, 0x303c, 0x3030, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x3e4c, 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0x3e4c,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x7838, 0x3a34, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0x0008, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0004,
-+};
-+
-+static __initconst u16 bcm4322_sprom[] = {
-+ 0x3001, 0x0000, 0x04bc, 0x14e4, 0x432c, 0x8000, 0x0002, 0x0000,
-+ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1209, 0x0200, 0x0000, 0x0400, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0301,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfe9a, 0x1571, 0xfabd, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfeb9, 0x159f, 0xfadd, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x3333, 0x5555, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43222_sprom[] = {
-+ 0x2001, 0x0000, 0x04d4, 0x14e4, 0x4351, 0x8000, 0x0002, 0x0000,
-+ 0x1730, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x2305, 0x0200, 0x0000, 0x2400, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204c, 0xfea6, 0x1717, 0xfa6d, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204c, 0xfeb8, 0x167c, 0xfa9e, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x3333, 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0004, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
- static struct ssb_sprom bcm63xx_sprom;
-
- int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-@@ -542,6 +658,26 @@ int __init bcm63xx_register_fallback_spr
- u16 size = 0;
-
- switch (data->type) {
-+ case SPROM_BCM4306:
-+ memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
-+ size = ARRAY_SIZE(bcm4306_sprom);
-+ break;
-+ case SPROM_BCM4318:
-+ memcpy(&template_sprom, &bcm4318_sprom, sizeof(bcm4318_sprom));
-+ size = ARRAY_SIZE(bcm4318_sprom);
-+ break;
-+ case SPROM_BCM4321:
-+ memcpy(&template_sprom, &bcm4321_sprom, sizeof(bcm4321_sprom));
-+ size = ARRAY_SIZE(bcm4321_sprom);
-+ break;
-+ case SPROM_BCM4322:
-+ memcpy(&template_sprom, &bcm4322_sprom, sizeof(bcm4322_sprom));
-+ size = ARRAY_SIZE(bcm4322_sprom);
-+ break;
-+ case SPROM_BCM43222:
-+ memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
-+ size = ARRAY_SIZE(bcm43222_sprom);
-+ break;
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -5,6 +5,12 @@
-
- enum sprom_type {
- SPROM_DEFAULT, /* default fallback sprom */
-+ /* SSB based */
-+ SPROM_BCM4306,
-+ SPROM_BCM4318,
-+ SPROM_BCM4321,
-+ SPROM_BCM4322,
-+ SPROM_BCM43222,
- };
-
- struct fallback_sprom_data {
+++ /dev/null
-From 03feb9db77fba3eef3d83e17a87a56979659b248 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 29 Jul 2014 22:48:26 +0200
-Subject: [PATCH 07/10] MIPS: BCM63XX: also register a fallback sprom for bcma
-
-Similar to SSB, register a fallback sprom handler for BCMA.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 1 +
- arch/mips/bcm63xx/sprom.c | 40 +++++++++++++++++++++++++++++++++++-----
- 2 files changed, 36 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -5,6 +5,7 @@ menu "Board support"
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
-+ select BCMA
- default y
-
- endmenu
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -12,6 +12,7 @@
- #include <linux/string.h>
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
-+#include <linux/bcma/bcma.h>
- #include <bcm63xx_fallback_sprom.h>
- #include <board_bcm963xx.h>
-
-@@ -21,7 +22,7 @@
- * Register a sane SPROMv2 to make the on-board
- * bcm4318 WLAN work
- */
--#ifdef CONFIG_SSB_PCIHOST
-+#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
- static __initconst struct ssb_sprom bcm63xx_default_sprom = {
- .revision = 0x02,
- .board_rev = 0x17,
-@@ -43,7 +44,7 @@ static __initconst struct ssb_sprom bcm6
- .boardflags_hi = 0x0000,
- };
-
--
-+#if defined (CONFIG_SSB_PCIHOST)
- static __initconst u16 bcm4306_sprom[] = {
- 0x4001, 0x0000, 0x0453, 0x14e4, 0x4320, 0x8000, 0x0002, 0x0002,
- 0x1000, 0x1800, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-@@ -158,10 +159,12 @@ static __initconst u16 bcm43222_sprom[]
- 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
- 0xffff, 0xffff, 0xffff, 0x0008,
- };
-+#endif /* CONFIG_SSB_PCIHOST */
-
- static struct ssb_sprom bcm63xx_sprom;
-
--int bcm63xx_get_fallback_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
-+#if defined(CONFIG_SSB_PCIHOST)
-+int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-@@ -171,6 +174,20 @@ int bcm63xx_get_fallback_sprom(struct ss
- return -EINVAL;
- }
- }
-+#endif
-+
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
-+{
-+ if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
-+ memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+ } else {
-+ printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-+ return -EINVAL;
-+ }
-+}
-+#endif
-
- /* FIXME: use lib_sprom after submission upstream */
-
-@@ -654,10 +671,11 @@ int __init bcm63xx_register_fallback_spr
- {
- int ret = 0;
-
--#ifdef CONFIG_SSB_PCIHOST
-+#if defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI)
- u16 size = 0;
-
- switch (data->type) {
-+#if defined(CONFIG_SSB_PCIHOST)
- case SPROM_BCM4306:
- memcpy(&template_sprom, &bcm4306_sprom, sizeof(bcm4306_sprom));
- size = ARRAY_SIZE(bcm4306_sprom);
-@@ -678,6 +696,7 @@ int __init bcm63xx_register_fallback_spr
- memcpy(&template_sprom, &bcm43222_sprom, sizeof(bcm43222_sprom));
- size = ARRAY_SIZE(bcm43222_sprom);
- break;
-+#endif
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
-@@ -692,8 +711,19 @@ int __init bcm63xx_register_fallback_spr
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-+#endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
-+
-+#if defined(CONFIG_SSB_PCIHOST)
-+ ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_ssb_sprom);
-+ if (ret)
-+ return ret;
-+
-+#endif
-
-- ret = ssb_arch_register_fallback_sprom(&bcm63xx_get_fallback_sprom);
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+ ret = bcma_arch_register_fallback_sprom(bcm63xx_get_fallback_bcma_sprom);
-+ if (ret)
-+ return ret;
- #endif
- return ret;
- }
+++ /dev/null
-From 27bf70e3fe797691b17df07ecbfaf9f5a4419f49 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 30 Jul 2014 23:14:27 +0200
-Subject: [PATCH 08/10] MIPS: BCM63XX: add BCMA based sprom templates
-
-Add fallback sproms for BCM4313, BCM43131, BCM43217, BCM43225, BCM43227,
-BCM43228, and BCM4331.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 256 +++++++++++++++++++++
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 +
- 2 files changed, 264 insertions(+)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -161,6 +161,226 @@ static __initconst u16 bcm43222_sprom[]
- };
- #endif /* CONFIG_SSB_PCIHOST */
-
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+static __initconst u16 bcm4313_sprom[] = {
-+ 0x2801, 0x0000, 0x0510, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4727, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1215, 0x2a00, 0x0800, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0011, 0x007a, 0x0000, 0x0000, 0x0000, 0x0000, 0x0201,
-+ 0x0000, 0x7800, 0x7c0a, 0x0398, 0x0008, 0x0000, 0x0000, 0x0000,
-+ 0x0044, 0x1684, 0xfd0d, 0xff35, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0048, 0xfed2, 0x15d9, 0xfac6, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0008,
-+};
-+
-+static __initconst u16 bcm43131_sprom[] = {
-+ 0x2801, 0x0000, 0x05f7, 0x14e4, 0x0070, 0xedbe, 0x1c00, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x43aa, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1280, 0x0200, 0x0000, 0x8800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0002, 0x0202,
-+ 0xffff, 0x0022, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43217_sprom[] = {
-+ 0x2801, 0x0000, 0x05e9, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x43a9, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1252, 0x0200, 0x0000, 0x9800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe96, 0x192c, 0xfa15, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfe91, 0x1950, 0xfa0a, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x7a08,
-+};
-+
-+static __initconst u16 bcm43225_sprom[] = {
-+ 0x2801, 0x0000, 0x04da, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0x1008, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x4357, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1200, 0x0200, 0x0000, 0x1000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x88ff, 0xffff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0xffff, 0x7800, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204e, 0xfead, 0x1611, 0xfa9a, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x204e, 0xfec1, 0x1674, 0xfab2, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x5555, 0x5555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555, 0x7555, 0x5555,
-+ 0x7555, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0002, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43227_sprom[] = {
-+ 0x2801, 0x0000, 0x0543, 0x14e4, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4358, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1402, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0003, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0415,
-+ 0x0000, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xff36, 0x16d2, 0xfaae, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xfeca, 0x159b, 0xfa80, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x6666, 0x6666, 0x6666,
-+ 0x6666, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0008,
-+};
-+
-+static __initconst u16 bcm43228_sprom[] = {
-+ 0x2801, 0x0000, 0x0011, 0x1028, 0x0070, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x1008, 0x0305, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x4359, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x5372, 0x1203, 0x0200, 0x0000, 0x0800, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0003, 0xffff, 0x88ff, 0xffff, 0x0303, 0x0202,
-+ 0xffff, 0x0033, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0215,
-+ 0x0215, 0x7800, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x204c, 0xff73, 0x1762, 0xfaa4, 0x3e34, 0x3434, 0xfea1, 0x154c,
-+ 0xfad0, 0xfea1, 0x144c, 0xfafb, 0xfe7b, 0x13fe, 0xfafc, 0x0000,
-+ 0x204c, 0xff41, 0x16a3, 0xfa8f, 0x3e34, 0x3434, 0xfe97, 0x1446,
-+ 0xfb05, 0xfe97, 0x1346, 0xfb32, 0xfeb9, 0x1516, 0xfaee, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x4444, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x4444, 0x4444, 0x4444, 0x4444, 0x8888, 0x8888, 0x8888,
-+ 0x8888, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0x3333, 0x3333, 0x3333,
-+ 0x3333, 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xf008,
-+};
-+
-+static __initconst u16 bcm4331_sprom[] = {
-+ 0x2801, 0x0000, 0x0525, 0x14e4, 0x0078, 0xedbe, 0x0000, 0x2bc4,
-+ 0x2a64, 0x2964, 0x2c64, 0x3ce7, 0x46ff, 0x47ff, 0x0c00, 0x0820,
-+ 0x0030, 0x1002, 0x9f28, 0x5d44, 0x8080, 0x1d8f, 0x0032, 0x0100,
-+ 0xdf00, 0x71f5, 0x8400, 0x0083, 0x8500, 0x2010, 0x0001, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0x1010, 0x0005, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x4331, 0x8000, 0x0002, 0x0000, 0x1f30, 0x1800, 0x0000, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x5372, 0x1104, 0x0200, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0xffff, 0x88ff, 0xffff, 0x0707, 0x0202,
-+ 0xff02, 0x0077, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0x0325,
-+ 0x0325, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x2048, 0xfe56, 0x16f2, 0xfa44, 0x3e3c, 0x3c3c, 0xfe77, 0x1657,
-+ 0xfa75, 0xffff, 0xffff, 0xffff, 0xfe76, 0x15da, 0xfa85, 0x0000,
-+ 0x2048, 0xfe5c, 0x16b5, 0xfa56, 0x3e3c, 0x3c3c, 0xfe7c, 0x169d,
-+ 0xfa6b, 0xffff, 0xffff, 0xffff, 0xfe7a, 0x1597, 0xfa97, 0x0000,
-+ 0x2048, 0xfe68, 0x1734, 0xfa46, 0x3e3c, 0x3c3c, 0xfe7f, 0x15e4,
-+ 0xfa94, 0xffff, 0xffff, 0xffff, 0xfe7d, 0x1582, 0xfa9f, 0x0000,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000, 0x0000,
-+ 0x0000, 0x0000, 0x0000, 0x0000, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff, 0xffff,
-+ 0xffff, 0xffff, 0xffff, 0x0009,
-+};
-+
-+#endif /* CONFIG_BCMA_HOST_PCI */
-+
- static struct ssb_sprom bcm63xx_sprom;
-
- #if defined(CONFIG_SSB_PCIHOST)
-@@ -697,6 +917,42 @@ int __init bcm63xx_register_fallback_spr
- size = ARRAY_SIZE(bcm43222_sprom);
- break;
- #endif
-+#if defined(CONFIG_BCMA_HOST_PCI)
-+ case SPROM_BCM4313:
-+ memcpy(&template_sprom, &bcm4313_sprom,
-+ sizeof(bcm4313_sprom));
-+ size = ARRAY_SIZE(bcm4313_sprom);
-+ break;
-+ case SPROM_BCM43131:
-+ memcpy(&template_sprom, &bcm43131_sprom,
-+ sizeof(bcm43131_sprom));
-+ size = ARRAY_SIZE(bcm43131_sprom);
-+ break;
-+ case SPROM_BCM43217:
-+ memcpy(&template_sprom, &bcm43217_sprom,
-+ sizeof(bcm43217_sprom));
-+ size = ARRAY_SIZE(bcm43217_sprom);
-+ break;
-+ case SPROM_BCM43225:
-+ memcpy(&template_sprom, &bcm43225_sprom,
-+ sizeof(bcm43225_sprom));
-+ size = ARRAY_SIZE(bcm43225_sprom);
-+ break;
-+ case SPROM_BCM43227:
-+ memcpy(&template_sprom, &bcm43227_sprom,
-+ sizeof(bcm43227_sprom));
-+ size = ARRAY_SIZE(bcm43227_sprom);
-+ break;
-+ case SPROM_BCM43228:
-+ memcpy(&template_sprom, &bcm43228_sprom,
-+ sizeof(bcm43228_sprom));
-+ size = ARRAY_SIZE(bcm43228_sprom);
-+ break;
-+ case SPROM_BCM4331:
-+ memcpy(&template_sprom, &bcm4331_sprom, sizeof(&bcm4331_sprom));
-+ size = ARRAY_SIZE(bcm4331_sprom);
-+ break;
-+#endif
- case SPROM_DEFAULT:
- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
- sizeof(bcm63xx_sprom));
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -11,6 +11,14 @@ enum sprom_type {
- SPROM_BCM4321,
- SPROM_BCM4322,
- SPROM_BCM43222,
-+ /* BCMA based */
-+ SPROM_BCM4313,
-+ SPROM_BCM43131,
-+ SPROM_BCM43217,
-+ SPROM_BCM43225,
-+ SPROM_BCM43227,
-+ SPROM_BCM43228,
-+ SPROM_BCM4331,
- };
-
- struct fallback_sprom_data {
+++ /dev/null
-From 8575548b08e33c9ff4fd540abec09dd177e33682 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 31 Jul 2014 19:12:33 +0200
-Subject: [PATCH 09/10] MIPS: BCM63XX: allow board files to provide sprom
- fixups
-
-Allow board_info files to supply fixups for the base sproms to adapt
-them to the actual used sprom contents in case they do not use the
-default ones.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 14 +++++++++++++-
- .../mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 8 ++++++++
- 2 files changed, 21 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -883,6 +883,14 @@ static int sprom_extract(struct ssb_spro
- return 0;
- }
-
-+void sprom_apply_fixups(u16 *sprom, struct sprom_fixup *fixups, int n)
-+{
-+ unsigned int i;
-+
-+ for (i = 0; i < n; i++)
-+ sprom[fixups[i].offset] = fixups[i].value;
-+}
-+
- static __initdata u16 template_sprom[220];
- #endif
-
-@@ -961,8 +969,12 @@ int __init bcm63xx_register_fallback_spr
- return -EINVAL;
- }
-
-- if (size > 0)
-+ if (size > 0) {
-+ sprom_apply_fixups(template_sprom, data->board_fixups,
-+ data->num_board_fixups);
-+
- sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+ }
-
- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -21,9 +21,17 @@ enum sprom_type {
- SPROM_BCM4331,
- };
-
-+struct sprom_fixup {
-+ u16 offset;
-+ u16 value;
-+};
-+
- struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
- enum sprom_type type;
-+
-+ struct sprom_fixup *board_fixups;
-+ unsigned int num_board_fixups;
- };
-
- int bcm63xx_register_fallback_sprom(struct fallback_sprom_data *data);
+++ /dev/null
-From f393eaacf178e7e8a61eb11a96edd7dfb35cb49d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 31 Jul 2014 20:39:44 +0200
-Subject: [PATCH 10/10] MIPS: BCM63XX: allow setting a pci bus/device for
- fallback sprom
-
-Warn if the set pci bus/slot does not match the actual request.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/sprom.c | 31 ++++++++++++++++++----
- .../asm/mach-bcm63xx/bcm63xx_fallback_sprom.h | 3 +++
- 2 files changed, 29 insertions(+), 5 deletions(-)
-
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -381,13 +381,25 @@ static __initconst u16 bcm4331_sprom[] =
-
- #endif /* CONFIG_BCMA_HOST_PCI */
-
--static struct ssb_sprom bcm63xx_sprom;
-+struct fallback_sprom_match {
-+ u8 pci_bus;
-+ u8 pci_dev;
-+ struct ssb_sprom sprom;
-+};
-+
-+static struct fallback_sprom_match fallback_sprom;
-
- #if defined(CONFIG_SSB_PCIHOST)
- int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
- {
- if (bus->bustype == SSB_BUSTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
-+ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
-+ pr_warn("ssb_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ bus->host_pci->bus->number,
-+ PCI_SLOT(bus->host_pci->devfn));
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
- return 0;
- } else {
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-@@ -400,7 +412,13 @@ int bcm63xx_get_fallback_ssb_sprom(struc
- int bcm63xx_get_fallback_bcma_sprom(struct bcma_bus *bus, struct ssb_sprom *out)
- {
- if (bus->hosttype == BCMA_HOSTTYPE_PCI) {
-- memcpy(out, &bcm63xx_sprom, sizeof(struct ssb_sprom));
-+ if (bus->host_pci->bus->number != fallback_sprom.pci_bus ||
-+ PCI_SLOT(bus->host_pci->devfn) != fallback_sprom.pci_dev)
-+ pr_warn("bcma_fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ bus->host_pci->bus->number,
-+ PCI_SLOT(bus->host_pci->devfn));
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
- return 0;
- } else {
- printk(KERN_ERR PFX "unable to fill SPROM for given bustype.\n");
-@@ -962,8 +980,8 @@ int __init bcm63xx_register_fallback_spr
- break;
- #endif
- case SPROM_DEFAULT:
-- memcpy(&bcm63xx_sprom, &bcm63xx_default_sprom,
-- sizeof(bcm63xx_sprom));
-+ memcpy(&fallback_sprom.sprom, &bcm63xx_default_sprom,
-+ sizeof(bcm63xx_default_sprom));
- break;
- default:
- return -EINVAL;
-@@ -973,12 +991,15 @@ int __init bcm63xx_register_fallback_spr
- sprom_apply_fixups(template_sprom, data->board_fixups,
- data->num_board_fixups);
-
-- sprom_extract(&bcm63xx_sprom, template_sprom, size);
-+ sprom_extract(&fallback_sprom.sprom, template_sprom, size);
- }
-
-- memcpy(bcm63xx_sprom.il0mac, data->mac_addr, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et0mac, data->mac_addr, ETH_ALEN);
-- memcpy(bcm63xx_sprom.et1mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.il0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.et0mac, data->mac_addr, ETH_ALEN);
-+ memcpy(fallback_sprom.sprom.et1mac, data->mac_addr, ETH_ALEN);
-+
-+ fallback_sprom.pci_bus = data->pci_bus;
-+ fallback_sprom.pci_dev = data->pci_dev;
- #endif /* defined(CONFIG_SSB_PCIHOST) || defined(CONFIG_BCMA_HOST_PCI) */
-
- #if defined(CONFIG_SSB_PCIHOST)
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_fallback_sprom.h
-@@ -30,6 +30,9 @@ struct fallback_sprom_data {
- u8 mac_addr[ETH_ALEN];
- enum sprom_type type;
-
-+ u8 pci_bus;
-+ u8 pci_dev;
-+
- struct sprom_fixup *board_fixups;
- unsigned int num_board_fixups;
- };
+++ /dev/null
-From 26546e5499d98616322fb3472b977e2e86603f3a Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Tue, 24 Jun 2014 10:57:51 +0200
-Subject: [PATCH 45/48] MIPS: BCM63XX: add support for loading DTB
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/Kconfig | 4 ++++
- arch/mips/bcm63xx/boards/board_common.c | 34 +++++++++++++++++++++++++++++++
- arch/mips/bcm63xx/prom.c | 6 ++++++
- 3 files changed, 44 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -2,6 +2,10 @@
- menu "Board support"
- depends on BCM63XX
-
-+config BOARD_BCM63XX_DT
-+ bool "Device Tree boards (experimential)"
-+ select USE_OF
-+
- config BOARD_BCM963XX
- bool "Generic Broadcom 963xx boards"
- select SSB
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -10,11 +10,14 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
-+#include <linux/of_fdt.h>
-+#include <linux/of_platform.h>
- #include <linux/platform_device.h>
- #include <linux/ssb/ssb.h>
- #include <asm/addrspace.h>
- #include <asm/bootinfo.h>
- #include <asm/fw/cfe/cfe_api.h>
-+#include <asm/prom.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_uart.h>
-@@ -125,8 +128,23 @@ void __init board_setup(void)
- /* make sure we're running on expected cpu */
- if (bcm63xx_get_cpu_id() != board.expected_cpu_id)
- panic("unexpected CPU for bcm963xx board");
-+
-+#if CONFIG_OF
-+ if (initial_boot_params)
-+ __dt_setup_arch(initial_boot_params);
-+#endif
- }
-
-+#if CONFIG_OF
-+void __init device_tree_init(void)
-+{
-+ if (!initial_boot_params)
-+ return;
-+
-+ unflatten_and_copy_device_tree();
-+}
-+#endif
-+
- static struct gpio_led_platform_data bcm63xx_led_data;
-
- static struct platform_device bcm63xx_gpio_leds = {
-@@ -135,6 +153,13 @@ static struct platform_device bcm63xx_gp
- .dev.platform_data = &bcm63xx_led_data,
- };
-
-+#if CONFIG_OF
-+static struct of_device_id of_ids[] = {
-+ { /* filled at runtime */ },
-+ { .compatible = "simple-bus" },
-+ { },
-+};
-+#endif
- /*
- * third stage init callback, register all board devices.
- */
-@@ -142,6 +167,15 @@ int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-
-+#if CONFIG_OF
-+ if (of_have_populated_dt()) {
-+ snprintf(of_ids[0].compatible, sizeof(of_ids[0].compatible),
-+ "brcm,bcm%x", bcm63xx_get_cpu_id());
-+
-+ of_platform_populate(NULL, of_ids, NULL, NULL);
-+ }
-+#endif
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
---- a/arch/mips/bcm63xx/prom.c
-+++ b/arch/mips/bcm63xx/prom.c
-@@ -8,6 +8,7 @@
-
- #include <linux/init.h>
- #include <linux/bootmem.h>
-+#include <linux/of_fdt.h>
- #include <linux/smp.h>
- #include <asm/bootinfo.h>
- #include <asm/bmips.h>
-@@ -23,6 +24,11 @@ void __init prom_init(void)
- {
- u32 reg, mask;
-
-+#if CONFIG_OF
-+ if (fw_passed_dtb)
-+ early_init_dt_verify((void *)fw_passed_dtb);
-+#endif
-+
- bcm63xx_cpu_init();
-
- /* stop any running watchdog */
+++ /dev/null
-From 25bf2b5836c892f091651d8a3384c9c57ce1b400 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Thu, 26 Jun 2014 12:51:00 +0200
-Subject: [PATCH 46/48] MIPS: BCM63XX: add support for matching the board_info
- by dtb
-
-Allow using the passed dtb's compatible property to match board_info
-structs instead of nvram's boardname field, which is not unique anyway.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 15 +++++++++++++++
- arch/mips/bcm63xx/boards/board_common.c | 18 ++++++++++++++++++
- arch/mips/bcm63xx/boards/board_common.h | 3 +++
- 3 files changed, 36 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -695,6 +695,10 @@ static const struct board_info __initcon
- #endif
- };
-
-+static struct of_device_id const bcm963xx_boards_dt[] = {
-+ { },
-+};
-+
- /*
- * early init callback, read nvram data from flash and checksum it
- */
-@@ -706,6 +710,7 @@ void __init board_bcm963xx_init(void)
- char *board_name = NULL;
- u32 val;
- struct bcm_hcs *hcs;
-+ const struct of_device_id *board_match;
-
- /* read base address of boot chip select (0)
- * 6328/6362 do not have MPI but boot from a fixed address
-@@ -745,6 +750,16 @@ void __init board_bcm963xx_init(void)
- } else {
- board_name = bcm63xx_nvram_get_name();
- }
-+
-+ /* find board by compat */
-+ board_match = bcm63xx_match_board(bcm963xx_boards_dt);
-+ if (board_match) {
-+ board_early_setup(board_match->data,
-+ bcm63xx_nvram_get_mac_address);
-+
-+ return;
-+ }
-+
- /* find board by name */
- for (i = 0; i < ARRAY_SIZE(bcm963xx_boards); i++) {
- if (strncmp(board_name, bcm963xx_boards[i]->name, 16))
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -239,3 +239,21 @@ int __init board_register_devices(void)
-
- return 0;
- }
-+
-+const struct of_device_id * __init bcm63xx_match_board(const struct of_device_id *m)
-+{
-+ const struct of_device_id *match;
-+ unsigned long dt_root;
-+
-+ if (!IS_ENABLED(CONFIG_OF) || !initial_boot_params)
-+ return NULL;
-+
-+ dt_root = of_get_flat_dt_root();
-+
-+ for (match = m; match->compatible[0]; match++) {
-+ if (of_flat_dt_is_compatible(dt_root, match->compatible))
-+ return match;
-+ }
-+
-+ return NULL;
-+}
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -1,11 +1,14 @@
- #ifndef __BOARD_COMMON_H
- #define __BOARD_COMMON_H
-
-+#include <linux/of.h>
- #include <board_bcm963xx.h>
-
- void board_early_setup(const struct board_info *board,
- int (*get_mac_address)(u8 mac[ETH_ALEN]));
-
-+const struct of_device_id *bcm63xx_match_board(const struct of_device_id *);
-+
- #if defined(CONFIG_BOARD_BCM963XX)
- void board_bcm963xx_init(void);
- #else
+++ /dev/null
-From e71eea9953c774dfadb754258824fb1888c279f4 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 21 Nov 2014 16:54:06 +0100
-Subject: [PATCH 47/48] MIPS: BCM63XX: populate the compatible to board_info
- list
-
-Populate the compatible to board_info list to allow dtbs to be used
-for known boards.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 34 +++++++++++++++++++++++++++++
- 1 file changed, 34 insertions(+)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -696,6 +696,48 @@ static const struct board_info __initcon
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-+#ifdef CONFIG_OF
-+#ifdef CONFIG_BCM63XX_CPU_3368
-+ { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6338
-+ { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
-+ { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6345
-+ { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+ { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
-+ { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
-+ { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
-+ { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
-+ { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
-+ { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
-+ { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
-+ { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
-+ { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
-+ { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6358
-+ { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
-+ { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
-+ { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
-+ { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+#endif
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+#endif
-+#endif /* CONFIG_OF */
- { },
- };
-
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -143,6 +143,18 @@ void __init device_tree_init(void)
-
- unflatten_and_copy_device_tree();
- }
-+
-+int board_of_device_present(const char *alias)
-+{
-+ bool present;
-+ struct device_node *np;
-+
-+ np = of_find_node_by_path(alias);
-+ present = of_device_is_available(np);
-+ of_node_put(np);
-+
-+ return present;
-+}
- #endif
-
- static struct gpio_led_platform_data bcm63xx_led_data;
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -15,4 +15,13 @@ void board_bcm963xx_init(void);
- static inline void board_bcm963xx_init(void) { }
- #endif
-
-+#if defined(CONFIG_OF)
-+int board_of_device_present(const char *alias);
-+#else
-+static inline void board_of_device_present(const char *alias)
-+{
-+ return 0;
-+}
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -23,6 +23,8 @@
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
-
-+#include "boards/board_common.h"
-+
- static int flash_type;
-
- static struct mtd_partition mtd_partitions[] = {
-@@ -178,6 +180,9 @@ int __init bcm63xx_flash_register(void)
-
- switch (flash_type) {
- case BCM63XX_FLASH_TYPE_PARALLEL:
-+ /* don't register when already registered through from dtb */
-+ if (board_of_device_present("pflash"))
-+ return 0;
-
- if (!mtd_resources[0].start) {
- /* read base address of boot chip select (0) */
+++ /dev/null
-From 8a0803979163c647736cb234ee1620c049c4915c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 1 Dec 2014 00:20:07 +0100
-Subject: [PATCH 5/5] MIPS: BCM63XX: register interrupt controllers through DT
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/irq.c | 12 ++++++++++++
- 1 file changed, 12 insertions(+)
-
---- a/arch/mips/bcm63xx/irq.c
-+++ b/arch/mips/bcm63xx/irq.c
-@@ -14,6 +14,8 @@
- #include <linux/irqchip.h>
- #include <linux/irqchip/irq-bcm6345-ext.h>
- #include <linux/irqchip/irq-bcm6345-periph.h>
-+#include <linux/of.h>
-+#include <linux/of_fdt.h>
- #include <asm/irq_cpu.h>
- #include <asm/mipsregs.h>
- #include <bcm63xx_cpu.h>
-@@ -21,6 +23,9 @@
- #include <bcm63xx_io.h>
- #include <bcm63xx_irq.h>
-
-+IRQCHIP_DECLARE(mips_cpu_intc, "mti,cpu-interrupt-controller",
-+ mips_cpu_irq_of_init);
-+
- void __init arch_init_irq(void)
- {
- void __iomem *periph_bases[2];
-@@ -29,6 +34,13 @@ void __init arch_init_irq(void)
- int periph_irqs[2] = { 2, 3 };
- int ext_irqs[6];
-
-+#ifdef CONFIG_OF
-+ if (initial_boot_params) {
-+ irqchip_init();
-+ return;
-+ }
-+#endif
-+
- periph_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
- periph_bases[1] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
- ext_intc_bases[0] = (void __iomem *)bcm63xx_regset_address(RSET_PERF);
+++ /dev/null
-From dbe94a8daaa63ef81b7414f2a17bca8e36dd6daa Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 20 Feb 2015 19:55:32 +0100
-Subject: [PATCH 1/6] gpio: add a simple GPIO driver for bcm63xx
-
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/gpio/Kconfig | 8 +++
- drivers/gpio/Makefile | 1 +
- drivers/gpio/gpio-bcm63xx.c | 135 +++++++++++++++++++++++++++++++++++++++++++
- 3 files changed, 131 insertions(+)
- create mode 100644 drivers/gpio/gpio-bcm63xx.c
-
---- a/drivers/gpio/Kconfig
-+++ b/drivers/gpio/Kconfig
-@@ -151,6 +151,13 @@ config GPIO_BCM_KONA
- help
- Turn on GPIO support for Broadcom "Kona" chips.
-
-+config GPIO_BCM63XX
-+ bool "Broadcom BCM63XX GPIO"
-+ depends on MIPS || COMPILE_TEST
-+ select GPIO_GENERIC
-+ help
-+ Turn on GPIO support for Broadcom BCM63XX xDSL chips.
-+
- config GPIO_BRCMSTB
- tristate "BRCMSTB GPIO support"
- default y if (ARCH_BRCMSTB || BMIPS_GENERIC)
---- a/drivers/gpio/Makefile
-+++ b/drivers/gpio/Makefile
-@@ -34,6 +34,7 @@ obj-$(CONFIG_GPIO_ATH79) += gpio-ath79.o
- obj-$(CONFIG_GPIO_ASPEED) += gpio-aspeed.o
- obj-$(CONFIG_GPIO_RASPBERRYPI_EXP) += gpio-raspberrypi-exp.o
- obj-$(CONFIG_GPIO_BCM_KONA) += gpio-bcm-kona.o
-+obj-$(CONFIG_GPIO_BCM63XX) += gpio-bcm63xx.o
- obj-$(CONFIG_GPIO_BD9571MWV) += gpio-bd9571mwv.o
- obj-$(CONFIG_GPIO_BRCMSTB) += gpio-brcmstb.o
- obj-$(CONFIG_GPIO_BT8XX) += gpio-bt8xx.o
---- /dev/null
-+++ b/drivers/gpio/gpio-bcm63xx.c
-@@ -0,0 +1,135 @@
-+/*
-+ * Driver for BCM63XX memory-mapped GPIO controllers, based on
-+ * Generic driver for memory-mapped GPIO controllers.
-+ *
-+ * Copyright 2008 MontaVista Software, Inc.
-+ * Copyright 2008,2010 Anton Vorontsov <cbouatmailru@gmail.com>
-+ * Copyright 2015 Jonas Gorski <jogo@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License as published by the
-+ * Free Software Foundation; either version 2 of the License, or (at your
-+ * option) any later version.
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/err.h>
-+#include <linux/bug.h>
-+#include <linux/kernel.h>
-+#include <linux/module.h>
-+#include <linux/spinlock.h>
-+#include <linux/compiler.h>
-+#include <linux/types.h>
-+#include <linux/errno.h>
-+#include <linux/log2.h>
-+#include <linux/ioport.h>
-+#include <linux/io.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+#include <linux/mod_devicetable.h>
-+#include <linux/of.h>
-+#include <linux/of_irq.h>
-+#include <linux/of_gpio.h>
-+
-+static int bcm63xx_gpio_to_irq(struct gpio_chip *chip, unsigned gpio)
-+{
-+ char irq_name[7]; /* "gpioXX" */
-+
-+ sprintf(irq_name, "gpio%d", gpio);
-+ return of_irq_get_byname(chip->of_node, irq_name);
-+}
-+
-+static int bcm63xx_gpio_probe(struct platform_device *pdev)
-+{
-+ struct device *dev = &pdev->dev;
-+ struct resource *dat_r, *dirout_r;
-+ void __iomem *dat;
-+ void __iomem *dirout;
-+ unsigned long sz;
-+ int err;
-+ struct gpio_chip *gc;
-+ struct bgpio_pdata *pdata = dev_get_platdata(dev);
-+
-+ dirout_r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
-+ dat_r = platform_get_resource(pdev, IORESOURCE_MEM, 1);
-+ if (!dat_r || !dirout_r)
-+ return -EINVAL;
-+
-+ if (resource_size(dat_r) != resource_size(dirout_r))
-+ return -EINVAL;
-+
-+ sz = resource_size(dat_r);
-+
-+ dat = devm_ioremap_resource(dev, dat_r);
-+ if (IS_ERR(dat))
-+ return PTR_ERR(dat);
-+
-+ dirout = devm_ioremap_resource(dev, dirout_r);
-+ if (IS_ERR(dirout))
-+ return PTR_ERR(dirout);
-+
-+ gc = devm_kzalloc(&pdev->dev, sizeof(*gc), GFP_KERNEL);
-+ if (!gc)
-+ return -ENOMEM;
-+
-+ err = bgpio_init(gc, dev, sz, dat, NULL, NULL, dirout, NULL,
-+ BGPIOF_BIG_ENDIAN_BYTE_ORDER);
-+ if (err)
-+ return err;
-+
-+ platform_set_drvdata(pdev, gc);
-+
-+ if (dev->of_node) {
-+ int id = of_alias_get_id(dev->of_node, "gpio");
-+ u32 ngpios;
-+
-+ if (id >= 0)
-+ gc->label = devm_kasprintf(dev, GFP_KERNEL,
-+ "bcm63xx-gpio.%d", id);
-+
-+ if (!of_property_read_u32(dev->of_node, "ngpios", &ngpios))
-+ gc->ngpio = ngpios;
-+
-+ if (of_get_property(dev->of_node, "interrupt-names", NULL))
-+ gc->to_irq = bcm63xx_gpio_to_irq;
-+
-+ } else if (pdata) {
-+ gc->base = pdata->base;
-+ if (pdata->ngpio > 0)
-+ gc->ngpio = pdata->ngpio;
-+ }
-+
-+ return gpiochip_add(gc);
-+}
-+
-+static int bcm63xx_gpio_remove(struct platform_device *pdev)
-+{
-+ struct gpio_chip *gc = platform_get_drvdata(pdev);
-+
-+ gpiochip_remove(gc);
-+ return 0;
-+}
-+
-+#ifdef CONFIG_OF
-+static struct of_device_id bcm63xx_gpio_of_match[] = {
-+ { .compatible = "brcm,bcm6345-gpio" },
-+ { },
-+};
-+#endif
-+
-+static struct platform_driver bcm63xx_gpio_driver = {
-+ .probe = bcm63xx_gpio_probe,
-+ .remove = bcm63xx_gpio_remove,
-+ .driver = {
-+ .name = "bcm63xx-gpio",
-+ .of_match_table = of_match_ptr(bcm63xx_gpio_of_match),
-+ },
-+};
-+
-+module_platform_driver(bcm63xx_gpio_driver);
-+
-+MODULE_DESCRIPTION("Driver for BCM63XX memory-mapped GPIO controllers");
-+MODULE_AUTHOR("Jonas Gorski <jogo@openwrt.org>");
-+MODULE_LICENSE("GPL");
+++ /dev/null
-From 302f69453721e5ee19f583339a3a646821d4a173 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Fri, 20 Feb 2015 23:58:54 +0100
-Subject: [PATCH 2/6] MIPS: BCM63XX: switch to new gpio driver
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_common.c | 2 +
- arch/mips/bcm63xx/gpio.c | 145 ++++++++++------------------------------------
- arch/mips/bcm63xx/setup.c | 3 -
- 3 files changed, 32 insertions(+), 118 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -188,6 +188,8 @@ int __init board_register_devices(void)
- }
- #endif
-
-+ bcm63xx_gpio_init();
-+
- if (board.has_uart0)
- bcm63xx_uart_register(0);
-
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -5,147 +5,62 @@
- *
- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
- * Copyright (C) 2008-2011 Florian Fainelli <florian@openwrt.org>
-+ * Copyright (C) Jonas Gorski <jogo@openwrt.org>
- */
-
- #include <linux/kernel.h>
- #include <linux/init.h>
--#include <linux/spinlock.h>
- #include <linux/platform_device.h>
- #include <linux/gpio/driver.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_gpio.h>
--#include <bcm63xx_io.h>
- #include <bcm63xx_regs.h>
-
--static u32 gpio_out_low_reg;
--
--static void bcm63xx_gpio_out_low_reg_init(void)
-+static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
- {
-- switch (bcm63xx_get_cpu_id()) {
-- case BCM6345_CPU_ID:
-- gpio_out_low_reg = GPIO_DATA_LO_REG_6345;
-- break;
-- default:
-- gpio_out_low_reg = GPIO_DATA_LO_REG;
-- break;
-- }
--}
--
--static DEFINE_SPINLOCK(bcm63xx_gpio_lock);
--static u32 gpio_out_low, gpio_out_high;
-+ struct resource res[2];
-+ struct bgpio_pdata pdata;
-
--static void bcm63xx_gpio_set(struct gpio_chip *chip,
-- unsigned gpio, int val)
--{
-- u32 reg;
-- u32 mask;
-- u32 *v;
-- unsigned long flags;
--
-- if (gpio >= chip->ngpio)
-- BUG();
--
-- if (gpio < 32) {
-- reg = gpio_out_low_reg;
-- mask = 1 << gpio;
-- v = &gpio_out_low;
-- } else {
-- reg = GPIO_DATA_HI_REG;
-- mask = 1 << (gpio - 32);
-- v = &gpio_out_high;
-- }
--
-- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
-- if (val)
-- *v |= mask;
-- else
-- *v &= ~mask;
-- bcm_gpio_writel(*v, reg);
-- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
--}
-+ memset(res, 0, sizeof(res));
-+ memset(&pdata, 0, sizeof(pdata));
-
--static int bcm63xx_gpio_get(struct gpio_chip *chip, unsigned gpio)
--{
-- u32 reg;
-- u32 mask;
-+ res[0].flags = IORESOURCE_MEM;
-+ res[0].start = bcm63xx_regset_address(RSET_GPIO);
-+ res[0].start += dir;
-
-- if (gpio >= chip->ngpio)
-- BUG();
-+ res[0].end = res[0].start + 3;
-
-- if (gpio < 32) {
-- reg = gpio_out_low_reg;
-- mask = 1 << gpio;
-- } else {
-- reg = GPIO_DATA_HI_REG;
-- mask = 1 << (gpio - 32);
-- }
-+ res[1].flags = IORESOURCE_MEM;
-+ res[1].start = bcm63xx_regset_address(RSET_GPIO);
-+ res[1].start += data;
-
-- return !!(bcm_gpio_readl(reg) & mask);
--}
-+ res[1].end = res[1].start + 3;
-
--static int bcm63xx_gpio_set_direction(struct gpio_chip *chip,
-- unsigned gpio, int dir)
--{
-- u32 reg;
-- u32 mask;
-- u32 tmp;
-- unsigned long flags;
--
-- if (gpio >= chip->ngpio)
-- BUG();
--
-- if (gpio < 32) {
-- reg = GPIO_CTL_LO_REG;
-- mask = 1 << gpio;
-- } else {
-- reg = GPIO_CTL_HI_REG;
-- mask = 1 << (gpio - 32);
-- }
--
-- spin_lock_irqsave(&bcm63xx_gpio_lock, flags);
-- tmp = bcm_gpio_readl(reg);
-- if (dir == BCM63XX_GPIO_DIR_IN)
-- tmp &= ~mask;
-- else
-- tmp |= mask;
-- bcm_gpio_writel(tmp, reg);
-- spin_unlock_irqrestore(&bcm63xx_gpio_lock, flags);
-+ pdata.base = id * 32;
-+ pdata.ngpio = ngpio;
-
-- return 0;
-+ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
-+ &pdata, sizeof(pdata));
- }
-
--static int bcm63xx_gpio_direction_input(struct gpio_chip *chip, unsigned gpio)
-+int __init bcm63xx_gpio_init(void)
- {
-- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_IN);
--}
-+ int ngpio = bcm63xx_gpio_count();
-+ int data_low_reg;
-
--static int bcm63xx_gpio_direction_output(struct gpio_chip *chip,
-- unsigned gpio, int value)
--{
-- bcm63xx_gpio_set(chip, gpio, value);
-- return bcm63xx_gpio_set_direction(chip, gpio, BCM63XX_GPIO_DIR_OUT);
--}
-+ if (BCMCPU_IS_6345())
-+ data_low_reg = GPIO_DATA_LO_REG_6345;
-+ else
-+ data_low_reg = GPIO_DATA_LO_REG;
-
-+ bcm63xx_gpio_init_one(0, GPIO_CTL_LO_REG, data_low_reg, min(ngpio, 32));
-
--static struct gpio_chip bcm63xx_gpio_chip = {
-- .label = "bcm63xx-gpio",
-- .direction_input = bcm63xx_gpio_direction_input,
-- .direction_output = bcm63xx_gpio_direction_output,
-- .get = bcm63xx_gpio_get,
-- .set = bcm63xx_gpio_set,
-- .base = 0,
--};
-+ if (ngpio <= 32)
-+ return 0;
-
--int __init bcm63xx_gpio_init(void)
--{
-- bcm63xx_gpio_out_low_reg_init();
-+ bcm63xx_gpio_init_one(1, GPIO_CTL_HI_REG, GPIO_DATA_HI_REG, ngpio - 32);
-
-- gpio_out_low = bcm_gpio_readl(gpio_out_low_reg);
-- if (!BCMCPU_IS_6345())
-- gpio_out_high = bcm_gpio_readl(GPIO_DATA_HI_REG);
-- bcm63xx_gpio_chip.ngpio = bcm63xx_gpio_count();
-- pr_info("registering %d GPIOs\n", bcm63xx_gpio_chip.ngpio);
-+ return 0;
-
-- return gpiochip_add_data(&bcm63xx_gpio_chip, NULL);
- }
---- a/arch/mips/bcm63xx/setup.c
-+++ b/arch/mips/bcm63xx/setup.c
-@@ -164,9 +164,6 @@ void __init plat_mem_setup(void)
-
- int __init bcm63xx_register_devices(void)
- {
-- /* register gpiochip */
-- bcm63xx_gpio_init();
--
- return board_register_devices();
- }
-
+++ /dev/null
-From d13bdf92ec885105cf107183f8464c40e5f3b93b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Feb 2015 17:21:59 +0100
-Subject: [PATCH 4/6] MIPS: BCM63XX: register lookup for ephy-reset gpio
-
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.c | 7 +++--
- arch/mips/bcm63xx/gpio.c | 32 ++++++++++++++++++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h | 2 ++
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 5 +--
- 5 files changed, 42 insertions(+), 6 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -55,7 +55,7 @@ static struct board_info __initdata boar
- },
-
- .ephy_reset_gpio = 36,
-- .ephy_reset_gpio_flags = GPIOF_INIT_HIGH,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
- #endif
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -247,9 +247,10 @@ int __init board_register_devices(void)
-
- platform_device_register(&bcm63xx_gpio_leds);
-
-- if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags)
-- gpio_request_one(board.ephy_reset_gpio,
-- board.ephy_reset_gpio_flags, "ephy-reset");
-+ if (board.ephy_reset_gpio && board.ephy_reset_gpio_flags) {
-+ bcm63xx_gpio_ephy_reset(board.ephy_reset_gpio,
-+ board.ephy_reset_gpio_flags);
-+ }
-
- return 0;
- }
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -8,15 +8,23 @@
- * Copyright (C) Jonas Gorski <jogo@openwrt.org>
- */
-
-+#include <asm/addrspace.h>
-+
- #include <linux/kernel.h>
- #include <linux/init.h>
- #include <linux/platform_device.h>
- #include <linux/gpio/driver.h>
-+#include <linux/gpio/machine.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_regs.h>
-
-+static const char * const gpio_chip_labels[] = {
-+ "bcm63xx-gpio.0",
-+ "bcm63xx-gpio.1",
-+};
-+
- static void __init bcm63xx_gpio_init_one(int id, int dir, int data, int ngpio)
- {
- struct resource res[2];
-@@ -64,3 +72,25 @@ int __init bcm63xx_gpio_init(void)
- return 0;
-
- }
-+
-+static struct gpiod_lookup_table ephy_reset = {
-+ .dev_id = "bcm63xx_enet-0",
-+ .table = {
-+ { /* filled at runtime */ },
-+ { },
-+ },
-+};
-+
-+
-+void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags)
-+{
-+ if (ephy_reset.table[0].chip_label)
-+ return;
-+
-+ ephy_reset.table[0].chip_label = gpio_chip_labels[hw_gpio / 32];
-+ ephy_reset.table[0].chip_hwnum = hw_gpio % 32;
-+ ephy_reset.table[0].con_id = "reset";
-+ ephy_reset.table[0].flags = flags;
-+
-+ gpiod_add_lookup_table(&ephy_reset);
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_gpio.h
-@@ -3,9 +3,11 @@
- #define BCM63XX_GPIO_H
-
- #include <linux/init.h>
-+#include <linux/gpio/machine.h>
- #include <bcm63xx_cpu.h>
-
- int __init bcm63xx_gpio_init(void);
-+void bcm63xx_gpio_ephy_reset(int hw_gpio, enum gpio_lookup_flags flags);
-
- static inline unsigned long bcm63xx_gpio_count(void)
- {
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -4,6 +4,7 @@
-
- #include <linux/types.h>
- #include <linux/gpio.h>
-+#include <linux/gpio/machine.h>
- #include <linux/leds.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -50,8 +51,8 @@ struct board_info {
- /* External PHY reset GPIO */
- unsigned int ephy_reset_gpio;
-
-- /* External PHY reset GPIO flags from gpio.h */
-- unsigned long ephy_reset_gpio_flags;
-+ /* External PHY reset GPIO flags from gpio/machine.h */
-+ enum gpio_lookup_flags ephy_reset_gpio_flags;
-
- /* fallback sprom config */
- struct fallback_sprom_data fallback_sprom;
+++ /dev/null
-From e55892aac9d5508a000647ca66f0e678e02be3bb Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sat, 21 Feb 2015 17:26:50 +0100
-Subject: [PATCH 5/6] MIPS: BCM63XX: do not register gpio-controller if
-present in dtb
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/gpio.c | 7 +++++--
- 1 file changed, 5 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/gpio.c
-+++ b/arch/mips/bcm63xx/gpio.c
-@@ -20,6 +20,8 @@
- #include <bcm63xx_gpio.h>
- #include <bcm63xx_regs.h>
-
-+#include "boards/board_common.h"
-+
- static const char * const gpio_chip_labels[] = {
- "bcm63xx-gpio.0",
- "bcm63xx-gpio.1",
-@@ -48,8 +50,10 @@ static void __init bcm63xx_gpio_init_one
- pdata.base = id * 32;
- pdata.ngpio = ngpio;
-
-- platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res, 2,
-- &pdata, sizeof(pdata));
-+ if (!board_of_device_present("gpio0") &&
-+ !board_of_device_present("pinctrl"))
-+ platform_device_register_resndata(NULL, "bcm63xx-gpio", id, res,
-+ 2, &pdata, sizeof(pdata));
- }
-
- int __init bcm63xx_gpio_init(void)
+++ /dev/null
-From 1647cccc871bf43876c3df9852869680880d054c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 25 Mar 2015 13:52:02 +0100
-Subject: [PATCH 1/2] MIPS: BCM63XX: provide a gpio lookup for the pcmcia
- ready gpio
-
-To prepare for a time when gpiobases don't need to be fixed anymore.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-pcmcia.c | 13 +++++++++++++
- 1 file changed, 13 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-pcmcia.c
-+++ b/arch/mips/bcm63xx/dev-pcmcia.c
-@@ -10,6 +10,7 @@
- #include <linux/kernel.h>
- #include <asm/bootinfo.h>
- #include <linux/platform_device.h>
-+#include <linux/gpio/machine.h>
- #include <bcm63xx_cs.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_pcmcia.h>
-@@ -101,6 +102,14 @@ static const struct {
- },
- };
-
-+static struct gpiod_lookup_table pcmcia_gpios_table = {
-+ .dev_id = "bcm63xx_pcmcia.0",
-+ .table = {
-+ GPIO_LOOKUP("bcm63xx-gpio.0", 0, "ready", GPIO_ACTIVE_HIGH),
-+ { },
-+ },
-+};
-+
- int __init bcm63xx_pcmcia_register(void)
- {
- int ret, i;
-@@ -112,16 +121,20 @@ int __init bcm63xx_pcmcia_register(void)
- switch (bcm63xx_get_cpu_id()) {
- case BCM6348_CPU_ID:
- pd.ready_gpio = 22;
-+ pcmcia_gpios_table.table[0].chip_hwnum = 22;
- break;
-
- case BCM6358_CPU_ID:
- pd.ready_gpio = 18;
-+ pcmcia_gpios_table.table[0].chip_hwnum = 18;
- break;
-
- default:
- return -ENODEV;
- }
-
-+ gpiod_add_lookup_table(&pcmcia_gpios_table);
-+
- pcmcia_resources[0].start = bcm63xx_regset_address(RSET_PCMCIA);
- pcmcia_resources[0].end = pcmcia_resources[0].start +
- RSET_PCMCIA_SIZE - 1;
+++ /dev/null
-From c4e04f1c54928a49b227a5420d38b18226838775 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Wed, 25 Mar 2015 13:54:56 +0100
-Subject: [PATCH 2/2] pcmcia: bcm63xx_pmcia: use the new named gpio
-
-Use the new named gpio instead of relying on the hardware gpio numbers
-matching the virtual gpio numbers.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- drivers/pcmcia/bcm63xx_pcmcia.c | 9 ++++++++-
- drivers/pcmcia/bcm63xx_pcmcia.h | 4 ++++
- 2 files changed, 12 insertions(+), 1 deletion(-)
-
---- a/drivers/pcmcia/bcm63xx_pcmcia.c
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.c
-@@ -237,7 +237,7 @@ static unsigned int __get_socket_status(
- stat |= SS_XVCARD;
- stat |= SS_POWERON;
-
-- if (gpio_get_value(skt->pd->ready_gpio))
-+ if (gpiod_get_value(skt->ready_gpio))
- stat |= SS_READY;
-
- return stat;
-@@ -373,6 +373,13 @@ static int bcm63xx_drv_pcmcia_probe(stru
- goto err;
- }
-
-+ /* get ready gpio */
-+ skt->ready_gpio = devm_gpiod_get(&pdev->dev, "ready", GPIOD_IN);
-+ if (IS_ERR(skt->ready_gpio)) {
-+ ret = PTR_ERR(skt->ready_gpio);
-+ goto err;
-+ }
-+
- /* resources are static */
- sock->resource_ops = &pccard_static_ops;
- sock->ops = &bcm63xx_pcmcia_operations;
---- a/drivers/pcmcia/bcm63xx_pcmcia.h
-+++ b/drivers/pcmcia/bcm63xx_pcmcia.h
-@@ -4,6 +4,7 @@
-
- #include <linux/types.h>
- #include <linux/timer.h>
-+#include <linux/gpio/consumer.h>
- #include <pcmcia/ss.h>
- #include <bcm63xx_dev_pcmcia.h>
-
-@@ -56,6 +57,9 @@ struct bcm63xx_pcmcia_socket {
-
- /* base address of io memory */
- void __iomem *io_base;
-+
-+ /* ready gpio */
-+ struct gpio_desc *ready_gpio;
- };
-
- #endif /* BCM63XX_PCMCIA_H_ */
+++ /dev/null
-From 8439e5d2e69f54a532bb5f8ec001b4b5a3035574 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Wed, 27 Jul 2016 11:38:05 +0200
-Subject: [PATCH 14/16] Documentation: add BCM6318 pincontroller binding
- documentation
-
-Add binding documentation for the pincontrol core found in BCM6318 SoCs.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- .../bindings/pinctrl/brcm,bcm6318-pinctrl.txt | 79 ++++++++++++++++++++++
- 1 file changed, 79 insertions(+)
- create mode 100644 Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-
---- /dev/null
-+++ b/Documentation/devicetree/bindings/pinctrl/brcm,bcm6318-pinctrl.txt
-@@ -0,0 +1,79 @@
-+* Broadcom BCM6318 pin controller
-+
-+Required properties:
-+- compatible: Must be "brcm,bcm6318-pinctrl".
-+- regs: Register specifiers of dirout, dat, mode, mux, and pad registers.
-+- reg-names: Must be "dirout", "dat", "mode", "mux", "pad".
-+- gpio-controller: Identifies this node as a gpio controller.
-+- #gpio-cells: Must be <2>.
-+
-+Example:
-+
-+pinctrl: pin-controller@10000080 {
-+ compatible = "brcm,bcm6318-pinctrl";
-+ reg = <0x10000080 0x08>,
-+ <0x10000088 0x08>,
-+ <0x10000098 0x04>,
-+ <0x1000009c 0x0c>,
-+ <0x100000d4 0x18>;
-+ reg-names = "dirout", "dat", "mode", "mux", "pad";
-+
-+ gpio-controller;
-+ #gpio-cells = <2>;
-+};
-+
-+
-+Available pins/groups and functions:
-+
-+name pins functions
-+-----------------------------------------------------------
-+gpio0 0 led, ephy0_spd_led
-+gpio1 1 led, ephy1_spd_led
-+gpio2 2 led, ephy2_spd_led
-+gpio3 3 led, ephy3_spd_led
-+gpio4 4 led, ephy0_act_led
-+gpio5 5 led, ephy1_act_led
-+gpio6 6 led, ephy2_act_led, serial_led_data
-+gpio7 7 led, ephy3_act_led, serial_led_clk
-+gpio8 8 led, inet_act_led
-+gpio9 9 led, inet_fail_led
-+gpio10 10 led, dsl_led
-+gpio11 11 led, post_fail_led
-+gpio12 12 led, wlan_wps_led
-+gpio13 13 led, usb_pwron, usb_device_led
-+gpio14 14 led
-+gpio15 15 led
-+gpio16 16 led
-+gpio17 17 led
-+gpio18 18 led
-+gpio19 19 led
-+gpio20 20 led
-+gpio21 21 led
-+gpio22 22 led
-+gpio23 23 led
-+gpio24 24 -
-+gpio25 25 -
-+gpio26 26 -
-+gpio27 27 -
-+gpio28 28 -
-+gpio29 29 -
-+gpio30 30 -
-+gpio31 31 -
-+gpio32 32 -
-+gpio33 33 -
-+gpio34 34 -
-+gpio35 35 -
-+gpio36 36 -
-+gpio37 37 -
-+gpio38 38 -
-+gpio39 39 -
-+gpio40 40 usb_active
-+gpio41 41 -
-+gpio42 42 -
-+gpio43 43 -
-+gpio44 44 -
-+gpio45 45 -
-+gpio46 46 -
-+gpio47 47 -
-+gpio48 48 -
-+gpio49 49 -
+++ /dev/null
-From bd9c250ef85e6f99aa5d59b21abb87d0a48f2f61 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 24 Jun 2016 22:20:39 +0200
-Subject: [PATCH 15/16] pinctrl: add a pincontrol driver for BCM6318
-
-Add a pincontrol driver for BCM6318. BCM6318 allows muxing most GPIOs
-to different functions. BCM6318 is similar to BCM6328 with the addition
-of a pad register, and the GPIO meaning of the mux register changes
-based on the GPIO number.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/pinctrl/bcm63xx/Kconfig | 7 +
- drivers/pinctrl/bcm63xx/Makefile | 1 +
- drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c | 564 ++++++++++++++++++++++++++++++
- 3 files changed, 572 insertions(+)
- create mode 100644 drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
-
---- a/drivers/pinctrl/bcm63xx/Kconfig
-+++ b/drivers/pinctrl/bcm63xx/Kconfig
-@@ -2,6 +2,13 @@ config PINCTRL_BCM63XX
- bool
- select GPIO_GENERIC
-
-+config PINCTRL_BCM6318
-+ bool "BCM6318 pincontrol driver" if COMPILE_TEST
-+ select PINMUX
-+ select PINCONF
-+ select PINCTRL_BCM63XX
-+ select GENERIC_PINCONF
-+
- config PINCTRL_BCM6328
- bool "BCM6328 pincontrol driver" if COMPILE_TEST
- select PINMUX
---- a/drivers/pinctrl/bcm63xx/Makefile
-+++ b/drivers/pinctrl/bcm63xx/Makefile
-@@ -1,4 +1,5 @@
- obj-$(CONFIG_PINCTRL_BCM63XX) += pinctrl-bcm63xx.o
-+obj-$(CONFIG_PINCTRL_BCM6318) += pinctrl-bcm6318.o
- obj-$(CONFIG_PINCTRL_BCM6328) += pinctrl-bcm6328.o
- obj-$(CONFIG_PINCTRL_BCM6348) += pinctrl-bcm6348.o
- obj-$(CONFIG_PINCTRL_BCM6358) += pinctrl-bcm6358.o
---- /dev/null
-+++ b/drivers/pinctrl/bcm63xx/pinctrl-bcm6318.c
-@@ -0,0 +1,564 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2016 Jonas Gorski <jonas.gorski@gmail.com>
-+ */
-+
-+#include <linux/kernel.h>
-+#include <linux/spinlock.h>
-+#include <linux/bitops.h>
-+#include <linux/gpio.h>
-+#include <linux/gpio/driver.h>
-+#include <linux/of.h>
-+#include <linux/of_gpio.h>
-+#include <linux/slab.h>
-+#include <linux/platform_device.h>
-+
-+#include <linux/pinctrl/pinconf.h>
-+#include <linux/pinctrl/pinconf-generic.h>
-+#include <linux/pinctrl/pinmux.h>
-+#include <linux/pinctrl/machine.h>
-+
-+#include "../core.h"
-+#include "../pinctrl-utils.h"
-+
-+#include "pinctrl-bcm63xx.h"
-+
-+#define BCM6318_NGPIO 50
-+
-+struct bcm6318_pingroup {
-+ const char *name;
-+ const unsigned * const pins;
-+ const unsigned num_pins;
-+};
-+
-+struct bcm6318_function {
-+ const char *name;
-+ const char * const *groups;
-+ const unsigned num_groups;
-+
-+ unsigned mode_val:1;
-+ unsigned mux_val:2;
-+};
-+
-+struct bcm6318_pinctrl {
-+ struct pinctrl_dev *pctldev;
-+ struct pinctrl_desc desc;
-+
-+ void __iomem *mode;
-+ void __iomem *mux[3];
-+ void __iomem *pad[6];
-+
-+ /* register access lock */
-+ spinlock_t lock;
-+
-+ struct gpio_chip gpio[2];
-+};
-+
-+static const struct pinctrl_pin_desc bcm6318_pins[] = {
-+ PINCTRL_PIN(0, "gpio0"),
-+ PINCTRL_PIN(1, "gpio1"),
-+ PINCTRL_PIN(2, "gpio2"),
-+ PINCTRL_PIN(3, "gpio3"),
-+ PINCTRL_PIN(4, "gpio4"),
-+ PINCTRL_PIN(5, "gpio5"),
-+ PINCTRL_PIN(6, "gpio6"),
-+ PINCTRL_PIN(7, "gpio7"),
-+ PINCTRL_PIN(8, "gpio8"),
-+ PINCTRL_PIN(9, "gpio9"),
-+ PINCTRL_PIN(10, "gpio10"),
-+ PINCTRL_PIN(11, "gpio11"),
-+ PINCTRL_PIN(12, "gpio12"),
-+ PINCTRL_PIN(13, "gpio13"),
-+ PINCTRL_PIN(14, "gpio14"),
-+ PINCTRL_PIN(15, "gpio15"),
-+ PINCTRL_PIN(16, "gpio16"),
-+ PINCTRL_PIN(17, "gpio17"),
-+ PINCTRL_PIN(18, "gpio18"),
-+ PINCTRL_PIN(19, "gpio19"),
-+ PINCTRL_PIN(20, "gpio20"),
-+ PINCTRL_PIN(21, "gpio21"),
-+ PINCTRL_PIN(22, "gpio22"),
-+ PINCTRL_PIN(23, "gpio23"),
-+ PINCTRL_PIN(24, "gpio24"),
-+ PINCTRL_PIN(25, "gpio25"),
-+ PINCTRL_PIN(26, "gpio26"),
-+ PINCTRL_PIN(27, "gpio27"),
-+ PINCTRL_PIN(28, "gpio28"),
-+ PINCTRL_PIN(29, "gpio29"),
-+ PINCTRL_PIN(30, "gpio30"),
-+ PINCTRL_PIN(31, "gpio31"),
-+ PINCTRL_PIN(32, "gpio32"),
-+ PINCTRL_PIN(33, "gpio33"),
-+ PINCTRL_PIN(34, "gpio34"),
-+ PINCTRL_PIN(35, "gpio35"),
-+ PINCTRL_PIN(36, "gpio36"),
-+ PINCTRL_PIN(37, "gpio37"),
-+ PINCTRL_PIN(38, "gpio38"),
-+ PINCTRL_PIN(39, "gpio39"),
-+ PINCTRL_PIN(40, "gpio40"),
-+ PINCTRL_PIN(41, "gpio41"),
-+ PINCTRL_PIN(42, "gpio42"),
-+ PINCTRL_PIN(43, "gpio43"),
-+ PINCTRL_PIN(44, "gpio44"),
-+ PINCTRL_PIN(45, "gpio45"),
-+ PINCTRL_PIN(46, "gpio46"),
-+ PINCTRL_PIN(47, "gpio47"),
-+ PINCTRL_PIN(48, "gpio48"),
-+ PINCTRL_PIN(49, "gpio49"),
-+};
-+
-+static unsigned gpio0_pins[] = { 0 };
-+static unsigned gpio1_pins[] = { 1 };
-+static unsigned gpio2_pins[] = { 2 };
-+static unsigned gpio3_pins[] = { 3 };
-+static unsigned gpio4_pins[] = { 4 };
-+static unsigned gpio5_pins[] = { 5 };
-+static unsigned gpio6_pins[] = { 6 };
-+static unsigned gpio7_pins[] = { 7 };
-+static unsigned gpio8_pins[] = { 8 };
-+static unsigned gpio9_pins[] = { 9 };
-+static unsigned gpio10_pins[] = { 10 };
-+static unsigned gpio11_pins[] = { 11 };
-+static unsigned gpio12_pins[] = { 12 };
-+static unsigned gpio13_pins[] = { 13 };
-+static unsigned gpio14_pins[] = { 14 };
-+static unsigned gpio15_pins[] = { 15 };
-+static unsigned gpio16_pins[] = { 16 };
-+static unsigned gpio17_pins[] = { 17 };
-+static unsigned gpio18_pins[] = { 18 };
-+static unsigned gpio19_pins[] = { 19 };
-+static unsigned gpio20_pins[] = { 20 };
-+static unsigned gpio21_pins[] = { 21 };
-+static unsigned gpio22_pins[] = { 22 };
-+static unsigned gpio23_pins[] = { 23 };
-+static unsigned gpio24_pins[] = { 24 };
-+static unsigned gpio25_pins[] = { 25 };
-+static unsigned gpio26_pins[] = { 26 };
-+static unsigned gpio27_pins[] = { 27 };
-+static unsigned gpio28_pins[] = { 28 };
-+static unsigned gpio29_pins[] = { 29 };
-+static unsigned gpio30_pins[] = { 30 };
-+static unsigned gpio31_pins[] = { 31 };
-+static unsigned gpio32_pins[] = { 32 };
-+static unsigned gpio33_pins[] = { 33 };
-+static unsigned gpio34_pins[] = { 34 };
-+static unsigned gpio35_pins[] = { 35 };
-+static unsigned gpio36_pins[] = { 36 };
-+static unsigned gpio37_pins[] = { 37 };
-+static unsigned gpio38_pins[] = { 38 };
-+static unsigned gpio39_pins[] = { 39 };
-+static unsigned gpio40_pins[] = { 40 };
-+static unsigned gpio41_pins[] = { 41 };
-+static unsigned gpio42_pins[] = { 42 };
-+static unsigned gpio43_pins[] = { 43 };
-+static unsigned gpio44_pins[] = { 44 };
-+static unsigned gpio45_pins[] = { 45 };
-+static unsigned gpio46_pins[] = { 46 };
-+static unsigned gpio47_pins[] = { 47 };
-+static unsigned gpio48_pins[] = { 48 };
-+static unsigned gpio49_pins[] = { 49 };
-+
-+#define BCM6318_GROUP(n) \
-+ { \
-+ .name = #n, \
-+ .pins = n##_pins, \
-+ .num_pins = ARRAY_SIZE(n##_pins), \
-+ }
-+
-+static struct bcm6318_pingroup bcm6318_groups[] = {
-+ BCM6318_GROUP(gpio0),
-+ BCM6318_GROUP(gpio1),
-+ BCM6318_GROUP(gpio2),
-+ BCM6318_GROUP(gpio3),
-+ BCM6318_GROUP(gpio4),
-+ BCM6318_GROUP(gpio5),
-+ BCM6318_GROUP(gpio6),
-+ BCM6318_GROUP(gpio7),
-+ BCM6318_GROUP(gpio8),
-+ BCM6318_GROUP(gpio9),
-+ BCM6318_GROUP(gpio10),
-+ BCM6318_GROUP(gpio11),
-+ BCM6318_GROUP(gpio12),
-+ BCM6318_GROUP(gpio13),
-+ BCM6318_GROUP(gpio14),
-+ BCM6318_GROUP(gpio15),
-+ BCM6318_GROUP(gpio16),
-+ BCM6318_GROUP(gpio17),
-+ BCM6318_GROUP(gpio18),
-+ BCM6318_GROUP(gpio19),
-+ BCM6318_GROUP(gpio20),
-+ BCM6318_GROUP(gpio21),
-+ BCM6318_GROUP(gpio22),
-+ BCM6318_GROUP(gpio23),
-+ BCM6318_GROUP(gpio24),
-+ BCM6318_GROUP(gpio25),
-+ BCM6318_GROUP(gpio26),
-+ BCM6318_GROUP(gpio27),
-+ BCM6318_GROUP(gpio28),
-+ BCM6318_GROUP(gpio29),
-+ BCM6318_GROUP(gpio30),
-+ BCM6318_GROUP(gpio31),
-+ BCM6318_GROUP(gpio32),
-+ BCM6318_GROUP(gpio33),
-+ BCM6318_GROUP(gpio34),
-+ BCM6318_GROUP(gpio35),
-+ BCM6318_GROUP(gpio36),
-+ BCM6318_GROUP(gpio37),
-+ BCM6318_GROUP(gpio38),
-+ BCM6318_GROUP(gpio39),
-+ BCM6318_GROUP(gpio40),
-+ BCM6318_GROUP(gpio41),
-+ BCM6318_GROUP(gpio42),
-+ BCM6318_GROUP(gpio43),
-+ BCM6318_GROUP(gpio44),
-+ BCM6318_GROUP(gpio45),
-+ BCM6318_GROUP(gpio46),
-+ BCM6318_GROUP(gpio47),
-+ BCM6318_GROUP(gpio48),
-+ BCM6318_GROUP(gpio49),
-+};
-+
-+/* GPIO_MODE */
-+static const char * const led_groups[] = {
-+ "gpio0",
-+ "gpio1",
-+ "gpio2",
-+ "gpio3",
-+ "gpio4",
-+ "gpio5",
-+ "gpio6",
-+ "gpio7",
-+ "gpio8",
-+ "gpio9",
-+ "gpio10",
-+ "gpio11",
-+ "gpio12",
-+ "gpio13",
-+ "gpio14",
-+ "gpio15",
-+ "gpio16",
-+ "gpio17",
-+ "gpio18",
-+ "gpio19",
-+ "gpio20",
-+ "gpio21",
-+ "gpio22",
-+ "gpio23",
-+};
-+
-+/* PINMUX_SEL */
-+static const char * const ephy0_spd_led_groups[] = {
-+ "gpio0",
-+};
-+
-+static const char * const ephy1_spd_led_groups[] = {
-+ "gpio1",
-+};
-+
-+static const char * const ephy2_spd_led_groups[] = {
-+ "gpio2",
-+};
-+
-+static const char * const ephy3_spd_led_groups[] = {
-+ "gpio3",
-+};
-+
-+static const char * const ephy0_act_led_groups[] = {
-+ "gpio4",
-+};
-+
-+static const char * const ephy1_act_led_groups[] = {
-+ "gpio5",
-+};
-+
-+static const char * const ephy2_act_led_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const ephy3_act_led_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const serial_led_data_groups[] = {
-+ "gpio6",
-+};
-+
-+static const char * const serial_led_clk_groups[] = {
-+ "gpio7",
-+};
-+
-+static const char * const inet_act_led_groups[] = {
-+ "gpio8",
-+};
-+
-+static const char * const inet_fail_led_groups[] = {
-+ "gpio9",
-+};
-+
-+static const char * const dsl_led_groups[] = {
-+ "gpio10",
-+};
-+
-+static const char * const post_fail_led_groups[] = {
-+ "gpio11",
-+};
-+
-+static const char * const wlan_wps_led_groups[] = {
-+ "gpio12",
-+};
-+
-+static const char * const usb_pwron_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_device_led_groups[] = {
-+ "gpio13",
-+};
-+
-+static const char * const usb_active_groups[] = {
-+ "gpio40",
-+};
-+
-+#define BCM6318_MODE_FUN(n) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mode_val = 1, \
-+ }
-+
-+#define BCM6318_MUX_FUN(n, mux) \
-+ { \
-+ .name = #n, \
-+ .groups = n##_groups, \
-+ .num_groups = ARRAY_SIZE(n##_groups), \
-+ .mux_val = mux, \
-+ }
-+
-+static const struct bcm6318_function bcm6318_funcs[] = {
-+ BCM6318_MODE_FUN(led),
-+ BCM6318_MUX_FUN(ephy0_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy1_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy2_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy3_spd_led, 1),
-+ BCM6318_MUX_FUN(ephy0_act_led, 1),
-+ BCM6318_MUX_FUN(ephy1_act_led, 1),
-+ BCM6318_MUX_FUN(ephy2_act_led, 1),
-+ BCM6318_MUX_FUN(ephy3_act_led, 1),
-+ BCM6318_MUX_FUN(serial_led_data, 3),
-+ BCM6318_MUX_FUN(serial_led_clk, 3),
-+ BCM6318_MUX_FUN(inet_act_led, 1),
-+ BCM6318_MUX_FUN(inet_fail_led, 1),
-+ BCM6318_MUX_FUN(dsl_led, 1),
-+ BCM6318_MUX_FUN(post_fail_led, 1),
-+ BCM6318_MUX_FUN(wlan_wps_led, 1),
-+ BCM6318_MUX_FUN(usb_pwron, 1),
-+ BCM6318_MUX_FUN(usb_device_led, 2),
-+ BCM6318_MUX_FUN(usb_active, 2),
-+};
-+
-+static int bcm6318_pinctrl_get_group_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6318_groups);
-+}
-+
-+static const char *bcm6318_pinctrl_get_group_name(struct pinctrl_dev *pctldev,
-+ unsigned group)
-+{
-+ return bcm6318_groups[group].name;
-+}
-+
-+static int bcm6318_pinctrl_get_group_pins(struct pinctrl_dev *pctldev,
-+ unsigned group, const unsigned **pins,
-+ unsigned *num_pins)
-+{
-+ *pins = bcm6318_groups[group].pins;
-+ *num_pins = bcm6318_groups[group].num_pins;
-+
-+ return 0;
-+}
-+
-+static int bcm6318_pinctrl_get_func_count(struct pinctrl_dev *pctldev)
-+{
-+ return ARRAY_SIZE(bcm6318_funcs);
-+}
-+
-+static const char *bcm6318_pinctrl_get_func_name(struct pinctrl_dev *pctldev,
-+ unsigned selector)
-+{
-+ return bcm6318_funcs[selector].name;
-+}
-+
-+static int bcm6318_pinctrl_get_groups(struct pinctrl_dev *pctldev,
-+ unsigned selector,
-+ const char * const **groups,
-+ unsigned * const num_groups)
-+{
-+ *groups = bcm6318_funcs[selector].groups;
-+ *num_groups = bcm6318_funcs[selector].num_groups;
-+
-+ return 0;
-+}
-+
-+static void bcm6318_rmw_mux(struct bcm6318_pinctrl *pctl, unsigned pin,
-+ u32 mode, u32 mux)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ if (pin < 32) {
-+ reg = __raw_readl(pctl->mode);
-+ reg &= ~BIT(pin);
-+ if (mode)
-+ reg |= BIT(pin);
-+ __raw_writel(reg, pctl->mode);
-+ }
-+
-+ if (pin < 48) {
-+ reg = __raw_readl(pctl->mux[pin / 16]);
-+ reg &= ~(3UL << ((pin % 16) * 2));
-+ reg |= mux << ((pin % 16) * 2);
-+ __raw_writel(reg, pctl->mux[pin / 16]);
-+ }
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static void bcm6318_set_pad(struct bcm6318_pinctrl *pctl, unsigned pin, u8 val)
-+{
-+ unsigned long flags;
-+ u32 reg;
-+
-+ spin_lock_irqsave(&pctl->lock, flags);
-+ reg = __raw_readl(pctl->pad[pin / 8]);
-+ reg &= ~(0xfUL << ((pin % 8) * 4));
-+ reg |= val << ((pin % 8) * 4);
-+ __raw_writel(reg, pctl->pad[pin / 8]);
-+ spin_unlock_irqrestore(&pctl->lock, flags);
-+}
-+
-+static int bcm6318_pinctrl_set_mux(struct pinctrl_dev *pctldev,
-+ unsigned selector, unsigned group)
-+{
-+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+ const struct bcm6318_pingroup *grp = &bcm6318_groups[group];
-+ const struct bcm6318_function *f = &bcm6318_funcs[selector];
-+
-+ bcm6318_rmw_mux(pctl, grp->pins[0], f->mode_val, f->mux_val);
-+
-+ return 0;
-+}
-+
-+static int bcm6318_gpio_request_enable(struct pinctrl_dev *pctldev,
-+ struct pinctrl_gpio_range *range,
-+ unsigned offset)
-+{
-+ struct bcm6318_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
-+
-+ /* disable all functions using this pin */
-+ if (offset < 13) {
-+ /* GPIOs 0-12 use mux 0 as GPIO function */
-+ bcm6318_rmw_mux(pctl, offset, 0, 0);
-+ } else if (offset < 42) {
-+ /* GPIOs 13-41 use mux 3 as GPIO function */
-+ bcm6318_rmw_mux(pctl, offset, 0, 3);
-+
-+ /* FIXME: revert to old value for non gpio? */
-+ bcm6318_set_pad(pctl, offset, 0);
-+ } else {
-+ /* no idea, really */
-+ }
-+
-+ return 0;
-+}
-+
-+static struct pinctrl_ops bcm6318_pctl_ops = {
-+ .get_groups_count = bcm6318_pinctrl_get_group_count,
-+ .get_group_name = bcm6318_pinctrl_get_group_name,
-+ .get_group_pins = bcm6318_pinctrl_get_group_pins,
-+#ifdef CONFIG_OF
-+ .dt_node_to_map = pinconf_generic_dt_node_to_map_pin,
-+ .dt_free_map = pinctrl_utils_free_map,
-+#endif
-+};
-+
-+static struct pinmux_ops bcm6318_pmx_ops = {
-+ .get_functions_count = bcm6318_pinctrl_get_func_count,
-+ .get_function_name = bcm6318_pinctrl_get_func_name,
-+ .get_function_groups = bcm6318_pinctrl_get_groups,
-+ .set_mux = bcm6318_pinctrl_set_mux,
-+ .gpio_request_enable = bcm6318_gpio_request_enable,
-+ .strict = true,
-+};
-+
-+static int bcm6318_pinctrl_probe(struct platform_device *pdev)
-+{
-+ struct bcm6318_pinctrl *pctl;
-+ struct resource *res;
-+ void __iomem *mode, *mux, *pad;
-+ unsigned i;
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mode");
-+ mode = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mode))
-+ return PTR_ERR(mode);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "mux");
-+ mux = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(mux))
-+ return PTR_ERR(mux);
-+
-+ res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "pad");
-+ pad = devm_ioremap_resource(&pdev->dev, res);
-+ if (IS_ERR(pad))
-+ return PTR_ERR(pad);
-+
-+ pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL);
-+ if (!pctl)
-+ return -ENOMEM;
-+
-+ spin_lock_init(&pctl->lock);
-+
-+ pctl->mode = mode;
-+
-+ for (i = 0; i < 3; i++)
-+ pctl->mux[i] = mux + (i * 4);
-+
-+ for (i = 0; i < 6; i++)
-+ pctl->pad[i] = pad + (i * 4);
-+
-+ pctl->desc.name = dev_name(&pdev->dev);
-+ pctl->desc.owner = THIS_MODULE;
-+ pctl->desc.pctlops = &bcm6318_pctl_ops;
-+ pctl->desc.pmxops = &bcm6318_pmx_ops;
-+
-+ pctl->desc.npins = ARRAY_SIZE(bcm6318_pins);
-+ pctl->desc.pins = bcm6318_pins;
-+
-+ platform_set_drvdata(pdev, pctl);
-+
-+ pctl->pctldev = bcm63xx_pinctrl_register(pdev, &pctl->desc, pctl,
-+ pctl->gpio, BCM6318_NGPIO);
-+ if (IS_ERR(pctl->pctldev))
-+ return PTR_ERR(pctl->pctldev);
-+
-+ return 0;
-+}
-+
-+static const struct of_device_id bcm6318_pinctrl_match[] = {
-+ { .compatible = "brcm,bcm6318-pinctrl", },
-+ { },
-+};
-+
-+static struct platform_driver bcm6318_pinctrl_driver = {
-+ .probe = bcm6318_pinctrl_probe,
-+ .driver = {
-+ .name = "bcm6318-pinctrl",
-+ .of_match_table = bcm6318_pinctrl_match,
-+ },
-+};
-+
-+builtin_platform_driver(bcm6318_pinctrl_driver);
+++ /dev/null
---- a/arch/mips/bcm63xx/Kconfig
-+++ b/arch/mips/bcm63xx/Kconfig
-@@ -25,6 +25,8 @@ config BCM63XX_CPU_6318
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6318
-
- config BCM63XX_CPU_6328
- bool "support 6328 CPU"
-@@ -32,6 +34,8 @@ config BCM63XX_CPU_6328
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6328
-
- config BCM63XX_CPU_6338
- bool "support 6338 CPU"
-@@ -47,6 +51,8 @@ config BCM63XX_CPU_6348
- select SYS_HAS_CPU_BMIPS32_3300
- select HW_HAS_PCI
- select BCM63XX_OHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6348
-
- config BCM63XX_CPU_6358
- bool "support 6358 CPU"
-@@ -54,6 +60,8 @@ config BCM63XX_CPU_6358
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6358
-
- config BCM63XX_CPU_6362
- bool "support 6362 CPU"
-@@ -61,6 +69,8 @@ config BCM63XX_CPU_6362
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6362
-
- config BCM63XX_CPU_6368
- bool "support 6368 CPU"
-@@ -68,6 +78,8 @@ config BCM63XX_CPU_6368
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM6368
-
- config BCM63XX_CPU_63268
- bool "support 63268 CPU"
-@@ -75,6 +87,8 @@ config BCM63XX_CPU_63268
- select HW_HAS_PCI
- select BCM63XX_OHCI
- select BCM63XX_EHCI
-+ select PINCTRL
-+ select PINCTRL_BCM63268
- endmenu
-
- source "arch/mips/bcm63xx/boards/Kconfig"
+++ /dev/null
-From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 31 Jul 2017 20:10:36 +0200
-Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
-
----
- arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
- 1 file changed, 15 insertions(+)
-
---- a/arch/mips/bcm63xx/clk.c
-+++ b/arch/mips/bcm63xx/clk.c
-@@ -489,6 +489,8 @@ static struct clk_lookup bcm3368_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -505,7 +507,9 @@ static struct clk_lookup bcm6318_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -519,7 +523,10 @@ static struct clk_lookup bcm6328_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -532,6 +539,7 @@ static struct clk_lookup bcm6338_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -546,6 +554,7 @@ static struct clk_lookup bcm6345_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -560,6 +569,7 @@ static struct clk_lookup bcm6348_clks[]
- /* fixed rate clocks */
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -576,6 +586,8 @@ static struct clk_lookup bcm6358_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enet0", &clk_enet0),
- CLKDEV_INIT(NULL, "enet1", &clk_enet1),
-@@ -595,7 +607,10 @@ static struct clk_lookup bcm6362_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -611,6 +626,8 @@ static struct clk_lookup bcm6368_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
-@@ -625,7 +642,10 @@ static struct clk_lookup bcm63268_clks[]
- CLKDEV_INIT(NULL, "periph", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
-+ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
-+ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
- CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
-+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
- /* gated clocks */
- CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
- CLKDEV_INIT(NULL, "usbh", &clk_usbh),
+++ /dev/null
-From 39d2882058345b5994680b8731848a0343878019 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sat, 4 Feb 2017 12:58:50 +0100
-Subject: [PATCH 7/8] MIPS: BCM63XX: do not register SPI controllers
-
-We now register them through DT, so no need to keep them here.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 7 -------
- 1 file changed, 7 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -27,9 +27,7 @@
- #include <bcm63xx_dev_pci.h>
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_flash.h>
--#include <bcm63xx_dev_hsspi.h>
- #include <bcm63xx_dev_pcmcia.h>
--#include <bcm63xx_dev_spi.h>
- #include <bcm63xx_dev_usb_ehci.h>
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
-@@ -236,10 +234,6 @@ int __init board_register_devices(void)
- bcm63xx_register_fallback_sprom(&board.fallback_sprom)))
- pr_err(PFX "failed to register fallback SPROM\n");
-
-- bcm63xx_spi_register();
--
-- bcm63xx_hsspi_register();
--
- bcm63xx_flash_register();
-
- bcm63xx_led_data.num_leds = ARRAY_SIZE(board.leds);
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- # SPDX-License-Identifier: GPL-2.0
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
-- dev-rng.o dev-spi.o dev-hsspi.o dev-uart.o dev-wdt.o \
-+ dev-rng.o dev-uart.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
- sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
---- a/arch/mips/bcm63xx/dev-hsspi.c
-+++ /dev/null
-@@ -1,48 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/platform_device.h>
--
--#include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_hsspi.h>
--#include <bcm63xx_regs.h>
--
--static struct resource spi_resources[] = {
-- {
-- .start = -1, /* filled at runtime */
-- .end = -1, /* filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- .start = -1, /* filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_hsspi_device = {
-- .name = "bcm63xx-hsspi",
-- .id = 0,
-- .num_resources = ARRAY_SIZE(spi_resources),
-- .resource = spi_resources,
--};
--
--int __init bcm63xx_hsspi_register(void)
--{
-- if (!BCMCPU_IS_6318() && !BCMCPU_IS_6328() && !BCMCPU_IS_6362() &&
-- !BCMCPU_IS_63268())
-- return -ENODEV;
--
-- spi_resources[0].start = bcm63xx_regset_address(RSET_HSSPI);
-- spi_resources[0].end = spi_resources[0].start;
-- spi_resources[0].end += RSET_HSSPI_SIZE - 1;
-- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_HSSPI);
--
-- return platform_device_register(&bcm63xx_hsspi_device);
--}
---- a/arch/mips/bcm63xx/dev-spi.c
-+++ /dev/null
-@@ -1,60 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2009-2011 Florian Fainelli <florian@openwrt.org>
-- * Copyright (C) 2010 Tanguy Bouzeloc <tanguy.bouzeloc@efixo.com>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/export.h>
--#include <linux/platform_device.h>
--#include <linux/err.h>
--#include <linux/clk.h>
--
--#include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_spi.h>
--#include <bcm63xx_regs.h>
--
--static struct resource spi_resources[] = {
-- {
-- .start = -1, /* filled at runtime */
-- .end = -1, /* filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- .start = -1, /* filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_spi_device = {
-- .id = -1,
-- .num_resources = ARRAY_SIZE(spi_resources),
-- .resource = spi_resources,
--};
--
--int __init bcm63xx_spi_register(void)
--{
-- if (BCMCPU_IS_6318() || BCMCPU_IS_6328() || BCMCPU_IS_6345())
-- return -ENODEV;
--
-- spi_resources[0].start = bcm63xx_regset_address(RSET_SPI);
-- spi_resources[0].end = spi_resources[0].start;
-- spi_resources[1].start = bcm63xx_get_irq_number(IRQ_SPI);
--
-- if (BCMCPU_IS_6338() || BCMCPU_IS_6348()) {
-- bcm63xx_spi_device.name = "bcm6348-spi",
-- spi_resources[0].end += BCM_6348_RSET_SPI_SIZE - 1;
-- }
--
-- if (BCMCPU_IS_3368() || BCMCPU_IS_6358() || BCMCPU_IS_6362() ||
-- BCMCPU_IS_6368() || BCMCPU_IS_63268()) {
-- bcm63xx_spi_device.name = "bcm6358-spi",
-- spi_resources[0].end += BCM_6358_RSET_SPI_SIZE - 1;
-- }
--
-- return platform_device_register(&bcm63xx_spi_device);
--}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_hsspi.h
-+++ /dev/null
-@@ -1,9 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 */
--#ifndef BCM63XX_DEV_HSSPI_H
--#define BCM63XX_DEV_HSSPI_H
--
--#include <linux/types.h>
--
--int bcm63xx_hsspi_register(void);
--
--#endif /* BCM63XX_DEV_HSSPI_H */
+++ /dev/null
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -1,7 +1,7 @@
- # SPDX-License-Identifier: GPL-2.0
- obj-y += clk.o cpu.o cs.o gpio.o irq.o nvram.o prom.o reset.o \
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
-- dev-rng.o dev-uart.o dev-wdt.o \
-+ dev-rng.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
- sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
---- a/arch/mips/bcm63xx/dev-uart.c
-+++ /dev/null
-@@ -1,76 +0,0 @@
--/*
-- * This file is subject to the terms and conditions of the GNU General Public
-- * License. See the file "COPYING" in the main directory of this archive
-- * for more details.
-- *
-- * Copyright (C) 2008 Maxime Bizon <mbizon@freebox.fr>
-- */
--
--#include <linux/init.h>
--#include <linux/kernel.h>
--#include <linux/platform_device.h>
--#include <bcm63xx_cpu.h>
--
--static struct resource uart0_resources[] = {
-- {
-- /* start & end filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- /* start filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct resource uart1_resources[] = {
-- {
-- /* start & end filled at runtime */
-- .flags = IORESOURCE_MEM,
-- },
-- {
-- /* start filled at runtime */
-- .flags = IORESOURCE_IRQ,
-- },
--};
--
--static struct platform_device bcm63xx_uart_devices[] = {
-- {
-- .name = "bcm63xx_uart",
-- .id = 0,
-- .num_resources = ARRAY_SIZE(uart0_resources),
-- .resource = uart0_resources,
-- },
--
-- {
-- .name = "bcm63xx_uart",
-- .id = 1,
-- .num_resources = ARRAY_SIZE(uart1_resources),
-- .resource = uart1_resources,
-- }
--};
--
--int __init bcm63xx_uart_register(unsigned int id)
--{
-- if (id >= ARRAY_SIZE(bcm63xx_uart_devices))
-- return -ENODEV;
--
-- if (id == 1 && (!BCMCPU_IS_3368() && !BCMCPU_IS_6358() &&
-- !BCMCPU_IS_6368()))
-- return -ENODEV;
--
-- if (id == 0) {
-- uart0_resources[0].start = bcm63xx_regset_address(RSET_UART0);
-- uart0_resources[0].end = uart0_resources[0].start +
-- RSET_UART_SIZE - 1;
-- uart0_resources[1].start = bcm63xx_get_irq_number(IRQ_UART0);
-- }
--
-- if (id == 1) {
-- uart1_resources[0].start = bcm63xx_regset_address(RSET_UART1);
-- uart1_resources[0].end = uart1_resources[0].start +
-- RSET_UART_SIZE - 1;
-- uart1_resources[1].start = bcm63xx_get_irq_number(IRQ_UART1);
-- }
--
-- return platform_device_register(&bcm63xx_uart_devices[id]);
--}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_uart.h
-+++ /dev/null
-@@ -1,7 +0,0 @@
--/* SPDX-License-Identifier: GPL-2.0 */
--#ifndef BCM63XX_DEV_UART_H_
--#define BCM63XX_DEV_UART_H_
--
--int bcm63xx_uart_register(unsigned int id);
--
--#endif /* BCM63XX_DEV_UART_H_ */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -32,8 +32,6 @@ struct board_info {
- unsigned int has_ohci0:1;
- unsigned int has_ehci0:1;
- unsigned int has_usbd:1;
-- unsigned int has_uart0:1;
-- unsigned int has_uart1:1;
- unsigned int use_fallback_sprom:1;
-
- /* ethernet config */
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -20,7 +20,6 @@
- #include <asm/prom.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
--#include <bcm63xx_dev_uart.h>
- #include <bcm63xx_regs.h>
- #include <bcm63xx_io.h>
- #include <bcm63xx_gpio.h>
-@@ -188,12 +187,6 @@ int __init board_register_devices(void)
-
- bcm63xx_gpio_init();
-
-- if (board.has_uart0)
-- bcm63xx_uart_register(0);
--
-- if (board.has_uart1)
-- bcm63xx_uart_register(1);
--
- if (board.has_pccard)
- bcm63xx_pcmcia_register();
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -35,9 +35,6 @@ static struct board_info __initdata boar
- .name = "CVG834G_E15R3921",
- .expected_cpu_id = 0x3368,
-
-- .has_uart0 = 1,
-- .has_uart1 = 1,
--
- .has_enet0 = 1,
- .has_pci = 1,
-
-@@ -67,7 +64,6 @@ static struct board_info __initdata boar
- .name = "96328avng",
- .expected_cpu_id = 0x6328,
-
-- .has_uart0 = 1,
- .has_pci = 1,
- .has_usbd = 0,
- .use_fallback_sprom = 1,
-@@ -116,7 +112,6 @@ static struct board_info __initdata boar
- .name = "96338GW",
- .expected_cpu_id = 0x6338,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .enet0 = {
- .force_speed_100 = 1,
-@@ -159,7 +154,6 @@ static struct board_info __initdata boar
- .name = "96338W",
- .expected_cpu_id = 0x6338,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .enet0 = {
- .force_speed_100 = 1,
-@@ -204,8 +198,6 @@ static struct board_info __initdata boar
- static struct board_info __initdata board_96345gw2 = {
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
--
-- .has_uart0 = 1,
- };
- #endif
-
-@@ -217,7 +209,6 @@ static struct board_info __initdata boar
- .name = "96348R",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_pci = 1,
- .use_fallback_sprom = 1,
-@@ -262,7 +253,6 @@ static struct board_info __initdata boar
- .name = "96348GW-10",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -315,7 +305,6 @@ static struct board_info __initdata boar
- .name = "96348GW-11",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -370,7 +359,6 @@ static struct board_info __initdata boar
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -421,7 +409,6 @@ static struct board_info __initdata boar
- .name = "F@ST2404",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -466,7 +453,6 @@ static struct board_info __initdata boar
- .name = "DV201AMR",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_pci = 1,
- .use_fallback_sprom = 1,
- .has_ohci0 = 1,
-@@ -487,7 +473,6 @@ static struct board_info __initdata boar
- .name = "96348GW-A",
- .expected_cpu_id = 0x6348,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -514,7 +499,6 @@ static struct board_info __initdata boar
- .name = "96358VW",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -567,7 +551,6 @@ static struct board_info __initdata boar
- .name = "96358VW2",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
-@@ -617,7 +600,6 @@ static struct board_info __initdata boar
- .name = "AGPF-S0",
- .expected_cpu_id = 0x6358,
-
-- .has_uart0 = 1,
- .has_enet0 = 1,
- .has_enet1 = 1,
- .has_pci = 1,
+++ /dev/null
-From 997f53b174c63153335508c22dc4493e8e5808d6 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 22 Feb 2015 17:52:32 +0100
-Subject: [PATCH] MIPS: BCM63XX: remove leds and buttons
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 262 -----------------------------
- 1 file changed, 262 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -43,14 +43,6 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
-
-- .leds = {
-- {
-- .name = "CVG834G:green:power",
-- .gpio = 37,
-- .default_trigger= "default-on",
-- },
-- },
--
- .ephy_reset_gpio = 36,
- .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
-@@ -72,35 +64,6 @@ static struct board_info __initdata boar
- .use_fullspeed = 0,
- .port_no = 0,
- },
--
-- .leds = {
-- {
-- .name = "96328avng::ppp-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::power",
-- .gpio = 4,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "96328avng::power-fail",
-- .gpio = 8,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::wps",
-- .gpio = 9,
-- .active_low = 1,
-- },
-- {
-- .name = "96328avng::ppp",
-- .gpio = 11,
-- .active_low = 1,
-- },
-- },
- };
- #endif
-
-@@ -119,35 +82,6 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ses",
-- .gpio = 5,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- }
-- },
- };
-
- static struct board_info __initdata board_96338w = {
-@@ -159,35 +93,6 @@ static struct board_info __initdata boar
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ses",
-- .gpio = 5,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
- #endif
-
-@@ -217,36 +122,6 @@ static struct board_info __initdata boar
- .has_phy = 1,
- .use_internal_phy = 1,
- },
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
--
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw_10 = {
-@@ -270,35 +145,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw_11 = {
-@@ -324,35 +170,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_96348gw = {
-@@ -374,35 +191,6 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 2,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 3,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 0,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 1,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_FAST2404 = {
-@@ -518,33 +306,6 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_pccard = 1,
- .has_ehci0 = 1,
--
-- .leds = {
-- {
-- .name = "adsl-fail",
-- .gpio = 15,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp",
-- .gpio = 22,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 23,
-- .active_low = 1,
-- },
-- {
-- .name = "power",
-- .gpio = 4,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 5,
-- },
-- },
- };
-
- static struct board_info __initdata board_96358vw2 = {
-@@ -571,29 +332,6 @@ static struct board_info __initdata boar
- .has_pccard = 1,
- .has_ehci0 = 1,
- .num_usbh_ports = 2,
--
-- .leds = {
-- {
-- .name = "adsl",
-- .gpio = 22,
-- .active_low = 1,
-- },
-- {
-- .name = "ppp-fail",
-- .gpio = 23,
-- },
-- {
-- .name = "power",
-- .gpio = 5,
-- .active_low = 1,
-- .default_trigger = "default-on",
-- },
-- {
-- .name = "stop",
-- .gpio = 4,
-- .active_low = 1,
-- },
-- },
- };
-
- static struct board_info __initdata board_AGPFS0 = {
+++ /dev/null
-From a4d005c91d403d9f3d0272db6cc46202c06ec774 Mon Sep 17 00:00:00 2001
-From: Axel Gembe <ago@bastart.eu.org>
-Date: Mon, 12 May 2008 18:54:09 +0200
-Subject: [PATCH] bcm963xx: flashmap support
-
-Signed-off-by: Axel Gembe <ago@bastart.eu.org>
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 19 +----------------
- drivers/mtd/maps/bcm963xx-flash.c | 32 ++++++++++++++++++++++++----
- drivers/mtd/redboot.c | 13 +++++++++--
- 3 files changed, 38 insertions(+), 26 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -35,7 +35,7 @@ static struct mtd_partition mtd_partitio
- }
- };
-
--static const char *bcm63xx_part_types[] = { "bcm63xxpart", NULL };
-+static const char *bcm63xx_part_types[] = { "bcm63xxpart", "RedBoot", NULL };
-
- static struct physmap_flash_data flash_data = {
- .width = 2,
---- a/drivers/mtd/redboot.c
-+++ b/drivers/mtd/redboot.c
-@@ -72,6 +72,7 @@ static int parse_redboot_partitions(stru
- int nulllen = 0;
- int numslots;
- unsigned long offset;
-+ unsigned long fis_origin = 0;
- #ifdef CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED
- static char nullstring[] = "unallocated";
- #endif
-@@ -176,6 +177,16 @@ static int parse_redboot_partitions(stru
- goto out;
- }
-
-+ if (data && data->origin) {
-+ fis_origin = data->origin;
-+ } else {
-+ for (i = 0; i < numslots; i++) {
-+ if (!strncmp(buf[i].name, "RedBoot", 8)) {
-+ fis_origin = (buf[i].flash_base & (master->size << 1) - 1);
-+ }
-+ }
-+ }
-+
- for (i = 0; i < numslots; i++) {
- struct fis_list *new_fl, **prev;
-
-@@ -196,10 +207,10 @@ static int parse_redboot_partitions(stru
- goto out;
- }
- new_fl->img = &buf[i];
-- if (data && data->origin)
-- buf[i].flash_base -= data->origin;
-- else
-- buf[i].flash_base &= master->size-1;
-+ if (fis_origin)
-+ buf[i].flash_base -= fis_origin;
-+
-+ buf[i].flash_base &= (master->size << 1) - 1;
-
- /* I'm sure the JFFS2 code has done me permanent damage.
- * I now think the following is _normal_
+++ /dev/null
---- a/include/linux/bcm963xx_tag.h
-+++ b/include/linux/bcm963xx_tag.h
-@@ -92,8 +92,10 @@ struct bcm_tag {
- __u32 rootfs_crc;
- /* 224-227: CRC32 of kernel partition */
- __u32 kernel_crc;
-- /* 228-235: Unused at present */
-- char reserved1[8];
-+ /* 228-231: Unused at present */
-+ char reserved1[4];
-+ /* 222-235: Openwrt: real rootfs length */
-+ __u32 real_rootfs_length;
- /* 236-239: CRC32 of header excluding last 20 bytes */
- __u32 header_crc;
- /* 240-255: Unused at present */
---- a/drivers/mtd/parsers/parser_imagetag.c
-+++ b/drivers/mtd/parsers/parser_imagetag.c
-@@ -137,7 +137,8 @@ static int bcm963xx_parse_imagetag_parti
- } else {
- /* OpenWrt layout */
- rootfsaddr = kerneladdr + kernellen;
-- rootfslen = spareaddr - rootfsaddr;
-+ rootfslen = buf->real_rootfs_length;
-+ spareaddr = rootfsaddr + rootfslen;
- }
- } else {
- goto out;
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -1634,7 +1634,7 @@ static int bcm_enet_change_mtu(struct ne
- return -EBUSY;
-
- /* add ethernet header + vlan tag size */
-- actual_mtu += VLAN_ETH_HLEN;
-+ actual_mtu += VLAN_ETH_HLEN + VLAN_HLEN;
-
- /*
- * setup maximum size before we get overflow mark in
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -97,6 +97,8 @@ void __init board_early_setup(const stru
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G3_EXT_MII |
- GPIO_MODE_6348_G0_EXT_MII;
-+ else if (BCMCPU_IS_6358())
-+ val |= GPIO_MODE_6358_ENET1_MII_CLK_INV;
- }
-
- bcm_gpio_writel(val, GPIO_MODE_REG);
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -652,6 +652,8 @@
- #define GPIO_MODE_6358_EXTRA_SPI_SS (1 << 7)
- #define GPIO_MODE_6358_SERIAL_LED (1 << 10)
- #define GPIO_MODE_6358_UTOPIA (1 << 12)
-+#define GPIO_MODE_6358_ENET1_MII_CLK_INV (1 << 30)
-+#define GPIO_MODE_6358_ENET0_MII_CLK_INV (1 << 31)
-
- #define GPIO_MODE_6368_ANALOG_AFE_0 (1 << 0)
- #define GPIO_MODE_6368_ANALOG_AFE_1 (1 << 1)
+++ /dev/null
-From 7fa63fdde703aaabaa7199ae879219737a98a3f3 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Fri, 6 Jan 2012 12:24:18 +0100
-Subject: [PATCH] NET: bcm63xx_enet: move phy_(dis)connect into probe/remove
-
-Only connect/disconnect the phy during probe and remove, not during any
-open/close. The phy seldom changes during the runtime, and disconnecting
-the phy during close will prevent it from keeping any configuration over
-a down/up cycle.
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 158 +++++++++++++--------------
- 1 file changed, 78 insertions(+), 80 deletions(-)
-
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -867,10 +867,8 @@ static int bcm_enet_open(struct net_devi
- struct bcm_enet_priv *priv;
- struct sockaddr addr;
- struct device *kdev;
-- struct phy_device *phydev;
- int i, ret;
- unsigned int size;
-- char phy_id[MII_BUS_ID_SIZE + 3];
- void *p;
- u32 val;
-
-@@ -878,40 +876,10 @@ static int bcm_enet_open(struct net_devi
- kdev = &priv->pdev->dev;
-
- if (priv->has_phy) {
-- /* connect to PHY */
-- snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
-- priv->mii_bus->id, priv->phy_id);
--
-- phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
-- PHY_INTERFACE_MODE_MII);
--
-- if (IS_ERR(phydev)) {
-- dev_err(kdev, "could not attach to PHY\n");
-- return PTR_ERR(phydev);
-- }
--
-- /* mask with MAC supported features */
-- phydev->supported &= (SUPPORTED_10baseT_Half |
-- SUPPORTED_10baseT_Full |
-- SUPPORTED_100baseT_Half |
-- SUPPORTED_100baseT_Full |
-- SUPPORTED_Autoneg |
-- SUPPORTED_Pause |
-- SUPPORTED_MII);
-- phydev->advertising = phydev->supported;
--
-- if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
-- phydev->advertising |= SUPPORTED_Pause;
-- else
-- phydev->advertising &= ~SUPPORTED_Pause;
--
-- phy_attached_info(phydev);
--
-+ /* Reset state */
- priv->old_link = 0;
- priv->old_duplex = -1;
- priv->old_pause = -1;
-- } else {
-- phydev = NULL;
- }
-
- /* mask all interrupts and request them */
-@@ -921,7 +889,7 @@ static int bcm_enet_open(struct net_devi
-
- ret = request_irq(dev->irq, bcm_enet_isr_mac, 0, dev->name, dev);
- if (ret)
-- goto out_phy_disconnect;
-+ return ret;
-
- ret = request_irq(priv->irq_rx, bcm_enet_isr_dma, 0,
- dev->name, dev);
-@@ -1083,8 +1051,8 @@ static int bcm_enet_open(struct net_devi
- enet_dmac_writel(priv, priv->dma_chan_int_mask,
- ENETDMAC_IRMASK, priv->tx_chan);
-
-- if (phydev)
-- phy_start(phydev);
-+ if (priv->has_phy)
-+ phy_start(dev->phydev);
- else
- bcm_enet_adjust_link(dev);
-
-@@ -1125,10 +1093,6 @@ out_freeirq_rx:
- out_freeirq:
- free_irq(dev->irq, dev);
-
--out_phy_disconnect:
-- if (phydev)
-- phy_disconnect(phydev);
--
- return ret;
- }
-
-@@ -1233,10 +1197,6 @@ static int bcm_enet_stop(struct net_devi
- free_irq(priv->irq_rx, dev);
- free_irq(dev->irq, dev);
-
-- /* release phy */
-- if (priv->has_phy)
-- phy_disconnect(dev->phydev);
--
- return 0;
- }
-
-@@ -1802,14 +1762,47 @@ static int bcm_enet_probe(struct platfor
-
- /* do minimal hardware init to be able to probe mii bus */
- bcm_enet_hw_preinit(priv);
-+ spin_lock_init(&priv->rx_lock);
-+
-+ /* init rx timeout (used for oom) */
-+ timer_setup(&priv->rx_timeout, bcm_enet_refill_rx_timer, 0);
-+
-+ /* init the mib update lock&work */
-+ mutex_init(&priv->mib_update_lock);
-+ INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
-+
-+ /* zero mib counters */
-+ for (i = 0; i < ENET_MIB_REG_COUNT; i++)
-+ enet_writel(priv, 0, ENET_MIB_REG(i));
-+
-+ /* register netdevice */
-+ dev->netdev_ops = &bcm_enet_ops;
-+ netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
-+
-+ dev->ethtool_ops = &bcm_enet_ethtool_ops;
-+ /* MTU range: 46 - 2028 */
-+ dev->min_mtu = ETH_ZLEN - ETH_HLEN;
-+ dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
-+ SET_NETDEV_DEV(dev, &pdev->dev);
-+
-+ ret = register_netdev(dev);
-+ if (ret)
-+ goto out_uninit_hw;
-+
-+ netif_carrier_off(dev);
-+ platform_set_drvdata(pdev, dev);
-+ priv->pdev = pdev;
-+ priv->net_dev = dev;
-
- /* MII bus registration */
- if (priv->has_phy) {
-+ struct phy_device *phydev;
-+ char phy_id[MII_BUS_ID_SIZE + 3];
-
- priv->mii_bus = mdiobus_alloc();
- if (!priv->mii_bus) {
- ret = -ENOMEM;
-- goto out_uninit_hw;
-+ goto out_unregister_netdev;
- }
-
- bus = priv->mii_bus;
-@@ -1833,6 +1826,35 @@ static int bcm_enet_probe(struct platfor
- dev_err(&pdev->dev, "unable to register mdio bus\n");
- goto out_free_mdio;
- }
-+
-+ /* connect to PHY */
-+ snprintf(phy_id, sizeof(phy_id), PHY_ID_FMT,
-+ priv->mii_bus->id, priv->phy_id);
-+
-+ phydev = phy_connect(dev, phy_id, bcm_enet_adjust_phy_link,
-+ PHY_INTERFACE_MODE_MII);
-+
-+ if (IS_ERR(phydev)) {
-+ dev_err(&pdev->dev, "could not attach to PHY\n");
-+ goto out_unregister_mdio;
-+ }
-+
-+ /* mask with MAC supported features */
-+ phydev->supported &= (SUPPORTED_10baseT_Half |
-+ SUPPORTED_10baseT_Full |
-+ SUPPORTED_100baseT_Half |
-+ SUPPORTED_100baseT_Full |
-+ SUPPORTED_Autoneg |
-+ SUPPORTED_Pause |
-+ SUPPORTED_MII);
-+ phydev->advertising = phydev->supported;
-+
-+ if (priv->pause_auto && priv->pause_rx && priv->pause_tx)
-+ phydev->advertising |= SUPPORTED_Pause;
-+ else
-+ phydev->advertising &= ~SUPPORTED_Pause;
-+
-+ phy_attached_info(phydev);
- } else {
-
- /* run platform code to initialize PHY device */
-@@ -1840,45 +1862,16 @@ static int bcm_enet_probe(struct platfor
- pd->mii_config(dev, 1, bcm_enet_mdio_read_mii,
- bcm_enet_mdio_write_mii)) {
- dev_err(&pdev->dev, "unable to configure mdio bus\n");
-- goto out_uninit_hw;
-+ goto out_unregister_netdev;
- }
- }
-
-- spin_lock_init(&priv->rx_lock);
--
-- /* init rx timeout (used for oom) */
-- timer_setup(&priv->rx_timeout, bcm_enet_refill_rx_timer, 0);
--
-- /* init the mib update lock&work */
-- mutex_init(&priv->mib_update_lock);
-- INIT_WORK(&priv->mib_update_task, bcm_enet_update_mib_counters_defer);
--
-- /* zero mib counters */
-- for (i = 0; i < ENET_MIB_REG_COUNT; i++)
-- enet_writel(priv, 0, ENET_MIB_REG(i));
--
-- /* register netdevice */
-- dev->netdev_ops = &bcm_enet_ops;
-- netif_napi_add(dev, &priv->napi, bcm_enet_poll, 16);
--
-- dev->ethtool_ops = &bcm_enet_ethtool_ops;
-- /* MTU range: 46 - 2028 */
-- dev->min_mtu = ETH_ZLEN - ETH_HLEN;
-- dev->max_mtu = BCMENET_MAX_MTU - VLAN_ETH_HLEN;
-- SET_NETDEV_DEV(dev, &pdev->dev);
--
-- ret = register_netdev(dev);
-- if (ret)
-- goto out_unregister_mdio;
--
-- netif_carrier_off(dev);
-- platform_set_drvdata(pdev, dev);
-- priv->pdev = pdev;
-- priv->net_dev = dev;
--
- return 0;
-
- out_unregister_mdio:
-+ if (dev->phydev)
-+ phy_disconnect(dev->phydev);
-+
- if (priv->mii_bus)
- mdiobus_unregister(priv->mii_bus);
-
-@@ -1886,6 +1879,9 @@ out_free_mdio:
- if (priv->mii_bus)
- mdiobus_free(priv->mii_bus);
-
-+out_unregister_netdev:
-+ unregister_netdev(dev);
-+
- out_uninit_hw:
- /* turn off mdc clock */
- enet_writel(priv, 0, ENET_MIISC_REG);
-@@ -1916,6 +1912,7 @@ static int bcm_enet_remove(struct platfo
- enet_writel(priv, 0, ENET_MIISC_REG);
-
- if (priv->has_phy) {
-+ phy_disconnect(dev->phydev);
- mdiobus_unregister(priv->mii_bus);
- mdiobus_free(priv->mii_bus);
- } else {
+++ /dev/null
-From d8237d704fc25eb2fc25ef4403608b78c6a6d4be Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 15 Jul 2012 20:08:57 +0200
-Subject: [PATCH 54/81] bcm63xx_enet: enable rgmii clock on external ports
-
----
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 13 +++++++++++++
- drivers/net/ethernet/broadcom/bcm63xx_enet.c | 12 ++++++++++++
- 2 files changed, 25 insertions(+), 0 deletions(-)
-
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -968,6 +968,19 @@
- #define ENETSW_PORTOV_FDX_MASK (1 << 1)
- #define ENETSW_PORTOV_LINKUP_MASK (1 << 0)
-
-+/* Port RGMII control register */
-+#define ENETSW_RGMII_CTRL_REG(x) (0x60 + (x))
-+#define ENETSW_RGMII_CTRL_GMII_CLK_EN (1 << 7)
-+#define ENETSW_RGMII_CTRL_MII_OVERRIDE_EN (1 << 6)
-+#define ENETSW_RGMII_CTRL_MII_MODE_MASK (3 << 4)
-+#define ENETSW_RGMII_CTRL_RGMII_MODE (0 << 4)
-+#define ENETSW_RGMII_CTRL_MII_MODE (1 << 4)
-+#define ENETSW_RGMII_CTRL_RVMII_MODE (2 << 4)
-+#define ENETSW_RGMII_CTRL_TIMING_SEL_EN (1 << 0)
-+
-+/* Port RGMII timing register */
-+#define ENETSW_RGMII_TIMING_REG(x) (0x68 + (x))
-+
- /* MDIO control register */
- #define ENETSW_MDIOC_REG (0xb0)
- #define ENETSW_MDIOC_EXT_MASK (1 << 16)
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2185,6 +2185,18 @@ static int bcm_enetsw_open(struct net_de
- priv->sw_port_link[i] = 0;
- }
-
-+ /* enable external ports */
-+ for (i = ENETSW_RGMII_PORT0; i < priv->num_ports; i++) {
-+ u8 rgmii_ctrl;
-+
-+ if (!priv->used_ports[i].used)
-+ continue;
-+
-+ rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
-+ enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
-+ }
-+
- /* reset mib */
- val = enetsw_readb(priv, ENETSW_GMCR_REG);
- val |= ENETSW_GMCR_RST_MIB_MASK;
+++ /dev/null
-From d135d94b3d1fe599d13e7198d5f502912d694c13 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Sun, 3 Jul 2011 15:00:38 +0200
-Subject: [PATCH 29/60] MIPS: BCM63XX: Register SPI flash if present
-
-Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
----
- arch/mips/bcm63xx/dev-flash.c | 35 +++++++++++++++++++-
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h | 2 +
- 2 files changed, 33 insertions(+), 2 deletions(-)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -17,6 +17,9 @@
- #include <linux/mtd/partitions.h>
- #include <linux/mtd/physmap.h>
- #include <linux/mtd/spi-nor.h>
-+#include <linux/of.h>
-+#include <linux/spi/spi.h>
-+#include <linux/spi/flash.h>
-
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
-@@ -66,6 +69,41 @@ void __init bcm63xx_flash_force_phys_bas
- mtd_resources[0].end = end;
- }
-
-+static struct spi_board_info bcm63xx_spi_flash_info[] = {
-+ {
-+ .bus_num = 0,
-+ .chip_select = 0,
-+ .mode = 0,
-+ .max_speed_hz = 781000,
-+ .modalias = "m25p80",
-+ },
-+};
-+
-+static void bcm63xx_of_update_spi_flash_speed(struct device_node *np,
-+ unsigned int new_hz)
-+{
-+ struct property *max_hz;
-+ __be32 *hz;
-+
-+ max_hz = kzalloc(sizeof(*max_hz) + sizeof(*hz), GFP_KERNEL);
-+ if (!max_hz)
-+ return;
-+
-+ max_hz->name = kstrdup("spi-max-frequency", GFP_KERNEL);
-+ if (!max_hz->name) {
-+ kfree(max_hz);
-+ return;
-+ }
-+
-+ max_hz->value = max_hz + 1;
-+ max_hz->length = sizeof(*hz);
-+
-+ hz = max_hz->value;
-+ *hz = cpu_to_be32(new_hz);
-+
-+ of_update_property(np, max_hz);
-+}
-+
- static int __init bcm63xx_detect_flash_type(void)
- {
- u32 val;
-@@ -73,9 +111,15 @@ static int __init bcm63xx_detect_flash_t
- switch (bcm63xx_get_cpu_id()) {
- case BCM6318_CPU_ID:
- /* only support serial flash */
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 62500000;
- return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6328_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6328_REG);
-+ if (val & STRAPBUS_6328_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 33333334;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 16666667;
-+
- if (val & STRAPBUS_6328_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
-@@ -94,12 +138,20 @@ static int __init bcm63xx_detect_flash_t
- return BCM63XX_FLASH_TYPE_SERIAL;
- case BCM6362_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_6362_REG);
-+ if (val & STRAPBUS_6362_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- if (val & STRAPBUS_6362_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
- return BCM63XX_FLASH_TYPE_NAND;
- case BCM6368_CPU_ID:
- val = bcm_gpio_readl(GPIO_STRAPBUS_REG);
-+ if (val & STRAPBUS_6368_SPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- switch (val & STRAPBUS_6368_BOOT_SEL_MASK) {
- case STRAPBUS_6368_BOOT_SEL_NAND:
- return BCM63XX_FLASH_TYPE_NAND;
-@@ -110,6 +162,11 @@ static int __init bcm63xx_detect_flash_t
- }
- case BCM63268_CPU_ID:
- val = bcm_misc_readl(MISC_STRAPBUS_63268_REG);
-+ if (val & STRAPBUS_63268_HSSPI_CLK_FAST)
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 50000000;
-+ else
-+ bcm63xx_spi_flash_info[0].max_speed_hz = 20000000;
-+
- if (val & STRAPBUS_63268_BOOT_SEL_SERIAL)
- return BCM63XX_FLASH_TYPE_SERIAL;
- else
-@@ -176,6 +233,7 @@ void __init bcm63xx_flash_detect(void)
-
- int __init bcm63xx_flash_register(void)
- {
-+ struct device_node *np;
- u32 val;
-
- switch (flash_type) {
-@@ -195,8 +253,14 @@ int __init bcm63xx_flash_register(void)
-
- return platform_device_register(&mtd_dev);
- case BCM63XX_FLASH_TYPE_SERIAL:
-- pr_warn("unsupported serial flash detected\n");
-- return -ENODEV;
-+ np = of_find_compatible_node(NULL, NULL, "jedec,spi-nor");
-+ if (np) {
-+ bcm63xx_of_update_spi_flash_speed(np, bcm63xx_spi_flash_info[0].max_speed_hz);
-+ of_node_put(np);
-+ return 0;
-+ } else {
-+ return -ENODEV;
-+ }
- case BCM63XX_FLASH_TYPE_NAND:
- pr_warn("unsupported NAND flash detected\n");
- return -ENODEV;
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_regs.h
-@@ -709,6 +709,7 @@
- #define GPIO_STRAPBUS_REG 0x40
- #define STRAPBUS_6358_BOOT_SEL_PARALLEL (1 << 1)
- #define STRAPBUS_6358_BOOT_SEL_SERIAL (0 << 1)
-+#define STRAPBUS_6368_SPI_CLK_FAST (1 << 6)
- #define STRAPBUS_6368_BOOT_SEL_MASK 0x3
- #define STRAPBUS_6368_BOOT_SEL_NAND 0
- #define STRAPBUS_6368_BOOT_SEL_SERIAL 1
-@@ -1565,6 +1566,7 @@
- #define IDDQ_CTRL_63268_USBH (1 << 4)
-
- #define MISC_STRAPBUS_6328_REG 0x240
-+#define STRAPBUS_6328_HSSPI_CLK_FAST (1 << 4)
- #define STRAPBUS_6328_FCVO_SHIFT 7
- #define STRAPBUS_6328_FCVO_MASK (0x1f << STRAPBUS_6328_FCVO_SHIFT)
- #define STRAPBUS_6328_BOOT_SEL_SERIAL (1 << 28)
+++ /dev/null
-From 8879e209111192c5e9752d7bd203cf7582693328 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 3 May 2012 14:40:03 +0200
-Subject: [PATCH 58/72] BCM63XX: allow providing fixup data in board data
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 9 ++++++++-
- arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 10 ++++++++++
- 2 files changed, 18 insertions(+), 1 deletion(-)
-
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -31,6 +31,7 @@
- #include <bcm63xx_dev_usb_ohci.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
-+#include <pci_ath9k_fixup.h>
-
- #include "board_common.h"
-
-@@ -177,6 +178,7 @@ static struct of_device_id of_ids[] = {
- int __init board_register_devices(void)
- {
- int usbh_ports = 0;
-+ int i;
-
- #if CONFIG_OF
- if (of_have_populated_dt()) {
-@@ -241,6 +243,10 @@ int __init board_register_devices(void)
- board.ephy_reset_gpio_flags);
- }
-
-+ /* register any fixups */
-+ for (i = 0; i < board.has_caldata; i++)
-+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
-+
- return 0;
- }
-
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -9,6 +9,7 @@
- #include <bcm63xx_dev_enet.h>
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_fallback_sprom.h>
-+#include <pci_ath9k_fixup.h>
-
- /*
- * flash mapping
-@@ -16,6 +17,11 @@
- #define BCM963XX_CFE_VERSION_OFFSET 0x570
- #define BCM963XX_NVRAM_OFFSET 0x580
-
-+struct ath9k_caldata {
-+ unsigned int slot;
-+ u32 caldata_offset;
-+};
-+
- /*
- * board definition
- */
-@@ -33,6 +39,10 @@ struct board_info {
- unsigned int has_ehci0:1;
- unsigned int has_usbd:1;
- unsigned int use_fallback_sprom:1;
-+ unsigned int has_caldata:2;
-+
-+ /* wifi calibration data config */
-+ struct ath9k_caldata caldata[2];
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
+++ /dev/null
-From 066f1e37742ee434496d32a41a9284458de96742 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 13 Jan 2014 12:12:30 +0100
-Subject: [PATCH] MIPS: BCM63XX: export the attached flash type
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- arch/mips/bcm63xx/dev-flash.c | 5 +++++
- arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 ++
- 2 files changed, 7 insertions(+)
-
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -270,3 +270,8 @@ int __init bcm63xx_flash_register(void)
- return -ENODEV;
- }
- }
-+
-+int bcm63xx_flash_get_type(void)
-+{
-+ return flash_type;
-+}
---- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_dev_flash.h
-@@ -14,4 +14,6 @@ void bcm63xx_flash_force_phys_base_addre
-
- int __init bcm63xx_flash_register(void);
-
-+int bcm63xx_flash_get_type(void);
-+
- #endif /* __BCM63XX_FLASH_H */
+++ /dev/null
-From bbebbf735a02b6d044ed928978ab4bd5f1833364 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Thu, 3 May 2012 14:36:11 +0200
-Subject: [PATCH 61/72] BCM63XX: add a fixup for ath9k devices
-
----
- arch/mips/bcm63xx/Makefile | 3 +-
- arch/mips/bcm63xx/pci-ath9k-fixup.c | 190 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/pci_ath9k_fixup.h | 7 +
- 3 files changed, 199 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/pci-ath9k-fixup.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
-- sprom.o
-+ pci-ath9k-fixup.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- /dev/null
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -0,0 +1,200 @@
-+/*
-+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
-+ *
-+ * Copytight (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * Based on
-+ *
-+ * Atheros AP94 reference board PCI initialization
-+ *
-+ * Copyright (C) 2009-2010 Gabor Juhos <juhosg@openwrt.org>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/pci.h>
-+#include <linux/delay.h>
-+#include <linux/ath9k_platform.h>
-+
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_nvram.h>
-+#include <bcm63xx_dev_pci.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <pci_ath9k_fixup.h>
-+
-+#define bcm_hsspi_writel(v, o) bcm_rset_writel(RSET_HSSPI, (v), (o))
-+
-+struct ath9k_fixup {
-+ unsigned slot;
-+ u8 mac[ETH_ALEN];
-+ struct ath9k_platform_data pdata;
-+};
-+
-+static int ath9k_num_fixups;
-+static struct ath9k_fixup ath9k_fixups[2] = {
-+ {
-+ .slot = 255,
-+ .pdata = {
-+ .led_pin = -1,
-+ },
-+ },
-+ {
-+ .slot = 255,
-+ .pdata = {
-+ .led_pin = -1,
-+ },
-+ },
-+};
-+
-+static u16 *bcm63xx_read_eeprom(u16 *eeprom, u32 offset)
-+{
-+ u32 addr;
-+
-+ if (BCMCPU_IS_6328()) {
-+ addr = 0x18000000;
-+ } else {
-+ addr = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ addr &= MPI_CSBASE_BASE_MASK;
-+ }
-+
-+ switch (bcm63xx_flash_get_type()) {
-+ case BCM63XX_FLASH_TYPE_PARALLEL:
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ return eeprom;
-+ case BCM63XX_FLASH_TYPE_SERIAL:
-+ /* the first megabyte is memory mapped */
-+ if (offset < 0x100000) {
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + offset), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ return eeprom;
-+ }
-+
-+ if (BCMCPU_IS_6328()) {
-+ /* we can change the memory mapped megabyte */
-+ bcm_hsspi_writel(offset & 0xf00000, 0x18);
-+ memcpy(eeprom, (void *)KSEG1ADDR(addr + (offset & 0xfffff)), ATH9K_PLAT_EEP_MAX_WORDS * sizeof(u16));
-+ bcm_hsspi_writel(0, 0x18);
-+ return eeprom;
-+ }
-+ /* can't do anything here without talking to the SPI controller. */
-+ case BCM63XX_FLASH_TYPE_NAND:
-+ default:
-+ return NULL;
-+ }
-+}
-+
-+static void ath9k_pci_fixup(struct pci_dev *dev)
-+{
-+ void __iomem *mem;
-+ struct ath9k_platform_data *pdata = NULL;
-+ struct pci_dev *bridge = pci_upstream_bridge(dev);
-+ u16 *cal_data = NULL;
-+ u16 cmd;
-+ u32 bar0;
-+ u32 val;
-+ unsigned i;
-+
-+ for (i = 0; i < ath9k_num_fixups; i++) {
-+ if (ath9k_fixups[i].slot != PCI_SLOT(dev->devfn))
-+ continue;
-+
-+ cal_data = ath9k_fixups[i].pdata.eeprom_data;
-+ pdata = &ath9k_fixups[i].pdata;
-+ break;
-+ }
-+
-+ if (cal_data == NULL)
-+ return;
-+
-+ if (*cal_data != 0xa55a) {
-+ pr_err("pci %s: invalid calibration data\n", pci_name(dev));
-+ return;
-+ }
-+
-+ pr_info("pci %s: fixup device configuration\n", pci_name(dev));
-+
-+ switch (bcm63xx_get_cpu_id()) {
-+ case BCM6328_CPU_ID:
-+ val = BCM_PCIE_MEM_BASE_PA_6328;
-+ break;
-+ case BCM6348_CPU_ID:
-+ case BCM6358_CPU_ID:
-+ case BCM6368_CPU_ID:
-+ val = BCM_PCI_MEM_BASE_PA;
-+ break;
-+ default:
-+ BUG();
-+ }
-+
-+ mem = ioremap(val, 0x10000);
-+ if (!mem) {
-+ pr_err("pci %s: ioremap error\n", pci_name(dev));
-+ return;
-+ }
-+
-+ if (bridge)
-+ pci_enable_device(bridge);
-+
-+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+ pci_read_config_dword(dev, PCI_BASE_ADDRESS_0, &bar0);
-+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, val);
-+
-+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+ cmd |= PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
-+ pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+ /* set offset to first reg address */
-+ cal_data += 3;
-+ while(*cal_data != 0xffff) {
-+ u32 reg;
-+ reg = *cal_data++;
-+ val = *cal_data++;
-+ val |= (*cal_data++) << 16;
-+
-+ writel(val, mem + reg);
-+ udelay(100);
-+ }
-+
-+ pci_read_config_dword(dev, PCI_VENDOR_ID, &val);
-+ dev->vendor = val & 0xffff;
-+ dev->device = (val >> 16) & 0xffff;
-+
-+ pci_read_config_dword(dev, PCI_CLASS_REVISION, &val);
-+ dev->revision = val & 0xff;
-+ dev->class = val >> 8; /* upper 3 bytes */
-+
-+ pci_read_config_word(dev, PCI_COMMAND, &cmd);
-+ cmd &= ~(PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY);
-+ pci_write_config_word(dev, PCI_COMMAND, cmd);
-+
-+ pci_write_config_dword(dev, PCI_BASE_ADDRESS_0, bar0);
-+
-+ if (bridge)
-+ pci_disable_device(bridge);
-+
-+ iounmap(mem);
-+
-+ dev->dev.platform_data = pdata;
-+}
-+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-+
-+void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
-+{
-+ if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
-+ return;
-+
-+ ath9k_fixups[ath9k_num_fixups].slot = slot;
-+
-+ if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
-+ return;
-+
-+ if (bcm63xx_nvram_get_mac_address(ath9k_fixups[ath9k_num_fixups].mac))
-+ return;
-+
-+ ath9k_fixups[ath9k_num_fixups].pdata.macaddr = ath9k_fixups[ath9k_num_fixups].mac;
-+ ath9k_num_fixups++;
-+}
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -0,0 +1,7 @@
-+#ifndef _PCI_ATH9K_FIXUP
-+#define _PCI_ATH9K_FIXUP
-+
-+
-+void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
-+
-+#endif /* _PCI_ATH9K_FIXUP */
+++ /dev/null
---- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -2,6 +2,7 @@
- #define _PCI_ATH9K_FIXUP
-
-
--void pci_enable_ath9k_fixup(unsigned slot, u32 offset) __init;
-+void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-+ unsigned endian_check) __init;
-
- #endif /* _PCI_ATH9K_FIXUP */
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -20,6 +20,7 @@
- struct ath9k_caldata {
- unsigned int slot;
- u32 caldata_offset;
-+ unsigned int endian_check:1;
- };
-
- /*
---- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -182,12 +182,14 @@ static void ath9k_pci_fixup(struct pci_d
- }
- DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-
--void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset)
-+void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-+ unsigned endian_check)
- {
- if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
- return;
-
- ath9k_fixups[ath9k_num_fixups].slot = slot;
-+ ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
-
- if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
- return;
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -245,7 +245,8 @@ int __init board_register_devices(void)
-
- /* register any fixups */
- for (i = 0; i < board.has_caldata; i++)
-- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset);
-+ pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-+ board.caldata[i].endian_check);
-
- return 0;
- }
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -246,7 +246,7 @@ int __init board_register_devices(void)
- /* register any fixups */
- for (i = 0; i < board.has_caldata; i++)
- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-- board.caldata[i].endian_check);
-+ board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
-
- return 0;
- }
---- a/arch/mips/bcm63xx/pci-ath9k-fixup.c
-+++ b/arch/mips/bcm63xx/pci-ath9k-fixup.c
-@@ -183,13 +183,15 @@ static void ath9k_pci_fixup(struct pci_d
- DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_ATHEROS, PCI_ANY_ID, ath9k_pci_fixup);
-
- void __init pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-- unsigned endian_check)
-+ unsigned endian_check, int led_pin, bool led_active_high)
- {
- if (ath9k_num_fixups >= ARRAY_SIZE(ath9k_fixups))
- return;
-
- ath9k_fixups[ath9k_num_fixups].slot = slot;
- ath9k_fixups[ath9k_num_fixups].pdata.endian_check = endian_check;
-+ ath9k_fixups[ath9k_num_fixups].pdata.led_pin = led_pin;
-+ ath9k_fixups[ath9k_num_fixups].pdata.led_active_high = led_active_high;
-
- if (!bcm63xx_read_eeprom(ath9k_fixups[ath9k_num_fixups].pdata.eeprom_data, offset))
- return;
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -21,6 +21,8 @@ struct ath9k_caldata {
- unsigned int slot;
- u32 caldata_offset;
- unsigned int endian_check:1;
-+ int led_pin;
-+ bool led_active_high;
- };
-
- /*
---- a/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_ath9k_fixup.h
-@@ -3,6 +3,6 @@
-
-
- void pci_enable_ath9k_fixup(unsigned slot, u32 offset,
-- unsigned endian_check) __init;
-+ unsigned endian_check, int led_pin, bool led_active_high) __init;
-
- #endif /* _PCI_ATH9K_FIXUP */
+++ /dev/null
-From 5ed5b5e9614fa5b02da699ab565af76c7e63d64d Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Mon, 7 Jan 2013 17:45:39 +0100
-Subject: [PATCH 72/72] 446-BCM63XX-add-a-fixup-for-rt2x00-devices
-
----
- arch/mips/bcm63xx/Makefile | 2 +-
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 17 ++++-
- arch/mips/bcm63xx/dev-flash.c | 2 +-
- arch/mips/bcm63xx/pci-rt2x00-fixup.c | 71 ++++++++++++++++++++
- .../include/asm/mach-bcm63xx/bcm63xx_dev_flash.h | 2 +-
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 9 ++-
- .../include/asm/mach-bcm63xx/pci_rt2x00_fixup.h | 9 +++
- 7 files changed, 104 insertions(+), 8 deletions(-)
- create mode 100644 arch/mips/bcm63xx/pci-rt2x00-fixup.c
- create mode 100644 arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
-
---- a/arch/mips/bcm63xx/Makefile
-+++ b/arch/mips/bcm63xx/Makefile
-@@ -3,7 +3,7 @@ obj-y += clk.o cpu.o cs.o gpio.o irq.o
- setup.o timer.o dev-enet.o dev-flash.o dev-pcmcia.o \
- dev-rng.o dev-wdt.o \
- dev-usb-ehci.o dev-usb-ohci.o dev-usb-usbd.o usb-common.o \
-- pci-ath9k-fixup.o sprom.o
-+ pci-ath9k-fixup.o pci-rt2x00-fixup.o sprom.o
- obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
-
- obj-y += boards/
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -32,6 +32,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <board_bcm963xx.h>
- #include <pci_ath9k_fixup.h>
-+#include <pci_rt2x00_fixup.h>
-
- #include "board_common.h"
-
-@@ -244,9 +245,19 @@ int __init board_register_devices(void)
- }
-
- /* register any fixups */
-- for (i = 0; i < board.has_caldata; i++)
-- pci_enable_ath9k_fixup(board.caldata[i].slot, board.caldata[i].caldata_offset,
-- board.caldata[i].endian_check, board.caldata[i].led_pin, board.caldata[i].led_active_high);
-+ for (i = 0; i < board.has_caldata; i++) {
-+ switch (board.caldata[i].vendor) {
-+ case PCI_VENDOR_ID_ATHEROS:
-+ pci_enable_ath9k_fixup(board.caldata[i].slot,
-+ board.caldata[i].caldata_offset, board.caldata[i].endian_check,
-+ board.caldata[i].led_pin, board.caldata[i].led_active_high);
-+ break;
-+ case PCI_VENDOR_ID_RALINK:
-+ pci_enable_rt2x00_fixup(board.caldata[i].slot,
-+ board.caldata[i].eeprom);
-+ break;
-+ }
-+ }
-
- return 0;
- }
---- /dev/null
-+++ b/arch/mips/bcm63xx/pci-rt2x00-fixup.c
-@@ -0,0 +1,72 @@
-+/*
-+ * Broadcom BCM63XX RT2x00 EEPROM fixup helper.
-+ *
-+ * Copyright (C) 2012 Álvaro Fernández Rojas <noltari@gmail.com>
-+ *
-+ * Based on
-+ *
-+ * Broadcom BCM63XX Ath9k EEPROM fixup helper.
-+ *
-+ * Copyright (C) 2012 Jonas Gorski <jonas.gorski@gmail.com>
-+ *
-+ * This program is free software; you can redistribute it and/or modify it
-+ * under the terms of the GNU General Public License version 2 as published
-+ * by the Free Software Foundation.
-+ */
-+
-+#include <linux/if_ether.h>
-+#include <linux/pci.h>
-+#include <linux/platform_device.h>
-+#include <linux/rt2x00_platform.h>
-+
-+#include <bcm63xx_nvram.h>
-+#include <pci_rt2x00_fixup.h>
-+
-+struct rt2x00_fixup {
-+ unsigned slot;
-+ u8 mac[ETH_ALEN];
-+ struct rt2x00_platform_data pdata;
-+};
-+
-+static int rt2x00_num_fixups;
-+static struct rt2x00_fixup rt2x00_fixups[2] = {
-+ {
-+ .slot = 255,
-+ },
-+ {
-+ .slot = 255,
-+ },
-+};
-+
-+static void rt2x00_pci_fixup(struct pci_dev *dev)
-+{
-+ unsigned i;
-+ struct rt2x00_platform_data *pdata = NULL;
-+
-+ for (i = 0; i < rt2x00_num_fixups; i++) {
-+ if (rt2x00_fixups[i].slot != PCI_SLOT(dev->devfn))
-+ continue;
-+
-+ pdata = &rt2x00_fixups[i].pdata;
-+ break;
-+ }
-+
-+ dev->dev.platform_data = pdata;
-+}
-+DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_RALINK, PCI_ANY_ID, rt2x00_pci_fixup);
-+
-+void __init pci_enable_rt2x00_fixup(unsigned slot, char* eeprom)
-+{
-+ if (rt2x00_num_fixups >= ARRAY_SIZE(rt2x00_fixups))
-+ return;
-+
-+ rt2x00_fixups[rt2x00_num_fixups].slot = slot;
-+ rt2x00_fixups[rt2x00_num_fixups].pdata.eeprom_file_name = kstrdup(eeprom, GFP_KERNEL);
-+
-+ if (bcm63xx_nvram_get_mac_address(rt2x00_fixups[rt2x00_num_fixups].mac))
-+ return;
-+
-+ rt2x00_fixups[rt2x00_num_fixups].pdata.mac_address = rt2x00_fixups[rt2x00_num_fixups].mac;
-+ rt2x00_num_fixups++;
-+}
-+
---- a/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-+++ b/arch/mips/include/asm/mach-bcm63xx/board_bcm963xx.h
-@@ -10,6 +10,7 @@
- #include <bcm63xx_dev_usb_usbd.h>
- #include <bcm63xx_fallback_sprom.h>
- #include <pci_ath9k_fixup.h>
-+#include <pci_rt2x00_fixup.h>
-
- /*
- * flash mapping
-@@ -17,12 +18,16 @@
- #define BCM963XX_CFE_VERSION_OFFSET 0x570
- #define BCM963XX_NVRAM_OFFSET 0x580
-
--struct ath9k_caldata {
-+struct bcm63xx_caldata {
-+ unsigned int vendor;
- unsigned int slot;
- u32 caldata_offset;
-+ /* Atheros */
- unsigned int endian_check:1;
- int led_pin;
- bool led_active_high;
-+ /* Ralink */
-+ char* eeprom;
- };
-
- /*
-@@ -45,7 +50,7 @@ struct board_info {
- unsigned int has_caldata:2;
-
- /* wifi calibration data config */
-- struct ath9k_caldata caldata[2];
-+ struct bcm63xx_caldata caldata[2];
-
- /* ethernet config */
- struct bcm63xx_enet_platform_data enet0;
---- /dev/null
-+++ b/arch/mips/include/asm/mach-bcm63xx/pci_rt2x00_fixup.h
-@@ -0,0 +1,9 @@
-+#ifndef _PCI_RT2X00_FIXUP
-+#define _PCI_RT2X00_FIXUP
-+
-+#define PCI_VENDOR_ID_RALINK 0x1814
-+
-+void pci_enable_rt2x00_fixup(unsigned slot, char* eeprom) __init;
-+
-+#endif /* _PCI_RT2X00_FIXUP */
-+
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.h
-@@ -332,6 +332,9 @@ struct bcm_enet_priv {
- struct bcm63xx_enetsw_port used_ports[ENETSW_MAX_PORT];
- int sw_port_link[ENETSW_MAX_PORT];
-
-+ /* platform device for associated switch */
-+ struct platform_device *b53_device;
-+
- /* used to poll switch port state */
- struct timer_list swphy_poll;
- spinlock_t enetsw_mdio_lock;
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -30,6 +30,7 @@
- #include <linux/dma-mapping.h>
- #include <linux/platform_device.h>
- #include <linux/if_vlan.h>
-+#include <linux/platform_data/b53.h>
-
- #include <bcm63xx_dev_enet.h>
- #include "bcm63xx_enet.h"
-@@ -1932,7 +1933,8 @@ static int bcm_enet_remove(struct platfo
- return 0;
- }
-
--struct platform_driver bcm63xx_enet_driver = {
-+
-+static struct platform_driver bcm63xx_enet_driver = {
- .probe = bcm_enet_probe,
- .remove = bcm_enet_remove,
- .driver = {
-@@ -1941,6 +1943,42 @@ struct platform_driver bcm63xx_enet_driv
- },
- };
-
-+struct b53_platform_data bcm63xx_b53_pdata = {
-+ .chip_id = 0x6300,
-+ .big_endian = 1,
-+};
-+
-+struct platform_device bcm63xx_b53_dev = {
-+ .name = "b53-switch",
-+ .id = -1,
-+ .dev = {
-+ .platform_data = &bcm63xx_b53_pdata,
-+ },
-+};
-+
-+static int bcmenet_switch_register(struct bcm_enet_priv *priv, u16 port_mask)
-+{
-+ int ret;
-+
-+ bcm63xx_b53_pdata.regs = priv->base;
-+ bcm63xx_b53_pdata.enabled_ports = port_mask;
-+ bcm63xx_b53_pdata.alias = priv->net_dev->name;
-+
-+ ret = platform_device_register(&bcm63xx_b53_dev);
-+ if (!ret)
-+ priv->b53_device = &bcm63xx_b53_dev;
-+
-+ return ret;
-+}
-+
-+static void bcmenet_switch_unregister(struct bcm_enet_priv *priv)
-+{
-+ if (priv->b53_device)
-+ platform_device_unregister(&bcm63xx_b53_dev);
-+
-+ priv->b53_device = NULL;
-+}
-+
- /*
- * switch mii access callbacks
- */
-@@ -2197,29 +2235,6 @@ static int bcm_enetsw_open(struct net_de
- enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
- }
-
-- /* reset mib */
-- val = enetsw_readb(priv, ENETSW_GMCR_REG);
-- val |= ENETSW_GMCR_RST_MIB_MASK;
-- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-- mdelay(1);
-- val &= ~ENETSW_GMCR_RST_MIB_MASK;
-- enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-- mdelay(1);
--
-- /* force CPU port state */
-- val = enetsw_readb(priv, ENETSW_IMPOV_REG);
-- val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
-- enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
--
-- /* enable switch forward engine */
-- val = enetsw_readb(priv, ENETSW_SWMODE_REG);
-- val |= ENETSW_SWMODE_FWD_EN_MASK;
-- enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
--
-- /* enable jumbo on all ports */
-- enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
-- enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
--
- /* initialize flow control buffer allocation */
- enet_dma_writel(priv, ENETDMA_BUFALLOC_FORCE_MASK | 0,
- ENETDMA_BUFALLOC_REG(priv->rx_chan));
-@@ -2675,6 +2690,9 @@ static int bcm_enetsw_probe(struct platf
- struct bcm63xx_enetsw_platform_data *pd;
- struct resource *res_mem;
- int ret, irq_rx, irq_tx;
-+ unsigned i, num_ports = 0;
-+ u16 port_mask = BIT(8);
-+ u8 val;
-
- if (!bcm_enet_shared_base[0])
- return -EPROBE_DEFER;
-@@ -2755,6 +2773,43 @@ static int bcm_enetsw_probe(struct platf
- priv->pdev = pdev;
- priv->net_dev = dev;
-
-+ /* reset mib */
-+ val = enetsw_readb(priv, ENETSW_GMCR_REG);
-+ val |= ENETSW_GMCR_RST_MIB_MASK;
-+ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+ mdelay(1);
-+ val &= ~ENETSW_GMCR_RST_MIB_MASK;
-+ enetsw_writeb(priv, val, ENETSW_GMCR_REG);
-+ mdelay(1);
-+
-+ /* force CPU port state */
-+ val = enetsw_readb(priv, ENETSW_IMPOV_REG);
-+ val |= ENETSW_IMPOV_FORCE_MASK | ENETSW_IMPOV_LINKUP_MASK;
-+ enetsw_writeb(priv, val, ENETSW_IMPOV_REG);
-+
-+ /* enable switch forward engine */
-+ val = enetsw_readb(priv, ENETSW_SWMODE_REG);
-+ val |= ENETSW_SWMODE_FWD_EN_MASK;
-+ enetsw_writeb(priv, val, ENETSW_SWMODE_REG);
-+
-+ /* enable jumbo on all ports */
-+ enetsw_writel(priv, 0x1ff, ENETSW_JMBCTL_PORT_REG);
-+ enetsw_writew(priv, 9728, ENETSW_JMBCTL_MAXSIZE_REG);
-+
-+ for (i = 0; i < priv->num_ports; i++) {
-+ struct bcm63xx_enetsw_port *port = &priv->used_ports[i];
-+
-+ if (!port->used)
-+ continue;
-+
-+ num_ports++;
-+ port_mask |= BIT(i);
-+ }
-+
-+ /* only register if there is more than one external port */
-+ if (num_ports > 1)
-+ bcmenet_switch_register(priv, port_mask);
-+
- return 0;
-
- out_disable_clk:
-@@ -2776,6 +2831,9 @@ static int bcm_enetsw_remove(struct plat
- priv = netdev_priv(dev);
- unregister_netdev(dev);
-
-+ /* remove switch */
-+ bcmenet_switch_unregister(priv);
-+
- clk_disable_unprepare(priv->mac_clk);
-
- free_netdev(dev);
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2734,9 +2734,9 @@ static int bcm_enetsw_probe(struct platf
- if (ret)
- goto out;
-
-- priv->base = devm_ioremap_resource(&pdev->dev, res_mem);
-- if (IS_ERR(priv->base)) {
-- ret = PTR_ERR(priv->base);
-+ priv->base = devm_ioremap(&pdev->dev, res_mem->start, resource_size(res_mem));
-+ if (priv->base == NULL) {
-+ ret = -ENOMEM;
- goto out;
- }
-
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -77,6 +77,8 @@ static struct board_info __initdata boar
-
- .has_enet0 = 1,
- .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -90,6 +92,8 @@ static struct board_info __initdata boar
-
- .has_enet0 = 1,
- .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -138,6 +142,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -162,6 +168,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -186,6 +194,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -208,6 +218,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -231,6 +243,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -252,6 +266,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -271,6 +287,8 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -298,6 +316,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -323,6 +343,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -348,6 +370,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
-@@ -371,6 +395,8 @@ static struct board_info __initdata boar
- },
-
- .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
- .force_speed_100 = 1,
- .force_duplex_full = 1,
- },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -46,7 +46,7 @@ static struct board_info __initdata boar
- .ephy_reset_gpio = 36,
- .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_3368 */
-
- /*
- * known 6328 boards
-@@ -65,7 +65,7 @@ static struct board_info __initdata boar
- .port_no = 0,
- },
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
- * known 6338 boards
-@@ -98,7 +98,7 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
- * known 6345 boards
-@@ -108,7 +108,7 @@ static struct board_info __initdata boar
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
- * known 6348 boards
-@@ -295,7 +295,7 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
- * known 6358 boards
-@@ -403,7 +403,7 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
--#endif
-+#endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
- * all boards
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -295,6 +295,21 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
-+
-+static struct board_info __initdata board_96348_D4PW = {
-+ .name = "D-4P-W",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -431,6 +446,7 @@ static const struct board_info __initcon
- &board_DV201AMR,
- &board_96348gw_a,
- &board_rta1025w_16,
-+ &board_96348_D4PW,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -462,6 +478,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -418,6 +418,60 @@ static struct board_info __initdata boar
-
- .has_ohci0 = 1,
- };
-+
-+static struct board_info __initdata board_nb4_ser_r0 = {
-+ .name = "NB4-SER-r0",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+};
-+
-+static struct board_info __initdata board_nb4_fxc_r1 = {
-+ .name = "NB4-FXC-r1",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -454,6 +508,8 @@ static const struct board_info __initcon
- &board_96358vw2,
- &board_AGPFS0,
- &board_DWVS0,
-+ &board_nb4_ser_r0,
-+ &board_nb4_fxc_r1,
- #endif
- };
-
-@@ -495,6 +551,8 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
-+ { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
-+ { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -98,6 +98,20 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct board_info __initdata board_96338w2_e7t = {
-+ .name = "96338W2_E7T",
-+ .expected_cpu_id = 0x6338,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
-@@ -487,6 +501,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
- &board_96338w,
-+ &board_96338w2_e7t,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-@@ -524,6 +539,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
- { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+ { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -385,6 +385,25 @@ static struct board_info __initdata boar
- .num_usbh_ports = 2,
- };
-
-+static struct board_info __initdata board_CPVA642 = {
-+ .name = "CPVA642",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
-+
-+
- static struct board_info __initdata board_AGPFS0 = {
- .name = "AGPF-S0",
- .expected_cpu_id = 0x6358,
-@@ -522,6 +541,7 @@ static const struct board_info __initcon
- &board_96358vw,
- &board_96358vw2,
- &board_AGPFS0,
-+ &board_CPVA642,
- &board_DWVS0,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-@@ -569,6 +589,7 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
- { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
- { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
-+ { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -452,6 +452,22 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+/* D-Link DSL-274xB revison C2/C3 */
-+static struct board_info __initdata board_dsl_274xb_rev_c = {
-+ .name = "AW4139",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_nb4_ser_r0 = {
- .name = "NB4-SER-r0",
- .expected_cpu_id = 0x6358,
-@@ -543,6 +559,7 @@ static const struct board_info __initcon
- &board_AGPFS0,
- &board_CPVA642,
- &board_DWVS0,
-+ &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- #endif
-@@ -582,6 +599,7 @@ static struct of_device_id const bcm963x
- { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
- { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -324,6 +324,36 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct sprom_fixup __initdata spw500v_fixups[] = {
-+ { .offset = 46, .value = 0x3046 },
-+ { .offset = 47, .value = 0x15a7 },
-+ { .offset = 48, .value = 0xfa89 },
-+ { .offset = 49, .value = 0xfe79 },
-+ { .offset = 57, .value = 0x6a49 },
-+};
-+
-+static struct board_info __initdata board_spw500v = {
-+ .name = "SPW500V",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = spw500v_fixups,
-+ .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -551,6 +581,7 @@ static const struct board_info __initcon
- &board_96348gw_a,
- &board_rta1025w_16,
- &board_96348_D4PW,
-+ &board_spw500v,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -592,6 +623,7 @@ static struct of_device_id const bcm963x
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
-+ { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -217,6 +217,48 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+static struct board_info __initdata board_gw6200 = {
-+ .name = "GW6200",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+};
-+
-+static struct board_info __initdata board_gw6000 = {
-+ .name = "GW6000",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+};
-+
-+
-+
- static struct board_info __initdata board_FAST2404 = {
- .name = "F@ST2404",
- .expected_cpu_id = 0x6348,
-@@ -574,6 +616,8 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
- &board_96348gw,
-+ &board_gw6000,
-+ &board_gw6200,
- &board_96348gw_10,
- &board_96348gw_11,
- &board_FAST2404,
-@@ -624,6 +668,8 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
-+ { .compatible = "tecom,gw6000", .data = &board_gw6000, },
-+ { .compatible = "tecom,gw6200", .data = &board_gw6200, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -396,6 +396,31 @@ static struct board_info __initdata boar
- .num_board_fixups = ARRAY_SIZE(spw500v_fixups),
- },
- };
-+
-+static struct board_info __initdata board_96348sv = {
-+ .name = "MAGIC",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ /* it has BP_ENET_EXTERNAL_PHY */
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -626,6 +651,7 @@ static const struct board_info __initcon
- &board_rta1025w_16,
- &board_96348_D4PW,
- &board_spw500v,
-+ &board_96348sv,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -670,6 +696,7 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
-+ { .compatible = "telsey,magic", .data = &board_96348sv, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -618,6 +618,32 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- .num_usbh_ports = 2,
- };
-+
-+static struct board_info __initdata board_HW553 = {
-+ .name = "HW553",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -663,6 +689,7 @@ static const struct board_info __initcon
- &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-+ &board_HW553,
- #endif
- };
-
-@@ -706,6 +733,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -112,6 +112,20 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+static struct board_info __initdata board_rta1320_16m = {
-+ .name = "RTA1320_16M",
-+ .expected_cpu_id = 0x6338,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6338 */
-
- /*
-@@ -660,6 +674,7 @@ static const struct board_info __initcon
- &board_96338gw,
- &board_96338w,
- &board_96338w2_e7t,
-+ &board_rta1320_16m,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-@@ -704,6 +719,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
- { .compatible = "brcm,bcm96338w", .data = &board_96338w, },
-+ { .compatible = "dynalink,rta1320", .data = &board_rta1320_16m, },
- { .compatible = "d-link,dsl-2640u", .data = &board_96338w2_e7t, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -658,6 +658,20 @@ static struct board_info __initdata boar
- .pci_dev = 1,
- },
- };
-+
-+ /* T-Home Speedport W 303V Typ B */
-+static struct board_info __initdata board_spw303v = {
-+ .name = "96358-502V",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -705,6 +719,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_HW553,
-+ &board_spw303v,
- #endif
- };
-
-@@ -756,6 +771,7 @@ static struct of_device_id const bcm963x
- { .compatible = "pirelli,agpf-s0", .data = &board_AGPFS0, },
- { .compatible = "sfr,neufbox-4-sercomm-r0", .data = &board_nb4_ser_r0, },
- { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
-+ { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -435,6 +435,26 @@ static struct board_info __initdata boar
- .has_pccard = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct board_info __initdata board_V2500V_BB = {
-+ .name = "V2500V_BB",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6348 */
-
- /*
-@@ -707,6 +727,7 @@ static const struct board_info __initcon
- &board_96348_D4PW,
- &board_spw500v,
- &board_96348sv,
-+ &board_V2500V_BB,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -746,6 +767,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
-@@ -805,6 +827,22 @@ void __init board_bcm963xx_init(void)
- val &= MPI_CSBASE_BASE_MASK;
- }
- boot_addr = (u8 *)KSEG1ADDR(val);
-+ pr_info("Boot address 0x%08x\n",(unsigned int)boot_addr);
-+
-+ /* BT Voyager 2500V (RTA1046VW PCB) has 8 Meg flash used as two */
-+ /* banks of 4 Meg. The byte at 0xBF800000 identifies the back to use.*/
-+ /* Loading firmware from the CFE Prompt always loads to Bank 0 */
-+ /* Do an early check of CFE and then select bank 0 */
-+
-+ if (boot_addr == (u8 *)0xbf800000) {
-+ u8 *tmp_boot_addr = (u8*)0xbfc00000;
-+
-+ bcm63xx_nvram_init(tmp_boot_addr + BCM963XX_NVRAM_OFFSET);
-+ if (!strcmp(bcm63xx_nvram_get_name(), "V2500V_BB")) {
-+ pr_info("V2500V: nvram bank 0\n");
-+ boot_addr = tmp_boot_addr;
-+ }
-+ }
-
- /* dump cfe version */
- cfe = boot_addr + BCM963XX_CFE_VERSION_OFFSET;
---- a/arch/mips/bcm63xx/dev-flash.c
-+++ b/arch/mips/bcm63xx/dev-flash.c
-@@ -21,6 +21,7 @@
- #include <linux/spi/spi.h>
- #include <linux/spi/flash.h>
-
-+#include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
- #include <bcm63xx_dev_flash.h>
- #include <bcm63xx_regs.h>
-@@ -247,6 +248,13 @@ int __init bcm63xx_flash_register(void)
- val = bcm_mpi_readl(MPI_CSBASE_REG(0));
- val &= MPI_CSBASE_BASE_MASK;
-
-+ /* BT Voyager 2500V has 8 Meg flash in two 4 Meg banks */
-+ /* Loading from CFE always uses Bank 0 */
-+ if (!strcmp(board_get_name(), "V2500V_BB")) {
-+ pr_info("V2500V: Start in Bank 0\n");
-+ val = val + 0x400000; // Select Bank 0 start address
-+ }
-+
- mtd_resources[0].start = val;
- mtd_resources[0].end = 0x1FFFFFFF;
- }
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -208,6 +208,24 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+
-+/* BT Voyager 2110 */
-+static struct board_info __initdata board_V2110 = {
-+ .name = "V2110",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -728,6 +746,7 @@ static const struct board_info __initcon
- &board_spw500v,
- &board_96348sv,
- &board_V2500V_BB,
-+ &board_V2110,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -767,6 +786,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348gw-11", .data = &board_96348gw_11, },
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
-+ { .compatible = "bt,voyager-2110", .data = &board_V2110, },
- { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+++ /dev/null
-From e796582b499f0ba6acaa1ac3a10c09cceaab7702 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 9 Mar 2014 04:55:52 +0100
-Subject: [PATCH] MIPS: BCM63XX: add inventel Livebox support
-
----
- arch/mips/bcm63xx/boards/Kconfig | 6 +
- arch/mips/bcm63xx/boards/Makefile | 1 +
- arch/mips/bcm63xx/boards/board_common.c | 2 +-
- arch/mips/bcm63xx/boards/board_common.h | 6 +
- arch/mips/bcm63xx/boards/board_livebox.c | 215 ++++++++++++++++++++++++++++++
- 5 files changed, 229 insertions(+), 1 deletion(-)
- create mode 100644 arch/mips/bcm63xx/boards/board_livebox.c
-
---- a/arch/mips/bcm63xx/boards/Kconfig
-+++ b/arch/mips/bcm63xx/boards/Kconfig
-@@ -12,4 +12,10 @@ config BOARD_BCM963XX
- select BCMA
- default y
-
-+config BOARD_LIVEBOX
-+ bool "Inventel Livebox(es) boards"
-+ select SSB
-+ help
-+ Inventel Livebox boards using the RedBoot bootloader.
-+
- endmenu
---- a/arch/mips/bcm63xx/boards/Makefile
-+++ b/arch/mips/bcm63xx/boards/Makefile
-@@ -1,2 +1,3 @@
- obj-y += board_common.o
- obj-$(CONFIG_BOARD_BCM963XX) += board_bcm963xx.o
-+obj-$(CONFIG_BOARD_LIVEBOX) += board_livebox.o
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -54,7 +54,7 @@ void __init board_prom_init(void)
- if (fw_arg3 == CFE_EPTSEAL)
- board_bcm963xx_init();
- else
-- panic("unsupported bootloader detected");
-+ board_livebox_init();
- }
-
- static int (*board_get_mac_address)(u8 mac[ETH_ALEN]);
---- a/arch/mips/bcm63xx/boards/board_common.h
-+++ b/arch/mips/bcm63xx/boards/board_common.h
-@@ -24,4 +24,10 @@ static inline void board_of_device_prese
- }
- #endif
-
-+#if defined(CONFIG_BOARD_LIVEBOX)
-+void board_livebox_init(void);
-+#else
-+static inline void board_livebox_init(void) { }
-+#endif
-+
- #endif /* __BOARD_COMMON_H */
---- /dev/null
-+++ b/arch/mips/bcm63xx/boards/board_livebox.c
-@@ -0,0 +1,155 @@
-+/*
-+ * This file is subject to the terms and conditions of the GNU General Public
-+ * License. See the file "COPYING" in the main directory of this archive
-+ * for more details.
-+ *
-+ * Copyright (C) 2008 Florian Fainelli <florian@openwrt.org>
-+ */
-+
-+#include <linux/init.h>
-+#include <linux/kernel.h>
-+#include <linux/string.h>
-+#include <linux/input.h>
-+#include <asm/addrspace.h>
-+#include <bcm63xx_board.h>
-+#include <bcm63xx_cpu.h>
-+#include <bcm63xx_regs.h>
-+#include <bcm63xx_io.h>
-+#include <bcm63xx_dev_flash.h>
-+#include <board_bcm963xx.h>
-+
-+#include "board_common.h"
-+
-+#define PFX "board_livebox: "
-+
-+static unsigned int mac_addr_used = 0;
-+
-+/*
-+ * known 6348 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+static struct board_info __initdata board_livebox_blue5g = {
-+ .name = "Livebox-blue-5g",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 31,
-+ },
-+
-+ .ephy_reset_gpio = 6,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+};
-+#endif
-+
-+/*
-+ * all boards
-+ */
-+static const struct board_info __initdata *bcm963xx_boards[] = {
-+#ifdef CONFIG_BCM63XX_CPU_6348
-+ &board_livebox_blue5g
-+#endif
-+};
-+
-+static struct of_device_id const livebox_boards_dt[] = {
-+ { .compatible = "inventel,livebox-1", .data = &board_livebox_blue5g, },
-+ { }
-+};
-+
-+/*
-+ * register & return a new board mac address
-+ */
-+static int livebox_get_mac_address(u8 *mac)
-+{
-+ u8 *p;
-+ int count;
-+
-+ memcpy(mac, (u8 *)0xBEBFF377, ETH_ALEN);
-+
-+ p = mac + ETH_ALEN - 1;
-+ count = mac_addr_used;
-+
-+ while (count--) {
-+ do {
-+ (*p)++;
-+ if (*p != 0)
-+ break;
-+ p--;
-+ } while (p != mac);
-+ }
-+
-+ if (p == mac) {
-+ printk(KERN_ERR PFX "unable to fetch mac address\n");
-+ return -ENODEV;
-+ }
-+ mac_addr_used++;
-+
-+ return 0;
-+}
-+
-+/*
-+ * early init callback
-+ */
-+#define LIVEBOX_GPIO_DETECT_MASK 0x000000ff
-+#define LIVEBOX_BOOT_ADDR 0x1e400000
-+
-+#define LIVEBOX_HW_BLUE5G_9 0x90
-+
-+void __init board_livebox_init(void)
-+{
-+ u32 val;
-+ u8 hw_version;
-+ const struct board_info *board;
-+ const struct of_device_id *board_match;
-+
-+ /* find board by compat */
-+ board_match = bcm63xx_match_board(livebox_boards_dt);
-+ if (board_match) {
-+ board = board_match->data;
-+ } else {
-+ /* Get hardware version */
-+ val = bcm_gpio_readl(GPIO_CTL_LO_REG);
-+ val &= ~LIVEBOX_GPIO_DETECT_MASK;
-+ bcm_gpio_writel(val, GPIO_CTL_LO_REG);
-+
-+ hw_version = bcm_gpio_readl(GPIO_DATA_LO_REG);
-+ hw_version &= LIVEBOX_GPIO_DETECT_MASK;
-+
-+ switch (hw_version) {
-+ case LIVEBOX_HW_BLUE5G_9:
-+ printk(KERN_INFO PFX "Livebox BLUE5G.9\n");
-+ board = bcm963xx_boards[0];
-+ break;
-+ default:
-+ printk(KERN_INFO PFX "Unknown livebox version: %02x\n",
-+ hw_version);
-+ /* use default livebox configuration */
-+ board = bcm963xx_boards[0];
-+ break;
-+ }
-+ }
-+
-+ /* use default livebox configuration */
-+ board_early_setup(board, livebox_get_mac_address);
-+
-+ /* read base address of boot chip select (0) */
-+ val = bcm_mpi_readl(MPI_CSBASE_REG(0));
-+ val &= MPI_CSBASE_BASE_MASK;
-+ if (val != LIVEBOX_BOOT_ADDR) {
-+ printk(KERN_NOTICE PFX "flash address is: 0x%08x, forcing to: 0x%08x\n",
-+ val, LIVEBOX_BOOT_ADDR);
-+ bcm63xx_flash_force_phys_base_address(LIVEBOX_BOOT_ADDR, 0x1ebfffff);
-+ }
-+}
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -226,6 +226,33 @@ static struct board_info __initdata boar
- };
-
-
-+static struct board_info __initdata board_ct536_ct5621 = {
-+ .name = "CT536_CT5621",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 0,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -747,6 +774,7 @@ static const struct board_info __initcon
- &board_96348sv,
- &board_V2500V_BB,
- &board_V2110,
-+ &board_ct536_ct5621,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -788,6 +816,8 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96348gw-a", .data = &board_96348gw_a, },
- { .compatible = "bt,voyager-2110", .data = &board_V2110, },
- { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
-+ { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
-+ { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -626,6 +626,7 @@ static struct board_info __initdata boar
- },
-
- .has_ohci0 = 1,
-+ .has_ehci0 = 1,
- };
-
- /* D-Link DSL-274xB revison C2/C3 */
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -253,6 +253,30 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_96348A_122 = {
-+ .name = "96348A-122",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_96348gw = {
- .name = "96348GW",
- .expected_cpu_id = 0x6348,
-@@ -776,6 +800,7 @@ static const struct board_info __initcon
- &board_V2500V_BB,
- &board_V2110,
- &board_ct536_ct5621,
-+ &board_96348A_122,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -818,6 +843,7 @@ static struct of_device_id const bcm963x
- { .compatible = "bt,voyager-2110", .data = &board_V2110, },
- { .compatible = "bt,voyager-2500v-bb", .data = &board_V2500V_BB, },
- { .compatible = "comtrend,ct-536plus", .data = &board_ct536_ct5621, },
-+ { .compatible = "comtrend,ct-5365", .data = &board_96348A_122, },
- { .compatible = "comtrend,ct-5621", .data = &board_ct536_ct5621, },
- { .compatible = "d-link,dsl-2640b-b", .data = &board_96348_D4PW, },
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -225,6 +225,33 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_CPVA502plus = {
-+ .name = "CPVA502+",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ },
-+
-+ .ephy_reset_gpio = 4,
-+ .ephy_reset_gpio_flags = GPIO_ACTIVE_LOW,
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-
- static struct board_info __initdata board_ct536_ct5621 = {
- .name = "CT536_CT5621",
-@@ -801,6 +828,7 @@ static const struct board_info __initcon
- &board_V2110,
- &board_ct536_ct5621,
- &board_96348A_122,
-+ &board_CPVA502plus,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -853,6 +881,7 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
-+ { .compatible = "telsey,cpva502plus", .data = &board_CPVA502plus, },
- { .compatible = "telsey,magic", .data = &board_96348sv, },
- { .compatible = "tp-link,td-w8900gb", .data = &board_96348gw_11, },
- { .compatible = "usrobotics,usr9108", .data = &board_96348gw_a, },
+++ /dev/null
-From eeacc2529942051504bc957726aa178671344421 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Wed, 20 Jan 2010 16:21:30 +0100
-Subject: [PATCH 32/63] bcm63xx: add support for 96368MVWG board.
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 95 ++++++++++++++++++++
- .../mips/include/asm/mach-bcm63xx/board_bcm963xx.h | 2 +
- 2 files changed, 97 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -792,6 +792,58 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-+ * known 6368 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+static struct board_info __initdata board_96368mvwg = {
-+ .name = "96368MVWG",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port1",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port2",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0x12,
-+ .name = "port0",
-+ },
-+
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0x11,
-+ .name = "port3",
-+ },
-+ },
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6368 */
-+
-+/*
- * all boards
- */
- static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -843,6 +895,10 @@ static const struct board_info __initcon
- &board_HW553,
- &board_spw303v,
- #endif
-+
-+#ifdef CONFIG_BCM63XX_CPU_6368
-+ &board_96368mvwg,
-+#endif
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-@@ -903,6 +959,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- #endif
---- a/arch/mips/bcm63xx/boards/board_common.c
-+++ b/arch/mips/bcm63xx/boards/board_common.c
-@@ -81,12 +81,25 @@ void __init board_early_setup(const stru
- bcm63xx_pci_enabled = 1;
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G2_PCI;
-+
-+ if (BCMCPU_IS_6368())
-+ val |= GPIO_MODE_6368_PCI_REQ1 |
-+ GPIO_MODE_6368_PCI_GNT1 |
-+ GPIO_MODE_6368_PCI_INTB |
-+ GPIO_MODE_6368_PCI_REQ0 |
-+ GPIO_MODE_6368_PCI_GNT0;
- }
- #endif
-
- if (board.has_pccard) {
- if (BCMCPU_IS_6348())
- val |= GPIO_MODE_6348_G1_MII_PCCARD;
-+
-+ if (BCMCPU_IS_6368())
-+ val |= GPIO_MODE_6368_PCMCIA_CD1 |
-+ GPIO_MODE_6368_PCMCIA_CD2 |
-+ GPIO_MODE_6368_PCMCIA_VS1 |
-+ GPIO_MODE_6368_PCMCIA_VS2;
- }
-
- if (board.has_enet0 && !board.enet0.use_internal_phy) {
+++ /dev/null
-From f457fc2eb9bb915b5a4d251c7c68d4694cf07b01 Mon Sep 17 00:00:00 2001
-From: Maxime Bizon <mbizon@freebox.fr>
-Date: Fri, 4 Nov 2011 12:33:48 +0100
-Subject: [PATCH 33/63] bcm63xx: add support for 96368MVNgr board.
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 67 +++++++++++++++++++++++++++++
- 1 files changed, 67 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -841,6 +841,45 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct board_info __initdata board_96368mvngr = {
-+ .name = "96368MVNgr",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-@@ -898,6 +937,7 @@ static const struct board_info __initcon
-
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
-+ &board_96368mvngr,
- #endif
- };
-
-@@ -959,6 +999,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
-From c93c2bbf0cc96da5a47d77f01daf6c983cfe4216 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 29 May 2012 10:52:25 +0200
-Subject: [PATCH] MIPS: BCM63XX: add 96328avng reference board
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 77 +++++++++++++++++++++++++++++
- 1 files changed, 77 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -64,6 +64,33 @@ static struct board_info __initdata boar
- .use_fullspeed = 0,
- .port_no = 0,
- },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
- };
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
+++ /dev/null
-From f0649f7b7c672cf452a1796a1422bf615e1973f8 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Tue, 29 May 2012 11:01:12 +0200
-Subject: [PATCH] MIPS: BCM63XX: add 963281TAN reference board
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 71 +++++++++++++++++++++++++++++
- 1 files changed, 71 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -92,6 +92,40 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_963281TAN = {
-+ .name = "963281TAN",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -918,6 +952,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_963281TAN,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -974,6 +1009,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
-From 66808f706b3dcd83a9f5157997ff478a880a2906 Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jonas.gorski@gmail.com>
-Date: Mon, 30 Apr 2012 09:10:51 +0200
-Subject: [PATCH 70/79] MIPS: BCM63XX: Add board definition for D-Link
- DSL-274xB rev F1
-
----
- arch/mips/bcm63xx/boards/board_bcm963xx.c | 104 +++++++++++++++++++++++++++++
- 1 files changed, 104 insertions(+), 0 deletions(-)
-
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -126,6 +126,51 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_dsl_274xb_f1 = {
-+ .name = "AW4339U",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0x7d1000,
-+ .slot = 0,
-+ .led_pin = -1,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 1",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -953,6 +998,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_963281TAN,
-+ &board_dsl_274xb_f1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -1011,6 +1057,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -568,6 +568,24 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- };
-
-+/* NetGear DG834G v4 */
-+static struct board_info __initdata board_96348W3 = {
-+ .name = "96348W3",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .has_ohci0 = 1,
-+};
-+
- static struct board_info __initdata board_96348_D4PW = {
- .name = "D-4P-W",
- .expected_cpu_id = 0x6348,
-@@ -1028,6 +1046,7 @@ static const struct board_info __initcon
- &board_ct536_ct5621,
- &board_96348A_122,
- &board_CPVA502plus,
-+ &board_96348W3,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -1083,6 +1102,7 @@ static struct of_device_id const bcm963x
- { .compatible = "davolink,dv-201amr", .data = &board_DV201AMR, },
- { .compatible = "dynalink,rta1025w", .data = &board_rta1025w_16, },
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
-+ { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -874,6 +874,30 @@ static struct board_info __initdata boar
- .num_usbh_ports = 2,
- };
-
-+static struct board_info __initdata board_ct6373_1 = {
-+ .name = "CT6373-1",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW553 = {
- .name = "HW553",
- .expected_cpu_id = 0x6358,
-@@ -1058,6 +1082,7 @@ static const struct board_info __initcon
- &board_dsl_274xb_rev_c,
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
-+ &board_ct6373_1,
- &board_HW553,
- &board_spw303v,
- #endif
-@@ -1116,6 +1141,7 @@ static struct of_device_id const bcm963x
- { .compatible = "alcatel,rg100a", .data = &board_96358vw2, },
- { .compatible = "brcm,bcm96358vw", .data = &board_96358vw, },
- { .compatible = "brcm,bcm96358vw2", .data = &board_96358vw2, },
-+ { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -937,6 +937,33 @@ static struct board_info __initdata boar
- .use_internal_phy = 1,
- },
- };
-+
-+/* D-Link DVA-G3810BN/TL */
-+static struct board_info __initdata board_DVAG3810BN = {
-+ .name = "DVAG3810BN",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_enet0 = 1,
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+
-+ .has_ohci0 = 1,
-+ .has_pccard = 1,
-+ .has_ehci0 = 1,
-+};
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
- /*
-@@ -1085,6 +1112,7 @@ static const struct board_info __initcon
- &board_ct6373_1,
- &board_HW553,
- &board_spw303v,
-+ &board_DVAG3810BN,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-@@ -1144,6 +1172,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ct-6373", .data = &board_ct6373_1, },
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
-+ { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -966,6 +966,32 @@ static struct board_info __initdata boar
- };
- #endif /* CONFIG_BCM63XX_CPU_6358 */
-
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+static struct board_info __initdata board_nb6 = {
-+ .name = "NB6",
-+ .expected_cpu_id = 0x6362,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6362 */
-+
- /*
- * known 6368 boards
- */
-@@ -1115,6 +1141,10 @@ static const struct board_info __initcon
- &board_DVAG3810BN,
- #endif
-
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+ &board_nb6,
-+#endif
-+
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-@@ -1183,6 +1213,9 @@ static struct of_device_id const bcm963x
- { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6362
-+ { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -501,6 +501,22 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_FAST2604 = {
-+ .name = "F@ST2604",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_rta1025w_16 = {
- .name = "RTA1025W_16",
- .expected_cpu_id = 0x6348,
-@@ -1112,6 +1128,7 @@ static const struct board_info __initcon
- &board_96348gw_10,
- &board_96348gw_11,
- &board_FAST2404,
-+ &board_FAST2604,
- &board_DV201AMR,
- &board_96348gw_a,
- &board_rta1025w_16,
-@@ -1187,6 +1204,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,dg834gt-pn", .data = &board_96348gw_10, },
- { .compatible = "netgear,dg834g-v4", .data = &board_96348W3, },
- { .compatible = "sagem,fast-2404", .data = &board_FAST2404, },
-+ { .compatible = "sagem,fast-2604", .data = &board_FAST2604, },
- { .compatible = "t-com,speedport-w-500v", .data = &board_spw500v, },
- { .compatible = "tecom,gw6000", .data = &board_gw6000, },
- { .compatible = "tecom,gw6200", .data = &board_gw6200, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -127,6 +127,49 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_A4001N1 = {
-+ .name = "963281T_TEF",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- static struct board_info __initdata board_dsl_274xb_f1 = {
- .name = "AW4339U",
- .expected_cpu_id = 0x6328,
-@@ -1109,6 +1152,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_963281TAN,
-+ &board_A4001N1,
- &board_dsl_274xb_f1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
-@@ -1174,6 +1218,7 @@ static struct of_device_id const bcm963x
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -93,6 +93,78 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5387un_fixups[] = {
-+ { .offset = 2, .value = 0x05bb },
-+ { .offset = 65, .value = 0x1204 },
-+ { .offset = 78, .value = 0x0303 },
-+ { .offset = 79, .value = 0x0202 },
-+ { .offset = 80, .value = 0xff02 },
-+ { .offset = 87, .value = 0x0315 },
-+ { .offset = 88, .value = 0x0315 },
-+ { .offset = 96, .value = 0x2048 },
-+ { .offset = 97, .value = 0xff11 },
-+ { .offset = 98, .value = 0x1567 },
-+ { .offset = 99, .value = 0xfb24 },
-+ { .offset = 100, .value = 0x3e3c },
-+ { .offset = 101, .value = 0x4038 },
-+ { .offset = 102, .value = 0xfe7f },
-+ { .offset = 103, .value = 0x1279 },
-+ { .offset = 112, .value = 0x2048 },
-+ { .offset = 113, .value = 0xff03 },
-+ { .offset = 114, .value = 0x154c },
-+ { .offset = 115, .value = 0xfb27 },
-+ { .offset = 116, .value = 0x3e3c },
-+ { .offset = 117, .value = 0x4038 },
-+ { .offset = 118, .value = 0xfe87 },
-+ { .offset = 119, .value = 0x1233 },
-+ { .offset = 203, .value = 0x2226 },
-+};
-+
-+static struct board_info __initdata board_AR5387un = {
-+ .name = "96328A-1441N1",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5387un_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5387un_fixups),
-+ },
-+};
-+
- static struct board_info __initdata board_963281TAN = {
- .name = "963281TAN",
- .expected_cpu_id = 0x6328,
-@@ -1151,6 +1223,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AR5387un,
- &board_963281TAN,
- &board_A4001N1,
- &board_dsl_274xb_f1,
-@@ -1221,6 +1294,7 @@ static struct of_device_id const bcm963x
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -93,6 +93,60 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5381u_fixups[] = {
-+ { .offset = 97, .value = 0xfee5 },
-+ { .offset = 98, .value = 0x157c },
-+ { .offset = 99, .value = 0xfae7 },
-+ { .offset = 113, .value = 0xfefa },
-+ { .offset = 114, .value = 0x15d6 },
-+ { .offset = 115, .value = 0xfaf8 },
-+};
-+
-+static struct board_info __initdata board_AR5381u = {
-+ .name = "96328A-1241N",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5381u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5381u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata ar5387un_fixups[] = {
- { .offset = 2, .value = 0x05bb },
- { .offset = 65, .value = 0x1204 },
-@@ -1223,6 +1277,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
- &board_A4001N1,
-@@ -1294,6 +1349,7 @@ static struct of_device_id const bcm963x
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
-+ { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -411,6 +411,20 @@ static struct board_info __initdata boar
- .name = "96345GW2",
- .expected_cpu_id = 0x6345,
- };
-+
-+static struct board_info __initdata board_rta770bw = {
-+ .name = "RTA770BW",
-+ .expected_cpu_id = 0x6345,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
-@@ -1291,6 +1305,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
-+ &board_rta770bw,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
-@@ -1361,6 +1376,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
-+ { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -12,6 +12,7 @@
- #include <linux/init.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
-+#include <linux/pci_ids.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -1123,6 +1124,92 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HW556_C = {
-+ .name = "HW556_C",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0xeffe00,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+static struct board_info __initdata board_HW556_A = {
-+ .name = "HW556_A",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0xf7e000,
-+ .slot = 1,
-+ .endian_check = 1,
-+ .led_pin = 2,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+static struct board_info __initdata board_HW556_B = {
-+ .name = "HW556_B",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_ATHEROS,
-+ .caldata_offset = 0xefe000,
-+ .slot = 1,
-+ .endian_check = 1,
-+ .led_pin = 2,
-+ .led_active_high = 1,
-+ },
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
- /* T-Home Speedport W 303V Typ B */
- static struct board_info __initdata board_spw303v = {
- .name = "96358-502V",
-@@ -1341,6 +1428,9 @@ static const struct board_info __initcon
- &board_nb4_fxc_r1,
- &board_ct6373_1,
- &board_HW553,
-+ &board_HW556_A,
-+ &board_HW556_B,
-+ &board_HW556_C,
- &board_spw303v,
- &board_DVAG3810BN,
- #endif
-@@ -1413,6 +1503,9 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
-+ { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
-+ { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
-+ { .compatible = "huawei,echolife-hg556a-c", .data = &board_HW556_C, },
- { .compatible = "pirelli,a226g", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m", .data = &board_DWVS0, },
- { .compatible = "pirelli,a226m-fwb", .data = &board_DWVS0, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -426,6 +426,25 @@ static struct board_info __initdata boar
- .force_duplex_full = 1,
- },
- };
-+
-+// Actually this board is the very same as the rta770bw,
-+// where the additional 'b' within the name just
-+// just indicates 'Annex B'. The ADSL Modem itself is able
-+// to handle both Annex A as well as Annex B -
-+// the loaded firmware makes the only difference
-+static struct board_info __initdata board_rta770w = {
-+ .name = "RTA770W",
-+ .expected_cpu_id = 0x6345,
-+
-+ .has_enet0 = 1,
-+
-+ .enet0 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6345 */
-
- /*
-@@ -1393,6 +1412,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6345
- &board_96345gw2,
- &board_rta770bw,
-+ &board_rta770w,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- &board_96348r,
-@@ -1467,6 +1487,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6345
- { .compatible = "brcm,bcm96345gw2", .data = &board_96345gw2, },
- { .compatible = "dynalink,rta770bw", .data = &board_rta770bw, },
-+ { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
+++ /dev/null
-From: Marcin Jurkowski <marcin1j@gmail.com>
-Date: Thu, 31 Oct 2013 22:33:10 +0000
-Subject: [PATCH] bcm63xx: Add kernel support for Sagemcom F@ST2704V2 ADSL
- router
-
-This adds kernel support support for Sagemcom F@st 2704 wireless ADSL
-router.
-It's a BCM6328-based 802.11n wireless router with USB port and ADSL2+
-modem equipped with 64 MiB RAM and 8 MiB flash.
-
-Signed-off-by: Marcin Jurkowski <marcin1j@gmail.com>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -341,6 +341,43 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_FAST2704V2 = {
-+ .name = "F@ST2704V2",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .has_usbd = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -1402,6 +1439,7 @@ static const struct board_info __initcon
- &board_963281TAN,
- &board_A4001N1,
- &board_dsl_274xb_f1,
-+ &board_FAST2704V2,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -1477,6 +1515,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
-+ { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
-From: Max Staudt <openwrt.max@enpas.org>
-Date: Wed, 15 Jan 2014 18:51:13 +0000
-Subject: [PATCH] brcm63xx: F@ST2504n board support (Linux-3.10.26)
-
-Signed-off-by: Max Staudt <openwrt.max@enpas.org>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1332,6 +1332,41 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_fast2504n = {
-+ .name = "F@ST2504n",
-+ .expected_cpu_id = 0x6362,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6362 */
-
- /*
-@@ -1495,6 +1530,7 @@ static const struct board_info __initcon
-
- #ifdef CONFIG_BCM63XX_CPU_6362
- &board_nb6,
-+ &board_fast2504n,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-@@ -1576,6 +1612,7 @@ static struct of_device_id const bcm963x
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6362
-+ { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
- { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -50,6 +50,55 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_3368 */
-
- /*
-+ * known 6318 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+static struct board_info __initdata board_96318ref = {
-+ .name = "96318REF",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_6318 */
-+
-+/*
- * known 6328 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_6328
-@@ -1467,6 +1516,9 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_3368
- &board_cvg834g,
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ &board_96318ref,
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
- &board_AR5381u,
-@@ -1544,6 +1596,9 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_3368
- { .compatible = "netgear,cvg834g", .data = &board_cvg834g, },
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_6318
-+ { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
-+#endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -96,6 +96,50 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_96318ref_p300 = {
-+ .name = "96318REF_P300",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -1518,6 +1562,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
-+ &board_96318ref_p300,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -1598,6 +1643,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
-+ { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1554,6 +1554,50 @@ static struct board_info __initdata boar
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-+ * known 63268/63269 boards
-+ */
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+static struct board_info __initdata board_963269bhr = {
-+ .name = "963269BHR",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_pci = 1,
-+
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+#endif /* CONFIG_BCM63XX_CPU_63268 */
-+
-+/*
- * all boards
- */
- static const struct board_info __initconst *bcm963xx_boards[] = {
-@@ -1634,6 +1678,9 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- #endif
-+#ifdef CONFIG_BCM63XX_CPU_63268
-+ &board_963269bhr,
-+#endif
- };
-
- static struct of_device_id const bcm963xx_boards_dt[] = {
-@@ -1721,6 +1768,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
-From: "mexit@o2.pl" <mexit@o2.pl>
-Date: Sun, 24 Nov 2013 21:33:38 +0000
-Subject: [PATCH 4/5] brcm63xx: add support for Asmax AR 1004g router
-
-Support for Asmax AR 1004g router
-
-Signed-off-by: Adrian Feliks <mexit@o2.pl>
----
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -647,6 +647,21 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_96348gw_10_AR1004G = {
-+ .name = "AR1004G",
-+ .expected_cpu_id = 0x6348,
-+
-+ .has_enet1 = 1,
-+ .has_pci = 1,
-+
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+};
-+
-
- /* BT Voyager 2110 */
- static struct board_info __initdata board_V2110 = {
-@@ -1649,6 +1664,7 @@ static const struct board_info __initcon
- &board_96348A_122,
- &board_CPVA502plus,
- &board_96348W3,
-+ &board_96348gw_10_AR1004G,
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6358
-@@ -1713,6 +1729,7 @@ static struct of_device_id const bcm963x
- { .compatible = "dynalink,rta770w", .data = &board_rta770w, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6348
-+ { .compatible = "asmax,ar-1004g", .data = &board_96348gw_10_AR1004G, },
- { .compatible = "belkin,f5d7633", .data = &board_96348gw_10, },
- { .compatible = "brcm,bcm96348r", .data = &board_96348r, },
- { .compatible = "brcm,bcm96348gw-10", .data = &board_96348gw_10, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1610,6 +1610,51 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_vw6339gu = {
-+ .name = "VW6339GU",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN2",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN4",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 7,
-+ .name = "WAN",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_63268 */
-
- /*
-@@ -1696,6 +1741,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- &board_963269bhr,
-+ &board_vw6339gu,
- #endif
- };
-
-@@ -1786,6 +1832,7 @@ static struct of_device_id const bcm963x
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
-+ { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1572,6 +1572,64 @@ static struct board_info __initdata boar
- * known 63268/63269 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_63268
-+static struct board_info __initdata board_963268bu_p300 = {
-+ .name = "963268BU_P300",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_usbd = 1,
-+
-+ .usbd = {
-+ .use_fullspeed = 0,
-+ .port_no = 0,
-+ },
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 17,
-+ .name = "FE1",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "GbE2",
-+ },
-+
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0,
-+ .name = "GbE3",
-+ },
-+
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "GbE1",
-+ },
-+
-+ [6] = {
-+ .used = 1,
-+ .phy_id = 24,
-+ .name = "GbE4",
-+ },
-+
-+ [7] = {
-+ .used = 1,
-+ .phy_id = 25,
-+ .name = "GbE5",
-+ },
-+ },
-+ },
-+};
-+
- static struct board_info __initdata board_963269bhr = {
- .name = "963269BHR",
- .expected_cpu_id = 0x63268,
-@@ -1740,6 +1798,7 @@ static const struct board_info __initcon
- &board_96368mvngr,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ &board_963268bu_p300,
- &board_963269bhr,
- &board_vw6339gu,
- #endif
-@@ -1831,6 +1890,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-+ { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -13,6 +13,8 @@
- #include <linux/kernel.h>
- #include <linux/string.h>
- #include <linux/pci_ids.h>
-+#include <linux/platform_data/b53.h>
-+#include <linux/spi/spi.h>
- #include <asm/addrspace.h>
- #include <bcm63xx_board.h>
- #include <bcm63xx_cpu.h>
-@@ -1566,6 +1568,47 @@ static struct board_info __initdata boar
- .has_ohci0 = 1,
- .has_ehci0 = 1,
- };
-+
-+static struct sprom_fixup __initdata wap5813n_fixups[] = {
-+ { .offset = 97, .value = 0xfeed },
-+ { .offset = 98, .value = 0x15d1 },
-+ { .offset = 99, .value = 0xfb0d },
-+ { .offset = 113, .value = 0xfef7 },
-+ { .offset = 114, .value = 0x15f7 },
-+ { .offset = 115, .value = 0xfb1a },
-+};
-+
-+static struct board_info __initdata board_WAP5813n = {
-+ .name = "96369R-1231N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [4] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = wap5813n_fixups,
-+ .num_board_fixups = ARRAY_SIZE(wap5813n_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6368 */
-
- /*
-@@ -1796,6 +1839,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- &board_963268bu_p300,
-@@ -1888,6 +1932,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
-+ { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1569,6 +1569,59 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct sprom_fixup __initdata vr3025u_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3025u = {
-+ .name = "96368M-1541N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3025u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3025u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -1839,6 +1892,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_VR3025u,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -1932,6 +1986,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6368
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
-+ { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1622,6 +1622,59 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vr3025un_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3025un = {
-+ .name = "96368M-1341N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3025un_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3025un_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -1893,6 +1946,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_VR3025u,
-+ &board_VR3025un,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -1987,6 +2041,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
-+ { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1578,6 +1578,48 @@ static struct sprom_fixup __initdata vr3
- { .offset = 115, .value = 0xfad9 },
- };
-
-+static struct board_info __initdata board_P870HW51A_V2 = {
-+ .name = "P870HW-51a_v2",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_VR3025u = {
- .name = "96368M-1541N",
- .expected_cpu_id = 0x6368,
-@@ -1945,6 +1987,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
- &board_WAP5813n,
-@@ -2043,6 +2086,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
- { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1264,6 +1264,36 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HW520 = {
-+ .name = "HW6358GW_B",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enet0 = 1,
-+ .enet0 = {
-+ .has_phy = 1,
-+ .use_internal_phy = 1,
-+ },
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4318,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW553 = {
- .name = "HW553",
- .expected_cpu_id = 0x6358,
-@@ -1971,6 +2001,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_ct6373_1,
-+ &board_HW520,
- &board_HW553,
- &board_HW556_A,
- &board_HW556_B,
-@@ -2063,6 +2094,7 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-274xb-c2", .data = &board_dsl_274xb_rev_c, },
- { .compatible = "d-link,dsl-2650u", .data = &board_96358vw2, },
- { .compatible = "d-link,dva-g3810bn-tl", .data = &board_DVAG3810BN, },
-+ { .compatible = "huawei,echolife-hg520v", .data = &board_HW520, },
- { .compatible = "huawei,echolife-hg553", .data = &board_HW553, },
- { .compatible = "huawei,echolife-hg556a-a", .data = &board_HW556_A, },
- { .compatible = "huawei,echolife-hg556a-b", .data = &board_HW556_B, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -349,6 +349,49 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_A4001N = {
-+ .name = "96328dg2x2",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43225,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- static struct board_info __initdata board_A4001N1 = {
- .name = "963281T_TEF",
- .expected_cpu_id = 0x6328,
-@@ -1952,6 +1995,7 @@ static const struct board_info __initcon
- &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
-+ &board_A4001N,
- &board_A4001N1,
- &board_dsl_274xb_f1,
- &board_FAST2704V2,
-@@ -2040,6 +2084,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
-+ { .compatible = "adb,a4001n", .data = &board_A4001N, },
- { .compatible = "adb,a4001n1", .data = &board_A4001N1, },
- { .compatible = "brcm,bcm963281tan", .data = &board_963281TAN, },
- { .compatible = "brcm,bcm96328avng", .data = &board_96328avng, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -142,6 +142,74 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
-+ { .offset = 96, .value = 0x2046 },
-+ { .offset = 97, .value = 0xfe9d },
-+ { .offset = 98, .value = 0x1854 },
-+ { .offset = 99, .value = 0xfa59 },
-+ { .offset = 112, .value = 0x2046 },
-+ { .offset = 113, .value = 0xfe79 },
-+ { .offset = 114, .value = 0x17f5 },
-+ { .offset = 115, .value = 0xfa47 },
-+ { .offset = 161, .value = 0x2222 },
-+ { .offset = 162, .value = 0x2222 },
-+ { .offset = 169, .value = 0x2222 },
-+ { .offset = 170, .value = 0x2222 },
-+ { .offset = 171, .value = 0x5555 },
-+ { .offset = 172, .value = 0x5555 },
-+ { .offset = 173, .value = 0x4444 },
-+ { .offset = 174, .value = 0x4444 },
-+ { .offset = 175, .value = 0x5555 },
-+ { .offset = 176, .value = 0x5555 },
-+};
-+
-+static struct board_info __initdata board_dsl_2751b_d1 = {
-+ .name = "AW5200B",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = dsl2751b_e1_fixups,
-+ .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -1989,6 +2057,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
- &board_96318ref_p300,
-+ &board_dsl_2751b_d1,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -2082,6 +2151,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
-+ { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n", .data = &board_A4001N, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1710,6 +1710,30 @@ static struct board_info __initdata boar
- .has_ehci0 = 1,
- };
-
-+static struct board_info __initdata board_DGND3700v1_3800B = {
-+ .name = "DGND3700v1_3800B",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2131,6 +2155,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6368
- &board_96368mvwg,
- &board_96368mvngr,
-+ &board_DGND3700v1_3800B,
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2233,6 +2258,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1375,6 +1375,31 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_homehub2a = {
-+ .name = "HOMEHUB2A",
-+ .expected_cpu_id = 0x6358,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enet1 = 1,
-+ .enet1 = {
-+ .has_phy = 1,
-+ .phy_id = 0,
-+ .force_speed_100 = 1,
-+ .force_duplex_full = 1,
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4322,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+};
-+
- static struct board_info __initdata board_HW520 = {
- .name = "HW6358GW_B",
- .expected_cpu_id = 0x6358,
-@@ -2138,6 +2163,7 @@ static const struct board_info __initcon
- &board_nb4_ser_r0,
- &board_nb4_fxc_r1,
- &board_ct6373_1,
-+ &board_homehub2a,
- &board_HW520,
- &board_HW553,
- &board_HW556_A,
-@@ -2247,6 +2273,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,neufbox-4-foxconn-r1", .data = &board_nb4_fxc_r1, },
- { .compatible = "t-com,speedport-w-303v", .data = &board_spw303v, },
- { .compatible = "telsey,cpva642", .data = &board_CPVA642, },
-+ { .compatible = "bt,home-hub-2-a", .data = &board_homehub2a, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6362
- { .compatible = "sagem,fast-2504n", .data = &board_fast2504n, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1759,6 +1759,52 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HG655b = {
-+ .name = "HW65x",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0x7c0000,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2182,6 +2228,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_HG655b,
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2285,6 +2332,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -210,6 +210,45 @@ static struct board_info __initdata boar
- .num_board_fixups = ARRAY_SIZE(dsl2751b_e1_fixups),
- },
- };
-+
-+static struct board_info __initdata board_FAST2704N = {
-+ .name = "F@ST2704N",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_6318 */
-
- /*
-@@ -2153,6 +2192,7 @@ static const struct board_info __initcon
- &board_96318ref,
- &board_96318ref_p300,
- &board_dsl_2751b_d1,
-+ &board_FAST2704N,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-@@ -2250,6 +2290,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
- { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
-+ { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- { .compatible = "adb,a4001n", .data = &board_A4001N, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1992,6 +1992,59 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vr3026e_fixups[] = {
-+ { .offset = 97, .value = 0xfeb3 },
-+ { .offset = 98, .value = 0x1618 },
-+ { .offset = 99, .value = 0xfab0 },
-+ { .offset = 113, .value = 0xfed1 },
-+ { .offset = 114, .value = 0x1609 },
-+ { .offset = 115, .value = 0xfad9 },
-+};
-+
-+static struct board_info __initdata board_VR3026e = {
-+ .name = "96368MT-1341N1",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vr3026e_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vr3026e_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -2272,6 +2325,7 @@ static const struct board_info __initcon
- &board_P870HW51A_V2,
- &board_VR3025u,
- &board_VR3025un,
-+ &board_VR3026e,
- &board_WAP5813n,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
-@@ -2372,6 +2426,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
-+ { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -623,6 +623,50 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_R5010UNV2 = {
-+ .name = "96328ang",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ },
-+};
-+
- #endif /* CONFIG_BCM63XX_CPU_6328 */
-
- /*
-@@ -2256,6 +2300,7 @@ static const struct board_info __initcon
- &board_A4001N1,
- &board_dsl_274xb_f1,
- &board_FAST2704V2,
-+ &board_R5010UNV2,
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- &board_96338gw,
-@@ -2354,6 +2399,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,ar-5381u", .data = &board_AR5381u, },
- { .compatible = "comtrend,ar-5387un", .data = &board_AR5387un, },
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
-+ { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
- { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1888,6 +1888,52 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_HG622 = {
-+ .name = "96368MVWG_hg622",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_caldata = 1,
-+ .caldata = {
-+ {
-+ .vendor = PCI_VENDOR_ID_RALINK,
-+ .caldata_offset = 0xfa0000,
-+ .slot = 1,
-+ .eeprom = "rt2x00.eeprom",
-+ },
-+ },
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+};
-+
- static struct sprom_fixup __initdata vr3025u_fixups[] = {
- { .offset = 97, .value = 0xfeb3 },
- { .offset = 98, .value = 0x1618 },
-@@ -2366,6 +2412,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
- &board_VR3025u,
-@@ -2474,6 +2521,7 @@ static struct of_device_id const bcm963x
- { .compatible = "comtrend,vr-3025un", .data = &board_VR3025un, },
- { .compatible = "comtrend,vr-3026e", .data = &board_VR3026e, },
- { .compatible = "comtrend,wap-5813n", .data = &board_WAP5813n, },
-+ { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1842,6 +1842,42 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata EVG2000_fixups[] = {
-+ { .offset = 219, .value = 0xec08 },
-+};
-+
-+static struct board_info __initdata board_EVG2000 = {
-+ .name = "96369PVG",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+ .use_fallback_sprom = 1,
-+ .fallback_sprom = {
-+ .type = SPROM_BCM4322,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = EVG2000_fixups,
-+ .num_board_fixups = ARRAY_SIZE(EVG2000_fixups),
-+ },
-+};
-+
- static struct board_info __initdata board_HG655b = {
- .name = "HW65x",
- .expected_cpu_id = 0x6368,
-@@ -2412,6 +2448,7 @@ static const struct board_info __initcon
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-+ &board_EVG2000,
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-@@ -2524,6 +2561,7 @@ static struct of_device_id const bcm963x
- { .compatible = "huawei,echolife-hg622", .data = &board_HG622, },
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
-+ { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -1732,6 +1732,51 @@ static struct board_info __initdata boar
- * known 6368 boards
- */
- #ifdef CONFIG_BCM63XX_CPU_6368
-+static struct board_info __initdata board_AV4202N = {
-+ .name = "96368_Swiss_S1",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "port1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "port2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "port3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "port4",
-+ },
-+ },
-+ },
-+ .use_fallback_sprom = 1,
-+ .fallback_sprom = {
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ },
-+
-+};
-+
- static struct board_info __initdata board_96368mvwg = {
- .name = "96368MVWG",
- .expected_cpu_id = 0x6368,
-@@ -2445,6 +2490,7 @@ static const struct board_info __initcon
- #endif
-
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ &board_AV4202N,
- &board_96368mvwg,
- &board_96368mvngr,
- &board_DGND3700v1_3800B,
-@@ -2552,6 +2598,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "adb,av4202n", .data = &board_AV4202N, },
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
- { .compatible = "comtrend,vr-3025u", .data = &board_VR3025u, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2216,6 +2216,106 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata vh4032n_fixups[] = {
-+ { .offset = 2, .value = 0x04d2 },
-+ { .offset = 4, .value = 0x4350 },
-+ { .offset = 65, .value = 0x1300 },
-+ { .offset = 68, .value = 0x0402 },
-+ { .offset = 70, .value = 0x0090 },
-+ { .offset = 71, .value = 0x4c19 },
-+ { .offset = 72, .value = 0x2345 },
-+ { .offset = 87, .value = 0x0315 },
-+ { .offset = 88, .value = 0x0315 },
-+ { .offset = 96, .value = 0x2048 },
-+ { .offset = 97, .value = 0xfed7 },
-+ { .offset = 98, .value = 0x15a6 },
-+ { .offset = 99, .value = 0xfaee },
-+ { .offset = 100, .value = 0x3e3a },
-+ { .offset = 101, .value = 0x3a36 },
-+ { .offset = 102, .value = 0xff7f },
-+ { .offset = 103, .value = 0x11b9 },
-+ { .offset = 104, .value = 0xfc53 },
-+ { .offset = 105, .value = 0xffe6 },
-+ { .offset = 106, .value = 0xfdd2 },
-+ { .offset = 107, .value = 0xfe49 },
-+ { .offset = 108, .value = 0xff6a },
-+ { .offset = 109, .value = 0x136e },
-+ { .offset = 110, .value = 0xfbed },
-+ { .offset = 111, .value = 0x0000 },
-+ { .offset = 112, .value = 0x2048 },
-+ { .offset = 113, .value = 0xfee2 },
-+ { .offset = 114, .value = 0x15e5 },
-+ { .offset = 115, .value = 0xfaed },
-+ { .offset = 116, .value = 0x3e3a },
-+ { .offset = 117, .value = 0x3a36 },
-+ { .offset = 118, .value = 0xffc8 },
-+ { .offset = 119, .value = 0x12b8 },
-+ { .offset = 120, .value = 0xfca1 },
-+ { .offset = 121, .value = 0xff9b },
-+ { .offset = 122, .value = 0x122a },
-+ { .offset = 123, .value = 0xfcc8 },
-+ { .offset = 124, .value = 0xff95 },
-+ { .offset = 125, .value = 0x146b },
-+ { .offset = 126, .value = 0xfbba },
-+ { .offset = 127, .value = 0x0000 },
-+ { .offset = 161, .value = 0x0000 },
-+ { .offset = 162, .value = 0x0000 },
-+ { .offset = 169, .value = 0x0000 },
-+ { .offset = 170, .value = 0x0000 },
-+ { .offset = 171, .value = 0x0000 },
-+ { .offset = 172, .value = 0x0000 },
-+ { .offset = 173, .value = 0x0000 },
-+ { .offset = 174, .value = 0x0000 },
-+ { .offset = 175, .value = 0x0000 },
-+ { .offset = 176, .value = 0x0000 },
-+ { .offset = 219, .value = 0x1108 },
-+};
-+
-+static struct board_info __initdata board_VH4032N = {
-+ .name = "VH4032N",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43222,
-+ .pci_bus = 0,
-+ .pci_dev = 1,
-+ .board_fixups = vh4032n_fixups,
-+ .num_board_fixups = ARRAY_SIZE(vh4032n_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata wap5813n_fixups[] = {
- { .offset = 97, .value = 0xfeed },
- { .offset = 98, .value = 0x15d1 },
-@@ -2498,6 +2598,7 @@ static const struct board_info __initcon
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-+ &board_VH4032N,
- &board_VR3025u,
- &board_VR3025un,
- &board_VR3026e,
-@@ -2609,6 +2710,7 @@ static struct of_device_id const bcm963x
- { .compatible = "huawei,echolife-hg655b", .data = &board_HG655b, },
- { .compatible = "netgear,dgnd3700-v1", .data = &board_DGND3700v1_3800B, },
- { .compatible = "netgear,evg2000", .data = &board_EVG2000, },
-+ { .compatible = "observa,vh4032n", .data = &board_VH4032N, },
- { .compatible = "zyxel,p870hw-51a-v2", .data = &board_P870HW51A_V2, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_63268
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2066,6 +2066,29 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct board_info __initdata board_R1000H = {
-+ .name = "R1000H",
-+ .expected_cpu_id = 0x6368,
-+
-+ .has_pci = 1,
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+
-+ .has_enetsw = 1,
-+ .enetsw = {
-+ .used_ports = {
-+ [5] = {
-+ .used = 1,
-+ .phy_id = 0xff,
-+ .bypass_link = 1,
-+ .force_speed = 1000,
-+ .force_duplex_full = 1,
-+ .name = "RGMII",
-+ },
-+ },
-+ },
-+};
-+
- static struct board_info __initdata board_VR3025u = {
- .name = "96368M-1541N",
- .expected_cpu_id = 0x6368,
-@@ -2598,6 +2621,7 @@ static const struct board_info __initcon
- &board_HG622,
- &board_HG655b,
- &board_P870HW51A_V2,
-+ &board_R1000H,
- &board_VH4032N,
- &board_VR3025u,
- &board_VR3025un,
-@@ -2699,6 +2723,7 @@ static struct of_device_id const bcm963x
- { .compatible = "sfr,neufbox-6-sercomm-r0", .data = &board_nb6, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6368
-+ { .compatible = "actiontec,r1000h", .data = &board_R1000H, },
- { .compatible = "adb,av4202n", .data = &board_AV4202N, },
- { .compatible = "brcm,bcm96368mvngr", .data = &board_96368mvngr, },
- { .compatible = "brcm,bcm96368mvwg", .data = &board_96368mvwg, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -143,6 +143,67 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ar5315u_fixups[] = {
-+ { .offset = 6, .value = 0x1c00 },
-+ { .offset = 65, .value = 0x1255 },
-+ { .offset = 97, .value = 0xfe55 },
-+ { .offset = 98, .value = 0x171d },
-+ { .offset = 99, .value = 0xfa42 },
-+ { .offset = 113, .value = 0xfeb7 },
-+ { .offset = 114, .value = 0x18cd },
-+ { .offset = 115, .value = 0xfa4f },
-+ { .offset = 162, .value = 0x6444 },
-+ { .offset = 170, .value = 0x6444 },
-+ { .offset = 172, .value = 0x6444 },
-+};
-+
-+static struct board_info __initdata board_AR5315u = {
-+ .name = "96318A-1441N1",
-+ .expected_cpu_id = 0x6318,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "LAN4",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ar5315u_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ar5315u_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata dsl2751b_e1_fixups[] = {
- { .offset = 96, .value = 0x2046 },
- { .offset = 97, .value = 0xfe9d },
-@@ -2538,6 +2599,7 @@ static const struct board_info __initcon
- #ifdef CONFIG_BCM63XX_CPU_6318
- &board_96318ref,
- &board_96318ref_p300,
-+ &board_AR5315u,
- &board_dsl_2751b_d1,
- &board_FAST2704N,
- #endif
-@@ -2643,6 +2705,7 @@ static struct of_device_id const bcm963x
- #ifdef CONFIG_BCM63XX_CPU_6318
- { .compatible = "brcm,bcm96318ref", .data = &board_96318ref, },
- { .compatible = "brcm,bcm96318ref-p300", .data = &board_96318ref_p300, },
-+ { .compatible = "comtrend,ar-5315u", .data = &board_AR5315u, },
- { .compatible = "d-link,dsl-275xb-d1", .data = &board_dsl_2751b_d1, },
- { .compatible = "sagem,fast-2704n", .data = &board_FAST2704N, },
- #endif
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -357,6 +357,73 @@ static struct board_info __initdata boar
- },
- };
-
-+static struct sprom_fixup __initdata ad1018_fixups[] = {
-+ { .offset = 6, .value = 0x1c00 },
-+ { .offset = 65, .value = 0x1256 },
-+ { .offset = 96, .value = 0x2046 },
-+ { .offset = 97, .value = 0xfe69 },
-+ { .offset = 98, .value = 0x1726 },
-+ { .offset = 99, .value = 0xfa5c },
-+ { .offset = 112, .value = 0x2046 },
-+ { .offset = 113, .value = 0xfea8 },
-+ { .offset = 114, .value = 0x1978 },
-+ { .offset = 115, .value = 0xfa26 },
-+ { .offset = 161, .value = 0x2222 },
-+ { .offset = 169, .value = 0x2222 },
-+ { .offset = 171, .value = 0x2222 },
-+ { .offset = 173, .value = 0x2222 },
-+ { .offset = 174, .value = 0x4444 },
-+ { .offset = 175, .value = 0x2222 },
-+ { .offset = 176, .value = 0x4444 },
-+};
-+
-+static struct board_info __initdata board_AD1018 = {
-+ .name = "96328avngr",
-+ .expected_cpu_id = 0x6328,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 1,
-+
-+ .has_ohci0 = 1,
-+ .has_ehci0 = 1,
-+ .num_usbh_ports = 1,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "FIBRE",
-+ },
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "LAN3",
-+ },
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "LAN2",
-+ },
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "LAN1",
-+ },
-+ },
-+ },
-+
-+ .fallback_sprom = {
-+ .type = SPROM_BCM43217,
-+ .pci_bus = 1,
-+ .pci_dev = 0,
-+ .board_fixups = ad1018_fixups,
-+ .num_board_fixups = ARRAY_SIZE(ad1018_fixups),
-+ },
-+};
-+
- static struct sprom_fixup __initdata ar5381u_fixups[] = {
- { .offset = 97, .value = 0xfee5 },
- { .offset = 98, .value = 0x157c },
-@@ -2605,6 +2672,7 @@ static const struct board_info __initcon
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6328
- &board_96328avng,
-+ &board_AD1018,
- &board_AR5381u,
- &board_AR5387un,
- &board_963281TAN,
-@@ -2719,6 +2787,7 @@ static struct of_device_id const bcm963x
- { .compatible = "d-link,dsl-274xb-f1", .data = &board_dsl_274xb_f1, },
- { .compatible = "nucom,r5010un-v2", .data = &board_R5010UNV2, },
- { .compatible = "sagem,fast-2704-v2", .data = &board_FAST2704V2, },
-+ { .compatible = "sercomm,ad1018-nor", .data = &board_AD1018, },
- #endif
- #ifdef CONFIG_BCM63XX_CPU_6338
- { .compatible = "brcm,bcm96338gw", .data = &board_96338gw, },
+++ /dev/null
---- a/arch/mips/bcm63xx/boards/board_bcm963xx.c
-+++ b/arch/mips/bcm63xx/boards/board_bcm963xx.c
-@@ -2654,6 +2654,49 @@ static struct board_info __initdata boar
- },
- },
- };
-+
-+static struct board_info __initdata board_BSKYB_63168 = {
-+ .name = "BSKYB_63168",
-+ .expected_cpu_id = 0x63268,
-+
-+ .has_pci = 1,
-+ .use_fallback_sprom = 0,
-+
-+ .has_ehci0 = 1,
-+ .has_ohci0 = 1,
-+ .num_usbh_ports = 2,
-+
-+ .has_enetsw = 1,
-+
-+ .enetsw = {
-+ .used_ports = {
-+ [0] = {
-+ .used = 1,
-+ .phy_id = 1,
-+ .name = "Port 1",
-+ },
-+
-+ [1] = {
-+ .used = 1,
-+ .phy_id = 2,
-+ .name = "Port 2",
-+ },
-+
-+ [2] = {
-+ .used = 1,
-+ .phy_id = 3,
-+ .name = "Port 3",
-+ },
-+
-+ [3] = {
-+ .used = 1,
-+ .phy_id = 4,
-+ .name = "Port 4",
-+ },
-+
-+ },
-+ },
-+};
- #endif /* CONFIG_BCM63XX_CPU_63268 */
-
- /*
-@@ -2762,6 +2805,7 @@ static const struct board_info __initcon
- &board_963268bu_p300,
- &board_963269bhr,
- &board_vw6339gu,
-+ &board_BSKYB_63168,
- #endif
- };
-
-@@ -2874,6 +2918,7 @@ static struct of_device_id const bcm963x
- { .compatible = "brcm,bcm963268bu-p300", .data = &board_963268bu_p300, },
- { .compatible = "brcm,bcm963269bhr", .data = &board_963269bhr, },
- { .compatible = "inteno,vg50", .data = &board_vw6339gu, },
-+ { .compatible = "sky,sr102", .data = &board_BSKYB_63168, },
- #endif
- #endif /* CONFIG_OF */
- { },
+++ /dev/null
---- a/arch/mips/bcm63xx/nvram.c
-+++ b/arch/mips/bcm63xx/nvram.c
-@@ -24,6 +24,12 @@
- static struct bcm963xx_nvram nvram;
- static int mac_addr_used;
-
-+/*
-+ * Required export for WL
-+ */
-+u32 nvram_buf[5] = { 0, cpu_to_le32(20), 0, 0, 0 };
-+EXPORT_SYMBOL(nvram_buf);
-+
- void __init bcm63xx_nvram_init(void *addr)
- {
- u32 crc, expected_crc;
---- a/arch/mips/mm/cache.c
-+++ b/arch/mips/mm/cache.c
-@@ -64,6 +64,7 @@ void (*_dma_cache_wback)(unsigned long s
- void (*_dma_cache_inv)(unsigned long start, unsigned long size);
-
- EXPORT_SYMBOL(_dma_cache_wback_inv);
-+EXPORT_SYMBOL(_dma_cache_inv);
-
- #endif /* CONFIG_DMA_NONCOHERENT */
-
+++ /dev/null
---- a/arch/mips/bcm63xx/sprom.c
-+++ b/arch/mips/bcm63xx/sprom.c
-@@ -8,6 +8,7 @@
- */
-
- #include <linux/init.h>
-+#include <linux/export.h>
- #include <linux/kernel.h>
- #include <linux/string.h>
- #include <linux/platform_device.h>
-@@ -387,7 +388,19 @@ struct fallback_sprom_match {
- struct ssb_sprom sprom;
- };
-
--static struct fallback_sprom_match fallback_sprom;
-+struct fallback_sprom_match fallback_sprom;
-+
-+int bcm63xx_get_fallback_sprom(uint pci_bus, uint pci_slot, struct ssb_sprom *out)
-+{
-+ if (pci_bus != fallback_sprom.pci_bus ||
-+ pci_slot != fallback_sprom.pci_dev)
-+ pr_warn("fallback_sprom: pci bus/device num mismatch: expected %i/%i, but got %i/%i\n",
-+ fallback_sprom.pci_bus, fallback_sprom.pci_dev,
-+ pci_bus, pci_slot);
-+ memcpy(out, &fallback_sprom.sprom, sizeof(struct ssb_sprom));
-+ return 0;
-+}
-+EXPORT_SYMBOL(bcm63xx_get_fallback_sprom);
-
- #if defined(CONFIG_SSB_PCIHOST)
- int bcm63xx_get_fallback_ssb_sprom(struct ssb_bus *bus, struct ssb_sprom *out)
+++ /dev/null
-From e3208e6087642b95a5bab3101fc9c6e34892c861 Mon Sep 17 00:00:00 2001
-From: Miguel GAIO <miguel.gaio@efixo.com>
-Date: Fri, 6 Jul 2012 14:12:33 +0200
-Subject: [PATCH 6/8] * [rtl8367r] Fix RGMII support
-
----
- drivers/net/phy/rtl8367.c | 5 +++++
- 1 files changed, 5 insertions(+), 0 deletions(-)
-
---- a/drivers/net/phy/rtl8367.c
-+++ b/drivers/net/phy/rtl8367.c
-@@ -146,6 +146,10 @@
- #define RTL8367_EXT_RGMXF_TXDELAY_MASK 1
- #define RTL8367_EXT_RGMXF_RXDELAY_MASK 0x7
-
-+#define RTL8367_PHY_AD_REG 0x130f
-+#define RTL8370_PHY_AD_DUMMY_1_OFFSET 5
-+#define RTL8370_PHY_AD_DUMMY_1_MASK 0xe0
-+
- #define RTL8367_DI_FORCE_REG(_x) (0x1310 + (_x))
- #define RTL8367_DI_FORCE_MODE BIT(12)
- #define RTL8367_DI_FORCE_NWAY BIT(7)
-@@ -897,6 +901,7 @@ static int rtl8367_extif_set_mode(struct
- case RTL8367_EXTIF_MODE_RGMII_33V:
- REG_WR(smi, RTL8367_CHIP_DEBUG0_REG, 0x0367);
- REG_WR(smi, RTL8367_CHIP_DEBUG1_REG, 0x7777);
-+ REG_RMW(smi, RTL8367_PHY_AD_REG, BIT(5), 0);
- break;
-
- case RTL8367_EXTIF_MODE_TMII_MAC:
+++ /dev/null
-From ff3409ab17d56450943364ba49a16960e3cdda9b Mon Sep 17 00:00:00 2001
-From: Jonas Gorski <jogo@openwrt.org>
-Date: Sun, 6 Apr 2014 22:33:16 +0200
-Subject: [RFC] jffs2: work around unaligned accesses failing on bcm63xx/smp
-
-Unligned memcpy_fromio randomly fails with an unaligned dst. Work around
-it by ensuring we are always doing aligned copies.
-
-Should fix filename corruption in jffs2 with SMP.
-
-Signed-off-by: Jonas Gorski <jogo@openwrt.org>
----
- fs/jffs2/nodelist.h | 2 +-
- 1 file changed, 1 insertion(+), 1 deletion(-)
-
---- a/fs/jffs2/nodelist.h
-+++ b/fs/jffs2/nodelist.h
-@@ -259,7 +259,7 @@ struct jffs2_full_dirent
- uint32_t ino; /* == zero for unlink */
- unsigned int nhash;
- unsigned char type;
-- unsigned char name[0];
-+ unsigned char name[0] __attribute__((aligned((sizeof(long)))));
- };
-
- /*
+++ /dev/null
---- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
-@@ -2232,6 +2232,10 @@ static int bcm_enetsw_open(struct net_de
-
- rgmii_ctrl = enetsw_readb(priv, ENETSW_RGMII_CTRL_REG(i));
- rgmii_ctrl |= ENETSW_RGMII_CTRL_GMII_CLK_EN;
-+ if (BCMCPU_IS_63268()) {
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_TIMING_SEL_EN;
-+ rgmii_ctrl |= ENETSW_RGMII_CTRL_MII_OVERRIDE_EN;
-+ }
- enetsw_writeb(priv, rgmii_ctrl, ENETSW_RGMII_CTRL_REG(i));
- }
-
+++ /dev/null
-#
-# Copyright (C) 2016 LEDE project
-#
-# This is free software, licensed under the GNU General Public License v2.
-# See /LICENSE for more information.
-#
-
-define Profile/Default
- NAME:=Default Profile
- PACKAGES:=kmod-b43 wpad-basic
- PRIORITY:=1
-endef
-
-define Profile/Default/description
- Package set compatible with most boards.
-endef
-
-$(eval $(call Profile,Default))
+++ /dev/null
-CONFIG_CPU_RMAP=y
-CONFIG_CRYPTO_AEAD=y
-CONFIG_CRYPTO_AEAD2=y
-CONFIG_CRYPTO_HASH2=y
-CONFIG_CRYPTO_MANAGER=y
-CONFIG_CRYPTO_MANAGER2=y
-CONFIG_CRYPTO_NULL2=y
-CONFIG_NET_FLOW_LIMIT=y
-CONFIG_NR_CPUS=2
-CONFIG_PADATA=y
-CONFIG_RCU_STALL_COMMON=y
-CONFIG_RFS_ACCEL=y
-CONFIG_RPS=y
-CONFIG_SMP=y
-CONFIG_SMP_UP=y
-CONFIG_TREE_RCU=y
-CONFIG_XPS=y
+++ /dev/null
-BOARDNAME:=smp
-
-define Target/Description
- Build firmware images for BCM63XX boards with SMP support.
- Currently only BCM6362 and BCM6368 supported.
-endef
-
-
projects / openwrt / staging / lynxis.git / commitdiff