pinctrl: baytrail: Move IRQ valid mask initialization to a dedicated callback

There is a logical continuation of the commit 5fbe5b5883f8 ("gpio: Initialize
the irqchip valid_mask with a callback") to split IRQ initialization to
hardware and valid mask setup parts.

Acked-by: Hans de Goede <hdegoede@redhat.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>

diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index d829843314ba2c9cf9d9bddb4782c54570b5a521..ea61a19857c18702a389e0649da4784532ad9623 100644 (file)
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -1432,23 +1432,11 @@ static void byt_gpio_irq_handler(struct irq_desc *desc)
 static void byt_init_irq_valid_mask(struct gpio_chip *chip,
                                    unsigned long *valid_mask,
                                    unsigned int ngpios)
-{
-       /*
-        * FIXME: currently the valid_mask is filled in as part of
-        * initializing the irq_chip below in byt_gpio_irq_init_hw().
-        * when converting this driver to the new way of passing the
-        * gpio_irq_chip along when adding the gpio_chip, move the
-        * mask initialization into this callback instead. Right now
-        * this callback is here to make sure the mask gets allocated.
-        */
-}
-
-static int byt_gpio_irq_init_hw(struct gpio_chip *chip)
 {
        struct byt_gpio *vg = gpiochip_get_data(chip);
        struct device *dev = &vg->pdev->dev;
        void __iomem *reg;
-       u32 base, value;
+       u32 value;
        int i;
 
        /*
@@ -1469,13 +1457,20 @@ static int byt_gpio_irq_init_hw(struct gpio_chip *chip)
 
                value = readl(reg);
                if (value & BYT_DIRECT_IRQ_EN) {
-                       clear_bit(i, chip->irq.valid_mask);
+                       clear_bit(i, valid_mask);
                        dev_dbg(dev, "excluding GPIO %d from IRQ domain\n", i);
                } else if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i)) {
                        byt_gpio_clear_triggering(vg, i);
                        dev_dbg(dev, "disabling GPIO %d\n", i);
                }
        }
+}
+
+static int byt_gpio_irq_init_hw(struct gpio_chip *chip)
+{
+       struct byt_gpio *vg = gpiochip_get_data(chip);
+       void __iomem *reg;
+       u32 base, value;
 
        /* clear interrupt status trigger registers */
        for (base = 0; base < vg->soc_data->npins; base += 32) {