#endif
/* now restrict to preliminary range */
- /* the PS came from the HRCW, don´t change it */
+ /* the PS came from the HRCW, don´t change it */
memctl->memc_br0 = SET_VAL_MASK(memctl->memc_br0 , CFG_BR0_PRELIM, BRx_PS_MSK);
memctl->memc_or0 = CFG_OR0_PRELIM;
/* keeps pointer to currentlu processed partition */
static struct part_info *current_part;
-#if (defined(CONFIG_JFFS2_NAND) && ((CONFIG_COMMANDS & CFG_CMD_NAND) || defined(CONFIG_CMD_NAND))
+#if (defined(CONFIG_JFFS2_NAND) && \
+ ((CONFIG_COMMANDS & CFG_CMD_NAND) || defined(CONFIG_CMD_NAND)) )
#if defined(CFG_NAND_LEGACY)
#include <linux/mtd/nand_legacy.h>
#else
return get_node_mem_nor(off);
#endif
-#if defined(CONFIG_JFFS2_NAND) && ((CONFIG_COMMANDS & CFG_CMD_NAND) || defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_JFFS2_NAND) && \
+ (CONFIG_COMMANDS & CFG_CMD_NAND) || defined(CONFIG_CMD_NAND)
if (id->type == MTD_DEV_TYPE_NAND)
return get_node_mem_nand(off);
#endif
static inline void put_fl_mem(void *buf)
{
-#if defined(CONFIG_JFFS2_NAND) && ((CONFIG_COMMANDS & CFG_CMD_NAND) || defined(CONFIG_CMD_NAND)
+#if defined(CONFIG_JFFS2_NAND) && \
+ (CONFIG_COMMANDS & CFG_CMD_NAND) || defined(CONFIG_CMD_NAND)
struct mtdids *id = current_part->dev->id;
if (id->type == MTD_DEV_TYPE_NAND)
#define CONFIG_BOOTCOMMAND "bootm fff80000" /* autoboot command */
#define CONFIG_BOOTARGS "root=/dev/mtdblock2"
-#if defined(CONFIG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB) || (CONFIG_COMMANDS & CFG_CMD_KGDB)
#undef CONFIG_KGDB_ON_SMC /* define if kgdb on SMC */
#define CONFIG_KGDB_ON_SCC /* define if kgdb on SCC */
#undef CONFIG_KGDB_NONE /* define if kgdb on something else */
#define CFG_PROMPT_HUSH_PS2 "> "
#define CFG_LONGHELP /* undef to save memory */
#define CFG_PROMPT "=> " /* Monitor Command Prompt */
-#if defined(CONFIG & CFG_CMD_KGDB)
+#if defined(CONFIG_CMD_KGDB) || (CONFIG_COMMANDS & CFG_CMD_KGDB)
#define CFG_CBSIZE 1024 /* Console I/O Buffer Size */
#else
#define CFG_CBSIZE 256 /* Console I/O Buffer Size */
*/
#include <config_cmd_default.h>
-#if definded(CONFIG_MPC5200)
+#if defined(CONFIG_MPC5200)
#define CONFIG_CMD_PCI
#endif
#define CFG_LSRT 0x0F
#define CFG_MPTPR 0x4000
-#define CFG_PSDRAM_BR CFG_SDRAM_BASE | 0x00000041
+#define CFG_PSDRAM_BR (CFG_SDRAM_BASE | 0x00000041)
#define CFG_PSDRAM_OR 0xFC0028C0
-#define CFG_LSDRAM_BR CFG_LSDRAM_BASE | 0x00001861
+#define CFG_LSDRAM_BR (CFG_LSDRAM_BASE | 0x00001861)
#define CFG_LSDRAM_OR 0xFF803480
-#define CFG_BR0_PRELIM CFG_FLASH_BASE | 0x00000801
+#define CFG_BR0_PRELIM (CFG_FLASH_BASE | 0x00000801)
#define CFG_OR0_PRELIM 0xFFE00856
-#define CFG_BR5_PRELIM CFG_EEPROM | 0x00000801
+#define CFG_BR5_PRELIM (CFG_EEPROM | 0x00000801)
#define CFG_OR5_PRELIM 0xFFFF03F6
-#define CFG_BR6_PRELIM CFG_FLSIMM_BASE | 0x00001801
+#define CFG_BR6_PRELIM (CFG_FLSIMM_BASE | 0x00001801)
#define CFG_OR6_PRELIM 0xFF000856
-#define CFG_BR7_PRELIM CFG_BCSR | 0x00000801
+#define CFG_BR7_PRELIM (CFG_BCSR | 0x00000801)
#define CFG_OR7_PRELIM 0xFFFF83F6
#define CFG_RESET_ADDRESS 0xC0000000
*/
#define CFG_SDRAM_BASE 0x00000000
#define CFG_FLASH_BASE 0x40000000
-#if defined(DEBUG) || defiend(CONFIG_CMD_IDE)
+#if defined(DEBUG) || defined(CONFIG_CMD_IDE)
#define CFG_MONITOR_LEN (256 << 10) /* Reserve 256 kB for Monitor */
#else
#define CFG_MONITOR_LEN (128 << 10) /* Reserve 128 kB for Monitor */