drm/amdgpu/smu: add helper function smu_get_dpm_level_range() for smu driver

this function can help smu driver to query dpm level clock range from
smu firmware.

Signed-off-by: Kevin Wang <kevin1.wang@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
index e51cf5a151e85e342d43bd4f0a89178b5ecb636d..dcc4ccd5c44e507889e1cceed9cf5c426b906b02 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
+++ b/drivers/gpu/drm/amd/powerplay/amdgpu_smu.c
@@ -356,6 +356,35 @@ int smu_get_dpm_level_count(struct smu_context *smu, enum smu_clk_type clk_type,
        return smu_get_dpm_freq_by_index(smu, clk_type, 0xff, value);
 }
 
+int smu_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type,
+                           uint32_t *min_value, uint32_t *max_value)
+{
+       int ret = 0;
+       uint32_t level_count = 0;
+
+       if (!min_value && !max_value)
+               return -EINVAL;
+
+       if (min_value) {
+               /* by default, level 0 clock value as min value */
+               ret = smu_get_dpm_freq_by_index(smu, clk_type, 0, min_value);
+               if (ret)
+                       return ret;
+       }
+
+       if (max_value) {
+               ret = smu_get_dpm_level_count(smu, clk_type, &level_count);
+               if (ret)
+                       return ret;
+
+               ret = smu_get_dpm_freq_by_index(smu, clk_type, level_count - 1, max_value);
+               if (ret)
+                       return ret;
+       }
+
+       return ret;
+}
+
 bool smu_clk_dpm_is_enabled(struct smu_context *smu, enum smu_clk_type clk_type)
 {
        enum smu_feature_mask feature_id = 0;

diff --git a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
index 541cfde289ea4ee82f5ed572e45d28379040231f..5ddadd2d90cf67732019c80add90376af5b7f09e 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
+++ b/drivers/gpu/drm/amd/powerplay/inc/amdgpu_smu.h
@@ -697,6 +697,8 @@ int smu_set_soft_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
                            uint32_t min, uint32_t max);
 int smu_set_hard_freq_range(struct smu_context *smu, enum smu_clk_type clk_type,
                            uint32_t min, uint32_t max);
+int smu_get_dpm_level_range(struct smu_context *smu, enum smu_clk_type clk_type,
+                           uint32_t *min_value, uint32_t *max_value);
 enum amd_dpm_forced_level smu_get_performance_level(struct smu_context *smu);
 int smu_force_performance_level(struct smu_context *smu, enum amd_dpm_forced_level level);
 int smu_set_display_count(struct smu_context *smu, uint32_t count);

diff --git a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
index e7ab8caee2224181d122575d47319e6e8a3bee9e..5cca52c34b4236f4a1712a74af6aaca878ec728b 100644 (file)
--- a/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
+++ b/drivers/gpu/drm/amd/powerplay/navi10_ppt.c
@@ -1587,7 +1587,6 @@ static int navi10_set_peak_clock_by_device(struct smu_context *smu)
        struct amdgpu_device *adev = smu->adev;
        int ret = 0;
        uint32_t sclk_freq = 0, uclk_freq = 0;
-       uint32_t sclk_level = 0, uclk_level = 0;
 
        switch (adev->asic_type) {
        case CHIP_NAVI10:
@@ -1632,19 +1631,12 @@ static int navi10_set_peak_clock_by_device(struct smu_context *smu)
                sclk_freq = NAVI12_UMD_PSTATE_PEAK_GFXCLK;
                break;
        default:
-               ret = smu_get_dpm_level_count(smu, SMU_SCLK, &sclk_level);
+               ret = smu_get_dpm_level_range(smu, SMU_SCLK, NULL, &sclk_freq);
                if (ret)
                        return ret;
-               ret = smu_get_dpm_freq_by_index(smu, SMU_SCLK, sclk_level - 1, &sclk_freq);
-               if (ret)
-                       return ret;
-               break;
        }
 
-       ret = smu_get_dpm_level_count(smu, SMU_UCLK, &uclk_level);
-       if (ret)
-               return ret;
-       ret = smu_get_dpm_freq_by_index(smu, SMU_UCLK, uclk_level - 1, &uclk_freq);
+       ret = smu_get_dpm_level_range(smu, SMU_UCLK, NULL, &uclk_freq);
        if (ret)
                return ret;