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- Thu, 28 Apr 2022 15:58:06 -0700 (PDT)
-From: Rui Salvaterra <rsalvaterra@gmail.com>
-To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
- linux-kernel@vger.kernel.org
-Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org,
- Rui Salvaterra <rsalvaterra@gmail.com>
-Subject: [PATCH] arm64: dts: mt7622: specify the L2 cache topology
-Date: Thu, 28 Apr 2022 23:57:55 +0100
-Message-Id: <20220428225755.785153-1-rsalvaterra@gmail.com>
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-
-On an MT7622 system, the kernel complains of not being able to detect the cache
-hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in
-order to fix this.
-
-Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
----
- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 7 +++++++
- 1 file changed, 7 insertions(+)
-
---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-@@ -80,6 +80,7 @@
- enable-method = "psci";
- clock-frequency = <1300000000>;
- cci-control-port = <&cci_control2>;
-+ next-level-cache = <&L2>;
- };
-
- cpu1: cpu@1 {
-@@ -94,6 +95,12 @@
- enable-method = "psci";
- clock-frequency = <1300000000>;
- cci-control-port = <&cci_control2>;
-+ next-level-cache = <&L2>;
-+ };
-+
-+ L2: l2-cache {
-+ compatible = "cache";
-+ cache-level = <2>;
- };
- };
-
--- /dev/null
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+ Thu, 28 Apr 2022 15:58:06 -0700 (PDT)
+From: Rui Salvaterra <rsalvaterra@gmail.com>
+To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
+ linux-kernel@vger.kernel.org
+Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org,
+ Rui Salvaterra <rsalvaterra@gmail.com>
+Subject: [PATCH] arm64: dts: mt7622: specify the L2 cache topology
+Date: Thu, 28 Apr 2022 23:57:55 +0100
+Message-Id: <20220428225755.785153-1-rsalvaterra@gmail.com>
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+
+On an MT7622 system, the kernel complains of not being able to detect the cache
+hierarchy of CPU 0. Specify the shared L2 cache node in the device tree, in
+order to fix this.
+
+Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 7 +++++++
+ 1 file changed, 7 insertions(+)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -80,6 +80,7 @@
+ enable-method = "psci";
+ clock-frequency = <1300000000>;
+ cci-control-port = <&cci_control2>;
++ next-level-cache = <&L2>;
+ };
+
+ cpu1: cpu@1 {
+@@ -94,6 +95,12 @@
+ enable-method = "psci";
+ clock-frequency = <1300000000>;
+ cci-control-port = <&cci_control2>;
++ next-level-cache = <&L2>;
++ };
++
++ L2: l2-cache {
++ compatible = "cache";
++ cache-level = <2>;
+ };
+ };
+
+++ /dev/null
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-From: Rui Salvaterra <rsalvaterra@gmail.com>
-To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
- linux-kernel@vger.kernel.org
-Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org,
- Rui Salvaterra <rsalvaterra@gmail.com>
-Subject: [PATCH] arm64: dts: mt7622: specify the number of DMA requests
-Date: Fri, 29 Apr 2022 09:42:25 +0100
-Message-Id: <20220429084225.298213-1-rsalvaterra@gmail.com>
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-
-The MT7622 device tree never bothered to specify the number of virtual DMA
-channels for the HSDMA controller, always falling back to the default value of
-3. Make this value explicit, in order to avoid the following dmesg notification:
-
-mtk_hsdma 1b007000.dma-controller: Using 3 as missing dma-requests property
-
-Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
----
- arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 +
- 1 file changed, 1 insertion(+)
-
---- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-+++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
-@@ -941,6 +941,7 @@
- clock-names = "hsdma";
- power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
- #dma-cells = <1>;
-+ dma-requests = <3>;
- };
-
- pcie_mirror: pcie-mirror@10000400 {
--- /dev/null
+From patchwork Fri Apr 29 08:42:25 2022
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+ Fri, 29 Apr 2022 01:42:31 -0700 (PDT)
+From: Rui Salvaterra <rsalvaterra@gmail.com>
+To: linux-arm-kernel@lists.infradead.org, linux-mediatek@lists.infradead.org,
+ linux-kernel@vger.kernel.org
+Cc: matthias.bgg@gmail.com, ryder.lee@mediatek.com, daniel@makrotopia.org,
+ Rui Salvaterra <rsalvaterra@gmail.com>
+Subject: [PATCH] arm64: dts: mt7622: specify the number of DMA requests
+Date: Fri, 29 Apr 2022 09:42:25 +0100
+Message-Id: <20220429084225.298213-1-rsalvaterra@gmail.com>
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+
+The MT7622 device tree never bothered to specify the number of virtual DMA
+channels for the HSDMA controller, always falling back to the default value of
+3. Make this value explicit, in order to avoid the following dmesg notification:
+
+mtk_hsdma 1b007000.dma-controller: Using 3 as missing dma-requests property
+
+Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
+---
+ arch/arm64/boot/dts/mediatek/mt7622.dtsi | 1 +
+ 1 file changed, 1 insertion(+)
+
+--- a/arch/arm64/boot/dts/mediatek/mt7622.dtsi
++++ b/arch/arm64/boot/dts/mediatek/mt7622.dtsi
+@@ -941,6 +941,7 @@
+ clock-names = "hsdma";
+ power-domains = <&scpsys MT7622_POWER_DOMAIN_ETHSYS>;
+ #dma-cells = <1>;
++ dma-requests = <3>;
+ };
+
+ pcie_mirror: pcie-mirror@10000400 {
projects / openwrt / staging / neocturne.git / commitdiff