int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 1 << 6; /* Software Chip Reset */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}
int ret;
u8 val;
- ade7758_spi_read_reg_8(dev,
- ADE7758_OPMODE,
- &val);
+ ret = ade7758_spi_read_reg_8(dev, ADE7758_OPMODE, &val);
+ if (ret < 0) {
+ dev_err(dev, "Failed to read opmode reg\n");
+ return ret;
+ }
val |= 7 << 3; /* ADE7758 powered down */
- ret = ade7758_spi_write_reg_8(dev,
- ADE7758_OPMODE,
- val);
-
+ ret = ade7758_spi_write_reg_8(dev, ADE7758_OPMODE, val);
+ if (ret < 0)
+ dev_err(dev, "Failed to write opmode reg\n");
return ret;
}