drm/i915/aml: Introducing Amber Lake platform
authorJosé Roberto de Souza <jose.souza@intel.com>
Thu, 14 Jun 2018 23:37:20 +0000 (16:37 -0700)
committerRodrigo Vivi <rodrigo.vivi@intel.com>
Mon, 18 Jun 2018 17:49:57 +0000 (10:49 -0700)
Amber Lake uses the same gen graphics as Kaby Lake, including a id
that were previously marked as reserved on Kaby Lake, but that
now is moved to AML page.

So, let's just move it to AML macro that will feed into KBL macro
just to keep it better organized to make easier future code review
but it will be handled as a KBL.

Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180614233720.30517-2-jose.souza@intel.com
drivers/gpu/drm/i915/i915_pci.c
include/drm/i915_pciids.h

index 92e98773e53d430ce7a40d759ff639cf740c7a73..55543f1b0236aa90d62c04241d5f55925fbd07c2 100644 (file)
@@ -657,6 +657,7 @@ static const struct pci_device_id pciidlist[] = {
        INTEL_KBL_GT2_IDS(&intel_kabylake_gt2_info),
        INTEL_KBL_GT3_IDS(&intel_kabylake_gt3_info),
        INTEL_KBL_GT4_IDS(&intel_kabylake_gt3_info),
+       INTEL_AML_GT2_IDS(&intel_kabylake_gt2_info),
        INTEL_CFL_S_GT1_IDS(&intel_coffeelake_gt1_info),
        INTEL_CFL_S_GT2_IDS(&intel_coffeelake_gt2_info),
        INTEL_CFL_H_GT2_IDS(&intel_coffeelake_gt2_info),
index d03350a380250048c0b560aff8ba5b899fed3eb5..fbf5cfc9b352f7a005071909479624e46253f516 100644 (file)
 #define INTEL_KBL_GT2_IDS(info)        \
        INTEL_VGA_DEVICE(0x5916, info), /* ULT GT2 */ \
        INTEL_VGA_DEVICE(0x5917, info), /* Mobile GT2 */ \
-       INTEL_VGA_DEVICE(0x591C, info), /* ULX GT2 */ \
        INTEL_VGA_DEVICE(0x5921, info), /* ULT GT2F */ \
        INTEL_VGA_DEVICE(0x591E, info), /* ULX GT2 */ \
        INTEL_VGA_DEVICE(0x5912, info), /* DT  GT2 */ \
 #define INTEL_KBL_GT4_IDS(info) \
        INTEL_VGA_DEVICE(0x593B, info) /* Halo GT4 */
 
+/* AML/KBL Y GT2 */
+#define INTEL_AML_GT2_IDS(info) \
+       INTEL_VGA_DEVICE(0x591C, info),  /* ULX GT2 */ \
+       INTEL_VGA_DEVICE(0x87C0, info) /* ULX GT2 */
+
 #define INTEL_KBL_IDS(info) \
        INTEL_KBL_GT1_IDS(info), \
        INTEL_KBL_GT2_IDS(info), \
        INTEL_KBL_GT3_IDS(info), \
-       INTEL_KBL_GT4_IDS(info)
+       INTEL_KBL_GT4_IDS(info), \
+       INTEL_AML_GT2_IDS(info)
 
 /* CFL S */
 #define INTEL_CFL_S_GT1_IDS(info) \