LINUX_VERSION-3.18 = .29
LINUX_VERSION-4.1 = .20
LINUX_VERSION-4.3 = .4
-LINUX_VERSION-4.4 = .9
+LINUX_VERSION-4.4 = .10
LINUX_KERNEL_MD5SUM-3.18.29 = b25737a0bc98e80d12200de93f239c28
LINUX_KERNEL_MD5SUM-4.1.20 = 075c38a3a23ca5bc80437b13606df00a
LINUX_KERNEL_MD5SUM-4.3.4 = 5275d02132107c28b85f986bad576d91
-LINUX_KERNEL_MD5SUM-4.4.9 = ec1e5011cc2ab3f441e39716dcf4730e
+LINUX_KERNEL_MD5SUM-4.4.10 = f7033cbe05e1359a347815ca52d051ed
ifdef KERNEL_PATCHVER
LINUX_VERSION:=$(KERNEL_PATCHVER)$(strip $(LINUX_VERSION-$(KERNEL_PATCHVER)))
+++ /dev/null
---- a/arch/arm/mach-cns3xxx/pcie.c
-+++ b/arch/arm/mach-cns3xxx/pcie.c
-@@ -220,13 +220,13 @@ static void cns3xxx_write_config(struct
- u32 mask = (0x1ull << (size * 8)) - 1;
- int shift = (where % 4) * 8;
-
-- v = readl_relaxed(base + (where & 0xffc));
-+ v = readl_relaxed(base);
-
- v &= ~(mask << shift);
- v |= (val & mask) << shift;
-
-- writel_relaxed(v, base + (where & 0xffc));
-- readl_relaxed(base + (where & 0xffc));
-+ writel_relaxed(v, base);
-+ readl_relaxed(base);
- }
-
- static void __init cns3xxx_pcie_hw_init(struct cns3xxx_pcie *cnspci)
-Index: linux-4.4.9/arch/mips/vdso/Makefile
-===================================================================
---- linux-4.4.9.orig/arch/mips/vdso/Makefile
-+++ linux-4.4.9/arch/mips/vdso/Makefile
+--- a/arch/mips/vdso/Makefile
++++ b/arch/mips/vdso/Makefile
@@ -75,7 +75,7 @@ $(obj-vdso): KBUILD_AFLAGS := $(aflags-v
$(obj)/vdso.lds: KBUILD_CPPFLAGS := $(native-abi)
$(obj)/vdso-image.c: $(obj)/vdso.so.dbg $(obj)/genvdso FORCE
@@ -109,7 +109,7 @@ $(obj)/vdso-o32.lds: KBUILD_CPPFLAGS :=
$(obj)/vdso-o32.lds: $(src)/vdso.lds.S FORCE
- $(call if_changed_dep,cpp_lds_S)
-
+ $(call if_changed_dep,cpp_lds_S)
+
-$(obj)/vdso-o32.so.dbg: $(obj)/vdso-o32.lds $(obj-vdso-o32) FORCE
+$(obj)/vdso-o32.so.dbg: $(obj)/vdso-o32.lds $(obj-vdso-o32) $(obj)/genvdso FORCE
- $(call if_changed,vdsold)
-
+ $(call if_changed,vdsold)
+
$(obj)/vdso-o32-image.c: VDSO_NAME := o32
arch/mips/ralink/mt7620.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
-diff --git a/arch/mips/ralink/mt7620.c b/arch/mips/ralink/mt7620.c
-index dfb04fc..fc19932 100644
--- a/arch/mips/ralink/mt7620.c
+++ b/arch/mips/ralink/mt7620.c
-@@ -439,7 +439,7 @@ void __init ralink_clk_init(void)
- ralink_clk_add("10000c00.uartlite", periph_rate);
+@@ -442,7 +442,7 @@ void __init ralink_clk_init(void)
+ ralink_clk_add("10000e00.uart2", periph_rate);
ralink_clk_add("10180000.wmac", xtal_rate);
- if (IS_ENABLED(CONFIG_USB) && is_mt76x8()) {
/*
* When the CPU goes into sleep mode, the BUS clock will be
* too low for USB to function properly. Adjust the busses
---
-2.1.4
-