dt-bindings: display: mediatek: update supported chips
authoryt.shen@mediatek.com <yt.shen@mediatek.com>
Fri, 31 Mar 2017 11:30:28 +0000 (19:30 +0800)
committerCK Hu <ck.hu@mediatek.com>
Fri, 7 Apr 2017 16:02:11 +0000 (00:02 +0800)
Add decriptions about supported chips, including MT2701 & MT8173

Signed-off-by: YT Shen <yt.shen@mediatek.com>
Acked-by: Rob Herring <robh@kernel.org>
Documentation/devicetree/bindings/display/mediatek/mediatek,disp.txt
Documentation/devicetree/bindings/display/mediatek/mediatek,dsi.txt

index 708f5664a316f68d3a7d6a4bb7a64eceae1f9de7..383183a89164de7310ca5d2e241d80e14f991fca 100644 (file)
@@ -40,6 +40,7 @@ Required properties (all function blocks):
        "mediatek,<chip>-dpi"        - DPI controller, see mediatek,dpi.txt
        "mediatek,<chip>-disp-mutex" - display mutex
        "mediatek,<chip>-disp-od"    - overdrive
+  the supported chips are mt2701 and mt8173.
 - reg: Physical base address and length of the function block register space
 - interrupts: The interrupt signal from the function block (required, except for
   merge and split function blocks).
@@ -54,6 +55,7 @@ Required properties (DMA function blocks):
        "mediatek,<chip>-disp-ovl"
        "mediatek,<chip>-disp-rdma"
        "mediatek,<chip>-disp-wdma"
+  the supported chips are mt2701 and mt8173.
 - larb: Should contain a phandle pointing to the local arbiter device as defined
   in Documentation/devicetree/bindings/memory-controllers/mediatek,smi-larb.txt
 - iommus: Should point to the respective IOMMU block with master port as
index 2b1585a34b85178b9590bc70fc9e490bba7be87d..fadf327c7cdf716f3290bc4b8861bd6396bf8be3 100644 (file)
@@ -7,6 +7,7 @@ channel output.
 
 Required properties:
 - compatible: "mediatek,<chip>-dsi"
+  the supported chips are mt2701 and mt8173.
 - reg: Physical base address and length of the controller's registers
 - interrupts: The interrupt signal from the function block.
 - clocks: device clocks
@@ -25,6 +26,7 @@ The MIPI TX configuration module controls the MIPI D-PHY.
 
 Required properties:
 - compatible: "mediatek,<chip>-mipi-tx"
+  the supported chips are mt2701 and mt8173.
 - reg: Physical base address and length of the controller's registers
 - clocks: PLL reference clock
 - clock-output-names: name of the output clock line to the DSI encoder