u8 reserved[3];
u8 addr[ETH_ALEN]; /* MAC addr of the first station */
u8 reserved2[2];
-} __attribute__ ((packed));
+} __packed;
+ #define IWL_TX_FIFO_BK_MSK cpu_to_le32(BIT(0))
+ #define IWL_TX_FIFO_BE_MSK cpu_to_le32(BIT(1))
+ #define IWL_TX_FIFO_VI_MSK cpu_to_le32(BIT(2))
+ #define IWL_TX_FIFO_VO_MSK cpu_to_le32(BIT(3))
+ #define IWL_AGG_TX_QUEUE_MSK cpu_to_le32(0xffc00)
+
+ #define IWL_DROP_SINGLE 0
+ #define IWL_DROP_SELECTED 1
+ #define IWL_DROP_ALL 2
+
+ /*
+ * REPLY_TXFIFO_FLUSH = 0x1e(command and response)
+ *
+ * When using full FIFO flush this command checks the scheduler HW block WR/RD
+ * pointers to check if all the frames were transferred by DMA into the
+ * relevant TX FIFO queue. Only when the DMA is finished and the queue is
+ * empty the command can finish.
+ * This command is used to flush the TXFIFO from transmit commands, it may
+ * operate on single or multiple queues, the command queue can't be flushed by
+ * this command. The command response is returned when all the queue flush
+ * operations are done. Each TX command flushed return response with the FLUSH
+ * status set in the TX response status. When FIFO flush operation is used,
+ * the flush operation ends when both the scheduler DMA done and TXFIFO empty
+ * are set.
+ *
+ * @fifo_control: bit mask for which queues to flush
+ * @flush_control: flush controls
+ * 0: Dump single MSDU
+ * 1: Dump multiple MSDU according to PS, INVALID STA, TTL, TID disable.
+ * 2: Dump all FIFO
+ */
+ struct iwl_txfifo_flush_cmd {
+ __le32 fifo_control;
+ __le16 flush_control;
+ __le16 reserved;
+ } __attribute__ ((packed));
+
/*
* REPLY_WEP_KEY = 0x20
*/
struct iwl_sensitivity_cmd {
__le16 control; /* always use "1" */
__le16 table[HD_TABLE_SIZE]; /* use HD_* as index */
-} __attribute__ ((packed));
+} __packed;
+ /*
+ *
+ */
+ struct iwl_enhance_sensitivity_cmd {
+ __le16 control; /* always use "1" */
+ __le16 enhance_table[ENHANCE_HD_TABLE_SIZE]; /* use HD_* as index */
+ } __attribute__ ((packed));
+
/**
* REPLY_PHY_CALIBRATION_CMD = 0xb0 (command, has simple generic response)
u8 key[MAX_KEY_SIZE];
__le16 ac_seq_num16[NUM_ACCESS_CATEGORIES_COPY];
__le32 ac_seq_num32[NUM_ACCESS_CATEGORIES_COPY];
-} __attribute__ ((packed));
+} __packed;
-
- #define WL1271_SCAN_MAX_CHANNELS 24
- #define WL1271_SCAN_DEFAULT_TAG 1
- #define WL1271_SCAN_CURRENT_TX_PWR 0
- #define WL1271_SCAN_OPT_ACTIVE 0
- #define WL1271_SCAN_OPT_PASSIVE 1
- #define WL1271_SCAN_OPT_PRIORITY_HIGH 4
- #define WL1271_SCAN_CHAN_MIN_DURATION 30000 /* TU */
- #define WL1271_SCAN_CHAN_MAX_DURATION 60000 /* TU */
- #define WL1271_SCAN_BAND_2_4_GHZ 0
- #define WL1271_SCAN_BAND_5_GHZ 1
- #define WL1271_SCAN_BAND_DUAL 2
-
- struct basic_scan_params {
- __le32 rx_config_options;
- __le32 rx_filter_options;
- /* Scan option flags (WL1271_SCAN_OPT_*) */
- __le16 scan_options;
- /* Number of scan channels in the list (maximum 30) */
- u8 num_channels;
- /* This field indicates the number of probe requests to send
- per channel for an active scan */
- u8 num_probe_requests;
- /* Rate bit field for sending the probes */
- __le32 tx_rate;
- u8 tid_trigger;
- u8 ssid_len;
- /* in order to align */
- u8 padding1[2];
- u8 ssid[IW_ESSID_MAX_SIZE];
- /* Band to scan */
- u8 band;
- u8 use_ssid_list;
- u8 scan_tag;
- u8 padding2;
- } __packed;
-
- struct basic_scan_channel_params {
- /* Duration in TU to wait for frames on a channel for active scan */
- __le32 min_duration;
- __le32 max_duration;
- __le32 bssid_lsb;
- __le16 bssid_msb;
- u8 early_termination;
- u8 tx_power_att;
- u8 channel;
- /* FW internal use only! */
- u8 dfs_candidate;
- u8 activity_detected;
- u8 pad;
- } __packed;
-
- struct wl1271_cmd_scan {
- struct wl1271_cmd_header header;
-
- struct basic_scan_params params;
- struct basic_scan_channel_params channels[WL1271_SCAN_MAX_CHANNELS];
- } __packed;
-
- struct wl1271_cmd_trigger_scan_to {
- struct wl1271_cmd_header header;
-
- __le32 timeout;
- } __packed;
-
struct wl1271_cmd_test_header {
u8 id;
u8 padding[3];
projects / openwrt / staging / blogic.git / commitdiff