ti: k3: common: Enable SEPARATE_CODE_AND_RODATA by default
authorAndrew F. Davis <afd@ti.com>
Tue, 22 Jan 2019 20:16:03 +0000 (14:16 -0600)
committerAndrew F. Davis <afd@ti.com>
Fri, 19 Apr 2019 16:56:43 +0000 (12:56 -0400)
This should be more secure and looks a bit cleaner.

Signed-off-by: Andrew F. Davis <afd@ti.com>
Change-Id: Ie5eaf0234b211ba02631cf5eab5faa1402a34461

plat/ti/k3/common/k3_bl31_setup.c
plat/ti/k3/common/plat_common.mk
plat/ti/k3/include/platform_def.h

index 69ecbfc6d81aa48f672681af7220127656a2b11e..66ce9a7d46bbcb1cbf860efcb6ff8fc2af16c1df 100644 (file)
@@ -99,7 +99,7 @@ void bl31_early_platform_setup2(u_register_t arg0, u_register_t arg1,
 void bl31_plat_arch_setup(void)
 {
        const mmap_region_t bl_regions[] = {
-               MAP_REGION_FLAT(BL31_BASE, BL31_END - BL31_BASE,
+               MAP_REGION_FLAT(BL31_START, BL31_END - BL31_START,
                                MT_MEMORY | MT_RW | MT_SECURE),
                MAP_REGION_FLAT(BL_CODE_BASE, BL_CODE_END - BL_CODE_BASE,
                                MT_CODE | MT_SECURE),
index c91a03586fe55c1ba782007017315776d852500e..29fcafdb94fc7983706d05da9f61b9eb401b65e9 100644 (file)
@@ -22,6 +22,9 @@ ERRATA_A53_836870     :=      1
 ERRATA_A53_843419      :=      1
 ERRATA_A53_855873      :=      1
 
+# Split out RO data into a non-executable section
+SEPARATE_CODE_AND_RODATA :=    1
+
 # Leave the caches enabled on core powerdown path
 TI_AM65X_WORKAROUND    :=      1
 $(eval $(call add_define,TI_AM65X_WORKAROUND))
index c768b50e240f922994cefdff5e3e65fabe23fb29..68fdae745695c270314ce275be7a018fd0e24395 100644 (file)
@@ -82,7 +82,6 @@
 #define BL31_BASE                      SEC_SRAM_BASE
 #define BL31_SIZE                      SEC_SRAM_SIZE
 #define BL31_LIMIT                     (BL31_BASE + BL31_SIZE)
-#define BL31_PROGBITS_LIMIT            BL31_LIMIT
 
 /*
  * Defines the maximum number of translation tables that are allocated by the