drm/i915/intel_i2c: remove POSTING_READ() from gmbus transfers

The POSTING_READ() calls were originally added to make sure the writes
were flushed before any timing delays and across loops.
Now that the code has settled a bit, let's remove them.

Signed-off-by: Daniel Kurtz <djkurtz@chromium.org>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>

diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index c56cc350c9cfc0d2672c27706a4bf7cd4db2e13c..cab879fedf3caf229fd3f142ae1c4845184a0175 100644 (file)
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -217,7 +217,6 @@ gmbus_xfer_read(struct drm_i915_private *dev_priv, struct i2c_msg *msg,
                   (len << GMBUS_BYTE_COUNT_SHIFT) |
                   (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
                   GMBUS_SLAVE_READ | GMBUS_SW_RDY);
-       POSTING_READ(GMBUS2 + reg_offset);
        do {
                int ret;
                u32 val, loop = 0;
@@ -261,7 +260,6 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
                   (msg->len << GMBUS_BYTE_COUNT_SHIFT) |
                   (msg->addr << GMBUS_SLAVE_ADDR_SHIFT) |
                   GMBUS_SLAVE_WRITE | GMBUS_SW_RDY);
-       POSTING_READ(GMBUS2 + reg_offset);
        while (len) {
                int ret;
                u32 gmbus2;
@@ -272,7 +270,6 @@ gmbus_xfer_write(struct drm_i915_private *dev_priv, struct i2c_msg *msg)
                } while (--len && ++loop < 4);
 
                I915_WRITE(GMBUS3 + reg_offset, val);
-               POSTING_READ(GMBUS2 + reg_offset);
 
                ret = wait_for((gmbus2 = I915_READ(GMBUS2 + reg_offset)) &
                               (GMBUS_SATOER | GMBUS_HW_RDY),