arm64: KVM: Support X-Gene guest VCPU on APM X-Gene host
authorAnup Patel <anup.patel@linaro.org>
Thu, 14 Nov 2013 15:20:08 +0000 (15:20 +0000)
committerMarc Zyngier <marc.zyngier@arm.com>
Sat, 28 Dec 2013 10:28:50 +0000 (10:28 +0000)
This patch allows us to have X-Gene guest VCPU when using KVM arm64
on APM X-Gene host.

We add KVM_ARM_TARGET_XGENE_POTENZA for X-Gene Potenza compatible
guest VCPU and we return KVM_ARM_TARGET_XGENE_POTENZA in kvm_target_cpu()
when running on X-Gene host with Potenza core.

[maz: sanitized the commit log]

Signed-off-by: Anup Patel <anup.patel@linaro.org>
Signed-off-by: Pranavkumar Sawargaonkar <pranavkumar@linaro.org>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm64/include/uapi/asm/kvm.h
arch/arm64/kvm/guest.c
arch/arm64/kvm/sys_regs_generic_v8.c

index 5031f4263937f1bfb130593b6f94daed022d6e91..d9f026bc1a27ecd78d5a8e288bfa3ee0c7980e70 100644 (file)
@@ -55,8 +55,9 @@ struct kvm_regs {
 #define KVM_ARM_TARGET_AEM_V8          0
 #define KVM_ARM_TARGET_FOUNDATION_V8   1
 #define KVM_ARM_TARGET_CORTEX_A57      2
+#define KVM_ARM_TARGET_XGENE_POTENZA   3
 
-#define KVM_ARM_NUM_TARGETS            3
+#define KVM_ARM_NUM_TARGETS            4
 
 /* KVM_ARM_SET_DEVICE_ADDR ioctl id encoding */
 #define KVM_ARM_DEVICE_TYPE_SHIFT      0
index 3f0731e53274c92b540a2eab2d0f154005d815f4..08745578d54de84466f6bbc800e4dc984e0e1c4f 100644 (file)
@@ -207,20 +207,26 @@ int __attribute_const__ kvm_target_cpu(void)
        unsigned long implementor = read_cpuid_implementor();
        unsigned long part_number = read_cpuid_part_number();
 
-       if (implementor != ARM_CPU_IMP_ARM)
-               return -EINVAL;
+       switch (implementor) {
+       case ARM_CPU_IMP_ARM:
+               switch (part_number) {
+               case ARM_CPU_PART_AEM_V8:
+                       return KVM_ARM_TARGET_AEM_V8;
+               case ARM_CPU_PART_FOUNDATION:
+                       return KVM_ARM_TARGET_FOUNDATION_V8;
+               case ARM_CPU_PART_CORTEX_A57:
+                       return KVM_ARM_TARGET_CORTEX_A57;
+               };
+               break;
+       case ARM_CPU_IMP_APM:
+               switch (part_number) {
+               case APM_CPU_PART_POTENZA:
+                       return KVM_ARM_TARGET_XGENE_POTENZA;
+               };
+               break;
+       };
 
-       switch (part_number) {
-       case ARM_CPU_PART_AEM_V8:
-               return KVM_ARM_TARGET_AEM_V8;
-       case ARM_CPU_PART_FOUNDATION:
-               return KVM_ARM_TARGET_FOUNDATION_V8;
-       case ARM_CPU_PART_CORTEX_A57:
-               /* Currently handled by the generic backend */
-               return KVM_ARM_TARGET_CORTEX_A57;
-       default:
-               return -EINVAL;
-       }
+       return -EINVAL;
 }
 
 int kvm_vcpu_set_target(struct kvm_vcpu *vcpu,
index 4268ab9356b1f00e98ca022b207add3b8830fa33..8fe6f76b0edce8b80adc3640b82605a116c66315 100644 (file)
@@ -90,6 +90,9 @@ static int __init sys_reg_genericv8_init(void)
                                          &genericv8_target_table);
        kvm_register_target_sys_reg_table(KVM_ARM_TARGET_CORTEX_A57,
                                          &genericv8_target_table);
+       kvm_register_target_sys_reg_table(KVM_ARM_TARGET_XGENE_POTENZA,
+                                         &genericv8_target_table);
+
        return 0;
 }
 late_initcall(sys_reg_genericv8_init);