SUBTARGETS:=nand sata
KERNEL_PATCHVER:=4.19
+KERNEL_TESTING_PATCHVER:=5.4
define Target/Description
Build images for AppliedMicro APM821xx based boards.
--- /dev/null
+# CONFIG_40x is not set
+CONFIG_44x=y
+CONFIG_460EX=y
+CONFIG_4xx=y
+CONFIG_4xx_SOC=y
+CONFIG_64BIT_TIME=y
+# CONFIG_ADIN_PHY is not set
+# CONFIG_ADVANCED_OPTIONS is not set
+# CONFIG_AL_FIC is not set
+CONFIG_APM821xx=y
+CONFIG_APOLLO3G=y
+# CONFIG_ARCHES is not set
+CONFIG_ARCH_32BIT_OFF_T=y
+CONFIG_ARCH_DMA_ADDR_T_64BIT=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
+CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
+CONFIG_ARCH_HAS_DEBUG_VIRTUAL=y
+CONFIG_ARCH_HAS_DMA_COHERENT_TO_PFN=y
+CONFIG_ARCH_HAS_DMA_PREP_COHERENT=y
+CONFIG_ARCH_HAS_ELF_RANDOMIZE=y
+CONFIG_ARCH_HAS_FORTIFY_SOURCE=y
+CONFIG_ARCH_HAS_GCOV_PROFILE_ALL=y
+CONFIG_ARCH_HAS_KCOV=y
+CONFIG_ARCH_HAS_MEMBARRIER_CALLBACKS=y
+CONFIG_ARCH_HAS_PHYS_TO_DMA=y
+CONFIG_ARCH_HAS_PMEM_API=y
+CONFIG_ARCH_HAS_PTE_SPECIAL=y
+CONFIG_ARCH_HAS_STRICT_KERNEL_RWX=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_CPU=y
+CONFIG_ARCH_HAS_SYNC_DMA_FOR_DEVICE=y
+CONFIG_ARCH_HAS_UACCESS_FLUSHCACHE=y
+CONFIG_ARCH_HAVE_NMI_SAFE_CMPXCHG=y
+CONFIG_ARCH_HIBERNATION_POSSIBLE=y
+CONFIG_ARCH_KEEP_MEMBLOCK=y
+CONFIG_ARCH_MAY_HAVE_PC_FDC=y
+CONFIG_ARCH_MIGHT_HAVE_PC_PARPORT=y
+CONFIG_ARCH_MIGHT_HAVE_PC_SERIO=y
+CONFIG_ARCH_MMAP_RND_BITS=11
+CONFIG_ARCH_MMAP_RND_BITS_MAX=17
+CONFIG_ARCH_MMAP_RND_BITS_MIN=11
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MAX=17
+CONFIG_ARCH_MMAP_RND_COMPAT_BITS_MIN=11
+CONFIG_ARCH_OPTIONAL_KERNEL_RWX=y
+CONFIG_ARCH_SUPPORTS_ATOMIC_RMW=y
+CONFIG_ARCH_SUPPORTS_DEBUG_PAGEALLOC=y
+CONFIG_ARCH_SUPPORTS_UPROBES=y
+CONFIG_ARCH_SUSPEND_POSSIBLE=y
+CONFIG_ARCH_USE_BUILTIN_BSWAP=y
+CONFIG_ARCH_WANT_IPC_PARSE_VERSION=y
+CONFIG_ARCH_WEAK_RELEASE_ACQUIRE=y
+CONFIG_AUDIT_ARCH=y
+# CONFIG_BACKLIGHT_CLASS_DEVICE is not set
+# CONFIG_BAMBOO is not set
+# CONFIG_BLK_DEV_INITRD is not set
+CONFIG_BLK_MQ_PCI=y
+CONFIG_BLK_PM=y
+CONFIG_BLUESTONE=y
+CONFIG_BOOKE=y
+CONFIG_BOOKE_WDT=y
+# CONFIG_CANYONLANDS is not set
+CONFIG_CC_CAN_LINK=y
+CONFIG_CC_HAS_ASM_INLINE=y
+CONFIG_CC_HAS_KASAN_GENERIC=y
+CONFIG_CC_HAS_WARN_MAYBE_UNINITIALIZED=y
+CONFIG_CLONE_BACKWARDS=y
+CONFIG_CMDLINE="rootfstype=squashfs noinitrd"
+CONFIG_CMDLINE_BOOL=y
+CONFIG_COMPAT_32BIT_TIME=y
+# CONFIG_COUNTER is not set
+CONFIG_CPU_BIG_ENDIAN=y
+CONFIG_CRC16=y
+# CONFIG_CRC32_SARWATE is not set
+CONFIG_CRC32_SLICEBY8=y
+CONFIG_CRYPTO_ACOMP2=y
+# CONFIG_CRYPTO_ADIANTUM is not set
+CONFIG_CRYPTO_AEAD=y
+CONFIG_CRYPTO_AEAD2=y
+CONFIG_CRYPTO_AKCIPHER2=y
+CONFIG_CRYPTO_AUTHENC=y
+CONFIG_CRYPTO_CCM=y
+CONFIG_CRYPTO_CFB=y
+CONFIG_CRYPTO_CTR=y
+CONFIG_CRYPTO_DEFLATE=y
+# CONFIG_CRYPTO_DEV_ATMEL_SHA204A is not set
+CONFIG_CRYPTO_DEV_PPC4XX=y
+CONFIG_CRYPTO_DRBG=y
+CONFIG_CRYPTO_DRBG_HMAC=y
+CONFIG_CRYPTO_DRBG_MENU=y
+CONFIG_CRYPTO_ECB=y
+# CONFIG_CRYPTO_ECRDSA is not set
+CONFIG_CRYPTO_ESSIV=y
+CONFIG_CRYPTO_GCM=y
+CONFIG_CRYPTO_GF128MUL=y
+CONFIG_CRYPTO_GHASH=y
+CONFIG_CRYPTO_HASH=y
+CONFIG_CRYPTO_HASH2=y
+CONFIG_CRYPTO_HMAC=y
+CONFIG_CRYPTO_HW=y
+CONFIG_CRYPTO_JITTERENTROPY=y
+CONFIG_CRYPTO_KPP2=y
+CONFIG_CRYPTO_LIB_AES=y
+CONFIG_CRYPTO_LIB_SHA256=y
+CONFIG_CRYPTO_LZO=y
+CONFIG_CRYPTO_MANAGER=y
+CONFIG_CRYPTO_MANAGER2=y
+CONFIG_CRYPTO_MD5_PPC=y
+CONFIG_CRYPTO_NULL=y
+CONFIG_CRYPTO_NULL2=y
+CONFIG_CRYPTO_OFB=y
+CONFIG_CRYPTO_RNG=y
+CONFIG_CRYPTO_RNG2=y
+CONFIG_CRYPTO_RNG_DEFAULT=y
+CONFIG_CRYPTO_SEQIV=y
+CONFIG_CRYPTO_SHA1_PPC=y
+CONFIG_CRYPTO_SHA256=y
+# CONFIG_CRYPTO_STREEBOG is not set
+# CONFIG_CRYPTO_XXHASH is not set
+CONFIG_DATA_SHIFT=12
+CONFIG_DEBUG_MISC=y
+# CONFIG_DEBUG_PLIST is not set
+CONFIG_DMA_DECLARE_COHERENT=y
+CONFIG_DMA_DIRECT_REMAP=y
+CONFIG_DMA_REMAP=y
+CONFIG_DTC=y
+# CONFIG_E200 is not set
+CONFIG_EARLY_PRINTK=y
+# CONFIG_EBONY is not set
+CONFIG_EDAC_ATOMIC_SCRUB=y
+CONFIG_EDAC_SUPPORT=y
+# CONFIG_EEPROM_EE1004 is not set
+# CONFIG_EIGER is not set
+CONFIG_ETEXT_SHIFT=12
+# CONFIG_EXFAT_FS is not set
+CONFIG_EXTRA_TARGETS="uImage"
+# CONFIG_FIELDBUS_DEV is not set
+CONFIG_FIXED_PHY=y
+CONFIG_FORCE_PCI=y
+CONFIG_FREEZER=y
+# CONFIG_FSL_LBC is not set
+# CONFIG_FS_VERITY is not set
+# CONFIG_FW_LOADER_COMPRESS is not set
+CONFIG_FW_LOADER_PAGED_BUF=y
+CONFIG_GCC_PLUGINS=y
+# CONFIG_GCC_PLUGIN_CYC_COMPLEXITY is not set
+# CONFIG_GCC_PLUGIN_LATENT_ENTROPY is not set
+# CONFIG_GCC_PLUGIN_RANDSTRUCT is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_BYREF_ALL is not set
+# CONFIG_GCC_PLUGIN_STRUCTLEAK_USER is not set
+CONFIG_GENERIC_ALLOCATOR=y
+CONFIG_GENERIC_ATOMIC64=y
+CONFIG_GENERIC_BUG=y
+CONFIG_GENERIC_CLOCKEVENTS=y
+CONFIG_GENERIC_CMOS_UPDATE=y
+CONFIG_GENERIC_CPU=y
+CONFIG_GENERIC_CPU_AUTOPROBE=y
+CONFIG_GENERIC_IRQ_SHOW=y
+CONFIG_GENERIC_IRQ_SHOW_LEVEL=y
+CONFIG_GENERIC_ISA_DMA=y
+CONFIG_GENERIC_MSI_IRQ=y
+CONFIG_GENERIC_PCI_IOMAP=y
+CONFIG_GENERIC_SMP_IDLE_THREAD=y
+CONFIG_GENERIC_STRNCPY_FROM_USER=y
+CONFIG_GENERIC_STRNLEN_USER=y
+CONFIG_GENERIC_TIME_VSYSCALL=y
+# CONFIG_GEN_RTC is not set
+# CONFIG_GLACIER is not set
+CONFIG_GPIOLIB=y
+# CONFIG_GPIO_AMD_FCH is not set
+# CONFIG_GPIO_CADENCE is not set
+CONFIG_GPIO_GENERIC=y
+CONFIG_GPIO_GENERIC_PLATFORM=y
+# CONFIG_GPIO_GW_PLD is not set
+CONFIG_GPIO_SYSFS=y
+# CONFIG_GVE is not set
+# CONFIG_HABANA_AI is not set
+CONFIG_HAS_DMA=y
+CONFIG_HAS_IOMEM=y
+CONFIG_HAS_IOPORT_MAP=y
+CONFIG_HAVE_ARCH_AUDITSYSCALL=y
+CONFIG_HAVE_ARCH_JUMP_LABEL=y
+CONFIG_HAVE_ARCH_KASAN=y
+CONFIG_HAVE_ARCH_KGDB=y
+CONFIG_HAVE_ARCH_NVRAM_OPS=y
+CONFIG_HAVE_ARCH_SECCOMP_FILTER=y
+CONFIG_HAVE_ARCH_TRACEHOOK=y
+CONFIG_HAVE_ASM_MODVERSIONS=y
+CONFIG_HAVE_CBPF_JIT=y
+CONFIG_HAVE_COPY_THREAD_TLS=y
+CONFIG_HAVE_C_RECORDMCOUNT=y
+CONFIG_HAVE_DEBUG_KMEMLEAK=y
+CONFIG_HAVE_DEBUG_STACKOVERFLOW=y
+CONFIG_HAVE_DYNAMIC_FTRACE=y
+CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS=y
+CONFIG_HAVE_FAST_GUP=y
+CONFIG_HAVE_FTRACE_MCOUNT_RECORD=y
+CONFIG_HAVE_FUNCTION_ERROR_INJECTION=y
+CONFIG_HAVE_FUNCTION_GRAPH_TRACER=y
+CONFIG_HAVE_FUNCTION_TRACER=y
+CONFIG_HAVE_IDE=y
+CONFIG_HAVE_IOREMAP_PROT=y
+CONFIG_HAVE_IRQ_EXIT_ON_IRQ_STACK=y
+CONFIG_HAVE_IRQ_TIME_ACCOUNTING=y
+CONFIG_HAVE_KPROBES_ON_FTRACE=y
+CONFIG_HAVE_LD_DEAD_CODE_DATA_ELIMINATION=y
+CONFIG_HAVE_MEMBLOCK_NODE_MAP=y
+CONFIG_HAVE_MMU_GATHER_PAGE_SIZE=y
+CONFIG_HAVE_MOD_ARCH_SPECIFIC=y
+CONFIG_HAVE_NET_DSA=y
+CONFIG_HAVE_OPROFILE=y
+CONFIG_HAVE_PCI=y
+CONFIG_HAVE_PERF_EVENTS=y
+CONFIG_HAVE_PERF_REGS=y
+CONFIG_HAVE_PERF_USER_STACK_DUMP=y
+CONFIG_HAVE_REGS_AND_STACK_ACCESS_API=y
+CONFIG_HAVE_RSEQ=y
+CONFIG_HAVE_SYSCALL_TRACEPOINTS=y
+CONFIG_HAVE_VIRT_CPU_ACCOUNTING=y
+# CONFIG_HEADERS_INSTALL is not set
+# CONFIG_HEADER_TEST is not set
+CONFIG_HW_RANDOM=y
+CONFIG_HW_RANDOM_PPC4XX=y
+CONFIG_HZ=1000
+# CONFIG_HZ_100 is not set
+CONFIG_HZ_1000=y
+CONFIG_HZ_PERIODIC=y
+CONFIG_I2C=y
+CONFIG_I2C_BOARDINFO=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IBM_IIC=y
+# CONFIG_I2C_NVIDIA_GPU is not set
+# CONFIG_I3C is not set
+CONFIG_IBM_EMAC=y
+CONFIG_IBM_EMAC_EMAC4=y
+CONFIG_IBM_EMAC_POLL_WEIGHT=32
+CONFIG_IBM_EMAC_RGMII=y
+CONFIG_IBM_EMAC_RXB=128
+CONFIG_IBM_EMAC_RX_COPY_THRESHOLD=256
+CONFIG_IBM_EMAC_TAH=y
+CONFIG_IBM_EMAC_TXB=128
+# CONFIG_ICON is not set
+# CONFIG_IGC is not set
+# CONFIG_IKHEADERS is not set
+CONFIG_ILLEGAL_POINTER_VALUE=0
+# CONFIG_INIT_ON_ALLOC_DEFAULT_ON is not set
+# CONFIG_INIT_ON_FREE_DEFAULT_ON is not set
+CONFIG_INIT_STACK_NONE=y
+# CONFIG_INTERCONNECT is not set
+# CONFIG_IO_URING is not set
+CONFIG_IRQCHIP=y
+CONFIG_IRQ_DOMAIN=y
+CONFIG_IRQ_FORCED_THREADING=y
+CONFIG_IRQ_WORK=y
+CONFIG_ISA_DMA_API=y
+# CONFIG_JFFS2_FS is not set
+CONFIG_KASAN_STACK=1
+# CONFIG_KATMAI is not set
+CONFIG_KERNEL_START=0xc0000000
+# CONFIG_LCD_CLASS_DEVICE is not set
+# CONFIG_LEDS_AN30259A is not set
+# CONFIG_LEDS_LM3532 is not set
+# CONFIG_LEDS_TRIGGER_AUDIO is not set
+CONFIG_LEDS_TRIGGER_MTD=y
+CONFIG_LEDS_TRIGGER_PATTERN=y
+CONFIG_LIBFDT=y
+CONFIG_LOCK_DEBUGGING_SUPPORT=y
+# CONFIG_LOCK_EVENT_COUNTS is not set
+CONFIG_LOWMEM_SIZE=0x30000000
+CONFIG_LSM="lockdown,yama,loadpin,safesetid,integrity"
+CONFIG_LZO_COMPRESS=y
+CONFIG_LZO_DECOMPRESS=y
+# CONFIG_MATH_EMULATION is not set
+CONFIG_MDIO_BUS=y
+# CONFIG_MDIO_BUS_MUX_MULTIPLEXER is not set
+CONFIG_MDIO_DEVICE=y
+CONFIG_MEMFD_CREATE=y
+# CONFIG_MFD_LOCHNAGAR is not set
+# CONFIG_MFD_MAX77650 is not set
+# CONFIG_MFD_ROHM_BD70528 is not set
+# CONFIG_MFD_STMFX is not set
+# CONFIG_MFD_STPMIC1 is not set
+# CONFIG_MFD_TQMX86 is not set
+CONFIG_MIGRATION=y
+# CONFIG_MISC_ALCOR_PCI is not set
+CONFIG_MODULES_USE_ELF_RELA=y
+CONFIG_MODULE_ALLOW_MISSING_NAMESPACE_IMPORTS=y
+CONFIG_MTD_CFI_ADV_OPTIONS=y
+# CONFIG_MTD_CFI_GEOMETRY is not set
+# CONFIG_MTD_HYPERBUS is not set
+# CONFIG_MTD_RAW_NAND is not set
+# CONFIG_MTD_SPLIT_SQUASHFS_ROOT is not set
+CONFIG_NEED_DMA_MAP_STATE=y
+CONFIG_NEED_PER_CPU_KM=y
+CONFIG_NEED_SG_DMA_LENGTH=y
+# CONFIG_NET_SCH_TAPRIO is not set
+CONFIG_NET_VENDOR_GOOGLE=y
+CONFIG_NET_VENDOR_PENSANDO=y
+# CONFIG_NI_XGE_MANAGEMENT_ENET is not set
+CONFIG_NOT_COHERENT_CACHE=y
+CONFIG_NR_IRQS=512
+# CONFIG_NULL_TTY is not set
+CONFIG_NVMEM=y
+CONFIG_NVMEM_SYSFS=y
+CONFIG_OF=y
+CONFIG_OF_ADDRESS=y
+CONFIG_OF_EARLY_FLATTREE=y
+CONFIG_OF_FLATTREE=y
+CONFIG_OF_GPIO=y
+CONFIG_OF_IRQ=y
+CONFIG_OF_KOBJ=y
+CONFIG_OF_MDIO=y
+CONFIG_OF_NET=y
+CONFIG_OF_RESERVED_MEM=y
+CONFIG_OLD_SIGACTION=y
+CONFIG_OLD_SIGSUSPEND=y
+# CONFIG_OVERLAY_FS_XINO_AUTO is not set
+CONFIG_PACKING=y
+CONFIG_PAGE_OFFSET=0xc0000000
+CONFIG_PCI=y
+CONFIG_PCIEAER=y
+CONFIG_PCIEPORTBUS=y
+# CONFIG_PCIE_BW is not set
+CONFIG_PCIE_PME=y
+CONFIG_PCI_DISABLE_COMMON_QUIRKS=y
+CONFIG_PCI_DOMAINS=y
+CONFIG_PCI_MSI=y
+CONFIG_PGTABLE_LEVELS=2
+CONFIG_PHYLIB=y
+CONFIG_PHYSICAL_START=0x00000000
+CONFIG_PHYS_64BIT=y
+CONFIG_PHYS_ADDR_T_64BIT=y
+# CONFIG_PHY_CADENCE_DP is not set
+# CONFIG_PHY_CADENCE_DPHY is not set
+# CONFIG_PHY_FSL_IMX8MQ_USB is not set
+# CONFIG_PHY_MIXEL_MIPI_DPHY is not set
+CONFIG_PLUGIN_HOSTCC="g++"
+CONFIG_PM=y
+CONFIG_PM_AUTOSLEEP=y
+# CONFIG_PM_DEBUG is not set
+CONFIG_PM_SLEEP=y
+CONFIG_PM_WAKELOCKS=y
+CONFIG_PM_WAKELOCKS_GC=y
+CONFIG_PM_WAKELOCKS_LIMIT=100
+CONFIG_PPC=y
+CONFIG_PPC32=y
+CONFIG_PPC44x_SIMPLE=y
+CONFIG_PPC4xx_CPM=y
+CONFIG_PPC4xx_GPIO=y
+CONFIG_PPC4xx_MSI=y
+CONFIG_PPC4xx_PCI_EXPRESS=y
+# CONFIG_PPC64 is not set
+# CONFIG_PPC_47x is not set
+# CONFIG_PPC_85xx is not set
+# CONFIG_PPC_8xx is not set
+CONFIG_PPC_ADV_DEBUG_DACS=2
+CONFIG_PPC_ADV_DEBUG_DAC_RANGE=y
+CONFIG_PPC_ADV_DEBUG_DVCS=2
+CONFIG_PPC_ADV_DEBUG_IACS=4
+CONFIG_PPC_ADV_DEBUG_REGS=y
+# CONFIG_PPC_BOOK3S_601 is not set
+# CONFIG_PPC_BOOK3S_6xx is not set
+CONFIG_PPC_DCR=y
+CONFIG_PPC_DCR_NATIVE=y
+# CONFIG_PPC_EARLY_DEBUG is not set
+CONFIG_PPC_FPU=y
+CONFIG_PPC_INDIRECT_PCI=y
+# CONFIG_PPC_IRQ_SOFT_MASK_DEBUG is not set
+CONFIG_PPC_MMU_NOHASH=y
+CONFIG_PPC_MMU_NOHASH_32=y
+CONFIG_PPC_MSI_BITMAP=y
+CONFIG_PPC_PAGE_SHIFT=12
+# CONFIG_PPC_PTDUMP is not set
+CONFIG_PPC_UDBG_16550=y
+CONFIG_PPC_WERROR=y
+# CONFIG_PRINTK_CALLER is not set
+# CONFIG_PSI is not set
+CONFIG_PTE_64BIT=y
+# CONFIG_PVPANIC is not set
+# CONFIG_RAINIER is not set
+# CONFIG_RANDOM_TRUST_BOOTLOADER is not set
+CONFIG_RAS=y
+# CONFIG_REED_SOLOMON_TEST is not set
+CONFIG_RSEQ=y
+# CONFIG_SAM440EP is not set
+# CONFIG_SCOM_DEBUGFS is not set
+# CONFIG_SEQUOIA is not set
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_FSL=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+# CONFIG_SERIAL_FSL_LINFLEXUART is not set
+CONFIG_SERIAL_MCTRL_GPIO=y
+CONFIG_SERIAL_OF_PLATFORM=y
+# CONFIG_SERIAL_SIFIVE is not set
+CONFIG_SGL_ALLOC=y
+# CONFIG_SHUFFLE_PAGE_ALLOCATOR is not set
+CONFIG_SIMPLE_GPIO=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_SRCU=y
+CONFIG_SUSPEND=y
+CONFIG_SUSPEND_FREEZER=y
+CONFIG_SWPHY=y
+CONFIG_SYSCTL_EXCEPTION_TRACE=y
+# CONFIG_TAISHAN is not set
+CONFIG_TASK_SIZE=0xc0000000
+# CONFIG_TEST_BLACKHOLE_DEV is not set
+# CONFIG_TEST_MEMCAT_P is not set
+# CONFIG_TEST_MEMINIT is not set
+# CONFIG_TEST_STACKINIT is not set
+# CONFIG_TEST_STRSCPY is not set
+# CONFIG_TEST_VMALLOC is not set
+# CONFIG_TEST_XARRAY is not set
+CONFIG_THREAD_INFO_IN_TASK=y
+CONFIG_THREAD_SHIFT=13
+CONFIG_TICK_CPU_ACCOUNTING=y
+CONFIG_TINY_SRCU=y
+# CONFIG_TI_CPSW_PHY_SEL is not set
+CONFIG_UBSAN_ALIGNMENT=y
+# CONFIG_UNICODE is not set
+CONFIG_UNIX_SCM=y
+# CONFIG_USB_CONN_GPIO is not set
+CONFIG_USB_SUPPORT=y
+# CONFIG_VALIDATE_FS_PARSER is not set
+CONFIG_VDSO32=y
+# CONFIG_VIRTIO_MENU is not set
+# CONFIG_VIRT_CPU_ACCOUNTING_NATIVE is not set
+# CONFIG_WARP is not set
+CONFIG_WATCHDOG_CORE=y
+CONFIG_WATCHDOG_OPEN_TIMEOUT=0
+# CONFIG_WNDR4700 is not set
+# CONFIG_XILINX_SDFEC is not set
+# CONFIG_XILINX_SYSACE is not set
+# CONFIG_XILINX_VIRTEX440_GENERIC_BOARD is not set
+CONFIG_XZ_DEC_BCJ=y
+CONFIG_XZ_DEC_POWERPC=y
+# CONFIG_YOSEMITE is not set
+CONFIG_ZLIB_DEFLATE=y
+CONFIG_ZLIB_INFLATE=y
--- /dev/null
+From 3913dbe4b3256ead342572f7aba726a60ab5fd43 Mon Sep 17 00:00:00 2001
+Message-Id: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com>
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Wed, 1 Jan 2020 22:28:28 +0100
+Subject: [PATCH 1/2] crypto: crypto4xx - reduce memory fragmentation
+To: linux-crypto@vger.kernel.org
+Cc: Herbert Xu <herbert@gondor.apana.org.au>
+
+With recent kernels (>5.2), the driver fails to probe, as the
+allocation of the driver's scatter buffer fails with -ENOMEM.
+
+This happens in crypto4xx_build_sdr(). Where the driver tries
+to get 512KiB (=PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD) of
+continuous memory. This big chunk is by design, since the driver
+uses this circumstance in the crypto4xx_copy_pkt_to_dst() to
+its advantage:
+"all scatter-buffers are all neatly organized in one big
+continuous ringbuffer; So scatterwalk_map_and_copy() can be
+instructed to copy a range of buffers in one go."
+
+The PowerPC arch does not have support for DMA_CMA. Hence,
+this patch reorganizes the order in which the memory
+allocations are done. Since the driver itself is responsible
+for some of the issues.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/crypto/amcc/crypto4xx_core.c | 27 +++++++++++++--------------
+ 1 file changed, 13 insertions(+), 14 deletions(-)
+
+diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
+index 7d6b695c4ab3..3ce5f0a24cbc 100644
+--- a/drivers/crypto/amcc/crypto4xx_core.c
++++ b/drivers/crypto/amcc/crypto4xx_core.c
+@@ -286,7 +286,8 @@ static u32 crypto4xx_build_gdr(struct crypto4xx_device *dev)
+
+ static inline void crypto4xx_destroy_gdr(struct crypto4xx_device *dev)
+ {
+- dma_free_coherent(dev->core_dev->device,
++ if (dev->gdr)
++ dma_free_coherent(dev->core_dev->device,
+ sizeof(struct ce_gd) * PPC4XX_NUM_GD,
+ dev->gdr, dev->gdr_pa);
+ }
+@@ -354,13 +355,6 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device *dev)
+ {
+ int i;
+
+- /* alloc memory for scatter descriptor ring */
+- dev->sdr = dma_alloc_coherent(dev->core_dev->device,
+- sizeof(struct ce_sd) * PPC4XX_NUM_SD,
+- &dev->sdr_pa, GFP_ATOMIC);
+- if (!dev->sdr)
+- return -ENOMEM;
+-
+ dev->scatter_buffer_va =
+ dma_alloc_coherent(dev->core_dev->device,
+ PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
+@@ -368,6 +362,13 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device *dev)
+ if (!dev->scatter_buffer_va)
+ return -ENOMEM;
+
++ /* alloc memory for scatter descriptor ring */
++ dev->sdr = dma_alloc_coherent(dev->core_dev->device,
++ sizeof(struct ce_sd) * PPC4XX_NUM_SD,
++ &dev->sdr_pa, GFP_ATOMIC);
++ if (!dev->sdr)
++ return -ENOMEM;
++
+ for (i = 0; i < PPC4XX_NUM_SD; i++) {
+ dev->sdr[i].ptr = dev->scatter_buffer_pa +
+ PPC4XX_SD_BUFFER_SIZE * i;
+@@ -1439,15 +1440,14 @@ static int crypto4xx_probe(struct platform_device *ofdev)
+ spin_lock_init(&core_dev->lock);
+ INIT_LIST_HEAD(&core_dev->dev->alg_list);
+ ratelimit_default_init(&core_dev->dev->aead_ratelimit);
++ rc = crypto4xx_build_sdr(core_dev->dev);
++ if (rc)
++ goto err_build_sdr;
+ rc = crypto4xx_build_pdr(core_dev->dev);
+ if (rc)
+- goto err_build_pdr;
++ goto err_build_sdr;
+
+ rc = crypto4xx_build_gdr(core_dev->dev);
+- if (rc)
+- goto err_build_pdr;
+-
+- rc = crypto4xx_build_sdr(core_dev->dev);
+ if (rc)
+ goto err_build_sdr;
+
+@@ -1493,7 +1493,6 @@ static int crypto4xx_probe(struct platform_device *ofdev)
+ err_build_sdr:
+ crypto4xx_destroy_sdr(core_dev->dev);
+ crypto4xx_destroy_gdr(core_dev->dev);
+-err_build_pdr:
+ crypto4xx_destroy_pdr(core_dev->dev);
+ kfree(core_dev->dev);
+ err_alloc_dev:
+--
+2.25.0.rc0
+
--- /dev/null
+From 5bacaaea8a228bc46f402595b1694ef9128f3599 Mon Sep 17 00:00:00 2001
+Message-Id: <5bacaaea8a228bc46f402595b1694ef9128f3599.1577917078.git.chunkeey@gmail.com>
+In-Reply-To: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com>
+References: <3913dbe4b3256ead342572f7aba726a60ab5fd43.1577917078.git.chunkeey@gmail.com>
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Wed, 1 Jan 2020 22:54:54 +0100
+Subject: [PATCH 2/2] crypto: crypto4xx - use GFP_KERNEL for big allocations
+To: linux-crypto@vger.kernel.org
+Cc: Herbert Xu <herbert@gondor.apana.org.au>
+
+The driver should use GFP_KERNEL for the bigger allocation
+during the driver's crypto4xx_probe() and not GFP_ATOMIC in
+my opinion.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/crypto/amcc/crypto4xx_core.c | 12 ++++++------
+ 1 file changed, 6 insertions(+), 6 deletions(-)
+
+diff --git a/drivers/crypto/amcc/crypto4xx_core.c b/drivers/crypto/amcc/crypto4xx_core.c
+index 3ce5f0a24cbc..981de43ea5e2 100644
+--- a/drivers/crypto/amcc/crypto4xx_core.c
++++ b/drivers/crypto/amcc/crypto4xx_core.c
+@@ -169,7 +169,7 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device *dev)
+ int i;
+ dev->pdr = dma_alloc_coherent(dev->core_dev->device,
+ sizeof(struct ce_pd) * PPC4XX_NUM_PD,
+- &dev->pdr_pa, GFP_ATOMIC);
++ &dev->pdr_pa, GFP_KERNEL);
+ if (!dev->pdr)
+ return -ENOMEM;
+
+@@ -185,13 +185,13 @@ static u32 crypto4xx_build_pdr(struct crypto4xx_device *dev)
+ dev->shadow_sa_pool = dma_alloc_coherent(dev->core_dev->device,
+ sizeof(union shadow_sa_buf) * PPC4XX_NUM_PD,
+ &dev->shadow_sa_pool_pa,
+- GFP_ATOMIC);
++ GFP_KERNEL);
+ if (!dev->shadow_sa_pool)
+ return -ENOMEM;
+
+ dev->shadow_sr_pool = dma_alloc_coherent(dev->core_dev->device,
+ sizeof(struct sa_state_record) * PPC4XX_NUM_PD,
+- &dev->shadow_sr_pool_pa, GFP_ATOMIC);
++ &dev->shadow_sr_pool_pa, GFP_KERNEL);
+ if (!dev->shadow_sr_pool)
+ return -ENOMEM;
+ for (i = 0; i < PPC4XX_NUM_PD; i++) {
+@@ -277,7 +277,7 @@ static u32 crypto4xx_build_gdr(struct crypto4xx_device *dev)
+ {
+ dev->gdr = dma_alloc_coherent(dev->core_dev->device,
+ sizeof(struct ce_gd) * PPC4XX_NUM_GD,
+- &dev->gdr_pa, GFP_ATOMIC);
++ &dev->gdr_pa, GFP_KERNEL);
+ if (!dev->gdr)
+ return -ENOMEM;
+
+@@ -358,14 +358,14 @@ static u32 crypto4xx_build_sdr(struct crypto4xx_device *dev)
+ dev->scatter_buffer_va =
+ dma_alloc_coherent(dev->core_dev->device,
+ PPC4XX_SD_BUFFER_SIZE * PPC4XX_NUM_SD,
+- &dev->scatter_buffer_pa, GFP_ATOMIC);
++ &dev->scatter_buffer_pa, GFP_KERNEL);
+ if (!dev->scatter_buffer_va)
+ return -ENOMEM;
+
+ /* alloc memory for scatter descriptor ring */
+ dev->sdr = dma_alloc_coherent(dev->core_dev->device,
+ sizeof(struct ce_sd) * PPC4XX_NUM_SD,
+- &dev->sdr_pa, GFP_ATOMIC);
++ &dev->sdr_pa, GFP_KERNEL);
+ if (!dev->sdr)
+ return -ENOMEM;
+
+--
+2.25.0.rc0
+
--- /dev/null
+--- a/arch/powerpc/platforms/44x/Kconfig
++++ b/arch/powerpc/platforms/44x/Kconfig
+@@ -131,6 +131,17 @@ config CANYONLANDS
+ help
+ This option enables support for the AMCC PPC460EX evaluation board.
+
++config APOLLO3G
++ bool "Apollo3G"
++ depends on 44x
++ default n
++ select PPC44x_SIMPLE
++ select APM821xx
++ select IBM_EMAC_RGMII
++ select 460EX
++ help
++ This option enables support for the AMCC Apollo 3G board.
++
+ config GLACIER
+ bool "Glacier"
+ depends on 44x
+--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
++++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
+@@ -50,6 +50,7 @@ machine_device_initcall(ppc44x_simple, p
+ * board.c file for it rather than adding it to this list.
+ */
+ static char *board[] __initdata = {
++ "amcc,apollo3g",
+ "amcc,arches",
+ "amcc,bamboo",
+ "apm,bluestone",
--- /dev/null
+--- a/arch/powerpc/platforms/44x/Makefile
++++ b/arch/powerpc/platforms/44x/Makefile
+@@ -4,6 +4,7 @@ ifneq ($(CONFIG_PPC4xx_CPM),y)
+ obj-y += idle.o
+ endif
+ obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o
++obj-$(CONFIG_WNDR4700) += wndr4700.o
+ obj-$(CONFIG_EBONY) += ebony.o
+ obj-$(CONFIG_SAM440EP) += sam440ep.o
+ obj-$(CONFIG_WARP) += warp.o
+--- a/arch/powerpc/platforms/44x/Kconfig
++++ b/arch/powerpc/platforms/44x/Kconfig
+@@ -260,6 +260,19 @@ config ICON
+ help
+ This option enables support for the AMCC PPC440SPe evaluation board.
+
++config WNDR4700
++ bool "WNDR4700"
++ depends on 44x
++ default n
++ select APM821xx
++ select PCI_MSI
++ select PPC4xx_MSI
++ select PPC4xx_PCI_EXPRESS
++ select IBM_EMAC_RGMII
++ select 460EX
++ help
++ This option enables support for the Netgear WNDR4700/WNDR4720 board.
++
+ config XILINX_VIRTEX440_GENERIC_BOARD
+ bool "Generic Xilinx Virtex 5 FXT board support"
+ depends on 44x
--- /dev/null
+--- a/arch/powerpc/platforms/4xx/pci.c
++++ b/arch/powerpc/platforms/4xx/pci.c
+@@ -1060,15 +1060,24 @@ static int __init apm821xx_pciex_init_po
+ u32 val;
+
+ /*
+- * Do a software reset on PCIe ports.
+- * This code is to fix the issue that pci drivers doesn't re-assign
+- * bus number for PCIE devices after Uboot
+- * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
+- * PT quad port, SAS LSI 1064E)
++ * Only reset the PHY when no link is currently established.
++ * This is for the Atheros PCIe board which has problems to establish
++ * the link (again) after this PHY reset. All other currently tested
++ * PCIe boards don't show this problem.
+ */
+-
+- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
+- mdelay(10);
++ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
++ if (!(val & 0x00001000)) {
++ /*
++ * Do a software reset on PCIe ports.
++ * This code is to fix the issue that pci drivers doesn't re-assign
++ * bus number for PCIE devices after Uboot
++ * scanned and configured all the buses (eg. PCIE NIC IntelPro/1000
++ * PT quad port, SAS LSI 1064E)
++ */
++
++ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x0);
++ mdelay(10);
++ }
+
+ if (port->endpoint)
+ val = PTYPE_LEGACY_ENDPOINT << 20;
+@@ -1085,9 +1094,12 @@ static int __init apm821xx_pciex_init_po
+ mtdcri(SDR0, PESDR0_460EX_L0DRV, 0x00000130);
+ mtdcri(SDR0, PESDR0_460EX_L0CLK, 0x00000006);
+
+- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
+- mdelay(50);
+- mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
++ val = mfdcri(SDR0, port->sdr_base + PESDRn_LOOP);
++ if (!(val & 0x00001000)) {
++ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x10000000);
++ mdelay(50);
++ mtdcri(SDR0, PESDR0_460EX_PHY_CTL_RST, 0x30000000);
++ }
+
+ mtdcri(SDR0, port->sdr_base + PESDRn_RCSSET,
+ mfdcri(SDR0, port->sdr_base + PESDRn_RCSSET) |
--- /dev/null
+--- a/arch/powerpc/platforms/4xx/pci.c
++++ b/arch/powerpc/platforms/4xx/pci.c
+@@ -1905,9 +1905,9 @@ static void __init ppc4xx_configure_pcie
+ * if it works
+ */
+ out_le32(mbase + PECFG_PIM0LAL, 0x00000000);
+- out_le32(mbase + PECFG_PIM0LAH, 0x00000000);
++ out_le32(mbase + PECFG_PIM0LAH, 0x00000008);
+ out_le32(mbase + PECFG_PIM1LAL, 0x00000000);
+- out_le32(mbase + PECFG_PIM1LAH, 0x00000000);
++ out_le32(mbase + PECFG_PIM1LAH, 0x0000000c);
+ out_le32(mbase + PECFG_PIM01SAH, 0xffff0000);
+ out_le32(mbase + PECFG_PIM01SAL, 0x00000000);
+
--- /dev/null
+Subject: [PATCH v2 1/5] usb: xhci: add firmware loader for uPD720201 and uPD720202 w/o ROM
+Date: Fri, 21 Jun 2019 14:29:09 +0530
+Message-Id: <20190621085913.8722-2-vkoul@kernel.org>
+From: Christian Lamparter <chunkeey@googlemail.com>
+
+This patch adds a firmware loader for the uPD720201K8-711-BAC-A
+and uPD720202K8-711-BAA-A variant. Both of these chips are listed
+in Renesas' R19UH0078EJ0500 Rev.5.00 "User's Manual: Hardware" as
+devices which need the firmware loader on page 2 in order to
+work as they "do not support the External ROM".
+
+The "Firmware Download Sequence" is describe in chapter
+"7.1 FW Download Interface" R19UH0078EJ0500 Rev.5.00 page 131.
+
+The firmware "K2013080.mem" is available from a USB3.0 Host to
+PCIe Adapter (PP2U-E card) "Firmware download" archive. An
+alternative version can be sourced from Netgear's WNDR4700 GPL
+archives.
+
+The release notes of the PP2U-E's "Firmware Download" ver 2.0.1.3
+(2012-06-15) state that the firmware is for the following devices:
+ - uPD720201 ES 2.0 sample whose revision ID is 2.
+ - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3.
+ - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2.
+
+Cc: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
+Signed-off-by: Christian Lamparter <chunkeey@googlemail.com>
+Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
+[vkoul: fixed comments:
+ used macros for timeout count and delay
+ removed renesas_fw_alive_check
+ cleaned renesas_fw_callback
+ removed recurion for renesas_fw_download
+ added MODULE_FIRMWARE]
+Signed-off-by: Vinod Koul <vkoul@kernel.org>
+---
+ drivers/usb/host/xhci-pci.c | 458 ++++++++++++++++++++++++++++++++++++
+ 1 file changed, 458 insertions(+)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -12,6 +12,8 @@
+ #include <linux/slab.h>
+ #include <linux/module.h>
+ #include <linux/acpi.h>
++#include <linux/firmware.h>
++#include <linux/unaligned/access_ok.h>
+
+ #include "xhci.h"
+ #include "xhci-trace.h"
+@@ -48,6 +50,44 @@
+ #define PCI_DEVICE_ID_AMD_PROMONTORYA_1 0x43bc
+ #define PCI_DEVICE_ID_ASMEDIA_1042A_XHCI 0x1142
+
++#define RENESAS_FW_VERSION 0x6C
++#define RENESAS_ROM_CONFIG 0xF0
++#define RENESAS_FW_STATUS 0xF4
++#define RENESAS_FW_STATUS_MSB 0xF5
++#define RENESAS_ROM_STATUS 0xF6
++#define RENESAS_ROM_STATUS_MSB 0xF7
++#define RENESAS_DATA0 0xF8
++#define RENESAS_DATA1 0xFC
++
++#define RENESAS_FW_VERSION_FIELD GENMASK(23, 7)
++#define RENESAS_FW_VERSION_OFFSET 8
++
++#define RENESAS_FW_STATUS_DOWNLOAD_ENABLE BIT(0)
++#define RENESAS_FW_STATUS_LOCK BIT(1)
++#define RENESAS_FW_STATUS_RESULT GENMASK(6, 4)
++ #define RENESAS_FW_STATUS_INVALID 0
++ #define RENESAS_FW_STATUS_SUCCESS BIT(4)
++ #define RENESAS_FW_STATUS_ERROR BIT(5)
++#define RENESAS_FW_STATUS_SET_DATA0 BIT(8)
++#define RENESAS_FW_STATUS_SET_DATA1 BIT(9)
++
++#define RENESAS_ROM_STATUS_ACCESS BIT(0)
++#define RENESAS_ROM_STATUS_ERASE BIT(1)
++#define RENESAS_ROM_STATUS_RELOAD BIT(2)
++#define RENESAS_ROM_STATUS_RESULT GENMASK(6, 4)
++ #define RENESAS_ROM_STATUS_INVALID 0
++ #define RENESAS_ROM_STATUS_SUCCESS BIT(4)
++ #define RENESAS_ROM_STATUS_ERROR BIT(5)
++#define RENESAS_ROM_STATUS_SET_DATA0 BIT(8)
++#define RENESAS_ROM_STATUS_SET_DATA1 BIT(9)
++#define RENESAS_ROM_STATUS_ROM_EXISTS BIT(15)
++
++#define RENESAS_ROM_ERASE_MAGIC 0x5A65726F
++#define RENESAS_ROM_WRITE_MAGIC 0x53524F4D
++
++#define RENESAS_RETRY 1000
++#define RENESAS_DELAY 10
++
+ static const char hcd_name[] = "xhci_hcd";
+
+ static struct hc_driver __read_mostly xhci_pci_hc_driver;
+@@ -262,6 +302,873 @@ static void xhci_pme_acpi_rtd3_enable(st
+ static void xhci_pme_acpi_rtd3_enable(struct pci_dev *dev) { }
+ #endif /* CONFIG_ACPI */
+
++static const struct renesas_fw_entry {
++ const char *firmware_name;
++ u16 device;
++ u8 revision;
++ u16 expected_version;
++} renesas_fw_table[] = {
++ /*
++ * Only the uPD720201K8-711-BAC-A or uPD720202K8-711-BAA-A
++ * are listed in R19UH0078EJ0500 Rev.5.00 as devices which
++ * need the software loader.
++ *
++ * PP2U/ReleaseNote_USB3-201-202-FW.txt:
++ *
++ * Note: This firmware is for the following devices.
++ * - uPD720201 ES 2.0 sample whose revision ID is 2.
++ * - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3.
++ * - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2.
++ *
++ * Entry expected_version should be kept in increasing order for a
++ * chip, so that driver will pick first version and if that fails
++ * then next one will be picked
++ */
++ { "K2013080.mem", 0x0014, 0x02, 0x2013 },
++ { "K2013080.mem", 0x0014, 0x03, 0x2013 },
++ { "K2026090.mem", 0x0014, 0x03, 0x2026 },
++ { "K2013080.mem", 0x0015, 0x02, 0x2013 },
++ { "K2026090.mem", 0x0015, 0x02, 0x2026 },
++};
++
++MODULE_FIRMWARE("K2013080.mem");
++MODULE_FIRMWARE("K2026090.mem");
++
++static const struct renesas_fw_entry *renesas_needs_fw_dl(struct pci_dev *dev)
++{
++ const struct renesas_fw_entry *entry;
++ size_t i;
++
++ /* This loader will only work with a RENESAS device. */
++ if (!(dev->vendor == PCI_VENDOR_ID_RENESAS))
++ return NULL;
++
++ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) {
++ entry = &renesas_fw_table[i];
++ if (entry->device == dev->device &&
++ entry->revision == dev->revision)
++ return entry;
++ }
++
++ return NULL;
++}
++
++static const struct
++renesas_fw_entry *renesas_get_next_entry(struct pci_dev *dev,
++ const struct renesas_fw_entry *entry)
++{
++ const struct renesas_fw_entry *next_entry;
++ size_t i;
++
++ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) {
++ next_entry = &renesas_fw_table[i];
++ if (next_entry->device == dev->device &&
++ next_entry->revision == dev->revision &&
++ next_entry->expected_version > entry->expected_version)
++ return next_entry;
++ }
++
++ return NULL;
++}
++
++static int renesas_fw_download_image(struct pci_dev *dev,
++ const u32 *fw,
++ size_t step)
++{
++ size_t i;
++ int err;
++ u8 fw_status;
++ bool data0_or_data1;
++
++ /*
++ * The hardware does alternate between two 32-bit pages.
++ * (This is because each row of the firmware is 8 bytes).
++ *
++ * for even steps we use DATA0, for odd steps DATA1.
++ */
++ data0_or_data1 = (step & 1) == 1;
++
++ /* step+1. Read "Set DATAX" and confirm it is cleared. */
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ err = pci_read_config_byte(dev, RENESAS_FW_STATUS_MSB,
++ &fw_status);
++ if (err)
++ return pcibios_err_to_errno(err);
++ if (!(fw_status & BIT(data0_or_data1)))
++ break;
++
++ udelay(RENESAS_DELAY);
++ }
++ if (i == RENESAS_RETRY)
++ return -ETIMEDOUT;
++
++ /*
++ * step+2. Write FW data to "DATAX".
++ * "LSB is left" => force little endian
++ */
++ err = pci_write_config_dword(dev, data0_or_data1 ?
++ RENESAS_DATA1 : RENESAS_DATA0,
++ (__force u32)cpu_to_le32(fw[step]));
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ udelay(100);
++
++ /* step+3. Set "Set DATAX". */
++ err = pci_write_config_byte(dev, RENESAS_FW_STATUS_MSB,
++ BIT(data0_or_data1));
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ return 0;
++}
++
++static int renesas_fw_verify(struct pci_dev *dev,
++ const void *fw_data,
++ size_t length)
++{
++ const struct renesas_fw_entry *entry = renesas_needs_fw_dl(dev);
++ u16 fw_version_pointer;
++ u16 fw_version;
++
++ if (!entry)
++ return -EINVAL;
++
++ /*
++ * The Firmware's Data Format is describe in
++ * "6.3 Data Format" R19UH0078EJ0500 Rev.5.00 page 124
++ */
++
++ /* "Each row is 8 bytes". => firmware size must be a multiple of 8. */
++ if (length % 8 != 0)
++ dev_warn(&dev->dev, "firmware size is not a multiple of 8.");
++
++ /*
++ * The bootrom chips of the big brother have sizes up to 64k, let's
++ * assume that's the biggest the firmware can get.
++ */
++ if (length < 0x1000 || length >= 0x10000) {
++ dev_err(&dev->dev, "firmware is size %zd is not (4k - 64k).",
++ length);
++ return -EINVAL;
++ }
++
++ /* The First 2 bytes are fixed value (55aa). "LSB on Left" */
++ if (get_unaligned_le16(fw_data) != 0x55aa) {
++ dev_err(&dev->dev, "no valid firmware header found.");
++ return -EINVAL;
++ }
++
++ /* verify the firmware version position and print it. */
++ fw_version_pointer = get_unaligned_le16(fw_data + 4);
++ if (fw_version_pointer + 2 >= length) {
++ dev_err(&dev->dev,
++ "firmware version pointer is outside of the firmware image.");
++ return -EINVAL;
++ }
++
++ fw_version = get_unaligned_le16(fw_data + fw_version_pointer);
++ dev_dbg(&dev->dev, "got firmware version: %02x.", fw_version);
++
++ if (fw_version != entry->expected_version) {
++ dev_err(&dev->dev,
++ "firmware version mismatch, expected version: %02x.",
++ entry->expected_version);
++ return -EINVAL;
++ }
++
++ return 0;
++}
++
++static int renesas_check_rom_state(struct pci_dev *pdev)
++{
++ const struct renesas_fw_entry *entry;
++ u16 rom_state;
++ u32 version;
++ bool valid_version = false;
++ int err, i;
++
++ /* check FW version */
++ err = pci_read_config_dword(pdev, RENESAS_FW_VERSION, &version);
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ version &= RENESAS_FW_VERSION_FIELD;
++ version = version >> RENESAS_FW_VERSION_OFFSET;
++ dev_dbg(&pdev->dev, "Found FW version loaded is %x\n", version);
++
++ /* treat version in renesas_fw_table as correct ones */
++ for (i = 0; i < ARRAY_SIZE(renesas_fw_table); i++) {
++ entry = &renesas_fw_table[i];
++ if (version == entry->expected_version) {
++ dev_dbg(&pdev->dev, "Detected valid ROM version..\n");
++ valid_version = true;
++ }
++ }
++
++ /*
++ * Test if ROM is present and loaded, if so we can skip everything
++ */
++ err = pci_read_config_word(pdev, RENESAS_ROM_STATUS, &rom_state);
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ if (rom_state & BIT(15)) {
++ /* ROM exists */
++ dev_dbg(&pdev->dev, "ROM exists\n");
++
++ /* Check the "Result Code" Bits (6:4) and act accordingly */
++ switch (rom_state & RENESAS_ROM_STATUS_RESULT) {
++ case RENESAS_ROM_STATUS_SUCCESS:
++ dev_dbg(&pdev->dev, "Success ROM load...");
++ /* we have valid version and status so success */
++ if (valid_version)
++ return 0;
++ break;
++
++ case RENESAS_ROM_STATUS_INVALID: /* No result yet */
++ dev_dbg(&pdev->dev, "No result as it is ROM...");
++ /* we have valid version and status so success */
++ if (valid_version)
++ return 0;
++ break;
++
++ case RENESAS_ROM_STATUS_ERROR: /* Error State */
++ default: /* All other states are marked as "Reserved states" */
++ dev_err(&pdev->dev, "Invalid ROM..");
++ break;
++ }
++ }
++
++ return -EIO;
++}
++
++static int renesas_fw_check_running(struct pci_dev *pdev)
++{
++ int err;
++ u8 fw_state;
++
++ /* Check if device has ROM and loaded, if so skip everything */
++ err = renesas_check_rom_state(pdev);
++ if (!err)
++ return err;
++
++ /*
++ * Test if the device is actually needing the firmware. As most
++ * BIOSes will initialize the device for us. If the device is
++ * initialized.
++ */
++ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS, &fw_state);
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ /*
++ * Check if "FW Download Lock" is locked. If it is and the FW is
++ * ready we can simply continue. If the FW is not ready, we have
++ * to give up.
++ */
++ if (fw_state & RENESAS_FW_STATUS_LOCK) {
++ dev_dbg(&pdev->dev, "FW Download Lock is engaged.");
++
++ if (fw_state & RENESAS_FW_STATUS_SUCCESS)
++ return 0;
++
++ dev_err(&pdev->dev,
++ "FW Download Lock is set and FW is not ready. Giving Up.");
++ return -EIO;
++ }
++
++ /*
++ * Check if "FW Download Enable" is set. If someone (us?) tampered
++ * with it and it can't be resetted, we have to give up too... and
++ * ask for a forgiveness and a reboot.
++ */
++ if (fw_state & RENESAS_FW_STATUS_DOWNLOAD_ENABLE) {
++ dev_err(&pdev->dev,
++ "FW Download Enable is stale. Giving Up (poweroff/reboot needed).");
++ return -EIO;
++ }
++
++ /* Otherwise, Check the "Result Code" Bits (6:4) and act accordingly */
++ switch (fw_state & RENESAS_FW_STATUS_RESULT) {
++ case 0: /* No result yet */
++ dev_dbg(&pdev->dev, "FW is not ready/loaded yet.");
++
++ /* tell the caller, that this device needs the firmware. */
++ return 1;
++
++ case RENESAS_FW_STATUS_SUCCESS: /* Success, device should be working. */
++ dev_dbg(&pdev->dev, "FW is ready.");
++ return 0;
++
++ case RENESAS_FW_STATUS_ERROR: /* Error State */
++ dev_err(&pdev->dev,
++ "hardware is in an error state. Giving up (poweroff/reboot needed).");
++ return -ENODEV;
++
++ default: /* All other states are marked as "Reserved states" */
++ dev_err(&pdev->dev,
++ "hardware is in an invalid state %lx. Giving up (poweroff/reboot needed).",
++ (fw_state & RENESAS_FW_STATUS_RESULT) >> 4);
++ return -EINVAL;
++ }
++}
++
++static int renesas_fw_download(struct pci_dev *pdev,
++ const struct firmware *fw)
++{
++ const u32 *fw_data = (const u32 *)fw->data;
++ size_t i;
++ int err;
++ u8 fw_status;
++
++ /*
++ * For more information and the big picture: please look at the
++ * "Firmware Download Sequence" in "7.1 FW Download Interface"
++ * of R19UH0078EJ0500 Rev.5.00 page 131
++ */
++
++ /*
++ * 0. Set "FW Download Enable" bit in the
++ * "FW Download Control & Status Register" at 0xF4
++ */
++ err = pci_write_config_byte(pdev, RENESAS_FW_STATUS,
++ RENESAS_FW_STATUS_DOWNLOAD_ENABLE);
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ /* 1 - 10 follow one step after the other. */
++ for (i = 0; i < fw->size / 4; i++) {
++ err = renesas_fw_download_image(pdev, fw_data, i);
++ if (err) {
++ dev_err(&pdev->dev,
++ "Firmware Download Step %zd failed at position %zd bytes with (%d).",
++ i, i * 4, err);
++ return err;
++ }
++ }
++
++ /*
++ * This sequence continues until the last data is written to
++ * "DATA0" or "DATA1". Naturally, we wait until "SET DATA0/1"
++ * is cleared by the hardware beforehand.
++ */
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS_MSB,
++ &fw_status);
++ if (err)
++ return pcibios_err_to_errno(err);
++ if (!(fw_status & (BIT(0) | BIT(1))))
++ break;
++
++ udelay(RENESAS_DELAY);
++ }
++ if (i == RENESAS_RETRY)
++ dev_warn(&pdev->dev, "Final Firmware Download step timed out.");
++
++ /*
++ * 11. After finishing writing the last data of FW, the
++ * System Software must clear "FW Download Enable"
++ */
++ err = pci_write_config_byte(pdev, RENESAS_FW_STATUS, 0);
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ /* 12. Read "Result Code" and confirm it is good. */
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS, &fw_status);
++ if (err)
++ return pcibios_err_to_errno(err);
++ if (fw_status & RENESAS_FW_STATUS_SUCCESS)
++ break;
++
++ udelay(RENESAS_DELAY);
++ }
++ if (i == RENESAS_RETRY) {
++ /* Timed out / Error - let's see if we can fix this */
++ err = renesas_fw_check_running(pdev);
++ switch (err) {
++ case 0: /*
++ * we shouldn't end up here.
++ * maybe it took a little bit longer.
++ * But all should be well?
++ */
++ break;
++
++ case 1: /* (No result yet! */
++ return -ETIMEDOUT;
++
++ default:
++ return err;
++ }
++ }
++ /*
++ * Optional last step: Engage Firmware Lock
++ *
++ * err = pci_write_config_byte(pdev, 0xF4, BIT(2));
++ * if (err)
++ * return pcibios_err_to_errno(err);
++ */
++
++ return 0;
++}
++
++struct renesas_fw_ctx {
++ struct pci_dev *pdev;
++ const struct pci_device_id *id;
++ bool resume;
++ const struct renesas_fw_entry *entry;
++};
++
++static int xhci_pci_probe(struct pci_dev *pdev,
++ const struct pci_device_id *id);
++
++static bool renesas_check_rom(struct pci_dev *pdev)
++{
++ u16 rom_status;
++ int retval;
++
++ /* 1. Check if external ROM exists */
++ retval = pci_read_config_word(pdev, RENESAS_ROM_STATUS, &rom_status);
++ if (retval)
++ return false;
++
++ rom_status &= RENESAS_ROM_STATUS_ROM_EXISTS;
++ if (rom_status) {
++ dev_dbg(&pdev->dev, "External ROM exists\n");
++ return true; /* External ROM exists */
++ }
++
++ return false;
++}
++
++static void renesas_rom_erase(struct pci_dev *pdev)
++{
++ int retval, i;
++ u8 status;
++
++ dev_dbg(&pdev->dev, "Performing ROM Erase...\n");
++ retval = pci_write_config_dword(pdev, RENESAS_DATA0,
++ RENESAS_ROM_ERASE_MAGIC);
++ if (retval) {
++ dev_err(&pdev->dev, "ROM erase, magic word write failed: %d\n",
++ pcibios_err_to_errno(retval));
++ return;
++ }
++
++ retval = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status);
++ if (retval) {
++ dev_err(&pdev->dev, "ROM status read failed: %d\n",
++ pcibios_err_to_errno(retval));
++ return;
++ }
++ status |= RENESAS_ROM_STATUS_ERASE;
++ retval = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, status);
++ if (retval) {
++ dev_err(&pdev->dev, "ROM erase set word write failed\n");
++ return;
++ }
++
++ /* sleep a bit while ROM is erased */
++ msleep(20);
++
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ retval = pci_read_config_byte(pdev, RENESAS_ROM_STATUS,
++ &status);
++ status &= RENESAS_ROM_STATUS_ERASE;
++ if (!status)
++ break;
++
++ mdelay(RENESAS_DELAY);
++ }
++
++ if (i == RENESAS_RETRY)
++ dev_dbg(&pdev->dev, "Chip erase timedout: %x\n", status);
++
++ dev_dbg(&pdev->dev, "ROM Erase... Done success\n");
++}
++
++static bool renesas_download_rom(struct pci_dev *pdev,
++ const u32 *fw, size_t step)
++{
++ bool data0_or_data1;
++ u8 fw_status;
++ size_t i;
++ int err;
++
++ /*
++ * The hardware does alternate between two 32-bit pages.
++ * (This is because each row of the firmware is 8 bytes).
++ *
++ * for even steps we use DATA0, for odd steps DATA1.
++ */
++ data0_or_data1 = (step & 1) == 1;
++
++ /* Read "Set DATAX" and confirm it is cleared. */
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS_MSB,
++ &fw_status);
++ if (err) {
++ dev_err(&pdev->dev, "Read ROM Status failed: %d\n",
++ pcibios_err_to_errno(err));
++ return false;
++ }
++ if (!(fw_status & BIT(data0_or_data1)))
++ break;
++
++ udelay(RENESAS_DELAY);
++ }
++ if (i == RENESAS_RETRY) {
++ dev_err(&pdev->dev, "Timeout for Set DATAX step: %zd\n", step);
++ return false;
++ }
++
++ /*
++ * Write FW data to "DATAX".
++ * "LSB is left" => force little endian
++ */
++ err = pci_write_config_dword(pdev, data0_or_data1 ?
++ RENESAS_DATA1 : RENESAS_DATA0,
++ (__force u32)cpu_to_le32(fw[step]));
++ if (err) {
++ dev_err(&pdev->dev, "Write to DATAX failed: %d\n",
++ pcibios_err_to_errno(err));
++ return false;
++ }
++
++ udelay(100);
++
++ /* Set "Set DATAX". */
++ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS_MSB,
++ BIT(data0_or_data1));
++ if (err) {
++ dev_err(&pdev->dev, "Write config for DATAX failed: %d\n",
++ pcibios_err_to_errno(err));
++ return false;
++ }
++
++ return true;
++}
++
++static bool renesas_setup_rom(struct pci_dev *pdev, const struct firmware *fw)
++{
++ const u32 *fw_data = (const u32 *)fw->data;
++ int err, i;
++ u8 status;
++
++ /* 2. Write magic word to Data0 */
++ err = pci_write_config_dword(pdev, RENESAS_DATA0,
++ RENESAS_ROM_WRITE_MAGIC);
++ if (err)
++ return false;
++
++ /* 3. Set External ROM access */
++ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS,
++ RENESAS_ROM_STATUS_ACCESS);
++ if (err)
++ goto remove_bypass;
++
++ /* 4. Check the result */
++ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status);
++ if (err)
++ goto remove_bypass;
++ status &= GENMASK(6, 4);
++ if (status) {
++ dev_err(&pdev->dev,
++ "setting external rom failed: %x\n", status);
++ goto remove_bypass;
++ }
++
++ /* 5 to 16 Write FW to DATA0/1 while checking SetData0/1 */
++ for (i = 0; i < fw->size / 4; i++) {
++ err = renesas_download_rom(pdev, fw_data, i);
++ if (!err) {
++ dev_err(&pdev->dev,
++ "ROM Download Step %d failed at position %d bytes\n",
++ i, i * 4);
++ goto remove_bypass;
++ }
++ }
++
++ /*
++ * wait till DATA0/1 is cleared
++ */
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS_MSB,
++ &status);
++ if (err)
++ goto remove_bypass;
++ if (!(status & (BIT(0) | BIT(1))))
++ break;
++
++ udelay(RENESAS_DELAY);
++ }
++ if (i == RENESAS_RETRY) {
++ dev_err(&pdev->dev, "Final Firmware ROM Download step timed out\n");
++ goto remove_bypass;
++ }
++
++ /* 17. Remove bypass */
++ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS, 0);
++ if (err)
++ return false;
++
++ udelay(10);
++
++ /* 18. check result */
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status);
++ if (err) {
++ dev_err(&pdev->dev, "Read ROM status failed:%d\n",
++ pcibios_err_to_errno(err));
++ return false;
++ }
++ status &= RENESAS_ROM_STATUS_RESULT;
++ if (status == RENESAS_ROM_STATUS_SUCCESS) {
++ dev_dbg(&pdev->dev, "Download ROM success\n");
++ break;
++ }
++ udelay(RENESAS_DELAY);
++ }
++ if (i == RENESAS_RETRY) { /* Timed out */
++ dev_err(&pdev->dev,
++ "Download to external ROM TO: %x\n", status);
++ return false;
++ }
++
++ dev_dbg(&pdev->dev, "Download to external ROM scuceeded\n");
++
++ /* Last step set Reload */
++ err = pci_write_config_byte(pdev, RENESAS_ROM_STATUS,
++ RENESAS_ROM_STATUS_RELOAD);
++ if (err) {
++ dev_err(&pdev->dev, "Set ROM execute failed: %d\n",
++ pcibios_err_to_errno(err));
++ return false;
++ }
++
++ /*
++ * wait till Reload is cleared
++ */
++ for (i = 0; i < RENESAS_RETRY; i++) {
++ err = pci_read_config_byte(pdev, RENESAS_ROM_STATUS, &status);
++ if (err)
++ return false;
++ if (!(status & RENESAS_ROM_STATUS_RELOAD))
++ break;
++
++ udelay(RENESAS_DELAY);
++ }
++ if (i == RENESAS_RETRY) {
++ dev_err(&pdev->dev, "ROM Exec timed out: %x\n", status);
++ return false;
++ }
++
++ return true;
++
++remove_bypass:
++ pci_write_config_byte(pdev, RENESAS_ROM_STATUS, 0);
++ return false;
++}
++
++static void renesas_fw_callback(const struct firmware *fw,
++ void *context)
++{
++ struct renesas_fw_ctx *ctx = context;
++ struct pci_dev *pdev = ctx->pdev;
++ struct device *parent = pdev->dev.parent;
++ const struct renesas_fw_entry *next_entry;
++ bool rom;
++ int err;
++
++ if (!fw) {
++ dev_err(&pdev->dev, "firmware failed to load\n");
++ /*
++ * we didn't find firmware, check if we have another
++ * entry for this device
++ */
++ next_entry = renesas_get_next_entry(ctx->pdev, ctx->entry);
++ if (next_entry) {
++ ctx->entry = next_entry;
++ dev_dbg(&pdev->dev, "Found next entry, requesting: %s\n",
++ next_entry->firmware_name);
++ request_firmware_nowait(THIS_MODULE, 1,
++ next_entry->firmware_name,
++ &pdev->dev, GFP_KERNEL,
++ ctx, renesas_fw_callback);
++ return;
++ } else {
++ goto cleanup;
++ }
++ }
++
++ err = renesas_fw_verify(pdev, fw->data, fw->size);
++ if (err)
++ goto cleanup;
++
++ /* Check if the device has external ROM */
++ rom = renesas_check_rom(pdev);
++ if (rom) {
++ /* perfrom chip erase first */
++ renesas_rom_erase(pdev);
++
++ /* lets try loading fw on ROM first */
++ rom = renesas_setup_rom(pdev, fw);
++ if (!rom) {
++ dev_err(&pdev->dev,
++ "ROM load failed, falling back on FW load\n");
++ } else {
++ dev_dbg(&pdev->dev, "ROM load done..\n");
++
++ release_firmware(fw);
++ goto do_probe;
++ }
++ }
++
++ err = renesas_fw_download(pdev, fw);
++ release_firmware(fw);
++ if (err) {
++ dev_err(&pdev->dev, "firmware failed to download (%d).", err);
++ goto cleanup;
++ }
++
++do_probe:
++ if (ctx->resume)
++ return;
++
++ err = xhci_pci_probe(pdev, ctx->id);
++ if (!err) {
++ /* everything worked */
++ devm_kfree(&pdev->dev, ctx);
++ return;
++ }
++
++cleanup:
++ /* in case of an error - fall through */
++ dev_info(&pdev->dev, "Unloading driver");
++
++ if (parent)
++ device_lock(parent);
++
++ device_release_driver(&pdev->dev);
++
++ if (parent)
++ device_unlock(parent);
++
++ pci_dev_put(pdev);
++}
++
++static int renesas_fw_alive_check(struct pci_dev *pdev)
++{
++ const struct renesas_fw_entry *entry;
++
++ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */
++ entry = renesas_needs_fw_dl(pdev);
++ if (!entry)
++ return 0;
++
++ return renesas_fw_check_running(pdev);
++}
++
++static int renesas_fw_download_to_hw(struct pci_dev *pdev,
++ const struct pci_device_id *id,
++ bool do_resume)
++{
++ const struct renesas_fw_entry *entry;
++ struct renesas_fw_ctx *ctx;
++ int err;
++
++ /* check if we have a eligible RENESAS' uPD720201/2 w/o FW. */
++ entry = renesas_needs_fw_dl(pdev);
++ if (!entry)
++ return 0;
++
++ err = renesas_fw_check_running(pdev);
++ /* Continue ahead, if the firmware is already running. */
++ if (err == 0)
++ return 0;
++
++ if (err != 1)
++ return err;
++
++ ctx = devm_kzalloc(&pdev->dev, sizeof(*ctx), GFP_KERNEL);
++ if (!ctx)
++ return -ENOMEM;
++ ctx->pdev = pdev;
++ ctx->resume = do_resume;
++ ctx->id = id;
++ ctx->entry = entry;
++
++ pci_dev_get(pdev);
++ err = request_firmware_nowait(THIS_MODULE, 1, entry->firmware_name,
++ &pdev->dev, GFP_KERNEL,
++ ctx, renesas_fw_callback);
++ if (err) {
++ pci_dev_put(pdev);
++ return err;
++ }
++
++ /*
++ * The renesas_fw_callback() callback will continue the probe
++ * process, once it aquires the firmware.
++ */
++ return 1;
++}
++
++static int renesas_check_if_fw_dl_is_needed(struct pci_dev *pdev)
++{
++ int err;
++ u8 fw_state;
++
++ /*
++ * Only the uPD720201K8-711-BAC-A or uPD720202K8-711-BAA-A
++ * are listed in R19UH0078EJ0500 Rev.5.00 as devices which
++ * need a firmware in order to work.
++ *
++ * - uPD720202 ES 2.0 sample & CS sample & Mass product, ID is 2.
++ * - uPD720201 ES 2.0 sample whose revision ID is 2.
++ * - uPD720201 ES 2.1 sample & CS sample & Mass product, ID is 3.
++ */
++ if (!((pdev->vendor == PCI_VENDOR_ID_RENESAS) &&
++ ((pdev->device == 0x0015 && pdev->revision == 0x02) ||
++ (pdev->device == 0x0014 &&
++ (pdev->revision == 0x02 || pdev->revision == 0x03)))))
++ return 0;
++
++ /* Check if device has ROM and loaded, if so skip everything */
++ err = renesas_check_rom_state(pdev);
++ if (!err)
++ return err;
++
++ /*
++ * Test if the firmware was uploaded and is running.
++ * As most BIOSes will initialize the device for us.
++ */
++ err = pci_read_config_byte(pdev, RENESAS_FW_STATUS, &fw_state);
++ if (err)
++ return pcibios_err_to_errno(err);
++
++ /* Check the "Result Code" Bits (6:4) and act accordingly */
++ switch (fw_state & RENESAS_FW_STATUS_RESULT) {
++ case 0: /* No result yet */
++ dev_err(&pdev->dev, "FW is not ready/loaded yet.");
++ return -ENODEV;
++
++ case RENESAS_FW_STATUS_SUCCESS:
++ dev_dbg(&pdev->dev, "FW is ready.");
++ return 0;
++
++ case RENESAS_FW_STATUS_ERROR:
++ dev_err(&pdev->dev, "HW is in an error state.");
++ return -ENODEV;
++
++ default: /* All other states are marked as "Reserved states" */
++ dev_err(&pdev->dev, "HW is in an invalid state (%x).",
++ (fw_state & 0x70) >> 4);
++ return -EINVAL;
++ }
++}
++
+ /* called during probe() after chip reset completes */
+ static int xhci_pci_setup(struct usb_hcd *hcd)
+ {
+@@ -300,6 +1207,27 @@ static int xhci_pci_probe(struct pci_dev
+ struct hc_driver *driver;
+ struct usb_hcd *hcd;
+
++ /*
++ * Check if this device is a RENESAS uPD720201/2 device.
++ * Otherwise, we can continue with xhci_pci_probe as usual.
++ */
++ retval = renesas_fw_download_to_hw(dev, id, false);
++ switch (retval) {
++ case 0:
++ break;
++
++ case 1: /* let it load the firmware and recontinue the probe. */
++ return 0;
++
++ default:
++ return retval;
++ };
++
++ /* Check if this device is a RENESAS uPD720201/2 device. */
++ retval = renesas_check_if_fw_dl_is_needed(dev);
++ if (retval)
++ return retval;
++
+ driver = (struct hc_driver *)id->driver_data;
+
+ /* Prevent runtime suspending between USB-2 and USB-3 initialization */
+@@ -361,6 +1289,16 @@ static void xhci_pci_remove(struct pci_d
+ {
+ struct xhci_hcd *xhci;
+
++ if (renesas_fw_alive_check(dev)) {
++ /*
++ * bail out early, if this was a renesas device w/o FW.
++ * Else we might hit the NMI watchdog in xhci_handsake
++ * during xhci_reset as part of the driver's unloading.
++ * which we forced in the renesas_fw_callback().
++ */
++ return;
++ }
++
+ xhci = hcd_to_xhci(pci_get_drvdata(dev));
+ xhci->xhc_state |= XHCI_STATE_REMOVING;
+ if (xhci->shared_hcd) {
+@@ -484,6 +1422,11 @@ static int xhci_pci_resume(struct usb_hc
+ if (pdev->vendor == PCI_VENDOR_ID_INTEL)
+ usb_enable_intel_xhci_ports(pdev);
+
++ /* Check if this device is a RENESAS uPD720201/2 device. */
++ retval = renesas_check_if_fw_dl_is_needed(pdev);
++ if (retval)
++ return retval;
++
+ if (xhci->quirks & XHCI_SSIC_PORT_UNUSED)
+ xhci_ssic_port_unused_quirk(hcd, false);
+
--- /dev/null
+From a0dc613140bab907a3d5787a7ae7b0638bf674d0 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Thu, 23 Jun 2016 20:28:20 +0200
+Subject: [PATCH] usb: xhci: force MSI for uPD720201 and
+ uPD720202
+
+The APM82181 does not support MSI-X. When probed, it will
+produce a noisy warning.
+
+---
+ drivers/usb/host/pci-quirks.c | 362 ++++++++++++++++++++++++++++++++++++++++++
+ 1 file changed, 362 insertions(+)
+
+--- a/drivers/usb/host/xhci-pci.c
++++ b/drivers/usb/host/xhci-pci.c
+@@ -215,6 +215,7 @@ static void xhci_pci_quirks(struct devic
+ pdev->device == 0x0015) {
+ xhci->quirks |= XHCI_RESET_ON_RESUME;
+ xhci->quirks |= XHCI_ZERO_64B_REGS;
++ xhci->quirks |= XHCI_FORCE_MSI;
+ }
+ if (pdev->vendor == PCI_VENDOR_ID_VIA)
+ xhci->quirks |= XHCI_RESET_ON_RESUME;
+--- a/drivers/usb/host/xhci.c
++++ b/drivers/usb/host/xhci.c
+@@ -422,10 +422,14 @@ static int xhci_try_enable_msi(struct us
+ free_irq(hcd->irq, hcd);
+ hcd->irq = 0;
+
+- ret = xhci_setup_msix(xhci);
+- if (ret)
+- /* fall back to msi*/
++ if (xhci->quirks & XHCI_FORCE_MSI) {
+ ret = xhci_setup_msi(xhci);
++ } else {
++ ret = xhci_setup_msix(xhci);
++ if (ret)
++ /* fall back to msi*/
++ ret = xhci_setup_msi(xhci);
++ }
+
+ if (!ret) {
+ hcd->msi_enabled = 1;
+--- a/drivers/usb/host/xhci.h
++++ b/drivers/usb/host/xhci.h
+@@ -1876,6 +1876,7 @@ struct xhci_hcd {
+ /* support xHCI 0.96 spec USB2 software LPM */
+ unsigned sw_lpm_support:1;
+ /* support xHCI 1.0 spec USB2 hardware LPM */
++#define XHCI_FORCE_MSI (1 << 24)
+ unsigned hw_lpm_support:1;
+ /* Broken Suspend flag for SNPS Suspend resume issue */
+ unsigned broken_suspend:1;
--- /dev/null
+From 694f9bfb8efaef8a33e8992015ff9d0866faf4a2 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sun, 17 Dec 2017 17:27:15 +0100
+Subject: [PATCH 1/2] hwmon: tc654 add detection routine
+
+This patch adds a detection routine for the TC654/TC655
+chips. Both IDs are listed in the Datasheet.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/hwmon/tc654.c | 29 +++++++++++++++++++++++++++++
+ 1 file changed, 29 insertions(+)
+
+--- a/drivers/hwmon/tc654.c
++++ b/drivers/hwmon/tc654.c
+@@ -64,6 +64,11 @@ enum tc654_regs {
+ /* Register data is read (and cached) at most once per second. */
+ #define TC654_UPDATE_INTERVAL HZ
+
++/* Manufacturer and Version Identification Register Values */
++#define TC654_MFR_ID_MICROCHIP 0x84
++#define TC654_VER_ID 0x00
++#define TC655_VER_ID 0x01
++
+ struct tc654_data {
+ struct i2c_client *client;
+
+@@ -497,6 +502,29 @@ static const struct i2c_device_id tc654_
+ {}
+ };
+
++static int
++tc654_detect(struct i2c_client *new_client, struct i2c_board_info *info)
++{
++ struct i2c_adapter *adapter = new_client->adapter;
++ int manufacturer, product;
++
++ if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
++ return -ENODEV;
++
++ manufacturer = i2c_smbus_read_byte_data(new_client, TC654_REG_MFR_ID);
++ if (manufacturer != TC654_MFR_ID_MICROCHIP)
++ return -ENODEV;
++
++ product = i2c_smbus_read_byte_data(new_client, TC654_REG_VER_ID);
++ if (!((product == TC654_VER_ID) || (product == TC655_VER_ID)))
++ return -ENODEV;
++
++ strlcpy(info->type, product == TC654_VER_ID ? "tc654" : "tc655",
++ I2C_NAME_SIZE);
++ return 0;
++}
++
++
+ MODULE_DEVICE_TABLE(i2c, tc654_id);
+
+ static struct i2c_driver tc654_driver = {
+@@ -505,6 +533,7 @@ static struct i2c_driver tc654_driver =
+ },
+ .probe = tc654_probe,
+ .id_table = tc654_id,
++ .detect = tc654_detect,
+ };
+
+ module_i2c_driver(tc654_driver);
--- /dev/null
+From 9cb27801b5cbad2e1aaf45aac428cb2fac5e1372 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sun, 17 Dec 2017 17:29:13 +0100
+Subject: [PATCH] hwmon: tc654: add thermal_cooling device
+
+This patch adds a thermaL_cooling device to the tc654 driver.
+This allows the chip to be used for DT-based cooling.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ drivers/hwmon/tc654.c | 103 +++++++++++++++++++++++++++++++++++-------
+ 1 file changed, 86 insertions(+), 17 deletions(-)
+
+diff --git a/drivers/hwmon/tc654.c b/drivers/hwmon/tc654.c
+index c7939b7c417b..66e6bbe795a5 100644
+--- a/drivers/hwmon/tc654.c
++++ b/drivers/hwmon/tc654.c
+@@ -15,6 +15,7 @@
+ #include <linux/module.h>
+ #include <linux/mutex.h>
+ #include <linux/slab.h>
++#include <linux/thermal.h>
+ #include <linux/util_macros.h>
+
+ enum tc654_regs {
+@@ -132,6 +133,9 @@ struct tc654_data {
+ * writable register used to control the duty
+ * cycle of the V OUT output.
+ */
++
++ /* optional cooling device */
++ struct thermal_cooling_device *cdev;
+ };
+
+ /* helper to grab and cache data, at most one time per second */
+@@ -367,36 +371,30 @@ static ssize_t pwm_mode_store(struct device *dev, struct device_attribute *da,
+ static const int tc654_pwm_map[16] = { 77, 88, 102, 112, 124, 136, 148, 160,
+ 172, 184, 196, 207, 219, 231, 243, 255};
+
++static int get_pwm(struct tc654_data *data)
++{
++ if (data->config & TC654_REG_CONFIG_SDM)
++ return 0;
++ else
++ return tc654_pwm_map[data->duty_cycle];
++}
++
+ static ssize_t pwm_show(struct device *dev, struct device_attribute *da,
+ char *buf)
+ {
+ struct tc654_data *data = tc654_update_client(dev);
+- int pwm;
+
+ if (IS_ERR(data))
+ return PTR_ERR(data);
+
+- if (data->config & TC654_REG_CONFIG_SDM)
+- pwm = 0;
+- else
+- pwm = tc654_pwm_map[data->duty_cycle];
+-
+- return sprintf(buf, "%d\n", pwm);
++ return sprintf(buf, "%d\n", get_pwm(data));
+ }
+
+-static ssize_t pwm_store(struct device *dev, struct device_attribute *da,
+- const char *buf, size_t count)
++static int _set_pwm(struct tc654_data *data, unsigned long val)
+ {
+- struct tc654_data *data = dev_get_drvdata(dev);
+ struct i2c_client *client = data->client;
+- unsigned long val;
+ int ret;
+
+- if (kstrtoul(buf, 10, &val))
+- return -EINVAL;
+- if (val > 255)
+- return -EINVAL;
+-
+ mutex_lock(&data->update_lock);
+
+ if (val == 0)
+@@ -416,6 +414,22 @@ static ssize_t pwm_store(struct device *dev, struct device_attribute *da,
+
+ out:
+ mutex_unlock(&data->update_lock);
++ return ret;
++}
++
++static ssize_t pwm_store(struct device *dev, struct device_attribute *da,
++ const char *buf, size_t count)
++{
++ struct tc654_data *data = dev_get_drvdata(dev);
++ unsigned long val;
++ int ret;
++
++ if (kstrtoul(buf, 10, &val))
++ return -EINVAL;
++ if (val > 255)
++ return -EINVAL;
++
++ ret = _set_pwm(data, val);
+ return ret < 0 ? ret : count;
+ }
+
+@@ -447,6 +461,47 @@ static struct attribute *tc654_attrs[] = {
+
+ ATTRIBUTE_GROUPS(tc654);
+
++/* cooling device */
++
++static int tc654_get_max_state(struct thermal_cooling_device *cdev,
++ unsigned long *state)
++{
++ *state = 255;
++ return 0;
++}
++
++static int tc654_get_cur_state(struct thermal_cooling_device *cdev,
++ unsigned long *state)
++{
++ struct tc654_data *data = tc654_update_client(cdev->devdata);
++
++ if (IS_ERR(data))
++ return PTR_ERR(data);
++
++ *state = get_pwm(data);
++ return 0;
++}
++
++static int tc654_set_cur_state(struct thermal_cooling_device *cdev,
++ unsigned long state)
++{
++ struct tc654_data *data = tc654_update_client(cdev->devdata);
++
++ if (IS_ERR(data))
++ return PTR_ERR(data);
++
++ if (state > 255)
++ return -EINVAL;
++
++ return _set_pwm(data, state);
++}
++
++static const struct thermal_cooling_device_ops tc654_fan_cool_ops = {
++ .get_max_state = tc654_get_max_state,
++ .get_cur_state = tc654_get_cur_state,
++ .set_cur_state = tc654_set_cur_state,
++};
++
+ /*
+ * device probe and removal
+ */
+@@ -478,7 +533,21 @@ static int tc654_probe(struct i2c_client *client,
+ hwmon_dev =
+ devm_hwmon_device_register_with_groups(dev, client->name, data,
+ tc654_groups);
+- return PTR_ERR_OR_ZERO(hwmon_dev);
++ if (IS_ERR(hwmon_dev))
++ return PTR_ERR(hwmon_dev);
++
++#if IS_ENABLED(CONFIG_OF)
++ /* Optional cooling device register for Device tree platforms */
++ data->cdev = thermal_of_cooling_device_register(client->dev.of_node,
++ "tc654", hwmon_dev,
++ &tc654_fan_cool_ops);
++#else /* CONFIG_OF */
++ /* Optional cooling device register for non Device tree platforms */
++ data->cdev = thermal_cooling_device_register("tc654", hwmon_dev,
++ &tc654_fan_cool_ops);
++#endif /* CONFIG_OF */
++
++ return PTR_ERR_OR_ZERO(data->cdev);
+ }
+
+ static const struct i2c_device_id tc654_id[] = {
+--
+2.24.0
+
--- /dev/null
+From c9395ad54e2cabb87d408becc37566f3d8248933 Mon Sep 17 00:00:00 2001
+From: Christian Lamparter <chunkeey@gmail.com>
+Date: Sun, 1 Dec 2019 02:08:23 +0100
+Subject: [PATCH] powerpc: bootwrapper: force gzip as mkimage's compression
+ method
+
+Due to CONFIG_KERNEL_XZ symbol, the bootwrapper code tries to
+instruct the mkimage to use the xz compression, which isn't
+supported. This patch forces the gzip compression, which is
+supported and doesn't matter because the generated uImage for
+the apm821xx target gets ignored as the OpenWrt toolchain will
+do separate U-Boot kernel images for each device individually.
+
+Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
+---
+ arch/powerpc/boot/Makefile | 2 +-
+ 1 file changed, 1 insertion(+), 1 deletion(-)
+
+diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
+index dfbd7f22eef5..0bdef8e5f362 100644
+--- a/arch/powerpc/boot/Makefile
++++ b/arch/powerpc/boot/Makefile
+@@ -254,7 +254,7 @@ compressor-$(CONFIG_KERNEL_LZO) := lzo
+
+ # args (to if_changed): 1 = (this rule), 2 = platform, 3 = dts 4=dtb 5=initrd
+ quiet_cmd_wrap = WRAP $@
+- cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z $(compressor-y) -c -o $@ -p $2 \
++ cmd_wrap =$(CONFIG_SHELL) $(wrapper) -Z gzip -c -o $@ -p $2 \
+ $(CROSSWRAP) $(if $3, -s $3)$(if $4, -d $4)$(if $5, -i $5) \
+ vmlinux
+
+--
+2.24.0
+
projects / openwrt / staging / jogo.git / commitdiff