[PATCH] tpm: replace odd LPC init function
authorKylene Hall <kjhall@us.ibm.com>
Fri, 24 Jun 2005 05:02:06 +0000 (22:02 -0700)
committerLinus Torvalds <torvalds@ppc970.osdl.org>
Fri, 24 Jun 2005 07:05:27 +0000 (00:05 -0700)
Realized the tpm_lpc_init function isn't really necessary.  Replaced it
with vendor specific logic to find out the address the BIOS mapped the TPM
to.  This patch removes the tpm_lpc_init function, enums associated with it
and calls to it.  The patch also implements the replacement functionality.

Signed-off-by: Kylene Hall <kjhall@us.ibm.com>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
drivers/char/tpm/tpm.c
drivers/char/tpm/tpm.h
drivers/char/tpm/tpm_atmel.c
drivers/char/tpm/tpm_nsc.c

index c6d985b04b6ded2dedfac93a8d0af19c10e7cdd1..726d1b5b33b04333bc9820ff4ed89e61d86e64e4 100644 (file)
@@ -35,25 +35,6 @@ enum tpm_const {
        TPM_NUM_MASK_ENTRIES = TPM_NUM_DEVICES / (8 * sizeof(int))
 };
 
-  /* PCI configuration addresses */
-enum tpm_pci_config_addr {
-       PCI_GEN_PMCON_1 = 0xA0,
-       PCI_GEN1_DEC = 0xE4,
-       PCI_LPC_EN = 0xE6,
-       PCI_GEN2_DEC = 0xEC
-};
-
-enum tpm_config {
-       TPM_LOCK_REG = 0x0D,
-       TPM_INTERUPT_REG = 0x0A,
-       TPM_BASE_ADDR_LO = 0x08,
-       TPM_BASE_ADDR_HI = 0x09,
-       TPM_UNLOCK_VALUE = 0x55,
-       TPM_LOCK_VALUE = 0xAA,
-       TPM_DISABLE_INTERUPT_VALUE = 0x00
-};
-
-
 static LIST_HEAD(tpm_chip_list);
 static DEFINE_SPINLOCK(driver_lock);
 static int dev_mask[TPM_NUM_MASK_ENTRIES];
@@ -68,73 +49,6 @@ static void user_reader_timeout(unsigned long ptr)
        up(&chip->buffer_mutex);
 }
 
-/*
- * Initialize the LPC bus and enable the TPM ports
- */
-int tpm_lpc_bus_init(struct pci_dev *pci_dev, u16 base)
-{
-       u32 lpcenable, tmp;
-       int is_lpcm = 0;
-
-       switch (pci_dev->vendor) {
-       case PCI_VENDOR_ID_INTEL:
-               switch (pci_dev->device) {
-               case PCI_DEVICE_ID_INTEL_82801CA_12:
-               case PCI_DEVICE_ID_INTEL_82801DB_12:
-                       is_lpcm = 1;
-                       break;
-               }
-               /* init ICH (enable LPC) */
-               pci_read_config_dword(pci_dev, PCI_GEN1_DEC, &lpcenable);
-               lpcenable |= 0x20000000;
-               pci_write_config_dword(pci_dev, PCI_GEN1_DEC, lpcenable);
-
-               if (is_lpcm) {
-                       pci_read_config_dword(pci_dev, PCI_GEN1_DEC,
-                                             &lpcenable);
-                       if ((lpcenable & 0x20000000) == 0) {
-                               dev_err(&pci_dev->dev,
-                                       "cannot enable LPC\n");
-                               return -ENODEV;
-                       }
-               }
-
-               /* initialize TPM registers */
-               pci_read_config_dword(pci_dev, PCI_GEN2_DEC, &tmp);
-
-               if (!is_lpcm)
-                       tmp = (tmp & 0xFFFF0000) | (base & 0xFFF0);
-               else
-                       tmp =
-                           (tmp & 0xFFFF0000) | (base & 0xFFF0) |
-                           0x00000001;
-
-               pci_write_config_dword(pci_dev, PCI_GEN2_DEC, tmp);
-
-               if (is_lpcm) {
-                       pci_read_config_dword(pci_dev, PCI_GEN_PMCON_1,
-                                             &tmp);
-                       tmp |= 0x00000004;      /* enable CLKRUN */
-                       pci_write_config_dword(pci_dev, PCI_GEN_PMCON_1,
-                                              tmp);
-               }
-               break;
-       case PCI_VENDOR_ID_AMD:
-               /* nothing yet */
-               break;
-       }
-
-       tpm_write_index(TPM_LOCK_REG, TPM_UNLOCK_VALUE);
-       tpm_write_index(TPM_INTERUPT_REG, TPM_DISABLE_INTERUPT_VALUE);
-       tpm_write_index(TPM_BASE_ADDR_LO, base);
-       tpm_write_index(TPM_BASE_ADDR_HI, (base & 0xFF00) >> 8);
-       tpm_write_index(TPM_LOCK_REG, TPM_LOCK_VALUE);
-
-       return 0;
-}
-
-EXPORT_SYMBOL_GPL(tpm_lpc_bus_init);
-
 /*
  * Internal kernel interface to transmit TPM commands
  */
@@ -586,10 +500,6 @@ int tpm_pm_resume(struct pci_dev *pci_dev)
        if (chip == NULL)
                return -ENODEV;
 
-       spin_lock(&driver_lock);
-       tpm_lpc_bus_init(pci_dev, chip->vendor->base);
-       spin_unlock(&driver_lock);
-
        return 0;
 }
 
index 714cb16b32cb832d7d5e013a34aa75bca229b326..10cb450191a68edf2ced7716d435dababb0fef58 100644 (file)
@@ -91,8 +91,6 @@ static inline void tpm_write_index(int index, int value)
        outb(value & 0xFF, TPM_DATA);
 }
 
-extern int tpm_lpc_bus_init(struct pci_dev *, u16);
-
 extern int tpm_register_hardware(struct pci_dev *,
                                 struct tpm_vendor_specific *);
 extern int tpm_open(struct inode *, struct file *);
index 13248400b9c345877a441825b170d25b94862835..61fe14a77124eeb2a8fe1b6847ab1b41880bfd5a 100644 (file)
@@ -22,8 +22,9 @@
 #include "tpm.h"
 
 /* Atmel definitions */
-enum tpm_atmel_addr{
-       TPM_ATML_BASE = 0x400
+enum tpm_atmel_addr {
+       TPM_ATMEL_BASE_ADDR_LO = 0x08,
+       TPM_ATMEL_BASE_ADDR_HI = 0x09
 };
 
 /* write status bits */
@@ -148,7 +149,6 @@ static struct tpm_vendor_specific tpm_atmel = {
        .req_complete_mask = ATML_STATUS_BUSY | ATML_STATUS_DATA_AVAIL,
        .req_complete_val = ATML_STATUS_DATA_AVAIL,
        .req_canceled = ATML_STATUS_READY,
-       .base = TPM_ATML_BASE,
        .attr_group = &atmel_attr_grp,
        .miscdev = { .fops = &atmel_ops, },
 };
@@ -158,14 +158,16 @@ static int __devinit tpm_atml_init(struct pci_dev *pci_dev,
 {
        u8 version[4];
        int rc = 0;
+       int lo, hi;
 
        if (pci_enable_device(pci_dev))
                return -EIO;
 
-       if (tpm_lpc_bus_init(pci_dev, TPM_ATML_BASE)) {
-               rc = -ENODEV;
-               goto out_err;
-       }
+       lo = tpm_read_index( TPM_ATMEL_BASE_ADDR_LO );
+       hi = tpm_read_index( TPM_ATMEL_BASE_ADDR_HI );
+
+       tpm_atmel.base = (hi<<8)|lo;
+       dev_dbg( &pci_dev->dev, "Operating with base: 0x%x\n", tpm_atmel.base);
 
        /* verify that it is an Atmel part */
        if (tpm_read_index(4) != 'A' || tpm_read_index(5) != 'T'
index 37bea14f9310d4005cc9e45a5924803db05a8b34..1a45e7dfc13b29c827a514b6428b551cd94c9024 100644 (file)
 #include "tpm.h"
 
 /* National definitions */
-enum tpm_nsc_addr {
+enum tpm_nsc_addr{
        TPM_NSC_BASE = 0x360,
-       TPM_NSC_IRQ = 0x07
+       TPM_NSC_IRQ = 0x07,
+       TPM_NSC_BASE0_HI = 0x60,
+       TPM_NSC_BASE0_LO = 0x61,
+       TPM_NSC_BASE1_HI = 0x62,
+       TPM_NSC_BASE1_LO = 0x63
 };
 
 enum tpm_nsc_index {
@@ -44,7 +48,7 @@ enum tpm_nsc_status_loc {
 };
 
 /* status bits */
-enum tpm_nsc_status{
+enum tpm_nsc_status {
        NSC_STATUS_OBF = 0x01,  /* output buffer full */
        NSC_STATUS_IBF = 0x02,  /* input buffer full */
        NSC_STATUS_F0 = 0x04,   /* F0 */
@@ -246,7 +250,6 @@ static struct tpm_vendor_specific tpm_nsc = {
        .req_complete_mask = NSC_STATUS_OBF,
        .req_complete_val = NSC_STATUS_OBF,
        .req_canceled = NSC_STATUS_RDY,
-       .base = TPM_NSC_BASE,
        .attr_group = &nsc_attr_grp,
        .miscdev = { .fops = &nsc_ops, },
 };
@@ -255,15 +258,16 @@ static int __devinit tpm_nsc_init(struct pci_dev *pci_dev,
                                  const struct pci_device_id *pci_id)
 {
        int rc = 0;
+       int lo, hi;
+
+       hi = tpm_read_index(TPM_NSC_BASE0_HI);
+       lo = tpm_read_index(TPM_NSC_BASE0_LO);
+
+       tpm_nsc.base = (hi<<8) | lo;
 
        if (pci_enable_device(pci_dev))
                return -EIO;
 
-       if (tpm_lpc_bus_init(pci_dev, TPM_NSC_BASE)) {
-               rc = -ENODEV;
-               goto out_err;
-       }
-
        /* verify that it is a National part (SID) */
        if (tpm_read_index(NSC_SID_INDEX) != 0xEF) {
                rc = -ENODEV;