microblaze: Extend cpuinfo for support write-back caches

There is missing checking agains PVR but this is not important
for now. There are some missing checking too.

Signed-off-by: Michal Simek <monstr@monstr.eu>

diff --git a/arch/microblaze/include/asm/cpuinfo.h b/arch/microblaze/include/asm/cpuinfo.h
index aadf7a899d4956ee4477ed9038cb80efe9f00917..b4f5ca33aebf09a831226022ae0b9513c8344322 100644 (file)
--- a/arch/microblaze/include/asm/cpuinfo.h
+++ b/arch/microblaze/include/asm/cpuinfo.h
@@ -53,6 +53,7 @@ struct cpuinfo {
        u32 dcache_write;
        u32 dcache_line_length;
        u32 dcache_size;
+       u32 dcache_wb;
        unsigned long dcache_base;
        unsigned long dcache_high;
 

diff --git a/arch/microblaze/kernel/cpu/cpuinfo-static.c b/arch/microblaze/kernel/cpu/cpuinfo-static.c
index 6558429eb973b52eaa54c42f4f2c8efc9f47dbad..6095aa6b5c88ef17d6cdab7d7393d49dfd0ee286 100644 (file)
--- a/arch/microblaze/kernel/cpu/cpuinfo-static.c
+++ b/arch/microblaze/kernel/cpu/cpuinfo-static.c
@@ -96,6 +96,7 @@ void __init set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu)
        ci->dcache_size = fcpu(cpu, "d-cache-size");
        ci->dcache_base = fcpu(cpu, "d-cache-baseaddr");
        ci->dcache_high = fcpu(cpu, "d-cache-highaddr");
+       ci->dcache_wb = fcpu(cpu, "xlnx,dcache-use-writeback");
 
        ci->use_dopb = fcpu(cpu, "xlnx,d-opb");
        ci->use_iopb = fcpu(cpu, "xlnx,i-opb");

diff --git a/arch/microblaze/kernel/cpu/mb.c b/arch/microblaze/kernel/cpu/mb.c
index 4dcfccdbc36480beec86d4fd24c31ccf0d8cdc6d..0c912b2a8e03ae72c1073ff94185595f18a3ab68 100644 (file)
--- a/arch/microblaze/kernel/cpu/mb.c
+++ b/arch/microblaze/kernel/cpu/mb.c
@@ -103,11 +103,15 @@ static int show_cpuinfo(struct seq_file *m, void *v)
        else
                count += seq_printf(m, "Icache:\t\tno\n");
 
-       if (cpuinfo.use_dcache)
+       if (cpuinfo.use_dcache) {
                count += seq_printf(m,
                                "Dcache:\t\t%ukB\n",
                                cpuinfo.dcache_size >> 10);
-       else
+               if (cpuinfo.dcache_wb)
+                       count += seq_printf(m, "\t\twrite-back\n");
+               else
+                       count += seq_printf(m, "\t\twrite-through\n");
+       } else
                count += seq_printf(m, "Dcache:\t\tno\n");
 
        count += seq_printf(m,