drm/amd/powerplay: Tidy up cz_dpm_update_vce_dpm()
authorTom St Denis <tom.stdenis@amd.com>
Mon, 16 Oct 2017 17:31:49 +0000 (13:31 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 19 Oct 2017 19:27:14 +0000 (15:27 -0400)
Use PP_CAP and tidy up indentation.

Signed-off-by: Tom St Denis <tom.stdenis@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/powerplay/hwmgr/cz_hwmgr.c

index b159c035a403d8df74997a64909564f23a7d502e..acd06ada47bc9f4e65c9dbede701eeee6acde868 100644 (file)
@@ -1328,17 +1328,16 @@ int  cz_dpm_update_vce_dpm(struct pp_hwmgr *hwmgr)
                hwmgr->dyn_state.vce_clock_voltage_dependency_table;
 
        /* Stable Pstate is enabled and we need to set the VCE DPM to highest level */
-       if (phm_cap_enabled(hwmgr->platform_descriptor.platformCaps,
-                                       PHM_PlatformCaps_StablePState)
-                                       || hwmgr->en_umd_pstate) {
+       if (PP_CAP(PHM_PlatformCaps_StablePState) ||
+           hwmgr->en_umd_pstate) {
                cz_hwmgr->vce_dpm.hard_min_clk =
                                  ptable->entries[ptable->count - 1].ecclk;
 
                smum_send_msg_to_smc_with_parameter(hwmgr,
-                                       PPSMC_MSG_SetEclkHardMin,
-                                       cz_get_eclk_level(hwmgr,
-                                            cz_hwmgr->vce_dpm.hard_min_clk,
-                                               PPSMC_MSG_SetEclkHardMin));
+                       PPSMC_MSG_SetEclkHardMin,
+                       cz_get_eclk_level(hwmgr,
+                               cz_hwmgr->vce_dpm.hard_min_clk,
+                               PPSMC_MSG_SetEclkHardMin));
        } else {
                /*Program HardMin based on the vce_arbiter.ecclk */
                if (hwmgr->vce_arbiter.ecclk == 0) {
@@ -1351,10 +1350,10 @@ int  cz_dpm_update_vce_dpm(struct pp_hwmgr *hwmgr)
                } else {
                        cz_hwmgr->vce_dpm.hard_min_clk = hwmgr->vce_arbiter.ecclk;
                        smum_send_msg_to_smc_with_parameter(hwmgr,
-                                               PPSMC_MSG_SetEclkHardMin,
-                                               cz_get_eclk_level(hwmgr,
-                                               cz_hwmgr->vce_dpm.hard_min_clk,
-                                               PPSMC_MSG_SetEclkHardMin));
+                               PPSMC_MSG_SetEclkHardMin,
+                               cz_get_eclk_level(hwmgr,
+                                       cz_hwmgr->vce_dpm.hard_min_clk,
+                                       PPSMC_MSG_SetEclkHardMin));
                }
        }
        return 0;