arm64: KVM: Avoid setting the upper 32 bits of VTCR_EL2 to 1
authorWill Deacon <will.deacon@arm.com>
Thu, 13 Dec 2018 16:06:14 +0000 (16:06 +0000)
committerMarc Zyngier <marc.zyngier@arm.com>
Wed, 19 Dec 2018 17:47:52 +0000 (17:47 +0000)
Although bit 31 of VTCR_EL2 is RES1, we inadvertently end up setting all
of the upper 32 bits to 1 as well because we define VTCR_EL2_RES1 as
signed, which is sign-extended when assigning to kvm->arch.vtcr.

Lucky for us, the architecture currently treats these upper bits as RES0
so, whilst we've been naughty, we haven't set fire to anything yet.

Cc: <stable@vger.kernel.org>
Cc: Marc Zyngier <marc.zyngier@arm.com>
Cc: Christoffer Dall <christoffer.dall@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
arch/arm64/include/asm/kvm_arm.h

index 9921bb7ab6d898d094e62bf04683f3ab698b195d..9c1a065b78eac8a3cfe982cb2f5af4b0c65c67c2 100644 (file)
                         TCR_EL2_ORGN0_MASK | TCR_EL2_IRGN0_MASK | TCR_EL2_T0SZ_MASK)
 
 /* VTCR_EL2 Registers bits */
-#define VTCR_EL2_RES1          (1 << 31)
+#define VTCR_EL2_RES1          (1U << 31)
 #define VTCR_EL2_HD            (1 << 22)
 #define VTCR_EL2_HA            (1 << 21)
 #define VTCR_EL2_PS_SHIFT      TCR_EL2_PS_SHIFT