apm821xx: MBL: correct phy-mode delay settings
authorChristian Lamparter <chunkeey@gmail.com>
Sat, 1 May 2021 09:36:10 +0000 (11:36 +0200)
committerChristian Lamparter <chunkeey@gmail.com>
Sat, 1 May 2021 10:25:12 +0000 (12:25 +0200)
This came up in an upstream commit: "
b1dd9bf688b0 "net: phy: broadcom: Fix RGMII delays for BCM50160 and BCM50610M"

The PHY driver entry for BCM50160 and BCM50610M calls
bcm54xx_config_init() but does not call bcm54xx_config_clock_delay() in
order to configuration appropriate clock delays on the PHY, fix that."

So the "rgmii" phy-mode has always been wrong, but went unnoticed since
the broadcom phy driver didn't push the delay settings to the chip.

Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
target/linux/apm821xx/dts/wd-mybooklive.dts

index 3fd636cb237da4711acf9e99e21522ca96b7f0a0..dcb8078050dad7cd8288f51738a2bbabe52b1662 100644 (file)
        phy-map = <0x2>;
        phy-address = <0x1>;
        phy-handle = <&phy>;
+       phy-mode = "rgmii-id";
 
        mdio {
                #address-cells = <1>;