drm/i915/dsi: Group DPOunit clock gate workaround with PLL enable
authorHans de Goede <hdegoede@redhat.com>
Wed, 1 Mar 2017 13:15:00 +0000 (15:15 +0200)
committerJani Nikula <jani.nikula@intel.com>
Wed, 1 Mar 2017 13:57:53 +0000 (15:57 +0200)
Move the DPOunit clock gate workaround to directly after the PLL enable.

The exact location of the workaround does not matter and there are 2
reasons to group it with the PLL enable:

1) This moves it out of the middle of the init sequence from the spec,
   making it easier to follow the init sequence / compare it to the spec

2) It is grouped with the pll disable call in intel_dsi_post_disable,
   so for consistency it should be grouped with the pll enable in
   intel_dsi_pre_enable

Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Bob Paauwe <bob.j.paauwe@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: http://patchwork.freedesktop.org/patch/msgid/1488374106-4949-5-git-send-email-jani.nikula@intel.com
drivers/gpu/drm/i915/intel_dsi.c

index ab905474b9dde2b833986142c152588589d3a5d0..da798a579e11c46dffe54b950edb4993b34cd20b 100644 (file)
@@ -791,14 +791,6 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
                I915_WRITE(BXT_P_DSI_REGULATOR_TX_CTRL, 0);
        }
 
-       intel_dsi_prepare(encoder, pipe_config);
-
-       /* Power on, try both CRC pmic gpio and VBT */
-       if (intel_dsi->gpio_panel)
-               gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1);
-       intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
-       msleep(intel_dsi->panel_on_delay);
-
        if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) {
                u32 val;
 
@@ -808,6 +800,14 @@ static void intel_dsi_pre_enable(struct intel_encoder *encoder,
                I915_WRITE(DSPCLK_GATE_D, val);
        }
 
+       intel_dsi_prepare(encoder, pipe_config);
+
+       /* Power on, try both CRC pmic gpio and VBT */
+       if (intel_dsi->gpio_panel)
+               gpiod_set_value_cansleep(intel_dsi->gpio_panel, 1);
+       intel_dsi_exec_vbt_sequence(intel_dsi, MIPI_SEQ_POWER_ON);
+       msleep(intel_dsi->panel_on_delay);
+
        /* put device in ready state */
        intel_dsi_device_ready(encoder);