drm/amdgpu: Add check for USWC support for amdgpu_display_supported_domains

This verifies we don't add GTT as allowed domain for APUs when USWC
is disabled.

Signed-off-by: Andrey Grodzovsky <andrey.grodzovsky@amd.com>
Acked-by: Michel Dänzer <michel.daenzer@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
index 535650967b1a596c46e119867d25f3b493b908c1..ddd8f5b0f2d39d8c41c83cd31bf55448aea3ce68 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_display.c
@@ -500,8 +500,15 @@ uint32_t amdgpu_display_supported_domains(struct amdgpu_device *adev)
        uint32_t domain = AMDGPU_GEM_DOMAIN_VRAM;
 
 #if defined(CONFIG_DRM_AMD_DC)
+       /*
+        * if amdgpu_bo_validate_uswc returns false it means that USWC mappings
+        * is not supported for this board. But this mapping is required
+        * to avoid hang caused by placement of scanout BO in GTT on certain
+        * APUs. So force the BO placement to VRAM in case this architecture
+        * will not allow USWC mappings.
+        */
        if (adev->asic_type >= CHIP_CARRIZO && adev->asic_type < CHIP_RAVEN &&
-           adev->flags & AMD_IS_APU &&
+           adev->flags & AMD_IS_APU && amdgpu_bo_support_uswc(0) &&
            amdgpu_device_asic_has_dc_support(adev->asic_type))
                domain |= AMDGPU_GEM_DOMAIN_GTT;
 #endif