drm/amd/display: update odm mode validation to be in line with policy
authorDmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Fri, 30 Aug 2019 20:32:13 +0000 (16:32 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Thu, 17 Oct 2019 20:29:23 +0000 (16:29 -0400)
Previously 8k30 worked with dsc and odm combine due to a workaround that ran
the formula a second time with dsc support enable should dsc validation fail.
This worked when clocks were low enough for formula to enable odm to lower
voltage, however now broke due to increased clocks.

This change updates the ODM combine policy within the formula to properly
reflect our current policy within DC, only enabling ODM when we have to, as
well as adding a check for viewport width when dsc is enabled.

As a side effect the redundant call to dml when odm is required is now
unnecessary.

Signed-off-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Roman Li <Roman.Li@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/dc/dml/dcn21/display_mode_vba_21.c

index 3b6ed60dcd3510115833bb418d1ccef3d614998b..fd707e7459b53c562b97816e645b156a4bd362c6 100644 (file)
@@ -65,6 +65,7 @@ typedef struct {
 
 #define BPP_INVALID 0
 #define BPP_BLENDED_PIPE 0xffffffff
+#define DCN21_MAX_DSC_IMAGE_WIDTH 5184
 
 static void DisplayPipeConfiguration(struct display_mode_lib *mode_lib);
 static void DISPCLKDPPCLKDCFCLKDeepSleepPrefetchParametersWatermarksAndPerformanceCalculation(
@@ -3936,6 +3937,10 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
                                mode_lib->vba.MaximumSwathWidthInLineBuffer);
        }
        for (i = 0; i <= mode_lib->vba.soc.num_states; i++) {
+               double MaxMaxDispclkRoundedDown = RoundToDFSGranularityDown(
+                       mode_lib->vba.MaxDispclk[mode_lib->vba.soc.num_states],
+                       mode_lib->vba.DISPCLKDPPCLKVCOSpeed);
+
                for (j = 0; j < 2; j++) {
                        mode_lib->vba.MaxDispclkRoundedDownToDFSGranularity = RoundToDFSGranularityDown(
                                mode_lib->vba.MaxDispclk[i],
@@ -3965,7 +3970,9 @@ void dml21_ModeSupportAndSystemConfigurationFull(struct display_mode_lib *mode_l
                                                && i == mode_lib->vba.soc.num_states)
                                        mode_lib->vba.PlaneRequiredDISPCLKWithODMCombine = mode_lib->vba.PixelClock[k] / 2
                                                        * (1 + mode_lib->vba.DISPCLKDPPCLKDSCCLKDownSpreading / 100.0);
-                               if (mode_lib->vba.ODMCapability == false || mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine <= mode_lib->vba.MaxDispclkRoundedDownToDFSGranularity) {
+                               if (mode_lib->vba.ODMCapability == false ||
+                                               (locals->PlaneRequiredDISPCLKWithoutODMCombine <= MaxMaxDispclkRoundedDown
+                                                       && (!locals->DSCEnabled[k] || locals->HActive[k] <= DCN21_MAX_DSC_IMAGE_WIDTH))) {
                                        locals->ODMCombineEnablePerState[i][k] = false;
                                        mode_lib->vba.PlaneRequiredDISPCLK = mode_lib->vba.PlaneRequiredDISPCLKWithoutODMCombine;
                                } else {