net: nixge: Make mdio child node optional

Make MDIO child optional and only instantiate the
MDIO bus if the child is actually present.

There are currently no (in-tree) users of this
binding; all (out-of-tree) users use overlays that
get shipped together with the FPGA images that contain
the IP.

This will significantly increase maintainabilty
of future revisions of this IP.

Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Moritz Fischer <mdf@kernel.org>
Signed-off-by: David S. Miller <davem@davemloft.net>

diff --git a/Documentation/devicetree/bindings/net/nixge.txt b/Documentation/devicetree/bindings/net/nixge.txt
index 44a7358b4399da25e7ee9dfef4f822af9127bc26..bb2929f9c64fc1310ae2d41a4534f2c202bd333b 100644 (file)
--- a/Documentation/devicetree/bindings/net/nixge.txt
+++ b/Documentation/devicetree/bindings/net/nixge.txt
@@ -16,6 +16,9 @@ Required properties:
 - nvmem-cells: Phandle of nvmem cell containing the MAC address
 - nvmem-cell-names: Should be "address"
 
+Optional properties:
+- mdio subnode to indicate presence of MDIO controller
+
 Examples (10G generic PHY):
        nixge0: ethernet@40000000 {
                compatible = "ni,xge-enet-3.00";
@@ -33,8 +36,26 @@ Examples (10G generic PHY):
                phy-mode = "xgmii";
                phy-handle = <&ethernet_phy1>;
 
-               ethernet_phy1: ethernet-phy@4 {
-                       compatible = "ethernet-phy-ieee802.3-c45";
-                       reg = <4>;
+               mdio {
+                       ethernet_phy1: ethernet-phy@4 {
+                               compatible = "ethernet-phy-ieee802.3-c45";
+                               reg = <4>;
+                       };
                };
        };
+
+Examples (10G generic PHY, no MDIO):
+       nixge0: ethernet@40000000 {
+               compatible = "ni,xge-enet-2.00";
+               reg = <0x40000000 0x6000>;
+
+               nvmem-cells = <&eth1_addr>;
+               nvmem-cell-names = "address";
+
+               interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>, <0 30 IRQ_TYPE_LEVEL_HIGH>;
+               interrupt-names = "rx", "tx";
+               interrupt-parent = <&intc>;
+
+               phy-mode = "xgmii";
+               phy-handle = <&ethernet_phy1>;
+       };

diff --git a/drivers/net/ethernet/ni/nixge.c b/drivers/net/ethernet/ni/nixge.c
index 73a98bd2fcd23b1963b2119e3b15cb4d41df0ee2..c8dd1e4c759da56d6939f0bb23ebf3f807895d23 100644 (file)
--- a/drivers/net/ethernet/ni/nixge.c
+++ b/drivers/net/ethernet/ni/nixge.c
@@ -1284,6 +1284,7 @@ static int nixge_probe(struct platform_device *pdev)
 {
        struct nixge_priv *priv;
        struct net_device *ndev;
+       struct device_node *mn;
        const u8 *mac_addr;
        int err;
 
@@ -1335,10 +1336,14 @@ static int nixge_probe(struct platform_device *pdev)
        priv->coalesce_count_rx = XAXIDMA_DFT_RX_THRESHOLD;
        priv->coalesce_count_tx = XAXIDMA_DFT_TX_THRESHOLD;
 
-       err = nixge_mdio_setup(priv, pdev->dev.of_node);
-       if (err) {
-               netdev_err(ndev, "error registering mdio bus");
-               goto free_netdev;
+       mn = of_get_child_by_name(pdev->dev.of_node, "mdio");
+       if (mn) {
+               err = nixge_mdio_setup(priv, mn);
+               of_node_put(mn);
+               if (err) {
+                       netdev_err(ndev, "error registering mdio bus");
+                       goto free_netdev;
+               }
        }
 
        priv->phy_mode = of_get_phy_mode(pdev->dev.of_node);
@@ -1364,7 +1369,8 @@ static int nixge_probe(struct platform_device *pdev)
        return 0;
 
 unregister_mdio:
-       mdiobus_unregister(priv->mii_bus);
+       if (priv->mii_bus)
+               mdiobus_unregister(priv->mii_bus);
 
 free_netdev:
        free_netdev(ndev);
@@ -1379,7 +1385,8 @@ static int nixge_remove(struct platform_device *pdev)
 
        unregister_netdev(ndev);
 
-       mdiobus_unregister(priv->mii_bus);
+       if (priv->mii_bus)
+               mdiobus_unregister(priv->mii_bus);
 
        free_netdev(ndev);