/*
- * Copyright (c) 2015-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2015-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
void gicv3_set_interrupt_priority(unsigned int id, unsigned int proc_num,
unsigned int priority);
void gicv3_set_interrupt_type(unsigned int id, unsigned int proc_num,
- unsigned int group);
+ unsigned int type);
void gicv3_raise_secure_g0_sgi(int sgi_num, u_register_t target);
void gicv3_set_spi_routing(unsigned int id, unsigned int irm,
u_register_t mpidr);
/*
- * Copyright (c) 2014-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2014-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
unsigned long long region_base,
unsigned long long region_top,
tzc_region_attributes_t sec_attr,
- unsigned int ns_device_access);
+ unsigned int nsaid_permissions);
void tzc400_set_action(tzc_action_t action);
void tzc400_enable_filters(void);
void tzc400_disable_filters(void);
/* Open a connection to a device */
int io_dev_open(const struct io_dev_connector *dev_con,
const uintptr_t dev_spec,
- uintptr_t *dev_handle);
+ uintptr_t *handle);
/* Initialise a device explicitly - to permit lazy initialisation or
void arm_system_pwr_domain_save(void);
void arm_system_pwr_domain_resume(void);
void arm_program_trusted_mailbox(uintptr_t address);
-int arm_psci_read_mem_protect(int *val);
+int arm_psci_read_mem_protect(int *enabled);
int arm_nor_psci_write_mem_protect(int val);
void arm_nor_psci_do_mem_protect(void);
int arm_psci_mem_protect_chk(uintptr_t base, u_register_t length);
/*
- * Copyright (c) 2013-2016, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
/*******************************************************************************
* Function & variable prototypes
******************************************************************************/
-void fvp_pwrc_write_pcoffr(u_register_t);
-void fvp_pwrc_write_ppoffr(u_register_t);
-void fvp_pwrc_write_pponr(u_register_t);
-void fvp_pwrc_set_wen(u_register_t);
-void fvp_pwrc_clr_wen(u_register_t);
-unsigned int fvp_pwrc_read_psysr(u_register_t);
-unsigned int fvp_pwrc_get_cpu_wkr(u_register_t);
+void fvp_pwrc_write_pcoffr(u_register_t mpidr);
+void fvp_pwrc_write_ppoffr(u_register_t mpidr);
+void fvp_pwrc_write_pponr(u_register_t mpidr);
+void fvp_pwrc_set_wen(u_register_t mpidr);
+void fvp_pwrc_clr_wen(u_register_t mpidr);
+unsigned int fvp_pwrc_read_psysr(u_register_t mpidr);
+unsigned int fvp_pwrc_get_cpu_wkr(u_register_t mpidr);
#endif /*__ASSEMBLY__*/
/*
- * Copyright (c) 2013-2017, ARM Limited and Contributors. All rights reserved.
+ * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved.
*
* SPDX-License-Identifier: BSD-3-Clause
*/
* support SYSTEM_SUSPEND and it is `faked` in firmware. Hence, for wake up
* from `fake` system suspend the GIC must not be powered off.
*/
-void arm_gicv3_distif_pre_save(unsigned int proc_num)
+void arm_gicv3_distif_pre_save(unsigned int rdist_proc_num)
{}
-void arm_gicv3_distif_post_restore(unsigned int proc_num)
+void arm_gicv3_distif_post_restore(unsigned int rdist_proc_num)
{}
static void fvp_power_domain_on_finish_common(const psci_power_state_t *target_state)