drm/i915: Add readout and state check for pch_pfit.force_thru
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 25 Apr 2019 16:29:06 +0000 (19:29 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 9 May 2019 13:01:22 +0000 (16:01 +0300)
Convert the HSW pch_pfit.force_thru to a proper state variable
with readout and accompanying pipe conf check. Makes the logic
a bit more straightforward, and hopefully prevents some
breakage in the future.

'force_thru' is probably not the best name for this, but I
didn't manage to come up with anything better either, so I
left it alone.

Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190425162906.5242-2-ville.syrjala@linux.intel.com
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
drivers/gpu/drm/i915/intel_ddi.c
drivers/gpu/drm/i915/intel_display.c
drivers/gpu/drm/i915/intel_pipe_crc.c

index cd5277d98b034f29597b6e8645b70697b23c8f08..0af47f343faa125ef7f42185ba32a97c52fe4754 100644 (file)
@@ -1779,9 +1779,7 @@ void intel_ddi_enable_transcoder_func(const struct intel_crtc_state *crtc_state)
                         * eDP when not using the panel fitter, and when not
                         * using motion blur mitigation (which we don't
                         * support). */
-                       if (IS_HASWELL(dev_priv) &&
-                           (crtc_state->pch_pfit.enabled ||
-                            crtc_state->pch_pfit.force_thru))
+                       if (crtc_state->pch_pfit.force_thru)
                                temp |= TRANS_DDI_EDP_INPUT_A_ONOFF;
                        else
                                temp |= TRANS_DDI_EDP_INPUT_A_ON;
@@ -3860,6 +3858,7 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
                                    struct intel_crtc_state *pipe_config,
                                    struct drm_connector_state *conn_state)
 {
+       struct intel_crtc *crtc = to_intel_crtc(pipe_config->base.crtc);
        struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
        enum port port = encoder->port;
        int ret;
@@ -3874,6 +3873,12 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
        if (ret)
                return ret;
 
+       if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
+           pipe_config->cpu_transcoder == TRANSCODER_EDP)
+               pipe_config->pch_pfit.force_thru =
+                       pipe_config->pch_pfit.enabled ||
+                       pipe_config->crc_enabled;
+
        if (IS_GEN9_LP(dev_priv))
                pipe_config->lane_lat_optim_mask =
                        bxt_ddi_phy_calc_lane_lat_optim_mask(pipe_config->lane_count);
@@ -3881,7 +3886,6 @@ static int intel_ddi_compute_config(struct intel_encoder *encoder,
        intel_ddi_compute_min_voltage_level(dev_priv, pipe_config);
 
        return 0;
-
 }
 
 static void intel_ddi_encoder_suspend(struct intel_encoder *encoder)
index a57c98817938998f9b3ff1602c91faeb3c68f4f1..2392f67cc02a1e1c2f57008b60b468b32977862c 100644 (file)
@@ -9652,6 +9652,7 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
        for_each_set_bit(panel_transcoder,
                         &panel_transcoder_mask,
                         ARRAY_SIZE(INTEL_INFO(dev_priv)->trans_offsets)) {
+               bool force_thru = false;
                enum pipe trans_pipe;
 
                tmp = I915_READ(TRANS_DDI_FUNC_CTL(panel_transcoder));
@@ -9673,6 +9674,8 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
                             transcoder_name(panel_transcoder));
                        /* fall through */
                case TRANS_DDI_EDP_INPUT_A_ONOFF:
+                       force_thru = true;
+                       /* fall through */
                case TRANS_DDI_EDP_INPUT_A_ON:
                        trans_pipe = PIPE_A;
                        break;
@@ -9684,8 +9687,10 @@ static bool hsw_get_transcoder_state(struct intel_crtc *crtc,
                        break;
                }
 
-               if (trans_pipe == crtc->pipe)
+               if (trans_pipe == crtc->pipe) {
                        pipe_config->cpu_transcoder = panel_transcoder;
+                       pipe_config->pch_pfit.force_thru = force_thru;
+               }
        }
 
        /*
@@ -11520,10 +11525,11 @@ static void intel_dump_pipe_config(struct intel_crtc *crtc,
                              pipe_config->gmch_pfit.pgm_ratios,
                              pipe_config->gmch_pfit.lvds_border_bits);
        else
-               DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s\n",
+               DRM_DEBUG_KMS("pch pfit: pos: 0x%08x, size: 0x%08x, %s, force thru: %s\n",
                              pipe_config->pch_pfit.pos,
                              pipe_config->pch_pfit.size,
-                             enableddisabled(pipe_config->pch_pfit.enabled));
+                             enableddisabled(pipe_config->pch_pfit.enabled),
+                             yesno(pipe_config->pch_pfit.force_thru));
 
        DRM_DEBUG_KMS("ips: %i, double wide: %i\n",
                      pipe_config->ips_enabled, pipe_config->double_wide);
@@ -11645,7 +11651,6 @@ clear_intel_crtc_state(struct intel_crtc_state *crtc_state)
        saved_state->scaler_state = crtc_state->scaler_state;
        saved_state->shared_dpll = crtc_state->shared_dpll;
        saved_state->dpll_hw_state = crtc_state->dpll_hw_state;
-       saved_state->pch_pfit.force_thru = crtc_state->pch_pfit.force_thru;
        saved_state->crc_enabled = crtc_state->crc_enabled;
        if (IS_G4X(dev_priv) ||
            IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
@@ -11937,7 +11942,6 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
                          struct intel_crtc_state *pipe_config,
                          bool adjust)
 {
-       struct intel_crtc *crtc = to_intel_crtc(current_config->base.crtc);
        bool ret = true;
        bool fixup_inherited = adjust &&
                (current_config->base.mode.private_flags & I915_MODE_FLAG_INHERITED) &&
@@ -12163,9 +12167,7 @@ intel_pipe_config_compare(struct drm_i915_private *dev_priv,
         * Changing the EDP transcoder input mux
         * (A_ONOFF vs. A_ON) requires a full modeset.
         */
-       if (IS_HASWELL(dev_priv) && crtc->pipe == PIPE_A &&
-           current_config->cpu_transcoder == TRANSCODER_EDP)
-               PIPE_CONF_CHECK_BOOL(pch_pfit.enabled);
+       PIPE_CONF_CHECK_BOOL(pch_pfit.force_thru);
 
        if (!adjust) {
                PIPE_CONF_CHECK_I(pipe_src_w);
index 40f978ac07ca596f5c01c3b0a069247f55fe6572..1e2c4307d05a392245f60b28e1592da5b1dc4860 100644 (file)
@@ -314,17 +314,8 @@ retry:
 
        if (IS_HASWELL(dev_priv) &&
            pipe_config->base.active && crtc->pipe == PIPE_A &&
-           pipe_config->cpu_transcoder == TRANSCODER_EDP) {
-               bool old_need_power_well = pipe_config->pch_pfit.enabled ||
-                       pipe_config->pch_pfit.force_thru;
-               bool new_need_power_well = pipe_config->pch_pfit.enabled ||
-                       enable;
-
-               pipe_config->pch_pfit.force_thru = enable;
-
-               if (old_need_power_well != new_need_power_well)
-                       pipe_config->base.connectors_changed = true;
-       }
+           pipe_config->cpu_transcoder == TRANSCODER_EDP)
+               pipe_config->base.mode_changed = true;
 
        ret = drm_atomic_commit(state);